Semiconductor substrate, and method and apparatus for manufacturing the same

Abstract

To provide a method for manufacturing a semiconductor substrate having a high quality, at a low cost.SOLUTION: The method for manufacturing the semiconductor substrate includes the steps of: forming a graphene layer 12 on an Si surface of an SiC single crystal substrate 11; forming an SiC epitaxial growth layer 13 on the graphene layer 12; forming a stress layer 14 on the SiC epitaxial growth layer 13; attaching a graphite substrate 19 of a temporary substrate onto the stress layer 14; peeling the graphene layer 12 and the SiC epitaxial growth layer 13; forming an SiC polycrystalline growth layer 17 on a C surface of the SiC epitaxial growth layer from which the graphene layer 12 has been peeled; and removing the graphite substrate 19. At least one of the step of forming the graphene layer 12 and the step of forming the SiC epitaxial growth layer 13 is conducted in an atmosphere containing fluorine.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor substrate and a manufacturing method and apparatus thereof. [Background technology]

[0002] In recent years, silicon carbide (SiC) semiconductors have been attracting attention because they have a wider band gap energy than Si semiconductors and GaAs semiconductors, have high electric field withstand voltage performance, and can realize high withstand voltage, large current, low on-resistance, high efficiency, low power consumption, high speed switching, etc. Schottky barrier diodes (SBDs), metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), etc. are being developed as SiC power devices for power control applications. SiC semiconductor substrates on which such SiC power devices are formed have been produced by bonding a single crystal SiC semiconductor substrate to a polycrystalline SiC semiconductor substrate by room temperature bonding or diffusion bonding in order to reduce manufacturing costs and provide desired physical properties (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Patent No. 8,916,451 [Summary] However, the polishing process required to ensure the required surface roughness for bonding a single-crystal SiC semiconductor substrate to a polycrystalline SiC semiconductor substrate is costly, and defects occurring at the bonding interface can reduce yields.

[0004] The present disclosure has been proposed in view of the above-mentioned circumstances, and has an object to provide a low-cost, high-quality semiconductor substrate, and a manufacturing method and apparatus thereof.

[0005] The method for manufacturing a semiconductor substrate according to the present disclosure includes the steps of forming a graphene layer on a Si-face of a SiC single crystal substrate, forming a SiC epitaxial growth layer on the graphene layer, forming a stress layer on the SiC epitaxial growth layer, attaching a temporary substrate onto the stress layer, peeling off the graphene layer and the SiC epitaxial growth layer, forming a SiC polycrystalline growth layer on the C-face of the SiC epitaxial growth layer from which the graphene layer has been peeled off, and removing the temporary substrate, and at least one of the steps of forming the graphene layer and forming the SiC epitaxial growth layer is performed in an atmosphere containing fluorine. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 shows a cross-sectional view of a SiC single crystal substrate. [Figure 2A] FIG. 2A shows a plan view illustrating the crystal planes of a SiC wafer. [Figure 2B] FIG. 2B shows a side view illustrating the crystal planes of a SiC wafer. [Figure 3A] FIG. 3A shows an overhead view of a unit cell of a 4H—SiC crystal. [Figure 3B] FIG. 3B shows a schematic diagram of the two-layer portion of a 4H—SiC crystal. [Figure 3C] FIG. 3C shows a schematic diagram of a four-layer portion of a 4H—SiC crystal. [Figure 4] FIG. 4 shows a configuration diagram of the unit cell of the 4H—SiC crystal shown in FIG. 3A, viewed from directly above the (0001) plane. [Diagram 5] FIG. 5 shows a cross-sectional view of a first composite in which a graphene layer is formed on a SiC single crystal substrate. [Figure 6] FIG. 6 shows an overhead view of an example of a graphene layer having a multi-layer stacked configuration. [Figure 7] FIG. 7 is a flow chart showing a series of steps for forming a graphene layer. [Figure 8] FIG. 8 is a cross-sectional view showing a semiconductor manufacturing apparatus. [Figure 9]FIG. 9 is a flow chart showing a series of steps for forming a graphene layer according to a modified example. [Figure 10] FIG. 10 shows a cross-sectional view of a second composite in which a SiC epitaxial layer is formed on a graphene layer. [Figure 11] FIG. 11 is a flow chart showing a series of steps for forming a SiC epitaxial growth layer. [Figure 12] FIG. 12 is a cross-sectional view showing a semiconductor manufacturing apparatus according to a modified example. [Figure 13] FIG. 13 shows a cross-sectional view of a third composite having a stress layer formed on the second composite. [Figure 14] FIG. 14 shows a cross-sectional view of a fourth composite in which a graphite substrate is bonded onto the stress layer of the third composite via an adhesive layer. [Figure 15] FIG. 15 shows a cross-sectional view of a fifth composite in which the stress layers of the second composite are attached to both sides of a graphite substrate via adhesive layers. [Figure 16] FIG. 16 shows a cross-sectional view of the fifth composite broken at the interface between the graphene layer and the SiC epitaxial layer. [Figure 17] FIG. 17 shows a sixth composite body in which SiC epitaxial layers are laminated on both sides of a graphite substrate via adhesive layers. [Figure 18] FIG. 18 shows a cross-sectional view of a seventh composite in which a SiC polycrystalline growth layer is formed by CVD on the sixth composite. [Figure 19] FIG. 19 shows a cross-sectional view of an eighth composite body obtained by grinding the outer periphery of the seventh composite body. [Figure 20] FIG. 20 shows a cross-sectional view of a ninth composite obtained by removing the stress layer, the graphite substrate, and the carbonized adhesive layer from the eighth composite by annealing treatment. [Figure 21] FIG. 21 shows a cross-sectional view of a SiC composite substrate. [Figure 22] FIG. 22 shows an overhead view of a SiC composite substrate (wafer). [Figure 23] FIG. 23 shows a cross-sectional view of a structure having a highly doped layer at the interface between a SiC epitaxial growth layer and a SiC polycrystalline growth layer. [Figure 24] FIG. 24 shows a cross-sectional view of a tenth composite body in which a modified stress layer is formed on a SiC epitaxial growth layer. [Diagram 25] FIG. 25 shows a cross-sectional view of an eleventh composite in which a graphite substrate is bonded onto a stress layer of a modified example of the tenth composite via an adhesive layer. [Figure 26] FIG. 26 shows a cross-sectional view of a twelfth complex in which stress layers of a modified example of the tenth complex are attached to both sides of a graphite substrate via adhesive layers. [Figure 27] FIG. 27 shows a cross-sectional view of a thirteenth composite obtained by removing the graphite substrate and the carbonized adhesive layer from the twelfth composite by annealing treatment. [Figure 28] FIG. 28 shows a cross-sectional view of a Schottky barrier diode. [Figure 29] FIG. 29 shows a cross-sectional view of a trench-gate TMOSFET. [Diagram 30] FIG. 30 shows a cross-sectional view of a planar gate MOSFET.

[0007] [Detailed Description] Next, an embodiment will be described with reference to the drawings. In the description of the drawings described below, the same or similar parts are given the same or similar reference numerals. The drawings are schematic. Furthermore, the embodiment shown below is an example of an apparatus and method for embodying a technical idea, and does not specify the material, shape, structure, arrangement, etc. of parts. Various modifications can be made to the embodiment.

[0008] (Method of manufacturing semiconductor substrate) A method for manufacturing a semiconductor substrate according to an embodiment will be described. FIG. 1 is a cross-sectional view of a SiC single crystal substrate (SiCSB) 11 serving as a seed substrate. There are crystallographic polymorphs of SiC, the cubic crystal (3C) being called β-SiC, and the other high-temperature stable forms being called α-SiC. The SiC single crystal substrate 11 according to the embodiment is, for example, a 4H-SiC substrate of α-SiC, and has a thickness of, for example, about 300 μm to 600 μm. In FIG. 1, [C] indicates the C-face of SiC, and [S] indicates the Si-face of SiC. The same applies to the following figures.

[0009] 2A and 2B are diagrams illustrating the crystal planes of a SiC wafer 100 applicable as a SiC single crystal substrate 11. The plan view of Fig. 2A shows a Si surface 103 of a SiC wafer 100 on which a primary orientation flat 101 and a secondary orientation flat 102 are formed. In the side view of Fig. 2B seen from the [-1100] orientation, a Si surface 103 with a

[0001] orientation is formed on the upper surface, and a C surface 104 with a [000-1] orientation is formed on the lower surface.

[0010] A schematic overhead configuration of a unit cell of a 4H-SiC crystal applicable to the embodiments is shown in Fig. 3A, a schematic configuration of a two-layer portion of a 4H-SiC crystal is shown in Fig. 3B, and a schematic configuration of a four-layer portion of a 4H-SiC crystal is shown in Fig. 3C. Also, a schematic configuration of the unit cell of the 4H-SiC crystal structure shown in Fig. 3A viewed from directly above the (0001) plane is shown in Fig. 4.

[0011] As shown in Figures 3A to 3C, the crystal structure of 4H-SiC can be approximated by a hexagonal system, with four C atoms bonded to one Si atom. The four C atoms are located at the four vertices of a regular tetrahedron with a Si atom in the center. Of these four C atoms, one Si atom is located in the

[0001] axial direction relative to the C atom, and the other three C atoms are located on the [000-1] axial side relative to the Si atom. In Figure 3A, the off-angle θ is, for example, about 4 degrees or less.

[0012] The

[0001] and [000-1] axes are aligned along the axial direction of the hexagonal prism, and the surface (top surface of the hexagonal prism) normalized to the

[0001] axis is the (0001) surface (Si surface). Meanwhile, the surface (bottom surface of the hexagonal prism) normalized to the [000-1] axis is the (000-1) surface (C surface). In addition, the directions perpendicular to the

[0001] axis and passing through non-adjacent vertices of the hexagonal prism when viewed from directly above the (0001) surface are the a1 axis [2-1-10], a2 axis [-12-10], and a3 axis [-1-120], respectively.

[0013] As shown in FIG. 4, the direction passing through the vertex between the a1 axis and the a2 axis is the [11-20] axis, the direction passing through the vertex between the a2 axis and the a3 axis is the [-2110] axis, and the direction passing through the vertex between the a3 axis and the a1 axis is the [1-210] axis. Between each of the six axes passing through each vertex of the hexagonal prism, the axes inclined at an angle of 30° to the axes on both sides and normal to each side of the hexagonal prism are, in order clockwise from between the a1 axis and the [11-20] axis, the [10-10] axis, the [1-100] axis, the [0-110] axis, the [-1010] axis, the [-1100] axis, and the [01-10] axis. Each face (side face of the hexagonal prism) having these axes as normals is a crystal face perpendicular to the (0001) and (000-1) faces.

[0014] 5, a graphene layer (GR) 12 of up to several molecular layers is laminated on the (0001) Si surface of the SiC single crystal substrate 11 to form a first composite 81. The graphene layer 12 can be formed by pyrolysis on the Si surface of the SiC single crystal substrate 11 by annealing the SiC single crystal substrate 11 at about 1700° C. in an argon gas atmosphere at atmospheric pressure, for example. The graphene layer 12 may also be formed by laminating the graphene layer 12 on the SiC single crystal substrate 11 by chemical vapor deposition (CVD).

[0015] The graphene layer 12 applicable to the embodiment is shown in FIG. 6. The graphene layer 12 has a laminated structure of graphite sheets 121·122·123·...12n. The graphite sheets 121·122·123·...12n on each side of the n-layer structure have a large number of hexagonal carbon (C) covalent bonds in one laminated crystal structure, and the graphite sheets 121·122·123·...12n on each side are bonded by van der Waals forces. In the embodiment, the graphene layer 12 may have a single layer structure, or may be a 0 layer bonded to the SiC single crystal substrate 11 as a buffer layer.

[0016] FIG. 7 is a flow chart showing a series of steps for forming a first composite 81 by laminating a graphene layer 12 on the Si surface of a SiC single crystal substrate 11. (Semiconductor manufacturing equipment) FIG. 8 shows a reactor 210 constituting a semiconductor manufacturing apparatus according to an embodiment used for forming the graphene layer 12. The reactor 210 has a vertical tubular furnace chamber 211 in which one to a plurality of deposition substrates 200 stacked at a predetermined interval in the vertical direction can be mounted on a support (not shown) and stored. The sides and the upper part of the furnace chamber 211 are surrounded by a susceptor 215 made of a hybrid material, a resistance heater 216 made of a carbon-based resistance heater and an infrared reflector made of a high melting point metal such as tungsten (W), molybdenum (Mo), or tantalum (Ta), a carbon-based heat insulating material 217, and a bell-jar-shaped water-cooled chamber 218 made of a metal such as stainless steel, in that order from inside the furnace surface 212 to the outside. The susceptor 215 is made of a hybrid material in which silicon carbide ceramics or a graphite molded body is coated with silicon carbide. The space between the susceptor 215 and the water-cooled chamber 218 can be evacuated using a vacuum dry pump to improve the heat insulation. A gas supply hole for supplying gas 201 to the furnace chamber 211 and an exhaust hole for discharging exhaust gas 202 from the furnace chamber 211 are formed on the floor 213 of the furnace chamber 211. This reaction furnace 210 is also called a batch-type vertical tubular furnace because the furnace chamber 211 extends vertically in a tubular shape and can store one or more film formation substrates 200 using supports to perform film formation processing.

[0017] The furnace chamber 211 can be heated to a temperature of 1500° C. to 1800° C. In addition, the pressure in the internal space of the furnace chamber 211 can be independently controlled to a pressure of 50 Pa to 50 kPa while flowing at a constant flow rate at least one gas selected from the group consisting of fluorine-based gas, inert gas such as argon, hydrocarbon gas, fluorocarbon gas, nitrogen gas, and hydrogen gas. In addition, the pressure in the internal space of the furnace chamber 211 can be independently controlled to a pressure of 1×10 using a turbo pump and a dry vacuum pump without flowing gas. -5 Further, the furnace chamber 211 is provided with a vacuum load lock chamber that can accommodate the entire support and is constructed of a highly heat-resistant material, i.e., a spare chamber that can be evacuated and a lifting mechanism for the support, and these structures prevent the intrusion of outside air as much as possible. The vacuum load lock chamber is provided with an infrared heater, and the support and the film-forming substrate 200 mounted on the support are heated to 100° C. or higher while a turbo pump and a dry vacuum pump are used to evacuate the support and the film-forming substrate 200 are heated to 100° C. or higher. -5 It can draw a high vacuum up to Pa.

[0018] The SiC single crystal substrate 11 that will become the film-forming substrate 200 in the reaction furnace 210 is washed and dried in advance and stored in the furnace chamber 211. The SiC single crystal substrate 11 may be cleaned using an improved RCA method that is generally used in semiconductor cleaning. The furnace chamber 211 that stores the SiC single crystal substrate 11 may be a 1×10 -5 The vacuum is drawn to below Pa.

[0019] Referring to the flowchart in FIG. 7, the process of forming the graphene layer 12 on the SiC single crystal substrate 11 is roughly divided into a surface thermal etching A process including steps S12 to S15, in which silicon is etched off on the Si face of the SiC single crystal substrate to leave carbon, and a surface pyrolysis B process including steps S16 to S20, in which silicon is sublimated on the Si face of the SiC single crystal substrate 11 and the remaining carbon is crystallized to form the graphene layer 12.

[0020] Explaining the process according to the flow chart of FIG. 7, in the first step S11, argon (Ar) gas is supplied as a carrier gas to the furnace chamber 211 of the reaction furnace 210. In step S12, the pressure of the atmosphere in the furnace chamber 211 is adjusted to a range of 100 Torr to 700 Torr, i.e., 13000 Pa to 93000 Pa, and the furnace chamber 211 is heated. The furnace chamber 211 may be rapidly heated at a rate of 50° C. / sec or more using a rapid thermal processor. The furnace chamber 211 may be heated by a resistance heater 216 provided in the reaction furnace 210, but infrared radiation heating may also be used in combination, or high-frequency induction heating and infrared radiation heating may also be used. Alternatively, the SiC single crystal substrate 11 may be rapidly heated by conveying it into the furnace chamber 211 that has already been heated to a high temperature.

[0021] When the temperature of the furnace chamber 211 reaches 1200° C. to 1400° C., the process proceeds to step S13, and silicon fluoride gas is introduced into the furnace chamber 211. In step S14, silicon (Si) on the Si surface of the SiC single crystal substrate 11 is selectively etched by the silicon fluoride gas to form a carbon (C) layer.

[0022] Here, the active species suitable for selectively etching Si on the Si surface of the SiC single crystal substrate 11 to form a C layer will be considered from the viewpoint of reaction Gibbs energy. First, the reactivity of graphene (C) with various active species will be considered. Tables 1 to 4 show reaction Gibbs energies Gr based on the reaction formulas of graphene with chlorine gas (Cl2), hydrogen chloride (HCl), hydrogen gas (H2), and silicon tetrafluoride (SiF4). Each table also shows the standard enthalpy of formation ΔH, standard entropy S, and standard Gibbs energy of formation Gf corresponding to each substance in the reaction formula. The standard Gibbs energy of formation Gf and reaction Gibbs energy Gr are shown at 25°C and 1500°C, respectively.

[0023] [Table 1]

[0024] [Table 2]

[0025] [Table 3]

[0026] [Table 4]

[0027] Referring to Tables 1 to 4, it is observed that the reaction Gibbs energy Gr at 1500°C is a positive number and increases in the order of H2, HCl, Cl2 and SiF4, with H2 and HCl being relatively close in value. According to these results, the reactivity with graphene (C) is estimated to be in the following order.

[0028] H2 ≥ HCl > Cl2 > SiF4 Similarly, the reactivity of silicon (Si) with various active species is examined using the Gibbs energy of reaction. Tables 5 to 8 show the Gibbs energy Gr of reaction based on the reaction formulas of silicon with chlorine gas (Cl2), hydrogen chloride (HCl), hydrogen gas (H2), and silicon tetrafluoride (SiF4).

[0029] [Table 5]

[0030] [Table 6]

[0031] [Table 7]

[0032] [Table 8]

[0033] Referring to Tables 5 to 8, it is observed that the reaction Gibbs energy Gr at 1500°C is positive for H2 but negative for HCl, Cl2 and SiF4, and increases in the order of SiF4, Cl2, HCl and H2. Based on these results, the reactivity with Si is estimated to be in the following order:

[0034] SiF4>Cl2>HCl>H2 Substances that tend to etch graphene are also considered from the perspective of reaction Gibbs energy. Tables 9 to 14 below show reaction Gibbs energies Gr based on the reaction formulas of graphene with water (H2O), hydroxyl radical (OH), oxygen gas (O2), nitrogen gas (N2), hydrogen fluoride (HF), dichlorosilane (SiH2Cl2), chlorine gas (Cl2), hydrogen chloride (HCl), hydrogen gas (H2), silicon tetrafluoride (SiF4), methane (CH4), and monosilane (SiH4).

[0035] [Table 9]

[0036] [Table 10]

[0037] [Table 11]

[0038] [Table 12]

[0039] [Table 13]

[0040] [Table 14]

[0041] [Table 15]

[0042] [Table 16]

[0043] [Table 17]

[0044] [Table 18]

[0045] [Table 19]

[0046] [Table 20]

[0047] Referring to Tables 9 to 12, it is observed that the reaction Gibbs energy Gr at 1500°C increases in the order of O2, OH, H2O, SiH4, and SiH2Cl2 as negative numbers, and increases in the order of H2, N2, CH4, HF, HCl, Cl2, and SiF4 as positive numbers, with H2, N2, CH4, and HF being relatively close values, and HF and HCl being almost the same values. Therefore, it is estimated that the reactivity of each of these substances with graphene is in the following order.

[0048] O2>OH>H2O>SiH4>SiH2Cl2>H2≧N2≧CH4≧HF=HCl>Cl2>SiF4 In order to selectively etch silicon (Si) on the Si surface of the SiC single crystal substrate 11 to form a carbon (C) layer, a material that is highly reactive with Si and low reactive with graphene is appropriate, and when chemical reactivity was examined from the viewpoint of reaction Gibbs energy, it was found that silicon tetrafluoride (SiF4) corresponds to such a material. It is considered that other silicon fluorides such as disilicon hexafluoride (Si2F6) having similar chemical properties can be similarly applied, in addition to silicon tetrafluoride.

[0049] In addition, for silicon fluoride gases of higher order than trisilicon octafluoride (Si3F8), the higher the compound, the lower the thermal decomposition temperature, and the easier it is to release Si atoms and fluorine atoms. In the case of using the gas to form a carbon layer, a mechanism is applied in which fluorine atoms selectively etch Si from the surface of the SiC substrate to leave carbon behind. However, since the higher silicon fluoride gas increases the partial pressure or vapor pressure of Si in the gas phase more than necessary, a reaction called Si vapor pressure etching, that is, a secondary reaction in which the remaining carbon reacts with Si to become a sublimable compound such as Si2C or SiC2, occurs, and the phenomenon in which carbon is etched and disappears easily occurs, making it difficult to control. For these reasons, in the embodiment, in consideration of practicality, the use of low-order silicon fluoride gases up to disilicon hexafluoride gas is limited.

[0050] In addition, chlorine gas (Cl2) has properties similar to silicon tetrafluoride (SiF4), but when used to form a carbon layer, the C etching reaction Gibbs energy of Cl2 is 624 kJ / mol, while that of SiF4 is 2149 kJ / mol. Since control of the carbon layer at the atomic layer level is required, Cl2 is difficult to use and is considered to be unsuitable.

[0051] Returning to step S13 in FIG. 7, in the reaction furnace 210, which is also called a batch-type vertical tubular furnace, the uniform heating length in the furnace chamber 211 is relatively long. Taking into consideration that SiF4 gradually decomposes thermally in the furnace chamber 211, Si2F6 alone may be used as the silicon fluoride, or a mixed gas of SiF4 and Si2F6 may be used with an adjusted mixing ratio.

[0052] In step S14, the silicon fluoride gas introduced into the furnace chamber 211 in step S13 is used to thermally etch the Si surface of the SiC single crystal substrate 11 to form a carbon layer. The amount of etching of the Si surface is controlled by the introduction time and temperature of the silicon fluoride, and the temperature and gas exposure time conditions are set according to the target number of graphene layers to be formed. When the desired amount of etching and number of graphene layers are achieved, the supply of silicon fluoride gas to the furnace chamber 211 is stopped in step S15.

[0053] The Si face of the SiC single crystal substrate 11 is etched to form a carbon layer through a surface thermal etching process A including steps S12 to S15, and then the silicon is sublimated on the Si face of the SiC single crystal substrate 11 through a surface pyrolysis process B including steps S16 to S20, and the remaining carbon is crystallized to form a graphene layer 12.

[0054] In step S16, the pressure of the Ar gas atmosphere supplied to the furnace chamber 211 is adjusted to 700 Torr, i.e., 93000 Pa, and the temperature of the furnace chamber 211 is further heated from 1650°C to 1700°C. As in step S12, the temperature may be rapidly increased at a rate of 100°C / sec or more using a rapid thermal processor. As in step S12, the furnace chamber 211 may be heated by a resistance heater 216 provided in the reaction furnace 210, but infrared radiation heating may also be used in combination, or high-frequency induction heating and infrared radiation heating may also be used. Alternatively, rapid heating may be performed by transporting the SiC single crystal substrate 11 into the furnace chamber 211 that has already been heated to a high temperature.

[0055] In this way, by rapidly heating the SiC single crystal substrate 11 in step S16, step bunching on the Si layer surface of the SiC single crystal substrate 11 is minimized. By quickly forming a low-defect 0 layer (buffer layer) at this stage, sublimation of silicon (Si) can be minimized, and a smooth surface with little bunching can be maintained.

[0056] When the temperature of the furnace chamber 211 reaches 1650°C to 1700°C, the process proceeds to step S17, and silicon fluoride gas is introduced into the furnace chamber 211. As described above, in the reaction furnace 210, which is also called a batch-type vertical tubular furnace, the uniform heating length in the furnace chamber 211 is relatively long, and therefore, taking into consideration the gradual thermal decomposition of SiF4 in the furnace chamber 211, Si2F6 alone may be used as the silicon fluoride, or a mixed gas of SiF4 and Si2F6 may be used with an adjusted mixing ratio.

[0057] In step S18, the Si surface of the SiC single crystal substrate 11 is pyrolyzed by silicon fluoride gas, silicon (Si) is sublimated, and the remaining carbon layer is crystallized and converted into a graphene layer. In this manner, a first composite 81 is formed in which a graphene layer is laminated on the Si surface of the SiC single crystal substrate 11. When the graphene formation of the carbon layer is completed, the process proceeds to step S17, where the supply of silicon fluoride gas is stopped, and further, the temperature of the furnace chamber 211 is lowered in step S20. After the supply of Ar gas is stopped in step S21, the first composite 81 is taken out of the furnace chamber 211.

[0058] In this manner, following the formation of a carbon layer by etching the Si face of the SiC single crystal substrate 11 by surface thermal etching A including steps S12 to S15, a surface pyrolysis B process including steps S16 to S20 is carried out in which silicon is sublimated on the Si face of the SiC single crystal substrate 11 and the remaining carbon is crystallized and converted into a graphene layer 12, thereby forming a first composite 81 in which a graphene layer is laminated on the Si face of the SiC single crystal substrate 11.

[0059] 9 is a flowchart showing a series of steps of a modified example for laminating a graphene layer 12 on the Si face of a SiC single crystal substrate 11 to form a first composite 81. The series of steps of the modified example omits the surface thermal etching A steps including steps S12 to S15 from the series of steps for forming a graphene layer shown in FIG. 7, and includes a surface pyrolysis B step including steps S16 to S20 for sublimating silicon on the Si face of the SiC single crystal substrate 11 and crystallizing the remaining carbon to convert it into a graphene layer 12.

[0060] The steps will be described in order according to the flow chart of Fig. 9. In the series of steps in Fig. 9, steps corresponding to steps S11 to S21 shown in Fig. 7 are given common reference symbols, and detailed descriptions thereof will be omitted. In step S11, Ar gas serving as a carrier gas is supplied to the furnace chamber 211 of the reaction furnace 210. In step S16, the pressure of the atmosphere of Ar gas supplied to the furnace chamber 211 is adjusted to 700 Torr, i.e., 93000 Pa, and the temperature of the furnace chamber 211 is further heated from 1650°C to 1700°C.

[0061] When the temperature of the furnace chamber 211 reaches 1650°C to 1700°C, the process proceeds to step S17, where silicon fluoride gas is introduced into the furnace chamber 211. As the silicon fluoride, Si2F6 alone may be used, or a mixed gas of SiF4 and Si2F6 may be used with an adjusted mixing ratio. In step S18, the silicon fluoride gas is used to pyrolyze the Si surface of the SiC single crystal substrate 11, silicon (Si) is sublimated, and the remaining carbon layer is crystallized and converted into a graphene layer. The graphene layer may be a single layer or a zero layer (buffer layer). In step S17, the supply of silicon fluoride gas is stopped, and in step S20 the temperature of the furnace chamber 211 is lowered. In step S21, the supply of Ar gas is stopped, and then the first composite 81 in which the graphene layer is laminated on the Si surface of the SiC single crystal substrate 11 is taken out of the furnace chamber 211.

[0062] Next, as shown in Fig. 10, a SiC epitaxial growth layer (SiC-epi) 13 is laminated on the graphene layer 12 of the first composite 81 shown in Fig. 5 to form a second composite 82. The SiC epitaxial growth layer 13 is formed by van der Waals epitaxial growth on the graphene layer 12 formed on the Si surface of the SiC single crystal substrate 11. The SiC epitaxial growth layer 13 is a single crystal SiC thin film made of α-SiC. The surface of the SiC epitaxial growth layer 13 in contact with the graphene layer 12 is the C-plane, and the surface of the SiC epitaxial growth layer 13 is the Si-plane.

[0063] 11 is a flowchart showing a series of steps for forming a second composite 82 by stacking a SiC epitaxial growth layer 13 on the graphene layer 12 of a first composite 81. A reactor 210, which is a semiconductor manufacturing apparatus according to the embodiment, is also used for this series of steps.

[0064] The deposition substrate 200 in the reactor 210 is a first composite 81 in which a graphene layer 12 is laminated on the Si surface of a SiC single crystal substrate 11. The graphene layer 12 may be a single layer or a zero layer (buffer layer). The furnace chamber 211 storing the first composite 81 has a capacity of 1×10 -5 The vacuum has been drawn to below Pa.

[0065] In the first step S21, Ar gas is supplied as a carrier gas to the furnace chamber 211 of the reaction furnace 210. In step S22, the atmosphere in the furnace chamber 211 is adjusted to about 800 Torr, i.e., about 110,000 Pa, and heated to 1500°C to 1600°C. The temperature is determined according to the required growth rate and film quality. In the first composite 81, the Si surface of the SiC single crystal substrate 11 is covered with the graphene layer 12, which suppresses the sublimation of Si and prevents step bunching from progressing. For this reason, rapid heating is not required, and a resistance heater 216 provided in the reaction furnace may be used for heating.

[0066] When the temperature of the furnace chamber 211 reaches 1500° C. to 1600° C., the process proceeds to step S23, where silicon fluoride gas and hydrocarbon gas or carbon fluoride gas are introduced into the furnace chamber 211 as material gases for forming the SiC epitaxial growth layer 13. In step S24, the SiC epitaxial growth layer 13 is grown by van der Waals growth on the Si surface of the SiC single crystal substrate 11 via the graphene layer 12 by using these material gases.

[0067] Here, the type of material gas suitable for forming a SiC epitaxial growth layer will be examined from the viewpoint of reaction Gibbs energy. First, the reactivity of silicon tetrafluoride (SiF4) with various fluorinated carbons will be examined. Tables 21 to 25 show reaction Gibbs energies Gr based on the reaction formulas of SiF4 with tetrafluoromethane (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), tetrafluoroethylene (C2F4), and fluorinated acetylene (C2HF).

[0068] [Table 21]

[0069] [Table 22]

[0070] [Table 23]

[0071] [Table 24]

[0072] [Table 25]

[0073] As shown in Tables 21 to 25, the reaction Gibbs energies at 1500°C based on the reaction formulas of SiF4 with CF4, C2F6, C3F8, C2F4, and C2F are all positive numbers. From this, it is estimated that the reaction of SiF4 with these carbon fluorides to produce silicon carbide on the right side is unlikely to occur.

[0074] The reactivity of silicon tetrafluoride (SiF4) with various hydrocarbons is also examined. Tables 26 to 30 show the reaction Gibbs energies Gr based on the reaction formulas of SiF4 with methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4), and acetylene (C2H2).

[0075] [Table 26]

[0076] [Table 27]

[0077] [Table 28]

[0078] [Table 29]

[0079] [Table 30]

[0080] As shown in Tables 26 to 30, the Gibbs energy Gr of reaction at 1500°C based on the reaction formulas of SiF4 with CH4, C2H6, C3H8, C2H4, and C2H2 is all positive. From this, it is estimated that the reaction of SiF4 with these hydrocarbons to produce silicon carbide on the right side is unlikely to occur.

[0081] Next, the reactivity of silicon hexafluoride (Si2F6) with various carbon fluorides is examined. Tables 31 to 35 show the reaction Gibbs energies based on the reaction formulas of Si2F6 with tetrafluoromethane (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), tetrafluoroethylene (C2F4), and fluorinated acetylene (C2F).

[0082] [Table 31]

[0083] [Table 32]

[0084] [Table 33]

[0085] [Table 34]

[0086] [Table 35]

[0087] As shown in Tables 31 to 35, the reaction Gibbs energies Gr of Si2F6 and CF4, C2F6, C3F8, C2F4, and C2F at 1500°C based on the reaction formulas are all positive numbers. From this, it is estimated that the reaction of SiF4 with these hydrocarbons to produce silicon carbide on the right side is unlikely to occur.

[0088] The reactivity of Si2F6 with various hydrocarbons is also examined. Tables 36 to 40 show the reaction Gibbs energies Gr based on the reaction formulas of Si2F6 with methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4), and acetylene (C2H2).

[0089] [Table 36]

[0090] [Table 37]

[0091] [Table 38]

[0092] [Table 39]

[0093] [Table 40]

[0094] As shown in Tables 36 to 40, except for CH4, the Gibbs energy Gr of reaction between Si2F6 and C2H6, C3H8, C2H4, and aC2H2 at 1500°C based on the reaction formula is all positive. From this, it is considered that the reaction of Si2F6 with these hydrocarbons to produce silicon carbide on the right side of the reaction formula is unlikely to occur. In the case of CH4, the Gibbs energy of reaction with Si2F6 at 1500°C is negative, so the reaction to produce silicon carbide on the right side of the reaction formula may proceed. Therefore, when using a combination of Si2F6 and CH4 as a material gas, consideration is required.

[0095] When chemical reactivity was examined from the viewpoint of reaction Gibbs energy in this way, it was found that the reaction Gibbs energies of silicon tetrafluoride (SiF4) and silicon hexafluoride (Si2F6) with various fluorocarbons or hydrocarbons were generally positive at a temperature of about 1500°C at which the SiC epitaxial growth layer 13 was formed, and the reaction to produce silicon carbide did not proceed spontaneously. For this reason, even if SiF4 and Si2F6 and various fluorocarbons or hydrocarbons were used as material gases in an atmosphere of about 1500°C in the furnace chamber 211 of the reactor 210, the reaction to produce silicon carbide would not occur, and it is considered that a single crystal would gradually grow epitaxially at the interface via the graphene layer 12 on the Si surface of the SiC single crystal substrate 11.

[0096] Returning to step S23 in Fig. 11, when silicon fluoride and hydrocarbon are introduced into the furnace chamber 211 as material gases for forming the SiC epitaxial growth layer 13, the uniform heating length in the furnace chamber 211 is relatively long in the reaction furnace 210, which is also called a batch-type vertical tubular furnace, and therefore, taking into consideration the gradual thermal decomposition of silicon tetrafluoride (SiF4) in the furnace chamber 211, silicon hexafluoride (Si2F6) alone may be used as the silicon fluoride, or a mixed gas of SiF4 and Si2F6 may be used with an adjusted mixing ratio. As the hydrocarbon, methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4), acetylene (C2H2), etc. may be used.

[0097] Although a combination of silicon fluoride and a hydrocarbon is shown as a material gas, a combination of silicon fluoride and a carbon fluoride may be used instead of or together with this combination. The carbon fluoride may be tetrafluoromethane (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), tetrafluoroethylene (C2F4), fluorinated acetylene (C2HF), or the like. The silicon fluoride is not limited to silicon tetrafluoride (SiF4), and other silicon fluorides such as disilicon hexafluoride (Si2F6) may be used.

[0098] As mentioned above, the higher the compound, the lower the thermal decomposition temperature of the silicon fluoride gases above trisilicon octafluoride (Si3F8), and the easier it is to release Si and fluorine atoms. When used for SiC epitaxial growth, a Si precursor gas (silicon fluoride gas) and a carbon precursor gas (carbon fluoride gas) are used in combination to adjust the composition ratio of the grown SiC single crystal to Si:C=1:1 (stoichiometric composition ratio = stoichiometry). However, silicon fluoride gases above trisilicon octafluoride gas tend to decompose at relatively low temperatures, and it is necessary to balance the amount of carbon supplied from the carbon fluoride gas, so that a higher compound of carbon silicon gas must be used. In this case, the decomposition process of each gas in the furnace is more likely to proceed, making it difficult to optimize the stoichiometry of the batch and the in-plane uniformity. In this case, lowering the growth temperature makes it easier to optimize the adjustment, but the tradeoff is that the crystal quality of the SiC is likely to deteriorate due to an increase in polymorphic inclusions, etc. For these reasons, in the embodiment, in consideration of practicality, the use of low-order silicon fluoride gases up to silicon hexafluoride gas is limited.

[0099] As mentioned above, chlorine gas (Cl2) has properties similar to silicon tetrafluoride (SiF4), but when used for SiC epitaxial growth, Cl2 is a compound that does not contain Si or C and cannot be used as a deposition gas. It could be used as an additive gas, but deposition gases such as SiF4 and C2F6 are less likely to etch carbon than Cl2 and are easier to conserve, so there is little benefit to adding Cl2.

[0100] In step S24, when the SiC epitaxial growth layer 13 grown on the graphene layer 12 reaches a desired thickness and a second composite 82 is formed in which the SiC epitaxial growth layer 13 is laminated on the SiC single crystal substrate 11 via the graphene layer 12, the supply of the material gas is stopped in step S25. Furthermore, the temperature of the furnace chamber 211 is lowered in step S26, and the supply of Ar gas is stopped in step S27, and then the second composite 82 is taken out from the furnace chamber 211. Note that the carrier gas Ar gas may be switched to hydrogen gas during the formation of the SiC epitaxial growth layer 13. This can almost completely suppress unnecessary deposits on the inner walls of the furnace chamber 211, thereby extending the maintenance cycle and the life of the furnace fixtures. (Modification of Semiconductor Manufacturing Apparatus) Fig. 12 is a diagram showing a modified reactor 220. In the series of steps for forming the first composite 81 shown in Fig. 7 and Fig. 9 and the step for forming the second composite shown in Fig. 11, the reactor 210 also called a batch-type vertical tubular furnace shown in Fig. 8 was used, but a modified reactor 220 as shown in Fig. 12 can also be used as a modified semiconductor manufacturing apparatus.

[0101] In the furnace chamber 221 of the reaction furnace 220 of the modified example, a table 225 on the top surface of which a plurality of film formation substrates 200 can be placed, and a hood 226 facing the table 225 with a predetermined gap therebetween are supported by supports extending from a floor 223 and a ceiling 224 of the furnace chamber 221, respectively. A gas supply hole for supplying gas 201 is provided at the approximate center of the bottom surface of the hood 226. In addition, an exhaust port for discharging exhaust gas 202 from the furnace chamber 221 is provided on the floor 223 of the furnace chamber 221. The table 225 and the hood 226 are each provided with a resistance heater 227. The surfaces of the table 225 and the hood 226 and the furnace wall 222 are formed by a SiC susceptor 231, and are further surrounded by a heat insulating material 232 and a water-cooled chamber 233. The surfaces of the table 225 and the hood 226 are also covered by a SiC susceptor. The modified reactor 220 is also referred to as a semi-batch reactor.

[0102] In the reactor 220 of the modified example, the first composite 81 can be formed by the series of steps shown in Fig. 7 and Fig. 9, as in the reactor 210 of the embodiment. Also, the second composite 82 can be formed by the series of steps shown in Fig. 11. However, compared with the reactor 210 of the embodiment, which is also called a batch-type vertical tubular furnace, the reactor 220 of the modified example, which is called a semi-batch-type reactor, has a shorter isothermal length. Therefore, silicon tetrafluoride (SiF4) alone can be used as the silicon fluoride gas without considering the loss due to decomposition of silicon tetrafluoride (SiF4).

[0103] 13, a stress layer 14 is provided on the SiC epitaxial growth layer 13 of the second complex 82 to form a third complex 83. The stress layer 14 generates stress between the graphene layer 12 and the SiC epitaxial growth layer 13, making it easier to peel the graphene layer 12 from the SiC epitaxial growth layer 13.

[0104] The stress layer 14 of the embodiment is made of a carbon film. The carbon film is made of a polycrystalline diamond film or a diamond-like carbon film. In the case of the polycrystalline diamond film, the carbon film is obtained by a microwave chemical vapor deposition (CVD) device or the like, and in the case of the diamond-like carbon film, by an RF plasma chemical vapor deposition (CVD) device or the like. When forming the carbon film, a negative potential is applied to the film formation substrate side in the initial stage of film formation to form the film while applying ion bombardment, thereby obtaining the necessary film adhesion.

[0105] As shown in FIG. 14 , an adhesive layer 16 is formed on the stress layer 14 of the third composite 83, and the coated surface of the adhesive layer 16 is attached to one side of a temporary graphite substrate 19 having an outer size slightly larger than that of the SiC single crystal substrate 11 to form a fourth composite 84.

[0106] In this embodiment, a carbon adhesive is used for the adhesive layer 16. The carbon adhesive is an adhesive that contains a solid carbon component and a phenolic resin, which is a thermosetting resin, as the main component, and the adhesive itself is carbonized, so that the adhesive can maintain its bonding strength even at high temperatures.

[0107] The graphite substrate 19 may have a glassy carbon coating on the surface thereof. Since the glassy carbon coating has a strong adhesive force with a carbon adhesive, the SiC epitaxial growth layer 13 can be easily peeled off from the graphene layer 12 and the SiC single crystal substrate 11, and the yield can be improved.

[0108] As the graphite substrate 19, which is a temporary substrate with a slightly larger outer size, for example, if the SiC single crystal substrate 11 has a diameter of about 10 cm, a graphite substrate 19 with an outer size of about 11 cm, which is about 10 mm larger, is used. For example, if the SiC single crystal substrate 11 has a diameter of about 15 cm, a graphite substrate 19 with an outer size of about 16 cm is used. The temporary substrate (graphite substrate 19) which is slightly larger in size than the SiC single crystal substrate 11 has the advantage that when it is inserted and aligned in the wafer boat groove of a batch-type vertical CVD furnace, the traces of the wafer boat supports are outside the effective substrate area.

[0109] As shown in FIG. 15, the stress layer 14 of the third composite 83 may be attached to both sides of the graphite substrate 19 of the temporary substrate via the adhesive layer 16 to form a fifth composite 85. In this case, the adhesive layer 16 is also formed on the stress layer 14 of each of the third composites 83, and the third composites 83 are attached to both sides of the graphite substrate 19 of the temporary substrate, which has an outer size slightly larger than that of the SiC single crystal substrate 11. For the fifth composite 85, an adhesive such as a carbon adhesive containing a thermosetting resin as a main component and a solid carbon component is used for the adhesive layer 16, and the adhesive layer 16 is dried and hardened by heating in a vacuum annealing furnace or the like. For the fifth composite 85, the graphite substrate 19 of the temporary substrate may have a glassy carbon coating on its surface, as in the fourth composite 84 shown in FIG. 14. In the following, the manufacturing method of a semiconductor substrate will be explained using a fifth composite 85 in which a third composite 83 is attached to both sides of a graphite substrate 19 of a temporary substrate, but the manufacturing method can also be applied to a fourth composite 84 in which a third composite 83 is attached to only one side of a graphite substrate 19 of a temporary substrate.

[0110] 16, after the fifth composite 85 of FIG. 15 is cured, the SiC epitaxial growth layer 13 is physically peeled off and separated from the interface with the graphene layer 12 on both sides of the fifth composite 85 using an adhesive peeling tape, a debonder device, or the like. When the separated SiC single crystal substrate 11 and graphene layer 12 are removed from the fifth composite 85, a sixth composite 86 is formed.

[0111] The graphene layer 12 is removed by etching or polishing from the laminate of the SiC single crystal substrate 11 and the graphene layer 12 removed from the fifth composite 85. In the etching process of the graphene layer 12, for example, a plasma asher using oxygen plasma can be applied. Since the Si surface of the SiC single crystal substrate 11 from which the graphene layer 12 has been etched by oxygen plasma is oxidized, wet etching using hydrogen fluoride (HF) is performed. In addition, in the polishing process of the graphene layer 12, the graphene layer 12 is removed by, for example, chemical mechanical polishing (CMP). Here, the Si surface of the SiC single crystal substrate 11 has an average surface roughness Ra of, for example, about 1 nm or less due to the above-mentioned wet etching process. As a result, the SiC single crystal substrate 11 becomes reusable.

[0112] 17 shows a sixth composite 86. The sixth composite 86 is heated in an annealing furnace in a vacuum or inert gas atmosphere to carbonize the adhesive layer 16. The carbon adhesive constituting the adhesive layer 16 can obtain an appropriate adhesive strength after the carbonization process.

[0113] As shown in FIG. 18, a SiC polycrystalline growth layer (SiC-poly) 17 is formed on the C-face of the SiC epitaxial growth layer 13 of the sixth composite 86. The SiC polycrystalline growth layer 17 can be formed by, for example, CVD technology. The SiC polycrystalline growth layer 17 has a 3C (cubic) structure and is also called α-SiC. The SiC polycrystalline growth layer 17 is formed on the C-face of the SiC epitaxial growth layer 13 to form a substrate layer of the device wafer structure. The C-face of the SiC epitaxial growth layer 13 becomes the back surface of the device wafer structure, so the flatness of the surface is not required very much. Therefore, the SiC polycrystalline growth layer 17 can be formed by a simple polishing process.

[0114] The SiC polycrystalline growth layer 17 is deposited to a thickness that provides the mechanical strength required for the substrate of the SiC-based semiconductor device, forming a seventh composite 87. The thickness of the SiC polycrystalline growth layer 17 is preferably about 150 μm to 500 μm, and is adjusted as necessary so that the thickness of the completed SiC composite substrate (SiC polycrystalline growth layer 17 + SiC epitaxial growth layer 13) is about 150 μm to 500 μm. By reducing the thickness of the SiC polycrystalline growth layer 17, the thermal conductivity is improved. In addition, the deposition temperature of the SiC polycrystalline growth layer 17 is preferably in the range of 1300°C to 1600°C.

[0115] As shown in Fig. 19, the SiC polycrystalline growth layer 17 formed on the periphery of the seventh composite 87 and unnecessary portions of the graphite substrate 19 of the temporary substrate are ground and removed by an outer periphery grinding device to form an eighth composite 88 in which the SiC epitaxial growth layer 13, the stress layer 14, the adhesive layer 16, and the graphite substrate 19 are exposed. In the eighth composite 88, the graphite substrate 19 and the like are exposed, making it possible to remove the graphite substrate 19 and the like by burning. In Fig. 19, the periphery of the eighth composite 88 has a unique contour in the direction in which the layers are stacked.

[0116] 20, the eighth composite 88 is heated in a thermal annealing furnace in an air or oxygen atmosphere, and the graphite substrate 19 and the carbonized adhesive layer 16 are removed by oxidative combustion. The stress layer 14 made of a carbon film is also removed by oxidative combustion to form a ninth composite 89. The ninth composite 89 is composed of two blocks of a SiC composite substrate 10 including a SiC epitaxial growth layer 13 and a SiC polycrystalline growth layer 17 arranged on the C-plane of the SiC epitaxial growth layer 13.

[0117] Fig. 21 shows a cross-sectional view of the SiC composite substrate 10. Fig. 22 shows an overhead view of the SiC composite substrate 10. In the SiC composite substrate 10, the surface of the SiC epitaxial growth layer 13 is a Si face of α-SiC with a

[0001] orientation of 4H-SiC, and the C face is a face of 4H-SiC with a [000-1] orientation. The thickness of the SiC polycrystalline growth layer 17 is, for example, about 150 μm to about 500 μm, and the thickness of the SiC epitaxial growth layer 13 is, for example, about 4 μm to about 100 μm.

[0118] 23, in the SiC epitaxial growth layer 13, a highly doped layer 13a may be formed toward the C-face of the SiC epitaxial growth layer 13 in contact with the SiC polycrystalline growth layer 17. The highly doped layer 13a suppresses the spread of a depletion layer in the SiC epitaxial growth layer 13, and also makes it possible to easily form an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C-face of the SiC epitaxial growth layer 13.

[0119] The highly doped layer 13a can be formed, for example, by using a high-dose ion implantation technique. For example, in the case of an n-type semiconductor, the highly doped layer 13a is formed by high-dose phosphorus (P) ion implantation. When formed by P ion implantation, there is an effect on the crystallinity of the P ion-implanted C-face of the SiC epitaxial growth layer 13, but the Si face that becomes the device face has already been formed, and the crystallinity of the Si face is preserved.

[0120] The highly doped layer 13a may be formed by forming a highly nitrogen (N) doped epitaxial growth layer in the early stage of forming the SiC epitaxial growth layer (SiC-epi) 13 shown in Fig. 10. Although the highly nitrogen (N) doped epitaxial growth layer has an effect on crystallinity due to mismatch of lattice constants, the process is simple since it is formed by autodoping in the early stage of epitaxial growth. (Modification of Semiconductor Manufacturing Method) In the embodiment, the stress layer 14 is made of a carbon film such as a polycrystalline diamond film or a diamond-like carbon film, but in the modified example, a silicon nitride film is used as the modified stress layer 15 .

[0121] 24 , a modified stress layer 15 is laminated on the SiC epitaxial growth layer 13 of the second composite 82 to form a tenth composite 90. The modified stress layer 15 also generates stress between the graphene layer 12 and the SiC epitaxial growth layer 13 to facilitate peeling of the graphene layer 12 and the SiC epitaxial growth layer 13.

[0122] 25, an adhesive layer 16 is formed on the stress layer 15 of the modified example of the tenth composite 90, and the coated surface of the adhesive layer 16 is laminated and attached to one side of a graphite substrate 19 of a temporary substrate to form an eleventh composite 91. The eleventh composite 91 is heated in a vacuum annealing furnace or the like, and the adhesive layer 16 is dried and hardened.

[0123] 26, a twelfth composite 92 may be formed by attaching stress layers 15 of a modified example of the tenth composite 90 to both sides of a graphite substrate 19 of a temporary substrate via adhesive layers 16. The twelfth composite 92 is heated in a vacuum annealing furnace or the like, and the adhesive layers 16 are dried and hardened.

[0124] In both the eleventh composite 91 in which the tenth composite 90 is attached to one side of the graphite substrate 19 as a temporary substrate and the twelfth composite 92 in which the tenth composite 90 is attached to both sides of the graphite substrate 19, the adhesive layer 16 is made of a carbon adhesive, the graphite substrate 19 may have a glassy carbon coating on its surface, and the graphite substrate 19 as a temporary substrate having an outer size slightly larger than that of the SiC single crystal substrate 11 is used, so that the wafer boat support marks are placed outside the effective substrate area when the substrate is inserted into the wafer boat groove of a batch-type vertical CVD furnace and aligned, as in the embodiment. In the following, the twelfth composite 92 in which the tenth composite 90 is attached to both sides of the graphite substrate 19 will be described, but the same applies to the eleventh composite 91 in which the tenth composite 90 is attached to only one side of the graphite substrate 19.

[0125] A thirteenth composite 93 shown in FIG. 27 is formed by subjecting the twelfth composite 92 to the same process as in the embodiment shown in FIG. 16 to FIG. 19. In detail, the SiC epitaxial growth layer 13 is physically peeled off and cut from the graphene layer 12 interface to remove the SiC single crystal substrate 11 and the graphene layer 12, and the remaining composite is heated to carbonize the adhesive layer 16, and then a SiC polycrystalline growth layer 17 is formed on the C-face of the SiC epitaxial growth layer 13. Furthermore, unnecessary parts of the SiC polycrystalline growth layer 17 formed on the periphery and the graphite substrate 19 of the temporary substrate are ground and removed by a periphery grinding device, and heated in a thermal annealing furnace in air or oxygen atmosphere, and the graphite substrate 19 and the carbonized adhesive layer 16 are removed by oxidative combustion. The stress layer 15 of the modified example is made of silicon nitride, and therefore remains after the graphite substrate 19 and the carbonized adhesive layer 16 are removed by oxidative combustion, unlike the stress layer 14 formed of the carbon film in the embodiment.

[0126] The stress layer 15 of the modified example made of silicon nitride in the thirteenth composite 93 is removed by an appropriate method such as etching or grinding. Dry etching using a carbon fluoride gas plasma or wet etching using hot phosphoric acid may be used for the etching. When the stress layer 15 is removed, two blocks of the SiC composite substrate 10 including the SiC epitaxial growth layer 13 and the SiC polycrystalline growth layer 17 arranged on the C-plane of the SiC epitaxial growth layer 13 are obtained, similar to the ninth composite 89 of the embodiment shown in FIG. 20.

[0127] (Semiconductor Substrate) 13 as a third composite 83, the semiconductor substrate according to the embodiment is configured such that a graphene layer 12 is disposed on the Si surface of a SiC single crystal substrate 11, a SiC epitaxial growth layer 13 is disposed on the graphene layer 12, and a stress layer 14 is further disposed on the SiC epitaxial growth layer 13. The stress layer may be configured of a carbon film such as a polycrystalline diamond film or a diamond-like carbon film, or may be formed of a silicon nitride film.

[0128] The semiconductor substrate of this embodiment has a SiC epitaxial growth layer 13 formed in an atmosphere containing fluorine, such as silicon fluoride or carbon fluoride, and the SiC epitaxial growth layer 13 contains fluorine. In the SiC epitaxial growth according to the conventional technology, nitrogen in the atmosphere is mainly incorporated into the C site of the SiC crystal structure (substituting C for N), and the amount of nitrogen is usually 10 per cubic centimeter. 15 From 10 18 However, in the semiconductor substrate of the embodiment, since fluorine has a higher reactivity with silicon than nitrogen, a part of the nitrogen impurity concentration is replaced with fluorine. The fluorine concentration is approximately 10 per cubic centimeter. 15 From the semiconductor substrate of this embodiment, a SiC composite substrate 10 as shown in FIG. 21 can be obtained according to the method for manufacturing a semiconductor substrate of the embodiment.

[0129] Specifically, as shown in Fig. 14, the stress layer 14 of the third composite 83 is attached to one side of a graphite substrate 19 of a temporary substrate via an adhesive layer 16, or as shown in Fig. 15, the stress layer 14 of the third composite 83 is attached to both sides of the graphite substrate 19 via adhesive layers 16 to form a fifth composite 85. The graphite substrate 19 may be one size larger in external size than the SiC single crystal substrate 11, and may have a glassy carbon coating on its surface. The adhesive layer 16 may be made of a carbon adhesive.

[0130] Taking the fifth composite 85 as an example, after the adhesive layer 16 is cured, as shown in Fig. 16, the SiC epitaxial growth layer 13 is physically peeled off and separated from the interface with the graphene layer 12, and the SiC single crystal substrate 11 and the graphene layer 12 are removed to form a sixth composite 86. Then, as shown in Fig. 18, a SiC polycrystalline growth layer 17 is formed on the C-face of the SiC epitaxial growth layer 13 of the sixth composite 86, and after the outer periphery is ground, the graphite substrate 19, adhesive layer 16, and stress layer 14 of the temporary substrate are removed, whereby a SiC composite substrate 10 is obtained in the upper and lower blocks as in the ninth composite 89 shown in Fig. 20.

[0131] (Semiconductor element) The SiC composite substrate 10 manufactured by the semiconductor substrate manufacturing method according to the embodiment or the SiC composite substrate 10 manufactured from the semiconductor substrate according to the embodiment can be used, for example, in the manufacture of various SiC-based semiconductor elements. In the following, as examples thereof, a SiC-SBD, a SiC trench gate (T: Trench) type TMOSFET, and a SiC planar gate type MOSFET will be described.

[0132] (SiC-SBD) As shown in FIG. 28, the SiC-SBD 20, which is a semiconductor device fabricated using a SiC composite substrate, includes a SiC composite substrate 10 consisting of a SiC polycrystalline growth layer (SiC-poly) 17 and a SiC epitaxial growth layer (SiC-epi) 13. A highly doped layer 13a may be interposed between the SiC polycrystalline growth layer 17 and the SiC epitaxial growth layer 13. The highly doped layer 13a suppresses the spread of a depletion layer in the SiC epitaxial growth layer 13, and easily forms an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C-face of the SiC epitaxial growth layer 13. The SiC epitaxial growth layer 13 serves as a drift layer, the highly doped layer 13a serves as a buffer layer, and the SiC polycrystalline growth layer 17 serves as a substrate layer.

[0133] The SiC polycrystalline growth layer 17 is + type (impurity density is, for example, about 1×10 18 cm -3 From about 1×10 21 cm -3 ) and the SiC epitaxial growth layer 13 is doped with n - type (impurity density is, for example, about 5×10 14 cm -3 From about 5 × 10 16 cm -3 The heavily doped layer 13a is doped to a higher concentration than the SiC epitaxial growth layer 13.

[0134] Furthermore, the SiC epitaxial growth layer 13 may have any one of the crystal structures of 4H-SiC, 6H-SiC, or 2H-SiC.

[0135] As the n-type doping impurity, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. can be used.

[0136] As the p-type doping impurity, for example, B (boron), Al (aluminum) or the like can be used.

[0137] The back surface ((000-1) C surface) of the SiC polycrystalline growth layer 17 is provided with a cathode electrode 21 so as to cover the entire area.

[0138] In addition, a surface 13b (e.g., a (0001) Si surface) of the SiC epitaxial growth layer 13 has a contact hole 23 that exposes a portion of the SiC epitaxial growth layer 13 as an active region 22, and a field insulating film 25 is formed in a field region 24 surrounding the active region 22.

[0139] The field insulating film 25 is made of SiO2 (silicon dioxide), but may be made of other insulators such as silicon nitride (SiN). An anode electrode 26 is formed on the field insulating film 25, and the anode electrode 26 is connected to an anode terminal A.

[0140] A p-type JTE (Junction Termination Extension) structure 27 is formed in the vicinity of the surface 13b (surface layer portion) of the SiC epitaxial growth layer 13 so as to be in contact with the anode electrode 26. The JTE structure 27 is formed along the contour of the contact hole 23 so as to straddle the inside and outside of the contact hole 23 of the field insulating film 25.

[0141] (SiC-TMOSFET) As a semiconductor device fabricated using the SiC composite substrate 10 according to the embodiment, a trench-gate TMOSFET 30 includes the SiC composite substrate 10 including a SiC polycrystalline growth layer 17 and a SiC epitaxial growth layer 13, as shown in FIG. 29. A highly doped layer 13a may be interposed between the SiC polycrystalline growth layer 17 and the SiC epitaxial growth layer 13. The highly doped layer 13a suppresses the spread of a depletion layer in the SiC epitaxial growth layer 13, and easily forms an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C-face of the SiC epitaxial growth layer 13. The SiC epitaxial growth layer 13 serves as a drift layer, the highly doped layer 13a serves as a buffer layer, and the SiC polycrystalline growth layer 17 serves as a substrate layer.

[0142] The SiC polycrystalline growth layer 17 is + type (impurity density is, for example, about 1×10 18 cm -3 From about 1×10 21 cm -3 ) and the SiC epitaxial growth layer 13 is doped with n - type (impurity density is, for example, about 5×10 14 cm -3 From about 5 × 10 16 cm -3 The heavily doped layer 13a is doped to a higher concentration than the SiC epitaxial growth layer 13.

[0143] Furthermore, the SiC epitaxial growth layer 13 may have any one of the crystal structures of 4H-SiC, 6H-SiC, or 2H-SiC.

[0144] As the n-type doping impurity, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. can be used.

[0145] As the p-type doping impurity, for example, B (boron), Al (aluminum) or the like can be used.

[0146] The back surface ((000-1) C surface) of the SiC polycrystalline growth layer 17 is provided with a drain electrode 31 so as to cover the entire area.

[0147] In the vicinity (surface layer portion) of the surface 13b ((0001) Si surface) of the SiC epitaxial growth layer 13, p-type (impurity density is, for example, about 1×10 16 cm -3 From about 1×10 19 cm -3 In the SiC epitaxial growth layer 13, the portion on the SiC polycrystalline growth layer 17 side with respect to the body region 32 is maintained in the state of the SiC epitaxial growth layer 13, and n - The drain region 33(13) is of the type.

[0148] A gate trench 34 is formed in the SiC epitaxial growth layer 13. The gate trench 34 penetrates the body region 32 from the surface 13b of the SiC epitaxial growth layer 13, and its deepest portion reaches the drain region 33 (13).

[0149] A gate insulating film 35 is formed on the inner surface of the gate trench 34 and on the surface 13b of the SiC epitaxial growth layer 13 so as to cover the entire inner surface of the gate trench 34. The inside of the gate insulating film 35 is filled with, for example, polysilicon (polycrystalline silicon), thereby embedding a gate electrode 36 in the gate trench 34. A gate terminal G is connected to the gate electrode 36.

[0150] The surface layer of the body region 32 includes n-type GaN layers that form part of the side surface of the gate trench 34. + A source region 37 is formed.

[0151] The SiC epitaxial growth layer 13 has p + type (impurity density is, for example, about 1×10 18 cm -3 From about 1×10 21 cm -3 ) a body contact region 38 is formed.

[0152] An interlayer insulating film 41 made of SiO2 is formed on the SiC epitaxial growth layer 13. A source electrode 43 is connected to the source region 37 and the body contact region 38 via a contact hole 42 formed in the interlayer insulating film 41. A source terminal S is connected to the source electrode 43.

[0153] By applying a predetermined voltage (a voltage equal to or higher than the gate threshold voltage) to the gate electrode 36 while a predetermined potential difference is generated between the source electrode 43 and the drain electrode 31 (between the source and drain), a channel can be formed in the body region 32 near the interface with the gate insulating film 35 by the electric field from the gate electrode 36. This allows a current to flow between the source electrode 43 and the drain electrode 31, turning the SiC-TMOSFET 30 into an on-state.

[0154] (SiC planar gate MOSFET) As shown in FIG. 30, a planar gate MOSFET 50, which is a semiconductor device fabricated using a SiC composite substrate 10, includes a SiC composite substrate 10 including a SiC polycrystalline growth layer 17 and a SiC epitaxial growth layer 13. A highly doped layer 13a may be interposed between the SiC polycrystalline growth layer 17 and the SiC epitaxial growth layer 13. The highly doped layer 13a suppresses the spread of a depletion layer in the SiC epitaxial growth layer 13, and easily forms an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C-face of the SiC epitaxial growth layer 13. The SiC epitaxial growth layer 13 serves as a drift layer, the highly doped layer 13a serves as a buffer layer, and the SiC polycrystalline growth layer 17 serves as a substrate layer.

[0155] The SiC polycrystalline growth layer 17 is + type (impurity density is, for example, about 1×10 18 cm -3 From about 1×10 21 cm -3 ) and the SiC epitaxial growth layer 13 is doped with n - type (impurity density is, for example, about 5×10 14 cm -3 From about 5 × 10 16 cm -3 ) is doped.

[0156] Furthermore, the SiC epitaxial growth layer 13 may have any one of the crystal structures of 4H-SiC, 6H-SiC, or 2H-SiC.

[0157] As the n-type doping impurity, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. can be used.

[0158] As the p-type doping impurity, for example, B (boron), Al (aluminum) or the like can be used.

[0159] A drain electrode 51 is formed on the back surface ((000-1) C surface) of the SiC composite substrate 10 so as to cover the entire area, and a drain terminal D is connected to the drain electrode 51.

[0160] In the vicinity (surface layer portion) of the surface 13b ((0001) Si surface) of the SiC epitaxial growth layer 13, p-type (impurity density is, for example, about 1×10 16 cm -3 From about 1×10 19 cm -3 The body region 52 of the SiC epitaxial growth layer 13 is formed in a well shape. The portion of the SiC epitaxial growth layer 13 on the SiC composite substrate 10 side with respect to the body region 52 is maintained in the state after the epitaxial growth, i.e., n - The drain region 53(13) is of the type.

[0161] The surface layer of the body region 52 is + A source region 54 of the type is formed in spaced relation to the periphery of the body region 52 .

[0162] Inside the source region 54, p + type (impurity density is, for example, about 1×10 18 cm -3 From about 1×10 21 cm -3 ) is formed in the body contact region 55. The body contact region 55 penetrates the source region 54 in the depth direction and is connected to the body region 52.

[0163] A gate insulating film 56 is formed on the surface 13b of the SiC epitaxial growth layer 13. The gate insulating film 56 covers a portion of the body region 52 surrounding the source region 54 (the peripheral portion of the body region 52) and the outer periphery of the source region 54.

[0164] A gate electrode 57 made of, for example, polysilicon is formed on the gate insulating film 56. The gate electrode 57 faces the peripheral edge of the body region 52 with the gate insulating film 56 interposed therebetween. A gate terminal G is connected to the gate electrode 57.

[0165] An interlayer insulating film 58 made of SiO2 is formed on the SiC epitaxial growth layer 13. A source electrode 62 is connected to the source region 54 and the body contact region 55 via a contact hole 61 formed in the interlayer insulating film 58. A source terminal S is connected to the source electrode 62.

[0166] By applying a predetermined voltage (a voltage equal to or higher than the gate threshold voltage) to the gate electrode 57 while a predetermined potential difference is generated between the source electrode 62 and the drain electrode 51 (between the source and drain), a channel can be formed in the body region 52 near the interface with the gate insulating film 56 by the electric field from the gate electrode 57. This allows a current to flow between the source electrode 62 and the drain electrode 51, turning the planar gate MOSFET 50 on.

[0167] As described above, according to the embodiment, in the step of surface thermal etching A (see FIG. 7), silicon fluoride gas that selectively performs surface thermal etching of silicon (Si) is introduced into the atmosphere. As a result, Si is etched from the SiC surface, and an amorphous carbon layer that serves as a precursor of graphene is formed. Thereafter, by raising the temperature to 1600° C. or higher in the step of surface pyrolysis B (see FIG. 7), the carbon concentration at the surface is further increased by selective Si sublimation, and the amorphous carbon layer formed in advance supplies sufficient carbon during graphene crystallization, thereby forming a graphene layer 12 with low defects. Note that silicon fluoride gas may also be introduced into the atmosphere in the step of surface pyrolysis B.

[0168] In this manner, the embodiment makes it possible to form a graphene layer 12 with fewer defects. Therefore, in the next step of forming a SiC epitaxial growth layer 13 by van der Waals epitaxial growth, it is possible to improve resistance to graphene etching caused by residual air components present in the furnace chamber 211 and decomposition products of a Si precursor.

[0169] It is also possible to perform the surface pyrolysis B step from the beginning without performing the surface thermal etching A step, and to form graphene using silicon fluoride gas in the surface decomposition B step (see FIG. 9). In this case, the surface thermal etching A step is unnecessary and the surface pyrolysis B step is sufficient, so that the number of steps is reduced and the manufacturing cost is also reduced.

[0170] In the embodiment, since an inert gas, Ar gas, is used as a carrier gas in forming the SiC epitaxial growth layer 13 by the van der Waals epitaxial growth method, there is a concern that parasitic deposition may occur on the furnace wall 211 of the reaction furnace 210, and that the formation of gas phase nuclei and particles may increase, resulting in a deterioration in the crystal quality of the SiC epitaxial growth layer 13. However, silicon fluoride gas used as a material gas for silicon (Si) in the van der Waals epitaxial growth method in the embodiment has a property of strongly reacting with and removing Si, and therefore can strongly suppress the parasitic deposition and the increase in the formation of gas phase nuclei and particles.

[0171] In the embodiment, silicon fluoride gas is used as the Si material gas of the SiC epitaxial growth layer 13 by the van der Waals epitaxial growth method, and hydrocarbon gas is used as the C material gas. Among these, silicon fluoride gas hardly reacts with C, but when silicon fluoride gas coexists, there is a reaction path in which hydrogen fluoride (HF), which shows a weak reaction with graphene, is generated as a secondary reaction of the decomposition product. However, fluorine (F, F2) liberated by decomposition from silicon fluoride gas has a stronger reactivity with Si, so that, in general, etching of graphene can be suppressed by using silicon fluoride gas as the Si material gas, as compared with the case where silane (SiH4) or dichlorosilane (Si2H2Cl2) is used. Note that, as the C material gas, fluorocarbon gas may be used together with or instead of hydrocarbon gas, and in that case, etching of graphene can be suppressed similarly.

[0172] According to the embodiment, before forming SiC polycrystalline growth layer 17 by CVD, SiC single crystal substrate 11 is separated and replaced with a temporary substrate made of highly heat-resistant graphite substrate 19, thereby preventing unwanted adhesion of polycrystalline SiC to SiC single crystal substrate 11 and maximizing the reusability of SiC single crystal substrate 11, enabling further cost reduction.

[0173] In the embodiment, the stress layer 14 is formed of a carbon-based film (polycrystalline diamond film or diamond-like carbon film), and in the modified example, the stress layer 15 is formed of a silicon nitride film, so that the SiC epitaxial growth layer 13 can be easily peeled off from the graphene layer 12 by utilizing the internal stress and thermal stress of the film. This also makes it possible to avoid metal contamination, which is a problem when using a metal stressor film. The carbon-based film or silicon nitride film has the advantages of good adhesion to the base, excellent heat resistance, and the ability to obtain large stress.

[0174] According to the embodiment, by making the graphite substrate 19 one size larger than the SiC single crystal substrate 11, it becomes possible to perform single-sided or double-sided epitaxial growth using an epitaxial growth apparatus such as a batch-type vertical tubular furnace, and high throughput and low-cost production can be realized without unduly increasing the growth rate. In addition, the graphite substrate 19 and the carbonized adhesive layer 16 can be removed at low cost simply by firing them in an oxidation furnace or the like.

[0175] According to the embodiment, van der Waals epitaxial growth of SiC is performed via graphene formed on a SiC single crystal substrate, and a SiC polycrystalline growth layer is formed directly thereon by CVD, which eliminates the need for substrate bonding and eliminates defects caused by substrate bonding. In addition, since the epitaxial growth layer is formed via graphene, the SiC single crystal substrate and the epitaxial growth layer can be easily separated, simplifying the process, and eliminating the need for expensive processes such as ion implantation delamination.

[0176] According to the embodiment, after the SiC single crystal substrate is removed, the highly heat-resistant handle substrate is placed in a high-temperature LP-CVD apparatus, and a SiC polycrystalline growth layer is grown directly on the epitaxial growth layer. This eliminates the steps of transporting the epitaxial growth layer having a thickness of several μm from the handle substrate to a support substrate and bonding the epitaxial growth layer to the support substrate, thereby making it possible to avoid defects such as wrinkles, crystal transitions, and voids caused by thin film transportation and bonding.

[0177] According to the embodiment, the graphene layer formed on the SiC single crystal substrate 11 is not transferred, but epitaxial growth is performed directly on the graphene layer. This makes it possible to avoid defects such as wrinkles and cracks caused by the transfer of graphene.

[0178] According to the embodiment, since the SiC single crystal substrate 11 is used as a base, hexagonal SiC with little deterioration in crystallinity can be obtained. In addition, the SiC single crystal substrate 11 is expensive and difficult to remove by polishing or etching, but by using van der Waals epitaxial growth via the graphene layer 12, the obtained SiC epitaxial growth layer 13, which is a high-performance single crystal, can be easily separated, making removal by polishing or etching unnecessary. Since the expensive SiC single crystal substrate 11 can be reused after separation, a large cost advantage can be obtained.

[0179] Although the embodiment has been described above, it is also possible to carry out the present invention in other forms. For example, although not shown in the drawings, it is also possible to manufacture a MOS capacitor using the SiC composite substrate 10. In the MOS capacitor, the yield and reliability can be improved.

[0180] Although not shown in the drawings, a bipolar transistor can also be manufactured using the SiC composite substrate 10. In addition, the SiC composite substrate 10 according to the embodiment can also be used to manufacture SiC-pn diodes, SiCIGBTs, SiC complementary MOSFETs, etc. The SiC composite substrate 10 can also be applied to other types of devices such as LEDs (light emitting diodes) and semiconductor optical amplifiers (SOAs).

[0181] The SiC epitaxial growth layer 13 may include at least one type or a plurality of types selected from the group consisting of Group IV element semiconductors, Group III-V compound semiconductors, and Group II-VI compound semiconductors.

[0182] Furthermore, the SiC composite substrate 10 and the SiC epitaxial growth layer 13 may be made of any one of 4H-SiC, 6H-SiC, and 2H-SiC materials.

[0183] Furthermore, the SiC single crystal substrate 11 and the SiC epitaxial growth layer 13 may comprise, as a material other than SiC, at least one selected from the group consisting of GaN, BN, AlN, Al2O3, Ga2O3, diamond, carbon, and graphite.

[0184] A semiconductor device including the SiC composite substrate 10 may include any of GaN-, AlN-, and gallium oxide-based IGBTs, diodes, MOSFETs, and thyristors other than SiC-based.

[0185] A semiconductor device including a SiC composite substrate 10 may have any of the following configurations: a one-in-one module, a two-in-one module, a four-in-one module, a six-in-one module, a seven-in-one module, an eight-in-one module, a twelve-in-one module, or a fourteen-in-one module.

[0186] According to the SiC composite substrate 10, for example, a low-cost SiC polycrystalline growth layer 17 can be used as the substrate material instead of the high-cost SiC single crystal substrate 11.

[0187] (Appendix 1) The method for manufacturing the semiconductor substrate includes the steps of forming a graphene layer 12 on the Si surface of the SiC single crystal substrate 11, forming a SiC epitaxial growth layer 13 on the graphene layer 12, forming a stress layer 14 on the SiC epitaxial growth layer 13, attaching a graphite substrate 19 of a temporary substrate on the stress layer 14, peeling the graphene layer 12 and the SiC epitaxial growth layer 13, forming a SiC polycrystalline growth layer 17 on the C surface of the SiC epitaxial growth layer 13 from which the graphene layer 12 has been peeled off, and removing the graphite substrate 19. At least one of the steps of forming the graphene layer 12 and the step of forming the SiC epitaxial growth layer 13 is performed in an atmosphere containing fluorine. By subjecting the SiC single crystal substrate 1 to thermal surface etching and thermal surface decomposition in an atmosphere containing fluorine, a high-quality graphene layer 12 can be formed. Furthermore, since the generation of silicon carbide does not progress easily in an atmosphere containing fluorine, a high-quality SiC epitaxial growth layer 13 can be formed.

[0188] (Appendix 2) In the method for manufacturing a semiconductor substrate described in Appendix 1, the step of forming graphene layer 12 on the Si face of the SiC single crystal substrate includes a step of containing silicon fluoride gas in an atmosphere and pyrolyzing the surface of the Si face of the SiC single crystal substrate 11 in the atmosphere containing silicon fluoride gas to form graphene layer 12. By pyrolyzing the Si face, sublimating silicon, and crystallizing carbon, a high-quality graphene layer 12 can be formed.

[0189] (Appendix 3) In the method for manufacturing a semiconductor substrate according to Appendix 2, the silicon fluoride gas contains at least one of silicon tetrafluoride, disilicon hexafluoride, and trisilicon octafluoride. The silicon fluoride gas has high reactivity with silicon but low reactivity with graphene.

[0190] (Appendix 4) The method for manufacturing a semiconductor substrate according to appendix 2 or 3 includes a step of surface thermally etching the Si face of SiC single crystal substrate 11 in an atmosphere containing silicon fluoride gas prior to a step of surface pyrolysis of the Si face of SiC single crystal substrate 11 to form graphene layer 12. By etching silicon on the Si face to make the surface carbon-rich, the quality of graphene layer 12 can be improved.

[0191] (Appendix 5) In the method for manufacturing a semiconductor substrate according to any one of Supplementary Note 1 to 4, in the step of forming the SiC epitaxial growth layer 13, the atmosphere contains a silicon fluoride gas and at least one of a hydrocarbon gas and a carbon fluoride gas, and the SiC epitaxial growth layer 13 is grown from the atmosphere. A material gas is supplied to the SiC epitaxial growth layer 13.

[0192] (Appendix 6) In the method for manufacturing a semiconductor substrate described in appendix 5, the silicon fluoride gas contains at least one of silicon tetrafluoride, disilicon hexafluoride, and trisilicon octafluoride. The silicon fluoride gas can be set according to the uniform heating length of the reactors 210 and 220, etc.

[0193] (Appendix 7) In the method for manufacturing a semiconductor substrate according to claim 5 or 6, the hydrocarbon gas contains at least one of methane, ethane, propane, ethylene, and acetylene. Carbon can be supplied to the SiC epitaxial growth layer 13. (Appendix 8) In the method for manufacturing a semiconductor substrate according to any one of claims 5 to 7, the fluorocarbon gas contains at least one of tetrafluoromethane, hexafluoroethane, octafluoropropane, fluoroethylene, and fluoroacetylene. Carbon can be supplied to the SiC epitaxial growth layer 13.

[0194] (Appendix 9) In the method for manufacturing a semiconductor substrate according to any one of claims 1 to 8, the fluorine-containing atmosphere further contains an inert gas. The inert gas can be used as a carrier gas.

[0195] (Appendix 10) In the method for manufacturing a semiconductor substrate according to claim 9, the inert gas is argon gas. Argon gas is easily available.

[0196] (Appendix 11) In the method for manufacturing a semiconductor substrate according to any one of Supplementary Note 1 to 10, the step of forming the graphene layer 12 forms a graphene buffer layer or a single graphene layer 12. The graphene layer 12 is suitable for a van der Waals epitaxial growth method.

[0197] (Appendix 12) In the method for manufacturing a semiconductor substrate according to any one of claims 1 to 11, the stress layer 14 includes a carbon film or a silicon nitride film. Since the stress layer 14 does not include metal, it does not cause metal contamination.

[0198] (Appendix 13) In the method for manufacturing a semiconductor substrate according to claim 12, the carbon film includes a polycrystalline diamond film or a diamond-like carbon film, which is suitable for generating stress.

[0199] (Appendix 14) In the method for manufacturing a semiconductor substrate according to any one of claims 1 to 13, the graphite substrate 19 of the temporary substrate contains graphite. The graphite substrate 19 can be removed by burning.

[0200] (Appendix 15) In the method for manufacturing a semiconductor substrate described in Appendix 14, the graphite substrate 19 serving as a temporary substrate has an outer size larger than that of the SiC single crystal substrate 11. When the substrates are inserted into the wafer boat grooves of a batch-type vertical CVD furnace and aligned, the marks of the wafer boat supports can be positioned outside the effective substrate area.

[0201] (Appendix 16) In the method for manufacturing a semiconductor substrate described in appendix 14 or 15, the graphite substrate 19 of the temporary substrate includes a glassy carbon coating formed on the surface. The glassy carbon coating has a strong adhesive force with the carbon adhesive of the adhesive layer 16.

[0202] (Appendix 17) In the method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 14 to 16, the step of removing the graphite substrate 19 of the temporary substrate removes the graphite substrate 19 by burning it. The graphite substrate 19 can be removed by burning it in an air atmosphere or the like.

[0203] (Appendix 18) In the method for manufacturing a semiconductor substrate described in Appendix 14, in the step of attaching the graphite substrate 19, which is a temporary substrate, onto the stress layer 14, the stress layer 14 and the graphite substrate 19 are attached via an adhesive layer 16 made of a carbon adhesive. The carbon adhesive has a strong adhesive force, and by carbonizing it, the adhesive force can be maintained even at high temperatures.

[0204] (Appendix 19) The method for producing a semiconductor substrate described in Appendix 18 further includes a step of burning and removing the adhesive layer 16. The adhesive layer 16 can be burned and removed together with the graphite substrate 19 in an air atmosphere or the like.

[0205] (Appendix 20) The method for manufacturing a semiconductor substrate according to any one of appendices 1 to 19 further includes, prior to the step of removing the graphite substrate 19 of the temporary substrate, a step of grinding and removing the SiC polycrystalline growth layer 17 and the graphite substrate 19 protruding from the periphery of the composite including the graphite substrate 19, the stress layer 14, and the SiC epitaxial growth layer 13 in the step of forming the SiC polycrystalline growth layer 17, thereby exposing the periphery of the graphite substrate 19. By exposing the graphite substrate 19, it becomes possible to burn it.

[0206] (Appendix 21) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 1 to 20 further includes a step of forming a highly-doped layer 13a having a higher impurity concentration than the SiC epitaxial growth layer 13 on a C-face of the SiC epitaxial growth layer 13 that is in contact with the SiC polycrystalline substrate 17. The highly-doped layer 13a suppresses the spread of a depletion layer in the SiC epitaxial growth layer 13, and easily forms an ohmic contact with the SiC polycrystalline growth layer 7 formed on the C-face of the SiC epitaxial growth layer 13.

[0207] (Appendix 22) The semiconductor manufacturing apparatus includes reactors 210, 220 for forming a graphene layer 12 on a SiC single crystal substrate 11 according to the semiconductor substrate manufacturing method described in any one of Supplementary Notes 2 to 4. The graphene layer 12 can be formed in an atmosphere containing fluorine.

[0208] (Appendix 23) The semiconductor manufacturing apparatus includes reactors 210, 220 for forming a SiC epitaxial growth layer on a SiC single crystal substrate 11 via a graphene layer 12 according to the method for manufacturing a semiconductor substrate described in any one of Supplementary Notes 5 to 8. The SiC epitaxial growth layer 13 can be formed in an atmosphere containing fluorine.

[0209] (Appendix 24) The semiconductor manufacturing apparatus described in Supplementary Note 22 or 23 can store a plurality of SiC single crystal substrates 11 supported in a stack in the reactor 210. A plurality of SiC single crystal substrates 11 can be processed in a batch manner.

[0210] (Appendix 25) In the semiconductor manufacturing apparatus described in Supplementary Note 22 or 23, a plurality of SiC single crystal substrates 11 can be placed on table 225 of modified reactor 220. A plurality of SiC single crystal substrates 11 can be processed in a semi-batch manner.

[0211] (Appendix 26) The semiconductor substrate includes a SiC single crystal substrate 11, a graphene layer 12 disposed on the Si face of the SiC single crystal substrate 11, a SiC epitaxial growth layer 13 disposed above the SiC single crystal substrate via the graphene layer 12, and a stress layer 14 disposed on the Si face of the SiC epitaxial growth layer 13, and the SiC epitaxial growth layer 13 contains fluorine. The SiC epitaxial growth layer 13 was formed with high quality in an atmosphere containing fluorine.

[0212] (Appendix 27) The stress layer 14 of the semiconductor substrate described in Appendix 26 includes a carbon film or a silicon nitride film. Since it does not include metal, it does not cause metal contamination.

[0213] (Appendix 28) The semiconductor device is a SiC composite substrate formed from the semiconductor substrate described in Appendix 26 or 27, in which a SiC polycrystalline growth layer is formed on the Si face of a SiC epitaxial growth layer, and a semiconductor element structure is formed on the C face of the SiC epitaxial growth surface of the SiC composite substrate. By using the low-cost, high-quality SiC composite substrate 10, a low-cost, high-quality semiconductor device can be provided.

[0214] (Appendix 29) In the semiconductor device described in Appendix 28, the semiconductor element includes at least one of a SiC Schottky barrier diode, a SiC-MOSFET, a SiC bipolar transistor, a SiC diode, a SiC thyristor, and a SiC insulated gate bipolar transistor. Various useful SiC-based semiconductor elements can be provided.

[0215] (Other embodiments) As described above, several embodiments have been described, but the descriptions and drawings forming part of the disclosure are illustrative and should not be understood as limiting. From this disclosure, various alternative embodiments, examples and operating techniques will become apparent to those skilled in the art. Thus, the embodiments include various embodiments not described herein. [Industrial Applicability]

[0216] The present disclosure can be used in various semiconductor module technologies, such as IGBT modules, diode modules, and MOS modules (SiC, GaN, AlN, gallium oxide), and can be applied to a wide range of application fields, such as power modules for inverter circuits that drive electric motors used as power sources for electric vehicles (including hybrid vehicles), trains, industrial robots, etc., and power modules for inverter circuits that convert power generated by solar cells, wind turbines, and other power generation devices (especially private power generation devices) into power from commercial power sources. [Explanation of symbols]

[0217] 10 SiC composite substrate 11 SiC single crystal substrate 12 Graphene layers 13. SiC epitaxial growth layer 14 Stress Layer 16 Adhesive layer 17 SiC polycrystalline growth layer 19 Graphite Substrate

Claims

1. forming a graphene layer on a Si surface of a SiC single crystal substrate; forming a SiC epitaxial growth layer on the graphene layer; forming a stress layer on the SiC epitaxial growth layer; attaching a temporary substrate onto the stress layer; peeling off the graphene layer and the SiC epitaxial growth layer; forming a SiC polycrystalline growth layer on a C-face of the SiC epitaxial growth layer from which the graphene layer has been peeled off; removing the temporary substrate; Including, At least one of the steps of forming the graphene layer and forming the SiC epitaxial growth layer is performed in an atmosphere containing fluorine.

2. 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the step of forming a graphene layer on a Si face of the SiC single crystal substrate includes a step of: containing a silicon fluoride gas in the atmosphere; and forming the graphene layer by surface pyrolysis of the Si face of the SiC single crystal substrate in an atmosphere containing the silicon fluoride gas.

3. 3. The method for manufacturing a semiconductor substrate according to claim 2, wherein the silicon fluoride gas contains at least one of silicon tetrafluoride, silicon hexafluoride, and trisilicon octafluoride.

4. 3. The method for producing a semiconductor substrate according to claim 2, further comprising the step of surface thermally etching the Si-face of the SiC single crystal substrate in an atmosphere containing the silicon fluoride gas before the step of forming the graphene layer by surface pyrolysis of the Si-face of the SiC single crystal substrate.

5. 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein in the step of forming the SiC epitaxial growth layer, the atmosphere contains a silicon fluoride gas and at least one of a hydrocarbon gas and a carbon fluoride gas, and the SiC epitaxial growth layer is grown from the atmosphere.

6. 6. The method for manufacturing a semiconductor substrate according to claim 5, wherein the silicon fluoride gas contains at least one of silicon tetrafluoride, silicon hexafluoride, and trisilicon octafluoride.

7. 6. The method for manufacturing a semiconductor substrate according to claim 5, wherein the hydrocarbon gas includes at least one of methane, ethane, propane, ethylene, and acetylene.

8. 6. The method for manufacturing a semiconductor substrate according to claim 5, wherein the fluorocarbon gas includes at least one of tetrafluoromethane, hexafluoroethane, octafluoropropane, fluoroethylene, and fluoroacetylene.

9. The method for manufacturing a semiconductor substrate according to claim 1 , wherein the fluorine-containing atmosphere further contains an inert gas.

10. 10. The method for manufacturing a semiconductor substrate according to claim 9, wherein the inert gas is argon gas.

11. The method for manufacturing a semiconductor substrate according to claim 1 , wherein the step of forming the graphene layer forms a graphene buffer layer or a single graphene layer.

12. The method for manufacturing a semiconductor substrate according to claim 1 , wherein the stress layer includes a carbon film or a silicon nitride film.

13. The method for manufacturing a semiconductor substrate according to claim 12 , wherein the carbon film includes a polycrystalline diamond film or a diamond-like carbon film.

14. The method for manufacturing a semiconductor substrate according to claim 1 , wherein the temporary substrate includes graphite.

15. The method for manufacturing a semiconductor substrate according to claim 14 , wherein the temporary substrate has an outer size larger than that of the SiC single crystal substrate.

16. The method for manufacturing a semiconductor substrate according to claim 14 , wherein the temporary substrate includes a glassy carbon coating formed on a surface thereof.

17. The method for manufacturing a semiconductor substrate according to claim 14 , wherein the step of removing the temporary substrate comprises burning the temporary substrate to remove it.

18. The method for manufacturing a semiconductor substrate according to claim 14 , wherein the step of attaching the temporary substrate onto the stress layer includes attaching the stress layer and the temporary substrate via an adhesive layer made of a carbon adhesive.

19. The method for manufacturing a semiconductor substrate according to claim 18, further comprising the step of burning off the adhesion layer.

20. 2. The method for manufacturing a semiconductor substrate according to claim 1, further comprising the step of grinding and removing the SiC polycrystalline growth layer and the temporary substrate that protrude to the outer periphery of a composite including the temporary substrate, the stress layer, and the SiC epitaxial growth layer in the step of forming the SiC polycrystalline growth layer, to expose the outer periphery of the temporary substrate, prior to the step of removing the temporary substrate.

21. 2. The method for manufacturing a semiconductor substrate according to claim 1, further comprising the step of forming a highly doped layer having a higher impurity concentration than the SiC epitaxial growth layer on a C-face of the SiC epitaxial growth layer in contact with the SiC polycrystalline growth layer.

22. A semiconductor manufacturing apparatus comprising a reactor for forming the graphene layer on the SiC single crystal substrate according to the method for manufacturing a semiconductor substrate according to claim 2.

23. 6. A semiconductor manufacturing apparatus comprising: a reactor for forming the SiC epitaxial growth layer on the SiC single crystal substrate via the graphene layer, according to the method for manufacturing a semiconductor substrate according to claim 5.

24. 24. The semiconductor manufacturing apparatus according to claim 22 or 23, wherein a plurality of the SiC single crystal substrates supported in a stacked manner can be stored in the reaction furnace.

25. 24. The semiconductor manufacturing apparatus according to claim 22 or 23, wherein a plurality of the SiC single crystal substrates can be placed on a table of the reaction furnace.

26. A SiC single crystal substrate; A graphene layer disposed on a Si surface of the SiC single crystal substrate; a SiC epitaxial growth layer disposed above the SiC single crystal substrate via the graphene layer; a stress layer disposed on the Si surface of the SiC epitaxial growth layer; Including, The SiC epitaxial growth layer is a semiconductor substrate containing fluorine.

27. 27. The semiconductor substrate of claim 26, wherein the stress layer includes a carbon film or a silicon nitride film.

28. A semiconductor device in which a semiconductor element structure is formed on the C surface of a SiC epitaxial growth layer of a SiC composite substrate formed from the semiconductor substrate according to claim 26 or 27, in which a SiC polycrystalline growth layer is formed on the Si surface of a SiC epitaxial growth layer.

29. 29. The semiconductor device according to claim 28, wherein the semiconductor element includes at least one of a SiC Schottky barrier diode, a SiC MOSFET, a SiC bipolar transistor, a SiC diode, a SiC thyristor, and a SiC insulated gate bipolar transistor.

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