Semiconductor processing tool with improved performance using hybrid learning model
A hybrid model combining statistical and physical models optimizes semiconductor process recipes, addressing the challenges of large process spaces and chamber drift, improving efficiency and yield in semiconductor manufacturing.
Patent Information
- Application Number
- JP2024174680
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-07-30
- Filing Date
- 2024-10-04
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2041-07-14
AI Technical Summary
The development of semiconductor process recipes is time-consuming and resource-intensive due to the large theoretical process space and complex interactions between processing parameters, requiring extensive experimental plans and chamber adjustments to achieve desired wafer results, while chamber drift and parameter fluctuations complicate the process.
A hybrid model combining statistical and physical models is used to predict and optimize process recipes, reducing the need for extensive experimental plans and chamber drift adjustments, enabling efficient recipe development and chamber-based line optimization.
This approach reduces downtime, decreases reliance on manual monitoring, enhances process control and uniformity, improves yield, and facilitates automatic tool health monitoring, while allowing for continuous recipe updates and efficient chamber maintenance.
Smart Images

Figure 2025013820000001_ABST
Abstract
Description
[Technical field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Non-provisional Patent Application No. 16 / 944,012, filed July 30, 2020, the entire contents of which are incorporated herein by reference.
[0002] Embodiments of the present disclosure relate to the field of semiconductor processing, and more particularly, to using a hybrid model of a semiconductor manufacturing process that includes a statistical model and a physical model for recipe development and chamber baselining. [Background technology]
[0003] As semiconductor devices continue to evolve toward smaller feature sizes, semiconductor wafer processing becomes more and more complex. A given process can include many different processing parameters (i.e., knobs) that can be individually controlled to produce a desired result on the wafer. For example, the desired result on the wafer can refer to the feature profile, the thickness of a layer, the chemical composition of a layer, etc. As the number of knobs increases, the theoretical process space available to tune and optimize the process becomes very large.
[0004] To develop a process recipe for high volume manufacturing (HVM), a process engineer relies on experience and expertise to identify a baseline recipe that can provide a rough approximation of the desired results on the wafer. A Design of Experiments (DoE) is then developed around the baseline recipe. The DoE relies on processing a set of wafers (or coupons) to identify how the knobs interact with each other to produce the results on the wafer. The results of the DoE can be interpreted by the process engineer to further refine the baseline recipe. Additional DoE may be performed to further focus on the desired results on the wafer. Such an iterative process is time and resource intensive.
[0005] In addition, after a final processing recipe is developed, chamber drift during many iterations of the process on different wafers can result in changes in the results on the wafer. Chamber drift can be the result of erosion of consumable parts of the chamber, degradation of components (e.g., sensors, lamps, etc.), deposition of by-product films covering surfaces, etc. Thus, additional tuning is required even after an extensive recipe development process. Summary of the Invention
[0006] Embodiments disclosed herein include a semiconductor manufacturing tool having a hybrid model and a method of using the hybrid model to process wafers and / or develop a process recipe. In one embodiment, a method for developing a semiconductor manufacturing process recipe includes selecting one or more device results and querying the hybrid model to obtain a process recipe recommendation suitable for obtaining the device results. In one embodiment, the hybrid process model includes a statistical model and a physical model. In one embodiment, the method can further include performing a design of experiments (DoE) on a set of wafers to validate a process recipe recommended by the hybrid process model.
[0007] In an additional embodiment, a method for baseline-based a chamber performing a semiconductor manufacturing process is provided. In one embodiment, the method includes performing a limited design of experiments (DoE) of a wafer using external metrology to baseline chamber performance. The embodiment may further include adding wafer results and metrology data from the limited DoE to a hybrid model as a calibration data set. In one embodiment, the hybrid model includes a statistical model and a physical model. In one embodiment, the method further includes adjusting predictions of the model to account for specific chamber and / or wafer conditions identified by the limited DoE. In one embodiment, the method further includes predicting optimized process parameters to achieve a desired wafer outcome for a wafer processed in the chamber.
[0008] In an additional embodiment, a method is provided for processing a wafer at a processing tool. In one embodiment, the method includes providing a hybrid model of the processing tool. In one embodiment, the hybrid model includes a statistical model and a physical model. In one embodiment, the method further includes executing a recipe at the processing tool to process a first wafer, obtaining wafer data from the first wafer after execution of the recipe, and obtaining process data from the processing tool associated with execution of the recipe. In one embodiment, the method further includes providing the wafer data and the process data to the hybrid model to create an updated hybrid model, and using the updated hybrid model to create a modified recipe to account for chamber drift of the processing tool. In one embodiment, the method further includes executing the modified recipe at the processing tool to process a second wafer.
[0009] The embodiment may further include a non-transitory computer readable medium including instructions that, when executed by a processor, cause the processor to perform operations for developing a semiconductor manufacturing process recipe. In one embodiment, the operations may include selecting one or more device results on a wafer to be processed and querying a hybrid model to obtain a process recipe recommendation suitable for obtaining the device results. In one embodiment, the hybrid model includes a statistical model and a physical model. In one embodiment, the process may further include performing a design of experiments (DoE) on a set of wafers to verify a process recipe recommended by the hybrid process model. In one embodiment, performing the DoE includes measuring the DoE wafer results with a metrology tool and determining from the DoE wafer results whether the desired device results are achieved. [Brief description of the drawings]
[0010] [Figure 1A] FIG. 1 is a schematic diagram of a hybrid model including a statistical model and a physical model, according to one embodiment. [Figure 1B] 1 is a schematic diagram of a processing tool including a hybrid model, according to one embodiment. [Figure 2A] 1 is a flow diagram illustrating a process for developing a hybrid model in which a statistical model and a physical model are inputs to a hybrid model engine, according to one embodiment. [Figure 2B] 1 is a flow diagram illustrating a process for developing a hybrid model in which a physical model is input to a statistical model engine, according to one embodiment. [Diagram 3] 1 is a chart illustrating a two-dimensional representation of a multi-dimensional process space provided by a hybrid model, according to one embodiment. [Figure 4] 1 is a flow diagram illustrating a process for developing a process recipe using a hybrid model, according to one embodiment. [Diagram 5]1 is a flow diagram illustrating a process for baseline a chamber using a hybrid model, according to one embodiment. [Figure 6] FIG. 1 is a block diagram of an exemplary computer system according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] A method is described herein for using a hybrid model of a semiconductor manufacturing process including a statistical model and a physical model for recipe development and chamber baselining. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure. It will be apparent to those skilled in the art that the embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known aspects, such as integrated circuit manufacturing, are not described in detail so as not to unnecessarily obscure the embodiments of the present disclosure. Furthermore, it should be understood that the various embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.
[0012] As mentioned above, recipe development and chamber baselining are time and resource intensive. In particular, the process space available for tuning and optimizing a given process is extremely large, and it is virtually impossible to empirically explore the entire process space within a reasonable time frame. Furthermore, due to the interactions between process parameters and their influence on process performance, the combined effect of simultaneous variations of multiple process parameters is extremely difficult to predict by manually scanning one process parameter at a time.
[0013] Thus, the embodiments disclosed herein leverage the use of a hybrid model to query the entire process space without the need to process physical wafers in a large Design of Experiments (DoE). Hence, the time and resources dedicated to recipe development can be significantly reduced. In addition, the hybrid model may be updated while the wafer is being processed in the chamber. The updated hybrid model can provide accurate tracking of chamber drift, allowing revisions to be made to the process recipe without extensive DoE of physical wafers or relying solely on the experience and knowledge of the process engineer. Thus, the use of a hybrid model according to the embodiments disclosed herein provides at least the following advantages: 1) reduced unscheduled downtime of the tool, 2) reduced reliance on calibration or monitoring wafers, 3) tighter process control and better uniformity, repeatability, and yield, 4) less scrap, 5) improved chamber matching, 6) enables automatic tool health monitoring, and 7) improved recovery from planned maintenance (PM).
[0014] As used herein, "process space" can refer to a multi-dimensional process space that maps processing parameters to one or more device results on a wafer. Processing parameters, sometimes called knobs, are variables that can be controlled to control a process. For example, knobs can include pressure, process gas flow rate, temperature, RF source power, bias power, etc. Device results can refer to measurable characteristics of features on a wafer after processing. For example, device results can include feature profile, layer thickness, thickness uniformity, material composition of a layer, composition uniformity, porosity, film stress, etc. In an embodiment, device results can also refer to process uniformity across chambers in a facility (e.g., chamber matching), wafer-to-wafer uniformity, uniformity between different wafer lots, etc. That is, device results are not limited to results on a single wafer. Each point in the process space can be a representation of a set of processing parameter values and a resulting device result (or results) produced by the set of processing parameters.
[0015] In one embodiment, the hybrid model can include a statistical model and a physical model. The statistical model can be built using DoE of actual wafers to populate a portion of the process space. An algorithm can then be used to extrapolate the remaining portion of the process space. The physical model is based on real physical and chemical interactions that occur in the process chamber. A simulation of the physical and chemical interactions in the process chamber over a range of different process parameters can be used to create the physical model. In one embodiment, the physical model is combined with the statistical model to provide a hybrid model. For example, the physical model can be used to fill in the gaps of the statistical model and / or to confirm the extrapolated data points.
[0016] In one embodiment, the hybrid model can be used for process recipe development and / or for chamber baselining to account for chamber drift. For process recipe development, the hybrid model is queried to select a baseline recipe instead of relying solely on the skills and knowledge of the process engineer. The baseline recipe provided by the hybrid model will produce device results that closely approximate the desired device results. Therefore, a small DoE to confirm the baseline recipe is sufficient to validate the process recipe predicted by the hybrid model.
[0017] In the case of chamber baselining, the hybrid model can be updated using a calibration data set obtained from a processed wafer. The calibration data set can include metrology data and / or other device results collected during or after processing of the wafer. The updated hybrid model can then be queried to select a modified process recipe that accounts for chamber drift to produce the desired device results on the subsequently processed wafer. Hence, chamber baselining is a powerful tool for providing chamber mapping. That is, the chamber baselining process (e.g., updating the hybrid model using the calibration data set) allows the current chamber conditions to be accurately accounted for in the processing of the wafer. In addition, baselining can also be useful to account for wafer-to-wafer differences. For example, wafers between lots (or even within a single lot) may differ (e.g., due to non-uniformity of previous processing). By updating the hybrid model using the baselining process, the wafer-to-wafer variations can be accounted for to provide the desired device results.
[0018] The hybrid models disclosed herein can be used in semiconductor manufacturing processes. For example, the hybrid models can be used to provide recipe development and / or chamber baselining for etching processes, deposition processes, cleaning processes, planarization processes, etc. Processes investigated using the hybrid models can include plasma processes, thermal processes, wet chemical processes, or any other processes. In one embodiment, the processing tools modeled using the hybrid models can include plasma chambers, vacuum chambers, thermal chambers, etc.
[0019] In a particular embodiment, the hybrid model is used to study oxidation processes such as radical oxidation processes, in which process parameters can include, but are not limited to, pressure, flow rate of process gases, temperature, and soak time, and device results that are controlled in radical oxidation processes can include, but are not limited to, oxide thickness, thickness uniformity across the wafer, material composition of the oxide, material composition uniformity, and oxide layer profile.
[0020] 1A, a schematic diagram of a hybrid model server 120 is shown according to one embodiment. In one embodiment, the hybrid model server 120 may include a statistical model 125 and a physical model 127. The statistical model 125 and the physical model 127 may be communicatively coupled to a database 130 for storing input data (e.g., sensor data, model data, metric data, etc.) used to build and / or update the statistical model 125 and the physical model 127.
[0021] In one embodiment, the statistical model 125 can be developed from the physical DoE and use interpolation to provide an extended process space model. The physical wafers being processed can be used to map process parameters to specific device outcomes. The physical DoE can also be used to identify interactions between different process parameters. After the data of the physical wafers (e.g., metrology data, sensor data, process parameter data, etc.) is provided, interpolation is used to fill the gaps in the process space. In one embodiment, data such as metrology data can be obtained using an external tool communicatively coupled to the hybrid model server 120 by a data link (e.g., wired or wireless data link). The interpolation can be performed using one or more suitable algorithms. The algorithms can include, but are not limited to, neural networks, deep learning, or other known techniques used for regression analysis (e.g., linear, partial least squares, Gaussian, polynomial, convolutional neural networks for regression, regression trees, etc.).
[0022] In one embodiment, the statistical model 125 may be provided as a module that is sold or licensed for use with a processing tool. That is, the physical DoE for the statistical model 125 may be performed by the processing tool manufacturer. In other embodiments, the statistical model 125 may be created by performing a physical DoE on-site. In yet another embodiment, a generic statistical model 125 may be provided by the tool manufacturer, and subsequent physical DoE may be performed on-site to calibrate the statistical model 125 so that it more closely models the particular processing tool being investigated.
[0023] In one embodiment, the physical model 127 may be created using real-world physics and chemical relationships. For example, the physics and chemistry equations of various interactions within a process chamber may be used to construct the physical model. The physical model 127 may also utilize chamber geometry or other chamber configurations to improve the accuracy of the physical model 127. The physical model 127 may be the result of a simulation of the physical and chemical interactions within a process tool across multiple different process parameters. The physical model 127 may be a module that is sold or licensed for use with a process tool.
[0024] In one embodiment, the physical model 127 and the statistical model 125 can reference each other (as indicated by the arrows). The cross-referencing between the two models 127 and 125 allows for validating each of the models and filling in gaps in the individual models. In one embodiment, the physical model 127 and the statistical model 125 can be combined to provide a more robust hybrid model.
[0025] 1B, a schematic diagram of a processing tool 100 is shown according to one embodiment. As shown, a hybrid model server 120 may be integrated with the processing tool 100. For example, the hybrid model server 120 may be communicatively coupled to the front-end server 160 by a network connection, as indicated by the arrow. However, in other embodiments, the hybrid model server 120 may be external to the processing tool 100. For example, the hybrid model server 120 may be communicatively coupled to the processing tool 100 through an external network, or the like.
[0026] In one embodiment, the processing tool 100 can include a front-end server 160, a tool control server 150, and tool hardware 140. The front-end server 160 can include a user interface 165 for the hybrid model server 120. The user interface 165 provides an interface for process engineers to utilize hybrid modeling to perform various operations, such as recipe development or chamber baselining, as described in more detail below.
[0027] The tool control server 150 can include a smart monitoring and control block 155. The smart monitoring and control block 155 can include modules for performing diagnostics and other monitoring of the process tool 100. The modules can include, but are not limited to, health checks, sensor drift, fault recovery, and leak detection. The smart monitoring and control block 155 can receive as input data from various sensors implemented in the tool hardware. The sensors can include standard sensors 147 that are typically present in the semiconductor manufacturing tool 100 to enable operation of the tool 100. The sensors may further include modeling sensors 145 that are added to the tool 100. The modeling sensors 145 provide additional information necessary to build highly detailed hybrid models. For example, the modeling sensors can include virtual sensors and / or witness sensors. A virtual sensor can utilize data obtained from two or more physical sensors and perform interpolation and / or extrapolation to provide additional sensor data not available from the physical sensors alone. In a particular example, a virtual sensor can utilize an upstream pressure sensor and a downstream pressure sensor to calculate a flow rate through a portion of the process tool, such as a gas cartridge. Typically, the modeling sensors may include any type of sensor, such as, but not limited to, pressure sensors, temperature sensors, and gas concentration sensors. In one embodiment, the smart monitoring and control block 155 may provide data used by the hybrid model server 120. In other embodiments, the output data from the various modeling sensors 145 may be provided directly to the hybrid model server 120.
[0028] 2A, a flow diagram illustrating a process for creating a hybrid model according to one embodiment is shown. In one embodiment, input from modeling DoE 215 is input to statistical model engine 224. Modeling DoE 215 can include processing several physical wafers. DoE 215 can include various data sources that are fed to statistical model engine 224. For example, metrology data 216 obtained during or after processing of the wafers can be provided to statistical model engine 224. In addition, sensor data 217 from sensors of the processing tool can be provided to statistical model engine 224. Process parameter data 218 (i.e., values of various process parameters during processing of the wafer) can also be provided to statistical model engine 224.
[0029] In one embodiment, the statistical model engine 224 may be implemented as suitable hardware and / or software to analyze various data sources and output statistical models 225. The statistical model engine 224 may utilize machine learning based on neural networks or other known techniques used in regression analysis (e.g., linear, partial least squares, Gaussian, polynomial, convolutional neural networks for regression, regression trees, etc.) to interpolate a larger process space than is available from physical DoE data alone.
[0030] In one embodiment, the physics model engine 226 is used to generate the physics model 227. In one embodiment, the physics model engine 226 may be implemented as hardware and / or software. The physics model engine 226 takes as input the chamber configuration and real physics and chemistry equations. The physics model engine 226 may perform simulations of the physical and chemical interactions within the processing tool across multiple different processing parameters to build the physics model 227. Thus, changes to the processing parameters that modify the physical and / or chemical reactions within the processing tool may be mapped to expected device results.
[0031] In one embodiment, the statistical model 225 and the physical model 227 are used as inputs to create the hybrid model 228. For example, the statistical model 225 and the physical model 227 can be inputs to the hybrid model engine 229. The hybrid model engine 229 processes the physical model 227 and the statistical model 225 and outputs the hybrid model 228. In some embodiments, the physical model 227 may be used to derive some physical measurements that cannot be measured, and the output of the physical model 227 may be considered as an additional input to the statistical model. In such a situation, the hybrid model engine 229 adds information from the physical model 227 to the statistical model 225 to provide the hybrid model 228. Hence, the hybrid model 228 allows the two models 225 and 227 to be used to validate individual points in the process space, providing a more complete process space that can be individually tailored to fit a given processing tool. However, in some embodiments, the physical model 227 and the statistical model 225 can be standalone models, depending on the output. That is, in some embodiments, the statistical model 225 and the physical model 227 may not be merged into a hybrid model.
[0032] In one embodiment, the hybrid model may also be considered as another instance of the statistical model 225. For example, in FIG. 2B , the physical model 227 output by the physical model engine 226 may be used as an input to the statistical model engine 224. Thus, the statistical model engine 224 has an additional input to produce the statistical model 225 that includes information from the physical model 227. Notably, the statistical model 224 may already include data from the physical model 227, and the use of the hybrid model engine to generate the hybrid model may not be necessary in all embodiments.
[0033] 3, a chart is shown illustrating a representation of the process space provided by a hybrid model according to one embodiment. Each point on the chart represents a set of process parameters and the resulting results on the wafer. For example, the X-axis can be response uniformity and the Y-axis can be response mean. The chart shows that for a given set of process parameters, the resulting results on the wafer have a particular response uniformity and response mean.
[0034] In the illustrated chart, the large diamond points are data points obtained from the modeling DoE; i.e., the large points are based on data sets obtained from physical processing of wafers. The small points represent virtual points created using the hybrid model. As shown, the hybrid model provides much more detailed process space data than is available from processed wafers alone.
[0035] 4, a flow diagram illustrating a process 470 for developing a process recipe using a hybrid model according to one embodiment is shown. A target process recipe is a process recipe having a set of process parameters that results in a desired device result on a wafer. In one embodiment, the process 470 may begin with operation 471 which includes determining a desired device result. In one embodiment, the device result may relate to wafer device dimensions, material composition, etc. For example, the device result may include a layer thickness, thickness uniformity across the wafer, material composition of the layer, or material composition uniformity.
[0036] In one embodiment, process 470 may continue with operation 472, which includes consulting a hybrid model to select a set of process parameters. In one embodiment, the hybrid model may be a model of the process space created from a combination of a statistical model and a physical model. The statistical model may be created using DoE of actual wafers as described above. The physical model may be based on real physics and chemical equations. For example, the physical model may be created from a simulation of physical and chemical interactions in a processing tool across multiple different processing parameters. In one embodiment, the hybrid model may cover the entire process space available to the processing tool.
[0037] The hybrid model allows for the identification of stable process recipes without relying solely on the experience and knowledge of process engineers. Instead, a baseline recipe can be selected from the process space of the hybrid model that is expected to produce device results that closely match the target device results.
[0038] In one embodiment, process 470 may continue to operation 473 with performing a small DoE to validate the model recommendations. Due to the high accuracy of the hybrid model, a small DoE (e.g., 20 wafers or less) is sufficient to validate the model recommendations. In one embodiment, the DoE may be designed by a process engineer.
[0039] In one embodiment, process 470 may continue to operation 474 with measuring the DoE wafer results with one or more metrology tools. The metrology data may be used to verify that target device results were achieved on the wafer.
[0040] In one embodiment, the process 470 may continue to operation 475, which includes determining whether the desired device result has been achieved. If the desired device result has been achieved, the process proceeds forward to operation 476, where the process is complete. If the desired device result has not been achieved, the process may loop back to operation 472 and repeat. In one embodiment, data from the small DoE may be fed back to the hybrid model to update the hybrid model. The updated hybrid model may then be queried to provide a second baseline recipe. In this way, even if the first iteration is not successful, the process can still converge quickly to a suitable recipe without requiring extensive DoE and wasted resources.
[0041] 5, a flow diagram illustrating a process 580 for baselining a processing tool according to one embodiment is shown. In one embodiment, the baselining process can be beneficial to account for chamber drift while processing wafers in the processing tool. In one embodiment, the baselining process can be performed at any desired frequency. For example, the process 580 can be performed for each lot, for each planned maintenance (PM) event, or when a processed wafer has device results outside of a specified range.
[0042] In one embodiment, process 580 may begin with operation 581, which includes performing a limited DoE of wafers using external metrology to baseline chamber performance. In one embodiment, the limited DoE may include 20 wafers or less. The limited DoE may utilize a recorded process recipe as a baseline. The external metrology may include any metrology suitable for determining device results of processed wafers. For example, for an oxidation process, ellipsometry may be used to look at film thickness and thickness uniformity across the wafer.
[0043] In one embodiment, process 580 may continue with operation 582, which includes adding device results and other metrology data to the hybrid model. The additional data added to the hybrid model may be referred to as a calibration data set. The calibration data set is used to update the hybrid model so that it more accurately reflects the current conditions of the processing tool. For example, process 580 may include operation 583, which includes adjusting the predictions of the model to account for the particular chamber conditions. That is, the process space of the hybrid model is updated to more closely match the conditions of the processing tool being examined.
[0044] In one embodiment, the hybrid model can be a model of the process space created from a combination of statistical and physical models. The statistical model can be created using DoE of real wafers as described above. The physical model can be based on real physics and chemistry equations. For example, the physical model can be created from a simulation of physical and chemical interactions in a processing tool across multiple different processing parameters. In one embodiment, the hybrid model can cover the entire process space available to the processing tool.
[0045] In one embodiment, the process 580 can continue with operation 584, which includes predicting optimized process parameters to achieve the desired wafer results for wafers subsequently processed in the chamber. After the hybrid model is updated to include the calibration data set, the optimized process parameters can be selected. Thus, the new process recipe provides wafer parameters that result in wafer results that more closely match the target values despite changes in chamber conditions. As such, chamber drift can be monitored and accounted for to maintain tight process windows and improve uniformity, repeatability, and yield. In addition, unscheduled downtime of the tool is reduced because the process recipe can be precisely adjusted to account for chamber drift. Furthermore, when PM is performed, the process 580 can be performed to provide shorter recovery times and improve tool utilization.
[0046] In one embodiment, the hybrid model can be further used to perform continuous (or near-continuous) revision of the process recipe to account for chamber drift. For example, wafer and process data obtained during processing of device wafers can be obtained and used to update the hybrid model. That is, a dedicated DoE may not be required to provide a calibration data set. Wafer data from device wafers may be obtained for all wafers or for a subset of wafers being processed.
[0047] Such an embodiment may include providing a hybrid model of the processing tool. The hybrid model may include a statistical model and a physical model, which is similar to the hybrid model described above. In an embodiment, the process may begin with a recipe being executed at a processing tool to process a first wafer. After processing the first wafer, wafer data from the first wafer and process data from the processing tool associated with the execution of the recipe may be obtained. In an embodiment, the wafer data may include metrology data such as, but not limited to, thickness, thickness uniformity, profile, and hydrogen percentage. In an embodiment, the process data may include data obtained from sensors in the processing tool and / or tool configuration information. In an embodiment, the wafer data and the process data are provided to the hybrid model to create an updated hybrid model. In an embodiment, the updated hybrid model is used to create a modified recipe to account for chamber drifts of the processing tool. The embodiment may then include running the modified recipe at the processing tool to process a second wafer. It should be appreciated that while processing of a single first wafer is described above, multiple first wafers may be processed and then an updated hybrid model may be created. In one such embodiment, multiple sets of wafer data and process data can be used to create an updated hybrid model.
[0048] FIG. 6 illustrates a diagrammatic representation of a machine in the exemplary form of a computer system 600 capable of executing a set of instructions to cause the machine to perform any one or more of the methodologies described herein. In alternative embodiments, the machine may be connected (e.g., networked) to other machines in a local area network (LAN), an intranet, an extranet, or the Internet. The machine may operate in the capacity of a server or a client machine in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile phone, a web appliance, a server, a network router, a switch or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by the machine. Furthermore, although only a single machine is shown, the term "machine" should also be construed to include any collection of machines (e.g., computers) that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies described herein.
[0049] The exemplary computer system 600 includes a processor 602, a main memory 604 (e.g., read only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), a static memory 606 (e.g., flash memory, static random access memory (SRAM), MRAM, etc.), and a secondary memory 618 (e.g., a data storage device), which communicate with each other via a bus 630.
[0050] Processor 602 represents one or more general-purpose processing devices, such as a microprocessor, a central processing unit, and the like. More specifically, processor 602 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIM) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. Processor 602 may also be one or more special-purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, and the like. Processor 602 is configured to execute processing logic 626 for performing the operations described herein.
[0051] The computer system 600 may further include a network interface device 608. The computer system 600 may further include a video display unit 610 (e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 612 (e.g., a keyboard), a cursor control device 614 (e.g., a mouse), and a signal generation device 616 (e.g., a speaker).
[0052] The secondary memory 618 may include a machine-accessible storage medium (or more specifically, a computer-readable storage medium) 632 on which is stored one or more sets of instructions (e.g., software 622) that embody any one or more of the methods or functions described herein. The software 622 may also reside, completely or at least partially, within the main memory 604 and / or within the processor 602 during execution by the computer system 600, with the main memory 604 and the processor 602 also constituting machine-readable storage media. The software 622 may further be transmitted or received over a network 620 via the network interface device 608.
[0053] While the machine-accessible storage medium 632 is shown to be a single medium in the exemplary embodiment, the term "machine-readable storage medium" should be interpreted to include a single medium or multiple media (e.g., centralized or distributed databases and / or associated caches and servers) that store one or more sets of instructions. The term "machine-readable storage medium" should also be interpreted to include any medium that can store or encode a set of instructions for execution by a machine and that cause a machine to perform any one or more of the methods of the present disclosure. Thus, the term "machine-readable storage medium" should be interpreted to include, but is not limited to, solid-state memories and optical and magnetic media.
[0054] According to one embodiment of the present disclosure, a machine-accessible storage medium stores instructions that cause a data processing system to perform a method for processing a wafer using insights from a hybrid model and / or a method for updating or building a hybrid model.
[0055] Thus, a method for using a hybrid model for processing wafers in a processing tool has been disclosed.
Claims
1. 1. A method for developing a semiconductor manufacturing process recipe, comprising: Selecting one or more device results; Querying a hybrid model to obtain a process recipe recommendation suitable for obtaining the device result, the hybrid process model comprising: Statistical models, and Physical Model Querying a hybrid model, including running a design of experiments (DoE) on a set of wafers to verify the process recipe recommended by the hybrid process model; A method comprising:
2. Executing the DoE includes: measuring the DoE wafer results with a metrology tool; determining from the DoE wafer results whether the desired device results are achieved; The method of claim 1 , comprising:
3. The method of claim 1 , wherein the semiconductor manufacturing process is a radical oxidation process.
4. The method of claim 3 , wherein the process recipe includes one or more of a pressure, a temperature, a flow rate, and a soak time.
5. The method of claim 3 , wherein the device results include one or more of thickness, thickness uniformity, profile, and hydrogen percentage.
6. The method of claim 1 , wherein the physical model is developed from a simulation of physical and chemical interactions within a processing tool across a number of different processing parameters.
7. The method of claim 1 , wherein the statistical model is developed from a physical DoE and an interpolation of data from the physical DoE.
8. The method of claim 1 , wherein the hybrid model is a multi-dimensional process space.
9. 1. A method for baseline a chamber performing a semiconductor manufacturing process, comprising: Running a limited Design of Experiment (DoE) of wafers with external metrology to baseline chamber performance; adding wafer results and metrology data from the limited DoE to a hybrid model as a calibration data set, the hybrid model comprising: Statistical models, and Physical Model adding wafer results and metrology data, adjusting the predictions of the model to account for specific chamber and / or wafer conditions identified by the limited DoE; predicting optimized process parameters to achieve a desired wafer outcome for a wafer processed in the chamber; A method comprising:
10. 10. The method of claim 9, wherein the semiconductor manufacturing process is a radical oxidation process.
11. The method of claim 10 , wherein the process parameters include one or more of pressure, flow rate, temperature, and soak time.
12. The method of claim 3 , wherein the wafer results include one or more of thickness, thickness uniformity, profile, and hydrogen percentage.
13. The method of claim 9 , wherein the physical model is generated from a simulation of physical and chemical interactions within the chamber across a number of different process parameters.
14. The method of claim 9 , wherein the statistical model is developed from a modeling DoE and an interpolation of data from the modeling DoE.
15. The method of claim 9 , wherein the hybrid model is a multi-dimensional process space.
16. The method of claim 9 , wherein the limited DoE includes 20 wafers or less.
17. 1. A method for processing a wafer in a processing tool, comprising: Providing a hybrid model of a processing tool, the hybrid model comprising: Statistical models, and Physical Model and providing a hybrid model, including executing a recipe at the processing tool to process a first wafer; obtaining wafer data from the first wafer after execution of the recipe; obtaining process data from the processing tool associated with the execution of the recipe; providing the wafer data and the process data to the hybrid model to produce an updated hybrid model; using the updated hybrid model to generate a modified recipe to account for chamber drift of the processing tool; Executing the modified recipe at the processing tool to process a second wafer; and A method comprising:
18. executing the recipe on a plurality of first wafers; obtaining wafer data from the plurality of first wafers; obtaining process data from the processing tool associated with the execution of the recipe on the plurality of first wafers; providing the wafer data and the process data from the processing of the plurality of first wafers to the hybrid model to produce an updated hybrid model; 20. The method of claim 17, further comprising:
19. The method of claim 17 , wherein the wafer data comprises metrology data.
20. 20. The method of claim 19, wherein the metrology data includes one or more of thickness, thickness uniformity, profile, and hydrogen percentage.
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