Structure with deformable conductor

The use of deformable conductive materials and patterned insulating layers in circuit assemblies addresses the inefficiencies of soldering, reducing costs and defects while enabling flexible connections.

JP2025013940AActive Publication Date: 2025-01-28LIQUID WIRE INC
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Patent Information

Application Number
JP2024186955
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2018-08-22
Filing Date
2024-10-23
Publication Date
2025-01-28
Estimated Expiration
2039-08-22

AI Technical Summary

Technical Problem

Existing electrical connection methods, such as soldering, are cumbersome and can lead to defects and increased costs in circuit assemblies, particularly when using flexible or deformable conductive materials.

Method used

A circuit assembly using deformable conductive materials and insulating layers with patterned channels and contacts, eliminating the need for soldering by forming direct electrical connections through deformable conductors and insulating material layers.

Benefits of technology

This approach reduces assembly costs and defects by eliminating soldering steps, enhances reliability, and allows for flexible and deformable conductive materials to be used effectively in circuit assemblies.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide structures having electrical connections and / or layers with deformable conductive materials, and methods of forming such structures.SOLUTION: There is provided a structure which includes: a substrate layer; a pattern of a trace formed from an elastic conductor containing a liquid; an insulating layer arranged on the substrate layer to enclose the pattern of the trace; a pattern of vias filled with a deformable conductor and electrically coupled with the pattern of the trace; and an electric component coupled to one of the insulating layer and the substrate layer and having a terminal operably coupled to the deformable conductor that fills the pattern of the vias.SELECTED DRAWING: Figure 16
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Description

[Background technology]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims priority from U.S. Provisional Patent Application No. 62 / 721,538, filed August 22, 2018, which is incorporated by reference.

[0002] (Copyright) A portion of the disclosure of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by any person of the patent disclosure as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.

[0003] (Technical field) The inventive principles of this patent disclosure relate generally to deformable conductive materials, and more specifically to structures having electrical connections and / or layers involving deformable conductive materials, and methods of forming such structures. Summary of the Invention

[0004] The circuit assembly may comprise a substrate and a pattern of contact points supported by the substrate and formed from a deformable conductive material. The assembly may also comprise an electrical component supported by the substrate and having terminals arranged in a pattern corresponding to the pattern of contacts. One or more terminals of the electrical component contact one or more of the corresponding contacts to form one or more electrical connections between the electrical component and the contacts. The assembly may further comprise a pattern of conductive traces supported by the substrate and formed from a deformable conductive material, where the pattern of conductive traces is interconnected with the pattern of contacts. The assembly may further comprise an encapsulant covering the electrical component and the contacts. The contacts may be formed on the substrate. The contacts may be formed on a surface of the substrate. The contacts may be provided in recesses in the substrate. The assembly may further comprise a layer of insulating material supported by the substrate, where the contacts may be provided in recesses in the layer of insulating material. The contacts may be formed by vias in the layer of insulating material. The electrical component may comprise a surface mounted component. The electrical component may comprise a packaged integrated circuit. The electrical component may comprise a bare integrated circuit die. The substrate may comprise a flexible material. The substrate may comprise a stretchable material. At least a portion of the substrate may be adhesive. The electrical component may be adhesively attached to the substrate.

[0005] The circuit assembly may include a substrate, a first insulating material layer supported by the substrate, the first insulating material layer having a pattern of channels formed therein, and a deformable conductive material disposed within the channels. The assembly may further include a second insulating material layer disposed to encapsulate the deformable conductive material disposed within the channels in the first insulating material layer. The second insulating material layer may include a pattern of contacts interconnected with the channels. The second insulating material layer may include a pattern of vias aligned with the pattern of channels of the first insulating material layer. The assembly may further include a third insulating material layer supported by the second insulating material layer, the third insulating material layer having a pattern of channels formed therein. The second insulating material layer may include a pattern of vias aligned with the pattern of channels of the first insulating material layer and the pattern of channels of the third insulating material layer. The third insulating material layer may include a pattern of contacts interconnected with the channels of the third insulating material layer. The second insulating material layer may include a second pattern of vias aligned with the pattern of channels of the first insulating material layer, the third insulating material layer may include a pattern of vias aligned with the second pattern of vias in the second insulating material layer, and the pattern of contacts of the third insulating material layer may include one or more of the patterns of vias of the third insulating material layer. The assembly may further include a fourth insulating material layer arranged to encapsulate the deformable conductive material disposed within the channels of the third insulating material layer. The fourth insulating material layer may include a pattern of vias aligned with the pattern of channels of the third insulating material layer. The second insulating material layer, the third insulating material layer, and the fourth insulating material layer include patterns of vias aligned with each other and with the channels of the first insulating material layer. The assembly may further include an electrical component supported by the fourth insulating material layer, the electrical component having a pattern of terminals, and two or more vias through the fourth insulating material layer forming a pattern of contacts corresponding to the pattern of terminals of the electrical component.

[0006] The circuit assembly may include a substrate and a first insulating material layer attached to the substrate and having a first passage pattern including a deformable conductive material. The circuit assembly may further include a second insulating material layer attached to the first insulating material layer and having a second passage pattern including a deformable conductive material, where the second passage pattern is at least partially in communication with the first passage pattern. The first passage pattern may include one or more traces and the second passage pattern may include one or more vias. The circuit assembly may further include a third insulating material layer attached to the second insulating material layer and having a third passage pattern including a deformable conductive material, where the third passage pattern is at least partially in communication with the second passage pattern. The first passage pattern may include one or more traces, the second passage pattern may include one or more vias and the third passage pattern may include one or more traces. The circuit assembly may further include a fourth insulating material layer attached to the third insulating material layer and having a fourth passage pattern including a deformable conductive material. Here, the fourth passage pattern is at least partially in communication with the third passage pattern, the first passage pattern may comprise one or more traces, the second passage pattern may comprise one or more vias, the third passage pattern may comprise one or more traces, and the fourth passage pattern may comprise one or more vias.

[0007] The method may include laminating a first insulating material layer having one or more passages on a substrate, depositing a deformable conductive material in at least one of the passages in the first insulating material layer, and laminating a second insulating material layer on the first insulating material layer, where the second insulating material layer at least partially encapsulates the deformable conductive material in the at least one passage in the first insulating material layer. At least one of the passages in the first insulating material layer may penetrate the entire thickness of the first insulating material layer. The depositing the deformable conductive material in at least one of the passages in the first insulating material layer may include overfilling the at least one passage with the deformable conductive material and removing the excess deformable conductive material from a surface of the first insulating material layer. The removing the excess deformable conductive material from a surface of the first insulating material layer may include removing a release layer from a surface of the first insulating material layer. A method in which the second insulating material layer has one or more passages, the method may further include depositing a deformable conductive material in at least one of the passages in the second insulating material layer, and laminating a third insulating material layer on the second insulating material layer, where the third insulating material layer at least partially encapsulates the deformable conductive material in the at least one passage in the second insulating material layer. At least one of the passages in the first insulating material layer may be in communication with at least one of the passages in the second insulating material layer. At least one of the passages in the second insulating material layer may penetrate the entire thickness of the second insulating material layer. A method in which the third insulating material layer has one or more passages, the method may further include depositing a deformable conductive material in at least one of the passages in the third insulating material layer, and laminating a fourth insulating material layer on the third insulating material layer, where the fourth insulating material layer at least partially encapsulates the deformable conductive material in the at least one passage in the third insulating material layer.

[0008] The method may include forming at least one contact on a substrate, the contact having a deformable conductive material, and supporting an electrical component on the substrate, the electrical component having at least one terminal, where the at least one terminal of the electrical component contacts at least one of the contacts to form at least one electrical connection between the electrical component and the contact. The at least one terminal may comprise a plurality of terminals arranged in a pattern, where the at least one contact may comprise a deformable conductive material and a plurality of contacts arranged in a pattern corresponding to the pattern of the terminals of the electrical component, and the plurality of terminals of the electrical component may contact the plurality of contacts to form a plurality of electrical connections between the electrical component and the contacts. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is an exploded view illustrating an embodiment of a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Diagram 2] FIG. 2 is a partially exploded perspective view of an exemplary embodiment of a circuit assembly in accordance with certain inventive principles of the present patent disclosure. [Figure 3A] FIG. 3A is a cross-sectional view taken along line AA of FIG. 2, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 3B] FIG. 3B is a cross-sectional view taken along line AA of FIG. 2, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 3C] FIG. 3C is a cross-sectional view taken along line AA of FIG. 2, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 3D] FIG. 3D is a cross-sectional view taken along line AA of FIG. 2, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 3E]FIG. 3E is a cross-sectional view taken along line AA of FIG. 2, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 4] FIG. 4 is a partially exploded perspective view of another exemplary embodiment of a circuit assembly in accordance with certain inventive principles of the present patent disclosure. [Figure 5A] FIG. 5A is a cross-sectional view taken along line AA of FIG. 4, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 5B] FIG. 5B is a cross-sectional view taken along line AA of FIG. 4, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 5C] FIG. 5C is a cross-sectional view taken along line AA of FIG. 4, illustrating some possible example implementation details and alternative embodiments in accordance with some inventive principles of this patent disclosure. [Figure 6] FIG. 6 is a partially exploded perspective view of another exemplary embodiment of a circuit assembly in accordance with certain inventive principles of the present patent disclosure. [Figure 7A] FIG. 7A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 7B] FIG. 7B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 8A] FIG. 8A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 8B] FIG. 8B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 9A] FIG. 9A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 9B] FIG. 9B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 10A] FIG. 10A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 10B] FIG. 10B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 11A] FIG. 11A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 11B] FIG. 11B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 12A] FIG. 12A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 12B] FIG. 12B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 13A] FIG. 13A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 13B] FIG. 13B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 14A] FIG. 14A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 14B] FIG. 14B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 15A]FIG. 15A illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 15B] FIG. 15B illustrates an embodiment of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 16] FIG. 16 is a cross-sectional view illustrating another embodiment of a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 17] FIG. 17 is a cross-sectional view illustrating another embodiment of a circuit assembly in accordance with some inventive principles of the present patent disclosure. [Figure 18] FIG. 18 is a plan view and a cross-sectional view, respectively, of a via structure in accordance with some inventive principles of this patent disclosure. [Figure 19] FIG. 19 is a plan view and a cross-sectional view, respectively, of a via structure in accordance with some inventive principles of this patent disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The embodiments and details of example implementations described below are for illustrative purposes. The drawings are not necessarily drawn to scale. The principles of the present invention are not limited to these embodiments and details.

[0011] Some of the inventive principles of this patent disclosure relate to electrical connections between components and deformable conductive materials in a circuit assembly.

[0012] FIG. 1 is an exploded view illustrating an embodiment of a circuit assembly according to some inventive principles of the present patent disclosure. The embodiment of FIG. 1 includes a substrate 100 supported by the substrate 100 and having a pattern of contacts 102 formed from a deformable conductive material. An electrical component 104 is also supported by the substrate 100 and has one or more terminals 106 arranged in a pattern corresponding to the pattern of contacts 102. The terminals 106 are shown in dashed lines (phantom view) because they are located on the bottom of the electrical component 104. One or more of the terminals 106 of the electrical component 104 may contact one or more of the corresponding contacts 102 to form one or more electrical connections between the electrical component and the contacts. The one or more terminals 106 may contact one or more of the contacts 102 when the electrical component 104 is attached to, brought close to, or supported by the substrate 100, as indicated by arrows 108, for example. Thus, some of the principles of the present invention allow for the creation of electrical connections without soldering or any other conventional process for creating electrical connections.

[0013] The contacts 102 may be supported by the substrate 100, for example, by being formed directly on the surface of the substrate, by being recessed in the substrate, by being formed on another layer of material on the substrate, or in other ways. The electrical component 104 may be supported by the substrate 100, for example, by being attached directly to the surface of the substrate, by being attached to another component supported by the substrate, by being supported by a pattern of contacts 102, or in other ways.

[0014] The assembly of Figure 1 may further include a pattern of conductive traces supported by the substrate and formed from a deformable conductive material. The pattern of conductive traces may be interconnected with the pattern of contacts.

[0015] The embodiment of Figure 1 can be implemented with a wide variety of materials and components. For example, the substrate can be made from plastic materials, including any silicon-based material such as polydimethylsiloxane (PDMS), thermoplastic polyurethane (TPU), ethylene propylene diene terpolymer (EPDM), neoprene, polyethylene terephthalate (PET), and epoxy and epoxy-based materials, or natural or synthetic rubber, fabric, wood, leather, paper, fiberglass and other composite materials, and other insulating materials and / or combinations thereof.

[0016] The deformable conductive material may be provided in any form including liquid, paste, gel, powder, or other form having soft, flexible, stretchy, bendable, elastic, flowable, viscoelastic, or other deformable properties including Newtonian and non-Newtonian properties. The deformable conductive material may be realized with any electroactive material including, but not limited to, deformable conductors including conductive gels such as gallium indium alloy (also referred to as "Metal Gel" by tradename). Some examples are disclosed in International Patent Application PCT / US2017 / 019762, filed February 27, 2017, which is incorporated by reference. The application was published on September 8, 2017 under International Publication Number WO2017 / 151523A1, which is also incorporated by reference. Other suitable electroactive materials include any conductive metal including gold, nickel, silver, platinum, copper, etc., semiconductors based on silicon, gallium, germanium, antimony, arsenic, boron, carbon, selenium, sulfur, tellurium, etc., semiconducting compounds including gallium arsenide, indium antimonide, and oxides of many metals, organic semiconductors, and conductive non-metallic substances such as graphite. Other examples of conductive gels include gels based on graphite or other allotropes of carbon, ionic compounds, or other gels.

[0017] The electrical components may be any electrical, electronic, electromechanical, or other electrical components, including, but not limited to, integrated circuits, transistors, diodes, LEDs, capacitors, resistors, inductors, switches, terminals, connectors, displays, sensors, printed circuit boards, or other devices. The electrical components may be in the form of bare components or may be partially or completely enclosed in various types of packages. In the case of integrated circuits and other semiconductors, a wide range of package types may be used, as described in more detail below. Integrated circuits in the form of dies or bare dies mounted on a substrate, such as chip-scale devices, but not completely enclosed in a package, may also be used.

[0018] The contact pattern can include any number and arrangement of contacts (including a single contact), depending on the number and arrangement of terminals on one or more electrical components and the number and arrangement of electrical connections.

[0019] FIG. 2 is a partially exploded perspective view of an exemplary embodiment of a circuit assembly according to some inventive principles of the present patent disclosure. The embodiment of FIG. 2 includes an integrated circuit (IC) 116 in a surface mount package having terminals in the form of leads 118A-118F. A substrate 110 has a pattern of contacts 112A-112F (also referred to collectively as 112) made from a deformable conductive material and arranged to match the footprints of the leads 118A-118F (also referred to collectively as 118) on the integrated circuit 116. In this example, the contacts are formed in the form of solder pads that are conventionally used to make electrical connections between ICs and printed circuit boards. Conductive traces 114A-114F (also referred to collectively as 114), which may be made from a deformable conductive material, are connected to the contacts 112A-112F and terminate at an end of the substrate 110 in this view. The traces 114A-114F may be used, for example, to connect the integrated circuit 116 to other components, circuits, terminals, etc. Leads 118A-118F contact corresponding contacts 112A-112F, as indicated by arrows 120, when integrated circuit 116 is disposed on a substrate.

[0020] In the embodiment of FIG. 2, the contacts 112 and traces 114 are formed on the top surface of the substrate 110 and protrude upwardly, for example, by flexography, block printing, jet printing, 3D printing, stenciling, masked spraying, extrusion, rolling or brushing screen printing, pattern deposition, or any other suitable technique.

[0021] 3A-3E are cross-sectional views taken along line AA of FIG. 2, illustrating some possible example implementation details and alternative embodiments.

[0022] FIG. 3A shows the IC 116 before it is placed on the substrate 110.

[0023] 3B shows an IC 116 disposed on a substrate 110 and forming ohmic contacts between the leads 118 and the contacts 112. The IC 116 is secured to the substrate 110 by an adhesive layer 122. In this example, the leads 118 displace a portion of the deformable conductive material of the contacts 112, which can conform to the shape of the leads 118 and provide additional surface area and improved electrical connection.

[0024] Figure 3C illustrates an embodiment similar to that of Figure 3B, but with an encapsulant 124 covering the integrated circuit 116, leads 118, contacts 112, and traces 114. The encapsulant 124 may also fill spaces between the integrated circuit 116, leads 118, and substrate 110. Examples of suitable materials for the encapsulant 124 include silicone-based materials such as PDMS, urethanes, epoxies, polyesters, polyamides, varnishes, and any other material that can provide a protective coating and / or help hold the assembly together.

[0025] 3D shows an embodiment in which the integrated circuit 116 directly contacts the substrate 110, which may be used, for example, when an encapsulant provides sufficient strength to hold the integrated circuit 116 to the substrate 110, or with a substrate 110 made from an inherently adhesive or cohesive material. In this embodiment, the leads 118 may be further pressed into the contacts 112.

[0026] FIG. 3E illustrates an embodiment in which an additional layer of material 126 is attached to the top surface of the substrate 110 and disposed beneath the pattern of contacts 112. The layer 126 can perform a variety of functions. For example, in implementations in which the substrate is fabricated from a flexible or stretchable material, the layer 126 may be fabricated from a stiffer or less stretchable material to prevent bending or stretching of the region of the substrate directly beneath the integrated circuit or other electrical component that may cause a poor connection between the terminals 118 of the integrated circuit 116 and the contacts 112. As another example, the layer 126 can perform a heat sinking or heat dissipating function for the integrated circuit 116 or other electrical component. Alternatively, the additional layer 126 may be disposed beneath the substrate 110, within the substrate, or in any other suitable location. The layer 126 may be formed as a continuous sheet of material or may be patterned to have openings for some or all of the contacts 112, traces 114, integrated circuit 116, or other components, for example. Examples of materials that can be used for layer 126 include forms such as TPU, fiberglass, PET, and other relatively stiff or non-stretchable materials.

[0027] Figure 4 is a partially exploded perspective view of another exemplary embodiment of a circuit assembly in accordance with certain inventive principles of the present patent disclosure. The embodiment of Figure 4 is similar to the embodiment of Figure 2, except that contacts 126A-126F are formed by recesses in a substrate 128 that are partially or completely filled with a deformable conductive material. The embodiment of Figure 4 also includes traces 130 disposed in recesses in the substrate.

[0028] The recesses in the substrate may be formed by removing portions of a sheet of material by drilling, routing, etching, cutting, or any other method or combination of removing material using mechanical, optical (e.g., laser), chemical, electrical, ultrasonic or other devices. Alternatively, the substrate may be formed to have recesses therein by molding, casting, 3D printing, or other forming processes. The deformable conductive material may be deposited in the recesses by any of the processes described above, including printing, stenciling, spraying, rolling, brushing, and any other technique for depositing material in the recesses. Additionally, the recesses may be overfilled with the deformable conductive material, and then any suitable technique, including scraping, rolling, brushing, etc., may be used to remove the excess material so that it is flush with the surrounding surface of the substrate or slightly above or below the surrounding surface of the substrate, as described in more detail below.

[0029] 5A-5C are cross-sectional views taken along line AA of FIG. 4, illustrating some possible example implementation details and alternative embodiments.

[0030] FIG. 5A shows the state before the IC 132 is placed on the substrate 128.

[0031] 5B shows an IC 132 disposed on a substrate 128 and forming ohmic contacts between the leads 134 and the contacts 126. In this example, the IC 132 is attached directly to the substrate 110, which may have, for example, a self-adhesive surface. Alternatively, the IC 132 may be attached to the substrate using an adhesive or any other suitable technique. In this example, the leads 134 protrude downward into the contacts 126, displacing a portion of the deformable conductive material, which may conform to the shape of the leads 134 and provide additional surface area and improved electrical connection.

[0032] The integrated circuits shown in Figures 2, 3A-3E, 4, and 5A-5B are packaged in a surface mount package such as a SOT23-6 (Six Lead Small Outline Transistor) package, although any other type of IC package and electronic components can be used in accordance with the inventive principles of this patent disclosure. For example, a leadless chip carrier can have terminals with flat lead surfaces that provide good contact area for any of the disclosed contacts without disturbing the pattern of deformable conductive material. Some other types of packages that may work well include packages with protruding solder structures such as ball grid arrays (BGA) and wafer level chip scale packaging (WL-CSP) and packages with slightly protruding leads such as leaded chip carriers. Those solder structures or leads can sink slightly into the contacts to create reliable ohmic connections without displacing the deformable conductive material to disturb the pattern.

[0033] FIG. 5C shows an embodiment in which a chip-scale package 136 having solder bumps 138 is attached to the substrate 128 .

[0034] 6 illustrates an embodiment in which an additional layer of material 142 is attached to the surface of substrate 140 after the pattern of contacts 144 and traces 146 has been formed, but before the attachment of integrated circuit 148. Layer 142 may be similar to layer 126 in the embodiment of FIG. 3E, for example. In this embodiment, layer 142 includes openings for contacts 144.

[0035] In addition to packaged integrated circuits and other devices, bare integrated circuit dies and other components may be used in accordance with the inventive principles of this patent disclosure. For example, an IC die having bonding or contact pads may be attached to a substrate having a coplanar or protruding pattern of contacts that correspond to the pattern of bonding or contact pads on the die. This typically requires mounting the die upside down (i.e., with the bonding or contact pads facing the top surface of the substrate) so that the contacts, which include a deformable conductive material, form ohmic connections with the bonding or contact pads.

[0036] While the embodiments of Figures 4, 5A-5C and 6 show the deformable conductive material generally flush with the surface of the substrate, the deformable conductive material may alternatively be formed to sink (i.e., recessed below) or protrude (i.e., protrude above) the surface of the substrate. For example, the material may be formed to sink from the surface by only partially filling some or all of the recesses with material, or by removing some material by scraping, brushing, gouging, etching, evaporation, etc. The material may also be formed to protrude from the surface by pattern depositing, stenciling, various forms of printing, etc. In some embodiments, the material may be formed to protrude from the surface by using a release layer having a pattern that matches the pattern of the recesses. The release layer may be placed on the substrate, the pattern of the recesses may be overfilled, and then scraped off flush with the top surface of the release layer. The release layer may then be removed leaving the protruding material in a manner similar to the embodiments described below.

[0037] In the embodiments of Figures 2, 3A-3E, 4, 5A-5C, and 6, the contacts and traces are generally shown on the surface of the substrate or extend part way into the substrate. In other embodiments, some or all of the contacts and / or traces may extend through the entire thickness of the substrate. For example, the contacts may be implemented as vias through the substrate and may function as layers in one of the embodiments described below.

[0038] Some additional inventive principles of this patent disclosure relate to circuit assemblies that include layers with passages that include deformable conductive material. The inventive principles relating to electrical connections and the inventive principles relating to layers with passages are independent principles with independent utility. However, some additional inventive principles of this patent disclosure may combine some of these separate principles to provide more inventive principles in a way that may provide synergistic results.

[0039] Figures 7A and 7B through 15A and 15B show embodiments of a circuit assembly and an embodiment of a method of manufacturing a circuit assembly according to some inventive principles of the present patent disclosure. Figures 7B, 8B, 9B, 10B, 11B, 12B, 13B, 14B, and 15B are cross-sectional views taken along line AA in the perspective views of Figures 7A, 8A, 9A, 10A, 11A, 12A, 13A, 14A, and 15A, respectively.

[0040] FIG. 7A is a perspective view of the substrate 150, the first insulating material layer (first layer) 152, and the release layer 154. FIG. 7B is a cross-sectional view taken along line AA in FIG. 7A. The substrate 150 and the first layer 152, as well as the insulating layers shown in FIGS. 8A and 8B through 15A and 15B, can be made from the insulating materials described above with respect to the embodiment of FIG. 1. For example, the substrate 150 and the first layer 152 may be made from a stretchable TPU or epoxy-based material. The substrate 150 may generally be an uninterrupted sheet of material. Meanwhile, the first insulating material layer 152 and the release layer 154 have a pattern of passages 156 and 158, in this example channels cut through their entire thickness to create a mask or stencil. The release layer 154, which may be thinner than the first layer, is laminated onto the first layer 152 and may be made from any of the insulating materials described above with respect to the embodiment of FIG. 1. For example, the release layer 154 may be made from a thin layer of PET. In embodiments in which the release layer 154 is eventually removed, the release layer 154 may be made from metallized plastics or other conductive materials, as well as conductive materials including metals in alloy or pure form.

[0041] The passages 156 and 158 may be formed in the first insulating material layer 152 and the release layer 154 using any suitable subtractive technique, such as laser cutting, drilling, routing, die cutting, water jet cutting, etc. In other embodiments, the first layer 152 and / or the release layer may be formed by additive manufacturing techniques, such as 3D printing, pattern deposition, etc.

[0042] FIG. 8A is a perspective view of the substrate 150 and the first insulating material layer 152 after the first layer has been laminated onto the substrate. FIG. 8B is a cross-sectional view taken along line AA in FIG. 8A. The substrate 150 and the first insulating material layer 152 may be bonded, fused or cured together, or otherwise attached to one another using any suitable process and / or material. For example, the substrate 150 and the first layer 152 may be bonded together with heat and pressure if made from TPU or other thermoplastics. As another example, the substrate 150 and the first layer 152 may be bonded together by pressing the layers together if made from a material that is inherently adhesive, such as some epoxy-based materials. In yet another example, the substrate 150 and the first layer 152 may be made from a UV-curable material and exposed to a UV light source after lamination. The lamination and bonding of the two layers may close the bottoms of the channels 156 and 158, so that there is little or no leakage when they are filled with material.

[0043] FIG. 9A is a perspective view of the substrate 150 , the first insulating material layer 152 and the release layer 154 after the channels 156 and 158 have been overfilled with a deformable conductive material 160 .

[0044] 9A and 9B, channels 156 and 158 are overfilled with a deformable conductive material 160, which may be implemented with any of the deformable conductive materials described above with respect to the embodiment of FIG. 1. The deformable conductive material may be, for example, a conductive gel. The material may be overfilled using any suitable technique, such as extrusion, rolling, swabbing, spraying, printing, brushing, deposition, etc. In one example embodiment, the material may be overfilled using a cotton swab to completely place the deformable conductive material into channels 156 and 158.

[0045] 10A and 10B, excess deformable conductive material 160 may be removed from the surface of the release layer 154 by scraping it with a tool 162, as indicated by arrow 164. This causes the excess material to form a mound 166 in front of the tool 162, which helps fill the underfilled areas of the channels 156 and 158. The excess material may be discarded or recycled for use with other assemblies. Examples of items that may be used for the tool 162 include a straight-edge ruler, squeegee, spatula, scraper blade, and the like. In other embodiments, alternative techniques such as rolling, brushing, etching, and the like may be used to remove the excess deformable material. In one example embodiment, a roller preloaded with the deformable conductive material may be used to both apply the material and remove the excess material by forcing it from under the roller in a single step.

[0046] 11A and 11B, the deformable conductive material is shown generally flush with the top surface 167 of the release layer 154, with all or most of the excess material having been removed. Depending on the technique used to remove the excess material, there may still be thin patches of deformable conductive material remaining on the top surface of the release layer 154. Thus, the release layer may be peeled away and removed to leave a clean top surface 168 on the first insulating material layer 152, for example, as shown in FIGS. 12A and 12B.

[0047] The deformable conductive material 160 in the channels 156 and 158 is shown in FIGS. 12A and 12B as being substantially flush with the top surface 168 of the first insulating material layer 152. This may be accomplished by using a release layer that is thin enough (e.g., a few microns or tens of microns, or even a few thousandths of an inch thick) so that the remaining deformable conductive material is effectively flush. In some embodiments, the thickness of the release layer 154 may be exaggerated in FIGS. 7A and 7B through 11A and 11B. In some embodiments, if only a small amount of protrusion needs to be avoided, a small amount of the deformable conductive material 160 may be removed from the channels 156 and 158 by scraping, brushing, or the like, before removing the release layer 154, thereby leaving the deformable conductive material 160 flush with the top surface 168 of the first insulating material layer 152.

[0048] In some embodiments, it may be beneficial to have the deformable conductive material 160 protrude slightly above the surface. In some embodiments, the thickness of the release layer 154 may be purposefully set to a value that allows the deformable conductive material 160 to protrude a predetermined amount above the top surface 168 of the first insulating material layer 152.

[0049] The structure shown in Figures 12A and 12B has utility when fabricated or as a base for additional layers. For example, when fabricated, it may be used as a pattern of contact pads to engage terminals of an electrical component that may be mounted on or supported by the first layer 152 as described above with respect to Figures 1-6. In such applications, it may be beneficial for the deformable conductive material 160 to protrude above the top surface 168 of the first insulating material layer 152, for example, to better engage terminals of the electrical component. The pattern of conductive channels 156 and 158 may be modified to include conductive passages of different numbers, sizes, shapes, etc., to function as contacts and / or traces.

[0050] 12A and 12B, or an embodiment with a modified via pattern, may be used as a circuit element itself. For example, channels 156 and 158 filled with deformable conductive material 160 may function as transmission lines, such as striplines, or in a circuit capacitor. In such implementations, an encapsulant layer may be formed over the top of layer 152 to encapsulate and protect deformable conductive material 160.

[0051] As mentioned above, the structure as shown in Figures 12A and 12B, or the structure with the modified via pattern, can be used as a base for additional layers. For example, referring to Figures 13A and 13B, a second insulating material layer (second layer) 170 is laminated on top of the first layer 152. The second layer 170 can have a via pattern, at least one of which communicates with one or more vias in the first layer 152. In the example of Figures 13A and 13B, the pattern comprises through vias 172 and 174 that align with the traces formed by the channels 156 and 158, respectively, in the first layer 152. Other portions of the second layer 170 can serve to encapsulate the deformable conductive material within the portions of the channels 156 and 158 in the first layer 152. The second layer 170 and the vias 172 and 174 may be formed and attached using any of the materials and techniques disclosed for the first layer 152, including the use of a release layer. For simplicity, the intermediate steps in which second layer 170 is formed and attached are not shown, and the second layer is shown in its final form in Figures 13A and 13B.

[0052] 13B, via 172 in second layer 170 aligns with and communicates with a portion of channel 156 in first layer 152. Thus, when via 172 is filled with a deformable conductive material, it forms a continuous conductive structure with channel 156.

[0053] The vias 172 and 174 in the second layer 170 can serve many functions. For example, they can function as contacts for one or more electrical components, they can function as circuit elements themselves, such as transmission lines or sensors, they can also electrically connect traces formed by channels 156 and 158 in the first layer 152 with traces in another layer above the second layer, etc. The pattern of vias 172 and 174 shown in Figures 13A and 13B is merely one example, and the pattern may be modified to include any number, shape, arrangement, etc. of conductive pathways.

[0054] 14A and 14B, a third insulating material layer (third layer) 176 is laminated onto the second insulating material layer 170. The third layer 176 can have a via pattern, at least one of which communicates with one or more vias in the second layer 170. In the example of FIG. 14A and 14B, the pattern comprises channels 178 and 180 that align with the vias 172 and 174, respectively, in the second layer 170. The third layer 176 and the channels 178 and 180 may be formed and attached using any of the materials and techniques disclosed for the first layer 152 and the second layer 170, including the use of a release layer. For simplicity, the intermediate steps in which the third layer 176 is formed and attached are not shown, and the third layer is shown in its final form in FIG. 14A and 14B.

[0055] Similar to the pathway patterns in the first layer 152 and the second layer 170, the pattern of channels 178 and 180 in the third layer 176 can serve many functions. For example, they can function as contacts for one or more electrical components, they can function as circuit elements themselves, such as transmission lines or sensors, or they can function as traces that are electrically connected to vias 172 and 174, etc. in the second layer 170. The pattern of channels 178 and 180 shown in Figures 14A and 14B is merely one example, and the pattern may be modified to include any number, shape, arrangement, etc. of conductive pathways.

[0056] 15A and 15B, a fourth insulating material layer (fourth layer) 182 is laminated onto the third insulating material layer 176. The fourth layer 182 can have a via pattern, at least one of which communicates with one or more vias in the third layer 176. In the example of FIG. 15A and 15B, the pattern comprises pads 184 and 186 that align with the channels 178 and 180, respectively, in the third layer 176. Other portions of the fourth layer 182 can serve to encapsulate the deformable conductive material within portions of the channels 178 and 180 in the third layer 176. The fourth layer 182 and pads 184 and 186 may be formed and attached using any of the materials and techniques disclosed for the first layer 152, the second layer 170, and the third layer 176, including the use of release layers. For simplicity, the intermediate steps of forming and attaching the fourth layer 182 are not shown, and the fourth layer is shown in its final form in Figures 15A and 15B.

[0057] The pattern of pads 184 and 186 in the fourth layer 182, like the via patterns in the other layers, can serve many functions. For example, they can function as contacts for one or more electrical components, and they can function as circuit elements themselves, such as transmission lines or sensors. They can also function as vias that electrically connect the channels 178 and 180 in the third layer 182 to vias in additional layers above the fourth layer 182. In addition, they can also function as contacts to make "hard-to-soft" connections between rigid external terminals and deformable conductive materials. The pattern of pads 184 and 186 shown in Figures 15A and 15B is merely one example, and the pattern may be modified to include any number, shape, arrangement, etc. of conductive vias.

[0058] As shown in Figure 15B, there is one continuous conductive path through the channels 156 in the first layer 152, the vias 172 in the second layer 170, the channels 178 in the third layer 176, and the pads 184 in the fourth layer 182. The layers and pathways in the embodiments shown in Figures 7A and 7B through 15A and 15B are for illustrative purposes only and can be modified to create any type of circuit configuration. For example, the order of layers of vias and pads, and layers with traces can be changed. Some layers can include both traces and vias and pads.

[0059] In some exemplary embodiments, one or more of the insulating layers may be formed of TPU, such as Lubrizol Estane 58000 series, e.g. 58238, or an elastic epoxy-based material. The elastic epoxy-based material may also provide a self-adhesive surface for bonding electrical components to the layers and for bonding layers to each other. Other examples of materials with adhesive properties include thermally activated adhesives such as polyurethane (PU) adhesives (e.g. Bemis or Framis), thermosetting adhesives with silicone, acrylic or other different chemistries, and pressure sensitive adhesives of any chemistry, etc.

[0060] Such materials may result in embodiments of circuit assemblies that are sufficiently flexible and / or stretchable for use in medical electronics, clothing, and the like worn against or in proximity to a patient's body. In some embodiments, one or more release layers may be left in place on the surface of the insulating material layers. In other embodiments, release layers may be omitted entirely. The passageways shown in the embodiments of Figures 7A and 7B through 15A and 15B are generally shown as extending completely through the insulating material layers. However, in other embodiments, some or all of the passageways may extend only partway through one or more insulating material layers.

[0061] In some embodiments, electrical components may be integrated into the stack (e.g., between layers). For example, one or more interior layers of the stack may have cutout sections to accommodate the height of devices such as integrated circuit packages. In other embodiments, components such as resistors and / or capacitors as well as smaller IC packages and bare IC dies may be small enough to be placed between layers, especially if the layers are relatively soft and / or flexible.

[0062] FIG. 16 is a cross-sectional view of another embodiment of a circuit assembly according to some inventive principles of the present patent disclosure. For illustrative purposes, the embodiment of FIG. 16 is shown having layers similar to those of FIG. 15B, but the inventive principles are not limited to these details. The embodiment of FIG. 16 includes a layer, sublayer, or portion of a layer (collectively "sublayer") 177 in or on which a pattern of conductive elements is formed. In this example, sublayer 177 is inserted between second layer 170 and third layer 176 on the right portion of the stack. Third layer 176 and fourth layer 182 are formed with stepped portions to accommodate sublayer 177. In other embodiments, a sublayer may replace a portion of a layer, an entire layer, or may be added as an entire separate layer. Sublayer 177 may be thinner, thicker, or the same thickness as any of the other layers.

[0063] Some or all of the conductive elements on layer 177 may be formed from any of the deformable conductive materials disclosed above. Also, the pattern of conductive elements may include a mixture of deformable and non-deformable conductive elements. Sublayer 177 is fabricated from any of the insulating materials disclosed above and attached to the other layers as described above. The pattern of elements may include circuit elements including traces, vias, pads, transmission lines and sensors, etc. The pattern of elements may be formed on sublayer 177 by any of the techniques described above. In some embodiments, it is beneficial to form some or all of the elements by a printing process, such as a reel-to-reel (R2R) process. This allows for the production of finer conductive elements, which may correspond to smaller electrical components or interconnects, or may generally correspond to components or interconnects with different properties.

[0064] In the embodiment of Figure 16, sublayer 177 has a pattern with two traces 188 and 190 connected to pads 192 and 194 that align with terminals 196 and 198, respectively, on electrical component 200. Vias 202 and 204 through third layer 176 connect pads 192 and 194 to terminals 196 and 198, respectively. Electrical component 200 in this example is shown as a bare integrated circuit die with terminals 196 and 198 formed as bond or contact pads, although any other type of electrical component could be used. In this example, IC die 200 is attached to third layer 176 with an adhesive, but may be attached in any other manner.

[0065] The pattern of conductive elements formed on sublayer 177 may be interconnected with any other traces, vias, pads, components, etc. In the example of FIG. 16 , trace 190 on sublayer 177 is electrically connected to trace 178 in layer 176 through hybrid trace / via 208 formed in a stepped portion of layer 176 corresponding to the thickness of sublayer 177. In other embodiments, the portion of layer 176 above sublayer 177 may be omitted, and fourth layer 182 may be formed on the plane formed by the remaining portion of layer 176 and sublayer 177.

[0066] Figure 17 is a cross-sectional view of another embodiment of a circuit assembly in accordance with some inventive principles of this patent disclosure. The embodiment of Figure 17 is similar to that of Figure 16, except that the entire portion of third layer 176 underlying IC die 200 is omitted, as are vias 202 and 204. The IC die is attached to the top surface of sublayer 177 by adhesive layer 206, and bonding or contact pads 196 and 198 directly contact pads 192 and 194, respectively, formed from a deformable conductive material.

[0067] FIG. 18 is a plan view of a via structure according to some inventive principles of the present patent disclosure. FIG. 19 is a cross-sectional view taken along line AA of FIG. 18. The embodiments of FIG. 18 and FIG. 19 may utilize any of the materials and manufacturing techniques described above and include a substrate 210 and a first insulating material layer 212 and a second insulating material layer 216 laminated on the substrate 210. The first layer 212 includes a trace 214. The second layer includes a via 218 formed on and in communication with the trace 214. As shown in FIG. 18, the via 218 has a length that extends in the X-axis (compared to the Y-axis). Along the X-axis, the assembly of FIG. 18 experiences strain, shear, and / or elongation. Extending the length of the via along the X-axis may provide a stronger connection between the via 218 and the trace 214, which tend to pass each other when the assembly is stretched along the X-axis.

[0068] The technique of stretching conductive elements in the expected direction of extension is shown in the context of vias in Figures 18 and 19, but can be applied to any other passages, interconnects, or structures. In some embodiments, other aspects of the relative sizes and shapes of vias, traces, and other features may be adjusted to accommodate the extension. For example, in some embodiments, a via may have a diameter of about half the width of a trace.

[0069] Embodiments constructed in accordance with the inventive principles of this patent disclosure may result in high performance circuit assemblies that may reduce the cost of assembly because they allow for the use of less expensive unpackaged electronic components and may eliminate a soldering step. Additionally, embodiments constructed in accordance with the inventive principles of this patent disclosure may provide increased reliability because they may reduce heating associated with soldering due to the elimination of solder and may provide improved cooling by eliminating device packaging that may be a barrier to heat dissipation.

[0070] Because the inventive principles of this patent disclosure may be modified in arrangement and detail without departing from the concept of the invention, such changes and modifications are deemed to be within the scope of the following claims. The use of terms such as first and second is intended to distinguish between different components and does not necessarily imply the presence of more than one component.

Claims

1. A substrate layer; a pattern of traces formed from a stretchable conductor containing a liquid; an insulating layer disposed on the substrate layer and encapsulating the pattern of traces; a pattern of vias filled with a deformable conductor and electrically coupled to the pattern of traces; an electrical component coupled to one of the insulating layer and the substrate layer, the electrical component having terminals operably coupled to the deformable conductors filling the pattern of vias.

2. 2. The circuit assembly of claim 1, wherein the pattern of vias extends through the one of the insulating layer and the substrate layer to the pattern of traces.

3. 3. The circuit assembly of claim 2, wherein said electrical component is physically coupled to said one surface of said insulating layer and said substrate layer.

4. 4. The circuit assembly of claim 3, wherein said one of said insulating layer and said substrate layer includes an adhesive that physically bonds said electrical component to said surface of said one of said insulating layer and said substrate layer.

5. 2. The circuit assembly of claim 1, wherein the substrate layer, the first insulating layer and the second insulating layer are constructed from a stretchable material.

6. 6. The circuit assembly of claim 5, wherein the elastic material is the same in the substrate layer, the first insulating layer, and the second insulating layer.

7. 7. The circuit assembly of claim 6, wherein said substrate layer is comprised of a thermoplastic polyurethane.

8. 2. The circuit assembly of claim 1, wherein the liquid metal comprises an alloy containing gallium and indium.

9. 2. The circuit assembly of claim 1, wherein said terminals define a pattern of said terminals that corresponds to said pattern of said vias.

10. 2. The circuit assembly of claim 1, wherein the deformable conductor comprises an electroactive material containing a conductive metal that electrically couples the terminals to the pattern of traces.

11. The circuit assembly of claim 1 , wherein the stretchable conductor and the deformable conductor are the same.

12. The circuit assembly of claim 1 , wherein the terminal extends into the via.

13. the circuit assembly further comprising a low-stretch material that is less stretchable than the one of the substrate layer and the insulating layer; the low stretch material is bonded to the one of the substrate layer and the insulating layer; The circuit assembly of claim 1 , wherein the electrical components are attached to the low stretch material.

14. 14. The circuit assembly of claim 13, wherein the low stretch material has a higher stiffness than the one of the substrate layer and the insulating layer to which it is bonded.

15. 1. A method for manufacturing a circuit assembly, comprising: Providing a substrate layer; forming a pattern of traces on the substrate layer, the pattern of traces comprising a stretchable conductor, the stretchable conductor comprising a liquid; disposing an insulating layer over the substrate layer to encapsulate the pattern of traces; forming a plurality of vias in one of the substrate layer and the insulating layer, the plurality of vias being formed to communicate with the pattern of traces; filling the vias with a deformable conductor such that the vias are electrically coupled to the pattern of traces; and operatively coupling an electrical component to the plurality of vias, the electrical component being supported by the one of the substrate layer and the insulating layer.

16. 16. The method of claim 15, wherein the electrical component includes a plurality of terminals, and wherein the step of operably coupling the electrical component to the pattern of the plurality of vias electrically couples the plurality of terminals to the pattern of traces.

17. The method of claim 16 , wherein the deformable conductor comprises an electroactive material containing a conductive metal that electrically couples the plurality of terminals to the pattern of traces.

18. The method of claim 17 , wherein the substrate layer and the one surface of the insulating layer are comprised of an adhesive that physically bonds the electrical component.

19. The method of claim 15 further comprising recessing the plurality of terminals into the one of the substrate layer and the insulating layer.

20. The method of claim 15 , wherein the substrate layer and the insulating layer are made of a stretchable material.

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