Engineered materials for electronic assembly

Abstract

To tackle at least some of problems associated with the prior art of a solder material for use in an electronic assembly, or at least to provide a commercially acceptable alternative solution thereto.SOLUTION: The invention relates to a solder material for use in an electronic assembly, the solder material comprising: solder layers; and a core layer comprising a core material, the core layer being sandwiched between the solder layers. The thermal conductivity of the core material is greater than the thermal conductivity of the solder.SELECTED DRAWING: None

Description

[Technical field]

[0001] The present invention relates to solder materials for use in electronic assemblies. [Background technology]

[0002] There are two main challenges associated with packaging and assembly of high power electronic devices such as IGBTs, MOSFETs, high power LEDs, high power microprocessors, and other large area devices that generate large amounts of heat during normal operation. The first challenge is how to ensure efficient dissipation of the generated heat to maintain normal operating temperatures. The second challenge is how to reduce shear stresses due to coefficient of thermal expansion (CTE) mismatch between materials in adjacent layers attached by solder or other adhesive materials.

[0003] FIG. 1 shows a typical electronic device 1 assembly including a device 2 connected to a substrate 4 via interconnect 3 (Level I). The substrate 4 is connected to a printed circuit board (PCB) 6 via interconnect 5 (Level II). The PCB 6 is connected to a heat sink 8 via interconnect 7 (Level III). The most important interconnects for high power electronic devices are the interconnects connecting the device / die to the substrate, the substrate to the printed circuit board (PCB), and the PCB to the heat sink (i.e., 3, 5, and 7 in FIG. 1). Such interconnects are in the path of heat dissipation. Therefore, high thermal conductivity of the interconnect material is desirable. The semiconductor die, substrate, and PCB materials have different CTEs, which creates stresses at the interfaces during high temperature operation. To minimize the stresses, designers usually increase the interface thickness of the interconnects, which increases the thermal resistance of the interfaces.

[0004] Solder is one of the most common interconnect materials used in the electronics industry. The thermal conductivity of most solders is less than 65 W / mK. It would be advantageous to be able to use an interconnect material with a higher thermal conductivity to aid in heat dissipation. Another problem with thick solder interconnects is that during the reflow process, when the solder is in the liquid phase, the die or substrate floats on the liquid material before it cools below the freezing temperature of the solder. This results in die / substrate movement in all directions (so-called "tilt"), which is an issue for device performance and reliability. Controlling this die movement is a challenge. Summary of the Invention

[0005] The present invention seeks to address at least some of the problems associated with the prior art, or at least provide a commercially acceptable alternative thereto.

[0006] In a first aspect, the present invention provides a solder material for use in an electronic assembly, comprising: The solder material is A solder layer; a core layer including a core material, the core layer being sandwiched between the solder layers; The thermal conductivity of the core material is greater than that of the solder.

[0007] Each aspect or embodiment defined in this specification may be combined with any other aspect or embodiment unless expressly indicated otherwise. In particular, any feature indicated as being preferred or advantageous may be combined with any other feature indicated as being preferred or advantageous.

[0008] The inventors have surprisingly discovered that such solder materials, when used to connect components of electronic devices operating at high temperatures, have the potential to reduce stress caused by mismatched CTE values ​​of the connected components. Without wishing to be bound by theory, it is believed that the presence of the core material acts to "thicken" the joint between the connected components, thereby reducing stress. Advantageously, such stress reduction may be provided without significantly reducing heat dissipation from the connected components. Without wishing to be bound by theory, it is believed that this is because the thermal conductivity of the core material is greater than that of the solder. In other words, by using a core material with a thermal conductivity greater than that of the solder, it is possible to thicken the joint and reduce thermal stress without reducing heat dissipation. As a result, high power electronic devices, such as IGBTs, MOSFETs, high power LEDs, high power microprocessors, or other large area devices, which generate a lot of heat during normal operation, and whose components are connected using solder materials, may exhibit improved performance and / or reliability. Such performance and reliability may be improved at high temperatures and / or during on / off switching.

[0009] Joints or interconnects formed using the solder materials may have better thermo-mechanical reliability compared to typical Pb-free solders such as SnCu, SAC, SnAg, and SnBi.

[0010] The term "electronic assembly" as used herein encompasses, for example, the assembly of electronic packages and devices and may include, for example, the attachment of a device or die to a substrate, the attachment of a substrate to a printed circuit board, or the attachment of a printed circuit board to a heat sink.

[0011] As used herein, the term "solder" includes any fusible metal or metal alloy having a melting point in the range of 90-400°C.

[0012] The solder material includes a solder layer and a core layer. The solder material can consist essentially of or consist of the solder layer and the core layer. By "consisting essentially of," it is meant that the solder material can include other non-specified components as long as they do not materially affect the properties of the solder material.

[0013] The solder material typically includes two solder layers, but may include three or more solder layers. The solder layers may be formed of the same solder or different solders. Typically, the solder layers are formed of the same solder or at least solders that have similar reflow temperatures, i.e., liquidus temperatures that differ by no more than 20° C., typically no more than 10° C., and more typically no more than 5° C.

[0014] The solder and core are in the form of layers. Such layers will typically be in the form of sheets with two opposing surfaces (major surfaces) having a significantly larger surface area than the other surfaces. The solder layers may be the same size and shape, or may be different sizes and / or shapes. The core layer may have a similar size and shape to one or more of the solder layers, or may have a different size and / or shape.

[0015] The core layer comprises a core material. The core layer can consist essentially of or consist of the core material.

[0016] The core layer is sandwiched between the solder layers. Typically, the solder layers will cover substantially the entirety of at least two opposing surfaces of the core layer, typically the major (i.e., largest surface area) surfaces. The core layer may be completely encapsulated within the solder such that the core material is not exposed. In such a situation, the first solder sheet is considered to cover the major surface of the sheet, the second solder layer covers the opposing major surface of the sheet, and the two solder layers "hang down" onto the major surfaces, thereby covering the remaining surface of the core layer. Alternatively, the core layer may be covered by the solder layers on only a portion of its surface, typically only on the two opposing surfaces, more typically on the major surface.

[0017] The solder layer is typically in direct contact with the core layer. The solder layer is typically an outer layer.

[0018] The thermal conductivity of the core material is greater than that of the solder, and typically such thermal conductivity is measured by a nano-flash transient measurement technique.

[0019] The core material preferably has a thermal conductivity of 65 W / mK or greater, preferably greater than 65 W / mK, more preferably greater than 70 W / mK, even more preferably greater than 75 W / mK. Such thermal conductivity may be measured by nano-flash transient measurement techniques. Typical solders used in electronic assemblies have thermal conductivities less than 65 W / mK, so the presence of a core material with high thermal conductivity increases the overall thermal conductivity of the solder material.

[0020] The melting point of the core material is preferably higher than the reflow temperature of the solder. For example, the core material may have a melting temperature at least 50° C. higher, typically at least 75° C. higher, and more typically at least 100° C. higher than the reflow temperature of the solder. The term “reflow temperature” is used herein to refer to a temperature above which a solid mass of solder will definitely melt (as opposed to simply softening). Below this temperature, the solder will not flow. When heated again above that temperature, the solder will flow again, i.e., “reflow”. By having a core material with a melting temperature higher than the reflow temperature of the solder, the thickness of the joint / interconnect may be increased without a substantial increase in die / package movement and / or tilt, which results from the die / package floating above the liquid solder when the solder is in a liquid state. This may improve the performance or reliability of electronic devices having components connected using the solder material.

[0021] The thickness of the core layer is preferably 100-500 μm, more preferably 200-400 μm, and even more preferably 150-300 μm. Such a thickness may be particularly suitable for reducing stress caused by the mismatch of CTE of components without excessively increasing the size of the electronic device. With increasing thickness, the heat resistance may be increased. With a relatively large thickness, the heat resistance may be increased, but the lateral stress may be reduced.

[0022] The thickness of each solder layer is preferably 25-150 μm, more preferably 50-100 μm. Such a thickness may be particularly suitable to provide adequate adhesion between components without significantly reducing the overall thermal conductivity of the solder material or excessively increasing the size of the device. A smaller thickness may result in higher lateral stresses during high temperature operation of temperature cycles.

[0023] The thickness of the core and solder layers can be selected as desired by the package design and to achieve the desired thickness of the interconnects.

[0024] The core material preferably comprises (or consists of, or consists essentially of) metals and / or metal alloys, which may provide sufficient electrical conductivity to provide a high level of electrical connection between the components joined by the soldering material.

[0025] The core material preferably comprises (or consists of, or consists essentially of) one or more of copper, silver, nickel, molybdenum, beryllium, cobalt, iron, copper-tungsten alloy, nickel-silver alloy, copper-zinc alloy, and copper-nickel-zinc alloy, more preferably one or more of copper and silver. Such materials may provide a favorable combination of high electrical conductivity and high thermal conductivity.

[0026] The CTE of the core material affects the stress at the interface, which can be reduced by choosing an appropriate core material. For example, the CTE of nickel is 13 ppm / K and the CTE of copper is 17 ppm / K, and the CTE of CuW alloys depends on the composition and can be tailored to meet the needs of the device design.

[0027] The core material preferably has an electrical conductivity of at least 1×10 S / m, more preferably at least 1×10 S / m, more preferably at least 1×10 S / m, even more preferably at least 4×10 S / m, and even more preferably at least 5×10 S / m at 20° C. Such electrical conductivity may provide a high level of electrical connection between components joined by the soldering material.

[0028] The solder is preferably lead-free, meaning that no lead is intentionally added. Thus, the lead content is zero or below incidental impurity levels. Lead-free solder may be preferred in light of health concerns and regulatory requirements.

[0029] The solder is preferably selected from the group consisting of In, SnIn alloys (e.g., 5 to 58% Sn, 42 to 95% In), SnBi alloys (e.g., 42 to 60% Sn, 40 to 58% Bi), BiIn alloys (e.g., 5 to 67% Bi, 33 to 95% In), AgIn alloys (e.g., 1 to 5% Ag, 95 to 99% In, e.g., 3% Ag, 97% In), SnAg alloys (e.g., 90 to 97.5% Sn, 2.5 to 10% Ag), SnCu alloys (e.g., 99.3 to 99.6% Sn, 0.4 to 0.7% Cu), InGa alloys (e.g., 99.3 to 99.5% In, 0.5 to 0.7% Ga), SnBiAgCu alloys (e.g., 50% Sn, 47% Bi, 1% Ag, 2% Cu), and SnBiZn alloys. (e.g. 65.5% Sn, 31.5% Bi, 3% Zn), SnInAg alloys (e.g. 77.2% Sn, 20% In, 2.8% Ag), SnBiAgCuIn alloys (e.g. 82.3% Sn, 2.2% Bi, 3% Ag, 0.5% Cu, 12% In), SnZn alloys (e.g. 91% Sn, 9% Zn), SnCuInGa alloys (e.g. For example, the alloys may include one or more of: SnCuAg alloys (e.g., 92.8% Sn, 0.7% Cu, 6% In, 0.5% Ga), SnCuAg alloys (e.g., 95.5% Sn, 3.8% Ag, 0.7% Cu), SnAgSb alloys (e.g., 95% Sn, 3.5% Ag, 1.5% Sb), and SnCuSb alloys (e.g., 4-95% Sn, 1-2% Cu, 4% Sb). The % values ​​refer to weight %. The alloys may contain the listed elements along with any unavoidable impurities. Such alloys may be particularly suitable for connecting components of electrical devices.

[0030] In a preferred embodiment, the core material comprises copper and the solder comprises a Sn-20In-2Ag alloy.

[0031] The solder material is preferably in the form of a foil, strip, film, ribbon or preform, which may be particularly suitable for connecting components of electronic devices and / or may exhibit favorable handling properties.

[0032] In a preferred embodiment, the core is completely coated with solder. In other words, the core is completely surrounded by solder and no part of the core is exposed. In this case, no part of the core material is exposed to air or other operating environment. This design may be preferred for core materials that tend to oxidize when exposed to oxygen and / or humidity, such as, for example, Cu or Ni.

[0033] In an alternative preferred embodiment, the core is coated with solder on only the two large opposing surfaces, typically the two largest opposing surfaces (major surfaces). This design may be relatively simple for mass production, as large size sheets or ribbons can be coated with solder and preforms can be cut from it in a high speed stamping process.

[0034] The solder material preferably has an effective thermal conductivity of greater than 65 W / mK, more preferably greater than 80 W / mK, even more preferably greater than 100 W / mK, even more preferably greater than 130 W / mK. By "effective thermal conductivity" is meant the total thermal conductivity of the solder material, i.e. including both the solder (which has a lower thermal conductivity) and the core (which has a higher thermal conductivity). Such an effective thermal conductivity may improve heat dissipation from the solder material.

[0035] A first aspect of the present invention relates to a solder material. The term "solder material" may be synonymous with the term "multilayer structure". Furthermore, the term "solder layer" is synonymous with the term "two or more solder layers". Further, for the avoidance of doubt, a solder layer includes a solder material. A solder layer is typically an outer layer.

[0036] Accordingly, a first aspect of the invention may alternatively be referred to as a multi-layer material for use in an electronic assembly, the multi-layer material comprising: two or more (e.g., outer) solder layers, each solder layer comprising a solder material; a core layer including a core material, the core layer being sandwiched between two or more solder layers; The thermal conductivity of the core material is greater than the thermal conductivity of the solder material.

[0037] In a further aspect, the present invention provides a solder joint comprising the solder material described herein. For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. Such joints may exhibit a favorable combination of low stress caused by the CTE mismatch of the joined components and high heat dissipation. Thus, electronic devices containing such joints may exhibit improved performance and reliability compared to conventional electronic devices. The thickness of the solder joint corresponds to the sum of the thicknesses of the core layer and the solder layer. Typically, the thickness does not change during reflow.

[0038] In a further aspect, the present invention provides an interconnect comprising the solder material described herein. For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. Such an interconnect may exhibit a favorable combination of low stress caused by the CTE mismatch of the joined components and high heat dissipation. Thus, electronic devices containing such an interconnect may exhibit improved performance and reliability compared to conventional electronic devices.

[0039] In a further aspect, the present invention provides an electronic device comprising a solder material, solder joint, or interconnect as described herein. For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. Such an electronic device may exhibit improved performance and reliability compared to conventional electronic devices.

[0040] In a further aspect, the present invention provides an IGBT, MOSFET, LED, or microprocessor comprising a solder material, solder joint, or interconnect as described herein. For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. Such electronic devices may exhibit improved performance and reliability compared to conventional electronic devices.

[0041] In a further aspect, the present invention provides the use of the solder material described herein in a soldering method selected from surface mount technology (SMT) soldering, die attach soldering, thermal interface soldering, hand soldering, laser and RF induction soldering, and thermosonic soldering. For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect. The solder material described herein is particularly suitable for such applications.

[0042] In a further aspect, the present invention provides the use of the solder material described herein for die attach (Level I), substrate attach (Level II) or package to heat sink attachment (Level III). For the avoidance of doubt, the advantages and preferred features of the first aspect apply equally to this aspect.

[0043] The solder materials described herein are particularly well suited for such applications.

[0044] In a further aspect, the present invention provides a method of forming a solder joint, the method comprising: Providing a solder material as described herein adjacent two or more workpieces to be joined; and heating the solder material to form a soldered joint.

[0045] For the avoidance of doubt, the advantages and preferred features of the first embodiment apply equally to this embodiment. The resulting joint may exhibit a favorable combination of low stress caused by the CTE mismatch of the joined components and high heat dissipation. Electronic devices containing such joints may therefore exhibit improved performance and reliability compared to conventional electronic devices.

[0046] The two or more workpieces to be joined are preferably A device or die and a substrate, or Circuit boards and printed circuit boards (PCBs), or a printed circuit board and a heat sink.

[0047] Such workpieces are particularly suitable for joining by solder materials because they are required to have high heat dissipation and it is beneficial for them to exhibit low stress resulting from CTE mismatch.

[0048] In a further aspect, the present invention provides a method of making the solder material described herein, comprising the steps of: providing two or more solder layers; Providing a layer of core material; laminating a layer of solder on either side of the layer of core material.

[0049] For the avoidance of doubt, the advantages and preferred features of the first embodiment apply equally to this embodiment. Depending on the solder and core materials and processing conditions, the thickness of the structure after lamination will be reduced. To achieve the target dimensions, the reduction factor needs to be taken into account.

[0050] The layer of core material is preferably in the form of a ribbon and / or the layer of solder is in the form of a ribbon.

[0051] The ribbon is preferably provided by casting, extrusion or drawing.

[0052] The layers are preferably laminated in a co-stretch process, preferably a high pressure co-stretch process.

[0053] The laminated layers are preferably diced and / or punched.

[0054] In a further aspect, the present invention provides a method of making the solder material described herein, comprising the steps of: Providing a layer of core material; and coating the core material with solder.

[0055] The surface of the layer of core material is preferably cleaned before being coated with solder, which may enhance adhesion between the core and the solder, thereby reducing the occurrence of delamination and loss of reliability in devices containing joints formed using the solder material.

[0056] Coating the core material with solder preferably involves contacting the core material with a bath of molten solder, for example by immersing the core material in the bath of molten solder.

[0057] Various process parameters such as the solder bath temperature, the ribbon speed through the solder bath, etc. can be varied to control the thickness of the solder coating. [Brief description of the drawings]

[0058] The invention will now be described with reference to the following non-limiting drawings. [Figure 1] 1 shows a schematic diagram of a typical electronic device assembly. [Diagram 2] 1 shows a cross-sectional schematic view of an alternative arrangement of solder material according to the present invention; [Diagram 3] 1 shows a microscope image of a cross section of a solder material according to the present invention.

[0059] Figure 2 shows cross-sectional views of two solder materials according to the present invention. The solder materials include a core layer 9 sandwiched between solder layers 10. The solder material shown in the top picture has solder only on the top and bottom sides. There is no solder on the sides. The other solder material has solder on all sides of the core. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0060] The invention will now be described with reference to the following non-limiting examples.

[0061] Example 1 The solder material (preform) was prepared by a high pressure lamination process. Figure 3 shows a microscope image of the cross section of the preform. The central core is 300 μm thick and is made of copper. The solder on both sides is Sn20%In2%Ag. The solder thickness varies from 50 to 100 μm. The effective thermal conductivity of the sample is about 130 W / mK, measured by nano-flash transient measurement technique.

[0062] Example 2 Several preforms were prepared in a similar manner to Example 1, but with varying thicknesses of the core (Keff=400 W / mK) and solder layer (Keff=54 W / mK). The thermal performance of the preforms was evaluated. Table 1 shows the estimated thermal resistance and equivalent thermal conductivity. Compared to solder alone, the thermal resistance of the thick interface is much lower (equivalent Keff is much higher).

[0063] [Table 1]

[0064] The invention is now further described by the following numbered clauses: Article 1. a core comprising a core material; a solder at least partially coating the core; , including solder materials. Clause 2. A solder material as described in clause 1 for use in electronic assemblies. Clause 3. The solder material of clause 1 or clause 2, wherein the core is in the form of a layer. Clause 4. The solder material according to clause 3, wherein the thickness of the core layer is 100 to 500 μm, preferably 200 to 400 μm, and more preferably 150 to 300 μm. Clause 5. A solder material according to clause 3 or clause 4, wherein the solder is in the form of a layer and the core is sandwiched between two solder layers. Clause 6. The solder material according to clause 6, wherein the thickness of the solder layer is 25 to 150 μm, preferably 50 to 100 μm. Clause 7. The solder material of any one of the preceding clauses in the form of a foil, strip, film, ribbon, or preform. Clause 8. A solder material according to any one of the preceding claims, wherein the melting point of the core material is higher than the reflow temperature of the solder. Clause 9. A solder material according to any one of the preceding clauses, wherein the thermal conductivity of the core material is greater than the thermal conductivity of the solder. Clause 10. The solder material of clause 9, wherein the core material has a thermal conductivity of 65 W / mK or greater, preferably greater than 65 W / mK, more preferably greater than 70 W / mK, even more preferably greater than 75 W / mK. Clause 11. A solder material according to any one of the preceding clauses, wherein the core material comprises a metal and / or an alloy. Clause 12. Core material is copper, silver, nickel, molybdenum, beryllium, cobalt, iron , a copper-tungsten alloy, a nickel-silver alloy, a copper-zinc alloy, and a copper-nickel-zinc alloy. Clause 13. A solder material according to any one of the preceding clauses, wherein the solder does not contain lead. Clause 14. The solder is not to be used with In, SnIn alloys (e.g., 5-58% Sn, 42-95% In), SnBi alloys (e.g., 42-60% Sn, 40-58% Bi), BiIn alloys (e.g., 5-67% Bi, 33-95% In), AgIn alloys (e.g., 3% Ag, 97% In), SnAg alloys (e.g., 90-97.5% Sn, 2. 5-10% Ag), SnCu alloys (e.g., 99.3-99.6% Sn, 0.4-0.7% Cu), InGa alloys (e.g., 99.3-99.5% In, 0.5-0.7% Ga), SnBiAgCu alloys (e.g., 50% Sn, 47% Bi, 1% Ag, 2% Cu), SnBiZn alloys (e.g., 65.5% Sn, 31.5% Bi, 3% Zn), SnInAg alloy (e.g., 77.2% Sn, 20% In, 2.8% Ag), SnBiAgCuIn alloy (e.g., 82.3% Sn, 2.2% Bi, 3% Ag, 0.5% Cu, 12% In), SnZn alloy (e.g., 91% Sn, 9% Zn), SnCuInGa alloy (e.g., 92.8% Sn, 0.7% Cu, 6% In, 0.5% Ga), SnCuAg alloy (e.g., 95.5% Sn, 3.8% Ag, 0.7% Cu), SnAgSb alloy (e.g., 95% Sn, 3.5% Ag, 1.5% Sb), and SnCuSb alloy (e.g., 4-95% Sn, 1-2% Cu, 4% Sb). Clause 15. The solder material of any one of the preceding clauses, wherein the core material comprises copper and the solder comprises a Sn-20In-2Ag alloy. Clause 16. A solder material according to any one of the preceding clauses, wherein the core and solder are in the form of layers, the solder layers being coated on either side of the core layer. Clause 17. The solder material according to clause 16, wherein the thickness of the core layer is 100 to 500 μm, preferably 200 to 400 μm, and more preferably 150 to 300 μm. Clause 18. The solder material according to clause 16 or clause 17, wherein the thickness of the solder layer is 25 to 150 μm, preferably 50 to 100 μm. Clause 19. A solder material according to any one of the preceding clauses, wherein the core is completely coated with solder. Clause 2. The solder material according to any one of the preceding clauses, having an effective thermal conductivity of more than 65 W / mK, preferably more than 80 W / mK, more preferably more than 100 W / mK, even more preferably more than 130 W / mK. Clause 21. Use of a solder material according to any one of the preceding clauses in a soldering method selected from Surface Mount Technology (SMT) soldering, die attach soldering, thermal interface soldering, hand soldering, laser and RF induction soldering, and thermosonic soldering. Clause 22. Use of a solder material according to any one of clauses 1 to 20 for die attach (Level I), substrate attach (Level II) or package to heat sink attach (Level III). Clause 23. An interconnect comprising the solder material of any one of clauses 1-20. Clause 24. An IGBT, MOSFET, LED, or microprocessor comprising the solder material of any one of clauses 1 to 20 or the interconnect of clause 23. Clause 25. A method of forming a solder joint, comprising: Providing a solder material according to any one of clauses 1 to 20 adjacent two or more workpieces to be joined; and heating the solder material to form a soldered joint. Clause 26. A method for producing the solder material according to any one of clauses 1 to 20, comprising: providing two or more layers of solder; Providing a layer of core material; laminating a layer of solder on either side of the layer of core material. Clause 27. A method according to clause 26, wherein the layer of core material is preferably in the form of a ribbon and / or the layer of solder is in the form of a ribbon. Clause 28. The method of clause 27, wherein the ribbon is provided by casting, extrusion, or drawing. Clause 29. The method of any one of clauses 26 to 28, wherein the layers are laminated by a co-stretching process, preferably a high pressure co-stretching process. Clause 30. The method of any one of clauses 26 to 29, wherein the laminated layers are diced and / or punched. Clause 31. A method for producing the solder material according to any one of clauses 1 to 20, comprising: Providing a layer of core material; and coating the core material with solder. Clause 32. The method of clause 31, wherein the surface of the layer of core material is cleaned before being coated with solder. Clause 33. The method of clause 31 or clause 33, wherein coating the core material with solder comprises passing the core material through a bath of molten solder.

[0065] The foregoing detailed description has been provided by way of illustration and description and is not intended to limit the scope of the appended claims. Many variations of the presently preferred embodiments described herein will be apparent to those of ordinary skill in the art and remain within the scope of the appended claims and their equivalents.

Claims

1. 1. A solder material for use in an electronic assembly, comprising: A solder layer; a core layer including a core material, the core layer being sandwiched between the solder layers; A solder material, wherein the thermal conductivity of the core material is greater than the thermal conductivity of the solder.

2. 2. The solder material of claim 1, wherein the core material has a thermal conductivity of 65 W / m.K or more, preferably greater than 65 W / m.K, more preferably greater than 70 W / m.K, even more preferably greater than 75 W / m.K.

3. The solder material according to claim 1 or 2, wherein the melting point of the core material is higher than the reflow temperature of the solder.

4. The solder material according to any one of claims 1 to 3, wherein the core layer has a thickness of 100 to 500 μm, preferably 200 to 400 μm, more preferably 150 to 300 μm.

5. The solder material according to any one of the preceding claims, wherein the thickness of each solder layer is between 25 and 150 μm, preferably between 50 and 100 μm.

6. The solder material according to any one of the preceding claims, wherein the core material comprises a metal and / or an alloy.

7. 7. The solder material of claim 1, wherein the core material comprises one or more of copper, silver, nickel, molybdenum, beryllium, cobalt, iron, a copper-tungsten alloy, a nickel-silver alloy, a copper-zinc alloy, and a copper-nickel-zinc alloy.

8. The solder material according to any one of claims 1 to 7, wherein the solder is lead-free.

9. The solder may be selected from the group consisting of In, SnIn alloys (e.g., 5-58% Sn, 42-95% In), SnBi alloys (e.g., 42-60% Sn, 40-58% Bi), BiIn alloys (e.g., 5-67% Bi, 33-95% In), AgIn alloys (e.g., 3% Ag, 97% In), SnAg alloys (e.g., 90-97.5% Sn, 2.5- 10% Ag), SnCu alloys (e.g., 99.3-99.6% Sn, 0.4-0.7% Cu), InGa alloys (e.g., 99.3-99.5% In, 0.5-0.7% Ga), SnBiAgCu alloys (e.g., 50% Sn, 47% Bi, 1% Ag, 2% Cu), SnBiZn alloys (e.g., 65.5% Sn, 31.5% Bi, 3% 9. The solder material of claim 1, comprising one or more of the following alloys: Sn, In, Zn; SnInAg alloy (e.g., 77.2% Sn, 20% In, 2.8% Ag); SnBiAgCuIn alloy (e.g., 82.3% Sn, 2.2% Bi, 3% Ag, 0.5% Cu, 12% In); SnZn alloy (e.g., 91% Sn, 9% Zn); SnCuInGa alloy (e.g., 92.8% Sn, 0.7% Cu, 6% In, 0.5% Ga); SnCuAg alloy (e.g., 95.5% Sn, 3.8% Ag, 0.7% Cu); SnAgSb alloy (e.g., 95% Sn, 3.5% Ag, 1.5% Sb); and SnCuSb alloy (e.g., 4-95% Sn, 1-2% Cu, 4% Sb).

10. The solder material of any one of claims 1 to 9, wherein the core material comprises copper and the solder comprises a Sn-20In-2Ag alloy.

11. The solder material according to any one of claims 1 to 10 in the form of a foil, strip, film, ribbon or preform.

12. The solder material according to any one of the preceding claims, wherein the core is fully coated with the solder.

13. 13. The solder material according to any one of claims 1 to 12, having an effective thermal conductivity of more than 65 W / m.K, preferably more than 80 W / m.K, more preferably more than 100 W / m.K, even more preferably more than 130 W / m.K.

14. A solder joint comprising the solder material according to any one of claims 1 to 13.

15. An interconnect comprising the solder material of any one of claims 1 to 13.

16. An IGBT, a MOSFET, an LED, or a microprocessor comprising the solder material according to any one of claims 1 to 13, the solder joint according to claim 14, or the interconnect according to claim 15.

17. Use of the solder material according to any one of claims 1 to 13 in a soldering method selected from Surface Mount Technology (SMT) soldering, die attach soldering, thermal interface soldering, hand soldering, laser and RF induction soldering and thermosonic soldering.

18. Use of the solder material according to any one of claims 1 to 13 for die attach (Level I), substrate attach (Level II) or package to heat sink attachment (Level III).

19. 1. A method of forming a solder joint, comprising: Providing a solder material according to any one of claims 1 to 13 adjacent to two or more workpieces to be joined; and heating the solder material to form a soldered joint.

20. The two or more workpieces to be joined are A device or die and a substrate, or Substrates and printed circuit boards (PCBs), or The method of claim 19 including a printed circuit board and a heat sink.

21. A method for producing a solder material according to any one of claims 1 to 13, comprising the steps of: Providing two or more layers of solder; Providing a layer of core material; laminating a layer of the solder on either side of the layer of core material.

22. 22. The method of claim 21, wherein the layer of core material is in the form of a ribbon and / or the layer of solder is in the form of a ribbon.

23. The method of claim 22, wherein the ribbon is provided by casting, extrusion, or drawing.

24. A method according to any one of claims 21 to 23, wherein the layers are laminated in a co-stretching process, preferably a high pressure co-stretching process.

25. The method according to any one of claims 21 to 24, wherein the laminated layers are diced and / or punched.

26. A method for producing a solder material according to any one of claims 1 to 13, comprising the steps of: Providing a layer of core material; and coating the core material with solder.

27. 27. The method of claim 26, wherein the surface of the layer of core material is cleaned before being coated with the solder.

28. 28. The method of claim 26 or 27, wherein coating the core material with solder comprises contacting the core material with a bath of molten solder.

Images