Imaging element and electronic device

Abstract

To provide an imaging element having a more suitable configuration.SOLUTION: An imaging element includes a pixel substrate on which a plurality of pixels are formed, each having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge storage unit, a separation unit formed on the pixel substrate at a boundary between the photoelectric conversion units, and a buried electrode buried adjacent to a corner of the photoelectric conversion unit in the separation unit. The buried electrode is formed as the charge storage unit of the pixel, and is formed such that its size differs in a first direction and a second direction along the photoelectric conversion unit in a plan view. The present disclosure can be applied to, for example, a CMOS image sensor.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present disclosure relates to an imaging element and an electronic device, and more particularly to an imaging element and an electronic device that make it possible to provide an imaging element with a more suitable configuration. [Background technology]

[0002] Patent Document 1 discloses an imaging element having a separation portion arranged at the boundary between pixels arranged on a semiconductor substrate, and an embedded electrode embedded in the front surface side of the semiconductor substrate at the boundary between pixels that overlaps with the separation portion and connected to the semiconductor substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2022 / 138914 Summary of the Invention [Problem to be solved by the invention]

[0004] In the imaging element of Patent Document 1, no consideration is given to the resistance of the buried electrodes and the influence of the electric field between the charge transfer portion and the buried electrodes.

[0005] The present disclosure has been made in consideration of the above circumstances, and makes it possible to provide an imaging element with a more suitable configuration. [Means for solving the problem]

[0006] An imaging element according to a first aspect of the present disclosure includes a pixel substrate on which a plurality of pixels are formed, each pixel having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge holding unit, a separation unit formed in the pixel substrate at the boundary between the photoelectric conversion units, and a buried electrode embedded adjacent to a corner of the photoelectric conversion unit in the separation unit, the buried electrode being formed as the charge holding unit of the pixel and being formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion unit in a planar view.

[0007] The electronic device of a first aspect of the present disclosure is an electronic device comprising: a pixel substrate on which a plurality of pixels are formed, each pixel having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge holding unit; a separation unit formed in the pixel substrate at the boundary between the photoelectric conversion units; and a buried electrode embedded adjacent to a corner of the photoelectric conversion unit in the separation unit, the buried electrode being formed as the charge holding unit of the pixel and having an imaging element formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion unit in a planar view.

[0008] An imaging element according to a second aspect of the present disclosure includes a pixel substrate on which phase difference pixels are formed, each having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer charges generated by each of the photoelectric conversion units to a charge holding unit, and a circuit substrate stacked on the pixel substrate and on which pixel transistors are formed, the charge holding units being formed at an intermediate position between the two photoelectric conversion units when viewed in a plan view from the stacking direction, and the charge transfer units being an imaging element having a plurality of vertical gate electrodes arranged on the photoelectric conversion units so as to straddle a region having the maximum potential within the photoelectric conversion units.

[0009] The electronic device of a second aspect of the present disclosure is an electronic device comprising: a pixel substrate on which phase difference pixels are formed, each having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer charges generated by each of the photoelectric conversion units to a charge holding unit; and a circuit substrate stacked on the pixel substrate and on which pixel transistors are formed, the charge holding units being formed at an intermediate position between the two photoelectric conversion units when viewed in a planar view from the stacking direction; and the charge transfer units being an imaging element having a plurality of vertical gate electrodes arranged on the photoelectric conversion units so as to straddle a region that has the maximum potential within the photoelectric conversion units.

[0010] In the first aspect of the present disclosure, the buried electrode is formed as a charge retention portion of the pixel, and is formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion portion in a plan view.

[0011] In a second aspect of the present disclosure, a charge retention section is formed at an intermediate position between two photoelectric conversion sections when viewed in a planar view from the stacking direction, and a charge transfer section is provided with a plurality of vertical gate electrodes arranged on the photoelectric conversion section so as to straddle a region having the maximum potential within the photoelectric conversion section. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a block diagram showing an example of the configuration of an imaging device. [Diagram 2] FIG. 2 is a block diagram showing a configuration example of a sensor element. [Diagram 3] FIG. 2 is a diagram illustrating an example of a circuit configuration of a pixel. [Figure 4] FIG. 2 is a plan view illustrating a first configuration example of a pixel according to the first embodiment. [Diagram 5] FIG. 2 is a cross-sectional view showing a first configuration example of a pixel according to the first embodiment. [Figure 6] FIG. 4 is a plan view showing a second configuration example of the pixel according to the first embodiment. [Figure 7] FIG. 4 is a cross-sectional view showing a second configuration example of the pixel according to the first embodiment. [Figure 8] FIG. 4 is a plan view showing a third configuration example of the pixel according to the first embodiment. [Figure 9] FIG. 4 is a cross-sectional view showing a third configuration example of the pixel according to the first embodiment. [Figure 10] FIG. 11 is a plan view showing a fourth configuration example of the pixel according to the first embodiment. [Figure 11] FIG. 11 is a cross-sectional view showing a fourth configuration example of the pixel according to the first embodiment. [Figure 12] FIG. 11 is a cross-sectional view showing a fifth configuration example of the pixel according to the first embodiment. [Figure 13] 1A and 1B are diagrams for explaining the degree of freedom in arranging vertical gate electrodes; [Figure 14] 1A and 1B are diagrams for explaining the trade-off between charge transfer efficiency and pinning. [Figure 15] 11A and 11B are a plan view and a cross-sectional view showing a first configuration example of a pixel according to a second embodiment. [Figure 16] 13A and 13B are a plan view and a cross-sectional view showing a second configuration example of a pixel according to a second embodiment. [Figure 17] 13A and 13B are a plan view and a cross-sectional view showing a third configuration example of a pixel according to the second embodiment. [Figure 18] 13A and 13B are a plan view and a cross-sectional view showing a fourth configuration example of a pixel according to the second embodiment. [Figure 19] 13A and 13B are a plan view and a cross-sectional view showing a fifth configuration example of a pixel according to the second embodiment. [Figure 20] FIG. 11 is another cross-sectional view showing the fifth configuration example of the pixel according to the second embodiment. [Figure 21] 13A and 13B are a plan view and a cross-sectional view showing a sixth configuration example of a pixel according to the second embodiment. [Figure 22] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Diagram 23] 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Modes for carrying out the present disclosure (hereinafter, referred to as embodiments) will be described below in the following order.

[0014] 1. Example of imaging device configuration 2. Example of sensor element configuration 3. First embodiment (embedded electrodes having different sizes in the first and second directions) 4. Second embodiment (vertical gate electrode arranged across the sensor potential) 5. Application examples for mobile objects

[0015] <1. Configuration example of imaging device> Here, the technology according to the present disclosure will be described as an example in which it is applied to an imaging device. However, the technology according to the present disclosure can be applied to imaging devices such as digital still cameras and video cameras, as well as to electronic devices in general that use an imaging element (solid-state imaging device) in an image capture section, such as portable terminal devices with imaging functions such as mobile phones, and copying machines that use an imaging device in an image reading section. Note that a modular form mounted on an electronic device, i.e., a camera module, may also be used as the imaging element.

[0016] FIG. 1 is a block diagram showing an example of the configuration of an imaging device that is an example of an electronic device according to the present disclosure.

[0017] As shown in FIG. 1, the imaging device 1 has an optical system including a lens group 10, a sensor element 20, a DSP circuit 30, a frame memory 40, a display unit 50, a recording unit 60, an operation system 70, a power supply system 80, and the like.

[0018] The DSP circuit 30, frame memory 40, display unit 50, recording unit 60, operation system 70, and power supply system 80 are connected to one another via a bus line 90. The CPU 100 controls each unit within the imaging device 1.

[0019] The lens group 10 captures incident light (image light) from a subject and forms an image on the imaging surface of the sensor element 20. The sensor element 20 converts the amount of incident light formed on the imaging surface by the lens group 10 into an electrical signal on a pixel-by-pixel basis and outputs it as a pixel signal. As this sensor element 20, an imaging element (image sensor) including pixels described below can be used.

[0020] The display unit 50 is composed of a panel-type display unit such as a liquid crystal display unit or an organic EL (Electro Luminescence) display unit, and displays moving or still images captured by the sensor element 20. The recording unit 60 records the moving or still images captured by the sensor element 20 on a recording medium such as a memory card, a DVD (Digital Versatile Disc), or a video tape.

[0021] Under the operation of a user, the operation system 70 issues operation commands for various functions of the imaging device 1. The power supply system 80 appropriately supplies various types of power to the DSP circuit 30, the frame memory 40, the display unit 50, the recording unit 60, and the operation system 70 as operating power sources to these supply targets.

[0022] 2. Sensor element configuration FIG. 2 is a block diagram showing an example of the configuration of the sensor element 20. As shown in FIG.

[0023] The sensor element 20 may be configured as an imaging element such as a complementary metal oxide semiconductor (CMOS) image sensor.

[0024] The sensor element 20 is configured to include a pixel array section 121, a vertical drive section 122, a column processing section 123, a horizontal drive section 124, and a system control section 125. The pixel array section 121, the vertical drive section 122, the column processing section 123, the horizontal drive section 124, and the system control section 125 are formed on a semiconductor substrate (chip) not shown.

[0025] In the pixel array section 121, unit pixels each having a photoelectric conversion section that generates and internally accumulates a photoelectric charge in an amount corresponding to the amount of incident light are arranged two-dimensionally in a matrix. In the following, the photoelectric charge in an amount corresponding to the amount of incident light is simply referred to as "charge", and the unit pixel is simply referred to as "pixel".

[0026] Furthermore, in the pixel array unit 121, pixel drive lines 126 are formed for each row of the matrix-like pixel arrangement along the left-right direction of the figure (the direction in which pixels in the pixel rows are arranged), and vertical signal lines 127 are formed for each column along the up-down direction of the figure (the direction in which pixels in the pixel columns are arranged). One end of the pixel drive lines 126 is connected to an output terminal of the vertical drive unit 122 corresponding to each row.

[0027] The sensor element 20 further includes a signal processing unit 128 and a data storage unit 129. The signal processing unit 128 and the data storage unit 129 may be an external signal processing unit provided on a substrate separate from the sensor element 20, such as a DSP (Digital Signal Processor) or software processing, or may be mounted on the same substrate as the sensor element 20.

[0028] The vertical drive unit 122 is composed of a shift register, an address decoder, etc., and drives each pixel of the pixel array unit 121 all at once or row by row, etc. Although the specific configuration of the vertical drive unit 122 is not shown in the figure, it is configured to have a readout scanning system and a sweep-out scanning system or a batch sweep-out and batch transfer system.

[0029] The readout scanning system sequentially selects and scans the unit pixels of the pixel array section 121 row by row to read out signals from the unit pixels. In the case of row driving (rolling shutter operation), for sweeping out, the sweeping out scan is performed for the readout row to be read out scanned by the readout scanning system, the sweeping out scan is performed a time period equal to the shutter speed prior to the readout scan. In the case of global exposure (global shutter operation), the sweeping out is performed a time period equal to the shutter speed prior to the batch transfer.

[0030] This sweeping out sweeps out (resets) unnecessary charges from the photoelectric conversion units of the unit pixels in the readout row. The sweeping out (resetting) of unnecessary charges performs a so-called electronic shutter operation. Here, the electronic shutter operation refers to the operation of discarding the photoelectric charges in the photoelectric conversion units and starting a new exposure (starting the accumulation of photoelectric charges).

[0031] The signal read by the readout operation by the readout scanning system corresponds to the amount of light that has entered since the previous readout operation or electronic shutter operation. In the case of row driving, the period from the readout timing of the previous readout operation or the sweep timing of the electronic shutter operation to the readout timing of the current readout operation is the accumulation period (exposure period) of the photocharge in the unit pixel. In the case of global exposure, the period from the collective sweep to the collective transfer is the accumulation period (exposure period).

[0032] The pixel signals output from each unit pixel in a pixel row selected and scanned by the vertical drive unit 122 are supplied to the column processing unit 123 through each vertical signal line 127. The column processing unit 123 performs predetermined signal processing on the pixel signals output from each unit pixel in the selected row through the vertical signal line 127 for each pixel column in the pixel array unit 121, and temporarily holds the pixel signals after signal processing.

[0033] Specifically, the column processing unit 123 performs at least noise removal processing, such as CDS (Correlated Double Sampling) processing, as signal processing. The CDS processing by the column processing unit 123 removes pixel-specific fixed pattern noise such as reset noise and threshold variation of an amplification transistor. Note that the column processing unit 123 may also have, in addition to the noise removal processing, an AD (Analog-Digital) conversion function, for example, to output the signal level as a digital signal.

[0034] The horizontal driving unit 124 is composed of a shift register, an address decoder, etc., and sequentially selects unit circuits corresponding to pixel columns in the column processing unit 123. By selective scanning by the horizontal driving unit 124, pixel signals that have been signal-processed in the column processing unit 123 are sequentially output to the signal processing unit 128.

[0035] The system control unit 125 is composed of a timing generator that generates various timing signals, and controls the driving of the vertical driving unit 122, the column processing unit 123, the horizontal driving unit 124, etc. based on the various timing signals generated by the timing generator.

[0036] The signal processing unit 128 has at least an addition processing function, and performs various signal processing such as addition processing on the pixel signals output from the column processing unit 123. The data storage unit 129 temporarily stores data necessary for signal processing in the signal processing unit 128.

[0037] FIG. 3 is a diagram showing an example of a circuit configuration of pixels arranged in the pixel array section 121. As shown in FIG.

[0038] 3 shows a pixel 150 and a pixel circuit 151 connected to the pixel 150. The pixel 150 shown in Fig. 3 adopts a pixel sharing unit configuration in which four pixels 150 share one pixel circuit 151.

[0039] Each of the multiple pixels 150 has a photoelectric conversion unit 161 and a charge transfer unit 162 electrically connected to the photoelectric conversion unit 161. On the other hand, the pixel circuit 151 has a floating diffusion (FD) 163 and three pixel transistors, specifically, a reset transistor 164, an amplification transistor 165, and a selection transistor 166.

[0040] The photoelectric conversion unit 161 is formed as a photodiode (PD) and generates and accumulates electric charges (signal charges) according to the amount of light received. The photoelectric conversion unit 161 has an anode terminal grounded and a cathode terminal connected to the FD 163 via the charge transfer unit 162.

[0041] When the charge transfer unit 162 is turned on by a transfer signal TR, the charge transfer unit 162 reads out the charge generated in the photoelectric conversion unit 161 and transfers it to the FD 163 .

[0042] The FD 163 holds the charge read out from the photoelectric conversion unit 161. When the reset transistor 164 is turned on by a reset signal RST, the charge stored in the FD 163 is discharged to the drain (constant voltage source Vdd), thereby resetting the potential of the FD 163.

[0043] The amplification transistor 165 outputs a pixel signal according to the potential of the FD 163. That is, the amplification transistor 163 forms a source follower circuit together with a load MOS serving as a constant current source connected via a vertical signal line 127. A pixel signal indicating a level according to the charge accumulated in the FD 163 is output from the amplification transistor 165 to the column processing unit 123 (FIG. 2) via a selection transistor 166 and the vertical signal line 127.

[0044] The selection transistor 166 is turned on when the pixel 150 is selected by the selection signal SEL, and outputs a pixel signal of the pixel 150 to the column processing unit 123 via the vertical signal line 127. The signal lines through which the transfer signal TR, the selection signal SEL, and the reset signal RST are transmitted correspond to the pixel drive lines 126 in FIG.

[0045] 3, the pixel 150 may have a pixel sharing unit configuration in which other than four pixels, for example, two pixels 150 share one pixel circuit 151. In addition, each pixel 150 may be configured to be connected to one pixel circuit 151, or the pixel 150 may have two or more photoelectric conversion units 161.

[0046] In the following, an embodiment of a sensor element 20 to which the technology according to the present disclosure is applied will be described.

[0047] 3. First embodiment As a first embodiment of a sensor element 20 to which the technology of the present disclosure is applied, a configuration of an imaging element is described that includes a separation portion formed at the boundary between photoelectric conversion portions and an embedded electrode embedded in the separation portion on a pixel substrate on which a plurality of pixels are formed.

[0048] (First configuration example) A first configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 4 and Fig. 5. Fig. 4 is a plan view showing the first configuration example of the pixel 150, and Fig. 5 is a cross-sectional view showing the first configuration example of the pixel 150 taken along line a1-a1' in Fig. 4.

[0049] 4 and 5, a plurality of pixels 150 are formed on a pixel substrate 210 made of Si (silicon). Each pixel 150 has a PD 211 corresponding to the photoelectric conversion unit 161 in Fig. 3, a charge transfer unit 212 corresponding to the charge transfer unit 162 in Fig. 3, and a pixel transistor 213 corresponding to the reset transistor 164 in Fig. 3, etc. Each pixel 150 has one PD 211.

[0050] In the pixel substrate 210, an isolation portion 214 is formed at the boundary between the pixels 150 (photoelectric conversion portion 161). The isolation portion 214 is configured in a shape surrounding the pixel 150 (photoelectric conversion portion 161). The isolation portion 214 is formed, for example, as a full trench isolation (FTI), and is formed by insulating a SiO 2 Alternatively, the separator 214 may be a light blocking member that blocks incident light.

[0051] Furthermore, in the pixel substrate 210, embedded electrodes 215 are embedded in the boundaries between the pixels 150 (photoelectric conversion units 161) on the surface side of the pixel substrate 210 overlapping with the separation unit 214. Specifically, the embedded electrodes 215 are embedded adjacent to corners of the four pixels 150 (photoelectric conversion units 161) constituting a pixel sharing unit in the separation unit 214. More specifically, the embedded electrodes 215 are formed in the boundaries between the pixels 150 sharing a charge retention unit, that is, in the boundaries between the pixels 150 of 2×2 pixels.

[0052] The embedded electrode 215 is formed as a charge retention portion (corresponding to FD163 in FIG. 3) of the pixel 150. As shown in FIG. 4, the embedded electrode 215 is formed so as to have different sizes in a first direction (horizontal direction in FIG. 4) and a second direction (vertical direction in FIG. 4) along the photoelectric conversion portion 211 (Si portion) in a plan view. Specifically, the embedded electrode 215 is formed so as to be shorter in the second direction than in the first direction.

[0053] Furthermore, as shown in FIG. 5, a through electrode 221 is connected to the embedded electrode 215 , and is electrically connected to the pixel transistor 213 via a wiring 222 .

[0054] 4, the charge transfer section 212 is formed at a position in the pixel 150 where the distance (first distance) to the separation section 214 extending in a first direction (horizontal direction in FIG. 4) is different from the distance (second distance) to the separation section 214 extending in a second direction (vertical direction in FIG. 4). Specifically, the charge transfer section 212 is formed at a position where the second distance is closer than the first distance.

[0055] Here, let us assume that the horizontal and vertical sizes of the buried electrode are the same. In this case, if the size of the buried electrode is reduced to avoid the charge transfer section and the FD diffusion layer being close to each other, the resistance of the buried electrode increases, which may cause noise or operational problems. Also, if the size of the buried electrode is expanded to the side that keeps the resistance of the buried electrode at a certain level, the electric field between the buried electrode and the charge transfer section will be strengthened, which may cause leakage current.

[0056] In contrast, in the pixel 150 of the first configuration example, the embedded electrode 215 is formed shorter in the second direction (vertical direction) than in the first direction (horizontal direction). Also, the charge transfer section 212 is formed at a position where the second distance (distance to the separation section 214 extending in the vertical direction) is closer than the first distance (distance to the separation section 214 extending in the horizontal direction). This makes it possible to suppress interference between the embedded electrode and the charge transfer section while ensuring the contact area between the embedded electrode and the pixel substrate (Si substrate). As a result, it is possible to suppress the generation of various noises and achieve high image quality by simultaneously suppressing the resistance of the embedded electrode and mitigating the electric field between the embedded electrode and the charge transfer section. In this way, according to the pixel of this embodiment, it is possible to provide an imaging element with a more suitable configuration.

[0057] (Second configuration example) A second configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 6 and Fig. 7. Fig. 6 is a plan view showing the second configuration example of the pixel 150, and Fig. 7 is a cross-sectional view showing the second configuration example of the pixel 150 taken along the line a2-a2' in Fig. 6.

[0058] The pixel 150 of the second configuration example is basically configured in the same manner as the pixel 150 of the first configuration example described with reference to Figures 4 and 5. However, as shown in Figure 7, the pixel 150 of the second configuration example differs from the pixel 150 of the first configuration example in that a circuit board 230 is laminated on the front side of the pixel substrate 210 (the upper side in Figure 7) and the pixel transistor 213 is formed on the circuit board 230.

[0059] Also, as shown in FIG. 6, in the pixel substrate 210, at the boundary between the pixels 150 (photoelectric conversion sections 161) where the embedded electrodes 215 are not formed, substrate contacts 241 connected to a predetermined fixed potential (e.g., a GND potential) are formed as necessary.

[0060] Thus, in the pixel 150 of the second configuration example, the embedded electrode 215 is formed shorter in the second direction (vertical direction) than in the first direction (horizontal direction). Also, the charge transfer section 212 is formed at a position where the second distance (distance to the separation section 214 extending in the vertical direction) is closer than the first distance (distance to the separation section 214 extending in the horizontal direction). This makes it possible to suppress interference between the embedded electrode and the charge transfer section while ensuring the contact area between the embedded electrode and the pixel substrate (Si substrate). As a result, it is possible to suppress the generation of various noises and achieve high image quality by simultaneously suppressing the resistance of the embedded electrode and mitigating the electric field between the embedded electrode and the charge transfer section. In this way, according to the pixel of this embodiment, it is possible to provide an imaging element with a more suitable configuration.

[0061] (Third configuration example) A third configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 8 and Fig. 9. Fig. 8 is a plan view showing the third configuration example of the pixel 150, and Fig. 9 is a cross-sectional view showing the third configuration example of the pixel 150 taken along line a3-a3' in Fig. 8.

[0062] As shown in FIG. 8 and FIG. 9, a plurality of pixels 150 are formed on a pixel substrate 210 made of Si (silicon). The pixel 150 has a PD 211 corresponding to the photoelectric conversion unit 161 in FIG. 3, a charge transfer unit 212 corresponding to the charge transfer unit 162 in FIG. 3, and a pixel transistor 213 corresponding to the reset transistor 164 in FIG. 3, etc. However, unlike the pixel 150 of the first configuration example (FIGS. 4 and 5) having one PD 211, the pixel 150 of the third configuration example has a plurality of PDs 211 (specifically, two PDs 211). In the pixel 150 of the third configuration example, two PDs 211 are formed such that the Si portion is divided in the horizontal direction in FIG. 8. In addition, the pixel 150 of the third configuration example has a plurality of charge transfer units 212 corresponding to the plurality of PDs 211. In this case, the pixel 150 may be configured as a phase difference pixel for detecting the distance to the subject.

[0063] In the pixel substrate 210, separation sections 214 are formed at the boundaries between the pixels 150 and at the boundaries between the photoelectric conversion sections 161 in each pixel 150.

[0064] Furthermore, in the pixel substrate 210, embedded electrodes 215 are embedded in the boundaries between the pixels 150 (photoelectric conversion units 161) on the surface side of the pixel substrate 210 overlapping with the separation unit 214. Specifically, the embedded electrodes 215 are embedded adjacent to corners of two adjacent pixels 150 (four PDs 211) in the separation unit 214. More specifically, the embedded electrodes 215 are formed in the boundaries between the pixels 150 sharing a charge retention unit, that is, the boundaries between the pixels 150 adjacent in a direction (vertical direction in FIG. 8) perpendicular to the division direction of the PDs 211.

[0065] The embedded electrode 215 is formed as a charge holding portion of the pixel 150. As shown in Fig. 8, the embedded electrode 215 is formed so as to have different sizes in a first direction (horizontal direction in Fig. 4) and a second direction (vertical direction in Fig. 4) along the photoelectric conversion portion 211 (Si portion) in a plan view. Specifically, the embedded electrode 215 is formed so as to be shorter in the second direction than in the first direction.

[0066] Furthermore, as shown in FIG. 9, a through electrode 221 is connected to the embedded electrode 215 , and is electrically connected to the pixel transistor 213 via a wiring 222 .

[0067] 8, the charge transfer section 212 is formed at a position in the pixel 150 where the distance (first distance) to the separation section 214 extending in a first direction (horizontal direction in FIG. 8) is different from the distance (second distance) to the separation section 214 extending in a second direction (vertical direction in FIG. 8). Specifically, the charge transfer section 212 is formed at a position where the second distance is closer than the first distance.

[0068] Thus, also in the pixel 150 of the third configuration example, the embedded electrode 215 is formed shorter in the second direction (vertical direction) than in the first direction (horizontal direction). Also, the charge transfer section 212 is formed at a position where the second distance (distance to the separation section 214 extending in the vertical direction) is closer than the first distance (distance to the separation section 214 extending in the horizontal direction). This makes it possible to suppress interference between the embedded electrode and the charge transfer section while ensuring the contact area between the embedded electrode and the pixel substrate (Si substrate). As a result, it is possible to suppress the generation of various noises and realize high image quality by simultaneously suppressing the resistance of the embedded electrode and mitigating the electric field between the embedded electrode and the charge transfer section. Thus, according to the pixel of this embodiment, it is possible to provide an imaging element with a more suitable configuration.

[0069] (Fourth configuration example) A fourth configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 10 and Fig. 11. Fig. 10 is a plan view showing the fourth configuration example of the pixel 150, and Fig. 11 is a cross-sectional view showing the fourth configuration example of the pixel 150 taken along line a4-a4' in Fig. 10.

[0070] The pixel 150 of the fourth configuration example is basically configured in the same manner as the pixel 150 of the third configuration example described with reference to Figures 8 and 9. However, as shown in Figure 11, the pixel 150 of the fourth configuration example differs from the pixel 150 of the third configuration example in that a circuit board 230 is laminated on the front side of the pixel substrate 210 (the upper side in Figure 11), and the pixel transistor 213 is formed on the circuit board 230.

[0071] Also, as shown in FIG. 10, in the pixel substrate 210, at the boundary between the pixels 150 (photoelectric conversion sections 161) where the embedded electrodes 215 are not formed, substrate contacts 241 connected to a predetermined fixed potential (e.g., a GND potential) are formed as necessary.

[0072] Thus, in the pixel 150 of the fourth configuration example, the embedded electrode 215 is formed shorter in the second direction (vertical direction) than in the first direction (horizontal direction). Also, the charge transfer section 212 is formed at a position where the second distance (distance to the separation section 214 extending in the vertical direction) is closer than the first distance (distance to the separation section 214 extending in the horizontal direction). This makes it possible to suppress interference between the embedded electrode and the charge transfer section while ensuring the contact area between the embedded electrode and the pixel substrate (Si substrate). As a result, it is possible to suppress the generation of various noises and achieve high image quality by simultaneously suppressing the resistance of the embedded electrode and mitigating the electric field between the embedded electrode and the charge transfer section. In this way, according to the pixel of this embodiment, it is possible to provide an imaging element with a more suitable configuration.

[0073] (Fifth Configuration Example) A fifth configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 12. The plan view showing the fourth configuration example of the pixel 150 is similar to Fig. 10 (fourth configuration example), and Fig. 12 is a cross-sectional view showing the fifth configuration example of the pixel 150 taken along the line a4-a4' in Fig. 10.

[0074] The pixel 150 of the fifth configuration example is basically configured in the same manner as the pixel 150 of the fourth configuration example described with reference to Figures 10 and 11. However, as shown in Figure 12, the pixel 150 of the fifth configuration example differs from the pixel 150 of the fourth configuration example in that, instead of the charge transfer section 212, the pixel 150 of the fifth configuration example has a charge transfer section 212V formed as a vertical gate electrode and having a vertical charge transfer function.

[0075] In this way, the pixel 150 of the fifth configuration example can achieve the same effect as the pixel 150 of the first to fourth configuration examples described above, and it is also possible to achieve both improved charge transfer function and improved image quality.

[0076] In the above-described embodiment, the technology according to the present disclosure does not need to be applied to all embedded electrodes 215, and the technology according to the present disclosure may be applied to any embedded electrodes 215 as necessary.

[0077] <4. Second embodiment> As a second embodiment of the sensor element 20 to which the technology of the present disclosure is applied, a configuration of an imaging element including a pixel substrate on which phase difference pixels are formed, each having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer the charges generated by each of the photoelectric conversion units to a charge holding unit, and a circuit substrate stacked on the pixel substrate and on which pixel transistors are formed will be described.

[0078] (Conventional technology and problems) Recently, with the miniaturization of pixels in CMOS image sensors, transfer gates with vertical gate electrodes (VG) have been introduced to achieve both saturation signal volume and charge transfer characteristics. In recent years, a structure with an increased number of vertical gate electrodes (VG) has been proposed to further improve charge transfer capacity.

[0079] For example, in a single-layer phase difference pixel P1 shown in FIG. 13A, two PDs (photodiodes) and pixel transistors M1 and M2 constituting a pixel circuit are formed on the same substrate. Therefore, the degree of freedom in arranging the vertical gate electrodes G11 and G12 is significantly limited.

[0080] On the other hand, in the two-layer phase difference pixel P2 shown in FIG. 13B, since the pixel transistor (not shown) is formed on a substrate separate from the two PDs, the degree of freedom in arranging the vertical gate electrodes G21 and G22 can be improved. Specifically, the vertical gate electrodes G21 and G22 can be arranged in the arrangement possible area PA shown in the figure.

[0081] In order to improve the charge transfer capability, it is desirable to place the vertical gate electrodes G21 and G22 on the PD in the vicinity of the region where the potential is maximum in the PD (hereinafter also referred to as the sensor potential). However, due to a trade-off with the pinning (hole concentration) at the bottom (the tip facing the PD side) of the vertical gate electrodes G21 and G22, it is difficult to obtain the effect of improving the charge transfer capability.

[0082] FIG. 14A shows a plan view of the phase difference pixel P2 similar to FIG. 13B, and FIG. 14B shows a cross-sectional view of the phase difference pixel P2 taken along line a-a' in FIG. 14A. As shown in FIG. 14B, the phase difference pixel P2 is formed on a pixel substrate SB1, and a circuit substrate SB2 on which a pixel transistor is formed is laminated on the pixel substrate SB1.

[0083] In general, the closer the transfer gate is to the sensor potential of the PD, the more it can modulate the PD and the more efficient the charge transfer. As mentioned above, the sensor potential is the point or potential with the maximum potential in the PD, which is the region with the highest net N-type impurity concentration.

[0084] Therefore, in the phase difference pixel P2 shown in FIG. 14B, the closer the vertical gate electrode G21 and the sensor potential SP in the PD are, the more difficult it is to ensure the hole concentration in the vicinity of the vertical gate electrode G21, and the more likely dark electrons are to be generated via the interface state in the vicinity of the vertical gate electrode G21 (the pinning becomes weaker).

[0085] Furthermore, in the phase difference pixel P2 shown in FIG. 14B, the influence of disturbances on the transfer path CT of the charge from PD to FD, which is caused by fluctuations of impurities around the transfer path CT, becomes large.

[0086] In contrast, in a second embodiment of the sensor element 20 to which the technology disclosed herein is applied, the FD is formed at the midpoint between two PDs when viewed in a plan view from the stacking direction of the substrate, and the transfer gate is formed to have multiple vertical gate electrodes arranged across the sensor potential on the PD.

[0087] This allows the vertical gate electrode and the sensor potential to be separated to a certain extent, strengthening the pinning. On the other hand, the modulation degree of the PD by the transfer gate becomes weaker, but by arranging multiple vertical gate electrodes (for example, two), a modulation effect can be obtained in proportion to the number of vertical gate electrodes, so the transfer efficiency is not reduced. Therefore, it is possible to maintain the transfer efficiency while suppressing the generation of dark electrons via the interface state near the vertical gate electrode.

[0088] (First configuration example) A first configuration example of a pixel 150 of a second embodiment of a sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 15. Fig. 15A is a plan view showing the first configuration example of the pixel 150, and Fig. 15B is a cross-sectional view showing the first configuration example of the pixel 150 taken along line a-a' in Fig. 15A.

[0089] The pixel 150 shown in Fig. 15 is formed on a pixel substrate SB1 made of Si (silicon). The pixel 150 has two PDs 311 as photoelectric conversion units, a transfer gate 312 as a charge transfer unit, an FD 313 as a charge holding unit, and a pixel transistor (not shown) formed on a circuit substrate SB2 laminated on the pixel substrate SB1. In the pixel 150 shown in Fig. 15, the two PDs 311 are formed such that the Si portion is divided in the horizontal direction in Fig. A. That is, the pixel 150 can be configured as a phase difference pixel for detecting the distance to the subject.

[0090] The FD313 is formed by direct N+ ion implantation into a Si substrate. The FD313 is formed at the middle position between the two PD311 in plan view from the stacking direction of the substrate. Specifically, the FD313 is formed at the center of the region sandwiched between the two PD311 in plan view from the stacking direction. A through contact 313C is formed on the surface side of the FD313 on the pixel substrate SB1, electrically connecting the FD313 and a wiring layer formed on the circuit substrate SB2.

[0091] In the pixel substrate SB1, FTIs 314 are formed as isolation sections at boundaries with other pixels 150 and at boundaries between the PDs 311 of the pixels 150. In addition, an oxide film 315 such as an STI (Shallow Trench Isolation) is formed so as to cover the side surfaces of the FTIs 314 on the front surface side of the pixel substrate SB1.

[0092] Furthermore, in the pixel substrate SB1, a P-well 316, which is a P-type impurity region, is formed at each of the four corners of the pixel 150, which is formed in a square shape in a plan view from the stacking direction. A through contact 316C is formed on the surface side of the P-well 316 of the pixel substrate SB1 to connect the P-well 316 to a predetermined fixed potential (for example, a GND potential).

[0093] The transfer gate 312 is formed on each of the two PDs 311. The transfer gate 312 has two vertical gate electrodes 321 and 322 arranged on the PD 311 so as to straddle a region (sensor potential SP) having the maximum potential in the PD 311, and a planar gate electrode 323 formed on the surface of the pixel substrate SB1 and electrically connected to the two vertical gate electrodes 321 and 322. As shown in FIG. 15A, the two vertical gate electrodes 321 and 322 are arranged so as to straddle a straight line L that passes through the center of the FD 313 and extends in the direction in which the two PDs 311 are divided.

[0094] Thus, in the pixel 150 of the first configuration example, the FD313 is formed at the midpoint between the two PDs 311 when viewed in a plan view from the stacking direction of the substrate, and the transfer gate 312 is formed to have two vertical gate electrodes 321, 322 arranged on each PD311 so as to straddle the region (sensor potential SP) having the maximum potential within the PD311.

[0095] As a result, the vertical gate electrode and the sensor potential are separated to a certain extent, so that it is possible to maintain the modulation degree of the PD, that is, the transfer efficiency, while suppressing the generation of dark electrons through the interface state near the vertical gate electrode. In addition, by surrounding the transfer path CT with two vertical gate electrodes, it is possible to suppress the influence of disturbances on the transfer path CT caused by fluctuations of the impurities around the transfer path CT, and it is possible to improve the tolerance to process variations. Furthermore, if multiple vertical gate electrodes can be formed by batch processing, the transfer path CT is fixed even if misalignment of the vertical gate electrodes occurs, so that it is possible to improve the tolerance to process variations. In this way, according to the pixel of this embodiment, it is possible to provide an image sensor with a more suitable configuration.

[0096] (Second configuration example) A second configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 16. Fig. 16A is a plan view showing the second configuration example of the pixel 150, and Fig. 16B is a cross-sectional view showing the second configuration example of the pixel 150 taken along line a-a' in Fig. 16A.

[0097] The pixel 150 of the second configuration example is basically configured in the same manner as the pixel 150 of the first configuration example described with reference to Fig. 15. However, as shown in Fig. 16, the pixel 150 of the second configuration example is different from the pixel 150 of the first configuration example in that an oxide film 315 is formed so as to cover not only the side surface of the FTI 314 on the front side of the pixel substrate but also the portions of the side surfaces of the vertical gate electrodes 321 and 322 that are not used as the transfer path CT.

[0098] In the pixel 150 of this embodiment, since a plurality of vertical gate electrodes are arranged and the size of the planar gate electrode is enlarged, the capacitance (driving load) of the entire transfer gate 312 increases. This directly affects the pixel driving speed, i.e., the frame rate, as miniaturization and the number of pixels progress.

[0099] In contrast to this, in the pixel 150 of the second configuration example, the portion not used as the transfer path CT is covered with an oxide film such as STI, so that the capacitance of the entire transfer gate 312 can be reduced.

[0100] In the pixel 150 of the second configuration example, a P+ diffusion layer having a higher impurity concentration than the P well 316 is formed in the vicinity region 316N of the P well 316 so that the potential of the PD 311 is held at the GND potential.

[0101] (Third configuration example) A third configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 17. Fig. 17A is a plan view showing the third configuration example of the pixel 150, and Fig. 17B is a cross-sectional view showing the third configuration example of the pixel 150 taken along line a-a' in Fig. 17A.

[0102] The pixel 150 of the third configuration example is basically configured in the same manner as the pixel 150 of the first configuration example described with reference to Fig. 15. However, as shown in Fig. 17, the pixel 150 of the third configuration example is different from the pixel 150 of the first configuration example in that the transfer gate 312 has a plurality of (specifically, two) planar gate electrodes 323-1 and 323-2 formed on the surface of the pixel substrate instead of the planar gate electrode 323 and electrically connected to the vertical gate electrodes 321 and 322, respectively.

[0103] The planar gate electrode 323-1 (vertical gate electrode 321) and the planar gate electrode 323-2 (vertical gate electrode 322) are electrically connected by a polysilicon via or wiring and are supplied with the same potential.

[0104] In this manner, in the pixel 150 of the third configuration example, the planar gate electrode of the transfer gate 312 is formed for each vertical gate electrode, thereby making it possible to reduce the capacitance generated between the transfer gate 312 and the Si substrate.

[0105] (Fourth configuration example) A fourth configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 18. Fig. 18A is a plan view showing the fourth configuration example of the pixel 150, and Fig. 18B is a cross-sectional view showing the fourth configuration example of the pixel 150 taken along line a-a' in Fig. 18A.

[0106] The pixel 150 of the fourth configuration example is basically configured in the same manner as the pixel 150 of the second configuration example described with reference to Fig. 16. However, as shown in Fig. 18, the pixel 150 of the fourth configuration example is different from the pixel 150 of the second configuration example in that the transfer gate 312 has planar gate electrodes 323-1 and 323-2 formed on the surface of the pixel substrate instead of the planar gate electrode 323 and electrically connected to the vertical gate electrodes 321 and 322, respectively.

[0107] The planar gate electrode 323-1 (vertical gate electrode 321) and the planar gate electrode 323-2 (vertical gate electrode 322) are electrically connected by a polysilicon via or wiring and are supplied with the same potential.

[0108] In this way, in the pixel 150 of the fourth configuration example, by covering the portion not used as the transfer path CT with an oxide film such as STI, it is possible to reduce the overall capacitance of the transfer gate 312, and by forming the planar gate electrode of the transfer gate 312 for each vertical gate electrode, it is possible to reduce the capacitance generated between the transfer gate 312 and the Si substrate.

[0109] (Fifth Configuration Example) A fifth configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 19 and 20. Fig. 19A is a plan view showing the fifth configuration example of the pixel 150, and Fig. 19B is a cross-sectional view showing the fifth configuration example of the pixel 150 taken along line a-a' in Fig. 19A. Fig. 20A is a cross-sectional view showing the fifth configuration example of the pixel 150 taken along line b-b' in Fig. 19A, and Fig. 20B is a cross-sectional view showing the fifth configuration example of the pixel 150 taken along line c-c' in Fig. 19A.

[0110] The pixel 150 of the fifth configuration example is basically configured similarly to the pixel 150 of the third configuration example described with reference to Fig. 17. However, as shown in Fig. 19 and Fig. 20, the pixel 150 of the fifth configuration example differs from the pixel 150 of the third configuration example in that it has an FD313E formed as a buried electrode instead of the FD313 formed by N+ ion implantation.

[0111] In this way, the FD can be formed as a buried electrode in addition to being formed by N+ ion implantation.

[0112] (Sixth Configuration Example) A sixth configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 21. Fig. 21A is a plan view showing the sixth configuration example of the pixel 150, and Fig. 21B is a cross-sectional view showing the sixth configuration example of the pixel 150 taken along line a-a' in Fig. 21A.

[0113] The pixel 150 of the sixth configuration example is basically configured in the same manner as the pixel 150 of the fifth configuration example described with reference to Figures 19 and 20. However, as shown in Figure 21, the pixel 150 of the sixth configuration example is different from the pixel 150 of the fifth configuration example in that an oxide film 315 is formed so as to cover not only the side surface of the FTI 314 on the front side of the pixel substrate but also the portions of the side surfaces of the vertical gate electrodes 321 and 322 that are not used as the transfer path CT.

[0114] In this way, in the pixel 150 of the sixth configuration example, the entire capacitance of the transfer gate 312 can be reduced by covering the portion not used as the transfer path CT with an oxide film such as STI.

[0115] <5. Application examples for mobile devices> The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, or a robot.

[0116] FIG. 22 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0117] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 22, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053 are illustrated.

[0118] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0119] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0120] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0121] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0122] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0123] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0124] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0125] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0126] The audio / video output unit 12052 transmits at least one output signal of audio and video to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 22, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0127] FIG. 23 is a diagram showing an example of the installation position of the imaging unit 12031.

[0128] In FIG. 23, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0129] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield in the vehicle interior mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the upper part of the windshield in the vehicle interior is mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0130] 23 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0131] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0132] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0133] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0134] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0135] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 and the like among the above-described configurations. By applying the imaging element of the technology according to the present disclosure to the imaging unit 12031, a captured image with higher image quality can be obtained, which makes it possible to reduce, for example, driver fatigue.

[0136] Note that the embodiments to which the technology disclosed herein is applied are not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the technology disclosed herein.

[0137] Furthermore, the present disclosure can have the following configurations. (1) a pixel substrate on which a plurality of pixels are formed, each pixel having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge storage unit; a separation portion formed at a boundary between the photoelectric conversion portions in the pixel substrate; a buried electrode buried adjacent to a corner of the photoelectric conversion unit in the separation unit; Equipped with The buried electrode is formed as the charge storage portion of the pixel, and is formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion portion in a plan view. Image sensor. (2) The charge transfer section is formed at a position in the pixel where a first distance to the separation section extending in the first direction is different from a second distance to the separation section extending in the second direction. The imaging element according to (1). (3) the buried electrode is formed to be shorter in the second direction than in the first direction, The charge transfer section is formed at a position where the second distance is closer than the first distance. The imaging element according to (2). (4) The buried electrode is formed as a vertical gate electrode and has a vertical charge transfer function. An imaging element according to any one of (1) to (3). (5) The buried electrode is formed at the boundary between the pixels that share the charge storage portion. An imaging element according to any one of (1) to (4). (6) The pixel includes one of the photoelectric conversion units, The buried electrodes are formed at the boundaries between the pixels of the 2×2 pixel structure. The imaging element according to (5). (7) The pixel includes a plurality of the photoelectric conversion units, The buried electrodes are formed at the boundaries between the pixels adjacent to each other in a direction perpendicular to the division direction of the photoelectric conversion unit. The imaging element according to (5). (8) a pixel substrate on which a plurality of pixels are formed, each pixel having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge storage unit; a separation portion formed at a boundary between the photoelectric conversion portions in the pixel substrate; a buried electrode buried adjacent to a corner of the photoelectric conversion unit in the separation unit; having the buried electrode is formed as the charge storage portion of the pixel, and is formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion portion in a plan view; An electronic device comprising: (9) A pixel substrate on which phase difference pixels are formed, the phase difference pixels having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer charges generated by the respective photoelectric conversion units to a charge storage unit; a circuit board on which a pixel transistor is formed; Equipped with the charge retention section is formed at a middle position between the two photoelectric conversion sections in a plan view from the stacking direction, The charge transfer section has a plurality of vertical gate electrodes arranged on the photoelectric conversion section so as to straddle a region having a maximum potential in the photoelectric conversion section. Image sensor. (10) the charge retention portion is formed in a center of a region sandwiched between two of the photoelectric conversion portions in a plan view from the stacking direction, The vertical gate electrodes are disposed so as to straddle a straight line that passes through the center of the charge retention section and extends in a direction in which the two photoelectric conversion sections are separated. The imaging element according to (9). (11) The phase difference pixel further includes an oxide film formed on a side surface of the vertical gate electrode. The imaging element according to (10). (12) The charge transfer section further includes a planar gate electrode formed on a surface of the pixel substrate and electrically connected to the vertical gate electrodes. The imaging element according to (10) or (11). (13) The charge transfer section further includes a plurality of planar gate electrodes formed on a surface of the pixel substrate and electrically connected to the plurality of vertical gate electrodes, respectively. The imaging element according to (10) or (11). (14) The charge retaining portion is formed by ion implantation. An imaging element according to any one of (10) to (13). (15) The charge retaining portion is formed as a buried electrode. An imaging element according to any one of (10) to (13). (16) A pixel substrate on which phase difference pixels are formed, the phase difference pixels having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer charges generated by the respective photoelectric conversion units to a charge storage unit; a circuit board on which a pixel transistor is formed; having the charge retention section is formed at a middle position between the two photoelectric conversion sections in a plan view from the stacking direction, The charge transfer section is an image pickup element having a plurality of vertical gate electrodes arranged on the photoelectric conversion section so as to straddle a region having a maximum potential in the photoelectric conversion section. An electronic device comprising: [Explanation of symbols]

[0138] 1 imaging device, 20 sensor element, 121 pixel array section, 150 pixel, 210 pixel substrate, 211 PD, 212 charge transfer section, 213 pixel transistor, 214 separation section, 215 buried electrode, SB1 pixel substrate, SB2 circuit substrate, 311 PD, 312 transfer gate, 313 FD, 314 FTI, 315 oxide film, 321, 322 vertical gate electrode, 323, 323-1, 323-2 planar gate electrode

Claims

1. a pixel substrate on which a plurality of pixels are formed, each pixel having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge storage unit; a separation portion formed at a boundary between the photoelectric conversion portions in the pixel substrate; a buried electrode buried adjacent to a corner of the photoelectric conversion unit in the separation unit; Equipped with The buried electrode is formed as the charge retaining portion of the pixel, and is formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion portion in a plan view. Image sensor.

2. The charge transfer section is formed at a position in the pixel where a first distance to the separation section extending in the first direction is different from a second distance to the separation section extending in the second direction. The imaging device according to claim 1 .

3. the buried electrode is formed to be shorter in the second direction than in the first direction, The charge transfer section is formed at a position where the second distance is closer than the first distance. The imaging device according to claim 2 .

4. The buried electrode is formed as a vertical gate electrode and has a vertical charge transfer function. The imaging device according to claim 1 .

5. The buried electrode is formed at the boundary between the pixels that share the charge storage portion. The imaging device according to claim 1 .

6. The pixel includes one of the photoelectric conversion units, The buried electrodes are formed at the boundaries between the pixels of the 2×2 pixel array. The imaging device according to claim 5 .

7. The pixel includes a plurality of the photoelectric conversion units, The buried electrodes are formed at the boundaries between the pixels adjacent to each other in a direction perpendicular to the division direction of the photoelectric conversion unit. The imaging device according to claim 5 .

8. a pixel substrate on which a plurality of pixels are formed, each pixel having a photoelectric conversion unit and a charge transfer unit that transfers charges generated by the photoelectric conversion unit to a charge storage unit; a separation portion formed at a boundary between the photoelectric conversion portions in the pixel substrate; a buried electrode buried adjacent to a corner of the photoelectric conversion unit in the separation unit; having the buried electrode is formed as the charge storage portion of the pixel, and is formed so as to have different sizes in a first direction and a second direction along the photoelectric conversion portion in a plan view; An electronic device comprising:

9. A pixel substrate on which phase difference pixels are formed, the phase difference pixels having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer charges generated by the respective photoelectric conversion units to a charge storage unit; a circuit board on which a pixel transistor is formed; Equipped with the charge retention portion is formed at a middle position between the two photoelectric conversion portions in a plan view from the stacking direction, The charge transfer section has a plurality of vertical gate electrodes arranged on the photoelectric conversion section so as to straddle a region having a maximum potential in the photoelectric conversion section. Image sensor.

10. the charge retention portion is formed in a center of a region sandwiched between two of the photoelectric conversion portions in a plan view from a stacking direction, The vertical gate electrodes are disposed so as to straddle a straight line that passes through the center of the charge retention portion and extends in a direction in which the two photoelectric conversion portions are separated. The imaging device according to claim 9 .

11. The phase difference pixel further includes an oxide film formed on a side surface of the vertical gate electrode. The imaging device according to claim 10.

12. The charge transfer section further includes a planar gate electrode formed on a surface of the pixel substrate and electrically connected to the vertical gate electrodes. The imaging device according to claim 10.

13. The charge transfer section further includes a plurality of planar gate electrodes formed on a surface of the pixel substrate and electrically connected to the plurality of vertical gate electrodes, respectively. The imaging device according to claim 10.

14. The charge retaining portion is formed by ion implantation. The imaging device according to claim 10.

15. The charge retaining portion is formed as a buried electrode. The imaging device according to claim 10.

16. A pixel substrate on which phase difference pixels are formed, the phase difference pixels having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer charges generated by the respective photoelectric conversion units to a charge storage unit; a circuit board on which a pixel transistor is formed; having the charge retention portion is formed at a middle position between the two photoelectric conversion portions in a plan view from the stacking direction, The charge transfer section is an image pickup element having a plurality of vertical gate electrodes arranged on the photoelectric conversion section so as to straddle a region having a maximum potential in the photoelectric conversion section. An electronic device comprising:

Images