Semiconductor device and method for manufacturing semiconductor device

Abstract

To provide a semiconductor device that can improve its reliability, and a method for manufacturing the semiconductor device.SOLUTION: A semiconductor device 1 of an embodiment comprises: a chip 11 that has a first surface S1 and a second surface S2; a first electrode pad 12 that is provided on the first surface of the chip; a first conductive layer 14 that is provided above the first electrode pad; a first jointing material 13 that is provided between the first electrode pad and the first conductive layer, and is in contact with the first electrode pad and the first conductive layer; and a second electrode pad 15 that is provided on the second surface of the chip. A third surface S3 of the first jointing material facing the first electrode pad has a contact part CP1 in contact with the first electrode pad, and a notch part NP surrounding the contact part. The ends of the contact part are located inside the end faces of the first conductive layer.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art There is known a semiconductor device having a structure in which the front and back surfaces of a semiconductor chip are connected to conductors via bonding materials. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6366766 [Patent Document 2] Patent No. 6289359 [Patent Document 3] Patent No. 6726821 Summary of the Invention [Problem to be solved by the invention]

[0004] A semiconductor device capable of improving reliability and a method for manufacturing the semiconductor device are provided. [Means for solving the problem]

[0005] The semiconductor device according to the embodiment includes a chip having a first surface and a second surface opposite to the first surface, a first electrode pad provided on the first surface of the chip, a first conductive layer provided above the first electrode pad, a first bonding material provided between the first electrode pad and the first conductive layer and in contact with the first electrode pad and the first conductive layer, and a second electrode pad provided on the second surface of the chip. A third surface of the first bonding material opposite to the first electrode pad has a contact portion in contact with the first electrode pad and a notch surrounding the contact portion. An end of the contact portion is located inside the end face of the first conductive layer. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment. [Diagram 2] FIG. 2 is a plan view showing an example of the structure of the semiconductor device according to the first embodiment. [Diagram 3] FIG. 3 is a plan view showing an example of the structure of the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment. [Diagram 5] FIG. 5 is a cross-sectional view showing an example of the structure of the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a flowchart showing an example of a method for manufacturing the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a cross-sectional view showing an example of a structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing an example of a structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 9] FIG. 9 is a plan view showing an example of the structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 10] FIG. 10 is a cross-sectional view showing an example of a structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 11] FIG. 11 is a cross-sectional view showing an example of a structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 12] FIG. 12 is a cross-sectional view showing an example of a structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 13] FIG. 13 is a cross-sectional view showing an example of a structure in a manufacturing process of the semiconductor device according to the first embodiment. [Figure 14] FIG. 14 is an enlarged cross-sectional view showing a part of the structure of the semiconductor device according to the first embodiment. [Figure 15] FIG. 15 is a flowchart showing an example of a method for manufacturing a semiconductor device according to a modification of the first embodiment. [Figure 16] FIG. 16 is a plan view showing an example of a structure in a manufacturing process of a semiconductor device according to a modification of the first embodiment. [Figure 17] FIG. 17 is a plan view showing an example of the structure of the semiconductor device according to the second embodiment. [Figure 18] FIG. 18 is a cross-sectional view showing an example of the structure of the semiconductor device according to the second embodiment. [Figure 19] FIG. 19 is a cross-sectional view showing an example of the structure of the semiconductor device according to the second embodiment. [Figure 20] FIG. 20 is a flowchart showing an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 21] FIG. 21 is an enlarged cross-sectional view showing a part of the structure of the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, the embodiments will be described with reference to the drawings. The dimensions and ratios of the drawings are not necessarily the same as those in reality. In the following description, components having substantially the same functions and configurations are given the same reference numerals, and repeated description may be omitted. When elements having similar configurations are particularly distinguished from each other, different letters or numbers may be added to the end of the same reference numerals. In addition, all descriptions of one embodiment also apply to descriptions of another embodiment, unless explicitly or obviously excluded.

[0008] 1. First embodiment The semiconductor device according to the first embodiment will be described.

[0009] 1.1 Structure of semiconductor device The structure of the semiconductor device will be described with reference to Fig. 1. Fig. 1 is a cross-sectional view showing an example of the structure of the semiconductor device.

[0010] As shown in Fig. 1, the semiconductor device 1 includes a semiconductor chip 11, a first electrode pad 12, a first conductive layer 14, a second electrode pad 15, a second conductive layer 17, a third electrode pad 18, a first electrode 23, and a second electrode 24. Hereinafter, the semiconductor chip 11 will be simply referred to as "chip 11". Although not shown in Fig. 1, the semiconductor device 1 also includes a gate terminal plate (not shown). The gate terminal plate is connected to the third electrode pad 18 via, for example, a spring pin (not shown).

[0011] The chip 11 is a power semiconductor chip. Specifically, for example, the chip 11 is an injection enhanced gate transistor (IEGT), an insulated gate bipolar transistor (IGBT), or a field effect transistor (metal-oxide-silicon field-effect transistor) using silicon carbide (SiC). In the following, a case where the chip 11 is an IEGT will be described as an example.

[0012] The chip 11 has a first surface S1 and a second surface S2 opposite to the first surface S1. In the following, a plane parallel to the first surface S1 and the second surface S2 is referred to as an XY plane. Directions perpendicular to each other in the XY plane are referred to as an X direction and a Y direction. A direction approximately perpendicular to the XY plane is referred to as a Z direction. The first surface S1 is also referred to as the front surface of the chip 11. The second surface S2 is also referred to as the back surface of the chip 11.

[0013] The first electrode pad 12 is an emitter electrode pad. The first electrode pad 12 is electrically connected to an emitter electrode (not shown) of the chip 11. The first electrode pad 12 is provided on the first surface S1 of the chip 11. The first electrode pad 12 is made of a conductive material.

[0014] The first conductive layer 14 is a conductor that electrically connects the first electrode pad 12 and the first electrode 23. The first conductive layer 14 is provided above the first electrode pad 12 on the front surface side of the chip 11. The first conductive layer 14 is bonded to the first electrode pad 12 via a bonding material (not shown). Specifically, the first conductive layer 14 is uniformly pressed against the first electrode pad 12 via the bonding material. The first conductive layer 14 is made of a conductive material and includes, for example, any one of molybdenum, ruthenium, tungsten, iron, gold, silver, copper, cobalt, nickel, and palladium.

[0015] The second electrode pad 15 is a collector electrode pad. The second electrode pad 15 is electrically connected to a collector electrode (not shown) of the chip 11. The second electrode pad 15 is provided on the second surface S2 of the chip 11. The second electrode pad 15 is made of a conductive material.

[0016] The second conductive layer 17 is a conductor that electrically connects the second electrode pad 15 and the second electrode 24. The second conductive layer 17 is provided above the second electrode pad 15 on the back surface side of the chip 11. The second conductive layer 17 is bonded to the second electrode pad 15 via a bonding material (not shown). Specifically, the second conductive layer 17 is uniformly pressed against the second electrode pad 15 via the bonding material. The second conductive layer 17 is made of a conductive material and includes, for example, any one of molybdenum, ruthenium, tungsten, iron, gold, silver, copper, cobalt, nickel, and palladium.

[0017] The third electrode pad 18 is a gate electrode pad. The third electrode pad 18 is provided on the first surface S1 of the chip 11 and spaced apart from the first electrode pad 12. The third electrode pad 18 is made of a conductive material.

[0018] The first electrode 23 is an electrode for supplying a voltage to the emitter electrode of the chip 11. The first electrode 23 is provided on the first conductive layer 14 on the front surface side of the chip 11. The first electrode 23 is pressure-welded to the emitter electrode of the chip 11 via the first conductive layer 14 and the first electrode pad 12. The first electrode 23 is made of a conductive material, such as copper or nickel.

[0019] The second electrode 24 is an electrode for supplying a voltage to the collector electrode of the chip 11. The second electrode 24 is provided on the second conductive layer 17 on the back surface side of the chip 11. The second electrode 24 is pressure-welded to the collector electrode of the chip 11 via the second conductive layer 17 and the second electrode pad 15. The second electrode 24 is made of a conductive material, such as copper or nickel.

[0020] An insulating film or insulating film (not shown) is provided on the outer periphery of the semiconductor device 1 (the outer periphery of each of the first electrode pad 12, the first bonding material 13 described later, the first conductive layer 14, the second electrode pad 15, the second bonding material 16 described later, the second conductive layer 17, the third electrode pad 18, the first electrode 23, and the second electrode 24).

[0021] The semiconductor device 1 is used in, for example, a press-pack package PPI (Press Pack IEGT). The PPI includes a plurality of chips 11 arranged on the same XY plane. The first electrode pads 12 provided on the front surface of each chip 11 are pressed by a first conductive layer 14. The second electrode pads 15 provided on the rear surface of each chip 11 are pressed by a second conductive layer 17. The first conductive layer 14 connected to each chip 11 is pressed by, for example, one first electrode 23. The second conductive layer 17 connected to each chip 11 is pressed by, for example, one second electrode 24. A space surrounded by the chip 11, the first electrode pads 12, the first conductive layer 14, the second electrode pads 15, the second conductive layer 17, the third electrode pads 18, the first electrodes 23, and the second electrodes 24 is filled with resin and sealed.

[0022] In addition, when the chip 11 is a MOSFET using SiC, the first electrode pad 12 corresponds to a source electrode pad. The second electrode pad 15 corresponds to a drain electrode pad. The emitter electrode of the chip 11 corresponds to a source electrode of the chip 11. The collector electrode of the chip 11 corresponds to a drain electrode of the chip 11.

[0023] 1.1.1 Planar structure of semiconductor device The planar structure of the semiconductor device 1 will be described.

[0024] Fig. 2 is a plan view showing an example of the structure of the semiconductor device 1. Fig. 2 is a plan view of the semiconductor device 1 as viewed from the first surface S1 side of the chip 11. The chip 11, the first electrode pad 12, the first bonding material 13, the first conductive layer 14, and the third electrode pad 18 are shown by solid lines. The second electrode pad 15 and the second conductive layer 17 are shown by dashed lines. Note that the first electrode 23 and the second electrode 24 are omitted from Fig. 2.

[0025] As shown in FIG. 2, the semiconductor device 1 further includes a first bonding material 13 in addition to the configuration shown in FIG.

[0026] The first electrode pads 12 are provided on the first surface S1 of the chip 11. The first electrode pads 12 have, for example, a substantially L-shape in top view (viewed from the upper side of the paper).

[0027] The first bonding material 13 is a member for bonding the first electrode pad 12 and the first conductive layer 14. The first bonding material 13 is provided on the first electrode pad 12. The first bonding material 13 has a contact portion CP1 in contact with the first electrode pad 12, and a notch portion NP (not shown in FIG. 2) provided so as to surround the contact portion CP1. In other words, the notch portion NP is a portion that is not in contact with the first electrode pad 12. An end of the contact portion CP1 is located inside the end face (side surface) of the first conductive layer 14.

[0028] Moreover, the first bonding material 13 has a portion that extends outward beyond the end face of the first conductive layer 14. In other words, the first bonding material 13 has a protruding portion that protrudes outward beyond the end face of the first conductive layer 14. Hereinafter, the protruding portion is referred to as a "protruding portion PP1." The protruding portion PP1 is a portion that protrudes outward beyond the end face of the first conductive layer 14 when the first conductive layer 14 to which the first bonding material 13 is transferred is pressure sintered on the first electrode pad 12 in a manufacturing method described later. The protruding portion PP1 is provided on at least a part of the first bonding material 13.

[0029] 2 shows an example in which the multiple protrusions PP1 are spaced apart from each other. Note that all of the multiple protrusions PP1 may be in contact with each other. That is, the multiple protrusions PP1 may be integrated. In addition, the amount of the first bonding material 13 protruding outward from the end face of the first conductive layer 14 may vary depending on the position.

[0030] The first bonding material 13 is made of a conductive material and contains, for example, any one of gold, silver, copper, lead, tin, and nickel.

[0031] The first conductive layer 14 is provided on the first bonding material 13. The first conductive layer 14 has, for example, a substantially L-shape in top view. The first conductive layer 14 is smaller in size than the first electrode pad 12. In other words, the end face of the first conductive layer 14 is located inside the end face (side face) of the first electrode pad 12.

[0032] The third electrode pads 18 are provided on the first surface S1 of the chip 11. The third electrode pads 18 have, for example, a substantially rectangular shape in a top view. The third electrode pads 18 are spaced apart from the first electrode pads 12 in the X and Y directions.

[0033] Fig. 3 is a plan view showing an example of the structure of the semiconductor device 1. Fig. 3 is a plan view of the semiconductor device 1 as viewed from the second surface S2 side of the chip 11. The chip 11, the second electrode pad 15, the second bonding material 16, and the second conductive layer 17 are shown by solid lines. The first electrode pad 12, the first conductive layer 14, and the third electrode pad 18 are shown by dashed lines. Note that the first electrode 23 and the second electrode 24 are omitted from Fig. 3.

[0034] As shown in FIG. 3, the semiconductor device 1 further includes a second bonding material 16 in addition to the configuration shown in FIG.

[0035] The second electrode pad 15 is provided on the second surface S2 of the chip 11. The second electrode pad 15 has, for example, a substantially rectangular shape in a top view. The second electrode pad 15 is larger in size than the first electrode pad 12. This is to control the current flowing from the second electrode pad 15 to the first electrode pad 12 within a relatively wide range of current values. If the size of the second electrode pad 15 is relatively small, the amount of charge supplied from the second electrode pad 15 to the first electrode pad 12 becomes relatively small. In this case, the current flowing from the second electrode pad 15 to the first electrode pad 12 is controlled within a relatively narrow range of current values. Therefore, the size of the second electrode pad 15 is designed to be larger than the size of the first electrode pad 12.

[0036] The second bonding material 16 is a member for bonding the second electrode pad 15 and the second conductive layer 17. The second bonding material 16 is provided on the second electrode pad 15. The second bonding material 16 has a portion that extends outward from the end face (side face) of the second conductive layer 17. In other words, the second bonding material 16 has a protruding portion that protrudes outward from the end face of the second conductive layer 17. Hereinafter, the protruding portion is referred to as a "protruding portion PP2". The protruding portion PP2 is a portion that protrudes outward from the end face of the second conductive layer 17 when the second conductive layer 17 to which the second bonding material 16 is transferred is pressure-sintered on the second electrode pad 15 in a manufacturing method described later, similar to the protruding portion PP1. The protruding portion PP2 is provided on at least a part of the second bonding material 16.

[0037] 3 shows an example in which the multiple protrusions PP2 are spaced apart from each other. Note that all of the multiple protrusions PP2 may be in contact with each other. That is, the multiple protrusions PP2 may be integrated. In addition, the amount of the second bonding material 16 protruding outward from the end face of the second conductive layer 17 may vary depending on the position.

[0038] When the conductive layer (first conductive layer 14 or second conductive layer 17) is pressed, a load is more likely to be applied when the electrode pad (first electrode pad 12 or second electrode pad 15) is relatively small in size. For this reason, the amount of the bonding material (first bonding material 13 or second bonding material 16) that protrudes outward from the end face of the conductive layer (first conductive layer 14 or second conductive layer 17) is greater for the first bonding material 13 that is pressed by the smaller first electrode pad 12 than for the second bonding material 16. In other words, the amount of protrusion is greater for the protruding portion PP1 than for the protruding portion PP2.

[0039] The second bonding material 16 is made of a conductive material, and includes, for example, any one of gold, silver, copper, lead, tin, and nickel.

[0040] The second conductive layer 17 is provided on the second bonding material 16. The second conductive layer 17 has, for example, a substantially rectangular shape in a top view. The second conductive layer 17 is smaller in size than the second electrode pad 15 and larger in size than the first electrode pad 12. In other words, the end face of the second conductive layer 17 is located inside the end face (side face) of the second electrode pad 15 and outside the end face of the first electrode pad 12.

[0041] 1.1.2 Cross-sectional structure of semiconductor device The cross-sectional structure of the semiconductor device 1 will be described.

[0042] Fig. 4 is a cross-sectional view taken along line II in Fig. 2 and Fig. 3, showing an example of the structure of the semiconductor device 1. Note that in Fig. 4, the first electrode 23 and the second electrode 24 are omitted from the illustration.

[0043] As shown in FIG. 4, the first electrode pad 12 is provided on the first surface S1 of the chip 11. The first bonding material 13 is provided on the first electrode pad 12. The first conductive layer 14 is provided on the first bonding material 13. In other words, the first bonding material 13 is provided between the first electrode pad 12 and the first conductive layer 14. The first bonding material 13 is in contact with the first electrode pad 12 and the first conductive layer 14. That is, the first bonding material 13 bonds the first electrode pad 12 and the first conductive layer 14 together.

[0044] The surface of the first bonding material 13 facing the first electrode pad 12 (hereinafter referred to as the "third surface S3") has a contact portion CP1 in contact with the first electrode pad 12 and a notch portion NP provided so as to surround the contact portion. The end of the contact portion CP1 is located inside the end face of the first conductive layer 14.

[0045] By providing the cutout portion NP on the third surface S3 of the first bonding material 13 so as to surround the contact portion CP1, the surface area of ​​the first bonding material 13 is larger by the area of ​​the surface of the cutout portion NP facing the first electrode pad 12, compared to a case in which the cutout portion NP is not provided on the third surface S3 of the first bonding material 13. In other words, the surface area of ​​the first bonding material 13 is larger than a case in which the entire third surface S3 of the first bonding material 13 is the contact portion CP1. This improves the heat dissipation property of the first bonding material 13.

[0046] The first bonding material 13 has a protruding portion PP1 that protrudes outward beyond the end face of the first conductive layer 14. The protruding portion PP1 of the first bonding material 13 is in contact with a part of the end face of the first conductive layer 14.

[0047] Since the first bonding material 13 has the protrusion PP1, the surface area of ​​the first bonding material 13 is larger by the surface area of ​​the protrusion PP1 compared to a case where the first bonding material 13 does not have the protrusion PP1. This improves the heat dissipation of the first bonding material 13. Furthermore, when the protrusion PP1 is in contact with a part of the end face of the first conductive layer, the surface area of ​​the protrusion PP1 is further increased. This further improves the heat dissipation of the first bonding material 13.

[0048] Moreover, the end of the contact portion CP1 is located inside the end face of the first electrode pad 12. The protrusion PP1 of the first bonding material 13 is located above the first electrode pad 12 on the front surface side of the chip 11.

[0049] The surface of the first bonding material 13 facing the first conductive layer (hereinafter referred to as the “fourth surface S4”) has a contact portion CP2 in contact with the first conductive layer .

[0050] The thickness T1 of the first bonding material 13 at the contact portion CP1 (the thickness between the contact portion CP1 and the contact portion CP2) is preferably, for example, 5 μm to 80 μm.

[0051] The thickness T2 of the cutout portion NP is preferably equal to or less than ½ of the thickness T1 of the first bonding material 13 at the contact portion CP1. If the thickness T2 is greater than ½ of the thickness T1, for example, the protrusion portion PP1 may fall off when assembling the PPI.

[0052] The third electrode pad 18 is provided on the first surface S1 of the chip 11. The third electrode pad 18 is spaced apart from the first electrode pad 12. The third electrode pad 18 is also spaced apart from the protruding portion PP1 of the first bonding material 13. In other words, the third electrode pad 18 is not in contact with the protruding portion PP1 of the first bonding material 13.

[0053] The second electrode pad 15 is provided on the second surface S2 of the chip 11. The second bonding material 16 is provided on the second electrode pad 15. The second conductive layer 17 is provided on the second bonding material 16. In other words, the second bonding material 16 is provided between the second electrode pad 15 and the second conductive layer 17. The second bonding material 16 is in contact with the second electrode pad 15 and the second conductive layer 17. That is, the second bonding material 16 bonds the second electrode pad 15 and the second conductive layer 17 together.

[0054] Fig. 5 is a cross-sectional view taken along line II-II in Fig. 2 and Fig. 3, showing an example of the structure of the semiconductor device 1. Note that in Fig. 5, the first electrode 23 and the second electrode 24 are omitted from the illustration.

[0055] As shown in FIG. 5, the first electrode pad 12, the first bonding material 13, and the first conductive layer 14 provided on the surface of the chip 11 are longer in the X direction than the first electrode pad 12, the first bonding material 13, and the first conductive layer 14 shown in FIG. 4.

[0056] The structures of the first electrode pads 12, the first bonding material 13, and the first conductive layer 14 provided on the surface of the chip 11 are the same as those in Fig. 4. The thickness T1 of the first bonding material 13 and the thickness T2 of the cutout portion NP are also the same as those in Fig. 4. For this reason, a description of the structures of the first electrode pads 12, the first bonding material 13, and the first conductive layer 14, as well as the thickness T1 of the first bonding material 13 and the thickness T2 of the cutout portion NP will be omitted.

[0057] The structures of the second electrode pad 15, the second bonding material 16, and the second conductive layer 17 provided on the back surface of the chip 11 are the same as those in Fig. 4. Therefore, a description of the structures of the second electrode pad 15, the second bonding material 16, and the second conductive layer 17 will be omitted.

[0058] 2 and 3, the structures of the first electrode pad 12, the first bonding material 13, the first conductive layer 14, the second electrode pad 15, the second bonding material 16, the second conductive layer 17, and the third electrode pad 18 are the same as those in Figures 4 and 5. The thickness T1 of the first bonding material 13 and the thickness T2 of the cutout portion NP are also the same as those in Figures 4 and 5.

[0059] 1.2 Manufacturing method of semiconductor device A method for manufacturing the semiconductor device 1 will be described with reference to FIGS. 6 to 13. FIG. 6 is a flow chart showing an example of the method for manufacturing the semiconductor device 1. FIGS. 7, 8, and 10 to 13 are cross-sectional views taken along the line II-II in FIGS. 2 and 3, showing an example of the structure of the semiconductor device 1 in the manufacturing process. FIG. 9 is a plan view showing an example of the structure of the semiconductor device 1 in the manufacturing process. In the following, a process for forming the first electrode pad 12, the first bonding material 13, and the first conductive layer 14 on the first surface S1 of the chip 11 in the manufacturing process of the semiconductor device 1 will be described. For this reason, the second electrode pad 15, the second bonding material 16, the second conductive layer 17, the first electrode 23, and the second electrode 24 are omitted from the illustration in FIGS. 7 to 13.

[0060] 6, in the manufacturing process of the semiconductor device 1, after the first electrode pads 12 are formed on the first surface S1 of the chip 11, the processes of steps S101 and S103 to S107 are carried out in order. An example of the manufacturing process of the semiconductor device 1 will be described below with reference to FIG.

[0061] First, as shown in FIG. 7, the first bonding material 13 is transferred (bonded) to the first conductive layer 14 (S101).

[0062] Next, a mask 21 is formed on the chip 11 and the first electrode pads 12 (S103). The mask 21 is formed by, for example, photolithography.

[0063] Specifically, first, photoresist is applied onto the chip 11 and the first electrode pads 12. Next, a photomask is prepared with an opening in a portion where an insulating film 22 described later is to be provided. Next, the chip 11 and the first electrode pads 12 are aligned with the photomask, and the photoresist is exposed to ultraviolet light. Next, the photoresist is developed. As a result, a mask 21 is formed. The mask 21 is also formed on the third electrode pads 18. As shown in FIG. 8, an opening OP is formed at an end of the surface of the first electrode pads 12 opposite the chip 11 (hereinafter referred to as the "fifth surface S5") and on a part of the chip 11.

[0064] Next, as shown in FIG. 9 and FIG. 10, an insulating film 22 is formed in the opening OP of the mask 21 (S104). The insulating film 22 is formed by, for example, a vacuum deposition method, a sputtering method, a CVD method, or the like. The insulating film 22 is, for example, a material that is heat-resistant, has low thermal decomposition, and can be washed (resin such as propylene carbonate, polypropylene carbonate, etc.), or a material that is highly thermally decomposable (polyurethane resin, etc.). As shown in FIG. 9, the insulating film 22 is formed so as to cover the end of the first electrode pad 12 and a part of the chip 11, and to surround the first electrode pad 12 and the third electrode pad 18. As shown in FIG. 10, the insulating film 22 is formed so as to cover the end face of the first electrode pad 12, the end of the fifth surface S5 of the first electrode pad 12, and a part of the chip 11. Note that the end of the fifth surface S5 of the first electrode pad 12 means not only the end of the fifth surface S5, but also the region from the end of the fifth surface S5 to the end face of the mask 21 provided on the first electrode pad 12.

[0065] 11, the mask 21 is removed (S105). The mask 21 is removed by, for example, a stripping liquid.

[0066] 12, the first conductive layer 14 to which the first bonding material 13 has been transferred is pressure sintered on the first electrode pad 12 and the insulating film 22 (S106). As a result, the first bonding material 13 is pressurized, and a contact portion CP1 and a notch portion NP are formed on the third surface S3 of the first bonding material 13. A protrusion portion PP1 of the first bonding material 13 is formed on the insulating film 22.

[0067] 13, the insulating film 22 is removed (S107). The insulating film 22 is removed by, for example, a cleaning solution. The insulating film 22 may be removed by heating.

[0068] With the configuration according to this embodiment, the reliability of the semiconductor device 1 can be improved.

[0069] FIG. 14 is an enlarged cross-sectional view showing a part of the structure of the semiconductor device 1 (region A1 in FIG. 5).

[0070] In the chip 11, the area from the second electrode pad 15 to the end of the first surface S1 of the chip 11 is at the collector electrode potential, and the area from the end of the first surface S1 of the chip 11 to the first electrode pad 12 is at the emitter electrode potential.

[0071] A relatively large voltage may be applied to the second electrode pad 15. When a relatively large voltage is applied to the second electrode pad 15, if the distance D1 from the end of the first surface S1 of the chip 11 to the first electrode pad 12 is too short, a creeping discharge may occur between the emitter electrode and the collector electrode, and a short circuit may occur between the second electrode pad 15 and the first electrode pad 12. For this reason, the distance D1 from the end of the first surface S1 of the chip 11 to the first electrode pad 12 is designed taking creeping discharge into consideration. The distance D1 is, for example, about 2 mm.

[0072] Furthermore, when the first conductive layer 14 to which the first bonding material 13 has been transferred is pressure sintered on the first electrode pad 12, the first bonding material 13 may protrude outward from the end face of the first electrode pad 12, and the position in the Z direction of the end of the protruding portion PP1 of the first bonding material 13 may be at the same position as or lower than the third surface S3 of the first bonding material 13. In this case, the distance D2 from the end of the first surface S1 of the chip 11 to the end of the protruding portion PP1 becomes relatively short, and the above-mentioned creeping discharge may occur when a relatively large voltage is applied to the second electrode pad 15.

[0073] Therefore, in this embodiment, before pressure sintering, an insulating film 22 is formed so as to cover the end face of the first electrode pad 12, the end of the fifth surface S5 of the first electrode pad 12, and a part of the chip 11. As a result, when the first conductive layer 14 to which the first bonding material 13 is transferred is pressure sintered on the first electrode pad 12 and the insulating film 22, a contact portion CP1 and a notch portion NP surrounding the contact portion CP1 are formed on the third surface S3 of the first bonding material 13. A protruding portion PP1 of the first bonding material 13 is formed on the insulating film 22. As a result, the end of the contact portion CP1 is located inside the end face of the first conductive layer 14. The end of the contact portion CP1 is located inside the end face of the first electrode pad 12. The protruding portion PP1 of the first bonding material 13 is located above the first electrode pad 12 on the front surface side of the chip 11. Therefore, even after the insulating film 22 is removed, the distance D1 from the end of the first surface S1 of the chip 11 to the first electrode pad 12 can be secured. Furthermore, a relatively long distance D2 can be secured from the end of the first surface S1 of the chip 11 to the end of the protruding portion PP1. The distance D2 is, for example, about 1.5 mm. Therefore, according to this embodiment, it is possible to suppress the occurrence of creeping discharge between the emitter electrode and the collector electrode. This makes it possible to suppress the occurrence of a short circuit between the second electrode pad 15 and the first electrode pad 12. This improves the reliability of the semiconductor device 1.

[0074] In addition, since the end of the contact portion CP1 is located inside the end face of the first conductive layer 14, the surface area of ​​the first bonding material 13 is larger than when the end of the contact portion CP1 is not located inside the end face of the first conductive layer 14. This improves the heat dissipation property of the first bonding material 13.

[0075] A relatively small voltage is applied to the third electrode pad 18. Therefore, the possibility of creeping discharge occurring between the emitter electrode and the gate electrode is relatively low compared to creeping discharge occurring between the emitter electrode and the collector electrode, but there is a possibility that creeping discharge may occur between the emitter electrode and the gate electrode.

[0076] In this embodiment, as described above, the contact portion CP1 and the notch portion NP surrounding the contact portion CP1 are formed on the third surface S3 of the first bonding material 13. The protruding portion PP1 of the first bonding material 13 is formed on the insulating film 22. The end of the contact portion CP1 is located inside the end face of the first conductive layer 14. The end of the contact portion CP1 is located inside the end face of the first electrode pad 12. The protruding portion PP1 of the first bonding material 13 is located above the first electrode pad 12 on the front surface side of the chip 11. Furthermore, the third electrode pad 18 is separated from the first electrode pad 12 and the first bonding material 13. Therefore, according to this embodiment, the occurrence of creeping discharge between the emitter electrode and the gate electrode can be suppressed. Therefore, the occurrence of a short circuit between the third electrode pad 18 and the first electrode pad 12 can be suppressed. This improves the reliability of the semiconductor device 1.

[0077] 1.3 Variations A semiconductor device according to a modification of the first embodiment will be described. In the semiconductor device 1 according to the modification of the first embodiment, a manufacturing method is different from that of the first embodiment. In the following description, the differences from the first embodiment will be described.

[0078] 1.3.1 Manufacturing method of semiconductor device A method for manufacturing the semiconductor device 1 will be described with reference to Figs. 15 and 16. Fig. 15 is a flow chart showing an example of the method for manufacturing the semiconductor device 1. Fig. 16 is a plan view showing an example of the structure in the manufacturing process of the semiconductor device 1. Note that, hereinafter, a process for forming the first electrode pad 12, the first bonding material 13, and the first conductive layer 14 on the first surface S1 of the chip 11 in the manufacturing process of the semiconductor device 1 will be described. For this reason, in Fig. 16, the second electrode pad 15, the second bonding material 16, the second conductive layer 17, the first electrode 23, and the second electrode 24 are omitted from illustration.

[0079] In the method for manufacturing the semiconductor device 1 according to the modified example of the first embodiment, steps S103 to S105 shown in Fig. 6 in the first embodiment are replaced with step S201. Step S201 will be described below.

[0080] After performing step S101 in FIG. 6 shown in the first embodiment, an insulating film 22 is formed on the chip 11 and the first electrode pads 12 (S201). Specifically, the insulating film 22 is formed so as to cover the end faces of the first electrode pads 12 and the ends of the fifth surface S5 of the first electrode pads 12, and a part of the chip 11. The insulating film 22 is formed, for example, by application using a dispenser. As shown in FIG. 16, the insulating film 22 is formed so as to cover the ends of the first electrode pads 12 and a part of the chip 11, and to surround the first electrode pads 12 and the third electrode pads 18.

[0081] After step S201 is performed, steps S106 and S107 in FIG. 6 shown in the first embodiment are performed.

[0082] The semiconductor device 1 manufactured by the manufacturing method according to this modification has a structure similar to that of the semiconductor device 1 manufactured by the manufacturing method according to the first embodiment. Therefore, according to this modification, the reliability of the semiconductor device 1 can be improved, similar to the first embodiment.

[0083] 2. Second embodiment A semiconductor device according to a second embodiment will be described. The semiconductor device 1 according to the second embodiment has a structure different from that of the first embodiment. Also, the manufacturing method of the semiconductor device 1 according to the second embodiment is different from that of the first embodiment. In the following description, the differences from the first embodiment will be described.

[0084] 2.1 Planar structure of semiconductor device The planar structure of the semiconductor device 1 will be described.

[0085] Fig. 17 is a plan view showing an example of the structure of the semiconductor device 1. Fig. 17 is a plan view of the semiconductor device 1 viewed from the first surface S1 side of the chip 11. The chip 11, the first electrode pad 12, the first bonding material 13, the first conductive layer 14, and the third electrode pad 18 are shown by solid lines. The second electrode pad 15 and the second conductive layer 17 are shown by dashed lines. Note that in Fig. 17, the first electrode 23 and the second electrode 24 are omitted from illustration.

[0086] 17, the semiconductor device 1 further includes an insulating film 22 in addition to the configuration of the first embodiment shown in FIG. 4. The insulating film 22 covers the ends of the first electrode pads 12 and a part of the chip 11, and surrounds the first electrode pads 12 and the third electrode pads 18.

[0087] 2.2 Cross-sectional structure of semiconductor device The cross-sectional structure of the semiconductor device 1 will be described.

[0088] Fig. 18 is a cross-sectional view taken along line III-III in Fig. 17, showing an example of the structure of the semiconductor device 1. Note that in Fig. 18, the first electrode 23 and the second electrode 24 are omitted from the illustration.

[0089] 18, the insulating film 22 is embedded in the notch NP of the third surface S3 of the first bonding material 13. The insulating film 22 covers the end faces of the first electrode pads 12 and the ends of the fifth surface S5 of the first electrode pads 12, as well as a part of the chip 11. That is, the first electrode pads 12 are surrounded by the insulating film 22. The third electrode pads 18 are surrounded by the insulating film 22.

[0090] The protruding portion PP1 of the first bonding material 13 is provided on the insulating film 22.

[0091] Fig. 19 is a cross-sectional view taken along line IV-IV in Fig. 17, showing an example of the structure of the semiconductor device 1. Note that in Fig. 19, the first electrode 23 and the second electrode 24 are omitted from the illustration.

[0092] 19, the insulating film 22 is embedded in the notch portion NP of the third surface S3 of the first bonding material 13. The insulating film 22 covers the end faces of the first electrode pads 12 and the ends of the fifth surface S5 of the first electrode pads 12, as well as a part of the chip 11. In other words, the first electrode pads 12 are surrounded by the insulating film 22.

[0093] The protruding portion PP1 of the first bonding material 13 is provided on the insulating film 22.

[0094] 2.3 Manufacturing method of semiconductor device A method for manufacturing the semiconductor device 1 will be described with reference to Fig. 20. Fig. 20 is a flow chart showing an example of the method for manufacturing the semiconductor device 1.

[0095] In the manufacturing method of the semiconductor device 1 according to the second embodiment, step S107 in Fig. 6 shown in the first embodiment is omitted. As a result, after performing step S106 in Fig. 6 shown in the first embodiment, a contact portion CP1 and a notch portion NP are formed on the third surface S3 of the first bonding material 13. A protruding portion PP1 of the first bonding material 13 is formed on the insulating film 22. In addition, the insulating film 22 remains between the end of the first surface S1 of the chip 11 and the first electrode pad 12, and between the end of the first surface S1 of the chip 11 and the end of the protruding portion PP1 of the first bonding material 13.

[0096] It should be noted that steps S103 to S105 in FIG. 20 may be replaced with step S201 in FIG. 15 shown in the modified example of the first embodiment.

[0097] According to this embodiment, the reliability of the semiconductor device 1 can be improved.

[0098] FIG. 21 is an enlarged cross-sectional view of a portion of the structure of the semiconductor device 1 (region A2 in FIG. 19).

[0099] In this embodiment, similarly to the first embodiment, the first conductive layer 14 to which the first bonding material 13 has been transferred is pressure sintered on the first electrode pad 12 and the insulating film 22. Thereafter, the insulating film 22 is not removed. As a result, as shown in FIG. 21, the insulating film 22 remains between the end of the first surface S1 of the chip 11 and the first electrode pad 12, and between the end of the first surface S1 of the chip 11 and the end of the protruding portion PP1 of the first bonding material 13. Therefore, according to this embodiment, it is possible to suppress the occurrence of creeping discharge between the emitter electrode and the collector electrode. As a result, similarly to the first embodiment, it is possible to improve the reliability of the semiconductor device 1.

[0100] In addition, in this embodiment, the insulating film 22 remains between the first electrode pad 12 and the third electrode pad 18. Therefore, according to this embodiment, it is possible to suppress the occurrence of creeping discharge between the emitter electrode and the gate electrode. As a result, similar to the first embodiment, it is possible to improve the reliability of the semiconductor device 1.

[0101] 3. Modifications, etc. As described above, the semiconductor device (1) according to the embodiment includes a chip (11) having a first surface (S1) and a second surface (S2) opposite to the first surface, a first electrode pad (12) provided on the first surface (S1) of the chip (11), a first conductive layer (14) provided above the first electrode pad (12), a first bonding material (13) provided between the first electrode pad (12) and the first conductive layer (14) and in contact with the first electrode pad (12) and the first conductive layer (14), and a second electrode pad (15) provided on the second surface (S2) of the chip (11). A third surface (S3) of the first bonding material (13) opposite to the first electrode pad (12) has a contact portion (CP1) in contact with the first electrode pad (12) and a cutout portion (NP) surrounding the contact portion. The end of the contact portion (CP1) is located inside the end face of the first conductive layer (14).

[0102] The embodiment is not limited to the above-described embodiment, and various modifications are possible.

[0103] Furthermore, in the flowcharts described in the above embodiments, the order of the processes can be changed as much as possible.

[0104] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention. [Explanation of symbols]

[0105] REFERENCE SIGNS LIST 1...semiconductor device, 11...chip, 12...first electrode pad, 13...first bonding material, 14...first conductive layer, 15...second electrode pad, 16...second bonding material, 17...second conductive layer, 18...third electrode pad, 21...mask, 22...insulating film, 23...first electrode, 24...second electrode

Claims

1. a chip having a first surface and a second surface opposite the first surface; a first electrode pad provided on the first surface of the chip; a first conductive layer provided above the first electrode pad; a first bonding material provided between the first electrode pad and the first conductive layer and in contact with the first electrode pad and the first conductive layer; a second electrode pad provided on the second surface of the chip; Equipped with a third surface of the first bonding material facing the first electrode pad has a contact portion in contact with the first electrode pad and a notch portion surrounding the contact portion; an end of the contact portion is located inside an end surface of the first conductive layer; Semiconductor device.

2. the first bonding material has a protruding portion protruding outward beyond the end surface of the first conductive layer; The semiconductor device according to claim 1.

3. the protruding portion contacts a portion of the end surface of the first conductive layer; 3. The semiconductor device according to claim 2.

4. the end of the contact portion is further located inside an end surface of the first electrode pad; The semiconductor device according to claim 1.

5. The protruding portion is located above the first electrode pad.

3. The semiconductor device according to claim 2.

6. The thickness of the first bonding material at the contact portion is 5 μm to 80 μm. The semiconductor device according to claim 1.

7. The thickness of the notch is equal to or less than half the thickness of the first bonding material at the contact portion. The semiconductor device according to claim 1.

8. The first bonding material includes any one of gold, silver, copper, lead, tin, and nickel; The semiconductor device according to claim 1.

9. The first conductive layer includes any one of molybdenum, ruthenium, tungsten, iron, gold, silver, copper, cobalt, nickel, and palladium; The semiconductor device according to claim 1.

10. an insulating film embedded in the notch and covering an end surface of the first electrode pad, an end surface of the fourth surface of the first electrode pad, and a part of the chip; Further comprising: The semiconductor device according to claim 1.

11. the first bonding material has a protruding portion protruding outward beyond the end surface of the first conductive layer, The protrusion is provided on the insulating film. The semiconductor device according to claim 10.

12. Transferring a first bonding material to the first conductive layer; forming a first electrode pad on a surface of the chip; forming an insulating film so as to cover end faces of the first electrode pads, end portions of a first surface of the first electrode pads opposite the chip, and a part of the chip; pressure sintering the first conductive layer onto which the first bonding material has been transferred onto the first electrode pad and the insulating film; Including, A method for manufacturing a semiconductor device.

13. After the pressure sintering, the insulating film is removed. Further comprising: The method for manufacturing a semiconductor device according to claim 12.

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