Semiconductor module, and power converter

Abstract

To provide a semiconductor module capable of reducing inductance, and a power converter.SOLUTION: A semiconductor module 30 constitutes two inverters connected to a common rotary electric machine. The semiconductor module 30 comprises a semiconductor element 41 that constitutes a first inverter, a semiconductor element 42 that constitutes a second inverter, a current path part 43 including the semiconductor element 41, and a current path part 44 including the semiconductor element 42. In an X direction, semiconductor elements 41 and 42 at least some of on-timings of which overlap are disposed adjacent to each other. The current path parts 43 and 44 run side by side in the X direction so that flowing currents are in opposite directions and face each other.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The disclosure in this specification relates to a semiconductor module and a power conversion device. [Background technology]

[0002] Patent Document 1 discloses a power conversion device having two inverters connected to a common rotating electric machine. The contents of the prior art document are incorporated by reference as explanations of technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-179964 A Summary of the Invention [Problem to be solved by the invention]

[0004] The inverter includes a semiconductor module having a semiconductor element. In the power conversion device of Patent Document 1, for example, the first inverter includes a first semiconductor module, and the second inverter includes a second semiconductor module. In this configuration, when a current flows between the first inverter and the second inverter, a current flows between the first semiconductor module and the second semiconductor module, which causes a problem of large inductance. In the above-mentioned viewpoints and other viewpoints not mentioned, further improvements are required for the semiconductor module and the power conversion device.

[0005] One disclosed object is to provide a semiconductor module and a power conversion device capable of reducing inductance. [Means for solving the problem]

[0006] The symbols in parentheses in the claims, this section, and the technical concept section are examples showing the correspondence with the specific means described in the embodiments below as one aspect. The symbols in parentheses do not limit the technical scope.

[0007] One aspect of the disclosure is a semiconductor module constituting two inverters connected to a common rotating electric machine (3), a first semiconductor element (41, 41H, 41L) constituting a first inverter (8, 21) which is one of the inverters; a second semiconductor element (42, 42H, 42L) constituting a second inverter (9, 22) which is another of the inverters and at least a part of its on-timing overlaps with the on-timing of the first semiconductor element; a first current path portion (43, 43H, 43L) including a first semiconductor element; a second current path portion (44, 44H, 44L) including a second semiconductor element; Equipped with A second semiconductor element is disposed adjacent to the first semiconductor element in a predetermined direction; The first current path portion and the second current path portion run side by side in the predetermined direction such that currents flow in opposite directions facing each other.

[0008] According to the disclosed semiconductor module, when the first semiconductor element and the second semiconductor element are both turned on, the current flowing through the first current path portion and the current flowing through the second current path portion are opposite to each other in the opposite directions, thereby canceling out the magnetic flux and reducing inductance.

[0009] Another aspect of the disclosure is a power conversion device, comprising: a first inverter (8, 21) connected to the rotating electric machine (3); a second inverter (9, 22) connected to the rotating electric machine; Equipped with The first inverter and the second inverter are configured to include a semiconductor module (30); Semiconductor modules are a first semiconductor element (41, 41H, 41L) constituting a first inverter; a second semiconductor element (42, 42H, 42L) constituting a second inverter and having at least a part of its on-timing overlapping with the on-timing of the first semiconductor element; a first current path portion (43, 43H, 43L) including a first semiconductor element; a second current path portion (44, 44H, 44L) including a second semiconductor element; having A second semiconductor element is disposed adjacent to the first semiconductor element in a predetermined direction; The first current path portion and the second current path portion run side by side in the predetermined direction such that currents flow in opposite directions facing each other.

[0010] According to the disclosed power conversion device, when the first semiconductor element and the second semiconductor element are both turned on, the current flowing through the first current path portion and the current flowing through the second current path portion are opposite to each other in the opposite directions, and thus the magnetic fluxes are cancelled out, thereby reducing inductance.

[0011] The various aspects disclosed in this specification adopt different technical means to achieve their respective objectives. The claims and the parenthetical symbols described in this section are merely illustrative of the corresponding relationship with the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer with reference to the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a diagram showing a drive system according to a first embodiment. [Diagram 2] FIG. 4 is a diagram showing an example of an operating point map of the rotating electric machine; [Diagram 3] FIG. 1 is a diagram showing a star-connected drive. [Figure 4] FIG. 1 is a diagram showing an open connection drive. [Diagram 5]FIG. 1 is a plan view illustrating an example of a power conversion device. [Figure 6] FIG. 2 is a plan view illustrating an example of a semiconductor module. [Figure 7] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 8] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 9] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 10] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 11] FIG. 13 is a diagram showing magnetic flux cancellation during open connection driving. [Figure 12] FIG. 13 is a diagram showing magnetic flux cancellation during star connection driving. [Figure 13] FIG. 11 is a diagram showing a drive system according to a second embodiment. [Figure 14] FIG. 2 is a plan view illustrating an example of a semiconductor module. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, a number of embodiments will be described based on the drawings. In each embodiment, the same reference numerals are used to designate corresponding components, and duplicated descriptions may be omitted. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration. In addition to the combination of configurations explicitly stated in the description of each embodiment, configurations of multiple embodiments can be partially combined together even if not explicitly stated, as long as there is no particular problem with the combination. Note that the description of A and / or B means at least one of A and B. In other words, it may include only A, only B, or both A and B.

[0014] The semiconductor device of the present embodiment and the semiconductor module including the semiconductor device are applied to, for example, a power conversion device of a mobile body using a rotating electric machine as a drive source. The mobile body may be, for example, an electric vehicle such as a battery electric vehicle (BEV), a hybrid electric vehicle (HEV), or a plug-in hybrid electric vehicle (PHEV), an aircraft such as an electric vertical take-off and landing aircraft or a drone, a ship, a construction machine, or an agricultural machine.

[0015] (First embodiment) First, a schematic configuration of a drive system for a moving body will be described with reference to FIG.

[0016] <Drive system for moving objects> As shown in FIG. 1, a drive system 1 for a moving body includes a DC power supply 2, a rotating electric machine 3, and a power conversion circuit 4.

[0017] The DC power supply 2 may be, for example, a rechargeable secondary battery such as a lithium ion battery, a nickel-metal hydride battery, etc. The DC power supply 2 may convert AC power into DC power and output it.

[0018] The rotating electric machine 3 is an open winding type three-phase rotating electric machine with an open neutral point. The rotating electric machine 3 has a U-phase winding 3U, a V-phase winding 3V, and a W-phase winding 3W. Hereinafter, the U-phase winding 3U, the V-phase winding 3V, and the W-phase winding 3W may be simply referred to as windings 3U, 3V, and 3W.

[0019] The rotating electric machine 3 functions as, for example, a drive source for a moving body, that is, an electric motor. When the moving body is a vehicle, the rotating electric machine 3 generates torque for driving drive wheels (not shown). The rotating electric machine 3 is not limited to an electric motor. The rotating electric machine 3 may be a motor generator having a function as an electric motor and a function as a generator, or may be a generator.

[0020] The power conversion circuit 4 performs power conversion between the DC power source 2 and the rotating electric machine 3. The drive system 1 is a system of a common power source type in which power is supplied from a common DC power source 2 to two inverters 8 and 9 described later. As illustrated in FIG. 1, the drive system 1 may include only one common DC power source 2, or may include multiple common DC power sources 2. The drive system 1 may include a power supply switch (not shown), such as an SMR, between the DC power source 2 and the power conversion circuit 4. SMR is an abbreviation for System Main Relay. Turning on the power supply switch enables power supply from the DC power source 2 to the rotating electric machine 3, and turning off the power supply switch cuts off the power supply from the DC power source 2 to the rotating electric machine 3.

[0021] <Power conversion circuit> Fig. 1 shows an example of a power conversion circuit 4. The power conversion circuit 4 shown in Fig. 1 includes power lines 5 and 6, a smoothing capacitor 7, inverters 8 and 9, a switch 10, a control unit 11, and a current sensor 12 as elements related to power conversion.

[0022] The power line 5 is a high-potential power line. The power line 5 is connected to the positive electrode of the DC power supply 2. The power line 6 is a low-potential power line. The power line 6 is connected to the negative electrode of the DC power supply 2. The power lines 5 and 6 are provided by a bus bar, which is, for example, a metal plate.

[0023] The smoothing capacitor 7 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 7 is provided between the power supply lines 5 and 6. The positive electrode of the smoothing capacitor 7 is connected to the power supply line 5 between the DC power supply 2 and the inverters 8 and 9. The negative electrode of the smoothing capacitor 7 is connected to the power supply line 6 between the DC power supply 2 and the inverters 8 and 9. The smoothing capacitor 7 is connected in parallel to the inverters 8 and 9.

[0024] The inverters 8 and 9 are DC-AC conversion circuits. The inverter 8 is configured to include upper and lower arm circuits 8HL for three phases. The upper and lower arm circuits 8HL are sometimes referred to as legs. The upper and lower arm circuits 8HL have an upper arm 8H and a lower arm 8L. The upper arm 8H and the lower arm 8L are connected in series between the power supply lines 5 and 6, with the upper arm 8H on the power supply line 5 side.

[0025] The connection point between the upper arm 8H and the lower arm 8L is connected to the winding of the corresponding phase in the rotating electric machine 3 via an output line 13. The inverter 8 has six arms. Each arm is configured with a switching element. The number of switching elements constituting each arm is not particularly limited. There may be one or more. When there are more than one switching elements, the multiple switching elements connected in parallel to each other are turned on and off at the same timing by a common gate drive signal (drive voltage).

[0026] In the example shown in Fig. 1, an n-channel MOSFET 14 is used as a switching element constituting each arm. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the upper arm 8H, the drain of the MOSFET 14 is connected to a power line 5. In the lower arm 8L, the source of the MOSFET 14 is connected to a power line 6. The source of the MOSFET 14 in the upper arm 8H and the drain of the MOSFET 14 in the lower arm 8L are connected to each other.

[0027] A freewheeling diode 15 is connected in anti-parallel to each of the MOSFETs 14. The diode 15 may be a parasitic diode (body diode) of the MOSFET 14, or may be provided separately from the parasitic diode. The anode of the diode 15 is connected to the source of the corresponding MOSFET 14, and the cathode is connected to the drain.

[0028] The inverter 9 has the same configuration as the inverter 8. The inverter 9 is configured to include upper and lower arm circuits 9HL for three phases. The upper and lower arm circuits 9HL have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the power supply lines 5 and 6, with the upper arm 9H on the power supply line 5 side.

[0029] A connection point between the upper arm 9H and the lower arm 9L is connected to a winding of a corresponding phase in the rotating electric machine 3 via an output line 16. The inverter 9 also has six arms. Each arm is configured with a switching element. The number of switching elements constituting each arm is not particularly limited. There may be one or more switching elements.

[0030] 1, an n-channel MOSFET 17 is used as a switching element constituting each arm. In the upper arm 9H, the drain of the MOSFET 17 is connected to the power line 5. In the lower arm 9L, the source of the MOSFET 17 is connected to the power line 6. The source of the MOSFET 17 in the upper arm 9H and the drain of the MOSFET 17 in the lower arm 9L are connected to each other. A freewheeling diode 18 is connected in anti-parallel to each of the MOSFETs 17.

[0031] As described above, the high potential side terminals (drain terminals) of the upper arms 8H, 9H of the inverters 8, 9 are connected to the power line 5. The low potential side terminals (source terminals) of the lower arms 8L, 9L are connected to the power line 6. A node which is a connection point between the upper arm 8H and the lower arm 8L is connected to one end of the winding of the corresponding phase via an output line 13, and a node between the upper arm 9H and the lower arm 9L is connected to the other end of the winding of the corresponding phase via an output line 16. Specifically, a node U1 of the U-phase upper and lower arm circuit 8HL is connected to one end of the U-phase winding 3U, and a node U2 of the U-phase upper and lower arm circuit 9HL is connected to the other end of the U-phase winding 3U. A node V1 of the V-phase upper and lower arm circuit 8HL is connected to one end of the V-phase winding 3V, and a node V2 of the V-phase upper and lower arm circuit 9HL is connected to the other end of the V-phase winding 3V. One end of the W-phase winding 3W is connected to a node W1 of a W-phase upper and lower arm circuit 8HL, and the other end of the W-phase winding 3W is connected to a node W2 of a W-phase upper and lower arm circuit 9HL.

[0032] The switching elements constituting the inverters 8 and 9 are not limited to the above-mentioned MOSFETs. For example, IGBTs may be used. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. In the case of an IGBT, a freewheeling diode is also connected in inverse parallel. The types of switching elements constituting the inverters 8 and 9 may be the same or different. For example, one of the inverters 8 and 9 may be composed of a MOSFET and the other of an IGBT.

[0033] The switch 10 is provided on at least one of the power supply lines 5, 6, between the connection point of the inverter 8 and the connection point of the inverter 9. In a closed state, the switch 10 connects the high potential side terminal of the upper arm 9H of the inverter 9 and the smoothing capacitor 7. In an open state, the switch 10 cuts off the connection between the high potential side terminal of the upper arm 9H and the smoothing capacitor 7. For example, a semiconductor switch or a mechanical relay can be used as the switch 10.

[0034] In the example shown in FIG. 1, a semiconductor switch, that is, a switching element formed on a semiconductor chip, is used as the switch 10. The switching element is not particularly limited. It may have a common configuration with the switching element constituting at least one of the inverters 8 and 9, or may have a different configuration. In FIG. 1, the switching element constituting the switch 10 is a MOSFET 19. A diode is connected in antiparallel to the MOSFET 19. When the MOSFET 19 is turned on and the switch 10 is in a closed state, the high potential side terminal of the upper arm 9H is electrically connected to the smoothing capacitor 7. When the MOSFET 19 is turned off and the switch 10 is in an open state, the electrical connection between the high potential side terminal of the upper arm 9H and the smoothing capacitor 7 is interrupted.

[0035] The control unit (CTR) 11 may be configured to include, for example, a processor, a memory, a storage, and the like. The processor executes various processes by accessing the memory. The memory is a rewritable volatile storage medium. The memory is, for example, a RAM. RAM is an abbreviation for Random Access Memory. The storage is, for example, a rewritable non-volatile storage medium. The storage stores a program executed by the processor. The program constructs multiple functional units by having the processor execute multiple instructions. The processes executed by the control unit 11 may be realized by software processing in which the processor executes the above-mentioned programs, or may be realized by hardware processing in which a dedicated electronic circuit is used.

[0036] The control unit 11 may have a drive command generating unit and a drive circuit unit, not shown. The drive command generating unit controls the inverters 8 and 9. The drive command generating unit generates a drive command (command signal) for controlling the on / off of the MOSFETs 14 and 17, and outputs the drive command to the drive circuit unit. The drive command generating unit generates the drive command based on a drive request for the rotating electric machine 3, such as a torque command value input from a higher-level ECU, not shown, and signals detected by various sensors.

[0037] The various sensors may include, for example, a current sensor 12 illustrated in Fig. 1, a rotation angle sensor, a voltage sensor, and the like (not shown). The current sensor 12 detects the phase currents flowing through the windings 3U, 3V, and 3W of each phase. The rotation angle sensor detects the rotation angle of the rotor of the rotating electric machine 3. The voltage sensor detects the voltage across the smoothing capacitor 7.

[0038] The drive command generating unit controls the switch 10. The drive command generating unit generates a drive command for controlling the on / off of the MOSFET 19 that constitutes the switch 10. This drive command is a switching command that switches the switch 10 between open and closed.

[0039] The drive circuit unit is sometimes called a driver. The drive circuit unit can independently control the on / off of the six MOSFETs 14, the six MOSFETs 17, and the one MOSFET 19 based on a drive command. The drive circuit unit outputs a drive signal so as to increase the drive voltage (gate voltage Vge) during the on period of the pulse-like drive command and decrease the drive voltage during the off period.

[0040] <Star connection drive and open connection drive> Next, star connection driving and open connection driving will be described with reference to Fig. 2, Fig. 3, and Fig. 4. Fig. 2 is an operating point map of the rotating electric machine 3 with the horizontal axis representing the rotation speed and the vertical axis representing the torque. Fig. 3 is a diagram showing star connection driving. Fig. 4 is a diagram showing open connection driving.

[0041] As shown in FIG. 2, the driving region of the rotating electric machine 3 is divided into two regions according to the rotation speed and torque. One of the driving regions is the star connection driving region. The star connection driving region is a normal use region. The other driving region is the open connection driving region. The open connection driving region is a region of higher rotation speed or higher torque than the star connection driving region.

[0042] When the operating point is in the star connection driving region, the control unit 11 executes control of star connection driving. Star connection driving is sometimes called Y driving. The control unit 11 controls the MOSFETs 14, 17, and 19 so that the windings 3U, 3V, and 3W are in a star connection state. Specifically, as shown in FIG. 3, the switch 10 is opened, that is, the MOSFET 19 is turned off. Also, the inverter 9 is set to a neutral point. As shown in FIG. 3, for example, the MOSFETs 17 of the upper arms 9H of all phases may be turned on and the MOSFETs 17 of the lower arms 9L of all phases may be turned off. The MOSFETs 17 of the upper arms 9H of all phases may be turned off and the MOSFETs 17 of the lower arms 9L of all phases may be turned on. Then, the MOSFETs 14 of the inverter 8 are controlled according to a drive request or the like.

[0043] The two-dot chain line arrows in Fig. 3 show an example of a current path. Fig. 3 shows the current path when the MOSFET 14 of the upper arm 8H of the U phase and the MOSFET 14 of the lower arm 8L of the W phase are turned on. In the example shown in Fig. 3, the upper arm 9H side of the inverter 9 is turned on and the lower arm 9L side is turned off. The current flows in the order of the upper arm 8H of the U phase → node U1 → U-phase winding 3U → node U2 → upper arm 9H of the U phase → upper arm 9H of the W phase → node W2 → W-phase winding 3W → node W1 → lower arm 8L of the W phase. In this way, the current flows without passing through the switch 10.

[0044] The control method of the inverter 8 by the control unit 11 is not particularly limited. For example, a PWM control method or an overmodulation PWM control method may be used. In the PWM control method or the overmodulation PWM control method, the drive command generating unit outputs, for example, a triangular wave, a sawtooth wave, or a square wave as a high-frequency carrier (carrier wave). Then, a pulse-shaped drive command is generated by comparing the voltage of a sine-wave voltage signal as a torque command value with the carrier. For example, a square wave control method may be used. In the square wave control method, the drive command generating unit generates, as a drive command, a square wave pulse having a one-to-one ratio of on-off periods within one control period from a sine-wave voltage signal as a torque command value. For example, the control method may be switched according to the rotation speed of the rotating electric machine 3. Square wave control has a higher voltage utilization rate than PWM control. In the star connection drive region, the PWM control method may be used in the low to medium rotation range, and the square wave control method may be used in the high rotation range.

[0045] When the operating point is in the open connection drive region, the control unit 11 executes the control of the open connection drive. The open connection drive is sometimes called the H drive. The control unit 11 closes the switch 10, that is, turns on the MOSFET 19, and opens the neutral point by the inverter 9. By opening the neutral point, an open connection circuit of the upper and lower arm circuits 8HL, 9HL of the U phase via the U-phase winding 3U is formed. Similarly, an open connection circuit of the upper and lower arm circuits 8HL, 9HL of the V phase via the V-phase winding 3V is formed. An open connection circuit of the upper and lower arm circuits 8HL, 9HL of the W phase via the W-phase winding 3W is formed. The control unit 11 regards each phase as an independent open connection circuit, and controls the applied voltage for each phase. The control unit 11 turns on the upper arms 8H, 9H of one of the inverters 8, 9 and the lower arms 8L, 9L of the other of the inverters 8, 9 in a common phase.

[0046] The two-dot chain line arrows in Fig. 4 show an example of a current path. Fig. 4 shows the current path when the MOSFET 14 of the W-phase lower arm 8L and the MOSFET 17 of the W-phase upper arm 9H are turned on. The current flows in the following order: switch 10 → W-phase upper arm 9H → node W2 → W-phase winding 3W → node W1 → W-phase lower arm 8L. In this manner, the current flows via switch 10.

[0047] The control method of the inverters 8 and 9 by the control unit 11 is not particularly limited. For example, a PWM control method may be used. A square wave control method or an overmodulation PWM control method may be used. The control method may be switched according to the rotation speed of the rotating electric machine 3. As described above, the control unit 11 can independently control each of the six MOSFETs 14 and the six MOSFETs 17. Thus, current can flow in both the positive and negative directions through the windings 3U, 3V, and 3W of each phase. The positive direction is the direction in which the current flows from the inverter 8 side to the inverter 9 side. The negative direction is the direction in which the current flows from the inverter 9 to the inverter 8 side.

[0048] For example, the two MOSFETs 17 constituting the U-phase upper and lower arm circuit 9HL may be turned on and off complementarily by PWM control, while the MOSFET 14 in the U-phase upper arm 8H is turned off and the MOSFET 14 in the U-phase lower arm 8L is turned on. This causes a negative current to flow through the U-phase winding 3U. On the other hand, the two MOSFETs 14 constituting the U-phase upper and lower arm circuit 8HL may be turned on and off complementarily by PWM control, while the MOSFET 17 in the U-phase upper arm 9H is turned off and the MOSFET 17 in the U-phase lower arm 9L is turned on. This causes a positive current to flow through the U-phase winding 3U.

[0049] As described above, the inverters 8 and 9 can switch between star connection driving and open connection driving. By executing open connection driving instead of star connection driving, it is possible to output a higher rotation range or a higher torque range.

[0050] <Power conversion device> FIG. 5 is a diagram showing an example of a power converter. For convenience, FIG. 5 shows elements covered by a sealing body constituting a semiconductor device in a see-through manner. The power converter provides at least a part of a power conversion circuit 4. The power converter provides at least inverters 8 and 9. The power converter 20 shown in FIG. 5 includes two inverters 21 and 22, a capacitor 23, an output terminal block 24, and a current sensor 25.

[0051] In the following, the thickness direction of a substrate constituting the semiconductor device, which will be described later, is defined as the Z direction, and one direction perpendicular to the Z direction is defined as the X direction. The direction perpendicular to both the Z direction and the X direction is defined as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X direction and the Y direction, is defined as the planar shape. The planar view from the Z direction may also be simply referred to as the planar view.

[0052] The inverters 21 and 22 correspond to the inverters 8 and 9. The inverter 21 provides the inverter 8 described above, and the inverter 22 provides the inverter 9. The inverters 21 and 22 are configured with a semiconductor module 30. The semiconductor module 30 includes at least one semiconductor device 40. In the example shown in FIG. 5, the inverters 21 and 22 are configured with the semiconductor module 30 including six semiconductor devices 40. The semiconductor module 30 and the semiconductor device 40 will be described in detail later.

[0053] Capacitor 23 serves as smoothing capacitor 7. Capacitor 23 includes, for example, a case (not shown) and a capacitor element housed in the case. The capacitor element is, for example, a film capacitor element. The capacitor element is formed by winding a film around an axis in a predetermined direction. The capacitor element has electrodes (not shown) on both end surfaces of the axis. The electrodes are sometimes called metallicon. Capacitor 23 includes a P bus bar 23P connected to the positive electrode and an N bus bar 23N connected to the negative electrode.

[0054] The P bus bar 23P and the N bus bar 23N are plate-shaped metal members. The P bus bar 23P and the N bus bar 23N are connected to corresponding electrodes by soldering, resistance welding, laser welding, or the like. Fig. 5 illustrates terminal portions of the P bus bar 23P and the N bus bar 23N for connection to the semiconductor module 30 (semiconductor device 40). The P bus bar 23P and the N bus bar 23N have terminal portions (not shown) for electrically connecting the smoothing capacitor 7 and the DC power supply 2.

[0055] Although not shown in the figure, a semiconductor switch that provides the switch 10 is provided integrally with, for example, the capacitor 23. The semiconductor switch is provided, for example, in the P bus bar 23P, in a path that electrically connects a terminal portion connected to the inverter 21 and a terminal portion connected to the inverter 22. The semiconductor switch may be provided, for example, in the N bus bar 23N, in a path that electrically connects a terminal portion connected to the inverter 21 and a terminal portion connected to the inverter 22.

[0056] The output terminal block 24 electrically connects the inverters 21, 22 and the rotating electric machine 3. The output terminal block 24 may be referred to as a motor terminal block. The output terminal block 24 includes an electrically insulating case made of resin or the like, and a bus bar held by the case. The bus bar 24U1 provides an output line 13 connected to a node U1 of the inverter 8 (21). The bus bar 24U2 provides an output line 16 connected to a node U2 of the inverter 9 (22). The bus bar 24V1 provides an output line 13 connected to a node V1 of the inverter 8 (21). The bus bar 24V2 provides an output line 16 connected to a node V2 of the inverter 9 (22). The bus bar 24W1 provides an output line 13 connected to a node W1 of the inverter 8 (21). The bus bar 24W2 provides an output line 16 connected to a node W2 of the inverter 9 (22).

[0057] The bus bars 24U1H and 24U1L are electrically connected to the bus bar 24U1. The bus bars 24U1H and 24U1L may be connected to the bus bar 24U1 continuously or by joining. The bus bar 24U1H is electrically connected to the U-phase upper arm 8H of the inverter 8 (21), and the bus bar 24U1L is electrically connected to the U-phase lower arm 8L. The bus bars 24U2H and 24U2L are electrically connected to the bus bar 24U2. The bus bar 24U2H is electrically connected to the U-phase upper arm 9H of the inverter 9 (22), and the bus bar 24U2L is electrically connected to the U-phase lower arm 9L.

[0058] Similarly, bus bars 24V1H and 24V1L are electrically connected to bus bar 24V1. Bus bar 24V1H is electrically connected to a V-phase upper arm 8H of inverter 8 (21), and bus bar 24U1L is electrically connected to a V-phase lower arm 8L. Bus bars 24V2H and 24V2L are electrically connected to bus bar 24V2. Bus bar 24V2H is electrically connected to a V-phase upper arm 9H of inverter 9 (22), and bus bar 24V2L is electrically connected to a V-phase lower arm 9L.

[0059] The bus bars 24W1H and 24W1L are electrically connected to the bus bar 24W1. The bus bar 24W1H is electrically connected to the W-phase upper arm 8H of the inverter 8 (21), and the bus bar 24W1L is electrically connected to the W-phase lower arm 8L. The bus bars 24W2H and 24W2L are electrically connected to the bus bar 24W2. The bus bar 24W2H is electrically connected to the W-phase upper arm 9H of the inverter 9 (22), and the bus bar 24W2L is electrically connected to the W-phase lower arm 9L.

[0060] The current sensor 25 serves as the current sensor 12. The current sensor 25 is disposed on the bus bars 24U2, 24V2, and 24W2 of the output terminal block 24. The current sensor 25 individually detects the phase currents flowing through the bus bars 24U2, 24V2, and 24W2. The current sensor 25 may be provided integrally with the output terminal block 24. The current sensor 25 may be disposed on the bus bars 24U1, 24V1, and 24W1, or may be disposed on the bus bars 24U1, 24V1, 24W1, 24U2, 24V2, and 24W2.

[0061] In the above-described power conversion device 20, the semiconductor module 30 is disposed in the Y direction between the capacitor 23 and the output terminal block 24. A plurality of semiconductor devices 40 are disposed side by side in the X direction.

[0062] The power conversion device 20 may include a case that houses the inverters 21, 22, the capacitor 23, the output terminal block 24, and the current sensor 25. The power conversion device 20 may include a cooler that cools the semiconductor module 30 and the like. The cooler may be configured so that a refrigerant flows through an internal flow path, or may be a heat sink equipped with fins or the like. The cooler may be provided integrally with the case that houses the inverters 21, 22. The power conversion device 20 may include an input terminal block that electrically relays the smoothing capacitor 7 (capacitor 23) and the DC power source 2. The power conversion device 20 may include a circuit board that provides the control unit 11.

[0063] <Semiconductor module and semiconductor device> Fig. 6 is a plan view showing an example of a semiconductor module 30. Fig. 6 corresponds to Fig. 5. In Fig. 6, like Fig. 5, elements covered by a sealing body are shown in a see-through manner. As described above, the semiconductor module 30 provides two inverters 21, 22 (8, 9) connected to a common rotating electric machine 3. The semiconductor module 30 includes at least one semiconductor device 40.

[0064] In the example shown in FIG. 6, the semiconductor module 30 has a U-phase semiconductor module 30U, a V-phase semiconductor module 30V, and a W-phase semiconductor module 30W. The semiconductor module 30U provides the U-phase of the inverters 21 and 22. The semiconductor module 30V provides the V-phase of the inverters 21 and 22. The semiconductor module 30W provides the W-phase of the inverters 21 and 22. The semiconductor modules 30U, 30V, and 30W are aligned in the X-direction. Each of the semiconductor modules 30U, 30V, and 30W includes two semiconductor devices 40. The semiconductor module 30 includes six semiconductor devices 40.

[0065] The semiconductor module 30U includes, as the semiconductor devices 40, a semiconductor device 40U1 and a semiconductor device 40U2. The semiconductor devices 40U1 and 40U2 are arranged side by side in the X direction so as to be adjacent to each other. The semiconductor module 30V includes a semiconductor device 40V1 and a semiconductor device 40V2. The semiconductor devices 40V1 and 40V2 are arranged side by side in the X direction so as to be adjacent to each other. The semiconductor module 30W includes a semiconductor device 40W1 and a semiconductor device 40W2. The semiconductor devices 40W1 and 40W2 are arranged side by side in the X direction so as to be adjacent to each other.

[0066] The semiconductor module 30 includes semiconductor elements 41 and 42, and current path portions 43 and 44. The semiconductor device 40 illustrated in FIG. 6 includes the semiconductor elements 41 and 42, and current path portions 43 and 44 within a single semiconductor device 40. The semiconductor element 41 constitutes the inverter 21 (8). The semiconductor element 42 constitutes the inverter 22 (9). The current path portion 43 constitutes the inverter 21. The current path portion 44 constitutes the inverter 22.

[0067] The semiconductor elements 41 and 42 are vertical elements formed on a semiconductor substrate made of silicon (Si) or a wide band gap semiconductor with a wider band gap than silicon. Examples of wide band gap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor elements 41 and 42 are sometimes called power elements, semiconductor chips, etc.

[0068] The vertical element is configured to pass a main current in the thickness direction of the semiconductor elements 41, 42 (semiconductor substrate). The semiconductor elements 41, 42 are arranged so that the thickness direction is approximately parallel to the Z direction. The semiconductor elements 41, 42 have main electrodes on both sides in the thickness direction. The semiconductor elements 41, 42 of this embodiment are formed by forming an n-channel MOSFET as a vertical element on a semiconductor substrate made of SiC. The semiconductor elements 41, 42 have a drain electrode as a main electrode on a lower surface facing a substrate 45 described later, and a source electrode on an upper surface opposite to the lower surface.

[0069] When a MOSFET is turned on, a current (main current) flows between the main electrodes, that is, between the drain electrode and the source electrode. If the diode is a parasitic diode, the source electrode also serves as the anode electrode, and the drain electrode also serves as the cathode electrode. The diode may be formed on a chip separate from the MOSFET. The drain electrode is the main electrode on the high potential side, and the source electrode is the main electrode on the low potential side. The drain electrode is formed on almost the entire bottom surface. The source electrode is formed on a part of the top surface.

[0070] The semiconductor elements 41 and 42 are generally rectangular in plan view. The semiconductor elements 41 and 42 have pads, which are electrodes for signals, on their upper surfaces. The pads are formed at positions on the upper surfaces different from the source electrodes. The pads include at least a gate pad.

[0071] The semiconductor element 41 includes a semiconductor element 41H constituting the upper arm 8H and a semiconductor element 41L constituting the lower arm 8L. The semiconductor element 42 includes a semiconductor element 42H constituting the upper arm 9H and a semiconductor element 42L constituting the lower arm 9L. The semiconductor elements 41 and 42 may have the same configuration or may have different configurations. The semiconductor element 41H includes semiconductor elements 41UH, 41VH, and 41WH. The semiconductor element 41L includes semiconductor elements 41UL, 41VL, and 41WL. The semiconductor element 42H includes semiconductor elements 42UH, 42VH, and 42WH. The semiconductor element 42L includes semiconductor elements 42UL, 42VL, and 42WL. In the following, the semiconductor elements 41H, 41UH, 41VH, 41WH, 42H, 42UH, 42VH, and 42WH may be referred to as upper arm elements. Semiconductor elements 41L, 41UL, 41VL, 41WL, 42L, 42UL, 42VL, and 42WL may be referred to as lower arm elements.

[0072] The semiconductor elements 41 and 42 are arranged in the X direction. The semiconductor elements 41 and 42 are arranged alternately in the X direction. The semiconductor elements 41 and 42 are arranged so that elements whose on-timings overlap at least partially are adjacent to each other. For example, the U phase of the inverters 21 and 22, that is, the semiconductor elements 41 and 42 constituting the semiconductor module 30U, are arranged in the order of the semiconductor element 42UL, the semiconductor element 41UH, the semiconductor element 42UH, and the semiconductor element 41UL from one end side in the X direction. The semiconductor device 40U1 includes the semiconductor element 41UH and the semiconductor element 42UL. The semiconductor elements 41UH and 42UL are arranged in the X direction. The semiconductor device 40U2 includes the semiconductor element 41UL and the semiconductor element 42UH. The semiconductor elements 41UL and 42UH are arranged in the X direction. The semiconductor elements 41UH, 41UL, 42UH, and 42UL are arranged in the X direction such that the semiconductor elements 41UH and 42UH are adjacent to each other. The semiconductor devices 40U1 and 40U2 are arranged such that the semiconductor elements 41UH and 42UH are adjacent to each other.

[0073] The semiconductor elements 41 and 42 constituting the V-phase of the inverters 21 and 22, that is, the semiconductor module 30V, are arranged in the same manner as the U-phase. The semiconductor elements 41 and 42 constituting the semiconductor module 30V are arranged in the order of the semiconductor element 42VL, the semiconductor element 41VH, the semiconductor element 42VH, and the semiconductor element 41VL from one end side in the X direction. The semiconductor element 42VL is arranged next to the semiconductor element 41UL. The semiconductor device 40V1 includes the semiconductor element 41VH and the semiconductor element 42VL. The semiconductor elements 41VH and 42VL are arranged in the X direction. The semiconductor device 40V2 includes the semiconductor element 41VL and the semiconductor element 42VH. The semiconductor elements 41VL and 42VH are arranged in the X direction. The semiconductor elements 41VH, 41VL, 42VH, and 42VL are arranged in the X direction so that the semiconductor elements 41VH and 42VH are adjacent to each other. The semiconductor devices 40V1 and 40V2 are arranged such that the semiconductor elements 41VH and 42VH are adjacent to each other.

[0074] The semiconductor elements 41 and 42 constituting the W-phase of the inverters 21 and 22, that is, the semiconductor module 30W, are arranged in the same manner as the U-phase. The semiconductor elements 41 and 42 constituting the semiconductor module 30W are arranged in the order of the semiconductor element 42WL, the semiconductor element 41WH, the semiconductor element 42WH, and the semiconductor element 41WL from one end side in the X direction. The semiconductor element 42WL is arranged next to the semiconductor element 41VL. The semiconductor device 40W1 includes a semiconductor element 41WH and a semiconductor element 42WL. The semiconductor elements 41WH and 42WL are arranged in the X direction. The semiconductor device 40W2 includes a semiconductor element 41WL and a semiconductor element 42WH. The semiconductor elements 41WL and 42WH are arranged in the X direction. The semiconductor elements 41WH, 41WL, 42WH, and 42WL are arranged in the X direction so that the semiconductor elements 41WH and 42WH are adjacent to each other. The semiconductor devices 40W1 and 40W2 are arranged such that the semiconductor elements 41WH and 42WH are adjacent to each other.

[0075] The current path section 43 includes a current path section 43H including the semiconductor element 41H and a current path section 43L including the semiconductor element 41L. The current path section 44 includes a current path section 44H including the semiconductor element 42H and a current path section 44L including the semiconductor element 42L. The semiconductor module 30 includes three current path sections 43H corresponding to the semiconductor elements 41UH, 41VH, and 41WH. The semiconductor module 30 includes three current path sections 43L corresponding to the semiconductor elements 41UL, 41VL, and 41WL. The semiconductor module 30 includes three current path sections 44H corresponding to the semiconductor elements 42UH, 42VH, and 42WH. The semiconductor module 30 includes three current path sections 44L corresponding to the semiconductor elements 42UL, 42VL, and 42WL. The current path sections 43 and 44 are arranged in the X direction in accordance with the arrangement of the semiconductor elements 41 and 42.

[0076] The current path portions 43, 44 may be configured to include, for example, a substrate 45 and an external connection terminal 46. The substrate 45 is disposed on the drain electrode side of the semiconductor elements 41, 42. The substrate 45 is provided, for example, for each semiconductor device 40. The substrate 45 has an insulating base material 451 and wiring 452 disposed on one surface of the insulating base material 451. The insulating base material 451 is formed using an electrically insulating material such as ceramic or resin. The substrate 45 may have a metal body disposed on a surface opposite to the one surface in the Z direction.

[0077] The wiring 452 is formed of a metal having good electrical conductivity and thermal conductivity, such as Cu or Al. The wiring 452 may have a plating film of Ni or Au on its surface. In the example shown in FIG. 6, the substrate 45 has wirings 452H and 452L as the wiring 452. One semiconductor element 42 is mounted on each of the wirings 452. The wiring 452H constitutes the current path portions 43H and 44H on the upper arm side. The upper arm element 41H or the upper arm element 42H is disposed on the wiring 452H. The drain electrode of the upper arm element 41H or the upper arm element 42H is joined to the wiring 452H. The wiring 452L constitutes the current path portions 43L and 44H on the lower arm side. The lower arm element 41L or the lower arm element 42L is disposed on the wiring 452L. The drain electrode of the lower arm element 41L or the lower arm element 42L is joined to the wiring 452L.

[0078] The wirings 452H, 452L extend in the Y direction. In a single semiconductor device 40, the wirings 452H, 452L are aligned in the X direction, which is a direction perpendicular to the extension direction. The wirings 452H, 452L run parallel to each other. The wirings 452H and 452L are disposed opposite each other. In two adjacent semiconductor devices 40, the wirings 452H or the wirings 452L run parallel to each other.

[0079] The external connection terminals 46 are terminals for electrically connecting the semiconductor module 30 (semiconductor device 40) to an external device. The external connection terminals 46 are formed using a metal material with good conductivity, such as copper. The external connection terminals 46 are, for example, a plate material. The external connection terminals 46 include output terminals 461A, 462A, a P-terminal 46P, and an N-terminal 46N as main terminals electrically connected to the main electrodes of the semiconductor elements 41, 42.

[0080] The output terminals 461A, 462A may be referred to as AC terminals, O terminals, etc. The output terminals 461A, 462A are electrically connected to the windings 3U, 3V, 3W of the opposing phases of the rotating electric machine 3 via the output terminal block 24. The output terminals 461A, 462A are provided for each of the current path portions 43, 44. In the example shown in FIG. 6, one output terminal 461A is provided for each of the current path portions 43H, 44H, and one output terminal 462A is provided for each of the current path portions 43L, 44L. Each of the semiconductor devices 40 includes one output terminal 461A, 462A. The output terminals 461A, 462A extend in the Y direction. The output terminals 461A, 462A are arranged side by side in the X direction. The output terminals 461A and 462A are arranged opposite each other. In the current path portions 43H and 44H, the output terminal 461A is joined to the source electrode of the upper arm element. In the current path portions 43L and 44L, the output terminal 462A is joined to the wiring 452L.

[0081] For example, the output terminal 461A on the upper arm side of the semiconductor device 40U1 is joined to the bus bar 24U1H of the output terminal block 24, and the output terminal 462A on the lower arm side is joined to the bus bar 24U2L. The output terminal 461A on the upper arm side of the semiconductor device 40U2 is joined to the bus bar 24U2H, and the output terminal 462A on the lower arm side is joined to the bus bar 24U1L. Similarly, the output terminal 461A on the upper arm side of the semiconductor device 40V1 is joined to the bus bar 24V1H of the output terminal block 24, and the output terminal 462A on the lower arm side is joined to the bus bar 24V2L. The output terminal 461A on the upper arm side of the semiconductor device 40V2 is joined to the bus bar 24V2H, and the output terminal 462A on the lower arm side is joined to the bus bar 24V1L. An upper arm side output terminal 461A of the semiconductor device 40W1 is joined to the bus bar 24W1H of the output terminal block 24, and a lower arm side output terminal 462A is joined to the bus bar 24W2L. An upper arm side output terminal 461A of the semiconductor device 40W2 is joined to the bus bar 24W2H, and a lower arm side output terminal 462A is joined to the bus bar 24W1L.

[0082] The P terminal 46P may be referred to as a positive terminal, a high potential power supply terminal, etc. The P terminal 46P is electrically connected to the P bus bar 23P of the capacitor 23. The N terminal 46N may be referred to as a negative terminal, a low potential power supply terminal, etc. The N terminal 46N is electrically connected to the N bus bar 23N of the capacitor 23. The P terminal 46P is provided for each of the current path portions 43H and 44H. The N terminal 46N is provided for each of the current path portions 43L and 44L. In the example shown in FIG. 6, one P terminal 46P is provided for each of the current path portions 43H and 44H, and one N terminal 46N is provided for each of the current path portions 43L and 44L. Each semiconductor device 40 has one P terminal 46P and one N terminal 46N. In the semiconductor device 40, the P terminal 46P and the N terminal 46N extend in the Y direction. The P terminal 46P and the N terminal 46N are arranged side by side in the X direction. The P terminal 46P and the N terminal 46N are disposed opposite each other.

[0083] The external connection terminals 46 include signal terminals (not shown) in addition to the main terminals described above. The signal terminals are electrically connected to the pads of the semiconductor elements 41 and 42. The signal terminals electrically connect the pads to a circuit board that provides the control unit 11, for example. The signal terminals include at least a terminal for applying a drive voltage to the gate electrodes of the semiconductor elements 41 and 42.

[0084] As illustrated in FIG. 6, the semiconductor device 40 may include a sealing body 47. The sealing body 47 seals the elements of the semiconductor device 40. The sealing body 47 integrally seals the semiconductor elements 41 and 42, the substrate 45, and a portion of the external connection terminal 46. In the example illustrated in FIG. 6, the sealing body 47 has a generally rectangular shape in plan view. Among the external connection terminals 46, the output terminals 461A and 462A protrude to the outside from one of the side surfaces of the sealing body 47. The P terminal 46P and the N terminal 46N protrude to the outside from the side surface opposite the output terminals 461A and 462A in the Y direction.

[0085] In a configuration in which the substrate 45 is disposed on a case or a cooler of the power conversion device 20, the sealing body 47 may be, for example, a gel or a potting resin. The sealing body 47 may be a resin molded body. The sealing body 47 may be provided for each semiconductor device 40 as illustrated in FIG. 6, or may be provided for each semiconductor module 30U, 30V, and 30W. The sealing body 47 may be provided integrally in the semiconductor module 30.

[0086] In the semiconductor module 30 having the above configuration, the current path portions 43 and the current path portions 44 are arranged alternately. Each of the current path portions 43, 44 extends in the Y direction. The current path portions 43, 44 included in a single semiconductor device 40 are arranged adjacent to each other in the X direction. The current path portions 43, 44L run parallel to each other. The current path portions 43, 44 are arranged opposite each other. In two adjacent semiconductor devices 40, the current path portions 43H, 44H on the upper arm side or the current path portions 43L, 44L on the lower arm side run parallel to each other.

[0087] In FIG. 6, the current path portions 43H and 44L run parallel to each other in the semiconductor devices 40U1, 40V1, and 40W1. The current path portions 43L and 44H run parallel to each other in the semiconductor devices 40U2, 40V2, and 40W2. The current path portions 43H and 44H run parallel to each other in the adjacent semiconductor devices 40U1 and 40U2. The current path portions 43H and 44H run parallel to each other in the adjacent semiconductor devices 40V1 and 40V2. The current path portions 43H and 44H run parallel to each other in the adjacent semiconductor devices 40W1 and 40W2. The current path portions 43L and 44L run parallel to each other in the adjacent semiconductor devices 40U2 and 40V1. The current path portions 43L and 44L run parallel to each other in the adjacent semiconductor devices 40V2 and 40W1.

[0088] The semiconductor module 30 is not limited to the configuration exemplified in Fig. 6. As described above, the semiconductor module 30 that provides the inverters 21 and 22 may include at least one semiconductor device 40. The semiconductor device 40 is not limited to a configuration including one each of the semiconductor elements 41 and 42.

[0089] For example, as shown in Fig. 7, the semiconductor device 40U1 may include, as the semiconductor elements 41, 42, two semiconductor elements 41UH constituting the U-phase upper arm of the inverter 21 and two semiconductor elements 42UL constituting the U-phase lower arm of the inverter 22. The two semiconductor elements 41UH are disposed on a wiring 452H extending in the Y direction. The semiconductor elements 41UH are lined up in the Y direction. The output terminal 461A is joined to the source electrodes of the two semiconductor elements 41UH. The two semiconductor elements 41UH are connected in parallel to each other.

[0090] Similarly, the two semiconductor elements 42UL are arranged on the wiring 452L extending in the Y direction. The semiconductor elements 42UL are lined up in the Y direction. The N terminal 46N is joined to the source electrodes of the two semiconductor elements 42UL. The two semiconductor elements 42UL are connected in parallel with each other. One of the semiconductor elements 41UH and one of the semiconductor elements 42UL are lined up in the X direction, and the other of the semiconductor elements 41UH and the other of the semiconductor elements 42UL are lined up in the X direction. A group of the semiconductor elements 41UH and a group of the semiconductor elements 42UL are lined up in the X direction. The current path portion 43H and the current path portion 43L run parallel to each other in the X direction.

[0091] The number of the semiconductor elements 41, 42 connected in parallel is not limited to the example (two) shown in FIG. 7. It may be three or more. FIG. 7 shows an example in which the semiconductor elements 41, 42 connected in parallel are arranged side by side in the Y direction, but the present invention is not limited to this. For example, as shown in FIG. 8, two semiconductor elements 41UH may be arranged side by side in the X direction, and two semiconductor elements 42UL may be arranged side by side in the X direction. Four semiconductor elements 41, 42 are arranged side by side in a row, and one of the semiconductor elements 41UH and one of the semiconductor elements 42UL are adjacent to each other. A group of the semiconductor elements 41UH and a group of the semiconductor elements 42UL are arranged side by side in the X direction. The current path portion 43H and the current path portion 43L run side by side in the X direction. The other semiconductor devices 40 constituting the semiconductor module 30 may have a configuration similar to that of the semiconductor device 40U1 shown in FIG. 7 or FIG. 8.

[0092] The semiconductor device 40 is not limited to a configuration that provides two of the 12 arms of the inverters 21, 22 (8, 9). For example, as shown in FIG. 9, the semiconductor device 40U may provide four arms that constitute the semiconductor module 30U. The semiconductor device 40U has a structure in which the above-mentioned two semiconductor devices 40U1, 40U2 are integrated. The semiconductor device 40U includes semiconductor elements 41UH, 41UL, 42UH, and 42UL. The semiconductor device 40U includes two output terminals 461A, two output terminals 462A, two P terminals 46P, and two N terminals 46N. In the example shown in FIG. 9, two wirings 452H and two wirings 452L are provided on a single substrate 45. The semiconductor device 40U includes one each of the current path portions 43H, 43L, 44H, and 44L.

[0093] The semiconductor elements 41UH, 41UL, 42UH, and 42UL are arranged in the X direction. In the X direction, the semiconductor elements 42UL, 41UH, 42UH, and 41UL are arranged in this order. The semiconductor element 42UL is arranged next to the semiconductor element 41UH. The semiconductor element 41UL is arranged next to the semiconductor element 42UH. The semiconductor element 41UH is arranged next to the semiconductor element 42UH. The current path portion 43H and the current path portion 44L run in parallel in the X direction. The current path portion 43L and the current path portion 44H run in parallel in the X direction. The current path portion 43H and the current path portion 44H run in parallel in the X direction. The semiconductor device 40 of the other phase constituting the semiconductor module 30 may have a configuration similar to that of the semiconductor device 40U shown in FIG. 9.

[0094] For example, as shown in Fig. 10, one semiconductor device 40S may provide one arm. Four semiconductor devices 40S illustrated in Fig. 10 constitute a semiconductor module 30U. One of the semiconductor devices 40S includes a semiconductor element 41UH and a current path portion 43H. The other of the semiconductor devices 40S includes a semiconductor element 41UL and a current path portion 43L. The other of the semiconductor devices 40S includes a semiconductor element 42UH and a current path portion 44H. The other of the semiconductor devices 40S includes a semiconductor element 42UL and a current path portion 44L.

[0095] The semiconductor elements 41UH, 41UL, 42UH, and 42UL are arranged in the X direction. In the X direction, the semiconductor element 42UL, the semiconductor element 41UH, the semiconductor element 42UH, and the semiconductor element 41UL are arranged in this order. The semiconductor element 42UL is arranged next to the semiconductor element 41UH. The semiconductor element 41UL is arranged next to the semiconductor element 42UH. The semiconductor element 42UH is arranged next to the semiconductor element 41UH. The current path portion 43H and the current path portion 44L run in parallel in the X direction. The current path portion 43L and the current path portion 44H run in parallel in the X direction. The current path portion 43H and the current path portion 44H run in parallel in the X direction. The other semiconductor devices 40 constituting the semiconductor module 30 may have a configuration similar to that of the semiconductor device 40S shown in FIG. 10. That is, the semiconductor module 30 may include twelve semiconductor devices 40S.

[0096] Although not shown in the figures, the semiconductor module 30 may include only one semiconductor device 40. The semiconductor device 40 may have a structure in which, for example, the six semiconductor devices 40U1, 40U2, 40V1, 40V2, 40W1, and 40W2 described above are integrated together. Note that Figs. 7 to 10 show other examples of the semiconductor device 40. Figs. 7 to 10 correspond to Fig. 6. In Figs. 7 to 10 as well, elements covered by the sealing body 47 are shown in a see-through manner.

[0097] <Magnetic flux cancellation when open connection is driven> In the case of open - wire drive (H drive), in the common phase of the inverters 21 and 22 (8 and 9), one upper arm and the other lower arm are turned on. In the semiconductor module 30 described above, in the common phase, one upper - arm element of the inverters 21 and 22 and the other lower - arm element of the inverters 21 and 22 are arranged side by side. The current - path portion 43H including the upper - arm element and the current - path portion 44L including the lower - arm element, or the current - path portion 44H including the upper - arm element and the current - path portion 43L including the lower - arm element run in parallel.

[0098] FIG. 11 shows the semiconductor device 40W2 having the configuration shown in FIG. 6. In FIG. 11, the current flowing at the timing when both the lower arm 8L of the W phase and the upper arm 9H of the W phase are turned on, that is, when both the semiconductor elements 41WL and 42WH are turned on, as illustrated in FIG. 4, is indicated by a dashed - line arrow. In the semiconductor device 40W2, the semiconductor element 42WH is arranged adjacent to the semiconductor element 41WL. The current - path portions 43L and 44H run in parallel. The current flowing through the current - path portion 43H including the semiconductor element 42WH and the current flowing through the current - path portion 43L including the semiconductor element 41WL are opposite in direction and face each other as indicated by the dashed - line arrow. Therefore, the inductance can be reduced by flux cancellation.

[0099] The same applies to the other semiconductor devices 40U1, 40U2, 40V1, 40V2, and 40W1. The same also applies to the configurations shown in other examples such as FIG. 10.

[0100] <Flux cancellation during Y - connection drive> During star connection drive (Y drive), the inverter 9 (22) is set to the neutral point, and the inverter 8 (21) is controlled according to a drive request, etc. FIG. 12 shows a semiconductor module 30 having the configuration shown in FIG. 6. In FIG. 12, the dashed arrow indicates the current that flows when the upper arms 9H of the inverter 9 are all turned on to set the neutral point, and the upper arm 8H of the U phase and the lower arm 8L of the W phase of the inverter 8 are both turned on, as shown in FIG. 3. In other words, it indicates the current that flows when the semiconductor elements 42UH, 42VH, and 42WH are turned on to set the inverter 22 to the neutral point, and the semiconductor elements 41UH and 41WL are turned on.

[0101] In the X direction, the semiconductor device 40U1 is disposed next to the semiconductor device 40U2. The semiconductor element 41UH is disposed next to the semiconductor element 42UH in the X direction. The current path portion 43H including the semiconductor element 41UH and the current path portion 44H including the semiconductor element 42UH run in parallel. The current flowing through the current path portion 43H including the semiconductor element 41UH and the current flowing through the current path portion 44H including the semiconductor element 42UH face each other in the opposite directions as shown by the dashed arrows. Therefore, the inductance can be reduced by canceling the magnetic flux.

[0102] In the semiconductor device 40W2, the semiconductor element 42WH is disposed next to the semiconductor element 41WL. The current path portions 43L and 44H run parallel to each other. The current flowing through the current path portion 44H including the semiconductor element 42WH and the current flowing through the current path portion 43L including the semiconductor element 41WL are opposed to each other in the opposite directions as shown by the dashed arrows. Therefore, the inductance can be reduced by canceling the magnetic flux. The same applies to the configuration shown in another example in FIG. 10 and the like.

[0103] <Summary of the First Embodiment> As described above, the power conversion device 20 of this embodiment includes two inverters 21, 22 (8, 9) connected to a common rotating electric machine 3. The inverters 21, 22 are configured to include a semiconductor module 30. The semiconductor module 30 includes semiconductor elements 41, 42 and current path portions 43, 44. In the X direction, the semiconductor element 42 constituting the inverter 22 is located next to the semiconductor element 41 constituting the inverter 21, and at least a part of the on-timing overlaps with the on-timing of the semiconductor element 41. In addition, the current path portion 43 including the semiconductor element 41 and the current path portion 44 including the semiconductor element 42 run side by side in the X direction so that the currents flowing therethrough face each other in opposite directions.

[0104] With the above arrangement, when adjacent semiconductor elements 41, 42 are both on, the current flowing through current path portion 43 and the current flowing through current path portion 44 face each other in opposite directions. Thus, the magnetic flux is cancelled out, reducing inductance. Note that inverter 21 (8) corresponds to the first inverter, and inverter 22 (9) corresponds to the second inverter. Semiconductor element 41 corresponds to the first semiconductor element, and semiconductor element 42 corresponds to the second semiconductor element. Current path portion 43 corresponds to the first current path portion, and current path portion 44 corresponds to the second current path portion. The X direction corresponds to the predetermined direction.

[0105] The semiconductor element 41 may constitute a predetermined phase of the inverter 21, and the semiconductor element 42 may constitute a predetermined phase of the inverter 22. In other words, adjacent semiconductor elements 41 and 42 may constitute a common phase, for example, a U-phase, in the inverters 21 and 22. When the semiconductor elements 41 and 42 are both turned on and a current flows through the common phase of the inverters 21 and 22, the current flowing through the current path portion 43 and the current flowing through the current path portion 44 face each other in the opposite directions. Thus, inductance can be reduced by magnetic flux cancellation.

[0106] The inverter 21 may be connected to one end of the windings 3U, 3V, 3W of the rotating electric machine 3, and the inverter 22 may be connected to the other end of the windings 3U, 3V, 3W. The inverters 21, 22 may be configured to be switchable between star connection driving in which the inverter 22 serves as a neutral point and open connection driving in which the neutral point of the inverter 22 is opened and the voltage applied to the windings 3U, 3V, 3W is controlled for each phase. In such a configuration, a current flows through a common phase of the inverters 21, 22 during star connection driving. Also, a current flows through a common phase of the inverters 21, 22 during open connection driving. By arranging the semiconductor elements 41, 42 constituting a common phase adjacent to each other as described above, inductance can be reduced by magnetic flux cancellation.

[0107] One of the semiconductor elements 41, 42 may be an upper arm element, and the other of the semiconductor elements 41, 42 may be a lower arm element. In open connection driving, one upper arm of the inverters 21, 22 and the other lower arm of the inverters 21, 22 are turned on in a common phase. By combining the adjacent semiconductor elements 41, 42 with the semiconductor element 41H and the semiconductor element 42L and / or the semiconductor element 41L and the semiconductor element 42H, both the semiconductor elements 41, 42 are turned on in open connection driving. Thus, inductance can be reduced by magnetic flux cancellation.

[0108] The semiconductor module 30 may include at least one semiconductor device 40 having semiconductor elements 41, 42, a P terminal 46P, an N terminal 46N, and output terminals 461A, 462A. One of the current path portion 43 and the current path portion 44 may have a P terminal 46P, an upper arm element, and an output terminal 461A, and the other of the current path portion 43 and the current path portion 44 may have an N terminal 46N, a lower arm element, and an output terminal 462A. According to this, in a single semiconductor device, currents flow in opposite directions and facing each other in the current path portions 43, 44 during open connection driving. Therefore, inductance can be reduced by magnetic flux cancellation. Since the single semiconductor device 40 includes the semiconductor elements 41, 42 and the adjacent current path portions 43, 44, the size can be reduced. This enhances the effect of magnetic flux cancellation, and the inductance can be further reduced. Incidentally, output terminal 461A corresponds to a first output terminal, and output terminal 462A corresponds to a second output terminal.

[0109] The semiconductor module 30 may include two semiconductor devices 40 constituting a common phase of the inverters 21 and 22. One of the semiconductor devices 40 includes semiconductor elements 41H and 42L, and current path portions 43H and 44L. The other of the semiconductor devices 40 includes semiconductor elements 41L and 42H, and current path portions 43L and 44H. The two semiconductor devices 40 may be arranged such that a current flowing through one current path portion 43 of the semiconductor device 40 and a current flowing through the other current path portion 44 of the semiconductor device 40 face each other in opposite directions. In star connection driving, the currents flowing through adjacent current path portions 43 and 44 of the two semiconductor devices 40 face each other in opposite directions. As described above, in open connection driving, the currents flowing through adjacent current path portions 43 and 44 in each semiconductor device face each other in opposite directions. Therefore, in both star connection driving and open connection driving, the inductance can be reduced by magnetic flux cancellation.

[0110] The semiconductor module 30 may include, for example, semiconductor devices 40U1 and 40U2. The semiconductor device 40U1 includes semiconductor elements 41UH and 42UL, and current path portions 43H and 44L. The semiconductor device 40U2 includes semiconductor elements 41UL and 42UH, and current path portions 43L and 44H. The semiconductor devices 40U1 and 40U2 are arranged such that a current flowing through one current path portion 43 of the semiconductor devices 40U1 and 40U2 and a current flowing through another current path portion 44 of the semiconductor devices 40U1 and 40U2 face each other in the opposite directions. When driven in star connection, the currents flowing through the adjacent current path portions 43 and 44 of the two semiconductor devices 40U1 and 40U2 face each other in the opposite directions. Therefore, the inductance can be reduced by magnetic flux cancellation. The same is true for the semiconductor devices 40V1 and 40V2, and the semiconductor devices 40W1 and 40W2.

[0111] The two semiconductor devices 40 constituting the common phase of the inverters 21, 22 may be arranged side by side in the X direction such that the upper arm elements 41H, 42H or the lower arm elements 41L, 42L are adjacent to each other in the X direction. For example, by arranging them on a common plane of a case, a cooler, or the like, the two semiconductor devices 40 satisfy a predetermined positional relationship, and the currents flowing through the adjacent current path portions 43, 44 of the two semiconductor devices 40 face each other in opposite directions. Therefore, with a simple configuration, inductance can be reduced by canceling magnetic flux.

[0112] The semiconductor elements 41, 42 adjacent to each other in the X direction may be upper arm elements 41H, 42H, or lower arm elements 41L, 42L. When the two semiconductor devices 40 are star-connected, the currents flowing through the adjacent current path portions 43, 44 of the two semiconductor devices 40 face each other in opposite directions. This allows the inductance to be reduced by canceling the magnetic flux. Although not shown, a single semiconductor device 40 may include upper arm elements 41H, 42H that constitute a common phase of the inverters 21, 22 as the adjacent semiconductor elements 41, 42. The semiconductor device 40 may include lower arm elements 41L, 42L that constitute a common phase of the inverters 21, 22.

[0113] Semiconductor elements 41 and 42 each having a MOSFET formed on a SiC substrate may be used. The above configuration reduces inductance and therefore switching surges. This can increase the switching speed, for example. Also, an increase in the number of elements can be suppressed.

[0114] Second embodiment This embodiment is a modified example based on the preceding embodiment, and the description of the preceding embodiment can be used. In the preceding embodiment, an example in which two inverters are connected to an open-winding type rotating electric machine is shown. Instead of this, two inverters are connected to a star-connected rotating electric machine. FIG. 13 shows a drive system 1 and a power conversion circuit 4 according to this embodiment. FIG. 13 shows a circuit configuration of the power conversion circuit 4. As in the preceding embodiment, the drive system 1 includes a DC power source 2, a rotating electric machine 3, and a power conversion circuit 4. The rotating electric machine (REM) 3 is a star-connected rotating electric machine. The rotating electric machine 3 includes, for example, 2×3 phase windings. In the example shown in FIG. 13, the rotating electric machine 3 includes 6-phase windings of U1, V1, W1, U2, V2, and W2. The windings of U2, V2, and W2 are wound so that no phase difference occurs with respect to the corresponding windings of U1, V1, and W1.

[0115] The power conversion circuit 4 includes two inverters 8 and 9, similar to the preceding embodiment. The inverter 8 drives a three-phase rotating electric machine, and the inverter 9 drives the remaining three-phase rotating electric machine. A node U1 of the inverter 8 is connected to a U1-phase winding, a node V1 is connected to a V1-phase winding, and a node W1 is connected to a W1-phase winding. A node U2 of the inverter 9 is connected to a U2-phase winding, a node V2 is connected to a V2-phase winding, and a node W2 is connected to a W2-phase winding.

[0116] The power conversion circuit 4 includes a smoothing capacitor 71 and a smoothing capacitor 72. The smoothing capacitor 71 is provided between the DC power supply 2 and the inverter 8. The smoothing capacitor 71 is connected in parallel to the inverter 8. The smoothing capacitor 72 is provided between the DC power supply 2 and the inverter 9. The smoothing capacitor 72 is connected in parallel to the inverter 9.

[0117] FIG. 14 shows an example of a power conversion device 20 and a semiconductor module 30. As in the preceding embodiment, the power conversion device 20 at least includes a semiconductor module 30 constituting the inverters 21, 22. The semiconductor module 30 includes at least one semiconductor device 40. The configuration of the semiconductor device 40 is the same as in the preceding embodiment. A single semiconductor device 40 may provide one arm or multiple arms. For convenience, the insulating base material 451 and the sealing body 47 constituting the substrate 45 are omitted in FIG. 14.

[0118] The semiconductor module 30 includes semiconductor elements 41 and 42 and current path portions 43 and 44, as in the previous embodiment. The semiconductor element 41 constitutes the inverter 21 (8), and the semiconductor element 42 constitutes the inverter 22 (9). The semiconductor element 41 includes 41UH and 41UL constituting the upper and lower arm circuit 8HL of the U1 phase, 41VH and 41VL constituting the upper and lower arm circuit 8HL of the V1 phase, and 41WH and 41WL constituting the upper and lower arm circuit 8HL of the W1 phase. The semiconductor element 42 includes 42UH and 42UL constituting the upper and lower arm circuit 9HL of the U2 phase, 42VH and 42VL constituting the upper and lower arm circuit 9HL of the V2 phase, and 42WH and 42WL constituting the upper and lower arm circuit 9HL of the W2 phase.

[0119] The semiconductor elements 41 and 42 are aligned in the X direction. The semiconductor elements 41 and 42 are arranged alternately in the X direction. The semiconductor elements 41 and 42 are arranged so that elements whose on-timings at least partially overlap are adjacent to each other. In the example shown in Fig. 14, the upper arm elements 41H and 42H of a common phase are arranged so that they are adjacent to each other, and the lower arm elements 41L and 42L of a common phase are arranged so that they are adjacent to each other.

[0120] Specifically, the semiconductor element 42UH is arranged next to the semiconductor element 41UH. The semiconductor element 42VH is arranged next to the semiconductor element 41VH. The semiconductor element 42WH is arranged next to the semiconductor element 41WH. The semiconductor element 42UL is arranged next to the semiconductor element 41UL. The semiconductor element 42VL is arranged next to the semiconductor element 41VL. The semiconductor element 42WL is arranged next to the semiconductor element 41WL. The semiconductor module 30 includes a semiconductor module 30U that provides the U1 and U2 phases of the inverters 21 and 22, a semiconductor module 30V that provides the V1 and V2 phases, and a semiconductor module 30W that provides the W1 and W2 phases. The semiconductor modules 30U, 30V, and 30W are aligned in the X direction.

[0121] As in the preceding embodiment, the current path section 43 includes a semiconductor element 41. The current path section 44 includes a semiconductor element 42. The current path sections 43 and 44 run parallel to each other in the X direction so that the currents flow in the opposite directions and face each other. Specifically, the current path sections 43H and 44H of a common phase run parallel to each other. The current path sections 43L and 44 of a common phase run parallel to each other. The current path sections 43H and 44H have the P terminal 46P and the output terminals 461A and 462A arranged in the Y direction opposite to each other so that the currents flow in the opposite directions. Similarly, the current path sections 43L and 44L have the N terminal 46N and the output terminals 461A and 462A arranged in the Y direction opposite to each other so that the currents flow in the opposite directions.

[0122] <Summary of the second embodiment> The power conversion device 20 of this embodiment also includes two inverters 21, 22 (8, 9) connected to a common rotating electric machine 3. The semiconductor modules 30 constituting the inverters 21, 22 include semiconductor elements 41, 42 and current path portions 43, 44. In the X direction, the semiconductor element 42 constituting the inverter 22 is located next to the semiconductor element 41 constituting the inverter 21, and at least a part of the on-timing overlaps with the on-timing of the semiconductor element 41. In addition, the current path portion 43 including the semiconductor element 41 and the current path portion 44 including the semiconductor element 42 run side by side in a predetermined direction such that the currents flowing therethrough face each other in opposite directions.

[0123] With this arrangement, when adjacent semiconductor elements 41, 42 are both turned on, the current flowing through current path portion 43 and the current flowing through current path portion 44 face each other in opposite directions. Therefore, the magnetic fluxes are cancelled out, thereby reducing inductance.

[0124] The semiconductor element 41 may constitute a predetermined phase of the inverter 21, and the semiconductor element 42 may constitute a predetermined phase of the inverter 22. In other words, the adjacent semiconductor elements 41 and 42 may constitute a common phase, for example, the U1 and U2 phases, in the inverters 21 and 22. When the semiconductor elements 41 and 42 are both turned on and a current flows through the common phase of the inverters 21 and 22, the current flowing through the current path portion 43 and the current flowing through the current path portion 44 face each other in the opposite directions. Therefore, inductance can be reduced by magnetic flux cancellation.

[0125] The dashed arrows in FIG. 14 indicate the current that flows when the upper arm elements of the U1 and U2 phases and the lower arm elements of the W1 and W2 phases are turned on. That is, they indicate the current that flows when the semiconductor elements 41UH, 42UH, 41WL, and 42WL are turned on. The current flowing through the current path portion 43H including the semiconductor element 41UH and the current flowing through the current path portion 44H including the semiconductor element 42UH are opposite to each other in the opposite directions. Therefore, the inductance can be reduced by magnetic flux cancellation. The current flowing through the current path portion 43L including the semiconductor element 41WL and the current flowing through the current path portion 44L including the semiconductor element 42WL are opposite to each other in the opposite directions. Therefore, the inductance can be reduced by magnetic flux cancellation.

[0126] Adjacent semiconductor elements 41, 42 are not limited to being of a common phase. A semiconductor element 42 constituting inverter 22, at least a part of whose on-timing overlaps with the on-timing of semiconductor element 41, may be located next to semiconductor element 41 constituting inverter 21. For example, a semiconductor element 42 providing a different phase from semiconductor element 41, at least a part of whose on-timing overlaps with the on-timing of semiconductor element 41, may be located next to semiconductor element 41. Then, current path portions 43, 44 may be located in parallel so that currents flow in opposite directions and face each other.

[0127] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure includes the exemplified embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes the omission of parts and / or elements of the embodiments. The disclosure includes the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are indicated by the description of the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the description of the claims.

[0128] The disclosure in the specification and drawings is not limited by the claims. The disclosure in the specification and drawings includes the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification and drawings without being bound by the claims.

[0129] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, there are no intervening elements or layers. Other words used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0130] Spatially relative terms such as "inside," "outside," "back," "bottom," "low," "top," "top," and the like are utilized herein to facilitate the description of the relationship of one element or feature to another element or feature as depicted in the figures. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "directly below" other elements or features would be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0131] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple dependent claims. Some of the claims may be described in a multiple dependent form, where the subsequent claim alternatively refers to the preceding claim. Furthermore, some of the claims may be described in a multiple dependent form, where the subsequent claim alternatively refers to the preceding claim. The claims described in these multiple dependent forms define multiple technical ideas.

[0132] <Technical philosophy 1> A semiconductor module constituting two inverters connected to a common rotating electric machine (3), a first semiconductor element (41, 41H, 41L) constituting a first inverter (8, 21) which is one of the inverters; a second semiconductor element (42, 42H, 42L) constituting a second inverter (9, 22) which is another one of the inverters and at least a part of an on-timing of which overlaps with an on-timing of the first semiconductor element; a first current path portion (43, 43H, 43L) including the first semiconductor element; a second current path portion (44, 44H, 44L) including the second semiconductor element; Equipped with The second semiconductor element is disposed adjacent to the first semiconductor element in a predetermined direction; The first current path portion and the second current path portion run side by side in the predetermined direction such that currents flow in opposite directions facing each other.

[0133] <Technical philosophy 2> the first semiconductor element constitutes a predetermined phase of the first inverter, The semiconductor module described in Technical Idea 1, wherein the second semiconductor element constitutes the specified phase of the second inverter.

[0134] <Technical philosophy 3> the first inverter is connected to one end of a winding (3U, 3V, 3W) of the rotating electric machine, and the second inverter is connected to the other end of the winding; The semiconductor module described in Technical Idea 2, wherein the first inverter and the second inverter are switchable between star connection driving in which the second inverter serves as a neutral point and open connection driving in which the neutral point of the second inverter is opened and the voltage applied to the winding for each phase is controlled.

[0135] <Technical philosophy 4> The semiconductor module described in Technical Idea 3, wherein one of the first semiconductor element and the second semiconductor element is an upper arm element, and the other of the first semiconductor element and the second semiconductor element is a lower arm element.

[0136] <Technical philosophy 5> the first semiconductor element; the second semiconductor element; High potential power terminal (46P), a low potential power supply terminal (46N) arranged next to the high potential power supply terminal in the predetermined direction; a first output terminal (461A) provided corresponding to the high potential power supply terminal; a second output terminal (462A) provided corresponding to the low potential power supply terminal; At least one semiconductor device (40) comprising: A semiconductor module described in Technical Idea 4, wherein one of the first current path portion and the second current path portion has the high potential power supply terminal, the upper arm element, and the first output terminal, and the other of the first current path portion and the second current path portion has the low potential power supply terminal, the lower arm element, and the second output terminal.

[0137] <Technical philosophy 6> As a semiconductor device constituting a common phase of the first inverter and the second inverter, a first semiconductor device (40U1, 40V1, 40W1) including the upper arm element of the first inverter, the lower arm element of the second inverter, the first current path portion, and the second current path portion; a second semiconductor device (40U2, 40V2, 40W2) including the lower arm element of the first inverter, the upper arm element of the second inverter, the first current path portion, and the second current path portion; Including, The semiconductor module described in Technical Idea 4 or Technical Idea 5, wherein the first semiconductor device and the second semiconductor device are arranged such that a current flowing through the first current path portion of one of the first semiconductor device and the second semiconductor device and a current flowing through the second current path portion of the other of the first semiconductor device and the second semiconductor device face each other in opposite directions.

[0138] <Technical philosophy 7> A semiconductor module described in Technical Idea 6, wherein the first semiconductor device and the second semiconductor device are arranged side by side in the specified direction so that the upper arm elements or the lower arm elements are adjacent to each other in the specified direction.

[0139] <Technical philosophy 8> The semiconductor module according to Technical Idea 3, wherein the first semiconductor element and the second semiconductor element are both upper arm elements or both lower arm elements.

[0140] <Technical philosophy 9> The semiconductor module according to any one of Technical Concepts 1 to 8, wherein the first semiconductor element and the second semiconductor element are MOSFETs formed on a SiC substrate. [Explanation of symbols]

[0141] 1... drive system, 2... DC power supply, 3... rotating electric machine, 3U, 3V, 3W... winding, 4... power conversion circuit, 5, 6... power supply line, 7, 71, 72... smoothing capacitor, 8, 9... inverter, 8HL, 9HL... upper and lower arm circuits, 8H, 9H... upper arm, 8L, 9L... lower arm, 10... switch, 11... control unit, 12... current sensor, 13, 16... output line, 14, 17 ,19...MOSFET, 15,18...Diode, 20...Power converter, 21,22...Inverter, 23...Capacitor, 23P...P bus bar, 23N...N bus bar, 24...Output terminal block, 24U1, 24U2, 24V1, 24V2, 24W1, 24W2, 24U1H, 24U1L, 24U2H, 24U2L, 24V1H, 24V1L, 24V2H, 24V2L, 24W1H, 24W1L, 24W2H, 24W2L... terminal portion, 25... current sensor, 30, 30U, 30V, 30W... semiconductor module, 40, 40S, 40U, 40U1, 40U2, 40V1, 40V2, 40W1, 40W2... semiconductor device, 41, 41H, 41L, 41UH, 41UL, 41VH, 41VL, 41WH, 41WL , 42, 42H, 42L, 42UH, 42UL, 42VH, 42VL, 42WH, 42WL...semiconductor element, 43, 43H, 43L, 44, 44H, 44L...current path portion, 45...substrate, 451...insulating base material, 452, 452H, 452L...wiring, 46...external connection terminal, 461A, 462A...output terminal, 46P...P terminal, 46N...N terminal, 47...sealing body

Claims

1. A semiconductor module constituting two inverters connected to a common rotating electric machine (3), a first semiconductor element (41, 41H, 41L) constituting a first inverter (8, 21) which is one of the inverters; a second semiconductor element (42, 42H, 42L) constituting a second inverter (9, 22) which is another one of the inverters and at least a part of an on-timing overlaps with an on-timing of the first semiconductor element; A first current path portion (43, 43H, 43L) including the first semiconductor element; A second current path portion (44, 44H, 44L) including the second semiconductor element; Equipped with The second semiconductor element is disposed adjacent to the first semiconductor element in a predetermined direction; The first current path portion and the second current path portion run side by side in the predetermined direction such that currents flow in opposite directions facing each other.

2. the first semiconductor element constitutes a predetermined phase of the first inverter, The semiconductor module according to claim 1 , wherein the second semiconductor element constitutes the predetermined phase of the second inverter.

3. the first inverter is connected to one end of a winding (3U, 3V, 3W) of the rotating electric machine, and the second inverter is connected to the other end of the winding, 3. The semiconductor module according to claim 2, wherein the first inverter and the second inverter are switchable between star connection driving in which the second inverter serves as a neutral point and open connection driving in which a neutral point by the second inverter is opened and a voltage applied to the winding for each phase is controlled.

4. 4. The semiconductor module according to claim 3, wherein one of the first semiconductor element and the second semiconductor element is an upper arm element, and the other of the first semiconductor element and the second semiconductor element is a lower arm element.

5. The first semiconductor element; The second semiconductor element; A high potential power supply terminal (46P); a low potential power supply terminal (46N) arranged next to the high potential power supply terminal in the predetermined direction; a first output terminal (461A) provided corresponding to the high potential power supply terminal; a second output terminal (462A) provided corresponding to the low potential power supply terminal; At least one semiconductor device (40) comprising:

5. The semiconductor module according to claim 4, wherein one of the first current path portion and the second current path portion has the high potential power supply terminal, the upper arm element, and the first output terminal, and the other of the first current path portion and the second current path portion has the low potential power supply terminal, the lower arm element, and the second output terminal.

6. As a semiconductor device constituting a common phase of the first inverter and the second inverter, a first semiconductor device (40U1, 40V1, 40W1) including the upper arm element of the first inverter, the lower arm element of the second inverter, the first current path portion, and the second current path portion; a second semiconductor device (40U2, 40V2, 40W2) including the lower arm element of the first inverter, the upper arm element of the second inverter, the first current path portion, and the second current path portion; Including, 6. The semiconductor module according to claim 4, wherein the first semiconductor device and the second semiconductor device are arranged such that a current flowing through the first current path portion of one of the first semiconductor device and the second semiconductor device and a current flowing through the second current path portion of the other of the first semiconductor device and the second semiconductor device face each other in opposite directions.

7. 7. The semiconductor module according to claim 6, wherein the first semiconductor device and the second semiconductor device are arranged side by side in the predetermined direction such that the upper arm elements or the lower arm elements are adjacent to each other in the predetermined direction.

8. 4. The semiconductor module according to claim 3, wherein the first semiconductor element and the second semiconductor element are both upper arm elements or both lower arm elements.

9. 4. The semiconductor module according to claim 1, wherein the first semiconductor element and the second semiconductor element are formed by forming MOSFETs on a SiC substrate.

10. a first inverter (8, 21) connected to the rotating electric machine (3); a second inverter (9, 22) connected to the rotating electric machine; Equipped with The first inverter and the second inverter are configured to include a semiconductor module (30), The semiconductor module A first semiconductor element (41, 41H, 41L) constituting the first inverter; a second semiconductor element (42, 42H, 42L) that configures the second inverter and has at least a part of its on-timing overlapping with the on-timing of the first semiconductor element; A first current path portion (43, 43H, 43L) including the first semiconductor element; A second current path portion (44, 44H, 44L) including the second semiconductor element; having The second semiconductor element is disposed adjacent to the first semiconductor element in a predetermined direction; The first current path portion and the second current path portion run side by side in the predetermined direction such that currents flow in opposite directions facing each other.

11. the first inverter is connected to one end of a winding (3U, 3V, 3W) of the rotating electric machine, and the second inverter is connected to the other end of the winding, the first inverter and the second inverter are capable of switching between star connection driving in which the second inverter is a neutral point and open connection driving in which a neutral point by the second inverter is opened and a voltage applied to the winding is controlled for each phase, the first semiconductor element constitutes a predetermined phase of the first inverter, The power conversion device according to claim 10 , wherein the second semiconductor element constitutes the predetermined phase of the second inverter.

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