Printed circuit board

Abstract

To provide a printed circuit board which can prevent failures and can improve the yield.SOLUTION: The present invention includes: a first substrate part having a first insulation part and a plurality of first wire layers arranged on the first insulation part or in the first insulation part: a resin layer arranged to cover a side surface of the first insulation layer; a second insulation part arranged on the upper surface of the first insulation part and on the upper surface of the resin layer; and a second substrate part including a second wire layer arranged on the second insulation part or in the second insulation part.SELECTED DRAWING: Figure 3a

Description

[Technical field]

[0001] The present invention relates to printed circuit boards. [Background technology]

[0002] Recently, with the development of artificial intelligence (AI) technology, multi-chip packages containing memory chips such as HBM (High Bandwidth Memory) and processor chips such as CPU (Central Processing Unit), GPU (Graphics Processing Unit), ASIC (Application Specific Integrated Circuit), and FPGA (Field Programmable Gate Array) are being used to process data that has increased exponentially. In order to mount various chips on a board, research is ongoing to realize fine circuits on the board more stably, prevent defects during the board manufacturing stage, and improve yields. Summary of the Invention [Problem to be solved by the invention]

[0003] SUMMARY OF THE PRESENT EMBODIMENTS One of the various objects of the present invention is to provide a printed circuit board for mounting electronic components, chips, etc., which can prevent defects and improve yield.

[0004] Another of the various objects of the present invention is to provide a printed circuit board that can improve heat dissipation characteristics.

[0005] Another of the various objects of the present invention is to provide a method for manufacturing a printed circuit board which can improve reliability. [Means for solving the problem]

[0006] The present invention provides a printed circuit board including a first substrate portion including a first insulating portion and a plurality of first wiring layers each arranged on or within the first insulating portion, a resin layer arranged to cover a side surface of the first insulating portion, a second insulating portion arranged to cover an upper surface of the first insulating portion and an upper surface of the resin layer, respectively, and a second substrate portion including a second wiring layer arranged on or within the second insulating portion.

[0007] Another of several solutions proposed through the present invention is to provide a printed circuit board including a first substrate portion including a first insulating portion and a first wiring layer disposed on or within the first insulating portion, a resin layer arranged to cover a side surface of the first substrate portion, and a second substrate portion including a second insulating portion disposed on the first insulating portion and the resin layer, and a second wiring layer disposed on or within the second insulating portion, wherein an upper surface of the resin layer is substantially coplanar with an upper surface of the first insulating layer. Effect of the Invention

[0008] Among the various effects of the present invention, one effect is that it is possible to provide a printed circuit board for mounting electronic components, chips, etc., which can prevent defects and improve yield.

[0009] Another advantage of the present invention, among other advantages, is that it provides a printed circuit board that can improve heat dissipation characteristics.

[0010] Another advantage of the present invention, among the various advantages, is that it is possible to provide a printed circuit board that can improve reliability. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Figure 3a]FIG. 1 is a cross-sectional view illustrating a schematic configuration of a printed circuit board according to an example. [Figure 3b] FIG. 1 is a cross-sectional view illustrating a schematic configuration of a printed circuit board according to an example. [Figure 4a] FIG. 11 is a cross-sectional view illustrating a printed circuit board according to another example. [Figure 4b] FIG. 11 is a cross-sectional view illustrating a printed circuit board according to another example. [Figure 5a] FIG. 11 is a cross-sectional view illustrating a printed circuit board according to yet another example. [Figure 5b] FIG. 11 is a cross-sectional view illustrating a printed circuit board according to yet another example. [Figure 6a] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6b] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6c] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6d] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6e] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6f] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6g] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. [Figure 6h] 1A to 1C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] The present invention will now be described with reference to the accompanying drawings, in which the shapes and sizes of elements may be exaggerated or reduced for clarity.

[0013] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0014] Referring to the drawing, an electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also connected to other electronic components described below to form various signal lines 1090.

[0015] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Needless to say, the chip-related components 1020 may include other types of chip-related electronic components. Needless to say, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips and electronic components.

[0016] The network-related components 1030 may include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, as well as any of a number of other different wireless or wired standards and protocols. It should be understood that the network-related components 1030 may also be combined with the chip-related components 1020 and with each other.

[0017] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may also include passive elements in the form of chip components used for various other different applications. It goes without saying that the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.

[0018] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically coupled to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. The other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. Needless to say, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

[0019] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0020] FIG. 2 is a perspective view that illustrates an example of an electronic device.

[0021] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components such as a camera module 1130 and / or a speaker 1140 that may or may not be physically and / or electrically connected to the motherboard 1110 are housed inside the smartphone 1100. Some of the components 1120 may be the above-mentioned chip-related components, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built-in. Meanwhile, it goes without saying that the electronic device is not necessarily limited to the smartphone 1100, and may be other electronic devices as described above.

[0022] Printed Circuit Board 3a and 3b are schematic cross-sectional views of a printed circuit board according to an example.

[0023] 3a, a printed circuit board according to an example includes a first substrate part 100, a second substrate part 200, and a resin layer 500. The first substrate part 100 includes a first insulating part 110 and a plurality of first wiring layers 120 disposed on or within the first insulating part, and the second substrate part 200 includes a second insulating part 210 and a second wiring layer 220 disposed on or within the second insulating part.

[0024] The first substrate unit 100 is a part that realizes the signal path of the printed circuit board, and the second substrate unit 200 corresponds to a part that connects the first substrate unit 100 to a configuration arranged on the printed circuit board. The second substrate unit 200 realizes a fine signal path, and corresponds to a part that plays a buffering role for fine pads when components such as semiconductor chips are mounted. In other words, the second substrate unit 200 corresponds to a part that stably maintains an electrical signal path with a configuration such as a chip that is relatively finer than the first substrate unit 100.

[0025] The first insulating section 110 of the first substrate section 100 may be composed of a plurality of insulating layers. More specifically, it may include a core layer 111 in the center, and may include a plurality of build-up insulating layers 112 arranged on the core layer 111. The plurality of first wiring layers 120 may be arranged on the core layer 111 and have a structure in which they are embedded by the build-up insulating layer 112, or may be arranged on the build-up insulating layer 112 and have a structure in which they are embedded by another build-up insulating layer 112. However, this is not limited thereto, and the first substrate section 100 may have a structure that does not include the core layer 111, that is, a so-called coreless substrate.

[0026] The core layer 111 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass fiber, glass cloth, and / or glass fabric) together with such a resin, and may be a photosensitive material and / or a non-photosensitive material. The insulating material may include, but is not limited to, SR (Solder Resist), ABF (Ajinomoto Build-up Film), FR-4, BT (Bismaleimide Triazine), RCC (Resin Coated Copper) insulating material, CCL (Copper Clad Laminate) insulating material, and the like, and may include other polymer materials. Meanwhile, it is also possible to use a material including an inorganic filler such as silica and a reinforcing material such as glass fiber in these resins. For example, a prepreg may be used, but is not limited to this. In addition, in FIG. 3a, the core layer 111 is expressed as one layer, but this is not limiting, and the core layer 111 may be formed by laminating a plurality of thin cores.

[0027] The build-up insulating layer 112 may include an insulating material. The insulating material of the build-up insulating layer 112 may be selected from the same group of insulating materials as the insulating material of the core layer 111, but is not limited thereto, and may be any material that can be used as an insulating material for a printed circuit board. For example, the insulating material of the build-up insulating layer 112 may be an insulating resin containing an inorganic filler such as silica and a reinforcing material such as glass fiber. Specifically, a prepreg may be used, but is not limited thereto, and may include ABF (Ajinomoto Build-up Film). The build-up insulating layer 112 may be composed of a plurality of insulating layers, and each build-up insulating layer 112 may include the same insulating material, but is not limited thereto, and may include different materials.

[0028] Meanwhile, in Figs. 3a and 3b, two build-up insulating layers 112 are disposed on the upper side of the core layer 111, and three build-up insulating layers 112 are disposed on the lower side of the core layer 111. This may be advantageous in preventing warpage caused by asymmetry in the step of forming the second substrate unit 200 on the first substrate unit 100. However, this is not necessarily limited, and the number of build-up insulating layers 112 may be disposed symmetrically with respect to the core layer 111. However, this is not necessarily limited, and the number of build-up insulating layers 112 can be variously changed according to the use and design of the substrate, and can be used without restriction.

[0029] The first substrate unit 100 of the printed circuit board according to an example may include a plurality of first wiring layers 120. Some of the plurality of first wiring layers 120 may be disposed on the core layer 111, and the other portion may be disposed on the build-up insulating layer 112. Without being limited thereto, the first wiring layer 120 may not be disposed on the core layer 111, and the first wiring layer 120 may be disposed only on the build-up insulating layer 112. There is no limit to the number of wiring layers of the plurality of first wiring layers 120 of the first substrate unit 100, and the number may correspond to the number of the build-up insulating layers 112.

[0030] Each of the first wiring layers 120 includes a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. Each circuit may be a circuit pattern for a general signal path, and may perform various functions according to the design, such as mounting components. For example, it may include a ground pattern, a power pattern, a signal pattern, and the like. Here, the signal pattern may mean a pattern for electrical connection of various signals, such as data signals, other than ground, power, and the like. Each of the first wiring layers 120 may be formed of a plurality of circuit patterns, may be formed of a metal plate, or may be configured as a combination of a plurality of circuit patterns and a metal plate.

[0031] Each of the first wiring layers 120 may be formed by any one of SAP (Semi Additive Process), MSAP (Modified Semi Additive Process), TT (Tenting), or a subtractive method, but is not limited thereto, and any method that can form a circuit on a printed circuit board can be used without limitation. Also, the first wiring layers 120 may be formed by different methods depending on the application, design, and the like.

[0032] The first substrate unit 100 of the printed circuit board according to an example may include a plurality of first via layers 130 penetrating at least a portion of the first insulating unit 110 to connect the plurality of first wiring layers 120 to each other. The plurality of first via layers 130 may include through vias 131 and build-up via layers 132. Penetrating at least a portion of the first insulating unit 110 means that the first via layer 130 may be formed to penetrate one build-up insulating layer 112 of the first insulating unit 110 or to penetrate the plurality of build-up insulating layers 112 collectively.

[0033] The through via 131 may include a metal layer formed on the wall surface of a through hole penetrating the core layer 111, and a plug filling the metal layer. The metal layer may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. The plug may include an ink of an insulating material. The metal layer may include, but is not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be formed instead of the electroless plating layer, or both may be included. The through via 131 may perform various functions according to the design. For example, it may include a ground via, a power via, a signal via, etc.

[0034] The plurality of build-up via layers 132 may include microvias. The microvias may be filled vias that fill a via hole, or may be conformal vias that are arranged along the wall surface of a via hole. The microvias may be arranged in a stacked type and / or staggered type. Each of the plurality of build-up via layers 132 may include a metal, which may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. Each of the plurality of build-up via layers 132 may include, but is not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be formed instead of the electroless plating layer, or both may be included. The plurality of build-up via layers 132 may perform various functions depending on the design of the layer. For example, they may include ground vias, power vias, signal vias, and the like.

[0035] On the other hand, as described above, since there is no limit to the number of build-up insulating layers 112 of the first insulating section 110 and the number of multiple first wiring layers 120, there is of course no limit to the number of via layers that penetrate at least a portion of the first insulating section 110 so as to connect the multiple first wiring layers 120 to each other.

[0036] In FIG. 3a, the first substrate portion 100 is depicted as being composed of a first insulating portion 110, a first wiring layer 120, and a first via layer 130, but is not limited to this and may further include a cavity penetrating at least a portion of the first insulating portion 110, or may be a substrate having electronic components built in, and may further include techniques and configurations that are available to a person of ordinary skill in the art.

[0037] The second substrate unit 200 of the printed circuit board according to an example may include a second insulating unit 210 and a second wiring layer 220 disposed on or within the second insulating unit 210. By disposing the second substrate unit 200 on the first substrate unit 100, the second insulating unit may cover an upper surface of the first insulating unit 110, and the second insulating unit 210 may cover at least a portion of the first wiring layer 120. That is, the second insulating unit 210 may cover at least a portion of the first wiring layer 120 disposed on the uppermost side of the plurality of first wiring layers 120.

[0038] The second insulating unit 210 may be composed of a plurality of insulating layers. Each of the plurality of insulating layers of the second insulating unit 210 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass fiber, glass cloth, and / or glass fabric) together with such a resin, and may be a photosensitive material and / or a non-photosensitive material. The insulating material may include, but is not limited to, SR (Solder Resist), ABF (Ajinomoto Build-up Film), FR-4, BT (Bismaleimide Triazine), RCC (Resin Coated Copper), CCL (Copper Clad Laminate), and the like, and may include other polymer materials. Meanwhile, it is also possible to use a resin including an inorganic filler such as silica and a reinforcing material such as glass fiber. For example, a prepreg may be used, but is not limited thereto, and may include Ajinomoto Build-up Film (ABF) or a photosensitive material. Each of the insulating layers of the second insulating unit 210 may include substantially the same insulating material, but is not limited thereto, and may include different materials.

[0039] The second insulating part 210 may include an insulating material that is more advantageous for microfabrication than the first insulating part 110 so that the second substrate part 200 can realize finer wiring than the wiring of the first substrate part 100. For example, the content of reinforcing material such as inorganic filler and glass fiber contained in each insulating layer of the second insulating part 210 may be greater than the content of reinforcing material such as inorganic filler and glass fiber contained in the build-up insulating layer 112 of the first insulating part 110. By making the content of reinforcing material such as inorganic filler and glass fiber of the insulating material of the second insulating part 210 greater than the content of reinforcing material of the insulating material of the first insulating part 110, an insulating layer that is advantageous for microfabrication can be realized. However, this is not necessarily limited thereto, and the second insulating part 210 of the second substrate part 200 and the first insulating part 110 of the first substrate part 100 may include substantially the same insulating material. Furthermore, without being limited thereto, the second insulating portion 210 may contain a photosensitive material, which may be more advantageous for fine processing than forming wiring on the first insulating portion 110 .

[0040] Meanwhile, in FIG. 3a, the second insulating part 210 is depicted as being composed of four insulating layers, however, the number of insulating layers of the second insulating part 210 is not limited to this and can be varied in various ways depending on the use and design of the substrate, and can be used without restriction.

[0041] The second substrate unit 200 of the printed circuit board according to an example may include a plurality of second wiring layers 220. Each of the plurality of second wiring layers 220 may be disposed on or within the second insulating unit 210. The plurality of second wiring layers 220 may be disposed on any one of the insulating layers of the second insulating unit 210 and embedded in another insulating layer, or may have a structure in which the plurality of second wiring layers 220 is disposed on any one of the insulating layers and exposed to the outside. There is no limit to the number of wiring layers of the plurality of second wiring layers 220 of the second substrate unit 200, and the number may correspond to the number of insulating layers of the second insulating unit 210.

[0042] Each of the second wiring layers 220 includes a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. Each of the second wiring layers 220 may be a circuit pattern for a general signal path, and may perform various functions according to the design, such as mounting components. For example, it may include a ground pattern, a power pattern, a signal pattern, and the like. Here, the signal pattern may mean a pattern including a pattern for electrical connection of various signals, such as a data signal, other than ground, power, and the like. Each of the second wiring layers 220 may be formed of a plurality of circuit patterns, may be formed of a metal plate, or may be configured as a combination of a plurality of circuit patterns and a metal plate.

[0043] Each of the multiple second wiring layers 220 may be formed by any one of SAP (Semi Additive Process), MSAP (Modified Semi Additive Process), TT (Tenting), or a subtractive method, but is not limited to these. Any method that can form a circuit on a printed circuit board or a method that can realize a fine circuit can be used without restrictions, and the multiple second wiring layers 220 may be formed by different methods depending on the application, design, etc.

[0044] The second substrate unit 200 of the printed circuit board according to an example may include a plurality of second via layers 230 penetrating at least a portion of the second insulating unit 210 to connect the plurality of second wiring layers 220 to each other. Penetrating at least a portion of the second insulating unit 210 means that the second via layer 230 may be formed to penetrate one insulating layer of the second insulating unit 210 or to penetrate the plurality of insulating layers of the second insulating unit 210 collectively. However, this is not limited thereto, and any one of the plurality of second via layers 230 may also penetrate at least a portion of the second insulating unit 210 to connect the second wiring layer 220 arranged at the bottom of the second substrate unit 200 and the first wiring layer 120 arranged at the top of the first substrate unit 100 to each other.

[0045] The plurality of second via layers 230 may include microvias. The microvias may be filled vias that fill a via hole, or may be conformal vias that are arranged along the wall surface of a via hole. The microvias may be arranged in a stacked type and / or staggered type. Each of the plurality of second via layers 230 may include a metal, which may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof, and may preferably include copper (Cu), but is not limited thereto. Each of the plurality of build-up via layers may include, but is not limited to, an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be formed instead of the electroless plating layer, or both may be included. The plurality of second via layers 230 may perform various functions depending on the design of the layer. For example, they may include ground vias, power vias, signal vias, and the like.

[0046] On the other hand, as described above, since there is no limit to the number of insulating layers of the second insulating section 210 and the number of multiple second wiring layers 220, it goes without saying that there is no limit to the number of via layers that penetrate at least a portion of the second insulating section 210 so as to connect the multiple second wiring layers 220 to each other.

[0047] The second wiring layer 220 of the second substrate unit 200 may have a higher wiring density than the first wiring layer of the first substrate unit 100. That is, the second wiring layer 220 may include finer wiring than the wiring of the first wiring layer 120. Higher wiring density is a relative concept, and may mean, for example, that the average pitch of the wiring included in the second wiring layer 220 may be smaller than the average pitch of the wiring included in the first wiring layer 120. The pitch may be measured by photographing a cut cross section of the printed circuit board with a scanning microscope, and the average pitch may be an average value of the pitch between the wirings measured at any five points. In addition, the average interlayer insulation distance between the second wiring layers 220 may be smaller than the average interlayer insulation distance between the multiple first wiring layers 120. The interlayer insulation distance may also be measured by photographing a cut cross section of the printed circuit board with a scanning microscope, and the average interlayer insulation distance may be an average value of the insulation distance between adjacent wiring layers measured at any five points. That is, the wiring included in the second wiring layer 220 may be a high-density fine wiring having a smaller L / S (Line / Space) than the wiring included in the first wiring layer 120. As a non-limiting example, the wiring included in the second wiring layer 220 may have a line / space of about 2 / 2 μm, but is not limited thereto. Since the second wiring layer 220 of the second substrate unit 200 has a higher density than the wiring of the first wiring layer 120 of the first substrate unit 100, it may be effective in interconnecting electronic components such as semiconductor chips. That is, the second substrate unit 200 may be used as a redistribution layer of a semiconductor chip.

[0048] The printed circuit board according to an example includes a resin layer 500 disposed on a side surface of the first substrate unit 100. The resin layer 500 may be disposed so as to cover a side surface of the first insulating unit 110, and may be disposed on a lower surface of the second insulating unit 210. That is, the upper surface of the resin layer 500 may be covered by the second insulating unit 210. In other words, the second insulating unit 210 of the second substrate unit 200 may cover the upper surface of the first insulating unit 110 of the first substrate unit 100 and the upper surface of the resin layer 500.

[0049] The resin layer 500 can be disposed on the side of the first substrate unit 100 after the first substrate unit 100 is completed, and can function to support the first substrate unit 100. The second substrate unit 200 can be formed on the first substrate unit 100 and the resin layer 500, so that the above-mentioned arrangement can be achieved. If the defect of the first substrate unit 100 can be determined before the resin layer 500 is bonded to the side of the first substrate unit 100 after the first substrate unit 100 is completed, the defect rate of the printed circuit board can be reduced. When the second substrate unit 200 is formed immediately after the formation of the first substrate unit 100, the defect of the printed circuit board can be the defect generated in the first substrate unit 100 or the defect generated in the second substrate unit 200. Therefore, manufacturing the second substrate unit 200 for realizing fine wiring on the first substrate unit 100 where a defect has already occurred may correspond to a waste of costs. Meanwhile, in the printed circuit board according to the embodiment, the second substrate part 200 is formed only with the first substrate part 100 that is free of defects after the first substrate part 100 is completed and subjected to a defect judgment, so that the defects of the printed circuit board can be controlled by controlling the defects of the second substrate part 200. That is, the good second substrate part 200 is formed on the defective first substrate part 100, so that the defective printed circuit board can be eliminated. Therefore, even if the printed circuit board according to the embodiment is manufactured in a strip unit and singulated in one unit, the first substrate part 100 is manufactured first, and then inserted into a separate jig J and filled with the resin layer 500, so that the defective rate can be reduced and the cost can be minimized.

[0050] The resin layer 500 may include an organic material, and the organic material may include at least one of a thermal interface material (TIM), a bonding sheet, an epoxy molding compound (EMC), and an underfill resin, but is not limited thereto. Any material that can be bonded to and fixed to the temporary jig J may be used without limitation. When the resin layer 500 includes a thermal interface material (TIM) having excellent heat dissipation properties, the overall heat dissipation properties of the printed circuit board can be improved, and heat generated on electronic components such as semiconductor chips arranged on the second substrate unit 200 can be effectively dissipated to the outside.

[0051] In the printed circuit board according to an example, a part of the outermost side may be formed of the resin layer 500. That is, a side of the resin layer 500 may be exposed to the outside of the printed circuit board, and conversely, since the first insulating part 110 is covered by the resin layer 500, the side of the first insulating part 110 may not be exposed to the outside of the printed circuit board. Furthermore, the side of the second insulating part 210 may be substantially coplanar with the side of the resin layer 500. The term "substantially coplanar" may include most things. In the case where the second substrate part 200 is formed on the resin layer 500 in the manufacturing stage and then cut through the resin layer 500 for singulation, the resin layer 500 is disposed on the outermost side, so that the side of the resin layer 500 may be coplanar with the second insulating part 210 of the second substrate part 200. Since the resin layer 500 is disposed on the outermost side of the printed circuit board, if the heat dissipation characteristic of the resin layer 500 is excellent, a more advantageous effect in heat dissipation can be obtained. Without being limited thereto, the resin layer 500 may include a material having excellent rigidity to ensure the rigidity of the printed circuit board, without being limited thereto, the resin layer 500 may also prevent the first insulating part 110 from scattering during a singulation process of the printed circuit board.

[0052] At least a part of the second wiring layer 220 may be disposed in an upper region of the resin layer 500. In the manufacturing stage of the printed circuit board, the resin layer 500 is disposed on the side surface of the first substrate unit 100, and then the second substrate unit is formed on the first substrate unit 100 and the resin layer 500. Therefore, the second substrate unit 200 may be formed so as to straddle the first substrate unit 100 and the resin layer. The area of ​​the second substrate unit 200 may be wider than the area of ​​the first substrate unit 100, and the difference in area may be the area of ​​the resin layer 500. Therefore, the second wiring layer 220 of the second substrate unit 200 may be formed over a wider area, and the area of ​​the second substrate unit 200 may be increased. However, the present invention is not limited to this, and the second wiring layer 220 may be formed only in the first substrate unit 100.

[0053] The printed circuit board according to an example may further include a third substrate unit 300 disposed under the first insulating unit 110 of the first substrate unit 100. The third substrate unit 300 may include a third insulating unit 310 and a third wiring layer 320 disposed on the third insulating unit 310, and may include a third via layer 330 penetrating at least a portion of the third insulating unit 310 to connect the third wiring layer 320 and the first wiring layer 120 to each other.

[0054] The third insulating portion 310 may include substantially the same material as the second insulating portion 210. The third insulating portion 310 may be formed simultaneously with the step of forming the second insulating portion 210. By forming the third insulating portion 310 simultaneously with the second insulating portion 210, warpage occurring during the manufacturing step of the printed circuit board according to an example may be controlled.

[0055] The third wiring layer 320 is disposed at the bottom of the printed circuit board and may function as a pad so that the bottom surface of the printed circuit board is connected to other components, and the third via layer 330 may function to connect the third wiring layer 320 and the first wiring layer 120 to each other, but is not limited thereto. The third wiring layer 320 and / or the third via layer 330 may include a metal material, and the metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof, and preferably includes copper (Cu), but is not limited thereto.

[0056] Meanwhile, a portion of the resin layer 500 may have a structure embedded in the third insulating part 310. That is, a lower surface of the resin layer 500 may be covered by the third insulating part, and a portion of a side surface may be covered by the third insulating part. This is a structure resulting from the manufacturing step of the printed circuit board, which will be described in detail later in the method of manufacturing the printed circuit board.

[0057] In addition, the printed circuit board according to an example may further include a solder resist layer 510 disposed on the second insulating part 210 and / or the third insulating part 310. The solder resist layer 510 is disposed on the outermost part of the printed circuit board and can protect the printed circuit board from the outside. The solder resist layer 510 may use a known solder resist, and the solder resist layer 510 may include a thermosetting resin and an inorganic filler dispersed in the thermosetting resin, but may not include glass fiber. The insulating resin may be a photosensitive insulating resin, and the filler may be an inorganic filler and / or an organic filler, but is not limited thereto, and other polymer materials may be used as necessary. The solder resist layer 510 may have an opening, and at least a part of the second wiring layer 220 and at least a part of the third wiring layer 320 may be exposed through the opening. The second wiring layer 220 exposed through the opening can be connected to other elements such as a semiconductor chip, and the third wiring layer 320 exposed through the opening can be connected to a main board or another printed circuit board, or can be connected to other elements such as a semiconductor chip.

[0058] Meanwhile, the printed circuit board according to an example may further include a surface treatment layer 520 covering an exposed area of ​​the second wiring layer 220 and / or covering an exposed area of ​​the third wiring layer 320. The surface treatment layer 520 may include any one of nickel (Ni), palladium (Pd), and gold (Au), and may be realized by a plurality of these metal layers. The surface treatment layer 520 may be formed by an ENIG or ENEPIG method, but is not limited thereto. Meanwhile, the surface treatment layer may include an organic material. The surface treatment layer 520 may improve the bonding strength and signal transmission strength between the wiring layer functioning as a pad of the printed circuit board and the configuration mounted on the printed circuit board.

[0059] Referring to FIG. 3b, the printed circuit board of one example may further include a semiconductor chip 600 arranged on the second substrate part 200, and a connecting member 610 for connecting the semiconductor chip 600 and the second wiring layer 220 of the second substrate part 200 to each other.

[0060] Each of the semiconductor chips 600 may include an integrated circuit (IC) die in which hundreds to millions of elements are integrated into one chip. In this case, the integrated circuit may be, for example, a central processor (e.g., CPU), a graphic processor (e.g., GPU), a field programmable gate array (FPGA), a digital signal processor, an encryption processor, a microprocessor, a microcontroller, an application processor (e.g., AP), an analog-to-digital converter, an application-specific IC (ASIC), etc., but is not limited thereto, and may be other types of memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, and a high bandwidth memory (HBM), or a power management IC (PMIC). Alternatively, the semiconductor chip 600 may be a divided logic chip divided by a die split and having different cores.

[0061] The semiconductor chips 600 may each be formed based on an active wafer, and in this case, silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc. may be used as a base material forming the respective bodies. Various circuits may be formed on the bodies. Connection pads may be formed on the respective bodies, and the connection pads may include a conductive material such as aluminum (Al) or copper (Cu). The semiconductor chips may be bare dies, and in this case, metal bumps may be disposed on the connection pads. The semiconductor chips may be packaged dies, and in this case, a redistribution layer may be further formed on the connection pads, and metal bumps may be disposed on the redistribution layer.

[0062] The connecting member 610 may be formed of a low melting point metal, for example, solder such as tin (Sn)-aluminum (Al)-copper (Cu), but is not limited thereto. The connecting member 610 may be formed in a multi-layer or single layer. When formed in a multi-layer, it may include copper pillars and solder, and when formed in a single layer, it may include tin-silver solder or copper, but is not limited thereto. In addition, any means that can act as an intermediary to electrically connect the semiconductor chip or electronic components to the second wiring layer 220 of the second substrate unit 200 may be used without limitation. Although FIG. 3b shows two semiconductor chips mounted, this is not limited thereto, and more semiconductor chips may be mounted, and more or less semiconductor chips 600 may be electrically connected by the connecting member 610.

[0063] Meanwhile, the printed circuit board according to the embodiment is not limited to the configurations shown in Figures 3a and 3b, and may further include other general configurations of a printed circuit board, i.e., may further include configurations that can be utilized by a person having ordinary skill in the art.

[0064] 4a and 4b are cross-sectional views that diagrammatically show a printed circuit board according to another example.

[0065] 4a and 4b, the printed circuit board according to another example may further include a fourth substrate unit 400. The fourth substrate unit 400 may further include a fourth insulating unit 410 disposed on a side of the first to third insulating units 110, 210, and 310, a fourth wiring layer 420 disposed on or within the fourth insulating unit, and a fourth via layer 430 penetrating at least a portion of the fourth insulating unit 410 to connect the fourth wiring layer 420 to each other.

[0066] The fourth insulating part 410 may include a 4-1 insulating part 411, a 4-2 insulating part 412, and a 4-3 insulating part 413. The 4-1 insulating part 411 may correspond to the first insulating part 110, the 4-2 insulating part 412 may correspond to the second insulating part 210, and the 4-3 insulating part 413 may correspond to the third insulating part 310.

[0067] The fourth wiring layer 420 can include a 4-1 wiring layer 421, a 4-2 wiring layer 422, and a 4-3 wiring layer 423. The 4-1 wiring layer 421 can correspond to the first wiring layer 120, the 4-2 wiring layer 422 can correspond to the second wiring layer 220, and the 4-3 wiring layer 423 can correspond to the third wiring layer 320.

[0068] The fourth via layer 430 may include a 4-1 via layer 431, a 4-2 via layer 432, and a 4-3 via layer 433. The 4-1 via layer 431 may correspond to the first via layer 130, the 4-2 via layer 432 may correspond to the second via layer 230, and the 4-3 via layer 433 may correspond to the third via layer 330.

[0069] The fact that any one of the configurations of the fourth substrate unit 400 corresponds to any one of the configurations of the first to third substrate units 100, 200, and 300 can mean that any one of the configurations of the fourth substrate unit 400 includes substantially the same material as any one of the configurations of the first to third substrate units 100, 200, and 300, is composed of the same number of layers, has substantially the same thickness or density, or can be formed at the same stage. For example, the fact that the 4-1 insulating unit 411 can correspond to the first insulating unit 110 can mean that the configuration of the 4-1 insulating unit 411 may be the same as the configuration of the first insulating unit 110, and may be composed of a core layer 111 and a build-up insulating layer 112 and have the same number of layers. This can be applied to the second substrate unit 200 or the third substrate unit 300 in the same manner, and can be applied not only to the insulating unit but also to the wiring layer or the via layer. For example, this can mean that the 4-1 wiring layer 421 may have wiring having substantially the same density as the wiring in the first wiring layer 120, and the 4-2 wiring layer 422 may have wiring having substantially the same density as the wiring in the second wiring layer 220.

[0070] The fourth substrate unit 400 may be disposed on a side of the resin layer 500, and may be disposed on a side of the second substrate unit 200 and the third substrate unit 300. However, the boundary between the fourth substrate unit 400 and the second substrate unit 200 and the third substrate unit 300 may not be clear, and the fourth substrate unit 400 may be understood as any one region of the printed circuit board, not a separately formed board. A part of the fourth substrate unit 400 may be formed in the step of forming the first substrate unit 100, another part of the fourth substrate unit 400 may be formed in the step of forming the second substrate unit 200, and the remaining part of the fourth substrate unit 400 may be formed in the step of forming the third substrate unit 300. A detailed description of this will be given later in the method of manufacturing a printed circuit board.

[0071] The fourth substrate unit 400 can perform a heat dissipation function. The fourth insulating unit 410, the fourth wiring layer 420, and the fourth via layer 430 can be arranged so that heat transferred through the uppermost wiring layer among the 4-2 wiring layers 422 can be dissipated to the lowermost side of the printed circuit board. That is, referring to FIG. 4b, heat generated in the semiconductor chip 600 can be dissipated to the lowermost side of the printed circuit board through the fourth substrate unit 400. By arranging the fourth substrate unit 400 to perform a heat dissipation function, the heat dissipation characteristics of the printed circuit board can be improved without changing the internal design of the first to third substrate units 100, 200, and 300, and by arranging the fourth substrate unit 400 to correspond to the first to third substrate units 100, 200, and 300, the bending characteristics of the printed circuit board can be strengthened. In this case, the fourth substrate unit 400 can perform a heat dissipation function together with the resin layer 500, and in this case, the heat dissipation effect can be further improved.

[0072] Meanwhile, among the configurations other than the fourth substrate unit 400, the same configuration as that of the printed circuit board according to one example can also be applied to the printed circuit board according to another example, so that a duplicated description thereof will be omitted.

[0073] 5a and 5b are cross-sectional views that diagrammatically show a printed circuit board according to yet another example.

[0074] 5a and 5b, in the printed circuit board according to another embodiment, the fourth substrate unit 400 may further include a metal block 440. The metal block 440 may be connected to the 4-1 wiring layer 421 by penetrating the 4-2 insulating unit 412. The metal block 440 may include a metal material, and as the metal material, any material having excellent thermal conductivity may be used without limitation, and may preferably include copper (Cu), but is not limited thereto, and an alloy including such a material may be used. The metal block 440 may be in the shape of a square prism, but is not limited thereto, and may have various shapes such as a cylinder, a polygonal prism, etc. Also, it may have a pin-like shape. The metal block 440 may be formed by plating, but is not limited thereto, and may be formed by removing a part of the 4-2 insulating unit 412 and then inserting it to be attached, or may be fitted to penetrate the 4-2 insulating unit 412 as a so-called rivet, and there is no limitation on the method of forming the metal block 440.

[0075] The metal block 440 can improve heat dissipation characteristics. By disposing the metal block 440 on the fourth substrate unit 400, the area of ​​the metal performing the heat dissipation function in the fourth substrate unit 400 can be increased. That is, by disposing the metal block 440 having excellent thermal conductivity on the fourth substrate unit 400, the printed circuit board according to another example can have excellent heat dissipation characteristics.

[0076] Meanwhile, among the configurations of the fourth substrate unit 400 other than the metal block 440, the configurations similar to those of the printed circuit board according to one example and / or the printed circuit board according to another example can also be applied to the printed circuit board according to the other example, and therefore, a duplicated description thereof will be omitted.

[0077] Printed circuit board manufacturing method 6a to 6h are cross-sectional views that are schematic diagrams illustrating a method for manufacturing a printed circuit board according to an example.

[0078] Referring to FIG. 6a, a first substrate unit 100 is prepared.

[0079] The method of forming the first substrate unit 100 may be any process that a person skilled in the art can apply without limitation. The first substrate unit 100 may be manufactured in strip units and then integrated into a unit by dicing or sawing, but is not necessarily limited thereto, and the first substrate unit 100 may be formed individually.

[0080] Referring to FIG. 6b, the first substrate unit 100 is placed in a jig J.

[0081] The jig J may correspond to a means for fixing the first substrate unit 100. When the step of forming the first substrate unit 100 proceeds to a process of singulating the units after stripping, the jig J may correspond to a dummy region generated in the step of forming the first substrate unit 100. When a defect inspection of the first substrate unit 100 is performed before the step of placing the first substrate unit 100 in the jig J, the defective first substrate unit 100 may no longer undergo a manufacturing step. That is, since it is not necessary to form the second substrate unit 200 on the defective first substrate unit 100, it may be effective in reducing costs.

[0082] The jig J can be manufactured together with the step of forming the first substrate unit 100, and therefore can have a configuration corresponding to the configuration of the first substrate unit 100. If the jig J is not removed in a step described below, the jig J can correspond to a partial area of ​​the fourth substrate unit 400. That is, it can correspond to the 4-1 insulating unit 411, the 4-2 wiring layer 422, and the 4-3 via layer 433 of the fourth substrate unit 400.

[0083] The first substrate unit 100 can be joined by attaching an adhesive member T to the lower surface of the jig J. The lower surface of the first substrate unit 100 and the lower surface of the jig J can be attached and fixed by the adhesive member T. The adhesive member T may be a normal tape or a DAF (die attach film), and may be any means that can be utilized by a normal technician in the technical field to temporarily fix a certain structure, and may be used without any restrictions. In this case, the lowermost surface of the first wiring layer 120 of the first substrate unit 100 may be attached to the adhesive member T, but is not limited thereto.

[0084] Referring to FIG. 6c, a resin layer 500 is filled between the first substrate portion 100 and the jig J.

[0085] The resin layer 500 may be filled with a fluid resin in an uncured state and then cured. The resin layer 500 may be disposed between the first substrate unit 100 and the jig J and cured, so that the first substrate unit 100 and the jig J may be fixed by the resin layer 500. At this time, the fluid resin layer 500 may be filled to cover the side surface of the first insulating unit 110 of the first substrate unit 100, and may cover the side surface of the jig J. As described above, the jig J may correspond to a part of the fourth substrate unit 400. That is, the resin layer 500 may cover a part of the side surface of the fourth substrate unit 400.

[0086] Since the resin layer 500 may include a fluid material, the upper surface of the resin layer 500 may be substantially coplanar with the upper surface of the first insulating unit 110. However, the present invention is not limited thereto, and the upper surface of the resin layer 500 may be formed to protrude from a part of the first insulating unit 110. Since the resin layer 500 may be filled up to a certain surface of the adhesive member T, the lower surface of the resin layer 500 may be substantially coplanar with the lower surface of the first wiring layer 120 of the first substrate unit 100. Meanwhile, although not shown in FIG. 6c, the resin layer 500 may be formed to fill a spaced region between the adhesive member and the first wiring layer 120.

[0087] 6d to 6f, after removing the adhesive member T, the second substrate part 200 and the third insulating part 310 may be formed.

[0088] Since the resin layer 500 fixes the first substrate portion 100 and the jig J, the first substrate portion 100, the resin layer 500, and the jig J cannot be separated even when the adhesive material T is removed, a second insulating portion 210 can be formed on the first insulating portion 110, and a third insulating portion 310 can be formed on the underside of the first insulating portion.

[0089] When forming the second substrate part 200 on the first substrate part 100, a temporary layer 320' may be further formed under the first substrate part 100 to control warpage of the printed circuit board. That is, referring to FIG. 6d, a third insulating part 310 may be formed to correspond to the second insulating part 210 to control warpage, and referring to FIGS. 6d and 6e, a temporary layer 320' may be formed to correspond to the second wiring layer 220 to control warpage. The temporary layer 320' may be formed by plating, and may be formed in the same process as the second wiring layer 220, but may not be patterned. Referring to FIG. 6f, the temporary layer 320' may be removed. The method of removing the temporary layer 320' may be any method that can be used by a person skilled in the art without any restrictions.

[0090] When forming the second substrate unit 200 on the first substrate unit 100, a 4-2 insulating unit 412, a 4-2 wiring layer 422, and a 4-2 via layer 432 may be further formed on the jig J, if necessary. As described above in the printed circuit board according to another example, since the fourth substrate unit 400 can perform a heat dissipation function, the 4-2 wiring layer 422 may be designed in the step of forming the second substrate unit 200 so that the fourth substrate unit 400 can perform a heat dissipation function.

[0091] On the other hand, without being limited thereto, if the final step includes a step of removing the jig J, it is not necessary to further form other structures on the jig J. That is, when the jig J is to be removed, it is possible to reduce costs by not forming other structures on the jig J. In this case, the second substrate unit 200 may be disposed so as to extend from above the first substrate unit 100 onto the resin layer 500, and may not extend onto the jig J.

[0092] Even when the third insulating part 310 is formed on the lower surface of the first substrate part 100, the above-mentioned contents can be similarly applied, and therefore the duplicated contents will be omitted.

[0093] 6g, a third wiring layer 320 may be formed on the third insulating portion 310, and a third via layer 330 may be formed penetrating the third insulating portion 310. In addition, a solder resist layer 510 may be formed on the second insulating portion 210 and / or the third insulating portion 310, and a surface treatment layer may be formed on a portion of the second wiring layer 220 and the third wiring layer 320.

[0094] 6h, the printed circuit board according to an example can be completed by cutting along the boundary of the resin layer 500. At this time, the cut surface of the unit does not necessarily have to coincide with the boundary between the resin layer 500 and the jig J, and at least a part of the resin layer 500 may be removed. On the other hand, if the jig J is left to perform a heat dissipation function as the fourth substrate part 400, cutting may not be necessary.

[0095] In addition, as described above in the description of one example of a printed circuit board, the general configuration of a printed circuit board may be further included, and these may be freely added or omitted as long as they do not change the technical meaning of the present invention.

[0096] In the present invention, the "first to fourth substrate parts" may mean to distinguish the respective substrate areas within one printed circuit board, that is, the boundaries between the first to fourth substrate parts may not be clearly distinguished, and it does not necessarily mean that the respective substrate parts are manufactured separately and then joined together.

[0097] In the present invention, the term "same insulating material" refers not only to completely identical insulating materials, but also to insulating materials of the same type. Thus, although the compositions of the insulating materials are substantially the same, the specific composition ratios thereof may differ slightly.

[0098] In the present invention, the cross-sectional shape may refer to the cross-sectional shape of an object cut vertically or the cross-sectional shape of an object when viewed from the side, and the planar shape may refer to the shape of an object cut horizontally or the planar shape of an object when viewed from the top or bottom.

[0099] In the present invention, for convenience, terms such as "lower side, lower part, lower surface" are used to mean a downward direction based on a cross section of a drawing, and terms such as "upper side, upper part, upper surface" are used to mean the opposite direction. However, this is a definition of directions for convenience of explanation, and the scope of the claims is not particularly limited by the description of such directions, and the concepts of up / down can be changed at any time.

[0100] In the present invention, "connected" is a concept including not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept including both physical connection and no connection. Furthermore, expressions such as "first, second" are used to distinguish one component from another component, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly, the second component may be named the first component, within the scope of the right.

[0101] The term "one example" used in the present invention does not mean the same embodiment, but is provided to emphasize and describe unique features that are different from each other. However, the above-mentioned one example does not exclude that it is realized in combination with the features of another example. For example, even if the matter described in a specific example is not described in another example, it can be understood as a description related to the other example, unless there is a description in the other example that is opposite or contradictory to the matter.

[0102] The terms used in the present invention are merely used to describe an example and are not intended to limit the present invention. In this case, a singular expression includes a plural expression unless the context clearly indicates otherwise. [Explanation of symbols]

[0103] 100, 200, 300, 400: 1st to 4th board sections 110, 210, 310, 410: 1st to 4th insulation parts 120, 220, 320, 420: 1st to 4th wiring layer 130, 230, 330, 430: 1st to 4th via layers 111: Core layer 112: Build-up insulation layer 131:Through via 132: Build-up via layer 411, 412, 413: No. 4-1 to No. 4-3 insulation parts 421, 422, 423: 4-1 to 4-3 wiring layer 431, 432, 433: 4-1 to 4-3 via layers 440: Metal Block 500: Resin layer 510: Solder resist layer 520: Surface treatment layer 600: Semiconductor chips 610: Connecting member J: Jig T: Adhesive material 320': false layer 1000:Electronic equipment 1010: Main board 1020: Chip related parts 1030: Network related parts 1040:Other parts 1050: Camera module 1060: Antenna module 1070:Display 1080: Battery 1090: Signal line 1100: Smartphone 1110: Main board inside a smartphone 1120: Electronic components inside smartphones 1121: Antenna module inside a smartphone 1130: Camera module inside a smartphone 1140: Speaker inside smartphone

Claims

1. a first substrate portion including a first insulating portion and a plurality of first wiring layers disposed on the first insulating portion or within the first insulating portion; a resin layer disposed so as to cover a side surface of the first insulating portion; A printed circuit board comprising: a second insulating portion arranged to cover an upper surface of the first insulating portion and an upper surface of the resin layer, respectively; and a second substrate portion including a second wiring layer arranged on or within the second insulating portion.

2. The printed circuit board according to claim 1 , wherein the second wiring layer includes finer wiring than wiring in the first wiring layer.

3. The printed circuit board according to claim 1 , wherein the second insulating portion covers at least a portion of the first wiring layer.

4. The printed circuit board according to claim 1 , wherein a side surface of the second insulating portion is substantially coplanar with a side surface of the resin layer.

5. The printed circuit board according to claim 1 , wherein at least a portion of the second wiring layer is disposed in an upper region of the resin layer.

6. The printed circuit board according to claim 1 , further comprising a third substrate portion including a third insulating portion disposed below the first insulating portion, and a third wiring layer disposed on the third insulating portion.

7. The printed circuit board according to claim 6 , wherein the third insulating portion covers a lower surface of the resin layer.

8. The printed circuit board of claim 6 , wherein the third insulating portion comprises substantially the same material as the second insulating portion.

9. The printed circuit board of claim 6 , further comprising a solder resist layer disposed on the second insulating portion and the third insulating portion, respectively.

10. 7. The printed circuit board of claim 6, further comprising a fourth substrate portion including a fourth insulating portion disposed on a side surface of the first insulating portion, the second insulating portion, and the third insulating portion, and a fourth wiring layer disposed on or within the fourth insulating portion.

11. The fourth insulating portion includes a fourth-1 insulating portion and a fourth-2 insulating portion, the 4-1 insulating portion includes substantially the same material as the first insulating portion; The printed circuit board of claim 10, wherein the fourth-second insulating portion includes substantially the same material as that of the second insulating portion.

12. the fourth wiring layer includes a 4-1 wiring layer and a 4-2 wiring layer, the 4-1st wiring layer includes wiring having substantially the same density as wiring of the first wiring layer, 12. The printed circuit board of claim 11, wherein the 4-2 wiring layer includes wiring having substantially the same density as wiring in the second wiring layer.

13. The printed circuit board of claim 10 , wherein the fourth substrate portion includes a metal block that penetrates at least a portion of the fourth insulating portion and is connected to the fourth wiring layer.

14. The printed circuit board of claim 1 , wherein the resin layer includes at least one material selected from the group consisting of a thermal interface material (TIM), a bonding sheet, an epoxy molding compound (EMC), and an underfill resin.

15. a first substrate portion including a first insulating portion and a first wiring layer disposed on or within the first insulating portion; a resin layer disposed so as to cover a side surface of the first substrate portion; a second substrate portion including a second insulating portion disposed on the first insulating portion and the resin layer, and a second wiring layer disposed on the second insulating portion or within the second insulating portion; A printed circuit board, wherein an upper surface of the resin layer is substantially coplanar with an upper surface of the first insulating portion.

16. The side surface of the resin layer is exposed to the outside, The printed circuit board of claim 15 , wherein a side surface of the second insulating portion is substantially coplanar with a side surface of the resin layer.

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