Light-emitting device

Abstract

To provide a light-emitting device having a structure having a high electron block function.SOLUTION: A light-emitting device includes: a substrate; an n-type layer provided on the substrate; a first active layer that is provided above the n-type layer and emits light having a predetermined emission wavelength; an intermediate electron block layer that is provided on and in contact with the first active layer, is composed of a non-doped III nitride semiconductor, and blocks electrons being about to transmit through the first active layer; an intermediate layer that is provided on the intermediate electron block layer and is composed of a non-doped III nitride semiconductor containing In; a second active layer that is provided on the intermediate layer and emits light having an emission wavelength differing from that of the first active layer; a groove having a depth reaching the intermediate layer or the intermediate electron block layer from the side of the second active layer; a first p-type layer provided on the second active layer; an electron block layer that is provided on a bottom surface of the groove, is composed of a Mg doped III nitride semiconductor, and blocks electrons being about to transmit through the first active layer; and a second p-type layer provided on the electron block layer.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a light-emitting device. [Background technology]

[0002] In recent years, there has been a demand for higher resolution displays, and micro LED displays, in which each pixel is a tiny LED on the order of 1 to 100 μm, have been attracting attention. There are various methods for achieving full color, including a method in which three active layers that emit light in blue, green, and red, respectively, are stacked in sequence on the same substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 5854419 Summary of the Invention [Problem to be solved by the invention]

[0004] The inventors came up with a structure in which an intermediate layer is inserted between the active layers in a light-emitting device in which three active layers are stacked in order on the same substrate, grooves are formed that reach each intermediate layer, and an electron blocking layer and a p-type layer are regrown on the bottom of the groove. This structure allows each active layer to be controlled independently.

[0005] However, in the above structure, the intermediate layer is between the active layer and the electron blocking layer, and the electron blocking layer is not in direct contact with the active layer, which reduces the electron blocking function of the electron blocking layer. In addition, the intermediate layer is made of GaN or InGaN, and the intermediate layer itself does not form a barrier that can block electrons. For this reason, there was a demand for improving the electron blocking function.

[0006] The present invention has been made in view of the above background, and aims to provide a light-emitting device having a structure with a high electron blocking function. [Means for solving the problem]

[0007] One aspect of the present invention is In a light-emitting device using a Group III nitride semiconductor, A substrate; an n-type layer formed on the substrate and made of an n-type Group III nitride semiconductor; a first active layer having a predetermined emission wavelength provided on the n-type layer; an intermediate electron blocking layer provided on and in contact with the first active layer, the intermediate electron blocking layer being made of a non-doped Group III nitride semiconductor and blocking electrons attempting to pass through the first active layer; an intermediate layer formed on the intermediate electron blocking layer and made of a group III nitride semiconductor containing undoped In; a second active layer provided on the intermediate layer and having an emission wavelength different from that of the first active layer; a groove having a depth reaching the intermediate layer or the intermediate electron blocking layer from the second active layer side; a first p-type layer provided on the second active layer and made of a p-type Group III nitride semiconductor; an electron blocking layer provided on a bottom surface of the groove, made of a Mg-doped Group III nitride semiconductor, for blocking electrons attempting to pass through the first active layer; a second p-type layer provided on the electron blocking layer and made of a p-type Group III nitride semiconductor; The light-emitting device has the following structure:

[0008] Another aspect of the present invention is A method for manufacturing a light emitting device using a Group III nitride semiconductor, comprising the steps of: an n-type layer forming step of forming an n-type layer made of an n-type Group III nitride semiconductor on the substrate; a first active layer forming step of forming a first active layer having a predetermined emission wavelength on the n-type layer; an intermediate electron blocking layer forming step of forming an intermediate electron blocking layer in contact with the first active layer, the intermediate electron blocking layer being made of a non-doped Group III nitride semiconductor and blocking electrons attempting to transmit through the first active layer; an intermediate layer forming step of forming an intermediate layer made of a non-doped In-containing Group III nitride semiconductor on the intermediate electron blocking layer; a second active layer forming step of forming a second active layer having an emission wavelength different from that of the first active layer on the intermediate layer; a groove forming step of forming a groove having a depth reaching the intermediate layer or the intermediate electron blocking layer from the second active layer side; an electron blocking layer forming step of forming an electron blocking layer made of a Mg-doped Group III nitride semiconductor on a bottom surface of the groove, the electron blocking layer blocking electrons attempting to transmit through the first active layer; a p-type layer forming step of forming a first p-type layer and a second p-type layer made of a p-type Group III nitride semiconductor on the second active layer and the electron block layer, respectively; having In the method for producing a light-emitting device, the intermediate electron blocking layer and the electron blocking layer are grown at a temperature that is −50 to 50° C. lower than the growth temperature of the intermediate layer. Effect of the Invention

[0009] In the above embodiment, an intermediate electron blocking layer is provided between the first active layer and the intermediate layer in contact with the first active layer, and the electron blocking layer is provided on the bottom surface of the groove, which makes it possible to effectively block electrons. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a cross-sectional view showing the configuration of a light-emitting device in embodiment 1, taken along a direction perpendicular to a main surface of a substrate. [Diagram 2] FIG. 1 shows an equivalent electrical circuit diagram. [Diagram 3] 2A to 2C are diagrams illustrating a manufacturing process of the light-emitting element according to the first embodiment. [Figure 4] 2A to 2C are diagrams illustrating a manufacturing process of the light-emitting element according to the first embodiment. [Diagram 5] 2A to 2C are diagrams illustrating a manufacturing process of the light-emitting element according to the first embodiment. [Figure 6] 2A to 2C are diagrams illustrating a manufacturing process of the light-emitting element according to the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] the first active layer having a predetermined emission wavelength and provided on the n-type layer; an intermediate electron blocking layer provided in contact with the first active layer, made of an undoped Group III nitride semiconductor and blocking electrons attempting to transmit through the first active layer; an intermediate layer provided on the intermediate electron blocking layer and made of an undoped Group III nitride semiconductor containing In; a second active layer provided on the intermediate layer and having an emission wavelength different from that of the first active layer; a groove having a depth reaching the intermediate layer or the intermediate electron blocking layer from the second active layer side; a first p-type layer provided on the second active layer and made of a p-type Group III nitride semiconductor; an electron blocking layer provided on a bottom surface of the groove, made of an Mg-doped Group III nitride semiconductor and blocking electrons attempting to transmit through the first active layer; and a second p-type layer provided on the electron blocking layer and made of a p-type Group III nitride semiconductor.

[0012] The first active layer may have a quantum well structure having a well layer and a barrier layer, and the band gap energy of the intermediate electron blocking layer may be larger than the band gap energy of the barrier layer.

[0013] The intermediate electron blocking layer may have a thickness of 0.5 to 50 nm, and an Al composition of the intermediate electron blocking layer may be 3 to 30%.

[0014] The Al composition of the electron blocking layer may be equal to or greater than the Al composition of the intermediate electron blocking layer, and the electron blocking layer may have a superlattice structure.

[0015] The groove has a depth that reaches from the second active layer side to the intermediate layer, and in the region where the groove is provided, a stack of the intermediate electron blocking layer, the intermediate layer, and the electron blocking layer forms a superlattice structure, and the intermediate layer may function as a well layer in the superlattice structure.

[0016] The method for manufacturing a light-emitting device is a method for manufacturing a light-emitting device using a Group III nitride semiconductor, and includes an n-type layer forming step of forming an n-type layer made of an n-type Group III nitride semiconductor on a substrate, a first active layer forming step of forming a first active layer having a predetermined emission wavelength on the n-type layer, an intermediate electron blocking layer forming step of forming an intermediate electron blocking layer made of a non-doped Group III nitride semiconductor in contact with the first active layer and blocking electrons that attempt to transmit through the first active layer, an intermediate layer forming step of forming an intermediate layer made of a Group III nitride semiconductor containing non-doped In on the intermediate electron blocking layer, and a step of forming a layer different from the first active layer on the intermediate layer. the second active layer forming step of forming a second active layer having an emission wavelength corresponding to the first active layer; a groove forming step of forming a groove having a depth reaching from the second active layer side to the intermediate layer or intermediate electron blocking layer; an electron blocking layer forming step of forming an electron blocking layer made of a Mg-doped Group III nitride semiconductor on a bottom surface of the groove and blocking electrons attempting to transmit through the first active layer; and a p-type layer forming step of forming a first p-type layer and a second p-type layer made of a p-type Group III nitride semiconductor on the second active layer and the electron blocking layer, respectively, wherein the growth temperatures of the intermediate electron blocking layer and the electron blocking layer are −50 to 50° C. lower than the growth temperature of the intermediate layer.

[0017] The growth temperature of the intermediate electron blocking layer and the electron blocking layer may be 800 to 1000°C.

[0018] The growth temperature of the electron blocking layer may be equal to or lower than the growth temperature of the first p-type layer and the second p-type layer.

[0019] The growth rate of the intermediate electron blocking layer and the electron blocking layer may be 0.5 to 5 nm / min.

[0020] (Embodiment) FIG. 1 is a diagram showing the configuration of a light-emitting element in embodiment 1. The light-emitting element in embodiment 1 is capable of emitting blue, green, and red light. The light-emitting element in embodiment 1 is a flip-chip type that extracts light from the back side of the substrate, and is mounted face-down on a mounting substrate (not shown). Although embodiment 1 has a one-chip structure for one pixel, a monolithic type may also be used. In other words, a micro LED display element in which the element structure of embodiment 1 is arranged in a matrix on the same substrate may be used.

[0021] 1. Structure of the light-emitting element As shown in FIG. 1, the light-emitting element in embodiment 1 has a substrate 10, an n-type layer 11, an underlayer 12, a first active layer 13, a first intermediate electron blocking layer 14, a first intermediate layer 15, a second active layer 16, a second intermediate electron blocking layer 17, a second intermediate layer 18, a third active layer 19, a protective layer 20, non-n-type layers 21A-21C, electron blocking layers 22A-22C, p-type layers 23A-23C, an n-side electrode 24, and p-side electrodes 25A-25C.

[0022] The substrate 10 is a growth substrate for growing a group III nitride semiconductor, such as sapphire, Si, GaN, or ScAlMgO4 (SAM).

[0023] The n-type layer 11 is an n-type semiconductor provided on the substrate 10 via a low-temperature buffer layer or a high-temperature buffer layer (not shown). However, the buffer layer may be provided as necessary, and may not be provided when the substrate is GaN. The n-type layer 11 is, for example, n-GaN, n-AlGaN, or n-InGaN. The Si concentration is, for example, 1×10 18 ~100×10 18 cm -3 It is.

[0024] The underlayer 12 is a semiconductor layer with a superlattice structure provided on the n-type layer 11, and serves to relieve lattice distortion of the semiconductor layer formed on the underlayer 12. The underlayer 12 may be provided as necessary, and may be omitted. The underlayer 12 is formed by alternately laminating III-nitride semiconductor thin films with different compositions (e.g., two of GaN, InGaN, and AlGaN), and the number of pairs is, for example, 3 to 30. It may be undoped, or may have 1×10 Si doped. 17 ~100×10 17 cm -3 The doping may be to a certain extent. Also, as long as the strain can be relaxed, it is not necessary to have a superlattice structure. Any material that reduces the lattice constant difference at the heterointerface with the first active layer 13 may be used, for example, an InGaN type layer, an AlInN type layer, or an AlGaIn type layer.

[0025] An ESD layer may be provided between the n-type layer 11 and the underlayer 12. The ESD layer is a layer provided to improve electrostatic breakdown voltage. The ESD layer is, for example, non-doped or lightly Si-doped GaN, InGaN, or AlGaN.

[0026] The first active layer 13 is a light emitting layer having an SQW or MQW structure provided on the underlayer 12. The emission wavelength is blue, 430 to 480 nm. The first active layer 13 has a structure in which 1 to 9 pairs of barrier layers made of AlGaN and well layers made of InGaN are alternately laminated, more preferably 1 to 7 pairs, and even more preferably 1 to 5 pairs.

[0027] The first intermediate electron blocking layer 14 is a layer provided on and in contact with the first active layer 13. The first intermediate electron blocking layer 14 is made of undoped AlGaN. The Al composition of the first intermediate electron blocking layer 14 is set so that the band gap energy is larger than that of the barrier layer of the first active layer 13. For example, the Al composition is 3 to 30%. A more preferable Al composition is 3 to 20%, and even more preferable is 3 to 10%. The Al composition may be graded within the above range.

[0028] In this way, the first intermediate electron blocking layer 14 is provided in contact with the first active layer 13, and therefore has a high electron blocking function. In other words, it is highly effective in blocking electrons attempting to transmit from the first active layer 13 to the first intermediate electron blocking layer 14, and can efficiently confine electrons in the first active layer 13. In addition, the first intermediate electron blocking layer 14 is undoped, which prevents Mg from diffusing into the first active layer 13 and thus preventing a decrease in luminous efficiency.

[0029] The thickness of the first intermediate electron blocking layer 14 is 0.5 to 50 nm. The first intermediate electron blocking layer 14 acts as a barrier to block the injection of electrons into the second active layer 16 and the third active layer 19. This results in high resistance and increases Vf. By setting the thickness within the above range, the layer maintains the blocking function of electrons attempting to pass through the first active layer 13 while not impeding the injection of electrons into the second active layer 16 and the third active layer 19, thereby suppressing an increase in resistance. The thickness of the first intermediate electron blocking layer 14 is more preferably 0.5 to 20 nm, and even more preferably 0.5 to 10 nm.

[0030] The first intermediate electron blocking layer 14 may be made of undoped AlGaInN, with the Al composition and the In composition set so that the band gap energy is larger than that of the barrier layer of the first active layer 13.

[0031] The first intermediate layer 15 is a semiconductor layer provided on the first active layer 13, and is located between the first intermediate electron blocking layer 14 and the second active layer 16. The first intermediate layer 15 is a layer provided to enable individual control of the light emission from the first active layer 13 and the light emission from the second active layer 16. The first intermediate layer 15 also serves to protect the first active layer 13 from etching damage when forming the second grooves 31 described below.

[0032] The first intermediate layer 15 has a structure in which a non-doped intermediate layer 15A and an n-type intermediate layer 15B are laminated in this order from the first intermediate electron blocking layer 14 side. The non-doped intermediate layer 15A and the n-type intermediate layer 15B may be made of the same material except for impurities. The reason for making the first intermediate layer 15 have such a two-layer structure will be described later.

[0033] The material of the first intermediate layer 15 is a group III nitride semiconductor containing In, for example, InGaN. The surfactant effect of In can suppress roughness of the surface of the first intermediate layer 15 and improve the surface flatness. Also, the lattice distortion can be alleviated.

[0034] The In composition of the first intermediate layer 15 (the molar ratio of In to the total Group III metals of the Group III nitride semiconductor) may be set so as to provide a band gap that does not absorb light emitted from the first active layer 13 and the second active layer 16. A preferred In composition is 10% or less, more preferably 5% or less, and even more preferably 2% or less. If the In composition is greater than 10%, it may cause the surface of the first intermediate layer 15 to become rough. The In content may be any value greater than 0%, and may be at a doping level (a level that does not form a mixed crystal). For example, an In concentration of 1×10 14 cm -3 More than 1×10 22 cm -3 The following is GaN.

[0035] The non-doped intermediate layer 15A is non-doped, and the n-type intermediate layer 15B is Si-doped. The Si concentration of the n-type intermediate layer 15B is 1×10 17 ~1000×10 17 cm -3 It is preferable to set the value to 10×10 17 ~100×10 17 cm -3 , and more preferably 20×10 17 ~80×10 17 cm -3 The n-type intermediate layer 15B may be modulation doped with Si, or a portion of the n-type intermediate layer 15B may be a non-doped region.

[0036] The thickness of the first intermediate layer 15 is preferably 20 to 150 nm. If it is thicker than 150 nm, the surface of the first intermediate layer 15 may become rough. If it is thinner than 20 nm, it may be difficult to control the depth of the second grooves 31 to be formed within the non-doped intermediate layer 15A when the second grooves 31 are formed, as described below. The thickness is more preferably 30 to 100 nm, and even more preferably 50 to 80 nm.

[0037] The thickness of the non-doped intermediate layer 15A is preferably 10 nm or more in order to control the etching depth and to avoid etching damage to the first active layer 13. The thickness of the n-type intermediate layer 15B is preferably 10 nm or more in order to independently control the light emission characteristics of each active layer.

[0038] The second active layer 16 is a layer provided on the first intermediate layer 15, and has a structure in which a strain relaxation layer 16A and an SQW or MQW quantum well structure layer (light emitting layer) 16B are laminated in this order. The quantum well structure layer 16B emits green light at a wavelength of 510 to 570 nm. The quantum well structure layer 16B has a structure in which 1 to 7 pairs of barrier layers made of GaN or AlGaN and well layers made of InGaN are alternately laminated. More preferably, the number of pairs is 1 to 5 pairs, and even more preferably, 1 to 3 pairs. The number of pairs is preferably equal to or less than the number of pairs in the first active layer 13, and more preferably, less.

[0039] The strain relaxation layer 16A has an SQW structure in which a barrier layer and a well layer are laminated in order, and is a quantum well structure in which the thickness of the well layer is adjusted to be thin so as not to emit light. For example, the well layer can be made to be 1 nm or less in thickness so as not to emit light. The barrier layer is AlGaN, and the well layer is InGaN. The wavelength corresponding to the band edge energy of the well layer of the strain relaxation layer 16A may be shorter than the emission wavelength of the quantum well structure layer 16B, and is 400 to 460 nm if the emission wavelength is 500 to 560 nm. It is preferably 40 to 100 nm shorter than the emission wavelength of the quantum well structure layer 16B. In this case, the growth temperature of the strain relaxation layer 16A is 700 to 800°C.

[0040] The wavelength corresponding to the band edge energy of the well layer of the strain relaxation layer 16A may be equal to the emission wavelength of the first active layer 13. In this case, the strain relaxation layer 16A may be grown at the same growth temperature as the first active layer 13.

[0041] The band edge energy in the well layer of the strain relaxation layer 16A can be controlled by the thickness of the well layer. That is, by making the thickness of the well layer of the strain relaxation layer 16A sufficiently thin, the energy of the subband in the well increases and the band edge energy becomes large. This may make it shorter than the emission wavelength of the quantum well structure layer 16B. The growth temperature is arbitrary, but it may be grown at the same growth temperature as that of the quantum well structure layer 16B. Furthermore, by making the well layer of the strain relaxation layer 16A thinner, the subband further increases and the energy difference with the barrier layer becomes smaller. That is, it becomes closer to the band edge energy of the barrier layer. As a result, it becomes difficult to confine carriers in the well layer of the strain relaxation layer 16A and it becomes difficult to emit light, so that it functions as a part of the barrier layer of the quantum well structure layer 16B and also has the effect of strain relaxation.

[0042] In this manner, by forming the strain relaxation layer 16A having a well layer with poorer carrier confinement than the well layer of the quantum well structure layer 16B, it is possible to form the strain relaxation layer 16A that does not emit light.

[0043] In short, the material and layer structure of the strain relaxation layer 16A are set so that the average lattice constant of the entire strain relaxation layer 16A is between the lattice constant of the first intermediate layer 15 and the lattice constant of the quantum well structure layer 16B, and the thickness of the well layer is set so that the strain relaxation layer 16A does not emit light.

[0044] The strain relaxation layer 16A may have an MQW structure in which two or more pairs of a barrier layer and a well layer are stacked, but since the second active layer 16 becomes thicker, an SQW structure is preferable.

[0045] By providing the strain relaxation layer 16A as described above, it is possible to relax the strain in the quantum well structure layer 16B laminated thereon, and it is possible to improve the crystal quality of the well layer of the quantum well structure layer 16B.

[0046] It is preferable to set the ratio of the thickness of the first active layer 13 to the thickness of the second active layer 16 to be 30% or less. This makes it possible to more efficiently relieve the distortion of the quantum well structure layer 16B, and also makes the pn junction distance constant under each of the p-side electrodes 25A to 25C, thereby making the device characteristics uniform under each of the p-side electrodes 25A to 25C.

[0047] The second intermediate electron blocking layer 17 is a layer provided on and in contact with the second active layer 16. The second intermediate electron blocking layer 17 is made of undoped AlGaN. The Al composition of the second intermediate electron blocking layer 17 is set so that the band gap energy is larger than that of the barrier layer of the second active layer 16.

[0048] The second intermediate electron blocking layer 17 has a high electron blocking function because it is provided in contact with the second active layer 16. In other words, it is highly effective in blocking electrons that attempt to transmit from the second active layer 16 to the second intermediate electron blocking layer 17, and can efficiently confine electrons in the second active layer 16. In addition, the second intermediate electron blocking layer 17 is non-doped, which prevents Mg from diffusing into the second active layer 16 and thus preventing a decrease in luminous efficiency.

[0049] The thickness and Al composition of the second intermediate electron blocking layer 17 are preferably in the same range as those of the first intermediate electron blocking layer 14. Within this range, the first intermediate electron blocking layer 14 and the second intermediate electron blocking layer 17 do not need to have the same thickness or Al composition.

[0050] The second intermediate layer 18 is a semiconductor layer provided on the second intermediate electron blocking layer 17, and is located between the second intermediate electron blocking layer 17 and the third active layer 19. The second intermediate layer 18 is provided for the same reason as the first intermediate layer 15, and is a layer provided to enable individual control of the light emission from the second active layer 16 and the light emission from the third active layer 19. The second intermediate layer 18 also serves to protect the second active layer 16 from etching damage when forming the third groove 32 described below.

[0051] The second intermediate layer 18 has a structure in which a non-doped intermediate layer 18A and an n-type intermediate layer 18B are laminated in this order from the second intermediate electron blocking layer 17 side. The non-doped intermediate layer 18A and the n-type intermediate layer 18B have the same structure as the non-doped intermediate layer 15A and the n-type intermediate layer 15B. In other words, the non-doped intermediate layer 18A and the n-type intermediate layer 18B are made of the same material as the non-doped intermediate layer 15A and the n-type intermediate layer 15B except for impurities, and the thickness range is also the same as the non-doped intermediate layer 15A and the n-type intermediate layer 15B. The non-doped intermediate layer 18A is non-doped, and the n-type intermediate layer 18B is Si-doped. The reason for making the second intermediate layer 18 have such a two-layer structure will be described later.

[0052] The first intermediate layer 15 and the second intermediate layer 18 may be made of the same material. Also, the first intermediate layer 15 and the second intermediate layer 18 may have the same thickness. However, it is preferable that the second intermediate layer 15 is thinner than the first intermediate layer 15 and has a higher In composition than the first intermediate layer 15. This is because the green-emitting second active layer 16 is more susceptible to thermal damage than the blue-emitting first active layer 13, and is more susceptible to strain at the interface.

[0053] Here, the reason why the first intermediate layer 15 and the second intermediate layer 18 have a two-layer structure will be explained. First, the distance between the pn junctions will be explained. The distance between the pn junctions corresponds to the film thickness that is depleted at zero bias. In an LED, it corresponds to the total film thickness of the non-doped or lightly doped active layer sandwiched between a p-type layer with a high concentration of acceptor impurities and an n-type layer with a high concentration of donor impurities.

[0054] When the first intermediate layer 15 and the second intermediate layer 18 are non-doped, the pn junction distance (thickness of the depletion layer) corresponds to the distance from the electron block layer 22A highly doped with acceptor impurities to the n-type layer 11 highly doped with donor impurities in the region below the p-side electrode 25A, that is, the thickness including the first active layer 13, the second active layer 16, the third active layer 19, the first intermediate layer 15, and the second intermediate layer 18. Also, the pn junction distance corresponds to the distance from the electron block layer 22B highly doped with acceptor impurities to the n-type layer 11, that is, the thickness including the first active layer 13, the second active layer 16, the first intermediate layer 15, and a part of the second intermediate layer 18, under the p-side electrode 25C. Also, the pn junction distance corresponds to the distance from the electron block layer 22C highly doped with acceptor impurities to the n-type layer 11, that is, the thickness including the first active layer 13 and a part of the first intermediate layer 15.

[0055] Therefore, the distance between the pn junctions is different in each of these three cases, and the driving voltage, current injection efficiency, and reverse current are different. Also, when applying a voltage to the p-side electrode 25A to make the third active layer 19 emit light, electron and hole carriers are supplied to all the active layers, and light may also be emitted from the second active layer 16 and the first active layer 13. Similarly, when applying a voltage to the p-side electrode 25B to make the second active layer 16 emit light, light may also be emitted from the first active layer 13.

[0056] This problem is solved by the structure of the intermediate layer. That is, the first intermediate layer 15 is made of two layers, a non-doped intermediate layer 15A and an n-type intermediate layer 15B doped with a high concentration of donor impurities, and the second intermediate layer 18 is made of two layers, a non-doped intermediate layer 18A and an n-type intermediate layer 18B doped with a high concentration of donor impurities, and the n-type intermediate layers 15B and 18B are doped with Si to make them n-type.

[0057] Therefore, the pn junction distance is the distance from electron blocking layer 22A to n-type intermediate layer 18B of second intermediate layer 18 in the region under p-side electrode 25A, the distance from electron blocking layer 22B to n-type intermediate layer 15B of first intermediate layer 15 in the region under p-side electrode 25B, and the distance from electron blocking layer 22C to n-type layer 11 in the region under p-side electrode 25C. In other words, the pn junction distance under all electrodes does not include multiple active layers, but corresponds to the total film thickness including one active layer and a non-doped intermediate layer among the intermediate layers.

[0058] Here, by appropriately controlling the thickness of the non-doped intermediate layer 15A of the first intermediate layer 15 and the non-doped intermediate layer 18A of the second intermediate layer 18, the distance between the pn junctions can be made equal in these three cases. As a result, the variations in the driving voltage, current injection efficiency, and reverse current can be suppressed in these three cases, and uniform control is possible. Furthermore, in these three cases, only one first active layer 13, one second active layer 16, and one third active layer 19 are included between the pn junctions, and the n-type layer of the intermediate layer acts as a barrier layer for holes, making it difficult for holes to be injected beyond the n-type layer of the intermediate layer into the lower active layer. As a result, it is possible to suppress the emission of light from active layers other than those that are intended to be emitted and located between the pn junctions.

[0059] The third active layer 19 has a structure in which a first strain relaxation layer 19A, a second strain relaxation layer 19B, and a quantum well structure layer 19C of SQW or MQW are laminated in this order. The quantum well structure layer 19C emits red light with a wavelength of 590 to 700 nm. The quantum well structure layer 19C has a structure in which 1 to 7 pairs of barrier layers made of InGaN and well layers made of InGaN are alternately laminated. More preferably, 1 to 5 pairs, and even more preferably, 1 to 3 pairs. The number of pairs is preferably equal to or less than the number of pairs in the quantum well structure layer 16B of the second active layer 16, and more preferably, less.

[0060] The first strain relaxation layer 19A has the same structure as the strain relaxation layer 16A of the second active layer 16. The wavelength corresponding to the band edge energy of the well layer of the first strain relaxation layer 19A should be shorter than the emission wavelength of the quantum well structure layer 16B, and is, for example, 400 to 460 nm.

[0061] The second strain relaxation layer 19B has a wavelength corresponding to the band edge energy of the well layer of the second strain relaxation layer 19B that is shorter than the emission wavelength of the quantum well structure layer 19C and longer than the wavelength corresponding to the band edge energy of the well layer of the first strain relaxation layer 19A. For example, the wavelength is 510 to 570 nm. The rest of the wavelength is the same as that of the first strain relaxation layer 19A.

[0062] It is preferable that the difference between the wavelength corresponding to the band edge energy of the well layer of the first strain relaxation layer 19A and the wavelength corresponding to the band edge energy of the well layer of the second strain relaxation layer 19B, and the difference between the wavelength corresponding to the band edge energy of the well layer of the second strain relaxation layer 19B and the emission wavelength of the quantum well structure layer 19C are 40 to 100 nm.

[0063] The ratio of the thickness of the first active layer 13 to the thickness of the third active layer 19 and the ratio of the thickness of the second active layer 16 to the thickness of the third active layer 19 are preferably set to 30% or less. This makes it possible to more efficiently relieve the distortion of the quantum well structure layer 19C, while making the pn junction distance constant under each of the p-side electrodes 25A to 25C, thereby making the device characteristics uniform under each of the p-side electrodes 25A to 25C.

[0064] By providing the first strain relief layer 19A and the second strain relief layer 19B in this manner, the strain can be relaxed stepwise, and the strain in the quantum well structure layer 19C laminated thereon can be relaxed effectively, thereby improving the quality of the well layer in the quantum well structure layer 19C.

[0065] In the third active layer 19, the first strain relaxation layer 19A and the second strain relaxation layer 19B relax the strain in two stages, but three or more strain relaxation layers may be provided to relax the strain in three or more stages. Also, in the second active layer 16, a plurality of strain relaxation layers 16A may be provided to relax the strain in stages.

[0066] Similarly, a strain relaxation layer may be provided in the first active layer 13. In this case, the growth temperature of the strain relaxation layer is, for example, 800 to 900°C.

[0067] The protective layer 20 is a semiconductor layer provided on the third active layer 19. The protective layer 20 protects the active layer and also functions as an electron blocking layer. The protective layer 20 may be made of a material having a wider band gap than the well layer of the third active layer 19, such as AlGaN, GaN, or InGaN. The thickness of the protective layer 20 is preferably 2.5 to 50 nm, and more preferably 5 to 25 nm. The protective layer 20 may be doped with an impurity, or may be doped with Mg. In this case, the Mg concentration is 1×10 18 ~1000×10 18 cm -3 It is better to say:

[0068] A portion of the protective layer 20 is etched to provide grooves, which include a third groove 32 extending from the protective layer 20 to the second intermediate layer 18, a second groove 31 extending to the first intermediate layer 15, and a first groove 30 extending to the n-type layer 11.

[0069] The third groove 32 has a depth that reaches the non-doped intermediate layer 18A of the second intermediate layer 18. In this way, by removing the n-type intermediate layer 18B of the second intermediate layer 18 below the p-side electrode 25B, an n-type layer is prevented from being positioned above the second active layer 16, and the second active layer 16 is allowed to emit light. The second groove 31 has a depth that reaches the non-doped intermediate layer 15A of the first intermediate layer 15. This is for the same reason, and by removing the n-type intermediate layer 15B of the first intermediate layer 15 below the p-side electrode 25C, an n-type layer is prevented from being positioned above the first active layer 13, and the first active layer 13 is allowed to emit light.

[0070] The second groove 31 may have a depth that reaches the first intermediate electron blocking layer 14. The third groove 32 may have a depth that reaches the second intermediate electron blocking layer 17. In other words, the non-doped intermediate layers 15A, 18A may or may not remain. However, as described later, by leaving them, they can function as well layers in a superlattice structure.

[0071] The non-n-type layers 21A to 21C are provided in contact with the protective layer 20, the non-doped intermediate layer 18A of the second intermediate layer 18 exposed at the bottom of the third groove 32, and the non-doped intermediate layer 15A of the first intermediate layer 15 exposed at the bottom of the second groove 31. The non-n-type layers 21A to 21C are formed by crystal growth by once removing the wafer from the growth furnace and then putting the wafer back into the growth furnace.

[0072] The Mg concentration of the non-n-type layers 21A to 21C is 0.1×10 18 ~100×10 18 cm -3 The reason for doping the non-n-type layers 21A to 21C with Mg in such a concentration range is as follows.

[0073] In the light-emitting device of the first embodiment, as described in the manufacturing process below, the wafer is temporarily removed from the reactor and exposed to the air in order to form the third groove 32 and the second groove 31. At this time, the surface of the wafer becomes contaminated with elements such as O and Si. Although the impurities can be removed to some extent by cleaning or the like, they cannot be removed completely.

[0074] These impurities become unintended n-type impurities and become non-radiative recombination centers. In addition, unintended n-type layers are formed, changing the band structure. For example, the formation of an n-type layer changes the built-in potential between the pn junction, affecting the injection efficiency of electrons and holes, and causing a decrease in luminous efficiency. In particular, the injection of holes into the active layer is hindered by the n-type layer, decreasing the luminous efficiency. For the above reasons, when a regrowth interface exists near the active layer, especially within the pn junction, the luminous efficiency decreases significantly. In the light-emitting device of the first embodiment, the interface between the protective layer 20 and the non-n-type layer 21A, the interface between the non-doped intermediate layer 18A and the non-n-type layer 21B, and the interface between the non-doped intermediate layer 15A and the non-n-type layer 21C become regrowth interfaces and are within the pn junction.

[0075] Therefore, in the first embodiment, the non-n-type layers 21A to 21C are doped with Mg to neutralize (make highly resistive and insulating) the unintended n-type layer at the regrowth interface or to make it p-type. 18 ~100×10 18 cm -3 Therefore, the Mg concentration in the non-n-type layers 21A to 21C was set to about 0.1×10 18 ~100×10 18 cm -3 By making the Mg concentration equal to or greater than the concentrations of n-type impurities such as O and Si, a co-doped state is achieved, and the regrowth interface is neutralized or made p-type, making it no longer an n-type layer.

[0076] Due to the neutralization of the regrowth interface, the substantial n-type layer becomes the lower part (substrate 10 side) of the active layers (first active layer 13, second active layer 16, third active layer 19). This improves the efficiency of hole injection into the active layers, thereby improving the light emission efficiency.

[0077] The material of the non-n-type layers 21A to 21C is preferably AlGaN. The Al composition is, for example, 0.5 to 30%. By using AlGaN for the non-n-type layers 21A to 21C, they can function as electron blocking layers. The thickness of the non-n-type layers 21A to 21C is, for example, 0.5 to 10 nm.

[0078] The electron blocking layers 22A-22C are semiconductor layers provided on the non-n-type layers 21A-21C, respectively, and are layers that block electrons injected from the n-type layer 11 in order to efficiently confine them in the first active layer 13, the second active layer 16, and the third active layer 19. The electron blocking layer may be a single layer of GaN or AlGaN, or may have a structure in which two or more of AlGaN, GaN, and InGaN are stacked, or a structure in which layers are stacked with only the composition ratio changed. In addition, the electron blocking layer may have a superlattice structure. The superlattice structure can block electrons more efficiently. The superlattice structure is, for example, a structure in which p-AlGaN and p-InGaN are stacked alternately, or a structure in which p-AlGaN and p-GaN are stacked alternately.

[0079] In the region where the second groove 31 is provided, the first intermediate electron block layer 14, the non-doped intermediate layer 15A of the first intermediate layer 15, the non-n-type layer 21C, and the electron block layer 22C are laminated in this order from the first active layer 13 side, with the first intermediate electron block layer 14 being AlGaN, the non-doped intermediate layer 15A being InGaN, and the non-n-type layer 21C and the electron block layer 22C being AlGaN. Therefore, the first intermediate electron block layer 14, the non-n-type layer 21C, and the electron block layer 22C function as barrier layers of a superlattice structure, and the non-doped intermediate layer 15A functions as a well layer of a superlattice structure, so that the first intermediate electron block layer 14, the non-doped intermediate layer 15A, the non-n-type layer 21C, and the electron block layer 22C as a whole can function as a superlattice structure. As a result, the electron blocking function can be further improved.

[0080] Similarly, in the region where the third groove 32 is provided, the second intermediate electron blocking layer 17, the non-doped intermediate layer 18A, the non-n-type layer 21B, and the electron blocking layer 22B as a whole can function as a superlattice structure, thereby further enhancing the electron blocking function.

[0081] The thickness of the electron blocking layers 22A to 22C is preferably 5 to 50 nm, and more preferably 5 to 25 nm.

[0082] The electron blocking layers 22A to 22C are Mg-doped p-type. By making them p-type, holes can be efficiently injected into the active layer. In addition, a larger barrier against electrons can be formed, and the electron blocking function can be improved. The Mg concentration of the electron blocking layers 22A to 22C is 1×10 19 ~100×10 19 cm -3 It is better to say:

[0083] The Al composition of the electron blocking layers 22A to 22C is preferably equal to or higher than the Al composition of the first intermediate electron blocking layer 14 and the second intermediate electron blocking layer 17. This can further improve the electron blocking function.

[0084] It is not necessary to provide the non-n-type layers 21A to 21C. The n-type layer formed by n-type impurities such as O and Si at the regrowth interface is sandwiched between the first intermediate electron blocking layer 14 and the electron blocking layer 22C, the second intermediate electron blocking layer 17 and the electron blocking layer 22B, and the protective layer 20 and the electron blocking layer 22A. If the sandwiched structure as a whole is made to have a superlattice structure, non-radiative recombination at the regrowth interface can be suppressed. However, it is preferable to provide the non-n-type layers 21A to 21C so that no n-type layer is present at the regrowth interface.

[0085] In addition, although the electron blocking layers 22A to 22C have the same structure in the first embodiment, they may have different structures. For example, since red light emission generally has a lower luminous efficiency than blue or green light emission, the electron blocking layer 22A on the third active layer 19 may have a superlattice structure, and the other electron blocking layers 22B and 22C may be AlGaN single layers, so that the blocking function of electrons attempting to pass through the third active layer 19 is stronger than that of the second active layer 16 and the first active layer 13.

[0086] The p-type layers 23A to 23C are semiconductor layers provided on the electron blocking layers 22A to 22C, respectively, and are composed of a first layer and a second layer in that order from the electron blocking layer 22A to 22C side. The first layer is preferably p-GaN or p-InGaN. The thickness of the first layer is preferably 10 to 500 nm, more preferably 10 to 200 nm, and further preferably 10 to 100 nm. The Mg concentration of the first layer is 1×10 19 ~100×10 19 cm -3 The second layer is preferably p-GaN or p-InGaN. The thickness of the second layer is preferably 2 to 50 nm, more preferably 4 to 20 nm, and further preferably 6 to 10 nm. The Mg concentration of the second layer is 1×10 20 ~100×10 20 cm -3 It is better to say:

[0087] The n-side electrode 24 is an electrode provided on the n-type layer 11 exposed at the bottom surface of the first groove 30. When the substrate 10 is made of a conductive material, the n-side electrode 24 may be provided on the back surface of the substrate 10 without providing the first groove 30. The material of the n-side electrode 24 is, for example, Ti / Al or V / Al.

[0088] The p-side electrodes 25A to 25C are electrodes provided on the p-type layers 23A to 23C, respectively. The material of the p-side electrodes 25A to 25C is preferably a material having a high reflectance of light of the emission wavelength and a low contact resistance with the p-type layers 23A to 23C. For example, Ag, Ni / Au, Co / Au, ITO / Ni / Al, Rh, Ru, etc., are used. The red light emitted from the third active layer 19 toward the p-type layer 23A is reflected by the p-side electrode 25A and directed toward the substrate 10. Similarly, the green light emitted from the second active layer 16 toward the p-type layer 23B is reflected by the p-side electrode 25B and directed toward the substrate 10, and the blue light emitted from the first active layer 13 toward the p-type layer 23C is reflected by the p-side electrode 25C and directed toward the substrate 10.

[0089] As described above, in the light-emitting device of embodiment 1, a non-doped first intermediate electron blocking layer 14 in contact with the first active layer 13 is provided between the first active layer 13 and the first intermediate layer 15, and a non-doped second intermediate electron blocking layer 17 in contact with the second active layer 16 is provided between the second active layer 16 and the second intermediate layer 18. Therefore, the electron blocking function provided by the first intermediate electron blocking layer 14 and the second intermediate electron blocking layer 17 is high, and the luminous efficiency can be improved.

[0090] 2. Operation of the light-emitting element Next, the operation of the light emitting device in embodiment 1 will be described. In the light emitting device in embodiment 1, red light can be emitted from the third active layer 19 by applying a voltage between the p-side electrode 25A and the n-side electrode 24, green light can be emitted from the second active layer 16 by applying a voltage between the p-side electrode 25B and the n-side electrode 24, and blue light can be emitted from the first active layer 13 by applying a voltage between the p-side electrode 25C and the n-side electrode 24. These lights can be controlled individually, and two or more of blue, green, and red can be emitted simultaneously.

[0091] In this way, the light emitting element in the first embodiment can control the emission of blue, green, and red light by selecting the electrodes to which a voltage is applied, and can be used as one pixel of a display. It can also be used as a light source for optical wavelength division multiplexing communication.

[0092] FIG. 2 shows an equivalent circuit of the light-emitting element in the first embodiment. As shown in FIG. 2, the light-emitting element in the first embodiment has a structure in which blue, green, and red LEDs are formed in one element, and full-color light emission can be realized with one element. Therefore, it is possible to make the size of one element much smaller than when blue, green, and red LEDs are prepared separately and arranged on the same substrate to fabricate a full-color light-emitting element of one pixel. Furthermore, with the structure of the first embodiment, the process of preparing and arranging blue, green, and red LEDs separately can be omitted, and the manufacturing cost can be significantly reduced, making it possible to realize a very low-cost full-color light-emitting element and a light-emitting display using the same.

[0093] 3. Light-emitting device manufacturing process Next, a manufacturing process of the light emitting device in embodiment 1 will be described with reference to the drawings.

[0094] First, the substrate 10 is prepared, and hydrogen or nitrogen, and if necessary, ammonia, are added to the substrate, and the substrate is subjected to a heat treatment.

[0095] Next, a buffer layer is formed on substrate 10, and n-type layer 11, underlayer 12, first active layer 13, first intermediate electron blocking layer 14, first intermediate layer 15, second active layer 16, second intermediate electron blocking layer 17, second intermediate layer 18, third active layer 19, and protective layer 20 are formed in this order on the buffer layer (see FIG. 3). The preferred growth temperatures for each layer are as follows:

[0096] The growth temperature of the first active layer 13 is preferably 700 to 950°C. This can improve the crystal quality and the light emission efficiency. The first active layer 13 is composed of a well layer and a barrier layer, and the well layer and the barrier layer may be formed at the same temperature or at different temperatures within the above temperature range. When they are formed at different temperatures, it is preferable that the growth temperature of the well layer is lower than the growth temperature of the barrier layer.

[0097] The growth temperature of the first intermediate electron blocking layer 14 is preferably 800 to 1000° C. This can suppress thermal damage to the active layer, improve the crystal quality of the first intermediate electron blocking layer 14, and enhance the electron blocking function. For the same reason, the growth temperature is preferably in the range of −50 to 50° C. relative to the growth temperature of the first intermediate layer 15. More preferably, the growth temperature is in the range of −30 to 30° C. relative to the growth temperature of the first intermediate layer 15.

[0098] The growth rate of the first intermediate electron blocking layer 14 is preferably 0.5 to 5 nm / min. By setting the growth rate within this range, the first intermediate electron blocking layer 14 can be grown flat with good crystallinity, and the electron blocking function can be improved. The growth rate is more preferably 0.5 to 3 nm / min, and even more preferably 0.5 to 1.5 nm / min.

[0099] The growth temperature of the first intermediate layer 15 is preferably 700 to 1000°C. This is to suppress thermal damage to the first active layer 13. If the temperature is lower than 700°C, pits and point defects due to threading dislocations are likely to occur. The growth temperature is more preferably 800 to 950°C, and further preferably 850 to 950°C.

[0100] The growth temperature of the second active layer 16 is preferably 650 to 950°C. This can improve the crystal quality and the light emission efficiency. The second active layer 16 is composed of a well layer and a barrier layer, and the well layer and the barrier layer may be formed at the same temperature or at different temperatures within the above temperature range. When they are formed at different temperatures, it is preferable that the growth temperature of the well layer is lower than the growth temperature of the barrier layer. In addition, it is preferable that the growth temperature of the second active layer 16 is lower than the growth temperature of the first active layer 13.

[0101] The growth temperature and growth rate of the second intermediate electron blocking layer 17 are preferably in the same range as those of the first intermediate electron blocking layer 14. As long as they are in this range, the growth temperature and growth rate do not have to be the same.

[0102] The growth temperature of the second intermediate layer 18 is preferably in the same range as the growth temperature of the first intermediate layer 15. However, the growth temperature of the second intermediate layer 18 is preferably lower than the growth temperature of the first intermediate layer 15. This is because the green-emitting second active layer 16 is more susceptible to thermal damage than the blue-emitting first active layer 13, and is more susceptible to strain at the interface.

[0103] The growth temperature of the third active layer 19 is preferably 500 to 950°C. This can improve the crystal quality and the light emission efficiency. The third active layer 19 is composed of a well layer and a barrier layer, and the well layer and the barrier layer may be formed at the same temperature or at different temperatures within the above temperature range. When they are formed at different temperatures, it is preferable to set the growth temperature of the well layer lower than the growth temperature of the barrier layer. In addition, it is preferable that the growth temperature of the third active layer 19 is lower than the growth temperature of the second active layer 16.

[0104] The growth temperature of the protective layer 20 is preferably 500 to 950°C in order to suppress thermal damage to the first active layer 13, the second active layer 16, and the third active layer 19. To improve the crystallinity of the protective layer 20, a higher growth temperature is preferable, more preferably 600 to 900°C, and further preferably 700 to 900°C.

[0105] Next, a portion of the surface of the protective layer 20 is dry etched until it reaches the non-doped intermediate layer 18A of the second intermediate layer 18 to form a third groove 32, and then dry etched until it reaches the non-doped intermediate layer 15A of the first intermediate layer 15 to form a second groove 31 (see Figure 4).

[0106] In the process of forming the third groove 32 and the second groove 31, the wafer is temporarily removed from the growth furnace, and after an etching process is performed, it is returned to the growth furnace again. Therefore, the wafer is exposed to the atmosphere, and the wafer surface is contaminated with impurities such as O and Si.

[0107] The third groove 32 may be etched until it reaches the second intermediate electron blocking layer 17 so that the non-doped intermediate layer 18A does not remain. The second groove 31 may be etched until it reaches the first intermediate electron blocking layer 14 so that the non-doped intermediate layer 15A does not remain. However, considering the controllability of the etching depth and the possibility that the thicknesses of the first intermediate electron blocking layer 14 and the second intermediate electron blocking layer 17 may vary, which may cause variations in the electron blocking function, it is preferable to etch to a depth that leaves the non-doped intermediate layers 15A and 18A as in the first embodiment.

[0108] Next, non-n-type layers 21A-21C are formed on protective layer 20, on non-doped intermediate layer 18A of second intermediate layer 18 exposed by third groove 32, and on non-doped intermediate layer 15A of first intermediate layer 15 exposed by second groove 31. The interface between protective layer 20 and non-n-type layer 21A, the interface between non-doped intermediate layer 18A and non-n-type layer 21B, and the interface between non-doped intermediate layer 15A and non-n-type layer 21C are regrown interfaces, where impurities such as O and Si are present.

[0109] The growth temperature of the non-n-type layers 21A to 21C is, for example, 800 to 1000°C in order to suppress thermal damage to the first active layer 13, the second active layer 16, and the third active layer 19. The temperature is preferably 850 to 950°C, and more preferably 875 to 925°C.

[0110] The growth rate of the non-n-type layers 21A-21C is preferably 0.5-5 nm / min. This is because a non-n-type layer grown on a rough etched or contaminated surface is likely to have a rough surface if the growth rate is fast, and therefore the surfaces of the non-n-type layers 21A-21C can be made flatter by growing them slowly, one atomic layer at a time, at a slow growth rate.

[0111] The Mg / III gas phase ratio (the molar ratio of Mg dopant gas to the raw material gas of III metal) is preferably 0.0005 to 0.02. Within this range, the regrowth interface can be sufficiently neutralized to improve the light output. In particular, a ratio of 0.002 to 0.02 is preferable.

[0112] Next, the electron blocking layers 22A to 22C are formed on the non-n-type layers 21A to 21C. The growth temperature of the electron blocking layers 22A to 22C is preferably in the same range as that of the first intermediate electron blocking layer 14 and the second intermediate electron blocking layer 17. This is to suppress thermal damage to the first active layer 13, the second active layer 16, and the third active layer 19. Within this range, the growth temperatures do not need to be the same. In addition, the growth temperature of the electron blocking layers 22A to 22C is preferably equal to or lower than the growth temperature of the p-type layers 23A to 23C. In addition, the growth rate of the electron blocking layers 22A to 22C is preferably in the same range as that of the first intermediate electron blocking layer 14 and the second intermediate electron blocking layer 17. Within this range, the growth rates do not need to be the same.

[0113] Next, p-type layers 23A to 23C are formed on electron blocking layers 22A to 22C (see FIG. 5). The growth temperature of p-type layers 23A to 23C is preferably 650 to 1000°C, more preferably 700 to 950°C, and further preferably 750 to 900°C.

[0114] Next, a partial area of ​​the surface of the p-type layer 23C is dry-etched until it reaches the n-type layer 11 to form a first groove 30 (see FIG. 6). Then, an n-side electrode 24 is formed on the n-type layer 11 exposed at the bottom of the first groove 30, and p-side electrodes 25A-25C are formed on the p-type layers 23A-23C. In this manner, the light-emitting device of embodiment 1 is manufactured.

[0115] 4. Various Transformations In the first embodiment, the non-n-type layers 21A-21C, the electron blocking layers 22A-22C, and the p-type layers 23A-23C are provided separately from one another, but they may be continuous. In this case, the non-n-type layers, the electron blocking layers, and the p-type layers are also formed on the side surfaces of the third groove 32 and the side surfaces of the second groove 31, but this has almost no effect on the operation of the element. The reason for this is as follows.

[0116] If the p-electrode 25A, the p-electrode 25B, and the p-electrode 25C are sufficiently spatially separated from each other, the resistance of the p-type layer connecting the p-electrode 25A, the p-electrode 25B, and the p-electrode 25C is very high, so that almost no current flows. In addition, since the mobility of holes is low, the holes do not spread laterally from the region in contact with the electrodes, but flow predominantly vertically through the pn junction directly below the electrodes. Therefore, even if the non-n-type layers 21A to 21C, the electron blocking layers 22A to 22C, and the p-type layers 23A to 23C are continuous, there is no effect on the operation of the element. In other words, when a current flows through the p-electrode 25A, the current flows directly below the p-electrode 25A, and as a result, the active layer directly below the p-electrode 25A emits light, and almost no current flows through the active layers directly below the p-electrodes 25B and 25C to emit light.

[0117] An insulating film may be provided on the side surface of the third groove 32 and the side surface of the second groove 31. This insulating film may be a remaining mask used when selectively growing the non-n-type layers 21A-21C, the electron blocking layers 22A-22C, and the p-type layers 23A-23C.

[0118] In addition, in the first embodiment, the non-n-type layers 21A to 21C, the electron blocking layers 22A to 22C, and the p-type layers 23A to 23C are formed by the MOCVD method, but they may be formed by sputtering. When formed by sputtering, the n-type layer of O or Si at the regrowth interface can be removed by plasma treatment, and the layers can be formed by sputtering without being exposed to the atmosphere. Therefore, when using sputtering, it is not necessary to form the non-n-type layers 21A to 21C, but it is preferable to form them. In addition, when formed by sputtering, processing can be consistently performed in a cleaner environment than crystal growth by the MOCVD method, and therefore adhesion of particles can also be suppressed.

[0119] Furthermore, the non-n-type layers 21A to 21C, the electron blocking layers 22A to 22C, and the p-type layers 23A to 23C may be made p-type by implanting Mg ions and carrying out a heat treatment. [Explanation of symbols]

[0120] 10: Substrate 11:N-type layer 12: Base layer 13: 1st active layer 14: First intermediate electron blocking layer 15: First middle layer 16:Second active layer 17: Second intermediate electron blocking layer 18: Second middle tier 19: 3rd active layer 20:Protective layer 21A~21C: Non-n type layer 22A to 22C: Electron blocking layer 23A~23C: p-type layer 24:n side electrode 25A~25C:p side electrode 15A, 18A: Non-doped intermediate layer 15B, 18B: n-type intermediate layer 16A: Strain relaxation layer 16B, 19C, 19C: Quantum well structure layer 19A: First strain relaxation layer 19B: Second strain relaxation layer

Claims

1. In a light emitting device using a Group III nitride semiconductor, A substrate; an n-type layer formed on the substrate and made of an n-type Group III nitride semiconductor; a first active layer provided on the n-type layer and emitting light of a predetermined wavelength; an intermediate electron blocking layer provided on and in contact with the first active layer, the intermediate electron blocking layer being made of a non-doped Group III nitride semiconductor and blocking electrons attempting to transmit through the first active layer; an intermediate layer provided on the intermediate electron blocking layer and made of a group III nitride semiconductor containing non-doped In; a second active layer provided on the intermediate layer and having an emission wavelength different from that of the first active layer; a groove having a depth reaching the intermediate layer or the intermediate electron blocking layer from the second active layer side; a first p-type layer provided on the second active layer and made of a p-type Group III nitride semiconductor; an electron blocking layer provided on a bottom surface of the groove, the electron blocking layer being made of a Mg-doped Group III nitride semiconductor and blocking electrons attempting to pass through the first active layer; a second p-type layer provided on the electron blocking layer and made of a p-type Group III nitride semiconductor; The light-emitting element has the following features:

2. the first active layer has a quantum well structure having a well layer and a barrier layer; The light-emitting device of claim 1 , wherein the band gap energy of the intermediate electron blocking layer is greater than the band gap energy of the barrier layer.

3. 3. The light-emitting device according to claim 1, wherein the intermediate electron blocking layer has a thickness of 0.5 to 50 nm.

4. 3. The light-emitting device according to claim 1, wherein the intermediate electron blocking layer has an Al composition of 3 to 30%.

5. 3. The light-emitting device according to claim 1, wherein the Al composition of the electron blocking layer is equal to or greater than the Al composition of the intermediate electron blocking layer.

6. The light-emitting device according to claim 1 , wherein the electron blocking layer has a superlattice structure.

7. the groove has a depth that reaches the intermediate layer from the second active layer side, 3. The light-emitting element according to claim 1, wherein in the region where the groove is provided, a stack of the intermediate electron blocking layer, the intermediate layer, and the electron blocking layer forms a superlattice structure, and the intermediate layer functions as a well layer in the superlattice structure.

8. A method for manufacturing a light emitting device using a Group III nitride semiconductor, comprising the steps of: an n-type layer forming step of forming an n-type layer made of an n-type Group III nitride semiconductor on the substrate; a first active layer forming step of forming a first active layer having a predetermined emission wavelength on the n-type layer; an intermediate electron blocking layer forming step of forming an intermediate electron blocking layer on and in contact with the first active layer, the intermediate electron blocking layer being made of a non-doped Group III nitride semiconductor and blocking electrons attempting to transmit through the first active layer; an intermediate layer forming step of forming an intermediate layer made of a non-doped In-containing Group III nitride semiconductor on the intermediate electron blocking layer; a second active layer forming step of forming a second active layer having an emission wavelength different from that of the first active layer on the intermediate layer; a groove forming step of forming a groove having a depth reaching the intermediate layer or the intermediate electron blocking layer from the second active layer side; an electron blocking layer forming step of forming an electron blocking layer made of an Mg-doped Group III nitride semiconductor on a bottom surface of the groove, the electron blocking layer blocking electrons attempting to transmit through the first active layer; a p-type layer forming step of forming a first p-type layer and a second p-type layer made of a p-type Group III nitride semiconductor on the second active layer and the electron blocking layer, respectively; having The growth temperature of the intermediate electron blocking layer and the electron blocking layer is −50 to 50° C. relative to the growth temperature of the intermediate layer.

9. 9. The method for producing a light-emitting device according to claim 8, wherein the intermediate electron blocking layer and the electron blocking layer are grown at a temperature of 800 to 1000.degree.

10. 10. The method for manufacturing a light-emitting element according to claim 8, wherein a growth temperature of the electron blocking layer is equal to or lower than a growth temperature of the first p-type layer and the second p-type layer.

11. 10. The method for producing a light-emitting element according to claim 8, wherein the intermediate electron blocking layer and the electron blocking layer are grown at a growth rate of 0.5 to 5 nm / min.

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