Conductive substrate and method for manufacturing the same

Abstract

To provide a conductive substrate which can suppress delamination of a conductive layer, and a method for manufacturing the same.SOLUTION: It has a substrate 12 having a first surface 13 and a second surface 14 opposite the first surface 13, a signal layer 311 located on the first surface 13, and a ground layer 312 having a plurality of convex portions 312a protruding in a plane direction along the first surface 13 over at least a portion of an edge 312c not facing the signal layer 311, located on the first surface 13 adjacent to the signal layer 311 in a spaced manner.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present disclosure relates to a conductive substrate and a method for manufacturing the same. [Background technology]

[0002] Conventionally, various techniques related to conductive substrates having conductive layers have been proposed. For example, Patent Document 1 discloses a wiring substrate having a signal layer for transmitting high-frequency signals and a ground layer for matching the characteristic impedance between the signal layer and the ground layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-248797 A Summary of the Invention [Problem to be solved by the invention]

[0004] In order to transmit high-frequency signals with little loss, it is desirable for the conductive layer to be thick. However, when the conductive layer is thick, the stress of the conductive layer increases, and there is a risk of the conductive layer peeling off. Specifically, in the past, the ends of the conductive layer were formed in a shape without unevenness, so that the stress of the conductive layer could not be alleviated at the ends of the conductive layer, and there was a risk of the conductive layer peeling off starting from the ends.

[0005] The present disclosure has been made in consideration of the above points, and has an object to provide a conductive substrate capable of suppressing peeling of a conductive layer, and a method for manufacturing the same. [Means for solving the problem]

[0006] In order to solve the above problems, in one aspect of the present disclosure, a substrate having a first surface and a second surface opposite the first surface; a signal layer located on the first surface; A conductive substrate is provided, comprising: a ground layer located on the first surface so as to be adjacent to the signal layer with a gap therebetween, and having a plurality of protrusions protruding in a planar direction along the first surface over at least a portion of an end portion that does not face the signal layer.

[0007] The plurality of protrusions may be positioned periodically along an end of the ground layer that does not face the signal layer.

[0008] The end of the ground layer that does not face the signal layer may be an outer end of the ground layer.

[0009] a through hole is provided in the ground layer in a direction intersecting with the first surface, The end of the ground layer not facing the signal layer may be an inner end of the through hole.

[0010] The ground layer may include a first ground layer located on the first surface so as to be adjacent to the signal layer with a gap therebetween in the planar direction.

[0011] The ground layer may include a second ground layer located on the first surface so as to be adjacent to the signal layer with a gap in a first direction among directions intersecting the first surface.

[0012] The ground layer may include a third ground layer located on the first surface so as to be adjacent to the signal layer and spaced apart in a second direction opposite to the first direction, among directions intersecting the first surface.

[0013] The board may further include a fourth ground layer located on the first surface adjacent to the second ground layer with a gap in between in the first direction, and having a plurality of protrusions protruding in the surface direction over at least a portion of an end portion.

[0014] The semiconductor device may further include a through electrode that penetrates the substrate from the first surface to the second surface and is connected to the signal layer.

[0015] The semiconductor device may further comprise a capacitor located on the first surface and connected to the signal layer.

[0016] The device may further include a first insulating layer located on the ground layer.

[0017] The first insulating layer may be in contact with a surface of the substrate that is in contact with the ground layer through gaps between the plurality of protrusions.

[0018] The surface of the substrate that is in contact with the ground layer may be the first surface of the substrate.

[0019] The surface of the substrate that is in contact with the ground layer may be a surface of a second insulating layer that is located between the first surface of the substrate and the ground layer.

[0020] In another aspect of the present disclosure, providing a substrate having a first side and a second side opposite the first side; forming a signal layer on the first surface; A method for manufacturing a conductive substrate is provided, comprising the steps of: forming a ground layer on the first surface, the ground layer having a plurality of protrusions protruding in a planar direction along the first surface over at least a portion of an end portion that does not face the signal layer, the ground layer being adjacent to the signal layer at a distance from the signal layer. Effect of the Invention

[0021] According to the present disclosure, peeling of the conductive layer can be suppressed. [Brief description of the drawings]

[0022] [Figure 1] FIG. 2 is a cross-sectional view showing a conductive substrate according to the present embodiment. [Diagram 2] 2 is a cross-sectional view taken along line II-II of FIG. 1, showing the conductive substrate according to the present embodiment. [Diagram 3] FIG. 2 is a plan view showing a conductive substrate according to the present embodiment. [Figure 4]5A to 5C are cross-sectional views showing a method for manufacturing a conductive substrate according to the present embodiment. [Diagram 5] 5A to 5C are cross-sectional views showing the method for manufacturing the conductive substrate according to the present embodiment subsequent to FIG. 4. [Figure 6] 6A to 6C are cross-sectional views showing the method for manufacturing the conductive substrate according to the present embodiment subsequent to FIG. 5. [Figure 7] 7 is a cross-sectional view taken along line VII-VII of FIG. 6, illustrating the method for manufacturing the conductive substrate according to the present embodiment subsequent to FIG. 5; [Figure 8] 8A to 8C are cross-sectional views showing the method for manufacturing the conductive substrate according to the present embodiment following those shown in FIGS. 6 and 7. [Figure 9] 9 is a cross-sectional view taken along line IX-IX of FIG. 8, illustrating the method for manufacturing the conductive substrate according to the present embodiment subsequent to FIGS. 6 and 7. [Figure 10] 10A to 10C are cross-sectional views showing the method for manufacturing the conductive substrate according to the present embodiment following those shown in FIGS. 8 and 9. [Figure 11] 10 is a cross-sectional view taken along the line XI-XI of FIG. 10, illustrating the method for manufacturing the conductive substrate according to the present embodiment subsequent to FIGS. 8 and 9. [Figure 12] 12A to 12C are cross-sectional views showing the method for manufacturing the conductive substrate according to the present embodiment following those shown in FIGS. 10 and 11. [Figure 13] 13 is a cross-sectional view taken along the line XIII-XIII of FIG. 12 illustrating the method for manufacturing the conductive substrate according to the present embodiment, continuing from FIGS. 10 and 11. [Figure 14] FIG. 4 is a cross-sectional view showing a conductive substrate according to a first modified example of the present embodiment. [Figure 15] 15 is a cross-sectional view taken along the line XV-XV of FIG. 14, showing a conductive substrate according to a first modified example of the present embodiment. [Figure 16] 16 is a cross-sectional view taken along the line XVI-XVI of FIG. 15, showing a conductive substrate according to a first modified example of the present embodiment. [Figure 17] 17 is a cross-sectional view taken along the line XVII-XVII of FIG. 15, showing a conductive substrate according to a first modified example of the present embodiment. [Figure 18] FIG. 11 is a plan view showing a conductive substrate according to a second modified example of the present embodiment. [Figure 19] FIG. 11 is an enlarged plan view showing a conductive substrate according to a third modified example of the present embodiment. [Figure 20] FIG. 11 is a cross-sectional view showing a conductive substrate according to a fourth modified example of the present embodiment. [Figure 21] 21 is a cross-sectional view taken along the line XXI-XXI of FIG. 20, showing a conductive substrate according to a fourth modified example of the present embodiment. [Figure 22] FIG. 11 is a cross-sectional view showing a conductive substrate according to a fifth modified example of the present embodiment. [Figure 23] 23 is a cross-sectional view taken along the line XXIII-XXIII of FIG. 22, showing a conductive substrate according to a fifth modified example of the present embodiment. [Figure 24] FIG. 13 is a cross-sectional view showing a conductive substrate according to a sixth modified example of the present embodiment. [Diagram 25] FIG. 13 is a cross-sectional view showing a conductive substrate according to a seventh modified example of the present embodiment. [Figure 26] FIG. 13 is a cross-sectional view showing a conductive substrate according to an eighth modified example of the present embodiment. [Figure 27] 1A to 1C are diagrams showing examples of products on which a conductive substrate is mounted. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] The configuration of the conductive substrate according to the embodiment of the present disclosure and the manufacturing method thereof will be described in detail below with reference to the drawings. Note that the embodiment shown below is an example of the embodiment of the present disclosure, and the present disclosure is not limited to these embodiments. In this specification, terms such as "substrate", "base material", "sheet" and "film" are not distinguished from each other based only on the difference in name. For example, "substrate" and "base material" are concepts that include members that can be called sheets and films. Furthermore, terms such as "parallel" and "orthogonal" and values ​​of length and angle, which specify the shape and geometric conditions and their degree, used in this specification, are interpreted to include the range in which similar functions can be expected without being bound by strict meaning. In addition, in the drawings referred to in this embodiment, the same or similar symbols are attached to the same parts or parts having similar functions, and repeated explanations thereof may be omitted. In addition, the dimensional ratios of the drawings may differ from the actual ratios for convenience of explanation, and part of the configuration may be omitted from the drawings.

[0024] Conductive substrate 10 Hereinafter, an embodiment of the present disclosure will be described. First, the configuration of the conductive substrate according to the present embodiment will be described. The conductive substrate of the present embodiment can be used, for example, as an interposer substrate for transmitting high-frequency signals. FIG. 1 is a cross-sectional view showing a conductive substrate 10 according to the present embodiment. FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1 showing the conductive substrate 10 according to the present embodiment. FIG. 3 is a plan view showing the conductive substrate 10 according to the present embodiment.

[0025] 1 to 3, the conductive substrate 10 includes a substrate 12, a through electrode 22, a first wiring-structure portion 30, a second wiring-structure portion 40, and an organic layer 26. Each of the components of the conductive substrate 10 will be described below.

[0026] (Substrate 12) The substrate 12 includes a first surface 13 and a second surface 14 located on the opposite side to the first surface 13. The substrate 12 also has a plurality of through holes 20 that penetrate from the first surface 13 to the second surface 14.

[0027] The substrate 12 includes an inorganic material having a certain insulating property. For example, the substrate 12 may be a glass substrate, a quartz substrate, a sapphire substrate, a resin substrate, a silicon substrate, a silicon carbide substrate, an alumina (Al 2 O 3 ) substrate, aluminum nitride (AlN) substrate, zirconia oxide (ZrO 2 ) substrate, or a laminate of such substrates. The substrate 12 may partially include a substrate made of a conductive material, such as an aluminum substrate or a stainless steel substrate.

[0028] An example of the glass used in the substrate 12 is alkali-free glass. The alkali-free glass is glass that does not contain an alkali component such as sodium or potassium. The alkali-free glass contains, for example, boric acid instead of an alkali component. The alkali-free glass also contains, for example, an alkaline earth metal oxide such as calcium oxide or barium oxide.

[0029] 1, the through hole 20 formed in the substrate 12 has a shape in which the width decreases from the first surface 13 and the second surface 14 of the substrate 12 toward the center in the thickness direction of the substrate 12. However, the shape of the through hole 20 is not particularly limited. For example, the side wall 21 of the through hole 20 may expand along the normal direction of the first surface 13 of the substrate 12. Furthermore, a part of the side wall 21 may be curved.

[0030] (Through electrode 22) The through electrode 22 is a conductive member located inside the through hole 20. In the present embodiment, the thickness of the through electrode 22 is smaller than the width of the through hole 20, and therefore, there is a space inside the through hole 20 where the through electrode 22 is not present. That is, the through electrode 22 is a so-called conformal via. In the example of FIG. 1, the space inside the through hole 20 is filled with an organic layer 26 located inside the through electrode 22.

[0031] As long as the through electrode 22 is conductive, the configuration of the through electrode 22 is not particularly limited. For example, the through electrode 22 may be composed of a single layer having conductivity, or may include multiple layers having conductivity. The through electrode 22 may also include a seed layer and a plating layer arranged in order from the side wall 21 side of the through hole 20 to the center side. In this case, an intermediate layer may be provided between the side wall 21 of the through hole 20 and the seed layer. For example, titanium, titanium nitride, molybdenum, molybdenum nitride, tantalum, tantalum nitride, etc., or a laminate of these materials can be used as a material for the intermediate layer. The intermediate layer is formed by a physical film formation method such as a vapor deposition method or a sputtering method. The intermediate layer, for example, plays a role of increasing the adhesion of the seed layer or plating layer to the side wall 21. The intermediate layer may also play a role of suppressing the diffusion of metal elements contained in the seed layer or plating layer into the inside of the substrate 12 through the side wall 21 of the through hole 20.

[0032] The organic layer 26 includes an organic material having a dielectric loss tangent of preferably 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. The organic material of the organic layer 26 may be polyimide, epoxy, or the like. By forming the organic layer 26 using an organic material with a small dielectric loss tangent, it is possible to prevent a part of the electrical signal that should pass through the through electrode 22 from passing through the organic layer 26. This makes it possible to expand the band of the conductive substrate 10 to the high frequency side.

[0033] (First wiring structure section 30) Next, the first wiring structure 30 will be described. The first wiring structure 30 has layers such as a conductive layer and an insulating layer provided on the first surface 13 side of the substrate 12 to configure an electrical circuit on the first surface 13 side. In the example of FIG. 1, the first wiring structure 30 has a first surface first conductive layer 31.

[0034] [First surface first conductive layer 31] The first-surface first conductive layer 31 is a conductive layer located on the first surface 13 of the substrate 12. The first-surface first conductive layer 31 is connected to the through electrode 22. The first-surface first conductive layer 31 has a coplanar line in which a signal line and a ground are installed on the same plane. Specifically, as shown in Figs. 2 and 3, the coplanar line has a signal layer 311 and a ground layer 312 which is an example of a first ground layer.

[0035] [Signal Layer 311] More specifically, as shown in FIGS. 1 to 3, the signal layer 311 is constituted by a part of the first surface first conductive layer 31. The signal layer 311 transmits an electric signal such as a high-frequency signal. An example of the high-frequency signal is an electric signal of 0.1 GHz or more. The signal layer 311 is located on the first surface 13, and extends in the extension direction D11 in FIG. 1, which is an example of a planar direction along the first surface 13. In the example of FIG. 1, the signal layer 311 is connected to one through electrode 22 at one end in the extension direction D11, and connected to another through electrode 22 at the other end in the extension direction D11.

[0036] The thickness of the signal layer 311 is preferably 5 μm or more. By making the thickness of the signal layer 311 5 μm or more, the conductor resistance loss of the signal layer 311 can be reduced, and therefore the transmission loss of the signal can be suppressed. The thickness of the signal layer 311 is more preferably 20 μm or less. By making the thickness of the signal layer 311 20 μm or less, the interface stress with the first surface 13 can be suppressed, and therefore peeling of the signal layer 311 can be suppressed.

[0037] The dimension of the signal layer 311 in a width direction D12 perpendicular to the extension direction D11, indicated by the symbol W in FIG. 3, that is, the wiring width W, may be 300 μm or less.

[0038] [Ground layer 312] As shown in FIG. 1 to FIG. 3, the ground layer 312 is composed of a part of the first surface first conductive layer 31. The ground layer 312 is connected to a reference potential such as a ground potential, and controls the characteristic impedance between the ground layer 312 and the signal layer 311. The ground layer 312 is located on the first surface 13 so as to be adjacent to the signal layer 311 with a gap in a width direction D12, which is an example of a surface direction along the first surface 13. The ground layer 312 has a total area larger than that of the signal layer 311. In the example of FIG. 3, the ground layer 312 has a shape that sandwiches the signal layer 311 from both sides in the width direction D12. In order to control the characteristic impedance between the ground layer 312 and the signal layer 311 to a desired value, the ground layer 312 has a predetermined gap d in the width direction D12 between the ground layer 312 and the signal layer 311.

[0039] The ground layer 312 has multiple protrusions 312a protruding in the planar direction over at least a portion of the end portion that does not face the signal layer 311. In the example of Fig. 3, the protrusions 312a protrude in the direction opposite to the signal layer 311 in the width direction D12, i.e., outward, from an outer end portion 312c opposite to an inner end portion 312b of the ground layer 312 that faces the signal layer 311.

[0040] 3, the protrusion 312a has a rectangular shape with long sides parallel to the width direction D12 and short sides parallel to the extension direction D11. For example, the long sides of the protrusion 312a may be 200 μm and the short sides may be 100 μm.

[0041] 3, the convex portions 312a are periodically positioned over the outer end portion 312c of the ground layer 312. That is, the convex portions 312a are positioned at regular intervals in the extension direction D11. In other words, the ground layer 312 has a comb-tooth shape with the convex portions 312a periodically positioned. The dimension of the gap between adjacent convex portions 312a may be, for example, 30 μm or more. By setting the dimension of the gap between the convex portions 312a to 30 μm or more, the gap can be formed with high dimensional accuracy using a resist, and therefore the dimensional error of the convex portions 312a can be suppressed.

[0042] 1 and 3 , the first surface first conductive layer 31 including the signal layer 311 and the ground layer 312 has a seed layer 221 and a plating layer 222. The seed layer 221 is located on the first surface 13 of the substrate 12. The plating layer 222 is located on the seed layer 221.

[0043] The seed layer 221 is a conductive layer that serves as a base for growing the plating layer 222 by precipitating metal ions in a plating solution during an electrolytic plating process in which the plating layer 222 is formed by electrolytic plating. A conductive material such as copper can be used as the material of the seed layer 221. The material of the seed layer 221 may be the same as or different from the material of the plating layer 222. For example, the seed layer 221 may be a laminated film in which titanium and copper are laminated in order, or chromium. The seed layer 221 may be formed by, for example, a sputtering method, a vapor deposition method, an electroless plating method, or the like.

[0044] The plating layer 222 is a conductive layer formed by plating. The plating layer 222 contains copper. The plating layer 222 may contain an alloy of copper and a metal other than copper, such as gold, silver, platinum, rhodium, tin, aluminum, nickel, or chromium, or may be a layer of copper and a metal other than copper.

[0045] (Second wiring structure section 40) Next, the second wiring structure 40 will be described. The second wiring structure 40 has layers such as a conductive layer and an insulating layer provided on the second surface 14 side of the substrate 12 to configure an electrical circuit on the second surface 14 side. In the example of FIG. 1, the second wiring structure 40 has a second surface first conductive layer 41.

[0046] [Second surface first conductive layer 41] The second-surface first conductive layer 41 is a layer having conductivity located on the second surface 14 of the substrate 12. The second-surface first conductive layer 41 may be connected to the through electrode 22. Similarly to the through electrode 22 and the first-surface first conductive layer 31, the second-surface first conductive layer 41 may include a seed layer 221 and a plating layer 222 laminated in this order on the second surface 14 of the substrate 12. The material constituting the second-surface first conductive layer 41 is the same as the material constituting the through electrode 22.

[0047] Manufacturing method of conductive substrate 10 An example of a method for manufacturing the conductive substrate 10 will now be described with reference to FIGS.

[0048] (Through hole formation process) 4 is a cross-sectional view showing a method for manufacturing the conductive substrate 10 according to the present embodiment. First, the substrate 12 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14. After that, an opening is provided in the resist layer at a position corresponding to the through hole 20. Next, the substrate 12 is processed at the opening in the resist layer, thereby forming the through hole 20 in the substrate 12 as shown in FIG. 4. The substrate 12 can be processed by dry etching methods such as reactive ion etching and deep reactive ion etching, or wet etching.

[0049] The through holes 20 may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, the resist layer does not need to be provided. As a laser for the laser processing, an excimer laser, a Nd:YAG laser, a femtosecond laser, or the like can be used. When an Nd:YAG laser is used, a fundamental wave with a wavelength of 1064 nm, a second harmonic with a wavelength of 532 nm, a third harmonic with a wavelength of 355 nm, or the like can be used.

[0050] Laser irradiation and wet etching can also be appropriately combined. Specifically, first, an altered layer is formed in the region of the substrate 12 where the through hole 20 is to be formed by laser irradiation. Then, the substrate 12 is immersed in hydrogen fluoride or the like to etch the altered layer. In this way, the through hole 20 can be formed in the substrate 12. Alternatively, the through hole 20 can be formed in the substrate 12 by a blasting process in which an abrasive is sprayed on the substrate 12.

[0051] By processing the substrate 12 from both the first surface 13 side and the second surface 14 side, it is possible to form a through hole 20 having a shape that becomes narrower toward the center of the thickness direction of the substrate 12, as shown in Figure 4.

[0052] (Process for forming through electrodes, signal layers, and ground layers) Fig. 5 is a cross-sectional view showing the manufacturing method of the conductive substrate 10 according to the present embodiment subsequent to Fig. 4. After the through hole 20 is formed, a through electrode 22 is formed on the side wall 21 of the through hole 20 as shown in Fig. 5. Specifically, a seed layer 221 is formed on the first surface 13, the second surface 14 and the side wall 21 of the substrate 12 by a sputtering method, a vapor deposition method, an electroless plating method or the like.

[0053] Fig. 6 is a cross-sectional view showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 5. Fig. 7 is a cross-sectional view taken along line VII-VII of Fig. 6 showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 5. After the seed layer 21 is formed, a resist layer 37 is partially formed on the seed layer 221 as shown in Figs. 6 and 7.

[0054] Fig. 8 is a cross-sectional view showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 6 and Fig. 7. Fig. 9 is a cross-sectional view taken along line IX-IX of Fig. 8 showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 6 and Fig. 7. After forming the resist layer 37, as shown in Fig. 8 and Fig. 9, a plating layer 222 is formed on the seed layer 221 that is not covered by the resist layer 37 by electrolytic plating using the resist layer 37 as a mask.

[0055] Fig. 10 is a cross-sectional view showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 8 and Fig. 9. Fig. 11 is a cross-sectional view taken along line XI-XI of Fig. 10 showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 8 and Fig. 9. After the plating layer 222 is formed, the resist layer 37 is removed as shown in Fig. 10 and Fig. 11.

[0056] Fig. 12 is a cross-sectional view showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 10 and Fig. 11. Fig. 13 is a cross-sectional view taken along XIII-XIII in Fig. 12 showing the method for manufacturing the conductive substrate 10 according to the present embodiment following Fig. 10 and Fig. 11. After removing the resist layer 37, the portion of the seed layer 221 where the resist layer 37 was formed is removed by wet etching, as shown in Fig. 10 and Fig. 11.

[0057] By the above steps, it is possible to form the through electrode 22, the first surface first conductive layer 31 including the signal layer 311 and the ground layer 312, and the second surface first conductive layer 41. Note that a step of annealing the plating layer 222 may be performed.

[0058] The effects brought about by this embodiment will be described below.

[0059] 2 and 3, the conductive substrate 10 of this embodiment has a plurality of protrusions 312a at the outer end 312c of the ground layer 312. In order to suppress the signal transmission loss caused by the signal layer 311, it is preferable to increase the thickness of the signal layer 311. When the thickness of the signal layer 311 is increased, the thickness of the ground layer 312 formed in the same process as the signal layer 311 also increases. If the ground layer 312 is formed thick so that there are no gaps between the protrusions 312a, the interfacial stress of the ground layer with respect to the first surface 13 of the substrate 12 increases, which may cause the ground layer to peel off at the outer end of the ground layer.

[0060] In contrast, according to the present embodiment, by forming the ground layer 312 in a shape having the convex portions 312a at the outer end portion 312c, the interfacial stress can be alleviated by the gaps between the convex portions 312a, i.e., the notches or recesses, thereby making it possible to suppress peeling of the ground layer 312 at the outer end portion 312c.

[0061] In this embodiment, the inner end 312b of the ground layer 312 facing the signal layer 311 is not provided with a protrusion 312a. This makes it possible to ensure a suitable gap d between the ground layer 312 and the signal layer 311 for controlling the characteristic impedance, as shown in FIG.

[0062] (First Modification) Next, a first modified example including a ground layer having a first ground layer and a second ground layer, a conductive layer, a first insulating layer, and a second insulating layer will be described.

[0063] Fig. 14 is a cross-sectional view showing a conductive substrate 10 according to a first modified example of this embodiment. Fig. 15 is a cross-sectional view taken along XV-XV in Fig. 14 showing a conductive substrate 10 according to a first modified example of this embodiment. Fig. 16 is a cross-sectional view taken along XVI-XVI in Fig. 15 showing a conductive substrate 10 according to a first modified example of this embodiment. Fig. 17 is a cross-sectional view taken along XVII-XVII in Fig. 15 showing a conductive substrate 10 according to a first modified example of this embodiment.

[0064] (First wiring structure section 30) 1, the first wiring structure portion 30 further includes a first-surface second conductive layer 33 which is an example of a second ground layer, a first-surface first organic layer 34, a first-surface third conductive layer 35 which is an example of a conductive layer, and a first-surface second organic layer 36. The first-surface first organic layer 34 is an example of a first insulating layer for the ground layer 312, and is an example of a second insulating layer for the first-surface second organic layer 36. The first-surface second organic layer 36 is an example of a first insulating layer for the first-surface second conductive layer 33.

[0065] [First surface second conductive layer 33] The first-surface second conductive layer 33 is a conductive layer located on the first surface 13 so as to be adjacent to the signal layer 311 with a gap therebetween in the upward direction D31 in FIG. 14, which is an example of a first direction among directions intersecting the first surface 13. The first-surface second conductive layer 33 functions as a second ground layer that controls the characteristic impedance between itself and the signal layer 311.

[0066] The first-side second conductive layer 33 is located on the first-side first organic layer 34. The thickness of the first-side second conductive layer 33 may be the same as or different from the thickness of the first-side first conductive layer 31.

[0067] 15 and 17, the first-surface second conductive layer 33 has a plurality of protrusions 33a protruding outward in the width direction D12 at an outer end 33b in the width direction D12. The protrusions 33a are periodically positioned at the outer end 33b along the extension direction D11. The dimensions of the protrusions 33a of the first-surface second conductive layer 33 may be the same as or different from the dimensions of the protrusions 312a of the ground layer 312.

[0068] The first-surface second conductive layer 33 may include a seed layer and a plating layer laminated in this order on the first-surface first organic layer 34, similar to the through electrode 22 and the first-surface first conductive layer 31. The material constituting the first-surface second conductive layer 33 is similar to the material constituting the through electrode 22 and the first-surface first conductive layer 31.

[0069] [First surface first organic layer 34] The first-surface first organic layer 34 is located on the first surface 13 or on the first-surface first conductive layer 31, contains an organic material, and is an insulating layer.

[0070] The first organic layer 34 on the first surface and the other organic layers 36, 42, 44 preferably contain an organic material having a dielectric tangent of 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. The organic material for the organic layers 34, 36, 42, 44 may be polyimide, epoxy resin, or the like. By forming the organic layer 34 using an organic material with a small dielectric tangent, it is possible to prevent a part of the electrical signal that should pass through the signal layer 311 from passing through the organic layers 34, 36, 42, 44. This allows the band of the conductive substrate 10 to be expanded to the high frequency side.

[0071] The organic layers 34, 36, 42, and 44 may be formed, for example, by exposure and development processes using a photosensitive film containing an organic material, or by applying a liquid containing an organic material by spin coating and drying it.

[0072] 16, the first-surface first organic layer 34 is in contact with the side walls of the first-surface second conductive layer 33 between the protruding portions 312a of the ground layer 312. The first-surface first organic layer 34 is in contact with the first surface 13, which is in contact with the ground layer 312 on the substrate 12 side, through the gaps between the protruding portions 312a.

[0073] [First surface third conductive layer 35] The first-surface third conductive layer 35 is a layer located on the substrate 12 adjacent to the first-surface second conductive layer 33, i.e., the second ground layer, with a gap in the upward direction D31 in Fig. 14, which is an example of a first direction intersecting the first surface 13. The first-surface third conductive layer 35 may function as a fourth ground layer.

[0074] The first-side third conductive layer 35 is located on the first-side second organic layer 36. The thickness of the first-side third conductive layer 35 may be the same as or different from the thickness of the first-side first conductive layer 31.

[0075] Similar to the first-surface second conductive layer 33, the first-surface third conductive layer 35 has a plurality of protrusions 35a protruding outward in the width direction D12 at an outer end 35b in the width direction D12. The protrusions 35a are periodically positioned at the outer end 35b along the extension direction D11. The dimensions of the protrusions 35a of the first-surface third conductive layer 35 may be the same as or different from the dimensions of the protrusions 312a of the ground layer 312.

[0076] The first-surface third conductive layer 35 may include a seed layer and a plating layer laminated in this order, similar to the through electrode 22 and the first-surface first conductive layer 31. The material constituting the first-surface third conductive layer 35 is similar to the material constituting the through electrode 22 and the first-surface first conductive layer 31.

[0077] [First surface second organic layer 36] The first-surface second organic layer 36 is located on the first-surface first organic layer 34 and on the first-surface third conductive layer 35, contains an organic material, and is an insulating layer.

[0078] 17, the first-surface second organic layer 36 is in contact with the side walls of the first-surface second conductive layer 33 between the protruding portions 33a of the first-surface second conductive layer 33. The first-surface second organic layer 36 is in contact with the surface of the first-surface first organic layer 34 that is in contact with the first-surface second conductive layer 33 on the substrate 12 side, through the gaps between the protruding portions 33a.

[0079] (Second wiring structure section 40) The second wiring structure portion 40 in the second modified example further comprises, in addition to the second surface first conductive layer 41 described in the example of Figure 1, a second surface first organic layer 42, a second surface second electrode layer 43, a second surface second organic layer 44, and a second surface third electrode layer 45.

[0080] [Second side first organic layer 42] The second-surface first organic layer 42 is located on the second-surface first conductive layer 41 and on the second surface 14 of the substrate 12, contains an organic material, and is an insulating layer.

[0081] [Second surface second electrode layer 43] The second-surface second electrode layer 43 is a conductive layer located on the second-surface first conductive layer 41 or on the second-surface first organic layer 42. The second-surface second electrode layer 43 may include a seed layer 221 and a plating layer 222 laminated in this order on the second-surface first organic layer 42, similar to the second-surface first conductive layer 41. The material constituting the second-surface second electrode layer 43 is the same as the material constituting the second-surface first conductive layer 41.

[0082] [Second surface second organic layer 44] The second-surface second organic layer 44 is located on the second-surface first organic layer 42 and the second-surface second electrode layer 43, contains an organic material, and is an insulating layer.

[0083] [Second surface third electrode layer 45] The second-surface third electrode layer 45 is a conductive layer located on the second-surface second electrode layer 43 or on the second-surface second organic layer 44. The second-surface third electrode layer 45 may include a seed layer 221 and a plating layer 222 laminated in this order on the second-surface second organic layer 44. The material constituting the second-surface third electrode layer 45 is the same as the material constituting the second-surface first conductive layer 41.

[0084] 14 and 15, in the first modified example, three conductive layers, namely, a ground layer 312, a first-surface second conductive layer 33, and a first-surface third conductive layer 35, overlap in a thickness direction D3 with a first-surface first organic layer 34 and a first-surface second organic layer 36 sandwiched therebetween. Since the conductive layers 312, 33, 35 overlap each other, interfacial stress due to the thicknesses of the conductive layers 312, 33, 35 and the difference in thermal expansion coefficient between the conductive layers 312, 33, 35 and the organic layers 34, 36 increases at the ends of the conductive layers 312, 33, 35, and there is a risk that the conductive layers 312, 33, 35 will peel off.

[0085] In contrast, in the first modified example, convex portions 312a, 33a, and 35a are provided at the outer ends of the conductive layers 3121, 33, and 35, respectively, so that the interfacial stress can be alleviated and peeling of the conductive layers 312, 33, and 35 can be suppressed.

[0086] Furthermore, in the first modified example, the contact area between the ground layer 312 and the first-surface first organic layer 34 covering the ground layer 312 is increased on the side wall of the convex portion 312a of the ground layer 312. This increases the adhesive strength between the ground layer 312 and the first-surface first organic layer 34, thereby more effectively preventing the ground layer 312 from peeling off.

[0087] In the first modified example, the first-surface first organic layer 34 contacts the first surface 13 of the substrate 12 through the protrusions 312a of the ground layer 312, increasing the contact area between the first-surface first organic layer 34 and the first surface 13. This increases the adhesive force between the first-surface first organic layer 34 and the first surface 13, making it possible to more effectively prevent the ground layer 312 sandwiched between the first-surface first organic layer 34 and the first surface 13 from peeling off.

[0088] Furthermore, in the first modified example, the contact area between the first-surface second conductive layer 33 and the first-surface second organic layer 36 covering the first-surface second conductive layer 33 is increased on the side walls of the protrusions 33a of the first-surface second conductive layer 33. This increases the adhesive strength between the first-surface second conductive layer 33 and the first-surface second organic layer 36, making it possible to more effectively suppress peeling of the first-surface second conductive layer 33.

[0089] Furthermore, in the first modified example, the first-surface second organic layer 36 contacts the surface of the first-surface first organic layer 34 through between the protruding portions 33a of the first-surface second conductive layer 33, increasing the contact area between the first-surface first organic layer 34 and the first-surface second organic layer 36. This increases the adhesive strength between the first-surface first organic layer 34 and the first-surface second organic layer 36, making it possible to more effectively suppress peeling of the first-surface second conductive layer 33 sandwiched between the first-surface first organic layer 34 and the first-surface second organic layer 36.

[0090] (Second Modification) Next, a second modified example in which through holes are provided in the second conductive layer will be described. Fig. 18 is a plan view showing a conductive substrate 10 according to the second modified example of this embodiment.

[0091] As shown in FIG. 18, in the second modified example, a through hole 33d is provided in a first-surface second conductive layer 33 in a thickness direction D3 that is a direction perpendicular to the paper surface of FIG.

[0092] According to the second modification, by providing the through-holes 33d in the first-surface second conductive layer 33, the contact area between the first-surface second conductive layer 33 and the first-surface second organic layer 36 and the contact area between the first-surface first organic layer 34 and the first-surface second organic layer 36 can be increased. In addition, since the gas generated in the first-surface first organic layer 34 can be released through the through-holes 33d, it is possible to suppress the first-surface second conductive layer 33 from being subjected to stress in the upward direction D31 due to the gas accumulated at the interface between the first-surface first organic layer 34 and the first-surface second conductive layer 33. This makes it possible to more effectively suppress peeling of the first-surface second conductive layer 33.

[0093] The through holes may be provided in the first-surface third conductive layer 35. By providing the through holes in the first-surface third conductive layer 35, peeling of the first-surface third conductive layer 35 can be more effectively suppressed.

[0094] (Third Modification) Next, a third modified example in which a protrusion is provided at the end of the through hole of the second conductive layer will be described. Fig. 19 is an enlarged plan view showing a conductive substrate 10 according to the third modified example of this embodiment.

[0095] As shown in FIG. 19, the conductive substrate 10 of the third modified example has a plurality of protrusions 33a protruding in a planar direction along the first surface 13 at the inner end 33e of the through hole 33d provided in the first surface second conductive layer 33.

[0096] According to the third modification, by providing the protrusions 33a also on the inner ends 33e of the through holes 33d, it is possible to further increase the contact area between the first-surface second conductive layer 33 and the first-surface second organic layer 36. This makes it possible to more effectively suppress peeling of the first-surface second conductive layer 33.

[0097] (Fourth Modification) Next, a fourth modified example in which the first-surface second conductive layer 33 constitutes a coplanar line will be described. Fig. 20 is a cross-sectional view showing a conductive substrate 10 according to the fourth modified example of this embodiment. Fig. 21 is a cross-sectional view taken along line XXI-XXI of Fig. 20 showing the conductive substrate 10 according to the fourth modified example of this embodiment.

[0098] In the first modified example, an example has been described in which the first surface first conductive layer 31 constitutes a coplanar line among the three conductive layers 31, 33, and 35 on the substrate 12. In contrast, in the fourth modified example, the first surface second conductive layer 33 constitutes a coplanar line.

[0099] 20 and 21, the first-surface second conductive layer 33 has a signal layer 331 and a ground layer 332 adjacent to the signal layer 331 with a gap in the width direction D12. As shown in Fig. 20, the signal layer 331 penetrates the first-surface first organic layer 34 and is connected to the through-electrode 22. As shown in Fig. 21, at the outer end of the ground layer 332, a plurality of convex portions 332a protruding outward in the width direction D12 are periodically positioned along the extension direction D11, which is the direction perpendicular to the paper surface of Fig. 21.

[0100] The first-surface first conductive layer 31 may function as a third ground layer located on the first surface 13 adjacent to the signal layer 331 with a gap therebetween in the downward direction, which is an example of a second direction intersecting the first surface 13. The first-surface third conductive layer 35 may function as a second ground layer.

[0101] According to the fourth modification, even when the first-surface second conductive layer 33 forms a coplanar line, the protrusion 332a can suppress peeling of the ground layer 332.

[0102] (Fifth Modification) Next, a fifth modified example in which the first-surface third conductive layer 35 constitutes a coplanar line will be described. Fig. 22 is a cross-sectional view showing a conductive substrate 10 according to the fifth modified example of this embodiment. Fig. 23 is a cross-sectional view taken along line XXIII-XXIII of Fig. 22 showing the conductive substrate 10 according to the fifth modified example of this embodiment.

[0103] In the fifth modified example, the first-surface third conductive layer 35 constitutes a coplanar line. Specifically, as shown in Figs. 22 and 23, the first-surface third conductive layer 35 has a signal layer 351 and a ground layer 352 adjacent to the signal layer 351 with a gap in the width direction D12. As shown in Fig. 22, the signal layer 351 penetrates the first-surface first organic layer 34 and the first-surface second organic layer 36 and is connected to the through electrode 22. As shown in Fig. 23, at the outer end of the ground layer 352, a plurality of convex portions 352a protruding outward in the width direction D12 are periodically positioned along the extension direction D11, which is a direction perpendicular to the paper surface of Fig. 23.

[0104] According to the fifth modification, even when the first-surface third conductive layer 35 forms a coplanar line, the protrusions 352a can suppress peeling of the ground layer 352.

[0105] (Sixth Modification) Next, a sixth modified example will be described, which has a strip line in which a signal line is sandwiched between ground planes on both sides via an insulating layer. Fig. 24 is a cross-sectional view showing a conductive substrate 10 according to the sixth modified example of this embodiment.

[0106] So far, the examples have been described in which one of the three conductive layers 31, 33, and 35 on the substrate 12 constitutes a coplanar line. In contrast, in the sixth modified example, a strip line is constituted by the three conductive layers 31, 33, and 35 on the substrate 12.

[0107] 24, the conductive substrate 10 has a signal layer 311, and a first-surface first conductive layer 31 and a first-surface third conductive layer 35 that function as ground layers. At the outer ends of the first-surface first conductive layer 31 and the first-surface third conductive layer 35, a plurality of protrusions 31a, 35a protruding outward in the width direction D12 are periodically positioned along the extension direction D11, which is the direction perpendicular to the paper surface of FIG.

[0108] According to the sixth modified example, by having a strip line, the characteristic impedance between the signal layer 311 and the ground layer 31, 35 can be controlled by the line width of the signal layer 311 and the thickness of the organic layers 34, 36. Furthermore, by having a strip line, noise characteristics can be improved compared to the case of having a coplanar line. Furthermore, by having the protrusions 31a, 35a, peeling of the ground layers 31, 35 can be suppressed even when a strip line is configured.

[0109] (Seventh Modification) Next, a seventh modification having a differential transmission line that transmits one piece of data using two signal lines will be described. Fig. 25 is a cross-sectional view showing a conductive substrate 10 according to the seventh modification of this embodiment.

[0110] So far, the conductive substrate 10 has been described as having a single-ended coplanar line or strip line that transmits one piece of data through one signal line. In contrast, the conductive substrate 10 of the seventh modification has a differential transmission line.

[0111] 25, the first-surface second conductive layer 33 has a first signal layer 311A ​​and a second signal layer 311B spaced apart in the width direction D12, and a ground layer 332 spaced apart outward in the width direction D12 from the signal layers 311A ​​and 311B. The first signal layer 311A ​​and the second signal layer 311B divide and transmit one electrical signal. The first-surface first conductive layer 31 and the first-surface third conductive layer 35 may function as ground layers.

[0112] In addition, at the outer ends of the first surface first conductive layer 31, the ground layer 332, and the first surface third conductive layer 35, a plurality of protrusions 31a, 332a, 35a protruding outward in the width direction D12 are positioned periodically along the extension direction D11, which is the direction perpendicular to the paper surface of Figure 25.

[0113] According to the seventh modification, by having a differential transmission line, a signal waveform can be formed with a small voltage. Since a signal waveform can be formed with a small voltage, the signal rise time can be shortened. Since the signal rise time can be shortened, a high frequency electric signal can be appropriately transmitted compared to a single-ended system. Furthermore, by having the protrusions 31a, 332a, and 35a, even when a differential transmission line is configured, peeling of the ground layers 31, 332, and 35 can be suppressed.

[0114] (Eighth Modification) Next, an eighth modification having a capacitor will be described. Fig. 26 is a cross-sectional view showing a conductive substrate 10 according to an eighth modification of this embodiment.

[0115] 26, in the eighth modification, a part of the signal layer 311 configures a capacitor 15 having a metal-insulator-metal (MIM) structure together with a dielectric 32 located on the signal layer 311 and a first-surface second conductive layer 33 located on the dielectric 32. The dielectric 32 contains, for example, a silicon nitride such as SiN.

[0116] It should be noted that various modifications can be made to the above-described embodiment. Below, the modified examples will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, the same reference numerals as those used for the corresponding parts in the above-described embodiment will be used for parts that can be configured in the same manner as in the above-described embodiment, and duplicated descriptions will be omitted. Also, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified examples, the description may be omitted.

[0117] Examples of products equipped with electrode boards 27 is a diagram showing an example of a product in which the conductive substrate 10 according to the embodiment of the present disclosure can be mounted. The conductive substrate 10 according to the embodiment of the present disclosure can be used in various products. For example, the conductive substrate 10 is mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, and the like. [Explanation of symbols]

[0118] 10 Conductive substrate 12 Substrate 311 Signal Layer 312 Ground Layer 312a Convex

Claims

[Claim 1] a substrate having a first surface and a second surface opposite the first surface; a signal layer located on the first surface; a ground layer located on the first surface so as to be adjacent to the signal layer with a gap therebetween, the ground layer having a plurality of protrusions protruding in a planar direction along the first surface over at least a portion of an end portion that does not face the signal layer.

Images