Display device

Abstract

To provide a display device which reduces the number of masks to be used and processes so as to achieve high productivity and which has a high yield.SOLUTION: A pixel transistor and a driving transistor are manufactured on a substrate including an insulating surface in the same process. A pixel electrode electrically connected to the pixel transistor is set as one electrode and the other electrode has fixed potential. Areas superimposed on each other in the pair of electrodes are used for capacity. Thus, the number of masks to be used and processes is reduced so that a display device having high productivity is provided.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. , manufacture, or composition of matter. The present invention relates to, for example, a semiconductor device, a display device, a light-emitting device, a power storage device, and a driving method thereof. In particular, the present invention relates to a semiconductor device having an oxide semiconductor, The present invention relates to a semiconductor device, a display device, or a light-emitting device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This term refers to devices in general, and electro-optical devices, semiconductor circuits, and electronic equipment are all classified as semiconductor devices. [Background technology]

[0003] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely used. In a display device such as a flat panel display, the pixels are arranged in the row and column directions. In the pixel, a transistor which is a switching element and a and a capacitance element connected in parallel to the liquid crystal element. .

[0004] The semiconductor material constituting the semiconductor film of the transistor is amorphous. Silicon semiconductors such as silicon or polysilicon (polycrystalline) are widely used.

[0005] Metal oxides that exhibit semiconductor properties (hereinafter, referred to as oxide semiconductors) are used in transistors. It is a semiconductor material that can be applied to the semiconductor film of the following: zinc oxide or In-Ga-Zn system oxide Techniques for fabricating transistors using nitride semiconductors have been disclosed (Patent Document 1 and Patent Document 2). See patent document 2 and patent document 3. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent Publication 2014-63141 [Patent Document 2] Patent Publication 2014-199402 [Patent Document 3] Patent Publication 2014-199899 Summary of the Invention [Problem to be solved by the invention]

[0007] As the applications of transistors using oxide semiconductor layers become more widespread, the requirements for reliability are becoming more diverse. In view of the above, one embodiment of the present invention is to provide a transistor including an oxide semiconductor layer that can provide stable electrical conductivity. Another object of the present invention is to provide a highly reliable display device having the transistor. One object of the present invention is to provide a display device.

[0008] Another object of the present invention is to provide a display device with high operating speed. One of the objectives is to provide a small display device. It is an object of the present invention to provide a display device with high productivity by reducing the number of steps. An object of the present invention is to provide a display device with high image quality.

[0009] Another object of the present invention is to provide a novel semiconductor device. Another object of the present invention is to provide a module for implementing the semiconductor device or the module. It is an object of the present invention to provide an electronic device having a module.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0011] Pixel transistors and driver transistors are fabricated in the same process on a substrate with an insulating surface. The pixel electrode electrically connected to the pixel transistor is defined as one electrode, and the other electrode is defined as The electrodes are set at a fixed potential, and the area where the pair of electrodes overlap is used as capacitance. This reduces the number of masks used and the number of processes, providing a highly productive display device. Provide.

[0012] The driving transistor has a first gate electrode and a second gate electrode. The electrode is formed in the same process as an electrode at a fixed potential (also called a common electrode).

[0013] One of the configurations of the invention disclosed in this specification is a first transistor on an insulating surface. a first electrode electrically connected to the transistor; a second transistor; The second electrode overlaps the resistor, and the third electrode is at a fixed potential. The first electrode and the third electrode are formed in the same process, and a capacitance is formed by sandwiching an insulating film between the first electrode and the third electrode. The semiconductor device is characterized by the above.

[0014] In the above configuration, the first transistor is a switching element disposed in the pixel portion. The first electrode electrically connected to the first transistor is a pixel electrode. Another embodiment of the present invention is a display module including the display device and a touch sensor. Another embodiment of the present invention is a semiconductor device according to any one of the above structures. Electronic device having the display device or the display module and an operation key or a battery It is.

[0015] In the above structure, the second transistor is a transistor in a driver circuit.

[0016] In the above structure, the first transistor includes a first oxide semiconductor layer and a The second oxide semiconductor layer is in contact with the oxide semiconductor layer.

[0017] In the above structure, the second transistor, which is a transistor of the driver circuit, is made of an oxide The semiconductor device has a stack of semiconductor layers, a first insulating film on a channel formation region, and a second insulating film on the first insulating film. The second gate electrode has a first insulating film on the first gate electrode. The first gate electrode and the common electrode are formed on the first insulating film, and the second gate electrode and the common electrode are formed on the second insulating film. The pixel electrode is provided on the second insulating film.

[0018] In order to increase the capacitance, the film is formed in the same process as the channel formation region of the pixel transistor. The oxide semiconductor film to be formed is made low-resistance, that is, made N-type (N - , N + etc.), then convert it to N-type. When a protective insulating layer (such as a silicon nitride film) is formed in contact with the oxide semiconductor film, the oxide semiconductor film The resistance of the electrode becomes low and it functions as an electrode. The second capacitance is created by this electrode and the electrode at a fixed potential. Form.

[0019] One of the configurations of the invention disclosed in this specification is a first transistor on an insulating surface. a first electrode electrically connected to the transistor; a second transistor; a second electrode overlapping the transistor, a third electrode at a fixed potential, and a third electrode electrically connected to the first electrode. The second electrode and the third electrode are formed in the same process, and the first electrode and the fourth electrode are formed in the same process. The third electrode has a first insulating film sandwiched therebetween to form a first capacitance, and the fourth electrode and the third electrode have a The semiconductor device is characterized in that a second insulating film is sandwiched between the first and second capacitors.

[0020] In the above configuration, the first transistor is a switching element disposed in the pixel portion. The first electrode electrically connected to the first transistor is a pixel electrode.

[0021] In the above structure, the second transistor is a transistor in a driver circuit.

[0022] In the above structure, the first transistor includes a first oxide semiconductor layer and a The second oxide semiconductor layer is in contact with the oxide semiconductor layer.

[0023] In the above structure, the fourth electrode is made of a conductive metal oxide.

[0024] In the above configuration, the first capacitance and the second capacitance partially overlap each other. Since the area where the capacitors 2 overlap also has light transmitting properties, the aperture ratio can be improved. Effect of the Invention

[0025] According to one embodiment of the present invention, a semiconductor device including a transistor including an oxide semiconductor As a result, the fluctuation of the electrical characteristics can be suppressed and the reliability can be improved. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a method for manufacturing a novel semiconductor device can be provided. In one embodiment, a semiconductor device is manufactured at a relatively low temperature and has high reliability. According to one embodiment of the present invention, a novel display device can be provided. It can be provided.

[0026] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0027] [Figure 1] FIG. 1 is a top view illustrating one embodiment of the present invention. [Diagram 2] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. [Diagram 3] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Diagram 5] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device, and a top view illustrating one embodiment of a semiconductor device. [Figure 8] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 10] FIG. 2 is a diagram for explaining a band structure. [Figure 11] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 12] 1A to 1C are diagrams illustrating electronic devices according to one embodiment of the present invention. [Figure 13] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. [Figure 14] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. [Figure 15] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. [Figure 16] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. [Figure 17] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. [Figure 18] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of the present invention. [Figure 19] FIG. 1 is a cross-sectional view showing one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, the embodiments will be described with reference to the drawings. It is possible to carry out the present invention in various forms without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0029] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0030] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the components of the It should be noted that this is added to avoid confusion and is not intended to limit the numbers.

[0031] In addition, in this specification, the words "above" and "below" indicating the position of the components are used. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The above words and phrases are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0032] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) A current flows through the drain, the channel region, and the source. In this specification and the like, the channel region refers to a region through which a current mainly flows. The flow area.

[0033] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0034] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect" This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0035] In this specification and the like, a silicon oxynitride film is a film having a composition containing more oxygen than nitrogen. A silicon oxide film is a film that contains more nitrogen than oxygen. This refers to a film with a high content of.

[0036] In addition, in this specification and the like, when explaining the configuration of the invention using drawings, The reference numerals are used commonly among different drawings.

[0037] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Almost parallel" means that the two straight lines are arranged at an angle of -30° to 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° to 100°. Therefore, it includes the case where the angle is between 85° and 95°. " refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0038] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. .

[0039] In this specification and the like, the terms "film" and "layer" may be used interchangeably. For example, the term "conductive layer" can be used interchangeably with the term "conductive film." ". Alternatively, for example, the term "insulating film" may be used. It may be possible to change the term to "insulating layer."

[0040] (Embodiment 1) In this embodiment, an example of a display device including a transistor will be described with reference to FIGS. The following explanation will be given using 2.

[0041] FIG. 1 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 provided on a first substrate 701 and a source driver 703 provided on the first substrate 701 The circuit section 704 and the gate driver circuit section 706, the pixel section 702, and the source driver circuit section 704 and a sealant 712 arranged to surround the gate driver circuit section 706; and a second substrate 705 disposed opposite to the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are The first substrate 701, the sealant 712, and the second substrate 705 are used for sealing. Although not shown in FIG. 1, a display element is provided between the first substrate 701 and the second substrate 705. do.

[0042] The display device 700 is surrounded by a sealant 712 on the first substrate 701. A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 705 are arranged in a region different from the region. and an FPC terminal portion 708 (FPC: Flexible Printed Circuit portion 706) electrically connected to the In addition, the FPC terminal portion 708 is provided with The FPC 716 is connected to the pixel section 702 and the source driver circuit Various signals are supplied to the pixel section 704 and the gate driver circuit section 706. 02, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section 7 7. Various signals are supplied from the FPC 716. The signals are connected to the pixel section 702, the source driver circuit section 704, the gate It is provided to a driver circuit section 706 and an FPC terminal section 708 .

[0043] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, we use COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0044] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0045] The display device 700 can also include various elements, such as: Liquid crystal elements, EL (electroluminescence) elements (EL elements containing organic and inorganic materials, Organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs ED, etc.), transistors (transistors that emit light according to the current), electron emitters, electron Ink, electrophoretic element, grating light valve (GLV), plasma display (PDP), a display element using MEMS (microelectromechanical systems) Digital Micromirror Device (DMD), Digital MicroShutter MIRASOL (registered trademark), IMOD (Interference Modulation MEMS display elements using the shutter method, MEMS display elements using the optical interference method, Using chromium-based wetting elements, piezoelectric ceramic displays, and carbon nanotubes The electric or magnetic action of these elements causes the The display medium may have a variable contrast, brightness, reflectance, transmittance, etc. An example of a display device using an electron-emitting element is an EL display. An example of the display device used is a field emission display (FED) or S ED type flat panel display (SED: Surface-conduction Electrodes) Display devices using liquid crystal elements. One example is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). (a) Reflective LCD, Direct-view LCD, Projection LCD, etc. An example of a display device using electronic ink or electrophoretic elements is electronic paper. In addition, when realizing a semi-transmissive liquid crystal display or a reflective liquid crystal display, In the above, a part or the whole of the pixel electrode may be made to function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0046] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB form one color element, and different two colors are generated depending on the color element. You can also select colors to configure the color. Or, you can select one or more colors such as yellow, cyan, and magenta for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used in monochrome display devices. The present invention can also be applied to display devices.

[0047] In addition, the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) is white light ( In order to display full color on a display device, a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B) , yellow (Y), etc. can be used in appropriate combination. The color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light in the region may be directly used for display. This reduces the decrease in brightness caused by the colored layer during bright display, reducing power consumption by 20%. However, it may be possible to reduce the amount of light emitted by organic EL elements and inorganic EL elements by about 30%. When using elements to display full color, R, G, B, Y, and white (W) are It is also possible to emit light from an element having a luminescent color. By using a self-luminous element, it is possible to use a colored layer. In some cases, power consumption can be reduced even further than when the

[0048] In this embodiment, a configuration in which a liquid crystal element is used as a display element will be described with reference to FIG. The following description will be given. Note that this is a cross-sectional view taken along the dashed line QR in FIG. This is a configuration using a crystal element.

[0049] The display device 700 shown in FIG. 2 includes a connection section 711, a pixel section 702, and a source driver circuit section. The connection portion 711 includes a connection electrode 777, The pixel portion 702 includes a connection electrode 710 and a conductive film 773. The source driver circuit portion 704 includes a transistor 752 and a capacitor 790. has.

[0050] The transistors 750 and 752 are the same as those shown in the second embodiment, which will be described later in detail. A transistor having a capacitance of 100 .mu.m can be used.

[0051] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a current value in an off state (also called an off-state current value). Therefore, the retention time of an electric signal such as an image signal can be extended. When the power is on, the write interval can be set longer. This reduces the power consumption.

[0052] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver circuit and the driver transistor can be formed on the same substrate. In addition, since it is not necessary to use a semiconductor device formed from a silicon wafer or the like, This allows the number of parts in the device to be reduced. By using a transistor, it is possible to provide a high quality image.

[0053] The capacitor 790 has a structure having a dielectric between a pair of electrodes. A conductive film 772 functioning as a pixel electrode is used as one electrode of the capacitor 790. The other electrode of the transistor 790 is formed in the same process as the gate electrode of the transistor 752. A common electrode 771 is used. In addition, an insulating film 7 is used as a dielectric material sandwiched between the pair of electrodes. Use 68.

[0054] In the case of a transmissive liquid crystal display device, the conductive film 772 and the common electrode 771 are transparent to visible light. It is preferable to use a conductive film that transmits light in visible light. For example, the metal may be one selected from the group consisting of indium (In), zinc (Zn), and tin (Sn). It is preferable to use a material containing

[0055] The common electrode 771 is electrically connected to the capacitance line 709 .

[0056] The connection electrode 710 and the capacitance line 709 are connected to the source and drain electrodes of the transistors 750 and 752. The conductive film that functions as the inner electrode is formed in the same process.

[0057] The connection electrode 710 and the capacitance line 709 are connected to the source electrodes of the transistors 750 and 752 and A conductive film formed in a process different from that of the drain electrode, for example, a conductive film functioning as a gate electrode The connection electrode 710 and the capacitance line 709 may be formed of, for example, a material containing copper. When used, signal delays caused by wiring resistance are reduced, making it possible to display on a large screen.

[0058] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed in the same process as the conductive film that functions as the drain electrode. The terminal of the PC 716 is electrically connected via an anisotropic conductive film 780 .

[0059] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0060] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778. In this embodiment, the structure 778 is provided on the second substrate 705 side. However, the present invention is not limited to this. For example, the structure 778 may be provided on the first substrate 701 side. Alternatively, the structures 778 may be provided on both the first substrate 701 and the second substrate 705. .

[0061] In addition, on the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and A colored film 736 that functions as a color filter, a light-shielding film 738 that is in contact with the colored film 736, and An insulating film 734 is provided.

[0062] The display device 700 shown in FIG. 2 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film 7 The conductive film 774 is disposed on the second substrate 705 side. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 is changed by the voltage applied to the conductive film 774. This allows light transmission or non-transmission to be controlled, making it possible to display an image.

[0063] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is connected to a conductive film that functions as a pixel electrode, That is, it functions as one electrode of the display element.

[0064] Although the display device 700 shown in FIG. 2 is an example of a transmissive color liquid crystal display device, For example, the conductive film 772 may be a conductive film that is reflective to visible light. In that case, a reflective display device may be formed by using the conductive film 77. 2 and displays the light through the colored film 736, which is a so-called reflective color liquid crystal display device. The conductive film having a reflectivity in visible light is, for example, aluminum or silver. It is advisable to use a material containing

[0065] Although not shown in FIG. 2, the conductive films 772 and 774 are in contact with the liquid crystal layer 776. Although not shown in FIG. 2, the polarizing portion Optical members (optical substrates) such as a retardation member, a phase difference member, and an anti-reflection member may be provided as appropriate. For example, a circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. Lights, side lights, etc. may also be used.

[0066] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, For example, a liquid crystal, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. can be used. Depending on the conditions, the liquid crystal material can have a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0067] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent is used in the liquid crystal layer. It has a short response time and is optically isotropic. It also contains a liquid crystal that exhibits a blue phase and a chiral agent. The liquid crystal composition does not require alignment treatment and has little viewing angle dependency. Since the rubbing process is unnecessary, the electrostatic breakdown caused by the rubbing process is eliminated. Therefore, defects and damage to the liquid crystal display device during the manufacturing process can be reduced. do.

[0068] In addition, when liquid crystal elements are used as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero lectric Liquid Crystal) mode, AFLC (AntiFerr Electrochemical Liquid Crystal (ECC) mode can be used. .

[0069] In addition, normally black type liquid crystal display devices, for example, those using a vertical alignment (VA) mode The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode mode, ASV mode, etc. can be used.

[0070] The transistors 750 and 752 have a thin channel formation region. However, there is no particular limitation, and a region of the oxide semiconductor film exposed from the conductive film is not thinned. An example is shown in Figure 13. In Figure 13, the thickness of the channel formation region is almost uniform. In FIG. 13, a transistor 751 and a transistor 753 having the following configuration are illustrated. Since the structure is the same as that shown in FIG. 2 except for the thickness of the channel formation region, a detailed description will not be given here. is omitted.

[0071] (Embodiment 2) An example of a manufacturing process for the transistor 750 shown in FIG. 2 is described below.

[0072] In the following description, a transistor 100 having the same structure as the transistor 750 will be used. 3A to 7A illustrate the fabrication of the transistor 100 shown in FIG. 4A to 4C are cross-sectional views illustrating the manufacturing process.

[0073] First, a conductive film is formed on the substrate 102, and the conductive film is then subjected to a lithography process and an etching process. Then, a conductive film 104 is formed on the conductive film 104. Insulating films 106 and 107 that function as gate insulating films are formed (see FIG. 3A).

[0074] There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 102. Also, a material such as silicon or silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to use a substrate, an SOI substrate, etc., on which a semiconductor element is provided. The substrate 102 may be a glass substrate. When using large area substrates such as 6th generation, 7th generation, 8th generation, 9th generation, and 10th generation, By using such a large-area substrate, a large display device can be manufactured. This is preferable because it is possible to reduce the manufacturing cost.

[0075] In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The release layer is preferably removed from the substrate 102 after a semiconductor device is partially or completely completed thereon. The transistor 100 can be separated and transferred to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0076] In this embodiment, a glass substrate is used as the substrate 102, and a conductive layer that functions as a gate electrode is used. As the conductive film 104, a tungsten film having a thickness of 100 nm is formed by sputtering. In addition, a silicon nitride film having a thickness of 400 nm is formed as the insulating film 106 by the PECVD method. A silicon oxynitride film having a thickness of 50 nm is formed as the insulating film 107 by the PECVD method. .

[0077] The insulating films 106 and 107 functioning as the gate insulating film of the transistor 100 are Plasma Enhanced Chemical Vapor Deposition (PECVD) Silicon oxide is deposited by vapor deposition, sputtering, etc. silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film , hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, oxide Tantalum film, magnesium oxide film, lanthanum oxide film, cerium oxide film and neodymium oxide film Each of the insulating layers may include one or more films.

[0078] Note that the oxide semiconductor film 108 functioning as a channel region of the transistor 100 The insulating film 107 is preferably an oxide insulating film, and has an oxide content in excess of the stoichiometric composition. It is more preferable that the insulating film 1 has a region containing oxygen (an oxygen excess region). The insulating film 107 is capable of releasing oxygen. In order to provide the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Oxygen may be introduced into the insulating film 107 to form an oxygen excess region. These include ion implantation, ion doping, plasma immersion ion implantation, and plasma Zuma processing or the like can be used.

[0079] When hafnium oxide is used as the insulating film 107, the following effects are obtained. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to the case where silicon oxide is used, the thickness of the insulating layer 160 can be made larger, so that the tunnel This reduces the leakage current caused by the current. Furthermore, hafnium oxide having a crystalline structure can be used to realize an amorphous structure. It has a higher relative dielectric constant than hafnium oxide, which has a low off-current. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic. The types are not limited to these.

[0080] The insulating film 106 may have a stacked structure of a silicon nitride film. The insulating film 106 is made of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer laminate structure with a silicon film can be formed. An example of the three-layer laminate structure is as follows: It can be formed as follows:

[0081] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PE-CV was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gas. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency If a power of 2000 W is supplied using a frequency power supply and the thickness is formed to be 50 nm, good.

[0082] For the second silicon nitride film, silane at a flow rate of 200 sccm, The nitrogen gas and the ammonia gas with a flow rate of 2000sccm were used as raw material gases in the PECVD equipment. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency power supply was used. A power of 2000 W may be supplied using the above method to form a film having a thickness of 300 nm.

[0083] The third silicon nitride film was prepared by using silane at a flow rate of 200 sccm and 5000 sccm. The pressure in the reaction chamber was kept at 100 The thickness was measured by controlling the temperature to 50 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power source. It is sufficient to form it so that the thickness is 50 nm.

[0084] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during formation can be 350° C. or less.

[0085] By forming the insulating film 106 in a three-layered structure of silicon nitride films, for example, the conductive film 10 When a conductive film containing copper (Cu) is used for 4, the following effects are achieved.

[0086] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 104. The second silicon nitride film has the function of releasing hydrogen and functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the insulating film. Hydrogen release from the silicon nitride film is small, and hydrogen released from the second silicon nitride film is diffused. can be suppressed.

[0087] The insulating film 107 is an oxide semiconductor film 108 (more specifically, a first In order to improve the interface characteristics with the oxide semiconductor film 108a), It would be preferable if this could be done.

[0088] Next, the oxide semiconductor film 109 is formed over the insulating film 107 at a first temperature. As the oxide semiconductor film 109, a first oxide semiconductor film 109a is formed, and then a second oxide semiconductor film 109b is formed. An oxide semiconductor film 109b is formed (see FIG. 3B).

[0089] The oxide semiconductor film 109 can be formed using the above-mentioned materials. In the case where 109 is an In-M-Zn oxide, the sintered body used for forming the In-M-Zn oxide film is The atomic ratio of the metal elements in the sputtering target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is preferably In:M: Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, I The preferred ranges are n:M:Zn=3:1:2 and In:M:Zn=4:2:4.1. When the semiconductor film 109 is an In-M-Zn oxide, the sputtering target is preferably It is preferable to use a target containing crystalline In-M-Zn oxide. By using a target containing Zn oxide, a crystalline oxide semiconductor film 109 was formed. Note that the atomic ratio of the oxide semiconductor film 109 to be formed is subject to an error and The atomic ratio of the metal elements contained in the sputtering target is ±4. For example, a sputtering target with an atomic ratio of In:Ga: When Zn=4:2:4.1 is used, the atomic ratio of the oxide semiconductor film 109 to be formed is I In some cases, the n:Ga:Zn ratio is approximately 4:2:3.

[0090] The first temperature for forming the oxide semiconductor film 109 is preferably equal to or higher than room temperature and lower than 340° C. Preferably, the temperature is from room temperature to 300° C., more preferably from 100° C. to 250° C., and even more preferably The temperature is 100° C. or higher and 200° C. or lower. The crystallinity of the oxide semiconductor film 109 can be improved. When a glass substrate (for example, 6th generation to 10th generation) is used, the first temperature is 150° C. If the temperature is set to 340° C. or higher and lower than 340° C., the substrate 102 may be distorted. In the case of using the glass, the first temperature is set to 100° C. or more and less than 150° C. Distortion of the substrate can be suppressed.

[0091] Note that the first oxide semiconductor film 109a and the second oxide semiconductor film 109b were formed under the same conditions. The plate temperatures may be the same or different. The substrate temperature of the oxide semiconductor film 109b in the second embodiment is set to be the same as that of the oxide semiconductor film 109b in the first embodiment, thereby reducing manufacturing costs. This is preferable because it is possible to

[0092] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio]) by a sputtering method to form a first oxide semiconductor film 10 9a is deposited, and then, in vacuum, an In-Ga-Zn metal oxide target (In :Ga:Zn=1:1:1.2 [atomic ratio]) was used to form the second The oxide semiconductor film 109b is formed. The substrate temperature during deposition of the compound semiconductor film 109b is set to 170°C.

[0093] When the oxide semiconductor film 109 is formed by a sputtering method, a sputtering gas In the case of the above, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen is appropriately used. In the case of a mixed gas, it is preferable to increase the ratio of oxygen to rare gas. It is also necessary to increase the purity of the sputtering gas. For example, oxygen used as a sputtering gas The gas or argon gas has a dew point of -40°C or less, preferably -80°C or less, and more preferably By using gas that has been highly purified to temperatures below -100℃, and more preferably below -120℃, This can prevent moisture and the like from being absorbed into the oxide semiconductor film 109 as much as possible.

[0094] In addition, when the oxide semiconductor film 109 is formed by a sputtering method, The chamber is designed to remove water and other impurities that may be contained in the oxide semiconductor film 109 as much as possible. In order to remove the gas, a high vacuum (5×10 -7 Pa to 1×10 -4 It is preferable to evacuate the gas to a temperature of about 10 Pa. A combination of a filter and a cold trap is used to extract gas, especially carbon or water, from the exhaust system into the chamber. It is preferable to prevent backflow of oxygen-containing gas.

[0095] Subsequently, the oxide semiconductor film 109 is processed to form an island-shaped oxide semiconductor film 108. Note that the first oxide semiconductor film 109a is an island-shaped first oxide semiconductor film 108a, and the second oxide semiconductor film 109b is an island-shaped first oxide semiconductor film 108a. The oxide semiconductor film 109b becomes an island-shaped second oxide semiconductor film 108b (see FIG. 3C). see).

[0096] For example, the first oxide semiconductor film 108a may be formed using the above-mentioned In:M:Zn=2:1:3 , In:M:Zn=3:1:2, In:M:Zn=4:2:4.1, etc. The first oxide semiconductor film 108a may be formed using In :M:Zn=4:α1(1.5≦α1≦2.5):α2(2.5≦α2≦3.5) [atomic It is preferably a [number ratio].

[0097] Further, as the second oxide semiconductor film 108b, the above-mentioned In:M:Zn = 1:1:1, It may be formed using a sputtering target such as In:M:Zn = 1:1:1.2. Preferably, the second oxide semiconductor film 108b has an atomic ratio of In:M:Zn = 1:β1 (0.8 ≤ β1 ≤ 1.2):β2 (0.8 ≤ β2 ≤ 1.2). Note that Regarding the atomic ratio of the metal elements of the sputtering target used for the second oxide semiconductor film 108b it is not necessary to satisfy In ≥ M and Zn ≥ M, and a composition satisfying In ≥ M and Zn < M is also acceptable.

[0098] Also, for example, as the first oxide semiconductor film 108a, sputtering targets such as In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, etc. can be used for formation.

[0099] Also, the oxide semiconductor film 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. Thus, by using an oxide semiconductor with a wide energy gap, the off-current of the transistor 100 can be reduced. Specifically, for the first oxide semiconductor film 108a, an oxide semiconductor film with an energy gap of 2 eV or more, preferably 2 eV or more and 3.0 eV or less is used, and for the second oxide semiconductor film 108b, using an oxide semiconductor film with an energy gap of 2.5 eV or more and 3.5 eV or less is preferable. Also, it is preferable that the energy gap of the second oxide semiconductor film 108b is larger than that of the first oxide semiconductor film 108a.

[0100] The thicknesses of the first oxide semiconductor film 108a and the second oxide semiconductor film 108b are Each of them is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably Or, the thickness should be 3 nm or more and 50 nm or less.

[0101] The first oxide semiconductor film 108a is an oxide semiconductor film with low carrier density. For example, the first oxide semiconductor film 108a has a carrier density of 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 The second oxide semiconductor film 10 The second oxide semiconductor film 8b is formed of a low carrier density oxide semiconductor film. The body membrane 108b has a carrier density of 1×10 17 / cm 3 Less than or equal to 1×10 15 / cm 3 Less than 1×10, more preferably 13 / cm 3 Less than or equal to 1×10 11 / cm 3 The following would suffice.

[0102] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, The carrier density, impurity concentration, defect density, metal element and oxygen atoms of the oxide semiconductor film 108b It is preferable to make the numerical ratio, interatomic distance, density, etc. appropriate.

[0103] Note that the first oxide semiconductor film 108a and the second oxide semiconductor film 108b are By using an oxide semiconductor film having a low impurity concentration and a low density of defect states, This is preferable because it allows the fabrication of a transistor with excellent electrical characteristics. The term "high purity intrinsic or substantially intrinsic" refers to a material with a low oxygen concentration and a low defect level density (low oxygen vacancies). A highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film is called a highly pure intrinsic oxide semiconductor film. Since the number of rear generation sources is small, the carrier density can be reduced. A transistor in which a channel region is formed in a semiconductor film has a negative threshold voltage. In addition, it is rare for the material to have a normally-on characteristic. Since the density of defect states in an oxide semiconductor film, which is essentially highly pure and intrinsic, is low, the density of trap states is also low. In addition, the oxide semiconductor film having a high purity intrinsic or substantially high purity intrinsic property may have a low conductivity. has a significantly smaller off-state current and a channel width of 1×10 6 μm and the channel length L is 10 μm. Even for elements, the voltage between the source and drain electrodes (drain voltage) is 1V to 10V In the range of 1, the off-state current is below the measurement limit of the semiconductor parameter analyzer, that is, 1 ×10 -13 It is possible to obtain a characteristic of A or less.

[0104] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film is provided with a channel. The transistors in which the regions are formed have small variations in electrical characteristics and are highly reliable. Note that charges trapped in the trap states of the oxide semiconductor film are dissipated. It takes a long time for the charge to reach a certain level, and it may behave as if it were a fixed charge. A transistor in which a channel region is formed in an oxide semiconductor film with a high density of trap states has a high current density. Impurities include hydrogen, nitrogen, alkali metals, or Alkaline earth metals, etc.

[0105] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In this case, oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters the electron carrier, it can generate electrons. It can combine with oxygen, which combines with metal atoms, to generate electrons, which are carriers. A transistor using an oxide semiconductor film containing hydrogen has normally-on characteristics. For this reason, it is preferable that the amount of hydrogen in the oxide semiconductor film 108 be reduced as much as possible. Specifically, in the oxide semiconductor film 108, a hydrogen concentration obtained by SIMS analysis is Degrees, 2 x 10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than or equal to 5×1, more preferably 0 17 atoms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 below Let us assume that.

[0106] Subsequently, the insulating film 10 is formed without performing a process at a temperature higher than the first temperature. A conductive film 112 which becomes a source electrode and a drain electrode is formed on the oxide semiconductor film 108. It is formed by a sputtering method (see FIG. 4(A)).

[0107] The conductive film 104 functions as a gate electrode, and the conductive film 112a functions as a source electrode. The conductive film 112b functioning as the drain electrode is made of chromium (Cr), copper (Cu ), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo ), Tantalum (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Ni A metal element selected from nickel (Ni), iron (Fe), and cobalt (Co), or the above-mentioned gold The alloys are made of metal elements or alloys combining the above-mentioned metal elements. It can be achieved.

[0108] The conductive films 104, 112a, and 112b may have a single-layer structure or a laminated structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, titanium on an aluminum film, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, a titanium nitride film A two-layer structure in which a tungsten film is laminated on top of a tantalum nitride film or a tungsten nitride film A two-layer structure in which a tungsten film is laminated, a titanium film, and an aluminum film is laminated on the titanium film. There are three-layer structures, such as a titanium film on top of an aluminum film. Select from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made by combining one or more of these may be used.

[0109] The conductive films 104, 112a, and 112b are made of indium tin oxide or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light transmitting properties, such as indium tin oxide doped with silicon oxide, is used. It is also possible.

[0110] The conductive films 104, 112a, and 112b are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. This allows processing using a wet etching process, which reduces manufacturing costs. It becomes possible.

[0111] In this embodiment, the conductive film 112 is a tungsten film having a thickness of 50 nm and a SiO 2 film having a thickness of 40 A laminate film in which a SiO2 film and a 0 nm aluminum film are laminated in this order is formed by sputtering. In this embodiment, the conductive film 112 has a two-layered structure, but the present invention is not limited to this. For example, the conductive film 112 may be a tungsten film having a thickness of 50 nm and a 400 nm thick The aluminum film with a thickness of 100 nm and the titanium film with a thickness of 100 nm were laminated in this order. You may do so.

[0112] Subsequently, masks 136a and 136b are formed in desired regions on the conductive film 112 (FIG. 4(B)).

[0113] In this embodiment, a photosensitive resin film is applied onto the conductive film 112, and the photosensitive resin The film is patterned by a lithography process to form masks 136a and 136b. do.

[0114] Subsequently, the conductive film 112 is etched with the masks 136a and 136b on the conductive film 112. By selectively removing the conductive film 112 using the etchant 138, the conductive film 112 is separated from each other. Separated conductive films 112a and 112b are formed (see FIG. 4C).

[0115] In this embodiment, the conductive film 112 is processed using a dry etching apparatus. However, the method for forming the conductive film 112 is not limited to this. For example, By using a chemical solution for the hole 138, the conductive film 112 is processed using a wet etching device. Note that, rather than processing the conductive film 112 using a wet etching apparatus, A finer pattern can be formed by processing the conductive film 112 using a dry etching device. On the other hand, the conductive film 112 can be processed by using a dry etching apparatus. In addition, the manufacturing cost can be reduced by processing the conductive film 112 using a wet etching apparatus. It is possible.

[0116] Subsequently, a mask is formed on the second oxide semiconductor film 108b and the conductive films 112a and 112b. 136a, 136b, a second acid is formed by using an etchant 139. The surface (back channel side) of the compound semiconductor film 108b is cleaned (see FIG. 5(A)).

[0117] In addition, during the formation of the conductive films 112a and 112b and / or during the above-mentioned cleaning process, The region of the oxide semiconductor film 108b that is exposed from the conductive films 112a and 112b is a first oxide semiconductor film. In some cases, the thickness of the insulating film 104 may be thinner than that of the semiconductor film 108a.

[0118] In addition, when forming the conductive films 112a and 112b and / or in the above-mentioned cleaning process, The oxide semiconductor film 108b is not thinned in a region exposed from the conductive films 112a and 112b. There are cases like this.

[0119] Next, the masks 136a and 136b are removed, so that the second oxide semiconductor film 108b is left The conductive film 112a serving as a source electrode of the second oxide semiconductor film 108b and the drain electrode of the second oxide semiconductor film 108b are A conductive film 112b functioning as an in-electrode is formed. The semiconductor device has a stacked structure of a first oxide semiconductor film 108a and a second oxide semiconductor film 108b. (See FIG. 5(B)).

[0120] In addition, a chemical solution was sprayed onto the second oxide semiconductor film 108b and the conductive films 112a and 112b. The surface (back channel side) of the second oxide semiconductor film 108b may be cleaned by applying the solution. The cleaning method may be, for example, cleaning with a chemical solution such as phosphoric acid. By cleaning with a chemical solution, impurities attached to the surface of the second oxide semiconductor film 108b are removed. (For example, elements contained in the conductive films 112a and 112b) can be removed. However, the washing is not necessarily required, and in some cases, washing may not be performed.

[0121] In addition, during the formation of the conductive films 112a and 112b and / or during the above-mentioned cleaning process, The oxide semiconductor film 108b has a second region having a smaller thickness than the first oxide semiconductor film 108a. A region is formed.

[0122] Next, the insulating films 114 and 112 are formed over the oxide semiconductor film 108 and the conductive films 112a and 112b. Form 6.

[0123] After the insulating film 114 is formed, the insulating film 116 is successively formed without exposing it to the air. After the insulating film 114 is formed, it is preferable to adjust the flow rate, pressure, and temperature of the source gas without exposing the insulating film 114 to the air. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 116 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 114 and the insulating film 116. At the same time, oxygen contained in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108. As a result, the amount of oxygen vacancies in the oxide semiconductor film 108 can be reduced.

[0124] For example, a silicon oxynitride film is formed as the insulating film 114 by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, etc. Examples of oxidizing gases include nitrous oxide, nitrous oxide, and trisilane. In addition, the flow rate of the oxidizing gas is set to 20 times or more the flow rate of the deposition gas. The pressure in the treatment chamber is set to less than 100 times, preferably 40 times or more and 80 times or less, and the pressure in the treatment chamber is set to less than 100 Pa. By using the PECVD method at a pressure of 50 Pa or less, preferably 50 Pa or less, the insulating film 114 is The insulating film contains the above and has a small amount of defects.

[0125] In this embodiment, the insulating film 114 is formed by heating the substrate 102 at a temperature of 220° C. The source gases were silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm. The pressure in the treatment chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6×10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using this.

[0126] The insulating film 116 is formed by depositing a substrate in a vacuum-evacuated processing chamber of a PECVD apparatus. The temperature is kept at 180°C or higher and 350°C or lower, and the raw material gas is introduced into the treatment chamber to increase the pressure in the treatment chamber. is set to 100 Pa or more and 250 Pa or less, and more preferably set to 100 Pa or more and 200 Pa or less. 0.17 W / cm2 at the electrode installed in the treatment chamber 2 More than 0.5W / cm 2 Below are some more Preferably 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are met: In this way, a silicon oxide film or a silicon oxynitride film is formed.

[0127] The conditions for forming the insulating film 116 are as follows: high frequency power density in a reaction chamber with the above pressure; By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 116 becomes lower than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Since the oxygen in the film is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An oxide that contains more oxygen than satisfies the theoretical composition and loses some of the oxygen when heated. An insulating film can be formed.

[0128] The process of forming the insulating film 116 is carried out in a PECVD apparatus at a temperature of 180° C. to 350° C. The insulating film 116 is formed during the manufacturing process of the transistor 100. It is preferable that the temperature in the process is the highest. For example, the temperature at which the insulating film 116 is formed is set to 350° C. By carrying out the above steps, it is possible to form the transistor 100 directly on a flexible substrate, etc. .

[0129] In the step of forming the insulating film 116, the insulating film 114 serves as a protection film for the oxide semiconductor film 108. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 108. The insulating film 116 can be formed using high radio frequency power.

[0130] In the deposition conditions for the insulating film 116, a deposition gas containing silicon is mixed with an oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the amount of defects in the insulating film 116. In the first place, ESR measurements revealed that the g value was 2.001, which is due to the dangling bonds of silicon. The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5×10 17 spins / cm 3 The following is a missing It is possible to form an oxide insulating layer with fewer defects. As a result, the reliability of the transistor is improved. It can be done.

[0131] In addition, after the insulating films 114 and 116 are formed (in other words, after the insulating film 116 is formed and Heat treatment may be performed before the formation of the barrier film 131 of the insulating film 1. The nitrogen oxides contained in 14 and 116 can be reduced. Then, part of the oxygen contained in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108, and the oxide semiconductor film 108 is oxidized. Therefore, the amount of oxygen vacancies in the semiconductor film 108 can be reduced.

[0132] When the heat treatment is performed, the temperature of the heat treatment for the insulating films 114 and 116 is typically 400 ° C., preferably less than 375 ° C., more preferably 150 ° C. or more and less than 360 ° C., The preferred temperature is 150° C. to 350° C. The heat treatment is carried out in an atmosphere of nitrogen, oxygen, or ultra-dry air. (Water content is 20ppm or less, preferably 1ppm or less, preferably 10ppb or less) The reaction may be carried out in an atmosphere of nitrogen (air) or rare gas (argon, helium, etc.). The heating process is preferably carried out in the presence of nitrogen, oxygen, ultra-dry air, or rare gases that do not contain hydrogen, water, etc. For the treatment, an electric furnace, an RTA device, etc. can be used.

[0133] In the step of forming the transistor 100, the temperature at which the insulating film 116 is formed is The temperature at which the insulating film 116 is formed may be set to a high value. You may go.

[0134] Next, a first barrier film 131 is formed on the insulating film 116 (see FIG. 5(C)).

[0135] The first barrier film 131 is made of oxygen and a metal (indium, gallium, zinc, titanium, aluminum, etc.). At least one selected from the group consisting of aluminum, tungsten, tantalum, and molybdenum. (above) and.

[0136] The first barrier film 131 can be formed by using a sputtering method. When the first barrier film 131 is thin, it is possible to suppress oxygen that may be released from the insulating film 116 to the outside. On the other hand, if the first barrier film 131 is thick, the insulating film 116 may become difficult to cover. Therefore, the thickness of the first barrier film 131 and the It is preferable that the thickness is 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less. Examples of the barrier film 131 include a tantalum oxide nitride film, a titanium oxide film, and an indium tin film. Oxide (hereinafter also referred to as ITO) film, aluminum oxide film, oxide semiconductor film (e.g., IG A ZO film (In:Ga:Zn=1:4:5 (atomic ratio)) can be used. In this embodiment, the first barrier film 131 is an insulator film having a thickness of 5 nm and containing silicon oxide. The material used is indium tin oxide (hereinafter referred to as ITSO).

[0137] Next, the insulating films 114 and 116 and the oxide semiconductor film 108 are formed with the first barrier film 131 interposed therebetween. In FIG. 6A, oxygen 140 is added to the insulating films 114 and 11 The oxygen added to 6 is represented diagrammatically as oxygen 140a.

[0138] The insulating films 114 and 116 and the oxide semiconductor film 108 are exposed to oxygen through the first barrier film 131. The method of adding 140 includes ion doping, ion implantation, plasma treatment, etc. In addition, when oxygen 140 is added, applying a bias to the substrate side can effectively Oxygen 140 can be added to the insulating films 114 and 116 and the oxide semiconductor film 108. The bias voltage is, for example, 1 W / cm 2 More than 5W / cm 2 If we use the following By providing a first barrier film 131 on the insulating film 116 and adding oxygen, The rear film 131 functions as a protective film that suppresses oxygen from being released from the insulating film 116 . For this reason, more oxygen is added to the insulating films 114 and 116 and the oxide semiconductor film 108. It is possible.

[0139] The first barrier film 131 may be made of aluminum oxide, hafnium oxide, or an IGZO film. Or, when yttrium oxide is formed by sputtering, the sputtering gas is It is preferable that the first barrier film 131 contains at least oxygen. By using oxygen as the targeting gas, the oxygen becomes oxygen radicals in the plasma, Either or both of oxygen and oxygen radicals are added to the insulating film 116. Therefore, the step of adding oxygen 140 shown in FIG. In other words, when the first barrier film 131 is formed, oxygen addition processing and It is possible to simultaneously form the first barrier film 131. During deposition of the rear film (especially in the early stage of deposition), the first barrier has the function of adding oxygen. After the rear film 131 is formed, it has a function of blocking oxygen.

[0140] Next, the first barrier film 131 is removed by an etchant 141 (see FIG. 6(B)). ).

[0141] The first barrier film 131 can be removed by dry etching or wet etching. or a combination of dry etching and wet etching. In the case of the dry etching method, the etchant 141 is an etching gas. In the case of wet etching, the etchant 141 is a chemical liquid. In this embodiment, the first barrier film 131 is removed by wet etching.

[0142] Next, the insulating film 118 is formed over the insulating film 116 (see FIG. 7A).

[0143] Note that a heat treatment is performed before or after the insulating film 118 is formed to obtain an insulating film. Excess oxygen contained in the films 114 and 116 is diffused into the oxide semiconductor film 108, and the oxide semiconductor Alternatively, the insulating film 118 can be formed by heating and filling the oxygen vacancies in the insulating film 108. By this, excess oxygen contained in the insulating films 114 and 116 is diffused into the oxide semiconductor film 108. Thus, oxygen vacancies in the oxide semiconductor film 108 can be filled.

[0144] When the insulating film 118 is formed by the PECVD method, the substrate temperature is set to 180° C. or higher and 350° C. or lower. This is preferable because it allows a dense film to be formed.

[0145] For example, when a silicon nitride film is formed as the insulating film 118 by the PECVD method, the silicon It is preferable to use a deposition gas containing carbon, nitrogen, and ammonia as the source gas. By using a small amount of ammonia compared to nitrogen, ammonia dissociates in the plasma and becomes active. The active species are generated by reacting with silicon and hydrogen contained in the deposition gas containing silicon. This breaks the triple bond between silicon and nitrogen, promoting the bonding of silicon and nitrogen. To form a dense silicon nitride film with few bonds between silicon and hydrogen and few defects. On the other hand, if the amount of ammonia relative to nitrogen is large, the deposition gas containing silicon and Nitrogen decomposition does not progress, silicon and hydrogen bonds remain, defects increase, and roughness is generated. For these reasons, the source gas should be ammonia-free. The flow rate ratio of nitrogen to oxygen is preferably 5 or more and 50 or less, and more preferably 10 or more and 50 or less.

[0146] In this embodiment, the insulating film 118 is formed by depositing silane, nitrogen, etc., using a PECVD apparatus. A silicon nitride film having a thickness of 50 nm is formed using nitrogen and ammonia as raw materials. The flow rate is such that silane is 50 sccm, nitrogen is 5000 sccm, and ammonia is 100 scc cm. The pressure in the processing chamber is 100 Pa, the substrate temperature is 350 °C, and 1000 W of high-frequency power is supplied to the parallel plate electrodes using a 27.12 MHz high-frequency power supply. The PECVD apparatus is a parallel plate type PECVD apparatus with an electrode area of 6000 cm 2 . When the supplied power is converted to power per unit area (power density), it is 1.7×10 W / cm -1 . 2

[0147] Further, after the formation of the insulating film 118 that functions as the second barrier film, a heat treatment (at a temperature of 400 °C ) may be performed. Note that by the heat treatment before the formation of the insulating film 118 or the heat treatment after the formation of the insulating film 11 8, excess oxygen or oxygen radicals contained in the insulating film 116 are diffused into the oxide semiconductor film 108 to compensate for oxygen deficiencies in the oxide semiconductor film 108 . Alternatively, by forming the insulating film 118 by heat deposition, excess oxygen or oxygen radicals contained in the insulating film 116 are diffused into the oxide semiconductor film 108 to compensate for oxygen deficiencies in the oxide semiconductor film 1 08.

[0148] The transistor 100 shown in FIG. 7(B) can be formed by the above steps. FIG. 7(B ) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X1-X2 shown in FIG. 7(C) and a cross-sectional view of the cut surface between the dashed-dotted line Y 1-Y2.

[0149] Also, in FIG. 7(C), to avoid complexity, a part of the constituent elements of the transistor 100 (such as the insulating film that functions as the gate insulating film) is omitted in the illustration. Also, one ​​​​The direction of the dashed dotted line X1-X2 is called the channel length direction, and the direction of the dashed dotted line Y1-Y2 is called the channel width direction. In addition, the top view of the transistor is also referred to as FIG. As in (C), some of the components may be omitted in the illustration.

[0150] The oxide semiconductor film of the transistor 100 has a stacked structure. The band structures of the semiconductor film 108 and the insulating film in contact with the oxide semiconductor film 108 are shown in FIG. Let's explain using 0.

[0151] FIG. 10 shows an insulating film 107, a first oxide semiconductor film 108a, a second oxide semiconductor film 10 8b, and the insulating film 114. For ease of understanding, the band structure is shown in FIG. The energy level (Ec) at the bottom of the conduction band of the oxide semiconductor film 108b and the insulating film 114 in Shows.

[0152] In the band structure shown in FIG. 10, the insulating films 107 and 114 are made of silicon oxide. The first oxide semiconductor film 108a was formed by using a metal element atomic ratio of In:Ga:Zn. The oxide semiconductor film was formed using a metal oxide target having a ratio of 4:2:4.1. The oxide semiconductor film 108b of No. 2 has an atomic ratio of metal elements of In:Ga:Zn=1:1:1. 1 is a band diagram of a structure using a metal oxide film formed using a metal oxide target of .2. do.

[0153] As shown in FIG. 10, a first oxide semiconductor film 108a and a second oxide semiconductor film 10 In 8b, the energy level at the bottom of the conduction band changes smoothly. In other words, In other words, the band structure changes to a continuous junction. At the interface between the first oxide semiconductor film 108a and the second oxide semiconductor film 108b, Assume that there are no impurities that form defect levels such as trap centers or recombination centers. .

[0154] A continuous junction is formed between the first oxide semiconductor film 108a and the second oxide semiconductor film 108b. In order to achieve this, a multi-chamber deposition system (sputtering system) equipped with a load lock chamber is required. The films can be laminated in succession using a lamination apparatus without exposing them to the air.

[0155] With the structure shown in FIG. 10, the first oxide semiconductor film 108a serves as a well. In the transistor using the above stacked structure, the channel region is formed of the first oxide semiconductor film 1. It can be seen that it is formed in 08a.

[0156] In the case where the second oxide semiconductor film 108b is not formed, the first oxide semiconductor film 108 A trap level may be formed in a. On the other hand, by forming the above-mentioned layered structure, the trap The trap level can be formed in the second oxide semiconductor film 108b. This allows the trap levels to be separated from the conductive film 108a.

[0157] In addition, the trap states in the first oxide semiconductor film 108a function as a channel region. The energy level of the lower band edge (Ec) can be farther from the vacuum level, resulting in a trap level. Electrons tend to accumulate in the trap level. This becomes a fixed charge, and the threshold voltage of the transistor shifts in the positive direction. Therefore, the trap level is lower than the energy level (E c) It is preferable to use a structure closer to the vacuum level. This makes it difficult for electrons to accumulate in the top level, making it possible to increase the on-state current of the transistor. At the same time, the field effect mobility can be increased.

[0158] In addition, in FIG. 10, the second oxide semiconductor film 108b is a first oxide semiconductor film 10 The energy level of the conduction band minimum is closer to the vacuum level than that of 8a, and is typically the first oxide semiconductor. The energy level of the conduction band minimum of the conductive film 108a and the conduction band minimum of the second oxide semiconductor film 108b are The difference between the energy level at the lower band edge is 0.15 eV or more, or 0.5 eV or more and 2e V or less, or 1 eV or less. a difference between the electron affinity of the first oxide semiconductor film 108a and the electron affinity of the first oxide semiconductor film 108a is 0.15 eV or more; The electron transport intensity is 0.5 eV or more and 2 eV or less, or 1 eV or less.

[0159] With such a structure, the first oxide semiconductor film 108a serves as a main path for current. The second oxide semiconductor film 108b functions as a channel region. The first oxide semiconductor film 108a in which the oxide semiconductor region is formed is made of one or more metal elements. Since the first oxide semiconductor film 108a and the second oxide semiconductor film At the interface with 108b, interfacial scattering is unlikely to occur. Since the movement of the ions is not hindered, the field effect mobility of the transistor is increased.

[0160] In addition, the second oxide semiconductor film 108b is prevented from functioning as part of a channel region. In order to prevent the second oxide semiconductor from being damaged, a material having a sufficiently low electrical conductivity is used. The film 108b has a first electron affinity (a difference between the vacuum level and the energy level at the bottom of the conduction band). The energy level of the conduction band minimum is smaller than that of the oxide semiconductor film 108a. A material having a difference (band offset) with respect to the conduction band minimum energy level of the semiconductor film 108a is used. In addition, a difference in threshold voltage occurs depending on the magnitude of the drain voltage. In order to suppress this, the energy level of the conduction band minimum of the second oxide semiconductor film 108b is set to A material whose energy level is closer to the vacuum level than the conduction band minimum of the first oxide semiconductor film 108a For example, the energy of the conduction band minimum of the second oxide semiconductor film 108b is preferably The difference between the energy level of the first oxide semiconductor film 108a and the energy level of the bottom of the conduction band of the first oxide semiconductor film 108a is 0. It is preferable to set the value to 2 eV or more, and more preferably 0.5 eV or more.

[0161] In addition, the second oxide semiconductor film 108b does not include a spinel crystal structure. In the case where the second oxide semiconductor film 108b contains a spinel crystal structure, At the interface between the spinel type crystal structure and other regions, the structures of the conductive films 112a and 112b In some cases, the composition element may diffuse into the first oxide semiconductor film 108a. When the organic semiconductor film 108b is a CAAC-OS film, which will be described later, the conductive films 112a and 112b This is preferable because it enhances the blocking properties of the constituent elements, for example, copper element.

[0162] The thickness of the second oxide semiconductor film 108b is determined by the fact that the constituent elements of the conductive films 112a and 112b are the same as those of the second oxide semiconductor film 108b. the thickness of the insulating film 108b is greater than or equal to the thickness at which the insulating film 108b can be prevented from diffusing into the oxide semiconductor film 108b. The thickness of the insulating film 114 is set to be less than the thickness at which oxygen supply to the oxide semiconductor film 108b is suppressed. For example, when the thickness of the second oxide semiconductor film 108b is 10 nm or more, the conductive films 112a and 112b are The diffusion of the constituent elements of the oxide semiconductor film 12b into the first oxide semiconductor film 108a can be suppressed. When the thickness of the second oxide semiconductor film 108b is 100 nm or less, the insulating film 114 Therefore, oxygen can be effectively supplied from the oxide semiconductor film 116 to the first oxide semiconductor film 108a. The thickness of the second oxide semiconductor film 108b is set to be 100% when the conductive films 112a and 112b are formed. Alternatively, when the conductive films 112a and 112b are formed and then washed, a part of them is etched, and the above For example, the thickness of the second oxide semiconductor film 108b may be set to 10 nm or less. In this case, the second oxide semiconductor film in a region where the conductive films 112a and 112b are not provided The thickness of 108b may be 3 nm or more and less than 10 nm.

[0163] An example of a manufacturing process of the transistor 752 shown in FIG. The gate electrode 752 has a structure including gate electrodes above and below a stack of oxide semiconductor layers.

[0164] In the following description, a transistor 170 having the same structure as the transistor 752 will be used. 9A to 9C illustrate the fabrication of the transistor 170 shown in FIG. The process for manufacturing the transistor 170 is the same as that for the transistor 100. The process is almost the same except that a step of providing a second gate electrode above the gate electrode is added. Therefore, a detailed description will be omitted.

[0165] The transistor 170 includes a conductive film 104 over a substrate 102, the conductive film 104 serving as a first gate electrode. an insulating film 106 on the substrate 102 and the conductive film 104; and an insulating film 107 on the insulating film 106. The oxide semiconductor film 108 over the insulating film 107 and the insulating film 108 electrically connected to the oxide semiconductor film 108 The conductive film 112a serving as a source electrode and the oxide semiconductor film 108 are electrically connected to The conductive film 112b serving as a drain electrode and the insulating film 112a over the oxide semiconductor film 108 are 14, an insulating film 116 on the insulating film 114, a conductive film 120a on the insulating film 116, and an insulating film The insulating film 118 is formed on the conductive film 120a. The gate insulating film 14 and the gate insulating film 116 function as a second gate insulating film of the transistor 170. The conductive film 120a is electrically connected to the conductive layer 120b through an opening 142c provided in the insulating films 114 and 116. The conductive film 120a is electrically connected to the film 112b. The transistor 170 may be formed in the same process as the pixel electrode. The film 120b functions as a second gate electrode (also called a backgate electrode).

[0166] As shown in FIG. 8B, the conductive film 120b is formed by insulating films 106, 107, 114, and 1 In the openings 142a and 142b in the first gate electrode 16, The conductive film 120b is connected to the conductive film 104. Therefore, the conductive film 120b and the conductive film 104 are applied with the same potential. can be obtained.

[0167] In this embodiment, openings 142a and 142b are provided, and the conductive film 120b and Although the configuration in which the conductive film 104 is connected has been illustrated, the present invention is not limited to this. Only one of the openings 142a and 142b is formed, and the conductive film 120b and The conductive film 104 is connected, or the openings 142a and 142b are not provided, and the conductive film 104 is not connected. The conductive film 120b and the conductive film 104 may not be connected to each other. In the case where the conductive film 104 is not connected, the conductive film 120b and the conductive film 104 are each provided with different It is possible to apply a voltage to the

[0168] As shown in FIG. 8B, the oxide semiconductor film 108 functions as a first gate electrode. The conductive film 104 functions as a second gate electrode, and the conductive film 120b functions as a second gate electrode. The second gate electrode is sandwiched between two conductive films that function as gate electrodes. The length in the channel length direction and the length in the channel width direction of the conductive film 120b functioning as a gate electrode are The length is larger than the length of the oxide semiconductor film 108 in the channel length direction and the length of the oxide semiconductor film 108 in the channel width direction. The oxide semiconductor film 108 is entirely connected to the conductive film 12 via the insulating films 114 and 116. The conductive film 120b serving as the second gate electrode and the conductive film 120b serving as the first gate electrode are covered with the conductive film 120b. The conductive film 104 functioning as a gate electrode is provided on the insulating films 106, 107, 114, and 116. Since the oxide semiconductor film 108 is connected through the openings 142a and 142b, The side surface in the channel width direction functions as a second gate electrode via insulating films 114 and 116. It faces the conductive film 120b.

[0169] In other words, in the channel width direction of the transistor 170, The conductive film 104 functioning as the second gate electrode and the conductive film 120b functioning as the second gate electrode form a gate insulating film. Insulating films 106 and 107 functioning as insulating films and an insulating film functioning as a second gate insulating film 114 and 116 are connected through openings, and serve as a first gate insulating film. The insulating films 106 and 107 function as the first gate insulating film and the insulating films 114 and 115 function as the second gate insulating film. The oxide semiconductor film 108 is surrounded by the insulating film 16 .

[0170] With such a structure, the oxide semiconductor film 108 included in the transistor 170 The conductive film 104 functions as a first gate electrode and the conductive film 105 functions as a second gate electrode. It can be electrically surrounded by the electric field of the conductive film 120b. The electric field of the first gate electrode and the second gate electrode causes an oxide film in which a channel region is formed. The device structure of the transistor that electrically surrounds the nitride semiconductor film is called surrounded ch This can be called an annel (s-channel) structure.

[0171] Since the transistor 170 has an s-channel structure, The conductive film 104 functions as a gate insulating film, and the electric field for inducing the channel is effectively applied to the oxide semiconductor. This allows the current drive capability of the transistor 170 to be improved. It is possible to obtain high on-current characteristics. It is also possible to increase the on-current. Therefore, it is possible to miniaturize the transistor 170. The conductive film 104 functions as a first gate electrode and the conductive film 105 functions as a second gate electrode. Since the transistor 170 has a structure surrounded by the conductive film 120b, the mechanical strength of the transistor 170 is increased. It can be done.

[0172] The other configuration of the transistor 170 is the same as that of the transistor 100 described above. It is similar and has the same effect.

[0173] Next, a method for manufacturing the transistor 170 of one embodiment of the present invention will be described with reference to FIGS. 9(A), (B), and (C) are diagrams showing the process for fabricating a semiconductor device. 1A to 1C are cross-sectional views illustrating a method.

[0174] First, a process similar to that of the method for manufacturing the transistor 100 described above (FIGS. 3A to 7A) was performed. ) up to the step shown in ).

[0175] Next, a mask is formed on the insulating film 116 by a lithography process, and the insulating films 114 and 11 An opening 142c is formed in a desired region of the insulating film 116 by a lithography process. A mask is formed by the above method, and openings 111 are formed in desired regions of the insulating films 106, 107, 114, and 116. The opening 142c is formed so as to reach the conductive film 112b. The openings 142a and 142b are formed so as to reach the conductive film 104. (See FIG. 9(A)).

[0176] The openings 142a, 142b and the opening 142c may be formed in the same process or in different processes. The openings 142a, 142b and the opening 142c may be formed in the same process. When forming the insulating film, for example, a gray-tone mask or a half-tone mask may be used. The openings 142a and 142b may be formed in a plurality of steps. For example, First, the insulating films 106 and 107 are processed, and then the insulating films 114 and 116 are processed.

[0177] Next, a conductive film 12 is formed on the insulating film 116 so as to cover the openings 142a, 142b, and 142c. 0 (see FIG. 9(B)).

[0178] The conductive film 120 may be made of, for example, indium (In), zinc (Zn), or tin (Sn). In particular, the conductive film 120 may be made of a material containing one selected from the group consisting of an acid, Indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium Tin Oxide (ITO), Indium Zinc Oxide, Indium Tin Silicon Oxide (I A light-transmitting conductive material such as TSO can be used. For example, the insulating film 11 can be formed by sputtering. For this purpose, a 110 nm thick ITSO film is formed by sputtering.

[0179] Next, a mask is formed on the conductive film 120 by a lithography process, and the conductive film 112 is By processing the conductive film 120 into the above shape, the conductive films 120a and 120b are formed.

[0180] The conductive films 120a and 120b can be formed by dry etching, wet etching, or the like. Examples of the method include a combination of dry etching and wet etching. In this embodiment, the conductive film 120 is formed by wet etching. The conductive films 120a and 120b are then processed.

[0181] Next, the insulating film 118 is formed to cover the conductive films 120a and 120b (see FIG. 9(C)).

[0182] Through the above process, the transistor 170 illustrated in FIGS.

[0183] In addition, the transistor according to the present embodiment can be freely combined with each of the above structures. For example, the transistor 100 shown in FIG. The transistor 170 shown in FIG. 8(A) and FIG. It can be used for gate driver transistors.

[0184] In addition, the common electrode 771 of the pixel portion and the conductive film 120b (backgate) of the driver transistor Since the gate electrode and the cathode can be fabricated in the same process, the manufacturing process can be shortened.

[0185] (Embodiment 3) In this embodiment, a structure of an oxide semiconductor included in a semiconductor device of one embodiment of the present invention will be described. A detailed explanation will be given below.

[0186] Oxide semiconductor films are classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. Alternatively, oxide semiconductors are divided into, for example, crystalline oxide semiconductors and amorphous oxide semiconductors. do.

[0187] As the non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductors made of crystalline oxides include semiconductors made of microcrystalline oxides and amorphous oxides. The materials include single-crystal oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and microcrystalline oxides. Semiconductors, etc.

[0188] First, we will explain the CAAC-OS film.

[0189] The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts aligned along the c-axis.

[0190] Transmission Electron Microscope (TEM) A bright-field image and a combined diffraction pattern of the CAAC-OS film were obtained by using a microscope. By observing the TEM image, multiple crystalline regions can be confirmed. On the other hand, the high-resolution TEM image also shows clear boundaries between crystals, i.e., grain boundaries. Therefore, the CAAC-OS film is It can be said that the decrease in electron mobility caused by grain boundaries is unlikely to occur.

[0191] When a high-resolution TEM image of the cross section of the CAAC-OS film was observed from a direction approximately parallel to the sample surface, It can be seen that the metal atoms are arranged in layers in the crystal part. Each layer of metal atoms is The CAAC-OS film is formed on the surface (also called the surface on which the film is formed) or on the upper surface. The CAAC-OS film has a shape similar to that of the crystalline silicon film, and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0192] On the other hand, a high-resolution TEM image of the plane of the CAAC-OS film was observed from a direction approximately perpendicular to the sample surface. It was confirmed that the metal atoms in the crystals were arranged in triangular or hexagonal shapes. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

[0193] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. From this, it can be seen that the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis is approximately aligned on the surface on which the film is formed or on the upper surface. You can see that it is oriented vertically.

[0194] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ of around 36° may be due to the c-axis orientation in some parts of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferred that the spectrum exhibits a peak and does not exhibit a peak at 2θ of around 36°.

[0195] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The impurities include hydrogen, carbon, and The elements are other than the main components of the oxide semiconductor film, such as silicon and transition metal elements. The elements that bond to oxygen more strongly than the metal elements that form the oxide semiconductor film, such as arsenic, are oxidized. By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have an atomic radius of Since the molecular radius is large, when the cation is contained in the oxide semiconductor film, the The impurities in the oxide semiconductor film may cause the atomic arrangement to be disturbed, which may result in a decrease in crystallinity. Objects can act as carrier traps or carrier generation sources.

[0196] The CAAC-OS film is an oxide semiconductor film having a low density of defect states. Oxygen vacancies in the semiconductor film can become carrier traps or trap hydrogen, It can be a carrier source.

[0197] A material with a low impurity concentration and a low defect level density (few oxygen vacancies) is called a high-purity intrinsic or The term "substantially high-purity intrinsic" refers to a highly-purified intrinsic oxide semiconductor film. Since there are fewer carrier generation sources, the carrier density can be reduced. The transistor including the oxide semiconductor film has electrical characteristics in which the threshold voltage is negative ( Also called normally-on.) In addition, high purity intrinsic or substantially high purity The highly intrinsic oxide semiconductor film has few carrier traps. The transistors using the thin film have small fluctuations in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time when the charge is released is long, and it may behave as if it is a fixed charge. A transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. This may be the case.

[0198] In addition, the electrical characteristics of transistors using CAAC-OS films were improved by irradiation with visible light or ultraviolet light. The fluctuation is small.

[0199] Next, a microcrystalline oxide semiconductor film will be described.

[0200] The microcrystalline oxide semiconductor film has a region where crystals can be confirmed in a high-resolution TEM image. The microcrystalline oxide semiconductor film has a crystal structure including a region where a crystal part is not clearly observed and a region where a crystal part is not clearly observed. The crystal part contained in the crystal has a size of 1 nm to 100 nm or 1 nm to 10 nm. In particular, the fineness is often between 1 nm and 10 nm, or between 1 nm and 3 nm. The oxide semiconductor film having nanocrystals (nc) is called nc -OS(nanocrystalline oxide semiconductor) In the nc-OS film, for example, the grain boundaries are clearly identified in high-resolution TEM images. It may not be possible to recognize

[0201] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or more). The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts. Therefore, no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, X-ray diffraction (XR) is used to measure the nc-OS film using X-rays with a diameter larger than that of the crystals. When structural analysis was performed using the D instrument, the crystal plane In addition, the peaks indicating the probe size were not detected in the nc-OS film. Electron diffraction (also called selected area electron diffraction) using an electron beam with a diameter (for example, 50 nm or more) When the diffraction pattern is changed to 0.05μm, a halo-like diffraction pattern is observed. Nano-beam electrons are used, which use an electron beam with a probe diameter close to or smaller than the size of the crystal part. When diffraction is performed, spots are observed. When this is done, a circular (ring-shaped) area of ​​high brightness may be observed. Nanobeam electron diffraction of the nc-OS film revealed multiple spots within the ring-shaped region. It may be observed.

[0202] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The S film has a higher density of defect states than the CAAC-OS film.

[0203] Next, the amorphous oxide semiconductor film will be described.

[0204] The amorphous oxide semiconductor film is an oxide semiconductor film in which the atomic arrangement in the film is irregular and does not have a crystal part. An example is an oxide semiconductor film that has an amorphous state, such as quartz.

[0205] In the amorphous oxide semiconductor film, no crystalline parts can be confirmed in a high-resolution TEM image.

[0206] When the structure of the amorphous oxide semiconductor film is analyzed using an XRD device, out-of-p In the lane analysis, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductive film, a halo pattern is observed. When nanobeam electron diffraction is performed on a conductive film, no spots are observed, and a halo pattern is observed. Observed.

[0207] Note that the oxide semiconductor film has a structure that exhibits physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure may have a structure such as the following. Amorphous-like Oxide Semiconductor (a-like OS) The conductor membrane is called the endothelium.

[0208] In the a-like OS film, voids are observed in the high-resolution TEM image. In addition, crystals may be clearly visible in high-resolution TEM images. The a-like OS film has a region in which a crystal part is not observed and a region in which a crystal part is not observed. Crystallization occurs due to the small amount of electron irradiation, which is the level observed in TEM observations, and the growth of the crystals can be seen. On the other hand, if the nc-OS film is of good quality, the small amount of charge observed by TEM can be observed. Almost no crystallization due to electron irradiation was observed.

[0209] The size of the crystals in the a-like OS film and the nc-OS film was measured using a high-resolution T This can be done using EM images. For example, InGaZnO4 crystals have a layered structure, There are two Ga-Zn-O layers between the In-O layers. Unit cell of the InGaZnO4 crystal The layer has three In-O layers and six Ga-Zn-O layers, for a total of nine layers aligned in the c-axis direction. The spacing between adjacent layers is therefore the (009) plane. This is approximately the same as the lattice spacing (also called the d value), and crystal structure analysis has determined that this value is 0.29 nm Therefore, we focused on the lattice fringes in high-resolution TEM images and In the region where the distance is between 0.28 nm and 0.30 nm, the lattice fringes are InG aIt corresponds to the ab plane of the ZnO4 crystal.

[0210] In addition, the density of an oxide semiconductor film may differ depending on the structure. If the composition of the membrane is known, the density can be determined by comparing it with that of a single crystal of the same composition. The structure of the oxide semiconductor film can be estimated. The density of the OS-like film is 78.6% or more and less than 92.3%. The density of the nc-OS film and the CAAC-OS film was 92.3% or more. Note that an oxide semiconductor film having a density of less than 78% of the density of a single crystal is The film formation itself is difficult.

[0211] The above will be explained using a specific example. For example, In:Ga:Zn=1:1:1 [atomic In the oxide semiconductor film that satisfies the ratio of the number of ZnO atoms to the number of ZnO atoms, single crystal InGaZnO4 with a rhombohedral crystal structure is The density of is 6.357g / cm 3 Therefore, for example, In:Ga:Zn=1:1:1 In the oxide semiconductor film that satisfies the atomic ratio, the density of the a-like OS film is 5.0 g / cm 3 More than 5.9g / cm 3 For example, In:Ga:Zn=1:1: In the oxide semiconductor film that satisfies the atomic ratio of 1, the density of the nc-OS film and the CAAC- The density of the OS film is 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0212] In addition, there are cases where single crystals with the same composition do not exist. In such cases, the composition may differ in any ratio. By combining single crystals, it is possible to calculate the density equivalent to a single crystal of the desired composition. The density of a single crystal of a desired composition can be determined by the ratio of the single crystals of different compositions. However, the density should be calculated using as few types of single crystals as possible. It is preferable to perform the calculation in combination.

[0213] Note that the oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, an a-like OS film, or a microcrystalline oxide semiconductor film. The semiconductor layer may be a stacked film including two or more of a crystalline oxide semiconductor film and a CAAC-OS film.

[0214] It is known that a transistor in which a channel is formed in an oxide semiconductor has an extremely low off-state current. The off-state current is the current when the transistor is off (when the gate voltage is equal to or lower than the threshold voltage). This refers to the drain current at the time when the gate voltage is sufficiently smaller than the gate voltage.

[0215] A transistor with extremely low off-state current can be applied to a display device.

[0216] For example, the use of the transistor in a pixel circuit of a display device can reduce the power consumption of the display device. In addition, the use of the display device may reduce the strain on the user's eyes. It may be possible to reduce fatigue.

[0217] For example, conventional display devices have a frequency of 30Hz (30 times per second) or more even when displaying a still image. The pixel rewriting operation (reflection) should be performed at a frequency of 60Hz (60 times per second) or more. For this reason, conventional display devices had to perform a This configuration makes it difficult to reduce power consumption even when the content is a still image. This refers to the same image being displayed for more than one second, or for more than five seconds.

[0218] In other words, one of the reasons why conventional display devices consume high power is that even when displaying a still image, The problem is that the pixels must be rewritten frequently. Even when a display device displays a still image, it must frequently rewrite pixels. The reason for this is stated below.

[0219] For example, in the case of a liquid crystal display device, the gray scale is determined by the potential of the liquid crystal element. A capacitance element for holding a charge is connected to the capacitor. Quantity is also included.

[0220] In this manner, in the case of a liquid crystal display device, a capacitive element is used to hold a potential that determines a gray scale. Therefore, the leakage of the charge stored in the capacitance element causes a change in the gray scale of the display device. However, in conventional display devices, pixel rewriting operations had to be performed frequently. This is one of the reasons.

[0221] In addition, the conventional display device may cause significant eye fatigue to the user. In some devices, the display flicker is reduced by frequently rewriting the display, but this is not sufficient. The change in gradation that occurs during rewriting cannot be ignored. , which may be caused by display flicker.

[0222] In view of the above, a display device according to one embodiment of the present invention will be described below.

[0223] In order to reduce eye fatigue when using a display device, it is necessary to reduce display flicker. To reduce display flicker, it is necessary to reduce the change in gray scale within one frame. Also, when displaying a still image, make the period of one frame longer (the frequency of rewriting operations) By reducing the frequency of the write operation, the power consumption can be reduced. In order to reduce the frequency of the pixel shift and to reduce the change in gray scale within one frame, It is clear that the solution is to reduce the charge leakage.

[0224] A transistor for injecting electric charge is connected to the capacitance element, for example. The off-current of the transistor is one of the causes of charge leakage from the capacitance element. The transistor connected to the quantum element is replaced with a transistor with an extremely low off-state current. By doing so, it may be possible to greatly reduce the leakage of charge from the capacitance element.

[0225] When a transistor with an extremely low off-state current is used in a pixel circuit of a liquid crystal display device, The leakage of electric charge from the liquid crystal element through the transistor is almost eliminated. Therefore, although it depends on the leakage current of the liquid crystal element, the liquid crystal display device For example, when displaying halftones, the redrawing speed is 10Hz (10 times per second) or more, and 5 Hz (5 times per second) or more, 1Hz (1 time per second) or more or 0.2Hz (1 time per 5 seconds) If the frequency is more than 1000 times, the change in gray level within one frame will be less than one gray level out of 256. do.

[0226] As described above, when a transistor with an extremely low off-state current is used in a pixel circuit of a display device, By using this, the frequency of redrawing operations can be reduced when displaying still images. This reduces the frequency of rewriting operations when displaying images, compared to conventional display devices. In addition, the display device can reduce power consumption by changing the gray scale within one frame. The display flicker is reduced compared to conventional display devices, reducing eye fatigue. Therefore, it is possible to provide a display device with less noise.

[0227] In other words, in the liquid crystal display device according to one embodiment of the present invention, when a halftone is displayed, for example, The switching operation is performed at a frequency of 10Hz or more, 5Hz or more, 1Hz or more, or 0.2Hz or more. LCD devices in which the change in gray scale within one frame when the LCD is turned on is less than one gray scale out of 256 gray scales. It is located.

[0228] (Embodiment 4) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0229] The display device shown in FIG. 11A has a region having pixels of a display element (hereinafter, referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504) and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided. This is also fine.

[0230] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or the whole of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Band). It can be implemented by using the onding.

[0231] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter, referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter, a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a) to provide a signal (data signal) for driving the display element of the pixel. The pixel circuit 504 includes a driver circuit such as a circuit (hereinafter, referred to as a source driver 504b).

[0232] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is input via a terminal unit 507, and a signal is output. For example, a start pulse signal, a clock signal, etc. are input to the gate driver 504a. The gate driver 504a outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it. However, the gate driver 50 has a function of supplying 4a may also provide another signal.

[0233] The source driver 504b includes a shift register and the like. Through the terminal section 507, a signal for driving the shift register as well as a source of a data signal are input. The source driver 504b receives a signal (image signal) that is to be displayed on the pixel circuit based on the image signal. The source driver 504b has a function of generating a data signal to be written to the pixel 501. A data signal is generated according to a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y) connected to the data line DL_Y is controlled by the Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0234] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a number of analog switches, The image signal can be time-division-divided and output as a data signal. Also, a shift register, etc. This may be used to configure the source driver 504b.

[0235] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is inputted through the data line DL, and a data signal is given through one of the data lines DL. A data signal is input to each of the pixel circuits 501. 504a controls writing and holding of data of the data signal. For example, The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or smaller than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via a source driver 504c (n is a natural number equal to or smaller than Y).

[0236] The protection circuit 506 shown in FIG. 11A includes, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to a wiring between the gate driver 504a and the terminal unit 507. Alternatively, the protection circuit 506 may be a wiring between the source driver 504b and the terminal unit 507. The terminal unit 507 can be connected to a power supply and a power supply line from an external circuit to the display device. This refers to the part provided with terminals for inputting control signals and image signals.

[0237] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit This is a circuit that brings one wire into electrical continuity with another wire.

[0238] As shown in FIG. 11A, a protection circuit 50 is provided in each of a pixel section 502 and a driver circuit section 504. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrent caused by electrostatic discharge (ESD) and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a protection circuit 506 is connected to the source driver 504b Alternatively, a protection circuit 506 may be connected to the terminal portion 507. It can also be done like this.

[0239] In FIG. 11A, the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a source driver circuit is formed separately. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is It may also be configured to be equipped with

[0240] In addition, the pixel circuits 501 shown in FIG. 11(A) may be, for example, a pixel circuit having a configuration shown in FIG. It can be said that:

[0241] The pixel circuit 501 shown in FIG. 11B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 has the same structure as the transistor 1 shown in the previous embodiment. 00 can be applied.

[0242] The potential of one of the pair of electrodes of the liquid crystal element 570 is appropriately set according to the specifications of the pixel circuit 501. The alignment state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. A different potential may be applied to one of the electrodes.

[0243] For example, the display device including the liquid crystal element 570 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned M icro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid id Crystal) mode, AFLC (AntiFerroelectric Li quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode, etc. may also be used. In addition to the above-mentioned driving method, the display device can be driven by an ECB (Electric Carrier Bipolar Transistor) or the like. Ally Controlled Birefringence mode, PDLC(P Oligomeric Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest hole However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. A variety of different types of sensors can be used.

[0244] In the pixel circuit 501 in the mth row and the nth column, One of the electrodes is electrically connected to the data line DL_n, and the other is a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the electrodes of the scan line G. L_m. The transistor 550 can be turned on or off. Thus, the data write of the data signal is controlled.

[0245] One of a pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0246] For example, in a display device having the pixel circuit 501 shown in FIG. The pixel circuits 501 in each row are sequentially selected by a gate driver 504a shown in FIG. 550 is turned on to write data of the data signal.

[0247] In the pixel circuit 501 in which data has been written, the transistor 550 is turned off. By repeating this process row by row, an image can be displayed.

[0248] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0249] (Embodiment 5) In this embodiment, a display module and an electronic device each including a semiconductor device according to one embodiment of the present invention will be described. This will be described with reference to FIG.

[0250] As an example of an electronic device to which the present invention can be applied, a television device (a television, (also called TV receivers), computer monitors, digital cameras, digital video digital cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, music Examples include playback devices, gaming machines (pachinko machines, slot machines, etc.), and game cabinets. A specific example of such an electronic device is shown in FIG.

[0251] FIG. 12A shows a portable information terminal 1400 having a display unit. The device 400 has a display unit 1402 and operation buttons 1403 built into a housing 1401 . The liquid crystal display device of one embodiment of the present invention can be used for the display portion 1402.

[0252] FIG. 12B shows a mobile phone 1410. The mobile phone 1410 has a housing 14 11, a display unit 1412, an operation button 1413, a speaker 1414, and a microphone 1415 The liquid crystal display device of one embodiment of the present invention can be used for the display portion 1412. can.

[0253] FIG. 12C shows a music player 1420. The music player 1420 has a housing. A display unit 1422, an operation button 1423, and an antenna 1424 are incorporated in the device 1421. Also, information can be transmitted and received by radio signals from the antenna 1424. The liquid crystal display device of one embodiment can be used for the display portion 1422.

[0254] The display unit 1402, the display unit 1412, and the display unit 1422 each have a touch input function. The display buttons (not shown) displayed on the display units 1402, 1412, and 1422 You can operate the screen and input information by touching it with your finger or other object.

[0255] The liquid crystal display device shown in the above embodiment includes a display portion 1402, a display portion 1412, and a display portion 1413. By using the display unit 1402, the display unit 1412, and the display unit 422, the display quality is improved. This can be a display unit 1422 .

[0256] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0257] (Embodiment 6) In this embodiment, the frequency of the refresh operation described in the third embodiment is This article explains the significance of reducing the refresh rate. This not only reduces power consumption but also reduces eye fatigue.

[0258] There are two types of eye fatigue: nervous fatigue and muscular fatigue. Nervous fatigue is caused by prolonged use of the eyes. By continuing to look at the light-emitting or flashing screen of an LCD display, the brightness of the screen can damage the retina, nerves, and brain. Fatigue in the muscular system stimulates and tires the ciliary muscles, which are used for focusing. It tires the muscles by overworking them.

[0259] In conventional liquid crystal display devices, images are rewritten 60 times per second. Looking at such a screen for a long time can stimulate the retina, nerves, and brain of the user, causing eye fatigue. There was a risk of labor being caused.

[0260] In one embodiment of the present invention, a pixel is provided for displaying a still image at a frame frequency of 1 Hz or less. The pixel has a liquid crystal layer, and the liquid crystal layer has a dielectric constant anisotropy of 2 or more and 3.8 or less. Therefore, flickering that occurs when the refresh rate is reduced can be suppressed.

[0261] In one embodiment of the present invention, a pixel portion of a liquid crystal display device includes a transistor including an oxide semiconductor, For example, a transistor using CAAC-OS is used. Since the difference is extremely small, it is possible to maintain the brightness of the liquid crystal display device even if the frame frequency is lowered. become.

[0262] In other words, for example, the image can be rewritten once every 5 seconds, so the same image can be displayed for as long as possible. This makes it possible to view images, and reduces flickering of the screen that is visible to the user. This reduces stimulation to the retina, nerves, and brain of the user, and relieves fatigue of the nervous system.

[0263] In addition, when the size of one pixel is large (for example, when the resolution is less than 150 ppi), the LCD The characters displayed on the display device are blurred. When you look at something for a long time, your ciliary muscles are constantly moving to focus. This can lead to difficulty in focusing and cause strain on the eyes. I did.

[0264] In contrast, in a liquid crystal display device according to an embodiment of the present invention, the size of each pixel is small and high precision is achieved. This allows for fine display, resulting in a smooth and detailed display. The muscles of the body are able to focus more easily, reducing fatigue in the user's muscular system.

[0265] In addition, rapid switching of images can cause eye fatigue. For example, this includes switching between moving images that switch between significantly different scenes, or switching between different still images. Can be enjoyed.

[0266] When switching between different images, do not switch the display instantly, but gradually. It is preferable to switch between images quietly and naturally.

[0267] For example, when switching from a different first image to a second image, the first image and the second image Between these images, the first image fades out and / or the second image fades in. It is preferable to insert a second image that fades out at the same time as the first image fades out. The two images are superimposed so that the first image fades in (also called a crossfade). A moving image may be inserted, showing the first image gradually changing into the second image. You can also insert a new image (also called morphing).

[0268] Specifically, a first still image is displayed at a low refresh rate, followed by image switching. After displaying a picture for a new scene at a high refresh rate, a second still image is displayed at a low refresh rate. Shown in flash rate.

[0269] Methods for quantitatively measuring eye fatigue are currently being considered. The value index is the Critical Flicker Frequency (CFF). In addition, the evaluation index of muscle fatigue is known as Known examples of such factors include adjustment time and adjustment near point distance.

[0270] Other methods for assessing eye fatigue include electroencephalography, thermography, and blink count. Measurement of eye movement, tear volume evaluation, pupil contraction reaction rate evaluation, questionnaire to investigate subjective symptoms There are also other projects.

[0271] According to one embodiment of the present invention, a liquid crystal display device that is gentle on the eyes can be provided.

[0272] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0273] (Embodiment 7) In this embodiment, an example that is partially different from the configuration of FIG. 2 shown in Embodiment 1 is shown in FIG. The same reference numerals are used for the same parts as those in FIG. 2, and detailed explanations will be omitted.

[0274] In this embodiment, a planarization insulating film 770 is provided over a transistor 750.

[0275] The planarization insulating film 770 may be made of a polyimide resin, an acrylic resin, a polyimide amide resin, or Heat-resistant organic materials such as benzocyclobutene resin, polyamide resin, and epoxy resin In addition, by stacking a plurality of insulating films made of these materials, A planarization insulating film 770 may be formed.

[0276] A common electrode 771 is provided on the planarization insulating film 770, and an insulating film 792 is provided thereon. A conductive film 772 functioning as a pixel electrode is provided over the insulating film 792. The conductive film 772, the common electrode 771, and the insulating film 792 sandwiched therebetween are used as dielectrics. It is formed.

[0277] In addition, in FIG. 14, the common electrode 771 and the conductive film 773 are formed in different steps. Therefore, the number of manufacturing steps is increased compared to the configuration of FIG. 2. In order to form 70, the number of manufacturing steps increases compared to the configuration of FIG.

[0278] In addition, if the thickness of the planarization insulating film 770 is made thin, the common electrode can be formed in the same process as the conductive film 773. The conductive film 7 is formed on the insulating film 766, and the planarizing insulating film 770 and the insulating film 768 are used as dielectrics. A capacitance may be formed between the insulating film 764 and the insulating film 766. An insulating film 768 is formed on the insulating film 766, and a planarizing insulating film 770 is formed on the insulating film 768. In FIG. 14, the interface between the insulating film 764 and the insulating film 766 is shown by a dotted line. However, only some of the film formation conditions are different, and some of the films are formed continuously and are not shown in the figures. In FIG. 14, transistor 750 corresponds to transistor 100 in FIG. The insulating film 703 is connected to the insulating film 106, the insulating film 764 is connected to the insulating film 114, and the insulating film 766 is connected to the insulating film 114. The insulating film 116 and the insulating film 768 correspond to the insulating film 118 .

[0279] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0280] (Embodiment 8) In this embodiment, an example that is partially different from the configuration of FIG. 2 shown in Embodiment 1 is shown in FIG. The same reference numerals are used for the same parts as those in FIG. 2, and detailed explanations will be omitted.

[0281] In this embodiment mode, a conductive film 793 serving as a back gate is also provided for the transistor 750 in the pixel portion. The connection configuration between the common electrode 771 and the capacitance line 709 is partially different, and the connection at the connection portion 711 This is an example in which the connection configuration is different.

[0282] The conductive film 793 can be formed in the same process as the conductive film 773, and is provided without increasing the number of processes. It is possible.

[0283] The conductive film 794 is formed in the same process as the conductive film 772. 709 through a contact hole.

[0284] In addition, in the connection portion 711, the conductive film 795 is formed in the same process as the conductive film 772. The contact electrode 777 and the conductive film 773 are electrically connected to each other through a contact hole. do.

[0285] Conductive films 794 and 795 are formed in the same process as the conductive film 772 without increasing the number of masks. By using the above, it is possible to electrically connect to other wiring (for example, the connection electrode 777, the conductive film 773, etc.). This can be done.

[0286] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0287] (Embodiment 9) In this embodiment, an example that is partially different from the configuration of FIG. 2 shown in Embodiment 1 is shown in FIG. The same reference numerals are used for the same parts as those in FIG. 2, and detailed explanations will be omitted.

[0288] Figure 16 shows the LCD display in FFS (Fringe Field Switching) mode. 1 is an example of an apparatus.

[0289] FFS mode LCD panels, in which a horizontal electric field is applied to the liquid crystal, are different from TN (T Compared with LCD panels in the Wisteria (Wisted Nematic) mode, the cell gap is increased by pressing. Even if the top of the LCD panel changes slightly, the alignment of the liquid crystal is not easily disturbed. There are no electrodes on the counter substrate that faces the element substrate on which the transistors are formed.

[0290] In the FFS mode liquid crystal display device, a slit-shaped opening is formed in the conductive film 772 which functions as a pixel electrode. An opening is provided, and an electric field generated by the pixel electrode and the common electrode 771 is applied to the liquid crystal through the opening. By doing so, the orientation of the liquid crystal molecules is controlled.

[0291] FFS mode LCD devices have a high aperture ratio and can provide a wide viewing angle. This has the effect of improving image contrast.

[0292] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0293] (Embodiment 10) In this embodiment, an example that is partially different from the configuration of FIG. 2 shown in Embodiment 1 is shown in FIG. The same reference numerals are used for the same parts as those in FIG. 2, and detailed explanations will be omitted.

[0294] The capacitor element 790 has two capacitance forming regions formed on one common electrode, each of which has a pair of This structure has a dielectric between the electrodes. Two capacitance forming regions are formed on one common electrode. The configuration can be called a configuration in which the first capacitance element and the second capacitance element are stacked. A dielectric and an electrode are provided above and below the electrode 771, respectively, and multiple capacitance forming regions are laminated. A conductive film 772 functioning as a pixel electrode is used as one electrode of the first capacitance forming region. The other electrode of the first capacitance forming region is the same as the gate electrode of the transistor 752. A common electrode 771 formed in the process is used. In addition, a dielectric material sandwiched between a pair of electrodes is An insulating film 791 is used as the second capacitance forming region. The other electrode of the second capacitance forming region is a low-resistance oxide. The conductive film 772 and the low-resistance oxide film 718a are used. , 718b are electrically connected via the drain electrode and are at the same potential. 18b is provided in contact with an insulating film 768 made of a silicon nitride film or the like, and has a low resistance. The insulating film 768 functions as a conductive film. The insulating films 768 and 791 are made of inorganic insulating films, and are made of silicon nitride films, alumina nitride films, etc. An aluminum film, a silicon nitride oxide film, an aluminum oxynitride film, or the like is used.

[0295] In the case of a transmissive liquid crystal display device, the conductive film 772 and the common electrode 771 are transparent to visible light. It is preferable to use a conductive film that transmits light in visible light. For example, the metal may be one selected from the group consisting of indium (In), zinc (Zn), and tin (Sn). It is preferable to use a material containing

[0296] The common electrode 771 is electrically connected to the capacitance line 709 .

[0297] The connection electrode 710 and the capacitance line 709 are connected to the source and drain electrodes of the transistors 750 and 752. The conductive film that functions as the inner electrode is formed in the same process.

[0298] The connection electrode 710 and the capacitance line 709 are connected to the source electrodes of the transistors 750 and 752 and A conductive film formed in a process different from that of the drain electrode, for example, a conductive film functioning as a gate electrode The connection electrode 710 and the capacitance line 709 may be formed of, for example, a material containing copper. When used, signal delays caused by wiring resistance are reduced, making it possible to display on a large screen.

[0299] The FPC terminal portion 708 includes a connection electrode 760, a conductive film 779, an anisotropic conductive film 780, The connection electrode 760 is connected to the solenoid of the transistors 750 and 752. The conductive film that functions as the source electrode and the drain electrode is formed in the same process. The electrode 760 is connected to the conductive film 779, the terminal of the FPC 716, and the anisotropic conductive film 780. The conductive film 779 is electrically connected to the conductive film 772 which functions as a pixel electrode. , can be formed in the same process.

[0300] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0301] (Embodiment 11) In this embodiment, an example partially different from the configuration of the first embodiment shown in FIGS. 8 and 9 is shown in FIGS. 19. The same reference numerals are used for the same parts as in FIG. 8 and FIG. 9, and detailed description will be omitted. This will be omitted.

[0302] An example of a manufacturing process of the transistor 752 shown in FIG. The gate electrode 752 has a structure including gate electrodes above and below a stack of oxide semiconductor layers.

[0303] In the following description, a transistor 170 having the same structure as the transistor 752 will be used. 19A to 19C show the transistor 17 shown in FIG. 10 is a cross-sectional view illustrating a manufacturing process of the transistor 170. Almost the same except that a step of forming a second gate electrode above the gate electrode of Therefore, a detailed description will be omitted.

[0304] The transistor 170 includes a conductive film 104 over a substrate 102, the conductive film 104 serving as a first gate electrode. an insulating film 106 on the substrate 102 and the conductive film 104; and an insulating film 107 on the insulating film 106. The oxide semiconductor film 108 over the insulating film 107 and the insulating film 108 electrically connected to the oxide semiconductor film 108 The conductive film 112a serving as a source electrode and the oxide semiconductor film 108 are electrically connected to The conductive film 112b serving as a drain electrode and the insulating film 112a over the oxide semiconductor film 108 are 14, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 1 The conductive film 120a is formed on the insulating film 118, and the conductive film 120b is formed on the insulating film 118. 4, 116, and 118 function as a second gate insulating film of the transistor 170. The conductive film 120a is formed through the openings 142c provided in the insulating films 114, 116, and 118. In addition, in the transistor 170, The conductive film 120a functions as, for example, a pixel electrode used in a display device. In the transistor 170, the conductive film 120b serves as a second gate electrode (a back gate electrode). It functions as a

[0305] As shown in FIG. 18B, the conductive film 120b is formed by insulating films 106, 107, 114, In the openings 142a and 142b provided in the gate electrodes 116 and 118, Therefore, the conductive film 120b and the conductive film 104 are connected to each other. The same potential is applied.

[0306] In this embodiment, openings 142a and 142b are provided, and the conductive film 120b and Although the configuration in which the conductive film 104 is connected has been illustrated, the present invention is not limited to this. Only one of the openings 142a and 142b is formed, and the conductive film 120b and The conductive film 104 is connected, or the openings 142a and 142b are not provided, and the conductive film 104 is not connected. The conductive film 120b and the conductive film 104 may not be connected to each other. In the case where the conductive film 104 is not connected, the conductive film 120b and the conductive film 104 are each provided with different It is possible to apply a voltage to the

[0307] As shown in FIG. 18B, the oxide semiconductor film 108 is used as a first gate electrode. The conductive film 104 functions as a second gate electrode, and the conductive film 120b functions as a second gate electrode. The second gate electrode is sandwiched between two conductive films that function as gate electrodes. The length in the channel length direction and the length in the channel width direction of the conductive film 120b functioning as a gate electrode The length is longer than the length of the oxide semiconductor film 108 in the channel length direction and the length of the oxide semiconductor film 108 in the channel width direction. The oxide semiconductor film 108 is entirely covered with insulating films 114, 116, and 118. The conductive film 120b functions as a second gate electrode. The conductive film 104 serving as the first gate electrode is formed by insulating films 106, 107, and 114, The oxide The side surface of the semiconductor film 108 in the channel width direction is connected to the second insulating film 114, 116, and 118. The gate electrode 120b is opposed to the conductive film 120b.

[0308] In other words, in the channel width direction of the transistor 170, The conductive film 104 functioning as the second gate electrode and the conductive film 120b functioning as the second gate electrode form a gate insulating film. Insulating films 106 and 107 functioning as insulating films and an insulating film functioning as a second gate insulating film 114 and 116 are connected through openings, and serve as a first gate insulating film. The insulating films 106 and 107 function as the first gate insulating film and the insulating films 114 and 115 function as the second gate insulating film. The oxide semiconductor film 108 is surrounded by the insulating film 16 .

[0309] With such a structure, the oxide semiconductor film 108 included in the transistor 170 The conductive film 104 functions as a first gate electrode and the conductive film 105 functions as a second gate electrode. It can be electrically surrounded by the electric field of the conductive film 120b. The electric field of the first gate electrode and the second gate electrode causes an oxide film in which a channel region is formed. The device structure of the transistor that electrically surrounds the nitride semiconductor film is called surrounded ch This can be called an annel (s-channel) structure.

[0310] Since the transistor 170 has an s-channel structure, The conductive film 104 functions as a gate insulating film, and the electric field for inducing the channel is effectively applied to the oxide semiconductor. This allows the current drive capability of the transistor 170 to be improved. It is possible to obtain high on-current characteristics. It is also possible to increase the on-current. Therefore, it is possible to miniaturize the transistor 170. The conductive film 104 functions as a first gate electrode and the conductive film 105 functions as a second gate electrode. Since the transistor 170 has a structure surrounded by the conductive film 120b, the mechanical strength of the transistor 170 is increased. It can be done.

[0311] The other configuration of the transistor 170 is the same as that of the transistor 100 described above. It is similar and has the same effect.

[0312] Next, a method for manufacturing the transistor 170 of one embodiment of the present invention will be described with reference to FIG. 19(A), (B), and (C) are diagrams showing the structure of a semiconductor device. 1A to 1C are cross-sectional views illustrating a manufacturing method.

[0313] First, a process similar to that of the method for manufacturing the transistor 100 described above (FIGS. 3A to 7A) was performed. ) up to the step shown in ).

[0314] Next, a mask is formed on the insulating film 118 by a lithography process, and the insulating films 114 and 11 An opening 142c is formed in a desired region of the insulating film 118. A mask is formed by a photolithography process, and the insulating films 106, 107, 114, 116, and 118 are formed as desired. In this region, openings 142a and 142b are formed. The openings 142a and 142b are formed so as to reach the conductive film 10 4 (see FIG. 19(A)).

[0315] The openings 142a, 142b and the opening 142c may be formed in the same process or in different processes. The openings 142a, 142b and the opening 142c may be formed in the same process. When forming the insulating film, for example, a gray-tone mask or a half-tone mask may be used. The openings 142a and 142b may be formed in a plurality of steps. For example, First, the insulating films 106 and 107 are processed, and then the insulating films 114, 116 and 118 are processed.

[0316] Next, a conductive film 12 is formed on the insulating film 118 so as to cover the openings 142a, 142b, and 142c. 0 (see FIG. 19(B)).

[0317] The conductive film 120 may be made of, for example, indium (In), zinc (Zn), or tin (Sn). In particular, the conductive film 120 may be made of a material containing one selected from the group consisting of an acid, Indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium Tin Oxide (ITO), Indium Zinc Oxide, Indium Tin Silicon Oxide (I A light-transmitting conductive material such as TSO can be used. For example, the insulating film 11 can be formed by sputtering. For this purpose, a 110 nm thick ITSO film is formed by sputtering.

[0318] Next, a mask is formed on the conductive film 120 by a lithography process, and the conductive film 112 is By processing the conductive film into the above shape, the conductive films 120a and 120b are formed (see FIG. 19(C)).

[0319] The conductive films 120a and 120b can be formed by dry etching, wet etching, or the like. Examples of the method include a combination of dry etching and wet etching. In this embodiment, the conductive film 120 is formed by wet etching. The conductive films 120a and 120b are then processed.

[0320] Through the above process, the transistor 170 illustrated in FIGS.

[0321] In addition, the transistor according to the present embodiment can be freely combined with each of the above structures. For example, the transistor 100 shown in FIG. The transistor 170 shown in FIGS. 18A and 18B is used as a transistor in a pixel portion of a display device. The transistors can be used in the gate drivers of the above-mentioned devices.

[0322] In addition, the common electrode 771 of the pixel portion and the conductive film 120b (backgate) of the driver transistor Since the gate electrode and the cathode can be fabricated in the same process, the manufacturing process can be shortened. [Explanation of symbols]

[0323] 100 transistors 102 Substrate 104 Conductive film 106 Insulating film 107 Insulating film 108 Oxide semiconductor film 108a Oxide semiconductor film 108b Oxide semiconductor film 109 Oxide semiconductor film 109a Oxide semiconductor film 109b Oxide semiconductor film 112 Conductive film 112a Conductive film 112b Conductive film 114 Insulating film 116 Insulating film 118 Insulating film 120 Conductive film 120a Conductive film 120b Conductive film 131 Barrier Membrane 136a Mask 136b Mask 138 Etchant 139 Etchant 141 Etchant 140 Oxygen 140a Oxygen 142a opening 142b opening 142c opening 170 Transistors 700 Display device 701 Substrate 702 Pixel section 703 Insulating film 704 Source driver circuit section 705 Substrate 706 Gate driver circuit section 708 FPC terminal section 709 Capacitive Line 710 Connection electrode 711 Connection 712 Sealing material 716 FPC 718a Oxide film 718b Oxide film 734 Insulating film 736 Colored film 738 Light-shielding film 750 Transistors 751 Transistor 752 Transistor 753 Transistor 760 Connection electrode 766 Insulating Film 768 Insulating Film 771 Common Electrode 772 Conductive Film 773 Conductive Film 774 Conductive Film 775 Liquid crystal elements 776 Liquid crystal layer 777 Connection electrode 778 Structure 779 Conductive Film 780 Anisotropic Conductive Film 790 Capacitive element 791 Insulating Film 792 Insulating film

Claims

1. a driver circuit portion having a first transistor having a first channel formation region; a pixel portion including a second transistor having a second channel formation region and a capacitor; The first transistor is a display device having a first gate electrode located below the first channel formation region and a second gate electrode located above the first channel formation region, a first conductive layer having a function as a gate electrode of the second transistor; a first insulating layer having a region overlying the first conductive layer; a first metal oxide layer having a region in contact with an upper surface of the first insulating layer and having a channel formation region of the second transistor; a second metal oxide layer having a region in contact with an upper surface of the first insulating layer and functioning as one electrode of the capacitor; a second conductive layer overlapping the second metal oxide layer and functioning as the other electrode of the capacitor; a third conductive layer having a region located above the first channel formation region and functioning as the second gate electrode; a second insulating layer having a region in contact with an upper surface of the second conductive layer and a region in contact with an upper surface of the third conductive layer; a fourth conductive layer having a region located above the second insulating layer and having a region overlapping the second metal oxide layer; the fourth conductive layer is electrically connected to one of the source and the drain of the second transistor; the first metal oxide layer and the second metal oxide layer have the same material; The second conductive layer and the third conductive layer are made of the same material.

2. a driver circuit portion having a first transistor having a first channel formation region; a pixel portion including a second transistor having a second channel formation region and a capacitor; The first transistor is a display device having a first gate electrode located below the first channel formation region and a second gate electrode located above the first channel formation region, a first conductive layer having a function as a gate electrode of the second transistor; a first insulating layer having a region overlying the first conductive layer; a first metal oxide layer having a region in contact with an upper surface of the first insulating layer and having a channel formation region of the second transistor; a second metal oxide layer having a region in contact with an upper surface of the first insulating layer and functioning as one electrode of the capacitor; a second conductive layer overlapping the second metal oxide layer and functioning as the other electrode of the capacitor; a third conductive layer having a region located above the first channel formation region and functioning as the second gate electrode; a second insulating layer having a region in contact with an upper surface of the second conductive layer and a region in contact with an upper surface of the third conductive layer; a fourth conductive layer having a region located above the second insulating layer and having a region overlapping the second metal oxide layer; the fourth conductive layer is electrically connected to one of the source and the drain of the second transistor; the first metal oxide layer and the second metal oxide layer have the same material; the second conductive layer and the third conductive layer have the same material; the second insulating layer has a function as a gate insulating layer of the first transistor and a function as a dielectric layer of the capacitive element.

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