Power semiconductor device and manufacturing method thereof

Abstract

To provide a power semiconductor device in which a power semiconductor element is bonded to a mounting member in a bonding while holding a hardness and having a high reliability, and provide a manufacturing method capable of simply manufacturing the power semiconductor device having a strength and the high reliability in a bonding between the power semiconductor element and the mounting member.SOLUTION: A bonding material 5 for bonding a power semiconductor element 1 and a mounting member 2 is constructed by a metal bump 3 and a metal sintering material 4. The metal sintering material 4 contains: a first region positioned so as to be contacted to the metal bump 3 at each circumference of the metal bump 3; and a second region including a sintering density that is lower than that of the first region surrounded by the first region in at least one part. The power semiconductor element 1 having the metal bump 3 is mounted onto the mounting member 2 to which a paste containing a metal sintering body is coated and is heated. The power semiconductor element 1 and the mounting member 2 are bonded by the bonding material 5.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power semiconductor device and a manufacturing method thereof, and more particularly to a power semiconductor device in which electrodes of a power semiconductor element and a mounting member are bonded by a bonding material composed of a metal bump and a metal sintered material, and a manufacturing method thereof. [Background technology]

[0002] With the increasing demand for consideration of the global environment, electric vehicles such as hybrid vehicles (HVs) and electric vehicles (EVs) are becoming more widespread. Electric vehicles are efficiently controlled by an inverter that converts direct current supplied from a battery into alternating current and controls the current passed to the traction motor that drives the wheels. During deceleration, the regenerative electrical energy returned from the traction motor is converted into direct current by a converter and returned to the battery, thereby achieving low fuel consumption. Such inverters and the like are composed of power semiconductor devices because they operate at high voltages and high currents.

[0003] Power semiconductor devices are equipped with power semiconductor elements such as insulated gate bipolar transistors (IGBTs), metal oxide semiconductor field effect transistors (MOSFETs), and diodes, and power conversion is performed by controlling the on / off switching of these power semiconductor elements. Power semiconductor elements are accompanied by losses during switching. These losses during switching can be reduced by switching as fast as possible, but high-speed switching can sometimes cause overvoltage.

[0004] Conventionally, power semiconductor elements have been composed of silicon (Si) semiconductors, but as an alternative semiconductor material to silicon, power semiconductor elements composed of wide-gap semiconductors using materials with wide bandgaps such as silicon carbide (SiC) are attracting attention. For example, silicon carbide power semiconductor elements composed of silicon carbide semiconductors, which are wide-gap semiconductors, have advantages such as high voltage resistance, low loss, high-speed operation, and stable operation in high-temperature environments compared to silicon power semiconductor elements. This is due to the characteristics of silicon carbide, which has a bandgap about three times larger, a dielectric breakdown field strength about ten times higher, a saturated drift velocity about twice as large, and a thermal conductivity about three times larger than silicon. Gallium nitride (GaN) also has an electron mobility of 1500 cm, more than twice that of silicon carbide. 2 / Vs, they are considered to be suitable for high-speed current control. Furthermore, gallium oxide (Ga2O3) and diamond have very large band gaps of 4.9 eV and 5.5 eV, respectively, and are expected to be materials for next-generation power semiconductor elements.

[0005] In addition, when electrodes of a power semiconductor element are joined to mounting members such as a lead frame, solder is generally used in the case of silicon power semiconductor elements. On the other hand, power semiconductor elements made of wide-gap semiconductors have a large current flowing during operation and generate a large amount of heat, so there is a large change in temperature between when they are in operation and when they are not in operation. For this reason, in power semiconductor elements made of wide-gap semiconductor elements, a highly reliable joint that does not cause damage to the joint due to stress caused by temperature changes is required to join the electrodes of the semiconductor element to the mounting members, rather than solder.

[0006] As a highly reliable bonding method, a bonding method using a metal sintered material that uses a sintering paste composed of metal particles and a solvent has been proposed. On the other hand, in order to increase the bonding strength, a method is generally used in which pressure is applied to remove residual solvent that causes cavity formation so that cavities are not formed inside the metal sintered material during the sintering process or the size of the cavities can be reduced if they are formed (Patent Document 1). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2011-249801 A Summary of the Invention [Problem to be solved by the invention]

[0008] However, since there is a trade-off between improved joint strength and high reliability, there is a problem of reduced reliability in the method of Patent Document 1. In addition, the method of forming a joint using a sintered metal material by applying pressure to eliminate the formation of cavities or by reducing the size of the cavities requires the preparation of a device or tool for applying pressure, and has a problem of being inferior in mass productivity compared to a forming method using solder that can form a joint by passing through an oven for heating.

[0009] Therefore, an object of the present invention is to provide a power semiconductor device in which a power semiconductor element is joined to a mounting member with a bond that maintains strength and is highly reliable, and to provide a manufacturing method that can easily manufacture a power semiconductor device in which the bond between the power semiconductor element and the mounting member is strong and highly reliable. [Means for solving the problem]

[0010] A power semiconductor device according to one embodiment of the present invention is a power semiconductor device comprising a power semiconductor element and a mounting member joined to the power semiconductor element by a bonding material, the bonding material being composed of a metal bump and a metal sintered material, the metal bump being bonded to the power semiconductor element and the mounting member, the metal sintered material being filled between a plurality of the metal bumps and including a first region positioned around each of the metal bumps in contact with the metal bumps, and a second region positioned in contact with the first region and at least a portion of which is surrounded by the first region, the second region being configured to have a sintered density lower than the sintered density of the first region.

[0011] A method for manufacturing a power semiconductor device according to another aspect of the present invention includes a power semiconductor element forming step of forming a power semiconductor element having a plurality of metal bumps on electrode pads, a coating step of preparing a mounting member and coating a paste containing a metal sintered material on a joint portion of the mounting member, and a mounting step of arranging the electrode pads of the power semiconductor element and the joint portion of the mounting member opposite each other, placing the power semiconductor element on the mounting member, heating the paste, and bonding the power semiconductor element to the mounting member with a bonding material composed of a plurality of the metal bumps and the metal sintered material filled between the metal bumps, wherein the mounting step is configured to be a step of bonding the power semiconductor element to the mounting member with the metal bumps and the metal sintered material so that the metal bumps are bonded to the joint portions of the mounting member, and the metal sintered material is formed so that the metal bumps are bonded to the joint portions of the mounting member, and the metal sintered material includes a first region located around each of the metal bumps in contact with the metal bumps, and a second region located around the first region in contact with the first region, at least a portion of which is surrounded by the first region and has a sintered density lower than the sintered density of the first region. Effect of the Invention

[0012] According to the power semiconductor device of the present invention, the bonding material is composed of metal bumps and a metal sintered material, the metal bumps are bonded to the power semiconductor element and the mounting member, the metal sintered material is filled between the metal bumps, and the first region is located around each of the metal bumps in contact with the metal bumps, and the second region is located in contact with the first region and at least a part of which is surrounded by the first region, and the second region has a sintered density lower than that of the first region, so that it is possible to provide a power semiconductor device with a highly reliable bond while maintaining the bonding strength. Also, according to the manufacturing method of the power semiconductor device of the present invention, it is possible to easily manufacture a power semiconductor device with a highly reliable bond while maintaining the above-mentioned bonding strength by simply placing the power semiconductor element on the mounting member and heating the paste. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is an explanatory diagram of an embodiment of a power semiconductor device according to an aspect of the present invention. [Diagram 2] 2 is an explanatory diagram of a power semiconductor element constituting the power semiconductor device of FIG. 1. [Diagram 3] 2 is an explanatory diagram of a power semiconductor element constituting the power semiconductor device of FIG. 1. [Figure 4] 2 is an explanatory diagram of a state in which a heat sink is connected to the power semiconductor device of FIG. 1. [Diagram 5] 4 is an explanatory diagram of one embodiment of a power semiconductor element formation step in the method for producing a power semiconductor device according to another aspect of the present invention. FIG. [Figure 6] 5A to 5C are explanatory diagrams of an embodiment of a coating step in the method for producing a power semiconductor device according to another aspect of the present invention. [Figure 7] 5A to 5C are explanatory diagrams of an embodiment of a mounting step in a manufacturing method for a power semiconductor device according to another aspect of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Next, the embodiments of the power semiconductor device of the present invention and the manufacturing method thereof will be described with reference to the drawings, but the present invention is not limited to these embodiments and embodiments, and the members, materials, etc. described below can be modified in various ways within the scope of the present invention. Also, in the drawings, the same reference numerals indicate the same or equivalent items, and the size and positional relationship between each component are for convenience and may not strictly reflect the actual situation.

[0015] (Power Semiconductor Devices) First, an embodiment of a power semiconductor device according to the present invention will be described. Fig. 1 is an explanatory diagram of an embodiment of the power semiconductor device according to the present invention, and is a schematic cross-sectional view of the power semiconductor device in which a power semiconductor element 1 is bonded to a mounting member 2 by a bonding material 5 composed of a metal bump 3 and a metal sintered material 4. In Fig. 1, 7 is a resin portion formed by a resin that seals the power semiconductor element 1 and the mounting member 2. Fig. 1 shows an example in which a part of the surface of the power semiconductor element 1 is exposed from the resin portion 7. The resin portion 7 may be configured to cover the entire power semiconductor element 1.

[0016] In the power semiconductor element 1, semiconductor elements such as insulated gate bipolar transistors, metal oxide semiconductor field effect transistors, and diodes are formed on a semiconductor region or semiconductor substrate made of wide-gap semiconductors such as silicon carbide, gallium nitride, gallium oxide, and diamond, and electrode pads 6 connected to the electrodes of the semiconductor elements are arranged on one side of the semiconductor region. The mounting member 2 can be made of a material capable of being subjected to heat treatment for forming the metal sintered material 4, such as a lead frame or an alumina substrate. The metal bump 3 can be made of gold (Au) or copper (Cu). The metal sintered material 4 can be made of a sintered material of silver (Ag) nanoparticles, gold nanoparticles, or nickel (Ni) nanoparticles, which have a lower sintering temperature than the softening point (about 300°C for a general lead frame) of the material constituting the mounting member 2 such as a lead frame, and can form a bond with high adhesive strength.

[0017] As shown in Fig. 1, in the power semiconductor device, a power semiconductor element 1 and a mounting member 2 are bonded together by a bonding material 5 consisting of a metal bump 3 and a metal sintered material 4. The metal bump 3 is bonded to an electrode pad 6 on the power semiconductor element 1, and is also bonded to the mounting member 2. The metal sintered material 4 is filled between the multiple metal bumps 3.

[0018] FIG. 2 is an explanatory diagram of a power semiconductor element constituting the power semiconductor device of FIG. 1, and is a schematic plan view of the surface of the power semiconductor element 1 on which the metal bumps 3 are formed in a state in which the bonding between the power semiconductor element 1 and the mounting member 2 shown in FIG. 1 has not been formed. In the example shown in FIG. 2, a three-terminal semiconductor element, for example, a field effect transistor, is formed, and electrode pads connected to the source electrode, drain electrode, and gate electrode are formed as electrode pads 6. In the case of a field effect transistor, a large current flows between the source electrode and the drain electrode, and a large current does not flow through the gate electrode. Therefore, the area of ​​the electrode pads 6S and 6D connected to the source electrode or the drain electrode is larger than the area of ​​the electrode pad 6G connected to the gate electrode, and the number of metal bumps 3 arranged on the electrode pads 6S and 6D is increased, and as an example, the metal bumps 3 are arranged in a lattice pattern. The number and size of the electrode pads 6 are appropriately changed according to the power semiconductor element.

[0019] FIG. 3 is an explanatory diagram of a power semiconductor element constituting the power semiconductor device of FIG. 1, and is a schematic cross-sectional diagram of the power semiconductor element 1 at a midpoint in the thickness of a bonding material 5 composed of a metal bump 3 and a metal sintered material 4, where a bond is formed between the power semiconductor element 1 and the mounting member 2 shown in FIG. 1.

[0020] As shown in FIG. 3, in the case of a field effect transistor, a large current flows between the source electrode and the drain electrode, so the areas of the electrode pads 6S and 6D connected to the source electrode and the drain electrode, respectively, are made large and a large number of metal bumps 3 are arranged. For example, the metal bumps 3 are arranged in a lattice pattern.

[0021] The metal sintered material 4 is disposed around each of the multiple metal bumps 3, filled between the multiple metal bumps 3, and is composed of a first region and a second region having different sintering densities. The metal sintered material 4 of this embodiment is configured such that the first region 4a having a predetermined range of sintering density is located around each of the metal bumps 3 in contact with the metal bumps 3, and the second region is located in a position in contact with the first region 4a. The second region 4b is configured to be located at least partially surrounded by the first region 4a. The second region 4b is configured to have a predetermined range of sintering density lower than the predetermined range of sintering density of the first region 4a.

[0022] The first region 4a and the second region 4b are not distinguished by a clear boundary as shown in Fig. 3, but the region with a relatively high sintering density is shown as the first region 4a, and the region with a lower sintering density than the first region 4a is shown as the second region 4b. According to the manufacturing method of the power semiconductor device of the present invention described later, the sintering density of the metal sintered material 4 is high near the metal bump 3 and decreases away from the metal bump 3. As a result, as shown in Fig. 3, the first region 4a of the metal sintered material 4 is located near the metal bump 3, and the second region 4b is located in contact with the first region 4a.

[0023] In a power semiconductor device, it is preferable to increase the number of metal bumps 3 and form a bond with high bond strength from the viewpoint of being able to pass a large current between the power semiconductor element 1 and the mounting member 2 and to maintain sufficient bond strength. On the other hand, it is necessary to relieve stress caused by temperature changes when the power semiconductor element 1 is in operation and when it is not in operation.

[0024] Therefore, in the power semiconductor device of this embodiment, the metal bumps 3 are arranged close to each other, for example in a lattice pattern, and the metal sintered material 4 (first region 4a) having a relatively high sintering density and high bonding strength is arranged around the metal bump 3 in contact with the metal bump 3. Furthermore, in the example shown in FIG. 3, the first regions 4a of the metal sintered material 4 are arranged to be in contact with each other, forming a connection with a higher bonding strength. On the other hand, the second region 4b of the metal sintered material 4 is located in contact with the first region 4a and arranged to include at least the region surrounded by the first region 4a, thereby alleviating stress on the metal bump 3 and the first region 4a of the metal sintered material 4, and a highly reliable connection can be formed. In particular, the second region 4b surrounded by the first region 4a of the metal sintered material 4 is arranged in a portion surrounded by the bond with high bonding strength composed of the metal bump 3 and the first region 4a, thereby alleviating stress on the metal bump 3 and the first region 4a located around it. Furthermore, by arranging the second region 4b in the peripheral portion that is not surrounded by the first region 4a, the effect of buffering the stress at the contact interface with the resin portion 7 is obtained.

[0025] In this way, if a high bonding strength and a highly reliable bond can be formed, the arrangement of the metal bumps 3 and the first regions 4a and second regions 4b of the metal sintered material 4 is not limited to the arrangement shown in Fig. 3. For example, the metal bumps 3 may be arranged in a staggered pattern, and the first regions 4a of the metal sintered material 4 may be arranged around and in the gaps between each of the metal bumps 3 to form an annular first region, and the second regions 4b of the metal sintered material 4 may be arranged surrounded by the annular first region.

[0026] Furthermore, as shown in FIG. 3, instead of placing one bonding material 5 in which a metal bump 3 and a metal sintered material 4 are integrated on one electrode pad, a configuration in which multiple bonding materials 5 in which a metal bump 3 and a metal sintered material 4 are integrated can be arranged.

[0027] The power semiconductor element 1 and the mounting member 2 joined as described above are sealed with a normal sealing resin to form a resin part 7. The resin part 7 can be configured to cover the entire power semiconductor element 1, or can be configured to expose a part of the surface of the power semiconductor element 1 from the resin part 7 as shown in FIG. 1. The power semiconductor device can also be configured to have a heat sink bonded to a part of the surface of the resin part 7 covering the entire power semiconductor element 1, or to a part of the surface of the power semiconductor element 1 exposed from the resin part 7. In particular, as shown in FIG. 4 in a state where a heat sink is bonded to the power semiconductor device of FIG. 1, a high heat dissipation effect is expected by using a configuration in which a heat sink 10 is bonded via an adhesive 9 to one surface of the power semiconductor element 1 exposed from the resin part 7.

[0028] As described above, in the power semiconductor device of the present invention, the bonding between the metal bump 3 and the first region 4a of the metal sintered material 4 is formed, so that the parasitic inductor component due to the bonding material 5 is small, the power semiconductor element 1 can be switched at high speed, and a power semiconductor device with low loss is obtained. Furthermore, a heat dissipation effect is expected through the multiple metal bumps 3, and it is also possible to expose the power semiconductor element 1 as usual and bond a heat sink, so a high heat dissipation effect is expected. Furthermore, by using a bonding material 5 having the second region 4b of the metal sintered material 4, stress on the metal bump 3 and the first region 4a of the metal sintered material 4 is alleviated, resulting in a highly reliable connection, and it is also possible to extend the life of the power semiconductor device.

[0029] Although one embodiment of the power semiconductor device of the present invention has been described above, the present invention is not limited to this.

[0030] (Manufacturing method for power semiconductor device) Next, an embodiment of a method for manufacturing a power semiconductor device, which is another aspect of the present invention, will be described. FIGS. 5 to 7 are explanatory diagrams of one embodiment of the method for manufacturing a power semiconductor device of the present invention, and the method for manufacturing the power semiconductor device shown in FIG. 1 described in the above embodiment will be described. First, a semiconductor element, for example, a field effect transistor, is formed in a semiconductor region or semiconductor substrate made of a wide gap semiconductor. FIG. 5 is an explanatory diagram of one embodiment of a power semiconductor element forming process of this embodiment. In the case of a field effect transistor, electrode pads are formed that are connected to the source electrode, drain electrode, and gate electrode, respectively. FIG. 5 shows a cross-sectional view of an electrode pad 6 that is connected to the source electrode or drain electrode through which a large current of the power semiconductor element 1 flows. A plurality of metal bumps 3 are formed on the electrode pad 6. The metal bumps 3 can be formed of stud bumps formed, for example, by a stud bump bonding device using gold wires or copper wires with a diameter of about 24 μm. The metal bumps 3 are arranged in a lattice shape with a pitch of about 0.15 mm. The power semiconductor element 1 shown in FIG. 1 can be formed by dividing a wide gap semiconductor substrate on which a plurality of power semiconductor elements 1 are formed.

[0031] Next, a paste 8 containing a metal sintered material is applied by air dispensing or the like to the joint portion of the mounting member 2 where the joint with the power semiconductor element 1 is formed. Fig. 6 is an explanatory diagram of one embodiment of the application process of this embodiment. The paste 8 applied to the mounting member 2 is adjusted so as to contain a sintered material of metal nanoparticles necessary for forming a metal sintered material without gaps between the mounting member 2 and the power semiconductor element or between the mounting members in the mounting process described later.

[0032] Using a flip chip bonding device, the electrode pads 6 of the power semiconductor element 1 and the joints of the mounting member 2 are arranged facing each other on the mounting member 2 on which a paste 8 containing a metal sintering material is applied, and the power semiconductor element 1 is placed on the mounting member 2. Here, the power semiconductor element 1 is pressed against the joints of the mounting member 2 while applying a load, so that the metal bumps 3 are pressed against the mounting member 2, and leveling can be performed to align the heights of the metal bumps 3. As an example, the metal bumps 3 after leveling are formed to have a diameter of about 55 μm and a height of about 20 μm. Note that the leveling to align the heights of the metal bumps 3 is not limited to the method using a flip chip bonding device. If leveling is not performed, the power semiconductor element 1 may be placed on the mounting member 2 by applying a load that does not deform the metal bumps 3.

[0033] Then, the paste 8 containing the metal sintering material is heated. When the paste 8 contains silver nanoparticles as the metal sintering material, for example, by heating at 250°C for about 60 minutes, the solvent contained in the paste 8 evaporates, and the highly reactive metal sintering material, for example, silver nanoparticles, comes into contact with each other, inducing a sintering phenomenon. FIG. 7 is an explanatory diagram of one embodiment of the mounting process of this embodiment. In this embodiment, the paste 8 is heated in a state in which the metal bumps 3 are in contact with the mounting member 2, so that sintering starts from the paste 8 in contact with the metal bumps 3, which have excellent thermal conductivity. The sintering progresses from the paste 8 in contact with each metal bump 3 to the paste 8 gradually separated from it. In this way, due to the difference in the time at which sintering starts, a difference in sintering density occurs in the formed metal sintering material 4. Specifically, the sintering density is high in the vicinity of the metal bumps 3 where sintering starts first, and the sintering density in the area where the start of sintering is delayed is relatively low.

[0034] As a result, as described in FIG. 3, the metal sintered material 4 includes a first region 4a having a predetermined range of sintered density located around each of the multiple metal bumps 3 in contact with the metal bumps 3, and a second region 4b located in contact with the first region 4a and at least a part of which is surrounded by the first region 4a. The second region 4b has a predetermined range of sintered density lower than the predetermined range of sintered density of the first region 4a. As described above, the difference in sintered density occurs due to the difference in the time when sintering is started, so the first region 4a and the second region 4b of the metal sintered body 4 are not distinguished by a clear boundary as shown in FIG. 3, and the region with a relatively high sintered density is shown as the first region 4a, and the region with a lower sintered density than the sintered density of the first region is shown as the second region 4b.

[0035] Therefore, although the distribution of the absolute values ​​of the sintered density will differ depending on the difference in heating temperature, etc., a first region 4a, which is a region with a relatively high sintered density, and a second region 4b, which is a region with a lower sintered density than the first region, will be formed.

[0036] Thereafter, the power semiconductor element 1 and the mounting member 2 connected as described above are sealed with a normal sealing resin to form a resin part 7. The resin part 7 can be configured to cover the entire power semiconductor element 1, or can be configured to expose a part of the surface of the power semiconductor element 1 from the resin part 7 as shown in FIG. 1. By dividing the mounting member 2 on which a plurality of power semiconductor devices are formed, a power semiconductor device in which the entire power semiconductor element 1 is covered, or a power semiconductor device in which a part of the surface of the power semiconductor element 1 is exposed from the resin part 7 as shown in FIG. 1 can be formed. When forming a power semiconductor device in which a part of the power semiconductor element 1 is exposed from the resin part 7, a fluorine-based film is sandwiched between the mold die in the sealing process, and the resin sealing is performed so that the sealing resin does not get between the film and the power semiconductor element 1. Alternatively, after sealing the entire power semiconductor element 1, a part of the sealing resin can be polished to expose a part of the power semiconductor element 1. Even if stress due to polishing is applied to the power semiconductor element 1 when a portion of the sealing resin is polished, a strong bond is formed by the metal bump 3 and the first region 4a of the metal sintered material 4, and further, the metal sintered material 4 is provided with the second region 4b, so that there is no particular problem with the bond between the power semiconductor element 1 and the mounting member 2.

[0037] A power semiconductor device with high heat dissipation efficiency can be formed by bonding a heat sink to a portion of the surface of the resin part 7 that covers the power semiconductor element 1. Also, if a heat sink 10 is bonded to a portion of the surface of the power semiconductor element 1 that is exposed from the resin part 7, a power semiconductor device with high heat dissipation efficiency can be formed as shown in FIG.

[0038] Although one embodiment of the method for manufacturing a power semiconductor device according to the present invention has been described above, the present invention is not limited to this. For example, the method for forming the metal bumps 3 is not limited to the method using a stud bump bonding device, and they can also be formed by a plating method. When the metal bumps 3 are formed by the plating method, the height of the metal bumps 3 is uniform, so leveling is not necessarily required. In addition, the size and arrangement of the metal bumps 3 can be changed as appropriate.

[0039] (summary) (1) One embodiment of a power semiconductor element of the present invention is a power semiconductor device including a power semiconductor element and a mounting member bonded to the power semiconductor element by a bonding material, the bonding material being composed of a metal bump and a metal sintered material, the metal bump being bonded to the power semiconductor element and the mounting member, the metal sintered material being filled between a plurality of the metal bumps and including a first region located around each of the metal bumps in contact with the metal bump, and a second region located in contact with the first region and at least a portion of which is surrounded by the first region, the second region being configured to have a sintered density lower than the sintered density of the first region.

[0040] According to the power semiconductor element of the present invention, it is possible to provide a power semiconductor device that maintains strength and provides highly reliable bonding.

[0041] (2) According to another embodiment, in the power semiconductor device of (1) above, the metal sintered material is a sintered body containing any one of silver nanoparticles, gold nanoparticles, and nickel nanoparticles.

[0042] (3) According to still another embodiment, in the power semiconductor device of (1) or (2) above, a resin part is provided that seals the power semiconductor element and the mounting member, and the resin part is configured to (a) cover the entire power semiconductor element, or (b) cover the power semiconductor element while exposing a portion of a surface of the power semiconductor element.

[0043] (4) According to yet another embodiment, the power semiconductor device of (3) above is configured to include a heat sink that is adhered to a portion of the surface of the resin portion that covers the entire power semiconductor element in the case of (a), or to a portion of the surface of the power semiconductor element that is exposed from the resin portion in the case of (b).

[0044] (5) One embodiment of the manufacturing method of the power semiconductor device of the present invention includes a power semiconductor element forming step of forming a power semiconductor element having a plurality of metal bumps on electrode pads; a coating step of preparing a mounting member and coating a paste containing a metal sintered material on a joint portion of the mounting member; and a mounting step of arranging the electrode pads of the power semiconductor element and the joint portion of the mounting member opposite each other, placing the power semiconductor element on the mounting member, heating the paste, and bonding the power semiconductor element to the mounting member with a bonding material composed of a plurality of the metal bumps and the metal sintered material filled between the metal bumps, wherein the mounting step is configured to be a step of bonding the power semiconductor element to the mounting member with the metal bumps and the metal sintered material so that the metal bumps are bonded to the joint portions of the mounting member, and the metal sintered material includes a first region located around each of the metal bumps in contact with the metal bumps, and a second region located around the first region in contact with the first region, at least a portion of which is surrounded by the first region and has a sintered density lower than the sintered density of the first region.

[0045] According to the manufacturing method of the power semiconductor device of the embodiment (5) above, it is possible to easily manufacture a power semiconductor device in which the bond between the power semiconductor element and the mounting member has good strength and high reliability.

[0046] (6) According to another embodiment of the present invention, in the method for manufacturing a power semiconductor device as described above in (5), the mounting step includes a leveling step for leveling the height of the bump electrodes.

[0047] (7) According to still another embodiment of the present invention, in the method for manufacturing a power semiconductor device according to (5) or (6) above, the coating step is a step of coating a paste containing any one of silver nanoparticles, gold nanoparticles, or nickel nanoparticles as the metal sintered material.

[0048] (8) According to still another embodiment of the present invention, in the method for manufacturing a power semiconductor device according to (5) or (6) above, the method further includes a sealing step of (a) covering the entire power semiconductor element, or (b) exposing a partial surface of the power semiconductor element and forming a resin part that covers the power semiconductor element, thereby sealing the power semiconductor element and the mounting member.

[0049] (9) According to still another embodiment of the present invention, in the method for manufacturing a power semiconductor device as described above in (8), a heat sink bonding step is included in which a heat sink is bonded to a portion of a surface of the resin part covering the entire power semiconductor element in the case of (a), or to a portion of a surface of the power semiconductor element exposed from the resin part in the case of (b). [Explanation of symbols]

[0050] 1 Power semiconductor element 2 Mounting materials 3 Metal bump 4. Metal sintering materials 4a 1st area 4b 2nd area 5 Bonding material 6, 6S, 6D, 6G electrode pads 7 Resin part 8. Paste 9 Adhesive 10 Heat sink

Claims

1. A power semiconductor device comprising: a power semiconductor element; and a mounting member joined to the power semiconductor element by a bonding material, The bonding material is composed of a metal bump and a metal sintered material, the metal bumps are bonded to the power semiconductor element and the mounting member; The metal sintered material is filled between the plurality of metal bumps, and includes a first region located around each of the metal bumps in contact with the metal bump, and a second region located in contact with the first region and at least a portion of which is surrounded by the first region, The second region has a sintered density that is lower than the sintered density of the first region. Power semiconductor device.

2. The metal sintered material is a sintered body containing any one of silver nanoparticles, gold nanoparticles, and nickel nanoparticles. The power semiconductor device according to claim 1.

3. a resin portion that seals the power semiconductor element and the mounting member, The resin portion is (a) covering the entire power semiconductor element; or (b) covering the power semiconductor element while exposing a portion of the surface of the power semiconductor element; 3. The power semiconductor device according to claim 1 or 2.

4. In the case of (a) above, on a part of the surface of the resin portion that covers the entire power semiconductor element, or In the case of (b), a surface of a part of the power semiconductor element exposed from the resin portion is A heat sink is provided to be bonded to the The power semiconductor device according to claim 3.

5. a power semiconductor element forming step of forming a power semiconductor element having a plurality of metal bumps on an electrode pad; A coating step of preparing a mounting member and coating a paste containing a metal sintering material on a joint portion of the mounting member; a mounting process in which the electrode pads of the power semiconductor element and the joints of the mounting member are arranged to face each other, the power semiconductor element is placed on the mounting member, the paste is heated, and the power semiconductor element is joined to the mounting member by a joint material composed of a plurality of the metal bumps and a metal sintered material filled between the metal bumps; Including, The mounting step includes: The metal bumps are joined to the joints of the mounting member, and A process of joining the power semiconductor element to the mounting member by the metal bumps and the metal sintered material so that the metal sintered material is formed, the metal sintered material including a first region located around each of the metal bumps in contact with the metal bumps, and a second region located around the first region in contact with the first region, at least a portion of which is surrounded by the first region, and having a sintered density lower than that of the first region. A method for manufacturing a power semiconductor device.

6. the mounting step includes a leveling step of aligning the heights of the bump electrodes; The method for manufacturing a power semiconductor device according to claim 5.

7. The coating step is a step of coating a paste containing any one of silver nanoparticles, gold nanoparticles, or nickel nanoparticles as the metal sintered material. The method for manufacturing a power semiconductor device according to claim 5 or 6.

8. (a) covering the entire power semiconductor element; or (b) a sealing step of exposing a part of a surface of the power semiconductor element and forming a resin part that covers the power semiconductor element to seal the power semiconductor element and the mounting member, The method for manufacturing a power semiconductor device according to claim 5 or 6.

9. In the case of (a) above, on a part of the surface of the resin portion that covers the entire power semiconductor element, or In the case of (b), a surface of a part of the power semiconductor element exposed from the resin portion is A heat sink bonding step of bonding a heat sink is included. The method for manufacturing a power semiconductor device according to claim 8.

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