Carrier tape

The two-layer carrier tape structure with openings in the second layer member addresses the issue of metal waste from semiconductor device outer leads by sealing waste between the layers, preventing product defects and maintaining humidity and preventing static electricity.

JP2025038357APending Publication Date: 2025-03-19RENESAS ELECTRONICS CORP
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Patent Information

Application Number
JP2023144911
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-07
Publication Date
2025-03-19

AI Technical Summary

Technical Problem

Existing carrier tapes risk metal waste from semiconductor device outer leads coming into contact with the tape body, leading to product defects and metal waste release.

Method used

A two-layer carrier tape structure with openings in the second layer member to seal waste between the layers, preventing contact with the product and maintaining humidity and preventing static electricity.

Benefits of technology

Effectively seals waste between the layers, preventing product defects, maintaining humidity, and preventing external waste intrusion.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a carrier tape that prevents dust falling off a product from causing a product defect.SOLUTION: There is provided a carrier tape including: a first layer member having a recess and a first opening at a center of the recess; a central portion disposed parallel to the recess; a step portion disposed around the central portion by a step that drops downward from the central portion; a second opening disposed in the central portion and overlapping with the first opening; a third opening disposed in the step portion; and a second layer member housed in the recess.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a carrier tape. [Background technology]

[0002] Carrier tape has been developed as a packaging material for protecting and transporting semiconductor devices. Patent Document 1 discloses a carrier tape having a carrier tape body in which multiple pockets for storing QFP·ICs, each of which has multiple outer leads protruding from the side of a resin encapsulant, are arranged side by side with a connecting portion between them to prevent bending of the outer leads. The corners of the pockets in the carrier tape body are formed with guides that engage with the corners of the resin encapsulant of the QFP·IC. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 10-287387 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the carrier tape of Patent Document 1 has a risk that the burrs of the outer lead come into contact with the carrier tape body, generating metal waste, which may cause product defects. Therefore, the object of the present disclosure is to provide a carrier tape that prevents waste that falls off from a product from causing product defects.

[0005] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0006] According to one embodiment, the carrier tape has a two-layer structure, with the openings formed in the second layer of material. Effect of the Invention

[0007] According to the embodiment, the dust can be sealed between the first layer member and the second layer member, and the dust can be prevented from coming into contact with the product. [Brief description of the drawings]

[0008] [Figure 1] 1A and 1B are a top view and a cross-sectional view of a carrier tape according to a first embodiment, and a schematic diagram showing a product. [Diagram 2] 1A and 1B are a top view and a cross-sectional view of a carrier tape according to a first embodiment, and a schematic diagram showing a product and its burrs. [Diagram 3] 2 is an exploded view of a first layer member and a second layer member of the carrier tape according to the first embodiment. FIG. [Figure 4] 11A and 11B are a top view and a cross-sectional view of a carrier tape according to a second embodiment. [Diagram 5] 11A and 11B are a top view and a cross-sectional view of a carrier tape according to a third embodiment. [Figure 6] 1A and 1B are top and cross-sectional views of a related carrier tape, and a schematic perspective view showing a related carrier tape and a product. [Figure 7] 1 is a cross-sectional view of a related carrier tape and a schematic diagram showing a product and its burrs. [Figure 8] 1A and 1B are top and cross-sectional views of another related carrier tape, and a schematic perspective view showing another related carrier tape and a product. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] For clarity of explanation, the following description and drawings have been omitted and simplified as appropriate. Note that in each drawing, the same elements are denoted by the same reference numerals, and duplicate explanations are omitted as necessary.

[0010] (Description of Carrier Tape According to First Embodiment) FIG. 1 is a schematic diagram showing a top view, a cross-sectional view, and a product of the carrier tape according to the first embodiment. FIG. 2 is a schematic diagram showing a top view, a cross-sectional view, and a product and a burr of the carrier tape according to the first embodiment. FIG. 6 is a schematic perspective view showing a top view, a cross-sectional view, and a related carrier tape and a product. FIG. 7 is a schematic diagram showing a cross-sectional view, and a product and a burr of the related carrier tape. FIG. 8 is a schematic perspective view showing a top view, a cross-sectional view, and a product of another related carrier tape and a product. The carrier tape according to the first embodiment will be described with reference to FIG. 1, FIG. 2, and FIG. 6 to FIG. 8.

[0011] As shown in the upper diagram of Fig. 6, a related carrier tape 601 has a recess 602 and an opening 603. As shown in the middle diagram of Fig. 6, a product such as a semiconductor chip 109 or a semiconductor package 110 is housed in the recess 602. The product has a burr 604 of the semiconductor chip 109 and a burr 605 of the semiconductor package 110. The opening 603 is formed to suck the product into the recess 602 by vacuum drawing.

[0012] 6, these recesses 602 are continuously formed in the associated carrier tape 601, so that a plurality of products are stored in the associated carrier tape 601. The associated carrier tape 601 storing the products is wound on a reel and transported.

[0013] As shown in the upper left diagram of Fig. 7, the burr 604 of the semiconductor chip 109 comes into contact with the associated carrier tape 601. As shown in the middle left diagram of Fig. 7, a part of the burr 604 falls off from the semiconductor chip 109. As shown in the lower left diagram of Fig. 7, the fallen burr 604 may cause a short circuit between the electrode 701 and the electrode 702. Therefore, the associated carrier tape 601 may cause a product defect.

[0014] As shown in the upper right diagram of Fig. 7, the burr 605 of the semiconductor package 110 comes into contact with the associated carrier tape 601. As shown in the middle right diagram of Fig. 7, a part of the burr 605 falls off from the semiconductor package 110. As shown in the lower right diagram of Fig. 7, the fallen burr 605 may land on the terminals of the semiconductor package and cause a short circuit between the terminals. Therefore, the associated carrier tape 601 may cause product defects.

[0015] As shown in the upper diagram of Fig. 8, it is possible to provide an opening 803 separate from the opening 803 in the recess 802 of the related carrier tape 801. As shown in the middle diagram of Fig. 8, the burrs 804 of the semiconductor chip 109 and the burrs 805 of the semiconductor package 110 can escape from the carrier tape 801 through the opening 803. However, this will deteriorate the moisture retention in the carrier tape 801. Also, it will become easier for dust from the outside to enter the carrier tape 801.

[0016] 1, the carrier tape 100 according to the embodiment has a two-layer structure including a first layer member 101 and a second layer member 104. The first layer member 101 has a recess 102 and a first opening 103. The second layer member 104 has a center portion 105 arranged parallel to the recess 102, and a step portion 106 arranged around the center portion 105 by a step 111 that drops downward from the center portion 105. The second layer member 104 also has a second opening 108 that overlaps with the first opening 103 arranged in the center portion 105, and a third opening 107 arranged in the step portion 106.

[0017] The recess 102 is provided to match the shape of a product, such as the semiconductor chip 109 or the semiconductor package 110. For example, the recess 102 is a square or rectangular shape in a plan view. Alternatively, the recess 102 may be a rectangle that accommodates the corners of the product and extends to match the terminals of the product so as to fit the product into it. There is no limitation on the shape of the recess 102, and it may be a circle or an ellipse.

[0018] The depth of the recess 102 is preferably deep enough to allow a double bottom to be formed using the second layer member 104, but shallow enough to allow a large amount of line to be wound onto the reel.

[0019] The first opening 103 is a vent for vacuuming the product. The first opening 103 is provided in the center of the recess 102. The first opening 103 is preferably circular or elliptical. The first opening 103 is preferably not as large as the product, but is large enough to allow ventilation.

[0020] The central portion 105 has a shape that is slightly smaller than the shape of the recess 102. The central portion 105 is sized to fit the product to some extent in order to place the product thereon. In addition, the central portion 105 is preferably parallel to the recess 102 so that the product is not biased. The central portion 105 has a second opening 108 so as not to interfere with the vacuum suction from the first opening 103. The second opening 108 is preferably of the same shape as the first opening 103, such as a circular or elliptical shape. A cylindrical member 112 is provided below the second opening 108. The second opening 108 has an outer circumference larger than the first opening 103, and is supported by the cylindrical member 112, so that the second layer member 104 can maintain a constant height relative to the first layer member 101.

[0021] Step portion 106 is located one step lower due to step 111. Therefore, when a product is placed on center portion 105, the terminals of the product do not come into contact with the bottom surface of step portion 106. This makes it less likely that burrs will cause debris to be generated. Furthermore, if recess 102 is rectangular, step portion 106 is preferably arranged in a rectangular shape along the outer periphery of the rectangular recess in which it is housed. If the recess is not rectangular, step portion 106 is preferably arranged along the outer periphery of the recess.

[0022] The step portion 106 also includes a third opening 107. As shown in the center of FIG. 1, the third opening 107 includes a return. The return may be formed of a part that is removed to form the opening during manufacturing. The third opening 107 is preferably arranged along the outer periphery of the recess in which it is housed, in the shape of a rectangle, a rectangle with rounded corners, an ellipse, or a shape combining two semicircles and a rectangle. The length of the third opening is preferably 200 μm or more, taking into consideration short circuits between terminals.

[0023] As shown in FIG. 2, assume that burrs 201 of semiconductor chip 109 and burrs 202 of semiconductor package 110 are peeled off, resulting in dust 203. As shown in the lower diagram of FIG. 2, in the carrier tape 100 according to the embodiment, dust 203 enters the third opening 107 and is trapped between the first layer member 101 and the second layer member 104. This prevents dust 203 from touching the terminals of the product and causing defects. In addition, the two-layer structure maintains humidity within the carrier tape 100 and prevents static electricity from being generated. In addition, the two-layer structure prevents dust from entering from the outside.

[0024] (Mounting example of carrier tape according to the first embodiment) 3 is an exploded view of a first layer member and a second layer member of the carrier tape according to the embodiment 1. With reference to FIG. 3, a mounting example of the carrier tape according to the embodiment 1 will be described.

[0025] 3, the carrier tape 100 is wound around a reel, so that a first layer member 101 in the form of a long, thin tape extends in one direction. The first layer member 101 includes a plurality of recesses 102. The recesses 102 are connected to each other by recesses 302 that extend linearly.

[0026] There are a plurality of second layer members 104 so as to be fitted into the plurality of recesses 102. The second layer members 104 are connected to each other by linear guide portions 301. The guide portions 301 fit into the linearly extending recesses 302. In this manner, a plurality of second layer members 104 are provided that fit into the plurality of recesses 102. A plurality of semiconductor chips 109 or semiconductor packages 110 are housed in the plurality of recesses 102 and the plurality of second layer members 104.

[0027] The manufacturing method of this carrier tape will be described. First, the first layer member 101 is formed using a mold. Next, the second layer member 104 is formed using another mold. At this time, the guide portion 301 is also formed. Next, a groove is provided in the center of the first layer member 101 so that the second layer member 104 can be accurately and easily fitted into the recess 102 of the first layer member 101, and the recess 302 is formed so that the guide portion 301 of the second layer member fits into it. Finally, the first layer member 101 and the second layer member 104 are overlapped, and the product is stored in the recess 102.

[0028] (Description of Carrier Tape According to Second Embodiment) 4 is a top view and a cross-sectional view of the carrier tape according to the second embodiment. The carrier tape according to the second embodiment will be described with reference to FIG.

[0029] As shown in FIG. 4, a burr 401 is formed in the third opening 107. The burr 401 faces outward from the center 105. That is, the burr 401 is provided from the inside to the outside of the second layer member 104. In this manner, dust adhering to the semiconductor chip 109 (or the semiconductor package 110) can be trapped in the space defined by the first layer member 101 and the second layer member 104. The presence of the burr can prevent the dust trapped in this space from re-adhering to the semiconductor chip 109 (or the semiconductor package 110).

[0030] (Description of Carrier Tape According to Third Embodiment) 5 is a top view and a cross-sectional view of the carrier tape according to the third embodiment. The carrier tape according to the third embodiment will be described with reference to FIG.

[0031] 5, in the carrier tape according to the third embodiment, adhesive 501 is applied to the bottom surface of recess 102. In this manner, dust adhering to semiconductor chip 109 (or semiconductor package 110) can be trapped in the space defined by first layer member 101 and second layer member 104. The presence of adhesive 501 makes it possible to prevent dust trapped in this space from adhering to adhesive 501 and re-adhering to semiconductor chip 109 (or semiconductor package 110).

[0032] The invention made by the inventor has been specifically described above based on the embodiments, but it goes without saying that the present invention is not limited to the embodiments already described, and various modifications are possible without departing from the gist of the invention. [Explanation of symbols]

[0033] 100 carrier tape, 101 first layer member, 102 recess, 103 first opening, 104 second layer member, 105 center portion, 106 step portion, 107 third opening, 108 second opening, 109 semiconductor chip, 110 semiconductor package, 111 step, 112 cylindrical member, 201 burr, 202 burr, 203 dust, 301 guide portion, 302 recess, 401 return, 501 adhesive, 601 related carrier tape, 602 recess, 603 opening, 604 burr, 605 burr, 701 electrode, 702 electrode, 801 related carrier tape, 802 recess, 803 opening, 804 burr, 805 burr

Claims

1. a first layer of material having a recess and a first opening at the center of the recess; a second layer member that is accommodated in the recess, the second layer member including a central portion that is arranged parallel to the recess, a stepped portion that is arranged around the central portion by a step that drops downward from the central portion, a second opening that is arranged in the central portion and overlaps with the first opening, and a third opening that is arranged in the stepped portion; A carrier tape comprising:

2. The carrier tape of claim 1 , wherein the recesses are rectangular.

3. The carrier tape according to claim 2 , wherein the step portion is arranged in a rectangular shape along an outer periphery of the rectangular recess in which the step portion is housed.

4. 3. The carrier tape of claim 2, wherein the third opening is arranged along an outer periphery of the rectangular recess in which it is housed in the shape of a rectangle, a rectangle with rounded corners, an oval, or a shape combining two semicircles and a rectangle.

5. The carrier tape of claim 1 , wherein the second opening has a larger perimeter than the first opening.

6. The carrier tape of claim 1 , wherein the second opening is barbed.

7. The carrier tape according to claim 6 , wherein the barbs are provided from an inner side toward an outer periphery of the second layer member.

8. The carrier tape according to claim 1 , wherein an adhesive is applied to a bottom surface of the recess of the first layer.

9. The recesses are multiple, The second layer includes a plurality of members, The second layer members are connected by a guide portion, The carrier tape according to claim 1 , further comprising a recess that fits into the guide portion between the plurality of recesses.

Citation Information

Patent Citations

  • Carrier tape

    JP1998287387A