Reservoir arithmetic element and machine learning method

JP2025042353APending Publication Date: 2025-03-27MITSUBISHI MATERIALS CORP
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Application Number
JP2023149312
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-14
Publication Date
2025-03-27

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【0014】 本発明によれば、回路が簡便で安価に作製可能であり、素子の小型軽量化が可能な安全で安定したリザバー演算素子、およびこれを用いた機械学習方法を提供することができる。

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Abstract

To provide safe and stable reservoir arithmetic elements whose circuits are simple and inexpensive to fabricate and whose elements can be made smaller and lighter, and a machine learning method using these elements.SOLUTION: A reservoir arithmetic element has a substrate, a gate electrode layer and a gate insulating layer formed in sequence on one side of the substrate, a source electrode layer and a drain electrode layer formed on one side of the gate insulating layer and spaced apart from each other, and a channel layer formed in contact with the gate insulating layer, the source electrode layer and the drain electrode layer, and the gate insulating layer contains LaZrO, the channel layer contains InO, and an electric double layer is formed in the region including the junction between the gate insulating layer and the channel layer.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a reservoir computing element and a machine learning method using the same. [Background technology]

[0002] In recent years, neural networks that mimic brain neural networks and artificial intelligence have been actively researched. For example, artificial intelligence techniques that utilize multi-layer neural networks including deep learning are known. These AI technologies generally require a large amount of computing resources, consume a lot of power, and require large-scale equipment, etc. For these reasons, there are high barriers to their use in small mobile devices, where power and size are limited.

[0003] On the other hand, another approach to neural networks is reservoir computing. This reservoir computing has a three-layer structure of an input layer, a recurrent layer, and an output layer, and the weights and thresholds between the input layer and the recurrent layer, and between the recurrent layer and the recurrent layer are constant, and machine learning is performed to calculate the weights and thresholds only between the recurrent layer and the output layer, allowing for high-speed calculations.

[0004] Furthermore, physical reservoir elements, in which the recurrent layer is replaced by physical phenomena, are also being considered. These reservoir elements use physical phenomena to perform the machine learning required for artificial intelligence (AI), and because they can perform calculations at ultra-high speeds compared to conventional large-scale computing elements, they are expected to be applied to edge AI computing.

[0005] Required properties for such a reservoir element include nonlinear response, short-term memory, and high dimensionality. Known physical reservoir elements include electrical and electronic elements that use neuromimetic circuits and memristors, and electrochemical elements that use the delayed response of ionic liquids and electrolytes (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2022-182198 A [Patent Document 2] JP 2023-013949 A Summary of the Invention [Problem to be solved by the invention]

[0007] However, the reservoir elements that have been investigated so far have had issues such as: (a) the devices are large and difficult to miniaturize, making them unsuitable for edge AI, which requires portability (mechanical, optical, and mechanical systems); (b) the circuits are complex and expensive (electrical and electronic systems); and (c) there are issues with safety and stability (biological and electrochemical systems).

[0008] The present invention has been made in consideration of the above background, and aims to provide a safe and stable reservoir computing element whose circuit can be easily and inexpensively fabricated and which can be made small and lightweight, as well as a machine learning method using the same. [Means for solving the problem]

[0009] In order to solve the above problems, a reservoir computing element according to one embodiment of the present invention proposes the following means. (1) A reservoir computing element according to a first aspect of the present invention includes a substrate, a gate electrode layer and a gate insulating layer formed in that order on one surface of the substrate, a source electrode layer and a drain electrode layer formed on one surface of the gate insulating layer and spaced apart from each other, and a channel layer formed in contact with the gate insulating layer, the source electrode layer, and the drain electrode layer, wherein the gate insulating layer contains LaZrO, the channel layer contains InO, and an electric double layer is formed in a region including a junction between the gate insulating layer and the channel layer.

[0010] (2) A second aspect of the present invention is characterized in that, in the reservoir computing element of the first aspect, in a current-voltage characteristic showing a change in a drain current value between the source electrode layer and the drain electrode layer in response to a change in a voltage value of the gate electrode layer crossing 0 V, the drain current value when the voltage value of the gate electrode layer is 0 V is larger when the voltage is decreasing than when the voltage is increasing.

[0011] (3) A third aspect of the present invention is characterized in that, in the reservoir computing element of the first or second aspect, the source electrode layer and the drain electrode layer contain at least one of Pt, Au, Ag, Cu, Al, and Ti, or ITO.

[0012] (4) A fourth aspect of the present invention is the reservoir computing element according to any one of the first to third aspects, characterized in that the gate insulating layer is a sputtered film or a coated and baked film.

[0013] Moreover, the machine learning method of one embodiment of the present invention proposes the following means. (5) A machine learning method of aspect 5 of the present invention is a machine learning method using a reservoir computing element of any one of aspects 1 to 4, characterized in that an electrical signal is input to the gate electrode layer and machine learning is performed using a drain current signal output from the drain electrode layer. Effect of the Invention

[0014] According to the present invention, it is possible to provide a safe and stable reservoir computing element whose circuit can be easily and inexpensively fabricated and which can be made small and lightweight, and a machine learning method using the same. [Brief description of the drawings]

[0015] [Figure 1] FIG. 2 is a schematic cross-sectional view showing a layer structure of a reservoir computing element according to one embodiment of the present invention. [Diagram 2] FIG. 2 is a schematic diagram showing the function of an electric double layer. [Diagram 3]1 is a graph showing the relationship between gate voltage (Vg) and drain current (Id) (Vg-Id characteristics). [Figure 4] FIG. 1 is an explanatory diagram showing a digit discrimination test, which is an example of a machine learning method using the reservoir computing element of this embodiment. [Diagram 5] 1 is a graph showing the results of an example. [Figure 6] 1 is a graph showing the results of an example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, a reservoir computing element, which is an embodiment of the present invention, and a machine learning method using the same will be described. Note that the following embodiment is specifically described to better understand the gist of the invention, and does not limit the present invention unless otherwise specified. In addition, the drawings used in the following description may show the main parts enlarged for convenience in order to easily understand the features of the present invention, and the dimensional ratios of each component may not be the same as the actual ones.

[0017] (Reservoir computing element) FIG. 1 is a schematic cross-sectional view showing the layer structure of a reservoir computing element according to one embodiment of the present invention. As shown in FIG. 1, the reservoir computing element 10 consisting of a thin film transistor according to this embodiment includes a gate electrode layer 12 and a gate insulating layer 13 formed in sequence on one surface 11a of a substrate 11, a source electrode layer 14 and a drain electrode layer 15 formed in sequence on one surface 13a of the gate insulating layer 13 and spaced apart from each other, and a channel layer 16 disposed between the source electrode layer 14 and the drain electrode layer 15 and formed so as to be in contact with the gate insulating layer 13, the source electrode layer 14, and the drain electrode layer 15.

[0018] In this embodiment, the source electrode layer 14, the drain electrode layer 15, and the channel layer 16 are formed side by side on one surface 13a of the gate insulating layer 13. Alternatively, for example, a channel layer may be formed so as to cover one surface of the gate insulating layer, and the source electrode layer and the drain electrode layer may be formed on top of the channel layer at a distance from each other.

[0019] For example, an insulating substrate or a semiconductor substrate can be used as the substrate 11. Examples of insulating substrates include highly heat-resistant glass and a silicon substrate (SiO 2 / Si substrate), alumina (Al 2 O 3 ) substrate, STO (SrTiO) substrate, and SiO on the surface of Si substrate 2 Examples of the semiconductor substrate include a Si substrate, a SiC substrate, and a Ge substrate. The thickness of the substrate 1 may be, for example, within a range of 10 μm to 1 mm.

[0020] The gate electrode layer 12 may be a single layer film made of one conductive film, or a laminated film made of two or more conductive films. The material of the conductive film constituting the gate electrode layer 12 may be, for example, a metal, an alloy containing the metal, or a metal oxide. Examples of the metal of the conductive film include platinum, gold, silver, copper, aluminum, molybdenum, palladium, ruthenium, iridium, tungsten, and titanium.

[0021] Examples of metal oxides for conductive films include indium tin oxide (ITO), ruthenium oxide (RuO 2 The thickness of the gate electrode layer 12 may be, for example, within a range of 10 nm to 500 nm. In order to increase the adhesion between the gate electrode layer 12 and the substrate 11, titanium oxide (TiO 2 ) may be further formed as an adhesion layer made of an oxide film such as SiO 2 .

[0022] The gate insulating layer 13 is a LaZrO-containing film that contains an oxide (LaZrO) containing lanthanum and zirconium. The LaZrO-containing film may be a sputtered film formed by a sputtering method, or may be a film formed by a coating and baking method.

[0023] The lanthanum content of the LaZrO-containing film constituting the gate insulating layer 13 is preferably equal to or less than the zirconium content. The lanthanum and zirconium contents of the LaZrO-containing film are, for example, within a range of 1:9 to 5:5 (atomic ratio). The LaZrO-containing film may contain hydrogen. The hydrogen content of the LaZrO-containing film is, for example, within a range of 2 atom% to 20 atom%.

[0024] The thickness of the gate insulating layer 13 is, for example, within the range of 10 nm to 500 nm. The hydrogen (H) content can be measured, for example, by Rutherford Backscattering Spectrometry (RBS analysis), Hydrogen Forward Scattering Spectrometry (HFS analysis), and Nuclear Reaction Analysis (NRA analysis) using Pelletron 3SDH manufactured by National Electrostatics Corporation.

[0025] The source electrode layer 14 and the drain electrode layer 15 may each be a single layer film made of one conductive film, or a laminated film made of two or more conductive films. For example, a metal, an alloy containing the metal, or a metal oxide can be used as the material of the conductive film. Examples of the metal and metal oxide may be the same as those of the gate electrode layer 12.

[0026] The thickness of the source electrode layer 14 and the drain electrode layer 15 may be, for example, in the range of 10 nm to 500 nm. The distance (interelectrode distance LT) between the source electrode layer 14 and the drain electrode layer 15 in the first direction (x direction in FIG. 1) in which they face each other may be, for example, in the range of 1 μm to 100 μm. The lengths of the source electrode layer 14 and the drain electrode layer 15 in the first direction (electrode length LS of the source electrode layer 14, electrode length LD of the drain electrode layer 15) may be, for example, in the range of 1 μm to 1000 μm, and preferably in the range of 10 μm to 200 μm.

[0027] The lengths in a second direction (y direction in FIG. 1 ) perpendicular to the lengths in the first direction of the source electrode layer 14 and the drain electrode layer 15 (electrode width WS of the source electrode layer 14, electrode width WD of the drain electrode layer 15) may each be, for example, in the range of 1 μm or more and 1000 μm or less, and preferably in the range of 10 μm or more and 100 μm or less.

[0028] The channel layer 16 is made of an InO-containing sputtered film that contains indium oxide (InO). The InO-containing sputtered film is crystalline. The shape of the crystal grains of the InO-containing sputtered film is, for example, columnar, spherical, or elliptical.

[0029] The average diameter of the InO crystal grains constituting the channel layer 16 is, for example, 10 nm or more, and preferably in the range of 10 nm to 10 μm. The average diameter of the crystal grains is the average of the longest diameters of the crystal grains obtained by observing the cross section of the InO-containing sputtered film with a TEM (transmission electron microscope). The thickness of the channel layer 16 is, for example, in the range of 10 nm to 200 nm. The channel layer 16 may be patterned to be a rectangle with one side measuring several tens to several hundreds of μm.

[0030] The operation of the reservoir computing element of this embodiment as described above will now be described. Representative characteristics required for a reservoir computing element are (a) nonlinearity, (b) short-term memory characteristics, and (c) high dimensionality. The reservoir computing element 10 of this embodiment utilizes an electric double-layer (EDL: Electric Double-Layer) ED generated in a region including the junction between the gate insulating layer 13 and the channel layer 16, and uses the drain current for reservoir computation.

[0031] FIG. 2 is a schematic diagram showing the function of an electric double layer. When a gate voltage is applied to the gate electrode layer 12, hydrogen ions in the gate insulating layer 13 made of LaZrO move to the vicinity of the interface (junction) with the channel layer 16 made of InO, forming an electric double layer ED. This induces a huge capacitance, and large carrier electrons are generated in the channel layer 16.

[0032] When the gate voltage is reduced, the hydrogen ions move away from the interface between the gate insulating layer 13 and the channel layer 16, and the capacitance of the electric double layer ED decreases, but because the movement of hydrogen ions is slower than that of electrons, the hydrogen ions remaining at the interface between the gate insulating layer 13 and the channel layer 16 continue to exist even when the gate voltage becomes 0 V. As a result, the capacitance does not become 0 F, and the drain current does not become 0 A either, resulting in hysteresis. This delay in the movement of hydrogen ions causes a relaxation phenomenon in which the response of the drain current to the application of a pulse voltage is also slightly delayed, and the nonlinearity, short-term memory characteristics, and high dimensionality required for a reservoir computing element are obtained.

[0033] The gate voltage (V g ) and drain current (I d ) Relationship with (I d -V g According to the graph of the characteristic, the reservoir calculation element 10 of this embodiment has a gate voltage (V g ) when 0V to 5V is applied g The increasing profile P1 and V g When comparing the decreasing profile P2, P2 is V gIt can be seen that the drain current is high except for around I = -2 V, and a large difference occurs at the gate voltage of 0 V. This difference provides the short-term memory characteristic required for the reservoir computing element 10. In addition, this hysteresis causes I d is V g It can be seen that the coefficient has a nonlinearity that does not change linearly with

[0034] Such an electric double layer ED is also suitable for high integration of the reservoir computing element 10 because it utilizes a phenomenon that occurs in a very thin region.

[0035] (Manufacturing method of reservoir computing element) When manufacturing the reservoir computing element 10 of the above-described embodiment, for example, the gate electrode layer 12 and the gate insulating layer 13 are laminated in this order on one surface 11a of the substrate 11. Next, the channel layer 16 is formed on one surface 13a of the gate insulating layer 13, and the source electrode layer 14 and the drain electrode layer 15 are formed so as to be in contact with the channel layer 16, thereby completing the manufacturing process.

[0036] The conductive film constituting the gate electrode layer 12 can be formed by a method that is used in conventional methods for forming gate electrodes of thin film transistors, such as a sputtering method, a vapor deposition method, a coating and baking method, etc. The coating and baking method is a method in which a coating film is formed by applying a coating liquid for forming a conductive film that forms a conductive film by heating, and then the coating film is heated to form a conductive film.

[0037] The LaZrO film constituting the gate insulating layer 13 can be formed by, for example, a sputtering method or a coating and baking method. In the case of the sputtering method, the LaZrO target is, for example, La 2 O 3 A sintered target made of a sintered body of LaZrO and ZrO can be used. Such a LaZrO target may further contain carbon. The carbon content is preferably within the range of 0.1 mass % to 5.0 mass %.

[0038] In the sputtering method, a mixed gas containing, for example, argon and oxygen can be used as the plasma gas supplied to the sputtering device. The content ratio of argon to oxygen is preferably within a range of, for example, 95:5 to 80:20 (partial pressure ratio). The plasma gas may further contain hydrogen gas or water vapor. The content ratio of the mixed gas of argon and oxygen to the hydrogen gas or water vapor is preferably within a range of, for example, 99:1 to 95:5 (partial pressure ratio).

[0039] The coating and baking method is a method in which a coating solution for forming a LaZrO-containing film, which generates a LaZrO-containing film by heating, is applied to form a coating film, and then the coating film is heated to form a LaZrO-containing film. As the coating solution for forming a LaZrO-containing film, for example, a solution containing a lanthanum source, a zirconium source, and propionic acid can be used.

[0040] The lanthanum source may be lanthanum acetate. The zirconium source may be zirconium butoxide. The total content of lanthanum and zirconium in the coating solution for forming a LaZrO-containing film is preferably in the range of 0.05 mol / kg to 2.0 mol / kg in terms of molar concentration of LaZrO.

[0041] The coating liquid for forming the LaZrO-containing film can be applied, for example, by spin coating. Alternatively, the thickness of the LaZrO-containing film can be adjusted by repeating the steps of applying the coating liquid for forming the LaZrO-containing film to form a coating film, calcining the coating film to form a calcined film, and then firing the film at the point when the calcined film laminate has a desired thickness. In this case, the calcination temperature is preferably in the range of 100° C. to 300° C., and the calcination temperature is preferably in the range of 300° C. to 500° C.

[0042] The InO-containing sputtered film that forms the channel layer 16 can be formed by using any of the following methods (1) to (4). (1) A method comprising: a film formation step of forming an InO-containing sputtered film to a thickness of 10 nm or more by a sputtering method using an InO target; and a heat treatment step of heating the InO-containing sputtered film at a temperature of 200° C. or more and 500° C. or less. (2) A method comprising: a deposition step of depositing an InO-containing sputtered film by a sputtering method using an InO target containing carbon; and a heat treatment step of heating the InO-containing sputtered film at a temperature of 200° C. or more and 500° C. or less. (3) A method comprising: a film formation step of forming an InO-containing sputtered film by a sputtering method using an InO target in the presence of water vapor or hydrogen gas; and a heat treatment step of heating the InO-containing sputtered film at a temperature of 200° C. or more and 500° C. or less. (4) A method comprising: a first film formation step of forming a LaZrO-containing sputtered film by a sputtering method; a second film formation step of forming an InO-containing sputtered film by a sputtering method using an InO target or an InO target containing carbon; and a heat treatment step of heating the InO-containing sputtered film at a temperature of 200° C. or higher and 500° C. or lower.

[0043] In the above method (1) for forming the channel layer 16, the InO target used in the film formation step is, for example, In 2 O 3 The InO-containing sputtered film formed in the film forming step preferably has a thickness of, for example, 100 nm or more.

[0044] In the above method (2) for forming the channel layer 16, the carbon-containing InO target used in the film formation step is, for example, In 2 O 3 The carbon content of the InO target containing carbon is preferably within the range of, for example, 0.1 mass % or more and 5.0 mass % or less.

[0045] The plasma gas supplied to the sputtering device may be, for example, a mixed gas containing argon and oxygen. The content ratio of argon to oxygen is preferably within a range of, for example, 95:5 to 80:20 (partial pressure ratio). The plasma gas may contain hydrogen gas or water vapor. The content ratio of the mixed gas of argon and oxygen to the hydrogen gas or water vapor is preferably within a range of, for example, 99:1 to 99:5 (partial pressure ratio).

[0046] In the above method (3) for forming the channel layer 16, the InO target used in the film formation step is, for example, In 2 O 3 The sintered body target may be a sintered body of the above. As a method for forming a film in the presence of water vapor or hydrogen gas, a method of supplying a gas containing hydrogen gas or water vapor as a sputtering gas to a sputtering device can be used. As the sputtering gas, a mixed gas containing hydrogen gas or water vapor, argon, and oxygen can be used. The content ratio of the mixed gas of argon and oxygen to the hydrogen gas or water vapor is preferably within a range of, for example, 99:1 to 99:5 (partial pressure ratio). The content ratio of argon and oxygen is preferably within a range of, for example, 95:5 to 80:20 (partial pressure ratio).

[0047] In the above method (4) for forming the channel layer 16, the method for forming the LaZrO-containing sputtered film by sputtering in the first film formation step is the same as the above-mentioned method for forming the LaZrO-containing sputtered film. The carbon-containing InO target used in the second step is, for example, InO, which is the same as the film formation step (2) above. 2 O 3 The InO target may be, for example, a sintered body made of InO and carbon, as in the film formation steps (1) and (3) above. 2 O 3 The sintered compact target may be made of a sintered compact of the above.

[0048] The plasma gas supplied to the sputtering device may be, for example, a mixed gas containing argon and oxygen. The content ratio of argon to oxygen is preferably within a range of, for example, 95:5 to 80:20 (partial pressure ratio). The plasma gas may contain hydrogen gas or water vapor. The content ratio of the mixed gas of argon and oxygen to hydrogen gas or water vapor is preferably within a range of, for example, 99:1 to 95:5 (partial pressure ratio). In addition, both or either one of the first film formation step and the second film formation step may be performed in the presence of water vapor or hydrogen gas.

[0049] In the above methods (1) to (4) for forming the channel layer 16, the heat treatment of the InO-containing sputtered film in the heat treatment step may be performed in the air. The heat treatment temperature is preferably in the range of 300° C. or more and 400° C. or less. The heat treatment time may be in the range of 0.5 hours or more and 1 hour or less. This heat treatment step may be performed after forming the channel layer 16, or after forming the source electrode layer 14 and the drain electrode layer 15 adjacent to the channel layer 16.

[0050] The channel layer 16 can be formed into a desired shape by photolithography.

[0051] The conductive film forming the source electrode layer 14 and the drain electrode layer 15 can be formed by, for example, a sputtering method, a vapor deposition method, or a coating and baking method. The coating and baking method is a method in which a coating film is formed by applying a coating liquid for forming a conductive film that generates a conductive film by heating, and then the coating film is heated to form a conductive film. As a method for forming the source electrode layer 14 and the drain electrode layer 15 into a desired shape, a wet etching method using photolithography, a dry etching method, a lift-off method, and a mask film formation method using a contact mask can be used.

[0052] (Machine learning methods) The machine learning method according to one embodiment of the present invention is performed using the reservoir computing element according to the embodiment described above. That is, an electrical signal is input to the gate electrode layer 12 of the reservoir computing element 10, and machine learning is performed using a drain current signal output from the drain electrode layer 15.

[0053] Specifically, for example, a plurality of time-series data are converted into a pulse voltage signal and applied to the gate electrode layer 12. Then, a drain current signal output from the drain electrode layer 15 is obtained as a response value.

[0054] 4 is an explanatory diagram showing a digit discrimination test, which is an example of a machine learning method using the reservoir computing element of this embodiment. For example, ten digits from 0 to 9 are divided into 7×4 blocks and digitized, and a pulse voltage corresponding to each block is applied to the gate electrode layer 12, and the time change of the drain current output from the drain electrode layer 15 is measured.

[0055] Then, of the seven sets of four-unit values ​​of the measured drain current, the seven last values ​​of the four units are extracted, and 7×10 weights and ten thresholds are prepared for machine learning, and ten output values ​​corresponding to the ten numbers from 0 to 9 are calculated. If the input number and the output number are the same, a correct answer of 1 is assigned, and if they are different, an incorrect answer of 0 is assigned, and the error with the output value is calculated and summed, and the weights and thresholds are recalculated so that the total value becomes small. This is repeated, and the calculation is repeated so that the error is as small as possible. In this recalculation, the error backpropagation method (BP method), gradient descent method, etc. are used. By such a method, machine learning can be performed using the reservoir computing element of this embodiment.

[0056] Although one embodiment of the present invention has been described above, this embodiment is presented as an example and is not intended to limit the scope of the invention. This embodiment can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. This embodiment and its modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and gist of the invention. EXAMPLES

[0057] The effect of the reservoir computing element of the present invention was verified.

[0058] A reservoir computing element of the embodiment was fabricated according to the manufacturing method of the reservoir computing element described above. First, the reservoir computing element was evaluated for nonlinearity, short-term memory characteristics, high dimensionality, and machine learning performance using a semiconductor parameter analyzer (4200A-SCS type: manufactured by Keithley Corporation). The transfer characteristics of the reservoir computing element were evaluated using the I d -V g As shown in the characteristics, V g V than the increasing profile P1 g The decreasing profile P2 was high and had a large hysteresis, and this confirmed the presence of nonlinearity.

[0059] Next, as a machine learning method, 16 sets of time-series data from "0000" to "1111" were each converted into a pulse voltage signal. The pulse interval of the pulse voltage signal was 5.5 ms, and the pulse height was 4.0 V. Then, while applying a drain voltage to the drain electrode layer, each pulse voltage signal was applied to the gate electrode layer, and each drain current was measured.

[0060] As an example, the time response characteristics of the drain current to the application of a 4-unit pulse voltage of "0001", "1001", "0011" and "1011", where the first pulse is 0 and 1, respectively, are shown in Fig. 5. According to the measurement results shown in Fig. 5, the maximum attained value of the 4th pulse of each output drain current for the different 4-unit pulses is larger in the lower graph where the first pulse is 1 than in the upper graph where the first pulse is 0 on both the left and right, and it was confirmed that the reservoir computing element of the embodiment has a short-term memory characteristic that reflects the past input (0 or 1) of the first pulse.

[0061] Next, the 16 data values ​​from "0000" to "1111" were converted into 4-unit pulse voltage signals and applied to the gate electrode layer, and the history of the resulting drain current was measured. The results are shown in Figure 6. According to the measurement results shown in FIG. 6, it was confirmed that the 16 drain current values ​​of 4 units could be distinguished from each other, and that the reservoir computing element has the high dimensionality required for the element.

[0062] Next, a discrimination test for ten numbers from 0 to 9 was conducted according to the method described in the embodiment of the machine learning method described above. Table 1 shows the weights W(h-z) and thresholds θz after the calculations were repeated until the error E was 0.01 or less. Table 2 shows the calculation results of the output Z for each number.

[0063] [Table 1]

[0064] [Table 2]

[0065] According to the results shown in Table 2, for any number from 0 to 9, the output number Z corresponds to the number, and the output number Z corresponds to 0 or a value close to 0. In other places where the output number Z does not correspond to the number, the output number Z corresponds to 1, and the accuracy rate is 100% with high accuracy. From these results, it was confirmed that the reservoir computing element of this embodiment functions as an AI capable of identifying numbers through machine learning. [Explanation of symbols]

[0066] 10...Reservoir computing element 11...Substrate 12...Gate electrode layer 13...Gate insulating layer 14...Source electrode layer 15...Drain electrode layer 16…Channel layer

Claims

1. a gate electrode layer and a gate insulating layer formed in this order on one surface side of the substrate; a source electrode layer and a drain electrode layer formed in this order on one surface side of the gate insulating layer and spaced apart from each other; and a channel layer formed in contact with the gate insulating layer, the source electrode layer, and the drain electrode layer; the gate insulating layer comprises LaZrO; the channel layer comprises InO; A reservoir computing element, characterized in that an electric double layer is formed in a region including a junction between the gate insulating layer and the channel layer.

2. The reservoir computing element of claim 1, characterized in that in a current-voltage characteristic showing a change in a drain current value between the source electrode layer and the drain electrode layer with respect to a change in a voltage value crossing 0 V of the gate electrode layer, the drain current value when the voltage value of the gate electrode layer is 0 V is larger when the voltage is decreased than when the voltage is increased.

3. 3. The reservoir computing element according to claim 1, wherein the source electrode layer and the drain electrode layer include at least one of Pt, Au, Ag, Cu, Al, and Ti, or ITO.

4. 3. The reservoir computing element according to claim 1, wherein the gate insulating layer is a sputtering film or a coating and baking film.

5. A machine learning method using the reservoir computing element according to claim 1 or 2, A machine learning method, comprising: inputting an electrical signal to the gate electrode layer; and performing machine learning using a drain current signal output from the drain electrode layer.

Citation Information

Patent Citations

  • Reservoir and information processing system

    JP2022182198A

  • Synapse element, reservoir computing device including the sane, and reservoir computing method using the same

    JP2023013949A