Laminate structure, semiconductor device, electronic apparatus, and system

Abstract

To provide a laminate structure having excellent crystalline properties useful for a semiconductor device or the like.SOLUTION: A laminate structure is configured such that a crystal film is laminated directly or via another layer on a crystal substrate containing, as a main component, silicon or silicon-containing compound on a part or all of the surface thereof. The part or all of the surface has (111) orientation. For example, the crystal film is applied to a semiconductor device or the like by using a laminate structure containing, as a main component, a metal oxide containing germanium.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a laminated structure useful for a semiconductor device. [Background technology]

[0002] Ga2O3 has been attracting attention as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices.

[0003] However, Ga2O3 has the problem that it is difficult to fabricate a p-type semiconductor, and it is not easy to make it inexpensive, so there are still many challenges to overcome before it can be widely used. In recent years, rutile germanium dioxide (r-GeO2) has been studied as a new UWBG semiconductor (band gap 4.44-4.68 eV). Rutile germanium dioxide can be used as n-type and p-type semiconductors and can be produced inexpensively, so it is expected to be a UWBG semiconductor to replace Ga2O3. For example, a laminated structure in which an r-GeO2 crystal film is laminated on an r-TiO2 (001) substrate has been studied (Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3). However, Non-Patent Document 2 was submitted as an Erratum after the peer review of Non-Patent Document 1 (Non-Patent Document 2), and it was found that the crystal grains (abnormal grains) described in Non-Patent Document 1, Patent Document 1, Patent Document 2, and Patent Document 3 were rutile germanium dioxide crystals, and the other parts were amorphous phases. In other words, only the amorphous phase was formed in most of the material, and even if a crystal phase was formed, crystal grains were only formed in a part of the material. In addition, the r-TiO2(001) substrate was expensive and was still not satisfactory. In addition, the r-TiO2(001) substrate had a problem of poor heat dissipation. Therefore, a method to produce crystals with excellent crystallinity and to produce crystals on a substrate with excellent heat dissipation was eagerly awaited. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Takane, K. Kaneko, “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural properties” Applied Physics Letters Vol.119, pp.062104(1-6) (2021). [Non-Patent Document 2] Takane, K. Kaneko, Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its structural properties” Applied Physics Letters Vol.120, 099903(1-3) (2022). [Patent documents]

[0005] [Patent Document 1] International Publication No. 2023 / 008454 [Patent Document 2] International Publication No. 2023 / 008453 [Patent Document 3] International Publication No. 2023 / 008452 Summary of the Invention [Problem to be solved by the invention]

[0006] An object of the present invention is to provide a layered structure having excellent crystallinity that is useful for semiconductor devices and the like. [Means for solving the problem]

[0007] As a result of intensive research to achieve the above-mentioned object, the inventors have newly developed a mist CVD apparatus using a guide partition, and by using the mist CVD apparatus using the guide partition, they have succeeded in creating a laminated structure in which a crystal film is laminated, either directly or via another layer, on a crystal substrate whose surface part or all of which contains silicon or a silicon-containing compound as a main component, and in which part or all of the surface has a (111) orientation and the crystal film contains a metal oxide containing germanium as a main component. They have found that the obtained laminated structure can be easily manufactured at low cost, has excellent crystallinity, and is useful for semiconductor devices, etc., and have discovered that such a laminated structure can solve the above-mentioned conventional problems in one fell swoop. After obtaining the above findings, the present inventors conducted further studies and completed the present invention.

[0008] That is, the present invention relates to the following inventions. [1] A laminate structure in which a crystal film is laminated, directly or via another layer, on a crystal substrate whose surface part or all of which contains silicon or a silicon-containing compound as a main component, wherein the surface part or all of which has a (111) orientation, and the crystal film contains a metal oxide containing germanium as a main component. [2] The laminate structure according to [1] above, wherein the crystal film has one or more crystal structures selected from the group consisting of orthorhombic, tetragonal and trigonal. [3] The layered structure according to [1], wherein the crystal film has a tetragonal crystal structure. [4] The crystal film is 100 μm 2 The crystal film according to [1] above, having an area of ​​at least 100 nm. [5] The laminate structure according to [1], wherein the crystal film has a thickness of 1 μm or more. [6] The laminate structure according to [1], wherein the crystal film has a surface roughness of 25 nm or less. [7] The laminate structure according to [1] above, which is a single crystal film. [8] The laminated structure according to [1], wherein the crystal substrate is Si or SiC. [9] A semiconductor device including a laminated structure, characterized in that the laminated structure is the laminated structure described in [1] above.

[10] The semiconductor device according to [9] above, which is a power device.

[11] The semiconductor device according to [9], which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT) or a light emitting diode (LED).

[12] An electronic device including a semiconductor device, characterized in that the semiconductor device is the semiconductor device described in [9] above.

[13] A system including an electronic device, characterized in that the electronic device is the electronic device described in [9] above. Effect of the Invention

[0009] The laminated structure of the present invention is useful for semiconductor devices and the like, and exhibits excellent crystallinity. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a schematic diagram showing an example of a film-forming apparatus that can be suitably used in the present invention. [Diagram 2] FIG. 1 is a schematic diagram showing an atomization device preferably used in the present invention. [Diagram 3] FIG. 2 is a diagram showing the results of XRD diffraction in Example 1. [Figure 4] FIG. 2 is a diagram showing an AFM image in Example 1. [Diagram 5] FIG. 2 is a diagram showing an SEM image in Example 1. [Figure 6] FIG. 2 is a diagram showing an EDS image in Example 1. [Figure 7] FIG. 1 shows the results of XRD diffraction in Example 2. [Figure 8] FIG. 13 is a diagram showing the results of XRD diffraction in Example 3. [Figure 9] FIG. 1 is a diagram illustrating a preferred example of a Schottky barrier diode (SBD) according to the present invention. [Figure 10] 1 is a diagram illustrating a preferred example of a high electron mobility transistor (HEMT) of the present invention. [Figure 11] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. [Figure 12] FIG. 1 is a diagram illustrating a preferred example of a junction field effect transistor (JFET) of the present invention. [Figure 13] 1 is a diagram illustrating a preferred example of an insulated gate bipolar transistor (IGBT) according to the present invention; [Figure 14] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a light-emitting element (LED) of the present invention. [Figure 15] FIG. 1 is a diagram illustrating a preferred example of a junction barrier Schottky diode (JBS) of the present invention. [Figure 16] FIG. 2 is a schematic cross-sectional side view of a spray device preferably used in the present invention. [Figure 17] FIG. 13 is a diagram showing the results of XRD diffraction in Example 4. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The laminated structure of the present invention is a laminated structure in which a crystal film is laminated directly or via another layer on a crystal substrate whose surface part or all of which contains silicon or a silicon-containing compound as a main component, and is characterized in that part or all of the surface is (111) oriented, and the crystal film contains a metal oxide containing germanium as a main component. The crystal film preferably has one or more crystal structures selected from orthorhombic, tetragonal, and trigonal, and more preferably has a tetragonal crystal structure. Examples of the tetragonal structure include a rutile structure. Examples of the trigonal structure include an α-quartz structure. According to such a preferred range, the interface is better, the thermal conductivity is more excellent, and the semiconductor properties are also more excellent. In addition, when the crystal film is 100 μm thick, 2 It is preferable that the crystal film has an area of ​​1 μm or more. In the present invention, the thickness of the crystal film is preferably 1 μm or more. It is also preferable that the crystal film is a single crystal film. According to such a preferable range, a crystal having better semiconductor properties can be realized, and the withstand voltage can be improved. Also, the semiconductor device can be manufactured more industrially advantageously. It is also preferable that the surface roughness of the crystal film is 25 nm or less. By making the surface roughness to be such a preferable value, when the laminated structure is applied to a semiconductor device, the semiconductor device can be given better electrical properties such as withstand voltage. The surface roughness (RMS) refers to a value calculated based on JIS B0601 using the surface shape measurement results for a 10 μm square area by an atomic force microscope (AFM). In the present invention, it is more preferable that the crystal substrate is Si or SiC. According to such a preferable range, the heat dissipation can be improved.

[0012] In this specification, the word "film" can be read as "layer". The term "laminated structure" refers to a structure including one or more crystal layers, and may include layers other than the crystal layer (e.g., an amorphous layer). The crystal layer is preferably a single crystal layer, but may be a polycrystalline layer. In this specification, the orientation state can be confirmed by X-ray diffraction. More specifically, for example, when the crystal is oriented in the (111) plane, it can be determined that the crystal is oriented in the (111) plane when the integrated intensity ratio of the peak derived from the (111) plane to the peak derived from other crystal planes is larger than the integrated intensity ratio of the peak derived from the (111) plane of the same randomly oriented crystal to the peak derived from other crystal planes. In the present invention, it is preferable that the crystal film contains a metal oxide containing germanium as a main component. According to such a preferable range, the interface can be made better, and the semiconductor properties can be made better. In the present invention, it is more preferable that the crystal substrate is silicon or a silicon-containing compound. According to such a preferable range, the heat dissipation property can be made better.

[0013] The term "main component" in the present invention means that the content of germanium oxide (germanium oxide) in the crystal film is 50% or more in terms of composition ratio in the crystal film. In an embodiment of the present invention, the content of germanium oxide in the crystal film is preferably 70% or more, more preferably 90% or more in terms of composition ratio in the crystal film. According to such a preferred range, the semiconductor characteristics can be improved. The metal oxide containing germanium is not particularly limited as long as it is an oxide containing oxygen and germanium. The crystal film may also contain other metals other than germanium. Examples of the other metals include metals of Group 14 of the periodic table other than germanium (such as tin or silicon) and metals of Group 4 of the periodic table (such as titanium, zirconia or hafnium). The atomic ratio of germanium in the metal elements in the crystal film is not particularly limited as long as it is greater than 0.5. In an embodiment of the present invention, the atomic ratio of germanium in the metal elements in the crystal film is preferably 0.7 or more, more preferably 0.9 or more. By setting the atomic ratio of germanium in such a preferred range, a crystal film having better electrical properties can be realized.

[0014] The crystal film in the present invention preferably has one or more crystal structures selected from orthorhombic, tetragonal and trigonal crystal structures, and the crystal film preferably has a tetragonal crystal structure. In this preferred range, the interface becomes better, the thermal conductivity can be improved, and the semiconductor properties can be improved. In the present invention, the crystal film has an area of ​​100 μm 2 It is preferable that the area is 100 mm or more. 2It is more preferable that the crystal has an area of ​​0.5 μm or more. According to such a preferred range, the semiconductor device can be manufactured with more industrial advantages. In the present invention, it is preferable that the crystal is a single crystal. Furthermore, the film thickness of the crystal is not particularly limited as long as it does not impede the object of the present invention, but in the present invention, it is preferably 0.5 μm or more, and more preferably 1 μm or more. According to these preferred ranges, a crystal having better semiconductor properties can be realized, and the withstand voltage can be improved.

[0015] The crystal film can be more easily obtained by forming the crystal film and its mixed crystal film by using, for example, a film forming apparatus shown in FIG. 1. In addition, it is also possible to appropriately perform doping using the film forming apparatus. The doped crystal film can be suitably used as a semiconductor film or semiconductor layer, and an n-type dopant or a p-type dopant can be applied to conventional doping means in oxide semiconductors. Examples of the n-type dopant include antimony (Sb), arsenic (As), bismuth (Bi), fluorine (F), niobium (Nb), vanadium (V), tantalum (Ta), or tungsten (W). Examples of the p-type dopant include aluminum (Al), gallium (Ga), or indium (In). In the present invention, the laminate structure thus obtained is also included in the present invention.

[0016] The crystal substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate, an insulating substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. The crystal substrate may be a substrate having a metal film on its surface. In addition, when the crystal substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystal structure of the crystal substrate is also not particularly limited as long as it does not impede the object of the present invention. Examples of the crystal structure of the crystal substrate include a hexagonal crystal structure, a cubic crystal structure, and a tetragonal crystal structure. Examples of the crystal substrate having a hexagonal crystal structure include a GaN substrate, a SiC substrate, or a sapphire substrate (such as an a-plane sapphire, a c-plane sapphire, an m-plane sapphire, and an r-plane sapphire substrate). Examples of the crystal substrate having a tetragonal crystal structure include a GeO2 substrate, a SrTiO3 substrate, a TiO2 substrate, or a MgF2 substrate. Examples of the crystal substrate having a cubic crystal structure include a Si substrate or a SiC substrate. In an embodiment of the present invention, the substrate preferably contains silicon or a silicon-containing compound as a main component, and the crystalline substrate is preferably Si or SiC. The substrate containing silicon or a silicon-containing compound as a main component may be, for example, a Si substrate or a SiC substrate. The Si substrate may be, for example, a conductive substrate containing a dopant such as phosphorus (P), arsenic (As), antimony (Sb) or boron (B). The SiC substrate may be, for example, a conductive substrate containing a dopant such as phosphorus (P) or boron (B). The crystalline substrate may have an off-angle, and specifically, for example, an off-angle of 0.1° or more and 10° or less. According to such a preferred range, the ease of manufacture can be further improved, the crystallinity can be improved, the heat dissipation can be improved, and the substrate can be more easily applied to semiconductor devices and the like.

[0017] The laminated structure is used as it is or after a known processing means such as peeling off of the substrate is applied, for example, by using a known means for a semiconductor device. Examples of the semiconductor device include a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED). The semiconductor device may be a module equipped with the semiconductor device, or an electronic device equipped with the semiconductor device and its parts, and is useful for various applications, and is preferably applied to a power device in particular. The semiconductor device can be classified into a horizontal element (horizontal device) in which an electrode is formed on one side of the semiconductor layer, and a vertical element (vertical device) in which an electrode is formed on both the front and back sides of the semiconductor layer, and in the present invention, the semiconductor device can be suitably used for both a horizontal device and a vertical device.

[0018] Examples of semiconductor devices preferably used in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. Note that the following is a preferred example in which a crystal layer containing a metal oxide containing germanium as a main component in the laminate structure is used as a semiconductor layer.

[0019] 9 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.

[0020] FIG. 10 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121a having a wide bandgap, an n-type semiconductor layer 121b having a narrow bandgap, an n+-type semiconductor layer 121c, a p-type semiconductor layer 123, a gate electrode 125a, a source electrode 125b, a drain electrode 125c, and a substrate 129.

[0021] 11 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. The p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.

[0022] FIG. 12 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b and a drain electrode 145c.

[0023] FIG. 13 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

[0024] (LED) An example of the semiconductor device of the present invention being a light emitting diode (LED) is shown in Fig. 14. The semiconductor light emitting device of Fig. 14 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light emitting layer 163 is laminated on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is laminated on the light emitting layer 163. A light-transmitting electrode 167 that transmits light generated by the light emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is laminated on the light-transmitting electrode 167. The semiconductor light emitting device of Fig. 14 may be covered with a protective layer except for the electrode portion.

[0025] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). More specifically, examples include In2O3, ZnO, SnO2, Ga2O3, TiO2, CeO2, or mixed crystals of two or more of these, or doped materials thereof. The translucent electrode can be formed by providing these materials by a known means such as sputtering. After the translucent electrode is formed, thermal annealing may be performed to make the translucent electrode transparent.

[0026] In the semiconductor light-emitting element of FIG. 14, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and by passing a current through both of them to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, the light-emitting layer 163 emits light.

[0027] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, Ag, or the like, or alloys thereof, metal oxide conductive films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), or the like, organic conductive compounds such as polyaniline, polythiophene, or polypyrrole, or mixtures thereof, etc. The method for forming the electrode film is not particularly limited, and the electrode can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating, physical methods such as vacuum deposition, sputtering, and ion plating, and chemical methods such as CVD and plasma CVD, etc., taking into consideration the suitability of the material.

[0028] FIG. 15 shows a main part of a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The JBS in FIG. 15 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+ type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field relaxation region 1060. The Schottky electrode 1030 includes a metal layer 1030a, a metal layer 1030b, and a metal layer 1030c. In the semiconductor device in FIG. 15, the outer end of the metal layer 1030a and / or the metal layer 1030b as the second electrode layer is located outside the outer end of the metal layer 1030c as the first electrode layer. In the semiconductor device in FIG. 15, the region of the electric field relaxation region 1060 includes at least two electric field relaxation regions 1060 in a plane including at least a part of the portion of the second electrode layer located outside the outer end of the first electrode layer, and the outer end of the second electrode. In the semiconductor device of FIG. 15, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.

[0029] The means for forming each layer in Fig. 15 is not particularly limited as long as it does not impede the object of the present invention, and may be any known means. For example, a means for forming a film by a vacuum deposition method, a CVD method, a sputtering method, or various coating techniques, followed by patterning by a photolithography method, or a means for directly patterning by a printing technique, etc., may be mentioned. EXAMPLES

[0030] Example 1 Fig. 1 is a diagram showing an example of a preferred embodiment of a film-forming apparatus when the atomizing device of the present invention is used as a film-forming atomizing stage. The film-forming apparatus 19 is composed of a film-forming sample 20, a sample stage 21, a carrier gas source 22a, a carrier gas source 22b, a flow rate control valve 23a, a flow rate control valve 23b, a film-forming chamber 27, a heater 28, and an atomizing device 30. The atomizing device 30 is composed of a raw material partition 24, a raw material liquid for atomization 24a, an ultrasonic transmission base material 24b, a stage 24c, an ultrasonic vibrator 26, a guide partition 31, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36. Fig. 2 is a diagram showing an example of another preferred embodiment of a film-forming apparatus when the atomizing device of the present invention is used as a film-forming atomizing stage. The atomizing device 30 is composed of a raw material partition wall 24, a raw material liquid for atomization 24a, an ultrasonic transmission substrate 24b, a stand 24c, an ultrasonic vibrator 26, a guide partition wall 31, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36. The sample stage 21 is made of quartz, and the surface on which the film-forming sample 20 is placed is inclined from the horizontal plane. By making both the film-forming chamber 27 and the sample stage 21 from quartz, it is possible to prevent impurities from the device from being mixed into the crystal film formed on the film-forming sample 20. The raw material solution 24a is contained in the mist generating source 24. The guide partition wall 31 is in contact with the ultrasonic transmission substrate 38. Figure 16 is a schematic diagram showing a cross-sectional view of the atomizing device used in the present invention as seen from the side. The atomizing device 30 in Figure 16 is composed of a raw material partition wall 24, an ultrasonic transmission substrate 24b, a stand 24c, an ultrasonic vibrator 26, a guide partition wall 31, and an ultrasonic transmission liquid tank 35. The guide partition 31 is in contact with the ultrasonic wave transmission liquid tank 35. By using the guide partition 31, the ultrasonic waves generated by the ultrasonic transducer 26 are transmitted to the raw material partition 24 more efficiently.

[0031] Next, a Si(111) substrate with a square shape of 10 mm on each side and a 3C-SiC(111) thin film with an average thickness of 900 nm was placed on the sample stage 21 as the film-forming sample 20, and the heater 28 was operated to raise the temperature in the film-forming chamber 27 to 750°C. The thermal conductivity of the 3C-SiC(111) thin film was 190 W / mK, and the thermal conductivity of the Si(111) substrate was 163 W / mK. Next, the flow rate control valve 23 was opened to supply carrier gas from the carrier gas source 22 into the film-forming chamber 27, and the atmosphere in the film-forming chamber 27 was sufficiently replaced with the carrier gas, after which the flow rate of the carrier gas was adjusted to 3 L / min. Oxygen gas was used as the carrier gas.

[0032] Next, the ultrasonic vibrator 26 was vibrated at 3.0 MHz, and the vibration was propagated to the raw material solution 24a through the ultrasonic transmitter 25a, thereby atomizing the raw material solution 24a to generate raw material fine particles. The raw material fine particles were introduced into the film formation chamber 27 by the carrier gas, reacted in the film formation chamber 27, and formed a tetragonal GeO2 crystal film on the film formation sample 20 by the CVD reaction on the film formation surface of the film formation sample 20. The film thickness was 1.2 μm.

[0033] The obtained GeO2 crystal film was measured using an X-ray diffraction apparatus. Figure 3 shows the XRD diffraction results. As is clear from Figure 3, the obtained crystal film was a GeO2 single crystal film with a (111)-oriented tetragonal rutile structure. The half-width of 2θ-ω was 68 arcsec, and a GeO2 crystal film with good crystallinity was formed on the 3C-SiC(111) thin film grown on the Si(111) substrate.

[0034] In addition, when the surface of the obtained GeO2 crystal film was observed using an atomic force microscope (AFM), it was found that the surface roughness (RMS) based on JIS B0601 was 0.26 nm, as shown in Figure 4, indicating excellent surface smoothness.

[0035] The surface of the obtained GeO2 crystal film was observed using SEM. Figure 5 shows an SEM image. As is clear from Figure 5, GeO2 crystals with excellent surface smoothness and good crystallinity were formed. The surface of the obtained crystal film was also evaluated using EDS, and as shown in Figure 6, a crystal film was formed over the entire surface to a thickness of 100 μm. 2 It was found that the above-mentioned formation area was formed.

[0036] Example 2 A crystalline film was obtained in the same manner as in Example 1, except that the film formation temperature was 800°C. The XRD diffraction results of the obtained crystalline film are shown in Figure 7. As is clear from Figure 7, the obtained crystalline film was a GeO2 crystalline film having orthorhombic, tetragonal and trigonal crystal structures. The film thickness was 1.4 μm.

[0037] Example 3 A crystalline film was obtained in the same manner as in Example 1, except that the carrier gas was increased. The XRD diffraction result of the obtained crystalline film is shown in Figure 8. As is clear from Figure 8, the obtained crystalline film was a GeO2 crystalline film having a trigonal crystal structure. The film thickness was 1.2 μm. Example 4 A Si (111) substrate was used, and the concentration of antimony chloride was adjusted to 3 mol% relative to the germanium dioxide raw material concentration in the atomization raw material liquid 24a. Film formation was performed in the same manner as in Example 1, except that the film formation temperature was set to 750°C, nitrogen gas was used as the carrier gas, and the flow rate of the carrier gas was reduced. The result of 2θ / ω by XRD diffraction measurement of the obtained crystal film is shown in FIG. 17. As is clear from FIG. 17, the obtained crystal film was a GeO2 single crystal film having a trigonal crystal structure. The film thickness was 2.0 μm.

[0038] (Test Example 1) After heating Example 1 of the present invention at 850°C for 20 minutes, the temperature change was measured in the air using a radiation thermometer "TMHX-CGE2400-0300H4.5". As a result, the surface temperature of Example 1 was 50°C 20 seconds after it was taken out into the air, and 45°C after 30 seconds. In addition, when a comparative example 1 was used in which r-GeO2(001) crystals were grown on an r-TiO2(001) substrate, the surface temperature was 290°C 20 seconds after it was taken out into the air, the surface temperature was 77°C 30 seconds after it was taken out, and the surface temperature was 45°C after 90 seconds. From this result, it can be seen that Example 1 of the present invention has superior heat dissipation properties. [Industrial Applicability]

[0039] The laminated structure of the present invention is suitably used in, for example, semiconductor devices. [Explanation of symbols]

[0040] 19 Film forming equipment 20 Film sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow control valve 23b Flow control valve 24 Raw material bulkhead 24a Raw material liquid for atomization 24b Ultrasonic transparent base material 24c units 26 Ultrasonic transducer 27 Film forming room 28 Heater 30 Atomization device 31 Guide bulkhead 33 Dilution gas supply pipe 34 Carrier gas supply pipe 35 Ultrasonic transmission fluid tank 36 Ultrasonic transmission fluid 37 Film forming room 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator Layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulating layer 115a Gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a Wide band gap n-type semiconductor layer 121b Narrow band gap n-type semiconductor layer 121c n+ type semiconductor layer 123 p-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 129 Board 131a n-type semiconductor layer 131b First n+ type semiconductor layer 131c second n+ type semiconductor layer 132 p-type semiconductor layer 134 Gate insulating film 135a Gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a n-type semiconductor layer 141b First n+ type semiconductor layer 141c second n+ type semiconductor layer 142 p-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a First electrode 165b Second electrode 167 Translucent electrode 169 Board 1010a n-type semiconductor 1010b n+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a metal layer 1030b metal layer 1030c metal layer 1060 Electrolytic relaxation region

Claims

1. A laminate structure in which a crystal film is laminated directly or via another layer on a crystal substrate whose surface part or all of which contains silicon or a silicon-containing compound as a main component, wherein the surface part or all of which has a (111) orientation, and the crystal film contains a metal oxide containing germanium as a main component.

2. 2. The laminated structure according to claim 1, wherein the crystalline film has one or more crystal structures selected from the group consisting of orthorhombic, tetragonal and trigonal.

3. 2. The laminated structure according to claim 1, wherein the crystalline film has a tetragonal crystal structure.

4. The crystal film is 100 μm ２ 2. The laminated structure according to claim 1, having an area of ​​at least 100 mm.

5. 2. The laminated structure according to claim 1, wherein the crystal film has a thickness of 1 [mu]m or more.

6. 2. The laminate structure according to claim 1, wherein the surface roughness of the crystal film is 25 nm or less.

7. 2. The laminate structure according to claim 1, which is a single crystal film.

8. 2. The laminated structure according to claim 1, wherein the crystal substrate is made of Si or SiC.

9. A semiconductor device including a laminated structure, the laminated structure being the laminated structure according to claim 1.

10. 13. The semiconductor device according to claim 12, which is a power device.

11. 13. The semiconductor device according to claim 12, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

12. 13. An electronic device including a semiconductor device, the semiconductor device being the semiconductor device according to claim 12.

13. A system including an electronic device, the electronic device being the electronic device according to claim 15.

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