Light detection device and electronic apparatus

Abstract

To provide a technique of allowing a light detection device with a multilayer structure to have higher performance.SOLUTION: A light detection device includes a first substrate including a pixel area including a plurality of photoelectric conversion elements, a second substrate provided on the first substrate and including a readout circuit for reading out charges generated in the photoelectric conversion element, and a third substrate provided on the second substrate and including a control circuit to control the photoelectric conversion element and the readout circuit. In the pixel area, the plurality of photoelectric conversion elements are arranged in matrix along a row direction and a column direction. A first electrode that electrically connects the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area.SELECTED DRAWING: Figure 12

Description

[Technical field]

[0001] The present disclosure relates to light detection devices and electronic devices. [Background technology]

[0002] In recent years, imaging devices having a stacked structure of three substrates have been proposed to further reduce the size of imaging devices (photodetection devices). An example of such a device is the imaging device disclosed in the following Patent Document 1. In the technology disclosed in Patent Document 1, a substrate on which a plurality of pixels are provided, a substrate on which a plurality of pixel transistors for driving each pixel, and a substrate on which a logic circuit for controlling the pixel transistors are provided are stacked on top of each other to achieve a reduction in the size of the imaging device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2019 / 131965 Summary of the Invention [Problem to be solved by the invention]

[0004] In imaging devices (photodetection devices) with the above-mentioned stacked structure, new problems have arisen due to the stacked structure for miniaturization, such as an electric field occurring between the stacked substrates that adversely affects circuit operation, and there is a limit to how much the area of ​​the pixel transistors can be increased to reduce noise. Furthermore, because such problems have not been thoroughly considered until now, there have been limits to improving the performance of imaging devices.

[0005] In view of this, the present disclosure proposes a technique that can further improve the performance of a photodetector having a layered structure and an electronic device incorporating the photodetector. [Means for solving the problem]

[0006] According to the present disclosure, there is provided a photodetection device comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit that reads out charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit that controls the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along row and column directions, and a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area.

[0007] Furthermore, according to the present disclosure, there is provided an electronic device equipped with a photodetection device, the photodetection device comprising: a first substrate having a pixel area consisting of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit that reads out charges generated by the photoelectric conversion elements; and a third substrate provided on the second substrate and having a control circuit that controls the photoelectric conversion elements and the readout circuit, wherein in the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix along the row and column directions, and a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area. [Brief description of the drawings]

[0008] [Figure 1] FIG. 11 is an explanatory diagram showing an example of a planar configuration of an imaging device according to a comparative example. [Figure 2A] FIG. 2 is an explanatory diagram (part 1) showing an example of the pixel and readout circuit of FIG. [Figure 2B] FIG. 2 is an explanatory diagram (part 2) showing an example of the pixel and the readout circuit in FIG. [Diagram 3] FIG. 1 is an explanatory diagram illustrating the background leading to an embodiment of the present disclosure. [Figure 4] FIG. 1 is a plan view (part 1) of an imaging device according to a first embodiment of the present disclosure. [Figure 5A] 5 is a cross-sectional view of the imaging device taken along line AA' in FIG. 4. [Figure 5B] 5 is a cross-sectional view of the imaging device taken along line BB' in FIG. 4. [Figure 5C] 5 is a cross-sectional view of the imaging device taken along line CC' in FIG. 4. [Figure 6A] 1A to 1C are process cross-sectional views (part 1) illustrating a manufacturing method for an imaging device according to a first embodiment of the present disclosure. [Figure 6B] 5A to 5C are process cross-sectional views (part 2) illustrating the manufacturing method of the imaging device according to the first embodiment of the present disclosure. [Figure 6C] 5A to 5C are process cross-sectional views (part 3) illustrating the manufacturing method of the imaging device according to the first embodiment of the present disclosure. [Figure 6D] 4A to 4D are process cross-sectional views illustrating the manufacturing method of the imaging device according to the first embodiment of the present disclosure. [Figure 6E] 5A to 5C are process cross-sectional views (part 5) illustrating the manufacturing method of the imaging device according to the first embodiment of the present disclosure. [Figure 6F] 6A to 6C are process cross-sectional views illustrating the manufacturing method of the imaging device according to the first embodiment of the present disclosure. [Figure 7] FIG. 2 is an explanatory diagram illustrating the background of a second embodiment of the present disclosure. [Figure 8] FIG. 2 is a second plan view of the imaging device according to the first embodiment of the present disclosure. [Figure 9] FIG. 11 is a plan view of a main part of a wiring layer according to a second embodiment of the present disclosure. [Figure 10] 11 is a plan view (part 1) of a main part of an imaging device according to a second embodiment of the present disclosure. FIG. [Figure 11] 13 is a plan view (part 2) of a main part of an imaging device according to a second embodiment of the present disclosure. FIG. [Figure 12] FIG. 4 is a cross-sectional view of an imaging device according to a second embodiment of the present disclosure. [Figure 13] FIG. 1 is an explanatory diagram (part 1) for explaining a second embodiment of the present disclosure. [Figure 14] FIG. 2 is an explanatory diagram (part 2) for explaining the second embodiment of the present disclosure. [Figure 15] FIG. 11 is a cross-sectional view of an imaging device according to a third embodiment of the present disclosure. [Figure 16A] 11A to 11D are process cross-sectional views (part 1) illustrating a manufacturing method for an imaging device according to a third embodiment of the present disclosure. [Figure 16B] 13A to 13C are process cross-sectional views (part 2) illustrating a manufacturing method for an imaging device according to a third embodiment of the present disclosure. [Figure 16C] 13A to 13C are process cross-sectional views (part 3) illustrating a manufacturing method for an imaging device according to a third embodiment of the present disclosure. [Figure 17] FIG. 11 is an explanatory diagram illustrating a fourth embodiment of the present disclosure. [Figure 18] FIG. 11 is a plan view of an imaging device according to a fourth embodiment of the present disclosure. [Figure 19] 13 is a plan view of a main part of an imaging device according to a fourth embodiment of the present disclosure. FIG. [Figure 20A] 11A to 11D are process cross-sectional views (part 1) illustrating a manufacturing method for an imaging device according to a fourth embodiment of the present disclosure. [Figure 20B] 13A to 13C are process cross-sectional views (part 2) illustrating a manufacturing method for an imaging device according to a fourth embodiment of the present disclosure. [Figure 20C] 13A to 13C are process cross-sectional views (part 3) illustrating a manufacturing method for an imaging device according to a fourth embodiment of the present disclosure. [Figure 20D] 13A to 13C are process cross-sectional views (part 4) illustrating a manufacturing method for an imaging device according to a fourth embodiment of the present disclosure. [Figure 20E] 13A to 13C are process cross-sectional views (part 5) illustrating a manufacturing method for an imaging device according to a fourth embodiment of the present disclosure. [Figure 20F] 13A to 13C are cross-sectional views (part 6) illustrating the process of the manufacturing method for the imaging device according to the fourth embodiment of the present disclosure. [Figure 20G] 13A to 13C are process cross-sectional views (part 7) illustrating the manufacturing method for the imaging device according to the fourth embodiment of the present disclosure. [Figure 20H] 8A to 8C are process cross-sectional views (part 8) illustrating the manufacturing method for the imaging device according to the fourth embodiment of the present disclosure. [Figure 20I]9A to 9C are process cross-sectional views illustrating the manufacturing method for the imaging device according to the fourth embodiment of the present disclosure. [Figure 20J] 10A to 10C are cross-sectional views illustrating the steps of a manufacturing method for an imaging device according to a fourth embodiment of the present disclosure. [Figure 21] 1 is a block diagram showing an example of the configuration of an electronic device incorporating an imaging device. [Figure 22] 1 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system. [Figure 23] 2 is a block diagram showing an example of a functional configuration of a camera head and a CCU. FIG. [Figure 24] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Diagram 25] 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are denoted by the same reference numerals, and redundant description will be omitted.

[0010] In addition, the drawings referred to in the following description are drawings for explaining and facilitating understanding of one embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the devices shown in the drawings may be appropriately modified in consideration of the following description and known techniques.

[0011] Furthermore, in the following description, "electrically connected" means connecting multiple elements directly or indirectly via other elements.

[0012] In the following description, "sharing" refers to mutual use of one other element (for example, a floating diffusion) between different elements (for example, a pixel, etc.).

[0013] In addition, in the following description, an example is given of the technology proposed in this disclosure being applied to an imaging device; however, the technology proposed in this disclosure is not limited to being applied to imaging devices, and can be applied, for example, to a light detection device that includes an imaging device.

[0014] The explanation will be given in the following order. 1. Overview of the imaging device 2. Background of how the present inventor created the embodiment of the present disclosure 3. First embodiment 3.1 Detailed configuration 3.2 Manufacturing method 4. Second embodiment 5. Third embodiment 5.1 Detailed configuration 5.2 Manufacturing method 6. Fourth embodiment 6.1 Advanced Configuration 6.2 Manufacturing method 7. Summary 8. Application Examples 8.1 Examples of application to electronic devices 8.2 Application example to endoscopic surgery system 8.3 Mobile Applications 9. Supplementary Information

[0015] <<1. Overview of the imaging device>> First, before describing the details of the embodiment of the present disclosure, a schematic configuration of an imaging device 1 according to a comparative example will be described as an example of a light detection device with reference to Fig. 1, 2A, and 2B. Fig. 1 is an explanatory diagram showing an example of the planar configuration of the imaging device 1 according to the comparative example. Here, the comparative example refers to an imaging device that the present inventors had been studying extensively before making the embodiment of the present disclosure.

[0016] 1, the imaging device 1 has three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). In detail, the imaging device 1 has a three-dimensional structure formed by bonding together the three substrates (the first substrate 10, the second substrate 20, and the third substrate 30), and the first substrate 10, the second substrate 20, and the third substrate 30 are stacked in this order.

[0017] The first substrate 10 has a plurality of pixels 12 that perform photoelectric conversion on a semiconductor substrate 11. The plurality of pixels 12 are arranged in a matrix in a pixel region 13 of the first substrate 10. Hereinafter, the region in which the plurality of pixels 12 are arranged in a matrix is ​​referred to as a pixel area (not shown).

[0018] The second substrate 20 has, on a semiconductor substrate 21, a readout circuit 22 including a plurality of pixel transistors that read out pixel signals based on charges output from the pixels 12. The second substrate 20 has a plurality of pixel driving lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction.

[0019] The third substrate 30 includes a logic circuit 32 on a semiconductor substrate 31, which processes pixel signals and controls the pixels 12 and the readout circuit 22. The logic circuit 32 includes, for example, a vertical drive circuit 33, a column signal processing circuit 34, a horizontal drive circuit 35, and a system control circuit 36. The logic circuit 32 (specifically, the horizontal drive circuit 35) outputs an output voltage Vout for each pixel 12 to the outside. In the logic circuit 32, for example, a low-resistance region made of silicide formed by a salicide (Self Aligned Silicide) process such as cobalt silicide (CoSi2) or nickel silicide (NiSi) may be formed on the surface of the impurity diffusion region in contact with the source electrode and the drain electrode.

[0020] The vertical drive circuit 33, for example, sequentially selects a plurality of pixels 12 on a row-by-row basis. The column signal processing circuit 34, for example, performs AD (Analog-to-Digital) conversion processing and Correlated Double Sampling (CDS) processing on pixel signals output from each pixel 12 in the row selected by the vertical drive circuit 33. The column signal processing circuit 34, for example, performs CDS processing to extract a signal level of the pixel signal and holds pixel data according to the amount of light received by each pixel 12. The horizontal drive circuit 35, for example, sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. The system control circuit 36, for example, controls the driving of each block (the vertical drive circuit 33, the column signal processing circuit 34, and the horizontal drive circuit 35) in the logic circuit 32.

[0021] Figures 2A and 2B show an example of a pixel 12 and a readout circuit 22. In Figures 2A and 32b, four pixels 12 share one readout circuit 22.

[0022] As shown in FIG. 2A, each pixel 12 has components in common with each other. Each pixel 12 has, for example, a photodiode 101, a transfer transistor 102 electrically connected to the photodiode 101, and a floating diffusion 103 that temporarily holds the charge output from the photodiode 101 via the transfer transistor 102. The photodiode 101 is a photoelectric conversion element that performs photoelectric conversion to generate a charge according to the amount of received light, and specifically, for example, performs photoelectric conversion using visible light to generate a charge. The cathode of the photodiode 101 is electrically connected to the source of the transfer transistor 102, and the anode of the photodiode 101 is electrically connected to a reference potential line (for example, a ground or a power line). The drain of the transfer transistor 102 is electrically connected to the floating diffusion 103, and the gate of the transfer transistor 102 is electrically connected to the pixel drive line 23. The transfer transistor 102 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) transistor. As shown in FIG. 2A, the four pixels 12 share one floating diffusion 103 and are electrically connected to an input terminal of a common readout circuit 22.

[0023] The readout circuit 22 has pixel transistors such as a reset transistor 201, an amplifying transistor 202, and a selecting transistor 203. The source of the reset transistor 201 (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion 103, and the drain of the reset transistor 201 is electrically connected to a power supply line VDD and the drain of the amplifying transistor 202. The gate of the reset transistor 201 is electrically connected to a pixel driving line 23 (see FIG. 1). The source of the amplifying transistor 202 is electrically connected to the drain of the selecting transistor 203, and the gate of the amplifying transistor 202 is electrically connected to the source of the reset transistor 201. The source of the selecting transistor 203 (the output terminal of the readout circuit 22) is electrically connected to a vertical signal line 24, and the gate of the selecting transistor 203 is electrically connected to the pixel driving line 23 (see FIG. 1). The floating diffusion 103 of the pixel 12 and the amplifying transistor 202 of the readout circuit 22 are electrically connected by a junction electrode, a through electrode, or the like.

[0024] When the transfer transistor 102 is turned on, the transfer transistor 102 transfers the charge of the photodiode 101 to the floating diffusion 103. The reset transistor 201 resets the potential of the floating diffusion 103 to a predetermined potential. When the reset transistor 201 is turned on, the potential of the floating diffusion 103 is reset to the potential of the power supply line VDD. The selection transistor 203 controls the output timing of the pixel signal from the readout circuit 22. The amplification transistor 202 generates a signal (voltage signal) having a voltage corresponding to the level of the charge held in the floating diffusion 103 as the pixel signal. When the selection transistor 203 is turned on, the amplification transistor 202 amplifies the potential of the floating diffusion 103 and outputs a voltage corresponding to the potential to the column signal processing circuit 34 via the vertical signal line 24. The reset transistor 201, the amplification transistor 202, and the selection transistor 203 are, for example, CMOS transistors.

[0025] 2A, the conversion efficiency switching transistor 204 may be provided between the source of the reset transistor 201 and the gate of the amplification transistor 202. FIG. 2B shows an example in which the read circuit 22 further includes the conversion efficiency switching transistor 204 and an additional capacitance 205.

[0026] The conversion efficiency switching transistor 204 shown in FIG. 2B is used when switching the conversion efficiency. In general, the signal charge is small when shooting in a dark place. In this case, if the capacitance C of the floating diffusion 103 is large when converting the charge into a voltage based on Q (charge amount) = C (capacity) × V (voltage), the voltage V when converted into a voltage by the amplification transistor 202 becomes small, so the smaller the capacitance C, the more advantageous it is. On the other hand, since the signal charge is large in a bright place, if the capacitance of the floating diffusion 103 is not large, the floating diffusion 103 cannot receive the charge from the photodiode 101, and is saturated, and in some cases, whiteout may occur in the image. Therefore, in order to switch the conversion efficiency, the circuit diagram shown in FIG. 2B is provided with a conversion efficiency switching transistor 204 and an additional capacitance 205. In detail, when the conversion efficiency switching transistor 204 is turned on during shooting in a bright place, the gate capacitance of the conversion efficiency switching transistor 204 and the additional capacitance 205 are added, so that the charge that could not be received by the floating diffusion 103 can be released. On the other hand, when the conversion efficiency switching transistor 204 is turned off during shooting in a dark place, the capacitance of the entire floating diffusion 103 becomes smaller and the voltage V becomes larger, so that the sensitivity can be increased. In this way, by switching the conversion efficiency switching transistor 204 on and off, the capacitance of the floating diffusion 103 can be made variable and the conversion efficiency can be switched.

[0027] <<2. Background of the Invention That Leads to the Invention of the Present Disclosure>> Next, the background that led the inventor to create the embodiment of the present disclosure will be described with reference to Fig. 3. Fig. 3 is an explanatory diagram for explaining the background that led to the embodiment of the present disclosure.

[0028] In order to achieve miniaturization, the imaging device 1 according to the comparative example has a stacked structure of three substrates 10, 20, and 30. In the imaging device 1 according to the comparative example, an electric field is generated between the stacked substrates, adversely affecting circuit operation, and there is a limit to increasing the area of ​​the pixel transistors in order to reduce noise. As a result of having a stacked structure for miniaturization, the imaging device 1 has three problems, which will be described below.

[0029] Before the imaging device 1 according to the comparative example was proposed, the pixel region 13, the readout circuit 22, and the logic circuit 32 were provided on the same surface of the same substrate. Thereafter, in the imaging device 1, the pixel region 13, the readout circuit 22, and the logic circuit 32 were provided on different substrates, making it possible to reduce the area of ​​the imaging device 1 without reducing the size of the pixel region 13. Furthermore, in recent years, as described above, by providing the pixel region 13 and the readout circuit 22 on different substrates, it has become possible to reduce the size of the imaging device 1 while improving the characteristics of the photodiode 101 and the pixel transistor (in detail, it has been possible to increase the saturation charge amount of the photodiode 101 and reduce noise in the pixel transistor).

[0030] On the other hand, it is necessary to provide a through electrode to electrically connect the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13), but when such an electrode is fabricated, the film thickness of the semiconductor substrate 21 in the substrate 20 (readout circuit 22) becomes an issue. Here, in order to electrically connect the readout circuit 22 and the pixel region 13, it is considered to provide a through electrode 42 that penetrates the semiconductor substrate 21 included in the substrate 20. In this case, as shown on the left side of FIG. 3, if the film thickness of the semiconductor substrate 21 is thick, the through electrode 42 that extends deep is fabricated, so in order to prevent the through electrode 42 from tapering, it is required to reduce the aspect ratio of the through hole for providing the through electrode 42. Therefore, since there is a limit to reducing the size (diameter) of the through electrode 42 in a plan view, it is difficult to reduce the area of ​​the substrate 20 to make the imaging device 1 smaller. Note that in FIG. 3, an insulating film 40 is provided between the substrate 10 and the substrate 20.

[0031] Therefore, in order to reduce the size of the through electrode 42, it is conceivable to thin the semiconductor substrate 21 included in the substrate 20. As the semiconductor substrate 21 is made thinner, the depth to which the through electrode 42 extends becomes shallower. As a result, even if the size of the through electrode 42 in a plan view is reduced, the aspect ratio of the through hole for providing the through electrode 42 does not increase, and tapering of the through electrode 42 is unlikely to occur.

[0032] Furthermore, when the semiconductor substrate 21 is thinned, the pixel transistors of the readout circuit 22 have a form similar to that of SOI (Silicon on Insulator) transistors. Therefore, in order to fabricate pixel transistors made of SOI transistors, it is conceivable to use an SOI substrate as the substrate 20. However, there is a problem in that the SOI substrate is expensive.

[0033] Therefore, the present inventors came up with the idea of ​​bonding a silicon substrate that will become the semiconductor substrate 21 of the substrate 20 to the substrate 10 (pixel region 13) that will become the support substrate, and uniformly polishing and thinning the silicon substrate to reduce the film thickness of the semiconductor substrate 21, thereby using this as the substrate 20 (readout circuit 22). In this case, as shown on the right side of Fig. 3, the processing distance of the through hole of the through electrode 42 that electrically connects the readout circuit 22 and the pixel region 13 becomes shorter, and the size (diameter) of the through hole can be reduced.

[0034] Furthermore, by doing this, the film thickness of the thinned semiconductor substrate 21 becomes the same as the thickness of the source and drain operating regions of the pixel transistors, making it difficult for leakage current to flow through the semiconductor substrate 21, thereby reducing the power consumption by the pixel transistors.

[0035] However, since the distance between the pixel transistors of the readout circuit 22 of the substrate 20 and the pixel region 13 of the substrate 10 is shortened, the probability that the pixel signals of the pixel region 13 affect the operation of the readout circuit 22 and that the operation signals of the readout circuit 22 adversely affect the operation and pixel signals of the pixels 12 of the pixel region 13 increases. For example, when a voltage is applied to an electrode (e.g., the gate of the transfer transistor 102) located below the pixel transistor, an electric field is generated from the electrode toward the pixel transistor above, and this electric field adversely affects the operation of the readout circuit 22. Up until now, in the imaging device 1, measures have been taken to avoid the above-mentioned adverse effects by adjusting the timing of reading or providing a waiting time. However, such measures make it difficult to increase the speed of the operation of the imaging device 1.

[0036] Therefore, the first objective is to enable the imaging device 1 to operate at a higher speed and with higher performance while suppressing adverse effects that may occur between the photoelectric conversion in the pixel region 13 and the readout operation in the readout circuit 22.

[0037] Furthermore, before the imaging device 1 according to the comparative example was proposed, the pixel region 13 and the readout circuit 22 were provided on the same surface of the same substrate, and therefore the signal line for selecting the photodiode 101 and the signal line for selecting the readout circuit 22 were electrically connected to the logic circuit 32 via a wiring layer on the same surface. In recent years, as described above, the pixel region 13, the readout circuit 22, and the logic circuit 32 have been provided on different substrates, which has enabled the area of ​​the photodiode 101 in the pixel region 13 to be increased, thereby improving the conversion efficiency of the photodiode 101.

[0038] Furthermore, it is required to increase the area (specifically, the gate) of the amplifying transistor 202 that converts the amount of charge from the photodiode 101 into a voltage signal to reduce noise and variation. Therefore, it was expected that the area of ​​the amplifying transistor 202 could be increased by providing the pixel region 13 and the readout circuit 22 on different substrates. However, even when the pixel region 13 and the readout circuit 22 are provided on different substrates, there is a limit to increasing the area of ​​pixel transistors such as the amplifying transistor 202. This is because the substrate 20 (readout circuit 22) has an electrode for a signal line that selects the photodiode 101.

[0039] Therefore, the second problem is how to increase the area of ​​pixel transistors such as the amplifying transistor 202 in the imaging device 1.

[0040] Furthermore, in the imaging device 1, as the number of pixels 12 increases, unintended voltage drops are more likely to occur. For example, in the case of capturing a still image, it is necessary to empty (reset) the charge accumulated in the photodiode 101 after capturing the image. Therefore, in the imaging device 1, the transfer transistor 102 and the reset transistor 201 are turned on to empty the photodiode 101, and the imaging device 1 is operated so as to start capturing the image from that point. If the number of pixels 12 is large, the number of transistors that operate simultaneously to reset also increases, and a voltage drop in the power supply line is more likely to occur. Therefore, in the imaging device 1, it is necessary to take measures such as lengthening the waiting time or designing the imaging device 1 in advance to anticipate the voltage drop.

[0041] Furthermore, in the imaging device 1, there are cases where noise (voltage changes in a very short time) gets into the power supply line due to the influence of the signal line adjacent to the wiring layer. Therefore, in the imaging device 1, for example, multiple shots are taken and the most likely data is extracted from the data obtained by the multiple shots, thereby preventing the influence of noise from appearing in the image quality.

[0042] Therefore, the third problem is to suppress the effects of voltage drops and noise without having to take measures such as lengthening the waiting time, making it necessary to shoot multiple times, or designing the imaging device 1 with voltage drops in mind. If these problems can be solved, the freedom of operation and design of the imaging device 1 can be improved.

[0043] In view of the above circumstances, the present inventor has come up with the embodiment of the present disclosure described below. The details of the embodiment of the present disclosure created by the present inventor will be described below.

[0044] <<3. First embodiment>> <3.1 Detailed configuration> First, in order to solve the first problem described above, the present inventor came up with the idea of ​​providing a conductor (first conductor) 401 that serves as a shield between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13). That is, in this embodiment, the conductor 401 functions as a shield to suppress adverse effects between the pixel region 13 and the readout circuit 22.

[0045] As described above, in the imaging device 1, the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13) are stacked, that is, two silicon semiconductor substrates 11 and 21 are stacked. Since these semiconductor substrates 11 and 21 are silicon substrates made of single crystal, it is possible to form transistors with high mobility in the imaging device 1.

[0046] In addition, in SOI transistors, it is known that, as in normal MOS transistors, if the thickness of the BOX (Buried Oxide) layer is thinned, a bias is applied to the silicon layer located under the BOX layer, and an electric field is applied to control the threshold voltage Vth of the transistor. On the other hand, it is known that if the BOX layer is thickened, the back bias is not applied and the threshold voltage Vth of the transistor becomes constant. In addition, when the transistor is off, a phenomenon in which a leakage current flows due to impact ionization may occur. This phenomenon occurs when electrons collide from the source to the drain when the transistor is off, generating holes. The generated holes are then deposited at the bottom of the transistor. As a result, a parasitic bipolar transistor is generated, with the bottom part where the holes are accumulated as the gate. Then, a potential difference occurs between the base and emitter of the parasitic bipolar transistor, and a current flows between the emitter and collector. Therefore, even though the transistor is off, a current flows. Therefore, by thinning the oxide film and applying a back bias to the silicon layer located under the conductive BOX layer located in the lower layer, the potential difference between the base and emitter of the parasitic bipolar transistor is set to 0V, and the current between the emitter and collector of the parasitic bipolar transistor can be reduced. Furthermore, by making the back bias negative, the threshold Vth of the SOI transistor is lowered, making it easier to turn off the SOI transistor. In addition, when the BOX layer is thin, the tunnel effect allows holes to pass through the barrier of the BOX layer with a certain probability, suppressing the accumulation of holes at the bottom. For this reason, in a semiconductor device using an SOI substrate, a silicon substrate is provided below the BOX layer in order to apply a back bias below the SOI transistor.

[0047] In this embodiment, as described above, the conductor 401 that functions as a shield is provided between the two substrates 10 and 20, and this conductor 401 can be made to function as an electrode for applying a back bias. That is, in this embodiment, it is possible to avoid providing an expensive single crystal silicon substrate for applying a back bias. Hereinafter, such a first embodiment of the present disclosure will be described in detail.

[0048] An example of a detailed configuration of the imaging device 1 according to the first embodiment of the present disclosure will be described with reference to FIG. 4 and FIG. 5A to FIG. 5C. FIG. 4 is a plan view of the imaging device 1 according to the present embodiment. FIG. 5A is a cross-sectional view of the imaging device 1 taken along line AA' in FIG. 4, FIG. 5B is a cross-sectional view of the imaging device 1 taken along line BB' in FIG. 4, and FIG. 5C is a cross-sectional view of the imaging device 1 taken along line CC' in FIG. 4. In FIG. 4, for ease of understanding, the gate electrodes of the reset transistor 201 ("RST" in the figure), the amplifying transistor 202 ("AMP" in the figure), the selection transistor 203 ("SEL" in the figure), and the conversion efficiency switching transistor 204 ("FDG" in the figure) and the conductor 401 are shown. Furthermore, in FIG. 4, for ease of understanding, there are also shown a through electrode (Through Contact to Substrate: TCS) 410 that electrically connects between the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20 (a through electrode 410 ("TRG" in the figure) that electrically connects to the gate of the transfer transistor 102, a through electrode 410 ("Well" in the figure) that electrically connects to the well of the silicon substrate 111 of the substrate 10, a through electrode 415 ("FD" in the figure) that electrically connects to the floating diffusion 103 of the silicon substrate 111 of the substrate 10, and a through electrode (Contact to Silicon: CS) 420 ("contact" in the figure) that electrically connects an electrode located above the transistor of the substrate 20 and the conductor 401).

[0049] 5A to 5C, the imaging device 1 according to this embodiment has a substrate 10 (pixel region 13) and a substrate 20 (readout circuit 22), and the substrate 20 is laminated on the substrate 10. Note that in this embodiment, a substrate 30 (logic circuit 32) may be provided on the substrate 20.

[0050] In this embodiment, the substrate 10 has a silicon substrate 111 which is a semiconductor substrate made of silicon (Si), and a plurality of pixels 12 which perform photoelectric conversion are provided in the silicon substrate 111. The substrate 10 also has an interlayer insulating film 105 on the silicon substrate 111. Furthermore, an insulating film 302 is provided on a bonding surface of the interlayer insulating film 105 which bonds to the substrate 20.

[0051] In this embodiment, the substrate 20 has a silicon substrate 311 which is a semiconductor substrate made of silicon, and pixel transistors (for example, a reset transistor 201, an amplifying transistor 202, a selection transistor 203, a conversion efficiency switching transistor 204, etc.) of the readout circuit 22 are provided on the silicon substrate 311. In FIG. 5A and FIG. 5C, a transistor having a sidewall on the gate is illustrated as the pixel transistor. However, in this embodiment, the pixel transistor is not limited to a planar type transistor having a sidewall, and may be, for example, a fin type transistor having a vertical gate. In addition, the substrate 20 has an insulating film 301 provided under the silicon substrate 311, a conductor 401 provided under the insulating film 301, and an insulating film 302 provided under the conductor 401. The insulating film 302 of the substrate 20 faces the insulating film 302 of the substrate 10, and they are bonded to each other, thereby bonding the substrate 10 and the substrate 20. Furthermore, an interlayer insulating film 305 is provided on the pixel transistor of the substrate 20, and an electrode or the like is provided on the interlayer insulating film 305.

[0052] In the imaging device 1 according to this embodiment, a conductor 401 is provided on the substrate 10 (pixel region 13) side of the substrate 20 (readout circuit 22). The conductor 401 is provided with a through electrode (CS) (second through electrode) 420 that electrically connects the conductor 401 to an electrode located above the transistor of the substrate 20. The through electrode 420 penetrates the silicon substrate 311 of the substrate 20. In this embodiment, the potential of the conductor 401 can be fixed by applying a predetermined potential (first potential) to the through electrode 420. Therefore, in this embodiment, even if a negative bias is applied to the gate of the transfer transistor 102 of the substrate 10 (pixel region 13), for example, the conductor 401 with the fixed potential functions as a shield, and can suppress adverse effects from the pixel region 13 to the readout circuit 22. As a result, according to this embodiment, it is possible to operate the readout circuit 22 at a higher speed and with higher performance.

[0053] Furthermore, in this embodiment, even if the insulating film 301 is thinned and the pixel transistor is an SOI transistor, an increase in the threshold voltage of the pixel transistor can be controlled by the back bias effect of the conductor 401 to which a voltage can be applied. For example, when turning off the pixel transistor, the potential of the conductor 401 is set to a negative potential, thereby reducing the leakage current between the source and drain of the pixel transistor and achieving low power consumption.

[0054] Furthermore, in this embodiment, a through electrode (TCS) (first through electrode) 410 is provided to electrically connect between the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20. In detail, the through electrodes 410 and 415 electrically connect from the electrode on the interlayer insulating film 305 of the substrate 20 to the silicon substrate 111 of the substrate 10 through the silicon substrate 311 of the substrate 20 and the interlayer insulating film 105 of the substrate 10. Also, FIG. 5B shows the through electrode 415 electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10. Also, FIG. 5C shows the through electrode 410 electrically connected to the gate (first selection gate) of the transfer transistor 102.

[0055] The conductor 401 has a pattern that covers the entire area below the pixel transistor of the readout circuit 22 while avoiding contact with the through electrodes 410 and 415. In detail, as shown in Fig. 4, the conductor 401 has cutouts (openings) 403 at locations where the through electrode 410 ("TRG" in the figure) electrically connected to the gate of the transfer transistor 102, the through electrode 410 ("Well" in the figure) electrically connected to the well of the silicon substrate 111 of the substrate 10, and the through electrode 415 ("FD" in the figure) electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10 are located. The conductor 401 has such a shape that it surrounds these through electrodes 410 and 415 and does not electrically contact these through electrodes 410 and 415.

[0056] As described above, in this embodiment, the conductor 401 is provided between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13). Therefore, in this embodiment, even if a negative bias is applied to the gate of the transfer transistor 102 of the substrate 10 (pixel region 13), the conductor 401 with a fixed potential functions as a shield and can suppress the influence of the pixel region 13 on the readout circuit 22. As a result, according to this embodiment, the readout circuit 22 can be operated at a higher speed and with higher performance. That is, in this embodiment, the first problem described above can be solved.

[0057] Furthermore, in this embodiment, even if the silicon substrate 311 is thinned and the pixel transistor is an SOI transistor, an increase in the threshold voltage of the pixel transistor can be controlled by the back bias effect of the conductor 401 to which a voltage can be applied. For example, when turning off the pixel transistor, the potential of the conductor 401 is set to a negative potential, thereby making it possible to reduce the leakage current between the source and drain of the pixel transistor and achieve low power consumption.

[0058] In this embodiment, the imaging device 1 is not limited to the forms shown in FIG. 4 and FIGS. 5A to 5C, but can be modified into various forms.

[0059] <3.2 Manufacturing method> Next, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described with reference to Figures 6A to 6F. Figures 6A to 6F are cross-sectional views illustrating steps in the method for manufacturing the imaging device 1 according to this embodiment.

[0060] First, as shown in Fig. 6A, an insulating film 301 is formed on a silicon substrate 300 which will be the semiconductor substrate of the substrate 20, a conductor 401 is formed on the insulating film 301, and an insulating film 302 is formed on the conductor 401. The insulating film 301 can be, for example, a silicon oxide film (SiO2) formed using a general thermal oxidation furnace. The thickness of the insulating film 301 can be, for example, about 10 nm.

[0061] In this embodiment, the thickness of the insulating film 301 is not particularly limited, but in order to obtain the effect of the back bias, the thinner the film, the better. However, if the film thickness of the insulating film 301 is made too thin, the withstand voltage may not be ensured. Therefore, in this embodiment, the film thickness of the insulating film 301 may be determined according to the voltage used in the imaging device 1.

[0062] In this embodiment, the material of the insulating film 301 is not particularly limited as long as it is an insulating film, but if it is desired to avoid the generation of a parasitic capacitance having a large capacitance value between the transistor and the conductor 401, it is preferable to use a material with a small dielectric constant. Conversely, in this embodiment, if it is desired to avoid the generation of a parasitic capacitance having a large capacitance value between the transistor and the conductor 401, it is preferable to use a material with a high dielectric constant as the material of the insulating film 301. In the above example, since it is desired to avoid the generation of a parasitic capacitance having a large capacitance value between the transistor and the conductor 401, a silicon oxide film with a low dielectric constant is selected as the material of the insulating film 301.

[0063] The material of the conductor 401 may be, for example, a polysilicon film. In this embodiment, since the polysilicon film has a high resistance, it may be doped (injected) with ions such as phosphorus (P) or boron (B). In the above example, a polysilicon film injected with phosphorus is used as the material of the conductor 401. In this embodiment, the material of the conductor 401 is not particularly limited as long as it is a conductor film. However, in this embodiment, since the manufacturing process includes a process of processing with high temperature heat, it is preferable to use a high melting point metal when using a metal as the material of the conductor 401. Specifically, the material of the conductor 401 may be, for example, tantalum (Ta), titanium (Ti), tungsten (W), or the like. In addition, when a high melting point metal is used as the material of the conductor 401, it becomes possible to function as a shield against visible light and infrared rays in addition to electromagnetic waves.

[0064] In this embodiment, the material of the insulating film 302 is not particularly limited as long as it is an insulating material, but since the insulating film 302 will later become a bonding surface with the substrate 10, it is preferable to use a material suitable for bonding. In the above example, silicon nitride film (Si3N4) is selected as the material of the insulating film 302.

[0065] As in the case of the substrate 20, the insulating film 302 is formed on the bonding surface of the substrate 10 as well.

[0066] 6B, the substrates 10 and 20 are bonded together with the insulating films 302, which are the bonding surfaces, facing each other. In this embodiment, any existing method can be used for the bonding method.

[0067] 6C, the silicon substrate 300 of the substrate 20 is scraped, polished and flattened to thin the silicon substrate 300. The thickness of the silicon substrate 300 after thinning may be, for example, about 200 nm to 500 nm. In addition, when it is desired to completely deplete the silicon substrate 300 during operation, it is preferable to thin the silicon substrate 300.

[0068] Furthermore, an SOI transistor can be formed in the substrate 20 by using an existing method, and a configuration as shown in FIG. 6D can be obtained. In addition, in FIG. 6D to FIG. 6F, the left side of the figure shows a region where a through electrode (CS) 420 electrically connected to the conductor 401 is formed, and the right side of the figure shows a region where a through electrode 410 (415) electrically connected to the substrate 10 is formed. In the process shown in FIG. 6D, in the region (right side) where a through electrode (TSC) 410 electrically connected to the substrate 10 is formed, a trench 412 that penetrates from the transistor side of the substrate 20 to the insulating film 302 is formed by etching or the like, and this portion becomes the notch 403 of the conductor 401. In the process shown in FIG. 6D, in the region (left side) where a through electrode 420 electrically connected to the conductor 401 is formed, a trench 413 that penetrates from the transistor side of the substrate 20 to the upper surface of the conductor 401 is formed by etching or the like.

[0069] 6E, interlayer insulating film 305 is formed on the transistor so as to fill trenches 412 and 413. Furthermore, the upper surface of interlayer insulating film 305 is planarized, and a hard mask 501 is formed on interlayer insulating film 305. Next, resist 502 is formed on hard mask 501, and patterning is performed. According to the pattern, etching is performed to a part of the thickness of interlayer insulating film 305, and trenches 512 and 513 are formed.

[0070] Since the resist 502 does not have resistance to dry etching, a hard mask 501 is used here. As the hard mask 501, a single film such as a silicon oxide film, a silicon nitride film, or an amorphous carbon film, or a combination of these films can be used. Note that the gate contact and the source / drain contacts can be formed by using existing methods, so a description thereof will be omitted here.

[0071] Next, as shown in Fig. 6F, the hard mask 501 and the like are removed, the trenches 512 and 513 are formed deeper, electrodes and the like are embedded in the deeply formed trenches 512 and 513, and the upper surfaces are flattened to obtain the configuration shown in Fig. 6F. In this embodiment, for example, titanium can be formed as an adhesive layer in the trenches 512 and 513, and tungsten can be formed as an electrode.

[0072] Although the through electrode (TCS) 410 and the through electrode (CS) 420 are described simultaneously here, in this embodiment, the through electrode (CS) 420 may be formed first, and then the through electrode (TCS) 410 may be formed, or the through electrode (TCS) 410 may be formed first, and then the through electrode (CS) 420 may be formed.

[0073] Furthermore, by providing electrodes etc. on the upper surface etc., it is possible to obtain the imaging device 1 according to this embodiment as shown in FIGS. 5A to 5C.

[0074] <<4. Second embodiment>> Next, the background that led the inventor to create the second embodiment of the present disclosure will be described with reference to Fig. 7 and Fig. 8. Fig. 7 is an explanatory diagram for explaining the background of this embodiment, and Fig. 8 is a plan view of the imaging device 1 according to the first embodiment of the present disclosure.

[0075] In the imaging device 1 according to the first embodiment of the present disclosure, many electrodes are provided in the pixel area to transmit a selection signal for selecting a column of the photodiodes 101 to be read out via the substrate 20 (readout circuit 22). Therefore, in the region of the substrate 20 that overlaps the pixel area, the area for providing pixel transistors is limited, making it difficult to increase the area of ​​the pixel transistors.

[0076] Here, the reading of the pixels 12 will be briefly described with reference to Fig. 7. In Fig. 7, the vertical direction is defined as "rows" and the horizontal direction is defined as "columns", and the selection of the row of the pixels 12 to be read out is performed by the SEL signal line, and the selection of the column of the pixels 12 to be read out is performed by the TRG signal line (note that in the imaging device 1 according to the embodiment of the present disclosure, the vertical direction is not limited to being the "rows" and the horizontal direction is the "columns", and may be rotated by 90 degrees).

[0077] The logic circuit 32 is provided with an AD (analog-digital) conversion circuit that converts analog voltage values ​​into digital values, and can convert the pixel signal, which is an analog value of the selected pixel 12, into a digital value. For example, if only one AD conversion circuit is provided, it will take a long time to read. Also, for example, if an AD conversion circuit is provided for each column, the pixel signal of the pixel 12 in the corresponding row can be instantly converted into a digital value by simply selecting a row. Furthermore, for example, if multiple AD conversion circuits are provided so that multiple rows can be converted, the conversion to digital values ​​will be even faster.

[0078] Signals for selecting these rows and columns are transmitted to the substrate 20 (readout circuit 22) through wiring of the substrate 30 (logic circuit) at electrodes (indicated by circles in FIG. 7) outside the pixel area of ​​the substrate 10. Then, through wiring of the substrate 20 (readout circuit 22), the SEL signal is transmitted to the gate (second selection gate) of the selection transistor 203 of the readout circuit 22, and the TRG signal is also transmitted to the gate (first selection gate) of the transfer transistor 102 in the pixel region 13 of the substrate 10 through wiring of the substrate 20 (readout circuit 22) and the through electrode 410 ("TRG" in FIG. 4).

[0079] FIG. 8 is a diagram in which boundary lines of pixels 12 are added to FIG. 4 described above. The dashed lines in FIG. 8 indicate boundaries between four pixels 12. Below, an example will be described in which four pixels 12 share one readout circuit 22. Note that this embodiment is not limited to four pixels 12 sharing one readout circuit 22, and for example, eight pixels 12 or sixteen pixels 12 may share one readout circuit 22.

[0080] The through electrode 410 ("TRG" in FIG. 8) electrically connected to the gate of the transfer transistor 102 is not used by the readout circuit 22, but is connected to the substrate 10 (pixel region 13) via wiring of the readout circuit 22. Therefore, the region in which the through electrode 410 ("TRG" in FIG. 8) electrically connected to the gate of the transfer transistor 102 is provided is a region that cannot be effectively used as a device by the substrate 20 (readout circuit 22).

[0081] Since the through electrodes 410 electrically connected to the gates of the transfer transistors 102 are provided, the area of ​​the substrate 20 that overlaps the pixel area is limited in terms of the area in which the pixel transistors are provided. This makes it difficult to increase the area of ​​the pixel transistors. In this situation, the present inventors have conducted extensive research to reduce the number of the through electrodes 410 provided in the substrate 20 that overlaps the pixel area, thereby increasing the area of ​​the pixel transistors, that is, to solve the second problem described above. As a result, the present inventors have come up with the creation of the second embodiment of the present disclosure.

[0082] In the second embodiment of the present disclosure created by the present inventor, a part of the through electrode 410 (TCS), for example, the through electrode 410 (first electrode) electrically connected to the gate of the transfer transistor 102, is provided outside the pixel area (specifically, in an area not overlapping with the pixel area). Furthermore, in this embodiment, the wiring (first wiring) to be connected to the through electrode 410 (TCS) is arranged in a wiring layer provided in the substrate 10 (pixel area 13) rather than in the wiring layer of the substrate 20 (readout circuit 22). In this way, in this embodiment, it is possible to reduce the number of the through electrodes 410 provided in the area of ​​the substrate 20 overlapping with the pixel area, and to increase the area of ​​the pixel transistor. Hereinafter, the details of this embodiment created by the present inventor will be described.

[0083] An example of a detailed configuration of an imaging device 1 according to a second embodiment of the present disclosure will be described with reference to Figs. 9 to 14. Fig. 9 is a plan view of a main part of a wiring layer 120 according to this embodiment. Figs. 10 and 11 are plan views of a main part of the imaging device 1 according to this embodiment, and Fig. 12 is a cross-sectional view of the imaging device 1 according to this embodiment. Figs. 13 and 14 are explanatory diagrams for explaining this embodiment. In the following description, the points common to the above-mentioned first embodiment will not be described.

[0084] 9 shows a wiring pattern in a wiring layer 120 (see FIG. 12) provided on the substrate 10 (pixel region 13). The wiring layer 120 is formed including an interlayer insulating film 105 provided on a silicon substrate 111 of the substrate 10. Note that even in a conventional imaging device 1 in which the pixel region 13, the readout circuit 22, and the logic circuit 32 are provided on the same plane of the same substrate, it is common for the wiring layer 120 to be provided on the substrate 10, so that there is no technical problem with such a configuration in this embodiment as well.

[0085] In this embodiment, wiring electrically connected to the through electrode 410 ("TRG" in FIG. 9) electrically connected to the gate of the transfer transistor 102 and wiring electrically connected to the through electrode 410 ("Well" in FIG. 9) electrically connected to the well of the silicon substrate 111 of the substrate 10 are provided in a wiring layer 120 provided in the substrate 10 (pixel region 13). On the other hand, wiring (not shown) electrically connected to the gate of the selection transistor 203 of the readout circuit 22 is provided in the substrate 20 (readout circuit 22) as before. That is, in this embodiment, wiring electrically connected to each element is provided in different substrates according to the position of the element to which the wiring is connected.

[0086] FIG. 10 shows electrodes provided in a region of the substrate 20 (readout circuit 22) overlapping the pixel area in the imaging device 1 according to this embodiment. As can be seen from FIG. 10, in the substrate 20 (readout circuit 22), other than the gates of the pixel transistors (reset transistor 201, amplifying transistor 202, selecting transistor 203, conversion efficiency switching transistor 204), there is only a through electrode 415 ("FD" in FIG. 10) electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10. Therefore, according to this embodiment, it is possible to increase the area that can be used as the pixel transistor region in the pixel area (region overlapping the pixel area) of the substrate 20 (readout circuit 22). As a result, according to this embodiment, it is possible to increase the area of ​​the pixel transistor (specifically, the gate), reduce noise, and reduce variation.

[0087] In addition, according to this embodiment, the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps with the pixel area can be reduced, so that the distance between the wires of the readout circuit 22 provided in this region can be increased. As a result, according to this embodiment, crosstalk (signals being transferred from one wire to the adjacent wire due to electromagnetic induction) that occurs between wires is reduced, and the imaging device 1 can be operated at a higher speed and with higher performance.

[0088] FIG. 11 shows a plan view of the imaging device 1 in the present embodiment in which an SOI transistor is used as the pixel transistor of the readout circuit 22 and a conductor 401 is provided to apply a back bias and to suppress adverse effects between the photoelectric conversion in the pixel region 13 and the readout operation in the readout circuit 22. As shown in FIG. 11, the number of electrodes in the region of the substrate 20 (readout circuit 22) overlapping the pixel area can be reduced, and therefore the area of ​​the cutout 403 for avoiding the electrodes is reduced in the conductor 401. That is, in the present embodiment, the area of ​​the conductor 401 can be made larger than that in the first embodiment. As a result, according to the present embodiment, the shielding effect of the conductor 401 can be further improved.

[0089] Next, a cross-sectional view of the imaging device 1 according to this embodiment is shown in Fig. 12. In Fig. 12, a pixel area is shown on the right side and the outside of the pixel area is shown on the left side, and the substrate 30 (logic circuit 32) provided on the substrate 20 (readout circuit 22) is omitted.

[0090] The TRG signal is transmitted from the logic circuit 32 to the gate of the transfer transistor 102 through a through electrode 410 provided outside the pixel area and a wiring of the wiring layer 120 of the substrate 10 (pixel region 13). Meanwhile, a through electrode 415 (indicated as "FD" in FIG. 10) electrically connected to the floating diffusion 103 of the silicon substrate 111 of the substrate 10 is provided in the pixel area and electrically connects the floating diffusion 103 to the pixel transistor of the substrate 20 (readout circuit 22). Note that in FIG. 12, a planar type transistor having a sidewall on the gate is illustrated as the transfer transistor 102, but this embodiment is not limited to such a transistor. For example, the transfer transistor 102 may be a fin type transistor having a vertical gate.

[0091] 12, a plurality of wirings are laminated in an interlayer insulating film 305 of the substrate 20 (readout circuit 22). That is, the interlayer insulating film 305 functions as a wiring layer of the substrate 20. For example, a wiring (second wiring) that transmits a SEL signal and is electrically connected to the gate of the selection transistor 203 of the readout circuit 22 is provided in the interlayer insulating film 305.

[0092] In this embodiment, as shown in Fig. 13, the through electrode 410 electrically connecting the substrate 10 and the substrate 30 for transmitting the TRG signal is preferably provided outside the pixel area ("TRG" in Fig. 13). Also, in this embodiment, as shown in Fig. 13, the electrode (not shown) electrically connecting the substrate 20 and the substrate 30 for transmitting the SEL signal is preferably provided outside the pixel area ("SEL" in Fig. 13). Furthermore, the extension direction of the wiring electrically connecting to the through electrode 410 electrically connecting the substrate 10 and the substrate 30 for transmitting the TRG signal is approximately perpendicular to the extension direction of the wiring connected to the electrode (not shown) electrically connecting the substrate 20 and the substrate 30 for transmitting the SEL signal.

[0093] In this embodiment, the through electrodes 410 ("TRG" in FIG. 14) electrically connecting the substrates 10 and 30 and the electrodes (not shown) ("SEL" in FIG. 14) electrically connecting the substrates 20 and 30 for transmitting SEL signals may be provided in pairs so as to face each other across the pixel area, as shown in FIG. 14. The facing direction is not particularly limited, as shown in FIG. 14.

[0094] As described above, according to this embodiment, the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps the pixel area can be reduced, and the area that can be used as the pixel transistor region can be increased. As a result, according to this embodiment, it is possible to increase the area of ​​the pixel transistor (specifically, the gate), reduce noise, and reduce variation. That is, this embodiment can solve the second problem described above.

[0095] In addition, according to this embodiment, the distance between the wirings of the readout circuit 22 provided in the region of the substrate 20 (readout circuit 22) that overlaps with the pixel area can be increased. As a result, according to this embodiment, crosstalk occurring between the wirings is reduced, and the imaging device 1 can be operated at a higher speed and with higher performance.

[0096] In this embodiment, the imaging device 1 is not limited to the forms shown in FIGS. 9 to 14, but can be modified into various forms.

[0097] <<5. Third embodiment>> <5.1 Detailed configuration> In the embodiments of the present disclosure described so far, the through electrodes (TCS) 410, 415 are used as elements for electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20. In the third embodiment of the present disclosure, instead of the through electrodes (TCS) 410, 415 of the first embodiment, a bonding electrode 600 (see FIG. 15 ) provided on the bonding surface between the substrates 10 and 20 is used to electrically connect the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20.

[0098] In detail, a bonding electrode 600 for bonding made of copper (Cu) surrounded by an insulating film is formed on the bonding surface of the substrate 10 and the bonding surface of the substrate 20 by applying, for example, an embedded wiring technique (so-called damascene process). Next, the two substrates 10 and 20 are arranged with their bonding surfaces facing each other, and the bonding electrodes 600 provided on each bonding surface are aligned with each other, the two substrates 10 and 20 are laminated, and in this state, a heat treatment or the like is performed. In this manner, the two bonding electrodes 600 are bonded to each other, and the two substrates 10 and 20 can be bonded to each other. That is, the bonding electrode 600 can bond the two substrates 10 and 20 and electrically connect the two substrates 10 and 20 to each other.

[0099] Hereinafter, an example of a detailed configuration of the imaging device 1 according to the third embodiment of the present disclosure will be described with reference to Fig. 15. Fig. 15 is a cross-sectional view of the imaging device 1 according to this embodiment. Note that in the following description, a description of points common to the first and second embodiments will be omitted.

[0100] 15, the imaging device 1 according to this embodiment has a substrate 10 (pixel region 13), a substrate 20 (readout circuit 22), and a substrate 30 (logic circuit 32), with the substrate 20 being stacked on the substrate 10, and the substrate 30 being stacked on the substrate 20. Note that in FIG. 15, the pixel area is shown on the right side, and the outside of the pixel area is shown on the left side.

[0101] In this embodiment, the substrate 10 has a silicon substrate 111 on which a plurality of pixels 12 performing photoelectric conversion are provided, and further has a wiring layer 120 on the silicon substrate 111. An insulating film 302 (not shown in FIG. 15) is provided on a bonding surface of the wiring layer 120 that is bonded to the substrate 20, and a conductor 401 (see the above-mentioned first embodiment) that functions as a shield is provided on the insulating film 302. Furthermore, in this embodiment, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 may be the bonding electrode 600.

[0102] In this embodiment, the substrate 20 has a silicon substrate 311 on which pixel transistors of the readout circuit 22 are provided, an insulating film 301 (not shown in FIG. 15) provided under the silicon substrate 311, and a conductor 401 that functions as a shield and is provided under the insulating film 301. Furthermore, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 on the substrate 20 side may serve as the bonding electrode 600.

[0103] In this embodiment, the bonding electrode 600 of the substrate 10 and the bonding electrode 600 of the substrate 20 are placed opposite each other and bonded to each other, thereby bonding the substrates 10 and 20 and electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20. In this embodiment, when the conductor 401 provided between the substrates 10 and 20 is used as the bonding electrode 600, the imaging device 1 having a shield and bonded by the bonding electrode 600 can be manufactured without significantly changing the manufacturing process.

[0104] Furthermore, in this embodiment, the substrate 20 further includes an interlayer insulating film 305 provided on the silicon substrate 311 so as to cover the pixel transistors, and a wiring layer 220 provided on the interlayer insulating film 305. An insulating film (not shown) is provided on the bonding surface of the wiring layer 220 that bonds with the substrate 30, and a conductor 401 (see the above-mentioned first embodiment) that functions as a shield is provided on the insulating film. Furthermore, in this embodiment, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 may be the bonding electrode 600.

[0105] In this embodiment, the substrate 30 has a silicon substrate (not shown) on which the transistors of the logic circuit 32 are provided, an insulating film (not shown in FIG. 15) provided under the silicon substrate, and a conductor 401 that functions as a shield and is provided under the insulating film. Furthermore, a bonding electrode 600 is provided on the conductor 401 via an insulating film (not shown). Alternatively, in this embodiment, the conductor 401 on the substrate 30 side may serve as the bonding electrode 600.

[0106] In this embodiment, the bonding electrode 600 of the substrate 20 and the bonding electrode 600 of the substrate 30 are placed opposite each other and bonded to each other, thereby bonding the substrates 20 and 30 and electrically connecting the readout circuit 22 of the substrate 20 and the logic circuit 32 of the substrate 30. In this embodiment, when the conductor 401 provided between the substrates 20 and 30 is used as the bonding electrode 600, the imaging device 1 having a shield and bonded by the bonding electrode 600 can be manufactured without significantly changing the manufacturing process.

[0107] In the bonding of the substrates by such bonding electrodes 600, misalignment when bonding the substrates results in misalignment between the bonding electrodes 600 that electrically connect to each other. Therefore, if the area of ​​the bonding electrodes 600 is small, misalignment when bonding the substrates makes it impossible to ensure electrical connection, which ultimately leads to a decrease in the yield of the imaging device 1. In this embodiment, the number of electrodes in the region of the substrate 20 (readout circuit 22) that overlaps with the pixel area can be reduced by utilizing the configuration of the second embodiment, and therefore the area of ​​the bonding electrodes 600 can be increased. Therefore, according to this embodiment, even if misalignment occurs when bonding the substrates, it is easy to ensure electrical connection between the bonding electrodes 600, and therefore a decrease in the yield of the imaging device 1 can be suppressed.

[0108] In addition, in this embodiment, since the gates of the transfer transistors 102 on the same column can be electrically connected to the same wiring, the wiring connected to the gates of the transfer transistors 102 can be extended outside the pixel area by the number of columns. In this embodiment, by devising the wiring in this way, the number of electrodes and wiring can be reduced. Therefore, within the pixel area, there are mainly only electrodes connecting the readout circuit 22 of the substrate 20 and the floating diffusion 103. As a result, in this embodiment, it is possible to increase the area of ​​the pixel transistors of the readout circuit 22.

[0109] In this embodiment, the imaging device 1 is not limited to the form shown in FIG. 15, but can be modified into various forms.

[0110] <5.2 Manufacturing method> Next, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described with reference to Fig. 16A to Fig. 16C. Fig. 16A to Fig. 16C are process cross-sectional views for explaining the method for manufacturing the imaging device 1 according to this embodiment, and correspond to the cross-sectional views of Fig. 15 in detail.

[0111] First, as shown in FIG. 16A, a support substrate 530 is attached to the surface of the substrate 20 (readout circuit 22) on the wiring layer 220 side. In this embodiment, the support substrate 530 is not necessarily required, and if the substrate 30 (logic circuit 32) is already bonded to the substrate 30, the substrate 30 can be used as the support substrate 530. In this embodiment, since the substrate 20 (readout circuit 22) is thin, it is necessary to use a substrate that functions as the support substrate 530. In this embodiment, after the support substrate 530 is attached to the substrate 20 (readout circuit 22), a hard mask (not shown) is formed, a resist (not shown) is formed, the resist is patterned, and etching or the like is performed to form the bonding electrode 600. Furthermore, vias connected to the bonding electrode 600 and the like are also formed by patterning the resist, etching, and the like. Furthermore, in this embodiment, the conductor 401 can be formed when the bonding electrode 600 and the like are formed.

[0112] In the present embodiment, the conductor 401 is described as being provided. However, if the conductor 401 is not required, it is only necessary to add a hard mask or the like used in forming the bonding electrode 600, and therefore there is no need to significantly change the manufacturing process of the conventional imaging device 1.

[0113] Furthermore, in order to further improve the bonding of the bonding electrode 600, a film of tantalum is formed as a seed (seed crystal) by sputtering on the electrode that will become the bonding electrode 600. Furthermore, copper plating is performed, and after drying, planarization is performed by CMP (Chemical Mechanical Polishing) to form the bonding electrode 600.

[0114] Moreover, the substrate 10 (pixel region 13) is also processed in the same manner as the substrate 20, and a conductor 401 and a bonding electrode 600 are formed, thereby obtaining a configuration as shown in FIG. 16B.

[0115] Furthermore, as shown in FIG. 16C, the bonding electrode 600 of the substrate 10 and the bonding electrode 600 of the substrate 20 are placed opposite each other and bonded to each other, thereby bonding the substrates 10 and 20 and electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20.

[0116] <<6. Fourth embodiment>> <6.1 Detailed configuration> First, an overview of the fourth embodiment of the present disclosure will be described with reference to Fig. 17. Fig. 17 is an explanatory diagram for explaining this embodiment.

[0117] In the embodiment of the present disclosure, two conductors (first and second conductors) 401, 402 (see FIG. 18) are provided between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13), and these two conductors 401, 402 function as capacitors to suppress a temporary voltage drop caused by noise from the power supply during circuit operation. That is, in this embodiment, the third problem described above can be solved.

[0118] In detail, in the imaging device 1, as shown on the right side of FIG. 17, there are cases where noise (a phenomenon in which voltage changes in an extremely short time) enters the power supply line due to the influence of a signal line adjacent to the wiring layer, and in such cases, the noise causes deterioration of image quality. Therefore, in this embodiment, as shown on the left side of FIG. 17, two conductors 401 and 402 that also function as the shield of the first embodiment are provided, and these conductors 401 and 402 are fixed to different potentials, so that these two conductors 401 and 402 function like a capacitor. Then, as shown on the right side of FIG. 17, the capacitor does not pass direct current but can pass alternating current, so that noise whose voltage changes in an extremely short time can be dropped to ground through the capacitor. As a result, in this embodiment, the power supply voltage (Vdd) can be kept constant. Hereinafter, the details of such a fourth embodiment of the present disclosure will be described.

[0119] An example of a detailed configuration of an imaging device 1 according to a fourth embodiment of the present disclosure will be described with reference to Fig. 18 and Fig. 19. Fig. 18 is a plan view of the imaging device 1 according to this embodiment, and Fig. 19 is a plan view of a main part of the imaging device 1 according to this embodiment. In the following description, description of points common to the above-described first to third embodiments will be omitted.

[0120] FIG. 18 shows a plan view of the pixel area of ​​the substrate 20 (readout circuit 22). The conductors 401 and 402 are provided below the pixel transistors of the substrate 20 via an insulating film 301 made of a dielectric film. In detail, the conductor 402 is located below the conductor 401 in a cross-sectional view of the imaging device 1. In FIG. 18, the conductors 401 and 402 are indicated by dashed lines and dashed lines, but since they are provided so as to almost overlap each other, it is difficult to recognize the difference in their shapes from FIG. 18. The shape of the conductor 401 is different from that of the conductor 402 in that it has a notch (opening) 404 so as not to short-circuit with a through electrode (third through electrode) 422 that penetrates the substrate 20 and is electrically connected to the conductor 402. That is, the conductor 402 has a larger area than the conductor 401. Therefore, FIG. 19 shows plan views of the conductors 401 and 402.

[0121] Conductor 402 is shown on the left side of Fig. 19, and conductor 401 is shown on the right side of Fig. 19. In area B enclosed in a circle on the right side of Fig. 19, notch 403 is located so that conductor 401 does not short out with through electrode 422 electrically connected to conductor 402. Through electrode 422 is a through electrode that penetrates the silicon substrate of substrate 20, and the potential of conductor 402 can be fixed by applying a predetermined potential (second potential) to conductor 402. That is, in this embodiment, conductors 401 and 402 can be fixed to different predetermined potentials.

[0122] As described above, in this embodiment, by providing two conductors 401 and 402 between the substrate 20 (readout circuit 22) and the substrate 10 (pixel region 13), these two conductors 401 and 402 function like a capacitor, suppressing a temporary voltage drop phenomenon caused by noise from the power supply during circuit operation. That is, in this embodiment, the third problem described above can be solved. Furthermore, in this embodiment, as in the first embodiment, the conductors 401 and 402 with fixed potentials can suppress the influence between the photoelectric conversion in the pixel region 13 and the readout operation in the readout circuit 22, and the imaging device 1 can be operated at a higher speed and with higher performance. That is, in this embodiment, the first problem described above can be solved.

[0123] In this embodiment, the imaging device 1 is not limited to the form shown in Fig. 18 and Fig. 19, and can be modified into various forms. For example, in this embodiment, the through electrodes (TCS) 410, 415 may be used as an element electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20, as in the first embodiment. Alternatively, in this embodiment, the bonding electrode 600 provided on the bonding surface between the substrate 10 and the substrate 20 may be used as an element electrically connecting the pixel region 13 of the substrate 10 and the readout circuit 22 of the substrate 20, as in the third embodiment.

[0124] <6.2 Manufacturing method> Next, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described with reference to Figures 20A to 20J. Figures 20A to 20J are process cross-sectional views illustrating the method for manufacturing the imaging device 1 according to this embodiment.

[0125] First, as shown in the leftmost part of FIG. 20A, the silicon substrate 300 that will become the silicon substrate 311 of the substrate 20 is cleaned. Next, as shown in the second from the left of FIG. 20A, an insulating film 301 made of a silicon oxide film is formed on the surface of the silicon substrate 300 using a general thermal oxidation furnace. The thickness of the insulating film 301 can be, for example, about 10 nm. In this embodiment, the thickness of the insulating film 301 is not particularly limited, but in order to obtain a back bias effect, the thinner the thickness of the insulating film 301, the more preferable it is. However, if the thickness is too thin, the withstand voltage may not be obtained. Therefore, in this embodiment, the thickness of the insulating film 301 may be determined according to the voltage used in the imaging device 1. In this embodiment, the material of the insulating film 301 is not particularly limited as long as it is an insulating film, but if it is desired to avoid the generation of a parasitic capacitance having a large capacitance value between the transistor and the conductor 401, it is preferable to use a material with a small dielectric constant. Conversely, in this embodiment, if it is desired to generate a parasitic capacitance having a large capacitance value between the transistor and the conductor 401, it is preferable to use a material having a high dielectric constant as the material for the insulating film 301. In the above example, since it is not desired to generate a parasitic capacitance having a large capacitance value between the transistor and the conductor 401, a silicon oxide film having a low dielectric constant is selected as the material for the insulating film 301.

[0126] Next, as shown in the third from the left in FIG. 20A, a conductor 401 is formed on the insulating film 301. For example, a polysilicon film can be used as the material of the conductor 401. In addition, in this embodiment, since the polysilicon film has a high resistance, ions such as phosphorus or boron can be doped (injected). In the above example, a polysilicon film into which phosphorus is injected is used as the material of the conductor 401. In this embodiment, the material of the conductor 401 is not particularly limited as long as it is a conductor film. However, in this embodiment, since there is a step of performing a process using high-temperature heat in the manufacturing process, it is preferable to use a high-melting point metal when using a metal as the material of the conductor 401. Furthermore, when a high-melting point metal is used, it is preferable to select a material having a linear expansion coefficient close to that of silicon from among group 4 elements, group 5 elements, and group 6 elements as the material of the conductor 401. More specifically, for example, tantalum (Ta), titanium (Ti), tungsten (W), hafnium (Hf), etc. can be used as the material of the conductor 401. In addition, in this embodiment, since the conductor 401 is used as a capacitor, in order to improve the performance as a capacitor that drops noise to ground, it is better to reduce the resistance of the conductor 401. Therefore, it is preferable to use, for example, tantalum as the material for the conductor 401.

[0127] Next, as shown on the right side of FIG. 20A, an insulating film 303 is formed on the conductor 401. In this embodiment, the material of the insulating film 303 is not particularly limited as long as it is an insulating material. In the above example, a silicon nitride film is selected as the material of the insulating film 302. Since the silicon nitride film has a higher relative dielectric constant than a silicon oxide film, it is preferable to select a material with such a high relative dielectric constant as the material of the insulating film 303 when the conductors 401 and 402 sandwiching the insulating film 303 are made to function as a capacitor. In addition, if the thickness of the insulating film 303 is made thin, the capacitance value of the capacitor can be increased, but depending on the applied voltage, the withstand voltage of the capacitor cannot be ensured and it may be destroyed. Therefore, it is preferable to select the material and thickness of the insulating film 303 according to the applied voltage. In the above example, the thickness of the insulating film 302 is set to 7 nm.

[0128] Next, as shown on the left side of FIG. 20B, a conductor 402 is formed on the insulating film 303, and an insulating film 302 is formed on the conductor 402. As with the conductor 401, the material of the conductor 402 is not particularly limited as long as it is a conductive film, and for example, a polysilicon film can be used. Furthermore, in order to reduce the resistance of the conductor 402, ions of phosphorus, boron, or the like may be doped (injected) into the polysilicon film. As with the insulating film 303, the material of the insulating film 302 is not particularly limited as long as it is an insulator, and for example, a silicon nitride film can be used.

[0129] Next, as shown in the second from the left in Fig. 20B, the silicon substrate 300 that will become the substrate 20 is inverted and bonded to the substrate 10. Furthermore, as shown in the third from the left in Fig. 20B, the silicon substrate 300 is thinned. Then, as shown in the right side of Fig. 20B, an insulating film (not shown) and a hard mask 501 are formed on the silicon substrate 300.

[0130] Next, as shown on the left side of FIG. 20C, the insulating film (not shown) and the silicon substrate 300 are etched according to the pattern of the hard mask 501. Furthermore, as shown in the second from the left side of FIG. 20C, the hard mask 501 is removed. Then, as shown in the third from the left side of FIG. 20C, a polysilicon film 330 is formed above the silicon substrate 300. Next, as shown on the right side of FIG. 20C, a resist 502 is formed on the polysilicon film 330, and the polysilicon film 330 is etched according to the resist pattern to form a transistor. In this manner, the configuration shown in FIG. 20D can be obtained. After this, through electrodes 420 and 422 for connecting with the conductors 401 and 402 are formed.

[0131] The next step will be described. Fig. 20E shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line BB' shown in Fig. 18. As shown in Fig. 20E, etching is performed until the upper surface of the conductor 402 is exposed, forming a trench 514. Fig. 20F shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line AA' shown in Fig. 18. In Fig. 20F, unlike Fig. 20E, etching is performed until the upper surface of the conductor 401 is exposed, forming a trench 516.

[0132] The next step will be described. Fig. 20G shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line BB' shown in Fig. 18. As shown in Fig. 20G, an insulating film 332 made of an oxide film or the like is embedded in the trench 514. At this time, the oxide film is applied by spin-on-glass, and a thermal process is performed to flatten it, thereby obtaining the configuration shown in Fig. 20G.

[0133] The next step will now be described. Fig. 20H shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line BB' shown in Fig. 18. As shown in Fig. 20H, an insulating film 332 is also formed on the transistor, and planarization is performed.

[0134] The next step will now be described. Fig. 20I shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line BB' shown in Fig. 18. As shown in Fig. 20I, a through electrode 422 is formed so as to penetrate the insulating film 332 in the trench 514. Fig. 20J shows a cross-sectional view corresponding to the cross-sectional view of the imaging device 1 taken along line CC' shown in Fig. 18 at the same stage of the process as Fig. 20I. As shown in Fig. 20J, the through electrodes 420, 422 are not provided in this cross section.

[0135] <<7. Summary>> As described above, in each embodiment of the present disclosure, the performance of the imaging device (photodetector) 1 having a layered structure can be further improved.

[0136] Furthermore, the embodiments of the present disclosure are not limited to application to the imaging device 1 that captures an image by detecting the distribution of the amount of incident visible light. For example, the present embodiments can be applied to a light detection device that detects the distribution of incident radiant energy such as ultraviolet light, infrared light, and X-rays. Furthermore, the present embodiments are not limited to application to imaging devices that capture images, and may be applied to distance measuring devices that measure distances using reflected light. Furthermore, the embodiments of the present disclosure may be applied to various semiconductor devices used for other purposes.

[0137] Moreover, the imaging device 1 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions used in the manufacture of general semiconductor devices. That is, the imaging device 1 according to the present embodiment can be manufactured using existing semiconductor device manufacturing processes.

[0138] Examples of the above-mentioned methods include physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD). Examples of the PVD methods include vacuum deposition, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, radio frequency (RF)-direct current (DC) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, high frequency sputtering, etc.), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of the CVD methods include plasma CVD, thermal CVD, metal organic (MO) CVD, and photo CVD. Further, other methods include electrolytic plating, electroless plating, spin coating, immersion, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Further, patterning methods include chemical etching such as shadow mask, laser transfer, and photolithography, and physical etching using ultraviolet light, laser, and the like. In addition, planarization techniques include CMP (Chemical Mechanical Polishing), laser planarization, and reflow.

[0139] <<8. Application Examples>> <8.1 Application examples to electronic devices> In addition, the imaging device 1 according to the embodiment of the present disclosure can be applied to various electronic devices 900, such as imaging systems such as digital still cameras and digital video cameras, mobile phones with imaging functions, or other devices with imaging functions.

[0140] FIG. 21 is a block diagram showing an example of the configuration of an electronic device 900 incorporating the imaging device 1. As shown in FIG.

[0141] 21, the electronic device 900 has an optical system 912, an imaging device 1, and a DSP (Digital Signal Processor) 914. Furthermore, in the electronic device 900, the DSP 914, a display device 915, an operation system 916, a memory 918, a recording device 919, and a power supply system 920 are connected via a bus 917. The electronic device 900 is capable of capturing still images and moving images.

[0142] The optical system 912 is configured to have one or more lenses, and guides image light (incident light) from a subject to the imaging device 1, forming an image on the light receiving surface (sensor section) of the imaging device 1.

[0143] The imaging device 1 may be any of the above-described configuration examples. In the imaging device 1, electrons are accumulated for a certain period of time in accordance with an image formed on a light receiving surface via an optical system 912. Then, a signal in accordance with the electrons accumulated in the imaging device 1 is supplied to a DSP 914.

[0144] The DSP 914 performs various signal processing on the signal from the imaging device 1 to obtain an image, and temporarily stores the image data in a memory 918. The image data stored in the memory 918 is recorded in a recording device 919 or supplied to a display device 915 to display the image. In addition, an operation system 916 accepts various operations by a user and supplies operation signals to each block of the electronic device 900, and a power supply system 920 supplies power necessary to drive each block of the electronic device 900.

[0145] The above shows an example of the configuration of the electronic device 900. Each of the above components may be configured using general-purpose materials, or may be configured using hardware specialized for the function of each component. Such a configuration may be appropriately changed depending on the technical level at the time of implementation.

[0146] <8.2 Application example to endoscopic surgery system> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0147] FIG. 22 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0148] 22 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0149] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel.

[0150] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0151] An optical system and an image sensor are provided inside the camera head 11102, and reflected light (observation light) from an observation target is collected on the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as RAW data.

[0152] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0153] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0154] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing an operation site or the like.

[0155] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 11100.

[0156] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing the field of view of the endoscope 11100 and securing the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, image, or graph.

[0157] The light source device 11203 that supplies irradiation light to the endoscope 11100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation object with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0158] The light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. The driving of the image sensor of the camera head 11102 may be controlled in synchronization with the timing of the change in the light intensity to obtain images in a time-division manner, and the images may be synthesized to generate an image with a high dynamic range that is free of so-called blackout and whiteout.

[0159] The light source device 11203 may be configured to supply light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, by utilizing the wavelength dependency of light absorption in body tissue, a narrow band light is irradiated compared to the irradiated light (i.e., white light) during normal observation, and a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast, so-called narrow band imaging is performed. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating an excitation light. In the fluorescent observation, it is possible to irradiate an excitation light to a body tissue and observe the fluorescence from the body tissue (autofluorescence observation), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0160] FIG. 23 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0161] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so as to be able to communicate with each other.

[0162] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0163] The imaging unit 11402 may include one imaging element (so-called single-plate type) or multiple imaging elements (so-called multiple-plate type). When the imaging unit 11402 is configured as a multiple-plate type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to a 3D (dimensional) display. By performing a 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. Note that when the imaging unit 11402 is configured as a multiple-plate type, the lens unit 11401 may also be provided in multiple systems corresponding to each imaging element.

[0164] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens.

[0165] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be appropriately adjusted.

[0166] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0167] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and focus of the captured image.

[0168] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by a user, or may be automatically set by the control unit 11413 of the CCU 11201 based on an acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0169] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0170] The communication unit 11411 is configured with a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0171] Furthermore, the communication unit 11411 transmits, to the camera head 11102, a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0172] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data sent from the camera head 11102 .

[0173] The control unit 11413 performs various controls related to imaging of the surgical site etc. by the endoscope 11100 and display of the captured image obtained by imaging the surgical site etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0174] Further, the control unit 11413 causes the display device 11202 to display the captured image showing the surgical site, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical tools such as forceps, specific living body parts, bleeding, mist when the energy treatment tool 11112 is used, etc., by detecting the shape and color of the edge of an object included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it may use the recognition result to superimpose various types of surgery support information on the image of the surgical site. By superimposing and presenting the surgery support information to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0175] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0176] Here, in the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0177] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the endoscope 11100 and the imaging unit 1140 of the camera head 11102 among the above-described configurations.

[0178] Although an endoscopic surgery system has been described here as an example, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0179] <8.3 Application examples to mobile objects> The technology according to the present disclosure (the present technology) may be realized, for example, as an apparatus mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0180] FIG. 24 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0181] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 24, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053 are illustrated.

[0182] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0183] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0184] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0185] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0186] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0187] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0188] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0189] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0190] The audio / video output unit 12052 transmits at least one output signal of audio and video to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 24, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0191] FIG. 25 is a diagram showing an example of the installation position of the imaging unit 12031.

[0192] In FIG. 25, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0193] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield in the vehicle interior mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the upper part of the windshield in the vehicle interior is mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0194] 25 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0195] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0196] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0197] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0198] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0199] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the imaging unit 12031 and the like of the above-described configuration.

[0200] <<9. Supplementary Information>> Although the preferred embodiment of the present disclosure has been described in detail above with reference to the attached drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person having ordinary knowledge in the technical field of the present disclosure can conceive of various modified or amended examples within the scope of the technical ideas described in the claims, and it is understood that these also naturally belong to the technical scope of the present disclosure.

[0201] In addition, the effects described in this specification are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that are apparent to a person skilled in the art from the description of this specification, in addition to or in place of the above effects.

[0202] The present technology can also be configured as follows. (1) A first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out charges generated by the photoelectric conversion element; a third substrate provided on the second substrate and having a control circuit for controlling the photoelectric conversion element and the readout circuit; Equipped with In the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix shape along row and column directions, a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area; Light detection device. (2) the first substrate further includes a first selection gate for selecting a column of the photoelectric conversion elements from which the charges are to be read out, from the plurality of photoelectric conversion elements in the pixel area; the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode; The optical detection device according to (1) above. (3) the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode and a first wiring provided on the first substrate; The optical detection device according to (2) above. (4) the second substrate further includes a second selection gate for selecting a row of the photoelectric conversion elements from which the charges are to be read out, from the plurality of photoelectric conversion elements in the pixel area; the control circuit of the third substrate and the second selection gate of the second substrate are electrically connected via a second wiring provided on the second substrate; The optical detection device according to (3) above. (5) When the photodetector is viewed from above, The direction in which the first wiring extends is substantially perpendicular to the direction in which the second wiring extends. The photodetector according to (4) above. (6) The second substrate and the first substrate are electrically connected to each other via a first through electrode that penetrates a silicon layer of the second substrate. The photodetector according to any one of (1) to (5) above. (7) The semiconductor device further includes a first conductor sandwiched between the first substrate and the second substrate by an insulating film. The optical detection device according to (6) above. (8) The first conductor has an opening surrounding the first through electrode. The optical detection device according to (7) above. (9) a first potential is applied to the first conductor via a second through electrode that penetrates the silicon layer of the second substrate; The optical detection device according to (7) or (8) above. (10) The first conductor is made of polysilicon or a high melting point metal. The photodetector according to any one of (7) to (9) above. (11) Further comprising first and second conductors sandwiching a dielectric between the first substrate and the second substrate. The optical detection device according to (6) above. (12) The second conductor is Located below the first conductor, The area is larger than that of the first conductor. The optical detection device according to (11) above. (13) a second potential is applied to the second conductor through a third through electrode that penetrates a silicon layer of the second substrate; the first conductor has an opening surrounding the third through electrode; The optical detection device according to (12) above. (14) The second substrate and the first substrate are electrically connected by bonding electrodes provided on the bonding surfaces of both substrates. The photodetector according to any one of (1) to (5) above. (15) The photodetector according to (14) above, wherein the junction electrode is made of copper. (16) The semiconductor device further includes a first conductor sandwiched between the first substrate and the second substrate by an insulating film. The optical detection device according to (14) or (15) above. (17) The photodetector according to claim 16, wherein the first conductor is made of the junction electrode. (18) Further comprising first and second conductors sandwiching a dielectric between the first substrate and the second substrate. The optical detection device according to (14) or (15) above. (19) A first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out charges generated by the photoelectric conversion element; a first conductor and a second conductor sandwiching a dielectric between the first substrate and the second substrate; Equipped with Light detection device. (20) An electronic device equipped with a light detection device, The light detection device includes: A first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out charges generated by the photoelectric conversion element; a third substrate provided on the second substrate and having a control circuit for controlling the photoelectric conversion element and the readout circuit; Equipped with In the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix shape along row and column directions, a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area; electronic equipment. [Explanation of symbols]

[0203] 1. Imaging device 10, 20, 30 board 11, 21, 31 Semiconductor substrate 12 pixels 13 Pixel Area 22 Readout circuit 23 Pixel drive line 24 Vertical signal line 32 Logic Circuits 33 Vertical drive circuit 34 Column signal processing circuit 35 Horizontal drive circuit 36 System Control Circuit 40, 301, 302, 303, 332 Insulating film 42, 410, 415, 420, 422 Through electrode 101 Photodiode 102 Transfer transistor 103 Floating Diffusion 105, 305 Interlayer insulating film 201 Reset transistor 202 Amplifying transistor 203 Selection transistor 204 Conversion efficiency switching transistor 205 additional capacity 111, 300, 311 Silicon substrate 120, 220 wiring layers 330 Polysilicon film 401, 402 Conductor 403, 404 Notch 412, 413, 512, 513, 514, 516 Trench 501 Hard Mask 502 Resist 530 Support Substrate 600 Bonding electrodes

Claims

1. a first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out charges generated by the photoelectric conversion element; a third substrate provided on the second substrate and having a control circuit for controlling the photoelectric conversion element and the readout circuit; Equipped with In the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix shape along row and column directions, a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area; Light detection device.

2. the first substrate further includes a first selection gate for selecting a column of the photoelectric conversion elements from which the charges are to be read out, from the plurality of photoelectric conversion elements in the pixel area; the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode; 2. The optical detection device according to claim 1.

3. the control circuit of the third substrate and the first selection gate of the first substrate are electrically connected via the first electrode and a first wiring provided on the first substrate; 3. The optical detection device according to claim 2.

4. the second substrate further includes a second selection gate configured to select a row of the photoelectric conversion elements from which the charges are to be read out from the plurality of photoelectric conversion elements in the pixel area; the control circuit of the third substrate and the second selection gate of the second substrate are electrically connected via a second wiring provided on the second substrate; 4. The optical detection device according to claim 3.

5. When the photodetector is viewed from above, The direction in which the first wiring extends is substantially perpendicular to the direction in which the second wiring extends.

5. The optical detection device according to claim 4.

6. The second substrate and the first substrate are electrically connected to each other via a first through electrode that penetrates a silicon layer of the second substrate.

2. The optical detection device according to claim 1.

7. The semiconductor device further includes a first conductor sandwiched between the first substrate and the second substrate by an insulating film.

7. The optical detection device according to claim 6.

8. the first conductor has an opening surrounding the first through electrode; 8. The optical detection device according to claim 7.

9. a first potential is applied to the first conductor via a second through electrode that penetrates the silicon layer of the second substrate; 8. The optical detection device according to claim 7.

10. The first conductor is made of polysilicon or a high melting point metal.

8. The optical detection device according to claim 7.

11. Further comprising first and second conductors sandwiching a dielectric between the first substrate and the second substrate.

7. The optical detection device according to claim 6.

12. The second conductor is Located below the first conductor, The area is larger than that of the first conductor. The optical detection device according to claim 11.

13. a second potential is applied to the second conductor via a third through electrode that penetrates a silicon layer of the second substrate; the first conductor has an opening surrounding the third through electrode; 13. The optical detection device of claim 12.

14. The second substrate and the first substrate are electrically connected to each other by bonding electrodes provided on the bonding surfaces of the two substrates.

2. The optical detection device according to claim 1.

15. The photodetector according to claim 14 , wherein the bonding electrode is made of copper.

16. The semiconductor device further includes a first conductor sandwiched between the first substrate and the second substrate by an insulating film.

15. The optical detection device of claim 14.

17. The photodetector according to claim 16 , wherein the first conductor comprises the junction electrode.

18. The semiconductor device further includes first and second conductors sandwiching a dielectric between the first substrate and the second substrate.

15. The optical detection device of claim 14.

19. a first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out charges generated by the photoelectric conversion element; a first conductor and a second conductor sandwiching a dielectric body between the first substrate and the second substrate; Equipped with Light detection device.

20. An electronic device equipped with a light detection device, The light detection device includes: a first substrate having a pixel area composed of a plurality of photoelectric conversion elements; a second substrate provided on the first substrate and having a readout circuit for reading out charges generated by the photoelectric conversion element; a third substrate provided on the second substrate and having a control circuit for controlling the photoelectric conversion element and the readout circuit; Equipped with In the pixel area, the plurality of photoelectric conversion elements are arranged in a matrix shape along row and column directions, a first electrode electrically connecting the third substrate and the first substrate is provided in a region of the second substrate that does not overlap with the pixel area; electronic equipment.

Images