Semiconductor device
The method addresses the challenge of securely bonding through-electrodes in semiconductor devices by using a cured resin layer to facilitate even heat transmission and pressure distribution, resulting in reliable bonding and reduced defects.
Patent Information
- Application Number
- JP2025019331
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-07-27
- Filing Date
- 2025-02-07
- Publication Date
- 2025-04-22
AI Technical Summary
Existing methods for manufacturing semiconductor devices struggle to securely bond through-electrodes due to inadequate heat transmission and pressure distribution, especially when semiconductor dies have multiple terminal electrodes.
A method involving a semiconductor substrate with terminal electrodes and through-electrodes, where a cured resin layer is applied to cover the terminal electrodes and through-electrodes, allowing for even heat transmission and pressure application during the bonding process with a support's wiring electrode.
This method ensures reliable heat-compression bonding of through-electrodes by ensuring uniform heat distribution and adequate pressure across the semiconductor die, preventing defects such as bending or cracking.
Smart Images

Figure 2025066190000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a method for manufacturing a semiconductor device, a semiconductor device, and a semiconductor member. [Background technology]
[0002] In recent years, with the rapid advancement of electronic devices such as AI / HPC, the size and density of semiconductor packages have increased dramatically. The package structure is not limited to surface mounting with high density, but the package structure and mounting process are becoming more complex and diverse, including inorganic (silicon) or organic interposer (Bridgedie / RDL) technology, 2.xD mounting using it, and 3D mounting (HBM / Chiplet) technology using TSV. For example, Resonac Inc., with its main base of operations at the Packaging Solutions Center, is developing next-generation semiconductor packaging process technology from the customer's (semiconductor manufacturer's) perspective, combining mounting processes and materials.
[0003] As a technology in the field of semiconductor packages, Patent Document 1 discloses a method for manufacturing a semiconductor device in which a semiconductor die provided with a through electrode is mounted on a carrier and sealed, a wiring layer is formed on the sealing layer, and another semiconductor die is mounted on the wiring layer. Patent Document 2 discloses another method for manufacturing a semiconductor device. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] US Patent Application Publication No. 2021 / 0098421 [Patent Document 2] US Patent Application Publication No. 2022 / 0093526 Summary of the Invention [Problem to be solved by the invention]
[0005] In the manufacturing method described in Patent Document 1, in addition to the through electrodes, a plurality of terminal electrodes for connecting to the wiring layer above the sealing layer may be provided on the upper surface of the semiconductor die. In this case, as shown in (a) and (b) of FIG. 9, after the semiconductor die 120 sucked by the collet C1 is mounted on the support 110, the semiconductor die 120 is heated and pressure is applied to the semiconductor die 120 by the metal collet C1 that also functions as a heating element, so that the lower end 123b of the through electrode 123 of the semiconductor die 120 is thermally bonded to the wiring electrode of the support 110. However, since the area R where the collet C1 contacts the semiconductor die 120 is limited to the outer periphery to avoid contact with the plurality of terminal electrodes 122, etc., the heat of the collet C1 may not be sufficiently transferred to the semiconductor die 120 and the through electrode 123 (bonding portion) located therein. Furthermore, since the load is applied only to the outer periphery of the semiconductor die 120 from the collet C1, there is a risk that the bonding pressure of the through electrode 123 to the wiring electrode of the support 110 may not be sufficiently secured. For the above reasons, the method shown in Figures 9(a) and 9(b) may not be able to reliably thermocompression bond the lower end 123b of the through electrode 123 of the semiconductor die 120 having multiple terminal electrodes 122 to the wiring electrode.
[0006] An object of the present disclosure is to provide a method for manufacturing a semiconductor device that can reliably bond a through electrode of a semiconductor member (semiconductor die). [Means for solving the problem]
[0007] [1] One aspect of the present disclosure relates to a method for manufacturing a semiconductor device, the method for manufacturing a semiconductor device comprising the steps of: preparing a semiconductor member including a semiconductor substrate having a first surface and an opposite second surface, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, a through electrode penetrating the semiconductor substrate and having a first end protruding from the first surface and a second end protruding from the second surface, and a cured resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through electrode, preparing a support including at least one wiring electrode, placing the semiconductor member on the support such that the second ends of the through electrode of the semiconductor member correspond to the wiring electrode of the support, and pressing a heating element against a surface of the cured resin layer of the semiconductor member while contacting it to heat-bond the second ends of the through electrode to the wiring electrode of the support.
[0008] In this method for manufacturing a semiconductor device, a hardened resin layer is provided on the first surface of the semiconductor device so as to cover the first ends of the terminal electrodes and the through electrodes. Then, the surface of the hardened resin layer is pressed while being in contact with a heating element, and the second ends of the through electrodes and the wiring electrodes of the support are thermally bonded. In this case, the first ends of the terminal electrodes and the through electrodes are covered with a resin layer, and the semiconductor member can be heated by the heating element without avoiding the terminal electrodes, etc., so that heat from the heating element can be sufficiently transmitted to the semiconductor member and the through electrodes located therein. Furthermore, by providing such a resin layer, a load can be applied to the entire surface of the semiconductor die, so that the bonding pressure of the through electrodes to the wiring electrodes of the support can be sufficiently ensured. As described above, this method for manufacturing a semiconductor device makes it possible to reliably bond the through electrodes of a semiconductor die having a plurality of terminal electrodes. Note that the "hardened resin layer" referred to here is sufficient if it is hardened to the extent that it can transmit the pressure from the heating element or does not adhere to the heating element in contact, and also includes the case where it is not completely hardened (so-called C stage).
[0009] Furthermore, in this method for manufacturing a semiconductor device, a hardened resin layer is provided on the first surface of the semiconductor device so as to cover the first ends of the terminal electrodes and the through electrodes. The surface of the hardened resin layer is then adsorbed and lifted, and the semiconductor member is then placed. In this case, the terminal electrodes and the like are covered with the resin layer, and the semiconductor member can be lifted by suction with a holding member or the like without avoiding the terminal electrodes and the like, so that it is possible to prevent the semiconductor member (semiconductor die) from bending or cracking. In addition, since the terminal electrodes and the like are covered with the resin layer, when the semiconductor member is attached to the support, a load is applied to the entire semiconductor member in the planar direction, so that the semiconductor member can be reliably attached to the support. As described above, this method for manufacturing a semiconductor device makes it possible to reliably attach the semiconductor member. Furthermore, in this method for manufacturing a semiconductor device, the portion covering the terminal electrodes and the like is formed from the hardened resin layer, so that the manufacturing process is easy. Note that the "hardened resin layer" referred to here is sufficient if it is hardened to an extent that at least one of adsorption and application of a load can be performed, and also includes the case where it is not completely hardened (so-called C stage).
[0010] [2] In the method for manufacturing a semiconductor device according to [1] above, the step of preparing a semiconductor member may include a step of forming a resin layer containing a curable resin composition on the first surface of the semiconductor substrate so as to cover the first ends of the terminal electrodes and the through electrodes, and a step of curing the resin layer to obtain a cured resin layer. In this case, the resin layer that protects the first ends of the terminal electrodes and the through electrodes can be easily formed.
[0011] [3] In the method for manufacturing a semiconductor device according to the above [1] or [2], the cured resin layer is preferably formed by attaching a resin film containing a curable resin composition to the first surface of the semiconductor substrate and then curing the resin film. In this case, the resin layer for protecting the first ends of the terminal electrodes and the through electrodes can be easily formed.
[0012] [4] In the method for manufacturing a semiconductor device according to the above [1] or [2], the cured resin layer may be formed by applying a liquid adhesive containing a curable resin composition to the first surface of the semiconductor substrate and then curing the liquid adhesive. In this case, the resin layer that protects the first ends of the terminal electrodes and the through electrodes can be easily formed.
[0013] [5] In any one of the above methods for manufacturing a semiconductor device [1] to [4], the cured resin layer preferably contains an inorganic filler. In this case, the hardness (elastic modulus, etc.) of the resin layer can be improved, and bending and cracking of the semiconductor member can be further suppressed. In addition, the inclusion of the inorganic filler can also suppress warping of the semiconductor member including the resin layer. Furthermore, by adjusting the shape (aspect ratio) of the inorganic filler or the content of the inorganic filler, it is also possible to adjust the heat transferred from the heating element to the lower end of the through electrode to a desired value.
[0014] [6] In the method for producing a semiconductor device according to [5] above, the content of the inorganic filler in the cured resin layer may be 30 mass% or more based on the total amount of solids contained in the resin layer before curing. In this case, warping of the semiconductor member can be more reliably suppressed.
[0015] [7] In the manufacturing method of a semiconductor device according to the above [5] or [6], the average particle size of the inorganic filler in the cured resin layer is preferably 20 μm or less. In this case, even if the terminal electrodes and their pitch of the semiconductor member are fine, the resin and filler can be inserted (filled) between the terminal electrodes, and the terminal electrodes can be reliably covered with the resin layer. In addition, the cured resin layer can be prevented from warping.
[0016] [8] In any one of the methods for manufacturing a semiconductor device according to [1] to [7] above, the elastic modulus of the cured resin layer at room temperature may be 10 MPa or more. In this case, bending and cracking of the semiconductor member can be further suppressed. In addition, when the cured resin layer is polished to expose the head of the terminal electrode, the polishing operation can be easily performed. The elastic modulus here means Young's modulus. In addition, room temperature means 25°C. Since the elastic modulus of the cured resin layer is high, the resin layer, the copper pattern, etc. can be easily ground in the subsequent steps. As described above, the cured resin layer may not be completely cured, and may be hard enough to be polished in the polishing operation.
[0017] [9] In any one of the manufacturing methods of a semiconductor device according to [1] to [8] above, the step of preparing a semiconductor member preferably includes the steps of: preparing a semiconductor wafer including a semiconductor substrate, in which the semiconductor wafer is provided with a plurality of through electrodes including a through electrode, and a first surface of the semiconductor wafer is provided with a plurality of electrodes including a plurality of terminal electrodes and each first end of the plurality of through electrodes; forming a wafer resin layer including a curable resin composition on the first surface of the semiconductor wafer so as to cover the plurality of electrodes and each first end of the plurality of through electrodes; curing the wafer resin layer; and obtaining a semiconductor member by dicing the semiconductor wafer. In this case, a plurality of semiconductor members can be produced at once. In addition, according to this manufacturing method, even when the semiconductor member is diced into individual pieces, it can be peeled off from the dicing tape without bending or cracking.
[0018]
[10] Any of the methods for manufacturing a semiconductor device according to [1] to [9] above may further include a step of sealing the semiconductor member with a sealing material after the second end of the through electrode is joined to the wiring electrode of the support, thereby forming a sealing material layer on the support.
[0019]
[11] In the method for manufacturing a semiconductor device according to
[10] above, the average particle size of the inorganic filler contained in the encapsulant layer is preferably larger than the average particle size of the inorganic filler contained in the cured resin layer. By including a large-sized inorganic filler in the encapsulant, it is possible to reliably suppress warping of the encapsulant layer due to heat. In particular, in a large-size process, it is possible to reliably adsorb the encapsulant in high-precision processing in subsequent processes.
[0020]
[12] In the method for manufacturing a semiconductor device according to the above
[10] or
[11] , the difference between the linear expansion coefficient of the encapsulant layer and the linear expansion coefficient of the cured resin layer is preferably within 150 ppm / K. In this case, the behavior of the encapsulant layer and the resin layer becomes uniform when heat is applied to the fabricated semiconductor device, and the occurrence of problems due to heat, such as misalignment in expansion, can be reduced.
[0021]
[13] The method for manufacturing a semiconductor device according to any one of
[10] to
[12] above may further include a step of polishing the cured resin layer together with the encapsulant layer so that the tips of the terminal electrodes and the first ends of the through electrodes are exposed from the cured resin layer. In this case, it is possible to precisely form a fine wiring layer or the like on the polished surface of the encapsulant layer or the like.
[0022]
[14] In any one of the above methods for manufacturing a semiconductor device [1] to
[13] , the thickness of the cured resin layer in the step of arranging the semiconductor member may be 15 μm or more, or 30 μm or more. In this case, bending and cracking of the semiconductor member can be more reliably suppressed.
[0023]
[15] In any one of the methods for manufacturing a semiconductor device according to the above [1] to
[14] , the thermal conductivity of the cured resin layer is preferably equal to or greater than 0.3 W / m K. In this case, heat can be reliably transferred to the joint between the lower end of the through electrode and the wiring electrode, thereby ensuring thermal bonding between them.
[0024]
[16] In any one of the methods for manufacturing a semiconductor device according to [1] to
[15] above, the second surface of the semiconductor substrate may be provided with an auxiliary member of an insulating layer for attaching the semiconductor member to the support, and the auxiliary member may surround the periphery of the second end of the through electrode. In this case, the through electrode of the semiconductor member can be more reliably joined to the wiring electrode of the support while ensuring insulation from other electrodes. In addition, the semiconductor member can be easily attached to the support.
[0025]
[17] In the method for manufacturing a semiconductor device according to
[16] above, the auxiliary member may be provided on the second surface of the semiconductor member before the semiconductor member is placed on the support, which simplifies the process of attaching the semiconductor member to the support.
[0026]
[18] In the method for manufacturing a semiconductor device according to
[16] or
[17] above, the difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the auxiliary member may be within 150 ppm / K. In this case, the thermal expansion of the cured resin layer and the auxiliary member sandwiching the semiconductor substrate is approximately the same, so that it is possible to prevent the position or parallelism of the semiconductor substrate from being impaired and to suppress warping of the mounted chip.
[0027]
[19] In any one of the methods for manufacturing a semiconductor device according to the above
[16] to
[18] , the auxiliary member may be a non-conductive adhesive film. In this case, the auxiliary member can be easily provided.
[0028]
[20] In any one of the above methods for manufacturing a semiconductor device
[16] to
[19] , the auxiliary member may have a transmittance of 10% or more. In this case, the alignment mark formed on the semiconductor die can be confirmed by a camera through the auxiliary member, so that the semiconductor die can be mounted on the support with high accuracy.
[0029]
[21] In any of the above methods for manufacturing a semiconductor device [1] to
[20] , the thickness of the cured resin layer may be between 50% and 150% of the height of the terminal electrodes. In this case, the thickness of the resin layer and the height of the terminal electrodes are approximately equal, so that the semiconductor member can be lifted and attached more reliably. The height of the terminal electrodes here means the average height of the terminal electrodes.
[0030]
[22] In any one of the above methods for manufacturing a semiconductor device [1] to
[21] , in the step of placing the semiconductor member, the holding member is preferably adsorbed to the entire surface of the cured resin layer to lift it up, and in the step of heat bonding, the holding member is preferably made to function as a heating element, and heat bonding is performed while the holding member is brought into contact with the entire surface of the cured resin layer and pressed against it. In this case, it is possible to more reliably prevent the semiconductor member from bending or cracking, and the through electrodes of the semiconductor member can be more reliably bonded to the wiring electrodes of the support. Furthermore, the semiconductor member can be more reliably attached to the support.
[0031]
[23] In any one of the above methods for manufacturing a semiconductor device [1] to
[22] , the ionic impurity concentration of the cured resin layer is preferably 5 ppm or less. In this case, migration between the terminal electrodes covered with the cured resin layer or migration between the terminal electrodes and the first ends of the through electrodes can be prevented.
[0032]
[24] In any one of the above methods for manufacturing a semiconductor device [1] to
[23] , the adhesive strength between the cured resin layer and the first surface of the semiconductor substrate may be 1 MPa or more. In this case, in the manufactured semiconductor device, peeling of the resin layer of the semiconductor member is prevented.
[0033]
[25] In any of the above methods for manufacturing a semiconductor device [1] to
[24] , the adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is preferably 3 MPa or more. In this case, peeling of the resin layer of the semiconductor member is more reliably prevented in the manufactured semiconductor device.
[0034]
[26] The method for manufacturing a semiconductor device according to any one of [1] to
[25] above may further include a step of mounting a first semiconductor die and a second semiconductor die on the first surface side of the semiconductor member after attaching the semiconductor member to the support, and in the mounting step, the first semiconductor die and the second semiconductor die may be connected by the semiconductor member. In this case, the semiconductor die can function as a bridge die.
[0035]
[27] In another aspect, the present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor member and a support body including at least one wiring electrode and to which the semiconductor member is attached. The semiconductor member includes a semiconductor substrate having a first surface and an opposite second surface, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, a through electrode penetrating the semiconductor substrate and having a first end protruding from the first surface and a second end protruding from the second surface, and a hardened resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through electrode. In the semiconductor device, the second end of the through electrode is joined to the wiring electrode of the support body.
[0036]
[28] The semiconductor device according to
[27] above may further include an insulating auxiliary member for attaching the semiconductor member to the support, and the auxiliary member may surround the second end of the through electrode. In this case, insulation at the joint between the through electrode of the semiconductor member and the wiring electrode of the support can be more reliably ensured.
[0037]
[29] The semiconductor device according to
[27] or
[28] above may further include an encapsulant layer that encapsulates the semiconductor member.
[0038]
[30] In the semiconductor device according to
[29] above, the inorganic filler contained in the encapsulant layer may have an average particle size larger than that of the inorganic filler contained in the cured resin layer. By including inorganic fillers having a large size in the encapsulant layer, warping of the encapsulant layer due to heat can be reliably suppressed.
[0039]
[31] In the semiconductor device of
[29] or
[30] above, the difference between the linear expansion coefficient of the encapsulant layer and the linear expansion coefficient of the cured resin layer may be within 150 ppm / K. In this case, the behavior of the encapsulant layer and the resin layer becomes uniform when heat is applied to the semiconductor device, and it is possible to reduce the occurrence of problems due to heat, such as misalignment in expansion.
[0040]
[32] Any of the semiconductor devices
[27] to
[31] above may further include a first semiconductor die and a second semiconductor die provided on the first surface side of the semiconductor substrate, and at least one of first ends of the plurality of terminal electrodes and through electrodes of the semiconductor member may be connected to the first semiconductor die and the second semiconductor die. Effect of the Invention
[0041] According to the present disclosure, it is possible to provide a method for manufacturing a semiconductor device that can reliably bond a through electrode of a semiconductor member (semiconductor die). [Brief description of the drawings]
[0042] [Figure 1] FIG. 1 is a cross-sectional view showing an example of a cross-sectional configuration of a semiconductor device according to one embodiment of the present invention. [Diagram 2] 2(a) to 2(d) are cross-sectional views illustrating a method for manufacturing the semiconductor device shown in FIG. [Diagram 3] 3(a) and (b) are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1, illustrating a step performed after the step shown in FIG. 2(d). [Figure 4] 4(a) and (b) are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1, illustrating a step performed after the step shown in FIG. 3(b). [Diagram 5] 5(a) to 5(c) are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1, illustrating steps carried out after the step shown in FIG. 4(b). [Figure 6] FIGS. 6(a) and 6(b) are diagrams illustrating a process of picking up the bridge die with a collet and performing thermocompression bonding. [Figure 7] 7(a) to 7(e) are cross-sectional views showing a method for collectively fabricating a plurality of bridge dies using a semiconductor wafer. [Figure 8] FIG. 8 is a cross-sectional view showing a bridge die according to a modified example. [Figure 9] FIGS. 9(a) and 9(b) are diagrams for explaining the steps of picking up and crimping a bridge die in a conventional method. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0043] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the following description, the same or corresponding parts are given the same reference numerals, and duplicated descriptions will be omitted. Furthermore, unless otherwise specified, the positional relationships such as up, down, left, and right are based on the positional relationships shown in the drawings. Furthermore, the dimensional ratios of the drawings are not limited to the illustrated ratios.
[0044] In this specification, the term "layer" includes a structure having a shape formed on the entire surface as well as a structure having a shape formed on a part of the surface when observed in a plan view. In this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes as long as the intended effect of the process is achieved.
[0045] In this specification, a numerical range indicated using "~" indicates a range including the numerical values before and after "~" as the minimum and maximum values, respectively. In a numerical range described in stages in this specification, the upper limit or lower limit of a numerical range of a certain stage may be replaced with the upper limit or lower limit of a numerical range of another stage. In a numerical range described in this specification, the upper limit or lower limit of the numerical range may be replaced with a value shown in an example.
[0046] FIG. 1 is a diagram showing an example of a semiconductor device manufactured by a manufacturing method according to an embodiment of the present invention. As shown in FIG. 1, the semiconductor device 1 includes semiconductor dies 2a and 2b, a semiconductor die 3, a substrate 4, wiring layers 5a and 5b, encapsulant layers 6a and 6b, connection electrodes 7a and 7b, and bumps 8a and 8b. The semiconductor dies 2a and 2b (first semiconductor die and second semiconductor die) are, for example, semiconductor chips such as an LSI chip, a CMOS sensor, and a memory. The semiconductor die 3 is, for example, a bridge die or a silicon capacitor, and connects the semiconductor die 2a and the semiconductor die 2b via the connection electrode 7a. In the semiconductor device 1, the wiring layer 5a including a part (lower part) of the connection electrode 7b, the encapsulant layer 6a encapsulating the semiconductor die 3, the wiring layer 5b including a part (upper part) of the connection electrode 7b and the connection electrode 7a, and the encapsulant layer 6b encapsulating the semiconductor dies 2a and 2b are sequentially stacked on the substrate 4. The connection electrode 7b is connected to the substrate 4 via a plurality of bumps 8a. The substrate 4 is further provided with another plurality of bumps 8b for connection to an external device.
[0047] In this semiconductor device 1, the semiconductor die 3 is provided in the encapsulant layer 6a in a face-up state. The semiconductor die 3 includes a semiconductor substrate 3a, a plurality of terminal electrodes 3b provided on the upper surface (first surface) of the semiconductor substrate 3a, a through electrode 3c penetrating the semiconductor substrate 3a and exposing an upper end (first end) and a lower end (second end) protruding from the upper surface (first surface) and the lower surface (second surface) of the semiconductor substrate 3a, a resin layer 3d formed on the upper surface of the semiconductor substrate 3a so as to cover the upper ends of the plurality of terminal electrodes 3b and the through electrode 3c, and an auxiliary member 3e provided on the lower surface of the semiconductor substrate 3a. The resin layer 3d is a resin film containing a thermosetting adhesive such as a die attach film (DAF) or a liquid thermosetting adhesive, and is a cured resin layer obtained by thermally curing either of them. That is, the material constituting the resin layer 3d is in a semi-cured (B stage) state and then in a fully cured (C stage) state by a subsequent curing process. However, the resin layer 3d may be in a cured state that has not yet reached a completely cured state, so long as there is no problem in the semiconductor device 1. The curable resin composition constituting the resin layer 3d includes a thermosetting resin, and may include, for example, at least one selected from the group consisting of an epoxy resin, a bismaleimide resin, a triazine resin, and a phenolic resin. The curable resin composition may further include a curing agent, a curing accelerator, and an inorganic filler.
[0048] The tips of the terminal electrodes 3b and the upper ends of the through electrodes 3c are exposed on the surface of the resin layer 3d. The upper ends of the terminal electrodes 3b and the through electrodes 3c are connected to the semiconductor dies 2a and 2b via the connection electrodes 7a. The semiconductor die 3, which is, for example, a bridge die, is an extremely thin semiconductor die, and has a thickness of, for example, 100 μm or less, and may have a thickness of 50 μm or less. The terminal electrodes 3b of the semiconductor die 3 and their pitch are also becoming smaller, and the diameter of the terminal electrodes 3b is, for example, 10 μm to 50 μm, the terminal pitch (separation distance) between the terminal electrodes 3b is, for example, 5 μm to 20 μm, and the height of the terminal electrodes 3b is, for example, 20 μm to 50 μm. However, the size of the terminal electrodes 3b is not limited to these. The through electrodes 3c include, for example, silicon through electrodes (Through-silicon Via, TSV). The diameter of the through electrodes 3c is, for example, 10 μm to 50 μm. The upper end of the through electrode 3c protrudes from the upper surface of the semiconductor substrate 3a and is exposed from the resin layer 3d like the terminal electrode 3b, while the lower end of the through electrode 3c protrudes from the lower surface of the semiconductor substrate 3a and is joined (connected) to a wiring electrode of the wiring layer 5a.
[0049] The auxiliary member 3e is a member that extends in a planar direction so as to surround the periphery of the junction between the lower end of the through electrode 3c and the wiring electrode of the wiring layer 5a so as to electrically insulate the junction from other electrodes, and adheres and fixes the semiconductor die 3 to the wiring layer 5a. The auxiliary member 3e is composed of, for example, an adhesive film made of a non-conductive resin (for example, Non Conductive Film, NCF). The curable resin composition that constitutes the auxiliary member 3e includes a thermosetting resin having electrical insulation properties. Examples of such thermosetting resins include epoxy resins, bismaleimide resins, triazine resins, polyimide resins, polyamide resins, cyanoacrylate resins, phenolic resins, unsaturated polyester resins, melamine resins, urea resins, polyurethane resins, polyisocyanate resins, furan resins, resorcinol resins, xylene resins, benzoguanamine resins, diallyl phthalate resins, silicone resins, polyvinyl butyral resins, siloxane-modified epoxy resins, siloxane-modified polyamideimide resins, and acrylate resins. These can be used alone or as a mixture of two or more kinds. The resin composition constituting the auxiliary member 3e may contain a curing agent such as an imidazole-based curing agent, a curing accelerator, a flux compound, an inorganic filler, and a conductive filler. The auxiliary member 3e is not limited to being composed of a film-like member, and may be a paste-like non-conductive material (for example, Non Conductive Paste, NCP). The thermosetting resin composition constituting the NCP may be the same as that described above. The auxiliary member 3e may be formed from a material having a linear expansion coefficient equivalent to that of the material (cured product) constituting the resin layer 3d. For example, the difference between the linear expansion coefficient of the cured resin layer 3d and the linear expansion coefficient of the cured auxiliary member 3e is preferably within 150 ppm / K. In addition, the auxiliary member 3e may have a thickness equivalent to that of the resin layer 3d, or may be thick or thin. The auxiliary member 3e may be formed from a light-transmitting material and may have a transmittance of 10% or more and 100% or less. The transmittance can be obtained, for example, by placing a film (auxiliary member) cut into a 50 mm×50 mm square in a haze meter (for example, NDH-5000 manufactured by Nippon Denshoku Industries Co., Ltd.) and measuring the total light transmittance.
[0050] Next, an example of a method for manufacturing the semiconductor device 1 will be described with reference to FIG. 2 to FIG. 5. FIG. 2 to FIG. 5 are cross-sectional views sequentially illustrating the manufacturing method of the semiconductor device 1 described above. In this manufacturing method of the semiconductor device, as shown in FIG. 2(a), first, a temporary fixing layer 11 is formed on a carrier substrate 10. The carrier substrate 10 is, for example, a glass substrate. The temporary fixing layer 11 is, for example, a curable adhesive layer, and is configured to be peeled off together with the carrier substrate 10 by light, heat, or the like in a process described later. After the temporary fixing layer 11 is formed, a wiring layer 12 is formed on the temporary fixing layer 11. The wiring layer 12 is configured to include a wiring electrode 12a provided in the center, a plurality of connection electrodes 13, and an insulating portion 12b. The wiring layer 12 is, for example, a redistribution layer (RDL). Each wiring electrode 12a and each connection electrode 13 is, for example, configured of a copper pillar. The wiring electrode 12a is formed so that each tip 12d is exposed from a surface 12c of the insulating portion 12b. The connection electrode 13 is formed such that an upper half thereof protrudes from the surface 12c of the insulating portion 12b. The wiring electrode 12a is an electrode connected to a lower end 23b of a through electrode 23 of the semiconductor die 20 described later (see FIG. 2(b)). The connection electrode 13 is an electrode connected to semiconductor dies 26 and 27 described later (see FIG. 3(b)), and is formed on the outer side or the outer periphery side in the planar direction of the wiring layer 12.
[0051] 2(b) and 6, a semiconductor die 20 (semiconductor member) is prepared. The semiconductor die 20 includes a semiconductor substrate 21, a plurality of terminal electrodes 22, a plurality of through electrodes 23, a resin layer 24 (cured resin layer), and an auxiliary member 25. The semiconductor substrate 21 includes an upper surface 21a (first surface) and an opposite lower surface 21b (second surface). The plurality of terminal electrodes 22 are, for example, copper pillars provided on the upper surface 21a of the semiconductor substrate 21, and are connected to wiring (not shown) in the semiconductor substrate 21. The diameter of each terminal electrode 22 is, for example, 10 μm to 50 μm, the terminal pitch (separation distance) between the terminal electrodes 22 is, for example, 5 μm to 20 μm, and the height of the terminal electrodes 22 is, for example, 20 μm to 50 μm. However, the size of the terminal electrodes 22 is not limited to these. The terminal pitch between the terminal electrodes 22 means the shortest distance between the outer circumferential surfaces of the terminal electrodes 22 adjacent to each other. The plurality of through electrodes 23, for example, penetrate the semiconductor substrate 21 and have an upper end 23a (first end) protruding from the upper surface 21a and a lower end 23b (second end) protruding from the lower surface 21b. The diameter of the through electrodes 23 (including the upper end 23a and the lower end 23b) is, for example, 10 μm to 50 μm. The distance between the upper end 23a of the through electrode 23 and the adjacent terminal electrode 22 (similar to the above, the shortest distance between the outer circumferential surfaces) is, for example, 5 μm to 20 μm, and the height of the upper end 23a protruding from the upper surface 21a is, for example, 20 μm to 50 μm. At this stage, the upper end 23a of the through electrode 23 is buried in the resin layer 24 and may not be exposed to the outside, but may be exposed. The lower end 23b of the through electrode 23 may be exposed to the outside.
[0052] The auxiliary member 25 is a member that extends in a planar direction so as to surround the periphery of the joint between the lower end 23b of the through electrode 23 and the wiring electrode 12a of the wiring layer 12 so as to electrically insulate the joint from other electrodes, and adheres and fixes the semiconductor die 20 to the wiring layer 12. The auxiliary member 25 is made of, for example, NCF. The thermosetting resin composition that constitutes the auxiliary member 25 includes, for example, a thermosetting resin having electrical insulation properties. Examples of the thermosetting resin include epoxy resin, bismaleimide resin, triazine resin, polyimide resin, polyamide resin, cyanoacrylate resin, phenolic resin, unsaturated polyester resin, melamine resin, urea resin, polyurethane resin, polyisocyanate resin, furan resin, resorcinol resin, xylene resin, benzoguanamine resin, diallyl phthalate resin, silicone resin, polyvinyl butyral resin, siloxane-modified epoxy resin, siloxane-modified polyamideimide resin, acrylate resin, etc. These can be used alone or as a mixture of two or more kinds. The resin composition constituting the auxiliary member 25 may contain a curing agent such as an imidazole-based curing agent, a curing accelerator, a flux compound, and an inorganic filler. The auxiliary member 25 is not limited to being composed of a film-like member, and may be a paste-like NCP. The auxiliary member 25 may be formed from a material having a linear expansion coefficient equivalent to that of the material (cured product) constituting the resin layer 24. For example, the difference between the linear expansion coefficient of the cured resin layer 24 and the linear expansion coefficient of the cured auxiliary member 25 is preferably within 150 ppm / K. In addition, the auxiliary member 25 may have a thickness equivalent to that of the resin layer 24, or may be thick or thin. At this stage, the auxiliary member 25 is not cured, and is thermally cured in a process described later. The auxiliary member 25 may be formed from a light-transmitting material and may have a transmittance of 10% or more and 100% or less.
[0053] In the semiconductor die 20, a resin layer 24 is provided on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the multiple terminal electrodes 22 and the multiple through electrodes 23. Such a resin layer 24 can be formed, for example, by attaching a resin film formed from a thermosetting adhesive (curable resin composition) to the upper surface 21a of the semiconductor substrate 21 and then thermally curing the resin film. For example, DAF can be used for the resin layer 24. The resin layer 24 may be formed so as to cover the entire upper ends 23a of the terminal electrodes 22 and the through electrodes 23, or may be formed so that the tips of the terminal electrodes 22 and the upper ends 23a of the through electrodes 23 are exposed from the surface 24a of the resin layer 24. The resin layer 24 may be formed by applying a liquid adhesive containing the same thermosetting adhesive (curable resin composition) as the resin film to the upper surface 21a of the semiconductor substrate 21 and then curing the liquid adhesive. It is sufficient that the resin layer 24 is cured to such an extent that at least one of suction and application of a load (pressure), collet peeling after heat treatment, and polishing as described below can be performed, and the resin layer 24 may not be completely cured (so-called C stage). However, the resin layer 24 may be completely cured. The thickness of the resin layer 24 may be, for example, 50 μm or less, 20 μm or less, 10 μm or less, 9 μm or less, 8 μm or less, or 7 μm or less, or 1 μm or more, 2 μm or more, 3 μm or more, 4 μm or more, 5 μm or more, or 10 μm or more. The thickness of the resin layer 24 may be between 50% and 150% or between 80% and 120% of the height of the plurality of terminal electrodes 22 or the height of the upper ends 23a of the through electrodes 23 (the protruding height from the upper surface 21a of the semiconductor substrate 21), and is preferably the same thickness as the height of the terminal electrodes 22 or the upper ends 23a of the through electrodes 23. The thickness of the resin layer 24 here means the thickness after curing, the height of the terminal electrodes 22 means the average height of the terminal electrodes 22, and the height of the upper ends 23a of the through electrodes 23 means the average height of the upper ends 23a. The thickness of the resin layer 24 may be between 50% and 150%, or between 80% and 120%, of the height or upper ends 23a of the terminal electrodes 22, even after the resin layer 24 is polished in a process described below. In this case, the thickness of the resin layer 24 before polishing may be thicker than the thickness of the auxiliary member 25.
[0054] The thermosetting adhesive constituting this film contains, for example, a high molecular weight resin component and a thermosetting component. The high molecular weight resin component may contain, for example, at least one resin selected from the group consisting of acrylic rubber, polyimide, and phenoxy resin. The high molecular weight resin component may have a reactive group such as an epoxy group. The weight average molecular weight (standard polystyrene equivalent value according to the GPC method) of the high molecular weight resin component may be 100,000 to 3,000,000. The content of the high molecular weight resin component may be 30 to 80 parts by mass with respect to 10 parts by mass of the total mass of the resin layer 24.
[0055] The thermosetting component that may be included in the resin layer 24 is a compound having a reactive group that forms a crosslinked structure by self-polymerization and / or reaction with a curing agent. The thermosetting component may include at least one selected from the group consisting of epoxy resin, bismaleimide resin, triazine resin, and phenol resin. The content of the thermosetting component may be 1 part by mass to 30 parts by mass with respect to 100 parts by mass of the resin layer 24. The thermosetting adhesive constituting the resin layer 24 may contain other components as necessary. Examples of the other components include a curing agent that reacts with the thermosetting component, a curing accelerator that promotes the reaction between the thermosetting component and the curing agent, a coupling agent (e.g., a silane coupling agent), and a filler (e.g., silica).
[0056] The resin layer 24 may contain an inorganic filler. Specific examples of the inorganic filler include glass, silica, alumina, titanium oxide, carbon black, mica, boron nitride, etc., among which, from the viewpoint of handling and processability (versatility), silica, alumina, titanium oxide, and boron nitride are preferred, and from the viewpoint of dispersibility in the resin and easy particle size control, silica, alumina, and boron nitride are more preferred. These may be used alone or in combination of two or more. In addition, the average particle diameter of the inorganic filler contained in the resin layer 24 may be, for example, 20 μm or less, or may be 10 μm or less, and the maximum particle diameter of the inorganic filler may be, for example, 30 μm or less. It is preferable that the average particle diameter of the inorganic filler is 5 μm or less, and the maximum particle diameter of the inorganic filler is 20 μm or less. By having an average particle diameter of 10 μm or less and a maximum particle diameter of 30 μm or less, it is possible to fill the gaps between the terminals when forming the resin layer on the terminal surface, and to suppress warping after the resin layer is cured. The lower limit of the average particle size and the lower limit of the maximum particle size of the inorganic filler are not particularly limited, but may be 0.001 μm or more. From the viewpoint of improving thermal conductivity, the aspect ratio of the inorganic filler is preferably 50 to 85. The aspect ratio here is, for example, the average value of major axis / minor axis, which is the ratio of major axis to minor axis, of any 20 inorganic fillers.
[0057] The average particle size and maximum particle size of the inorganic filler can be measured, for example, by using a scanning electron microscope (SEM) to measure the particle size of about 20 inorganic fillers. The measurement method using SEM can be, for example, by preparing a sample by heat-curing (preferably at 150°C to 180°C for 1 hour to 10 hours) a resin composition containing the inorganic filler, cutting the center of the sample, and observing the cross section with SEM. In this case, it is preferable that the probability of the presence of fillers with a particle size of 3 μm or less in the cross section is 80% or more of the total fillers.
[0058] The content of the inorganic filler contained in the resin layer 24 may be 10% by mass to 95% by mass based on the total amount of solids contained in the resin layer 24 before curing. The content of the inorganic filler contained in the resin layer 24 is preferably 20% by mass or more, more preferably 30% by mass or more, particularly preferably 40% by mass or more, and preferably 40% by mass to 95% by mass based on the total amount of solids contained in the resin layer 24 (adhesive) before curing. The elastic modulus (Young's modulus) of such a resin layer 24 may be, for example, 10 MPa or more, or 1.0 GPa or more at room temperature (25° C.). The linear expansion coefficient of the resin layer 24 at a temperature equal to or lower than the glass transition temperature may be, for example, 10 ppm / K to 200 ppm / K. The auxiliary member 25 may have the same configuration as the resin layer 24, and may contain an inorganic filler as described above. In this case, the elastic modulus of the auxiliary member 25 at room temperature may be 10 MPa or more, and the linear expansion coefficient may be, for example, 10 ppm / K to 200 ppm / K. Preferably, the difference between the linear expansion coefficient of the resin layer 24 and the linear expansion coefficient of the auxiliary member 25 is within 150 ppm / K. Note that the difference between the linear expansion coefficient of the resin layer 24 and the linear expansion coefficient of the auxiliary member 25 may be within 150 ppm / K even after the auxiliary member 25 is cured (i.e., after it has become the semiconductor device 1). Note that the thermal conductivity of the resin layer 24 is preferably 0.3 W / m·K or more, and more preferably 0.5 W / m·K or more.
[0059] The material forming the resin layer 24 preferably has a reduced concentration of ionic impurities. Specifically, the ionic impurity concentration of the cured resin layer 24 is, for example, 5 ppm or less, may be 3 ppm or less, preferably 1 ppm or less, more preferably 0.5 ppm or less, and further preferably 0.3 ppm or less. This prevents migration between the multiple terminal electrodes 22 covered by the resin layer 24 and between the upper end 23a of the through electrode 23 and the adjacent terminal electrode 22, and the resin layer 24 can ensure insulation between the terminal electrodes 22 and between the terminal electrode 22 and the upper end 23a. Since the resin layer 24 remains as a component of the semiconductor device 1 to be manufactured (it is not peeled off during manufacturing), it is preferable that the resin layer 24 has such a migration prevention function. Examples of the ionic impurities mentioned here include sodium (Na), potassium (K), and chlorine (Cl). Similarly, the material forming the auxiliary member 25 may have a reduced concentration of ionic impurities, and the ionic impurity concentration of the auxiliary member 25 may be, for example, 5 ppm or less, or 3 ppm or less.
[0060] Moreover, since the resin layer 24 remains as a component of the fabricated semiconductor device 1, it is preferable that the resin layer 24 is reliably fixed to the upper surface 21a of the semiconductor substrate 21 in a cured state. Specifically, the adhesive strength between the cured resin layer 24 and the upper surface 21a of the semiconductor substrate 21 is 1 MPa or more, and preferably 3 MPa or more. The same is true for the auxiliary member 25, and the adhesive strength between the auxiliary member 25 and the lower surface 21b of the semiconductor substrate 21 is 1 MPa or more, and preferably 3 MPa or more.
[0061] Next, when the preparation of the semiconductor die 20 having the above-mentioned configuration is completed, the entire surface 24a of the resin layer 24 of the semiconductor die 20 is vacuum-adsorbed and lifted by the collet C, as shown in (a) and (b) of FIG. 6. The collet C is formed, for example, from a metal member having thermal conductivity, and is configured to transmit heat from a heat source (not shown) to the semiconductor die 20 (such as the resin layer 24). That is, the collet C also functions as a heating element. Then, the semiconductor die 20 is moved to a predetermined position on the wiring layer 12 by the vacuum-adsorbed collet C, and is attached and fixed to the predetermined position of the wiring layer 12 by the auxiliary member 25. During this attachment, since the terminal electrodes 22 of the semiconductor die 20 are covered by the resin layer 24, the entire surface 24a of the resin layer 24 is pressed while being heated by the collet C, and the lower ends 23b of the multiple through electrodes 23 can be joined to the corresponding wiring electrodes 12a in the wiring layer 12. This results in the state shown in (b) of FIG. 2. The semiconductor die 20 is placed face-up with the terminal electrodes 22 facing upward.
[0062] Subsequently, as shown in FIG. 2(c), when the semiconductor die 20 is mounted (attached) on the wiring layer 12, the semiconductor die 20 and the connection electrodes 13 are encapsulated with an encapsulant to form an encapsulant layer 14 on the wiring layer 12. The encapsulant layer 14 is formed containing a thermosetting resin such as an epoxy resin, and is cured by heat or the like after encapsulation. The auxiliary member 25 of the semiconductor die 20 may be cured by this thermal curing. The encapsulant constituting the encapsulant layer 14 is composed of a thermosetting resin composition, and contains, for example, an epoxy resin and a curing agent. The encapsulant constituting the encapsulant layer 14 may further contain an inorganic filler, for example, a silica filler. The average particle diameter of the inorganic filler contained in the encapsulant may be, for example, 50 μm or less, 25 μm or less, 10 μm or less, or 0.01 μm or less. In order to suppress warping during or after the manufacture of the semiconductor device 1, the encapsulant constituting the encapsulant layer 14 preferably contains an inorganic filler with a large particle size, and preferably contains an inorganic filler with an average particle size larger than the average particle size of the inorganic filler contained in the resin layer 24 of the semiconductor die 20. In addition, when the terminal electrodes 22 and the upper ends 23a of the through electrodes 23 of the semiconductor die 20 are not covered by the resin layer 24, the spaces between the terminal electrodes 22 and between the terminal electrodes 22 and the upper ends 23a are sealed by the encapsulant layer 14. In this case, the encapsulant layer 14 uses an inorganic filler with a particle size smaller than the space between the terminal electrodes 22, etc. When such a method is adopted, for example, the encapsulating resin tends to have a low elasticity, making it difficult to perform grinding in the subsequent grinding process, or warping may occur during or after the manufacture of the semiconductor device 1. However, when the terminal electrodes 22 and the upper ends 23a of the semiconductor die 20 are covered by the resin layer 24 as in this embodiment, it is not necessary to consider the filling ability between the terminal electrodes 22, etc., in selecting the material of the encapsulant constituting the encapsulant layer 14. Therefore, in the sealing material layer 14, it is possible to design flexible resin and filler taking into consideration warping and the like.
[0063] Subsequently, when the encapsulant layer 14 is formed, as shown in FIG. 2(d), the encapsulant layer 14 is polished by CMP or the like. As a result, the tip 13a of the connection electrode 13 is exposed outside the encapsulant layer 14a, and the tip 22a of the terminal electrode 22 of the semiconductor die 20 and the upper end 23a of the through electrode 23 are exposed outside the surface 24a of the resin layer 24. As a result, the encapsulant layer 14 is thinned to the encapsulant layer 14a shown in FIG. 2(d). The elastic modulus (Young's modulus) of such encapsulant layers 14, 14a may be, for example, 3.0 GPa or more. The linear expansion coefficient of the encapsulant layers 14, 14a may be 5 ppm / K to 150 ppm / K, and the difference with the linear expansion coefficient of the resin layer 24 may be 150 ppm / K or less, preferably 100 ppm / K or less. The polished resin layer 24 may have a thickness of 20 μm or more. When the resin layer 24 is polished as described above, the tip portions of the terminal electrodes 22 and the upper ends of the through electrodes 23 may also be polished in the same manner.
[0064] Subsequently, when the encapsulant layer 14a is formed, as shown in FIG. 3(a), the wiring layer 15 is formed on the encapsulant layer 14a. The wiring layer 15 may be, for example, a redistribution layer (RDL). A plurality of connection electrodes 16 and a plurality of connection electrodes 17 are formed on the wiring layer 15. The portions of the wiring layer 15 other than the electrodes are insulating portions. The connection electrodes 16 connect an external device to semiconductor dies 26 and 27 described later, and are connected to, for example, the connection electrodes 13. The connection electrodes 17 connect the semiconductor die 20 to the semiconductor dies 26 and 27 described later. The connection electrodes 17 are each connected to the terminal electrodes 22 of the semiconductor die 20. In addition, a part of the connection electrodes 17 connects the semiconductor dies 26 and 27 to the wiring electrodes 12a of the wiring layer 12 via the through electrodes 23 provided on the semiconductor die 20. In this case, the connection electrodes 17 are each connected to the upper ends 23a of the through electrodes 23 of the semiconductor die 20. Each of the connection electrodes 16 and each of the connection electrodes 17 includes, for example, a copper pillar. The connection electrodes 16 and each of the connection electrodes 17 can be manufactured by a known method.
[0065] Subsequently, when the wiring layer 15 is formed, the semiconductor dies 26, 27 are mounted on the wiring layer 15 as shown in (b) of FIG. The semiconductor dies 26, 27 are, for example, semiconductor chips such as an LSI chip, a CMOS sensor, or a memory. During this mounting, the connection electrodes 16 are connected to the semiconductor dies 26, 27, and the connection electrodes 17 connect the semiconductor die 20 and the semiconductor dies 26, 27. Note that a portion of the connection electrodes 17 connects the semiconductor dies 26, 27 to the wiring electrodes of the wiring layer 12.
[0066] Next, after the semiconductor dies 26 and 27 are mounted, as shown in (a) of Fig. 4, the semiconductor dies 26 and 27 are encapsulated on the wiring layer 15 with an encapsulant to form an encapsulant layer 18 on the wiring layer 15. The encapsulant layer 18, like the encapsulant layer 14, is configured to include a thermosetting resin such as an epoxy resin, and is cured after encapsulation.
[0067] Next, the semiconductor dies 26 and 27 are encapsulated with an encapsulant to form the encapsulant layer 18, which may then be ground until the surfaces of the semiconductor dies 26 and 27 are exposed from the surface of the encapsulant layer, as shown in Fig. 4(b), thereby thinning the encapsulant layer 18 to the encapsulant layer 18a shown in Fig. 4(b).
[0068] Next, after the sealing material layer 18a is formed, the temporary fixing layer 11 is irradiated with laser light or heated, as shown in (a) of Figure 5, to reduce the adhesiveness of the temporary fixing layer 11 and peel off the carrier substrate 10 from the wiring layer 12.
[0069] Next, when the carrier substrate 10 is peeled off, as shown in Fig. 5(b), connection bumps 19 are formed on the lower ends of the connection electrodes 13 exposed from the lower surface of the wiring layer 12. Also, a substrate 35 shown in Fig. 5(c) is prepared. The substrate 35 is provided with a substrate body 36, connection bumps 37 for connecting the wiring electrodes in the substrate body 36 to the outside, an adhesive member 38, and other members 39 (for example, various electronic components).
[0070] 5(c), the semiconductor device 30 provided with the connection bumps 19 is mounted on the substrate 35. At this time, the semiconductor device 30 is adhered and fixed by the adhesive member 38 on the substrate 35. Thereafter, the adhesive member 38 is cured by heat curing or the like to produce the semiconductor device 1 shown in FIG.
[0071] Next, an example of a method for producing the semiconductor die 20 used in manufacturing the above-described semiconductor device 1 will be described with reference to FIG.
[0072] First, as shown in (a) of FIG. 7, a semiconductor wafer 41 corresponding to each semiconductor substrate 21 of the multiple semiconductor dies 20 is prepared. The semiconductor wafer 41 has multiple electrodes 42 and multiple through electrodes 43 corresponding to each semiconductor die 20. When the semiconductor wafer 41 is prepared, as shown in (b) of FIG. 7, a wafer resin layer 44 containing a curable resin composition is formed on the upper surface 41a (first surface) of the semiconductor wafer 41 so as to cover each upper end 43a of the multiple electrodes 42 and the multiple through electrodes 43. The wafer resin layer 44 corresponds to the above-mentioned resin layer 24 (before curing), and is formed by attaching a resin film containing a similar thermosetting resin composition to the semiconductor wafer 41. The wafer resin layer 44 may be formed by applying a liquid adhesive containing a similar thermosetting resin composition to the semiconductor wafer 41. Thereafter, as shown in (c) of FIG. 7, the wafer resin layer 44 is cured by heat or the like to form a cured wafer resin layer 44a.
[0073] Next, as shown in (d) of FIG. 7, an NCF 45 corresponding to the above-mentioned auxiliary member 25 is attached to the lower surface 41b (second surface) of the semiconductor wafer 41. This ensures the insulation of each lower end 43b of the multiple through electrodes 43. Then, as shown in (e) of FIG. 7, the semiconductor wafer 41 including the hardened wafer resin layer 44a is diced by dicing D to obtain multiple semiconductor dies 20. Such semiconductor dies 20 can be used as bridge dies when manufacturing various semiconductor devices. Note that the semiconductor device shown in FIG. 1 is an example using the semiconductor dies 20, and is not limited thereto.
[0074] Here, the effects of the method for manufacturing a semiconductor device according to this embodiment, more specifically, the method for mounting a semiconductor die 20, will be described in comparison with the method shown in FIG. 9. In the method shown in FIG. 9, the resin layer 24 is not provided as in the method according to this embodiment, so that the upper ends 123a (copper pillars) of the terminal electrodes 122 and the through electrodes 123 on the semiconductor substrate 121 are exposed. For this reason, as shown in FIG. 9(a), a metal collet C1 with a protruding periphery (a recessed center) is used for suction so as to avoid the upper ends 123a of the terminal electrodes 122 and the through electrodes 123. Since semiconductor dies are becoming thinner, such suction may cause the periphery of the semiconductor die 120 to be strongly sucked and the semiconductor die 120 to bend. In particular, when a semiconductor wafer is diced to obtain a plurality of semiconductor dies 120, the semiconductor die 120 is pushed up from the back side by a pin P or the like when peeling the semiconductor die 120 from the dicing tape, which may promote bending of the semiconductor die 120 or, in some cases, cause the semiconductor die 120 to crack.
[0075] 9(b), when the semiconductor die 120 is mounted on the support 110 (wiring layer) after suction and then thermocompression-bonded, heat and load are applied only to the outer periphery (see the two regions R in the figure), so that heat is not easily conducted to the joint between the lower end 123b of the through electrode 123 and the wiring electrode of the wiring layer (support 110) and pressure is not easily applied to the joint. Also, it becomes difficult to apply load to the center part of the back surface of the semiconductor die 120, which may result in insufficient compression or formation of a void in the center part.
[0076] In contrast, in the manufacturing method of the semiconductor device according to the present embodiment, as shown in Fig. 6, when mounting the semiconductor die 20, a hardened resin layer 24 is provided on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23. Then, the surface 24a of the hardened resin layer 24 is sucked and lifted by the collet C, and the semiconductor die 20 is then attached. In this manner, the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23 are covered with the resin layer 24, and the semiconductor die 20 is sucked and lifted by the collet C, which is a holding member, without avoiding the upper ends 23a of the terminal electrodes 22 and the through electrodes 23, so that bending or cracking of the semiconductor die can be suppressed.
[0077] Moreover, in this manufacturing method of the semiconductor device, a hardened resin layer 24 is provided on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the terminal electrodes 22 and the through electrodes 23. Then, a metal collet C, which is a heating element, is brought into contact with the surface 24a of the hardened resin layer 24 to heat-bond (thermocompress) the lower ends 23b of the through electrodes 23 and the wiring electrodes 12a of the wiring layer 12, which is the support body. In this case, the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23 are covered with the resin layer 24, and the entire surface of the semiconductor die 20 can be heated by the collet C, which is a heating element, without avoiding the terminal electrodes 22, etc., so that the heat from the collet C can be sufficiently transferred to the semiconductor die 20 and the through electrodes 23 located therein. Furthermore, by providing such a resin layer 24, a load can be applied to the entire surface of the semiconductor die 20, so that the bonding pressure of the through electrodes 23 to the wiring electrodes 12a of the wiring layer 12 can be sufficiently ensured. As described above, this method for manufacturing a semiconductor device makes it possible to reliably bond the through electrodes 23 of the semiconductor die 20 having a plurality of terminal electrodes 22. Furthermore, in this method for manufacturing a semiconductor device, the portions covering the terminal electrodes 22, etc. are formed from the cured resin layer 24, making the manufacturing process easy.
[0078] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the semiconductor die 20, a resin layer containing a curable resin composition is formed on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23, and the resin layer is cured to form a cured resin layer. This makes it possible to easily form the resin layer 24 that protects the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23.
[0079] In the method for manufacturing a semiconductor device according to this embodiment, the cured resin layer 24 is formed by attaching a resin film (e.g., DAF) containing a curable resin composition to the upper surface 21a of the semiconductor substrate 21 and then curing the resin film. This makes it possible to easily form the resin layer 24 that protects the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23. Alternatively, the cured resin layer 24 may be formed by applying a liquid adhesive containing a curable resin composition to the upper surface 21a of the semiconductor substrate 21 and then curing the liquid adhesive. In this case as well, the resin layer 24 that protects the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23 can be easily formed.
[0080] In the method for manufacturing a semiconductor device according to the present embodiment, the cured resin layer 24 preferably contains an inorganic filler. In this case, the hardness (elastic modulus, etc.) of the resin layer 24 can be improved, and bending and cracking of the semiconductor die 20 can be further suppressed. Furthermore, the inclusion of an inorganic filler can also suppress warping of the semiconductor die 20 including the resin layer 24. Furthermore, the inclusion of an inorganic filler makes it easier to perform a polishing process when polishing the resin layer 24.
[0081] In the method for manufacturing a semiconductor device according to this embodiment, the content of the inorganic filler in the cured resin layer 24 may be 10 mass % or more based on the total amount of solids contained in the resin layer before curing. In this case, warping of the semiconductor die 20 can be more reliably suppressed.
[0082] In the method for manufacturing a semiconductor device according to this embodiment, the average particle size of the inorganic filler in the cured resin layer 24 is preferably 20 μm or less. In this case, even if the terminal electrodes 22 and pitch of the semiconductor die 20 are miniaturized, the resin and filler can be reliably introduced between the terminal electrodes, so that the terminal electrodes can be reliably covered with the resin layer.
[0083] In the method for manufacturing a semiconductor device according to this embodiment, the elastic modulus of the cured resin layer 24 may be 10 MPa or more. In this case, bending and cracking of the semiconductor die 20 can be further suppressed. Furthermore, when polishing the cured resin layer 24 to expose the heads of the terminal electrodes 22, the polishing operation can be easily performed. Since the cured resin layer 24 has a high elastic modulus, the resin layer, the copper pattern, and the like can be easily ground.
[0084] In the manufacturing method of the semiconductor device according to the present embodiment, when preparing the semiconductor die 20, a semiconductor wafer 41 corresponding to the plurality of semiconductor substrates 21 is prepared, and then a wafer resin layer 44 containing a curable resin composition is formed on the upper surface 41a of the semiconductor wafer 41 so as to cover the upper ends 43a of the plurality of electrodes 42 and the plurality of through electrodes 43. Then, the wafer resin layer 44 is cured. After that, the semiconductor wafer 41 is divided into individual pieces by dicing D to obtain the plurality of semiconductor dies 20. According to this method, the plurality of semiconductor dies 20 can be manufactured at once. Moreover, according to this manufacturing method, even when the semiconductor die 20 is divided into individual pieces by dicing, the semiconductor die 20 can be peeled off from the dicing tape without bending or cracking.
[0085] In the manufacturing method of the semiconductor device according to the present embodiment, after the lower end 23b of the through electrode 23 is bonded to the wiring electrode 12a of the wiring layer 12 serving as the support, the semiconductor die 20 may be sealed with a sealing material, and the sealing material layer 14, 14a may be formed on the wiring layer 12. The average particle size of the inorganic filler contained in the sealing material layer 14, 14a is preferably larger than the average particle size of the inorganic filler contained in the resin layer 24. In this way, by including a larger inorganic filler in the sealing material, warping of the sealing material layer 14 due to heat can be more reliably suppressed. Particularly in a large-size process, reliably adsorbing is possible in high-precision processing in the subsequent steps.
[0086] In the method for manufacturing a semiconductor device according to this embodiment, the difference between the linear expansion coefficient of the encapsulant layers 14, 14a and the linear expansion coefficient of the cured resin layer 24 is preferably within 150 ppm / K. In this case, the behavior of the encapsulant layer 14a and the resin layer 24 becomes uniform when heat is applied to the fabricated semiconductor device 1, and it is possible to reduce the occurrence of problems due to heat, such as deviation in expansion.
[0087] In the manufacturing method of the semiconductor device according to this embodiment, the hardened resin layer 24 may be polished together with the sealing material layer 14a so that the tips 22a of the respective terminal electrodes 22 and the upper ends 23a of the respective through electrodes 23 are exposed from the hardened resin layer 24. This makes it possible to form a fine wiring layer 15, etc. with high accuracy on the polished surface of the sealing material layer 14, etc.
[0088] In the method for manufacturing a semiconductor device according to this embodiment, the thickness of the cured resin layer 24 may be 15 μm or more or 30 μm or more when the semiconductor die 20 is lifted by the collet C or when the semiconductor die 20 is heat-bonded. In this case, bending and cracking of the semiconductor die 20 can be more reliably suppressed.
[0089] In the method for manufacturing a semiconductor device according to this embodiment, an auxiliary member 25 of an insulating layer for attaching the semiconductor die 20 to a support such as the wiring layer 12 may be provided on the lower surface 21b of the semiconductor substrate 21, and the auxiliary member 25 may surround the periphery of the lower end 23b of the through electrode 23. In this case, the through electrode 23 of the semiconductor die 20 can be more reliably joined to the wiring electrode 12a of the wiring layer 12, which is the support, while ensuring insulation from other electrodes. In addition, the semiconductor member can be easily attached to the support.
[0090] In the method for manufacturing a semiconductor device according to this embodiment, the difference between the linear expansion coefficient of the cured resin layer 24 and the linear expansion coefficient of the auxiliary member 25 may be within 150 ppm / K. In this case, the thermal expansion of the cured resin layer and the auxiliary member that sandwich the semiconductor substrate becomes approximately the same, so that it is possible to prevent the position or parallelism of the semiconductor substrate from being impaired and to suppress warping of the mounted chip.
[0091] In the method for manufacturing a semiconductor device according to this embodiment, the thickness of the cured resin layer 24 may be between 50% and 150%, or may be between 80% and 120%, of the height of the terminal electrodes 22. In this case, the thickness of the resin layer 24 and the height of the terminal electrodes 22 are approximately equal, so that the semiconductor die 3 can be lifted and attached more reliably.
[0092] In the manufacturing method of the semiconductor device according to the present embodiment, the collet C is attracted to the entire surface 24a of the cured resin layer 24 to lift it up, and when performing heat bonding, the collet C, which is a holding member, is made to function as a heating element, and the collet C is brought into contact with the entire surface 24a of the cured resin layer 24 and pressed to perform heat bonding. This makes it possible to more reliably prevent the semiconductor die 20 from bending or cracking, and also makes it possible to reliably bond the through electrodes 23 of the semiconductor die 20 to the wiring electrodes 12a of the wiring layer 12. Furthermore, the semiconductor die 20 can be reliably attached to the wiring electrodes 12a, which are supports.
[0093] In the method for manufacturing a semiconductor device according to this embodiment, the ionic impurity concentration of the cured resin layer 24 is 5 ppm or less (or 3 ppm or less), which makes it possible to prevent migration between the multiple terminal electrodes 22 covered with the cured resin layer 24 and between the terminal electrodes 22 and the upper ends 23a of the through electrodes 23.
[0094] In the method for manufacturing a semiconductor device according to this embodiment, the adhesive strength between the cured resin layer 24 and the upper surface 21a of the semiconductor substrate 21 is 1 MPa or more. This prevents the resin layer 24 of the semiconductor die 20 from peeling off in the manufactured semiconductor device 1.
[0095] Although the embodiments of the present disclosure have been described above, the present invention is not limited to the above-mentioned embodiments, and may be appropriately modified within the scope of the present disclosure. For example, in the above-mentioned embodiment, the semiconductor die 20 used includes the auxiliary member 25 as shown in FIG. 6, but is not limited thereto. For example, as shown in FIG. 8, a semiconductor die 20A without the auxiliary member 25 may be used. In this case, when mounting the semiconductor die 20A on the wiring layer 12, the lower end 23b of the through electrode 23 may be heat-bonded to the wiring electrode 12a of the wiring layer 12 by the above-mentioned method, and then an underfill may be filled between the wiring electrode 12a and the lower surface of the semiconductor die 20. Such bonding may be bonding using solder, and in this case, the flux may be removed after bonding. [Explanation of symbols]
[0096] 1...semiconductor device, 3...semiconductor die (semiconductor member), 3a...semiconductor substrate, 3b...terminal electrode, 3c...through electrode, 3d...resin layer, 5a...wiring layer (support), 12...wiring layer (support), 12a...wiring electrode, 14, 14a...encapsulant layer, 20, 20A...semiconductor die (semiconductor member), 21...semiconductor substrate, 21a...upper surface (first surface), 21b...lower surface (second surface), 2 2...terminal electrode, 22a...tip, 23...through electrode, 23a...upper end (first end), 23b...lower end (second end), 24...resin layer, 25...auxiliary member, 41...semiconductor wafer, 41a...upper surface (first surface), 41b...lower surface (second surface), 42...electrode, 43...through electrode, 43a...upper end (first end), 43b...lower end (second end), 44, 44a...wafer resin layer, 45...NCF.
Claims
1. a semiconductor member including: a semiconductor substrate having a first surface and an opposite second surface; a plurality of terminal electrodes provided on the first surface of the semiconductor substrate; a through electrode penetrating the semiconductor substrate and having a first end protruding from the first surface and a second end protruding from the second surface; and a hardened resin layer provided on the first surface so as to surround the periphery of the plurality of terminal electrodes and the first ends of the through electrode; A support including at least one wiring electrode and to which the semiconductor member is attached; the second end of the through electrode and the wiring electrode of the support body are joined together; Semiconductor device.
2. Further, an insulating auxiliary member is provided for attaching the semiconductor member to the support, The auxiliary member surrounds the second end of the through electrode. The semiconductor device according to claim 1 .
3. Further comprising an encapsulant layer that encapsulates the semiconductor member; The semiconductor device according to claim 1 .
4. The cured resin layer contains an inorganic filler, The encapsulant layer contains an inorganic filler, the average particle size of the inorganic filler contained in the sealing material layer is larger than the average particle size of the inorganic filler contained in the cured resin layer; The semiconductor device according to claim 3 .
5. The difference between the linear expansion coefficient of the sealing material layer and the linear expansion coefficient of the cured resin layer is within 150 ppm / K. The semiconductor device according to claim 3 .
6. Further comprising a first semiconductor die and a second semiconductor die provided on the first surface side of the semiconductor substrate, The first ends of the terminal electrodes and the through electrodes of the semiconductor member are connected to the first semiconductor die and the second semiconductor die. The semiconductor device according to claim 1 .
7. The light transmittance of the auxiliary member is 10% or more. The semiconductor device according to claim 2 .
8. The cured resin layer has an ionic impurity concentration of 5 ppm or less. The semiconductor device according to claim 1 .
9. an adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is 1 MPa or more; The semiconductor device according to claim 1 .
10. The thermal conductivity of the cured resin layer is 0.3 W / m K or more. The semiconductor device according to claim 1 .
Citation Information
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