Δσ modulator and δς modulation method

Abstract

To provide a ΔΣ modulator capable of preventing a radiation of an electromagnetic noise, having a narrow occupied bandwidth, a small delay, a small current consumption, a small sampling frequency, and a small bit number, and suppressing deterioration of a sound quality, and provide a ΔΣ modulation method.SOLUTION: A ΔΣ modulator 100 having an integrator 1 and a quantizer 2, is constructed so that a filter formed by the integrator 1 is only acted to a component of a quantizer noise Nq from the quantizer 2. The filter can reduce a sampling frequency and a bit number in the case the filter is a high-order high pass filter, and can prevent a saturation of a fluctuation in a high-frequency band in the high-order high pass filter in addition to the above in the case where the filter is the high-order high pass filter and a high-order low pass filter.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a ΔΣ modulator and a ΔΣ modulation method for compressing a digital audio signal while maintaining high sound quality. [Background technology]

[0002] In digital audio processing, first, the analog audio signal is taken in for each sampling frequency (discretization), and the amplitude, which is the loudness of the sound, is converted to a specified number of bits (quantization) to create a digital signal. For example, discretization and quantization are performed according to standards, such as a sampling frequency of 44.1 kHz and a bit count of 24 bits (2^24 steps). The higher these values ​​are, the less error there is with the analog signal, and the better the sound quality will be. However, such a high sampling frequency and large number of bits results in a huge amount of data to be handled, which gives rise to problems such as high performance requirements for the computing device.

[0003] Therefore, data compression is performed to reduce the amount of data while suppressing signal degradation (reduction in sound quality). For example, in fields such as digital amplifiers, a technique is used that oversamples the sampling frequency to 1 MHz and modulates the signal so that it can be transmitted as a 1-bit (0 or 1) signal. A representative technique is called ΔΣ modulation. Since ΔΣ modulation only requires handling of 1-bit signals, it does not require complex calculation processing, and even when converting digital signals to analog signals to output sound, it is possible to obtain high-quality audio signals at low cost.

[0004] A typical ΔΣ modulation is configured using an integrator and a quantizer, as shown in Figure 6. Note that delay circuits and other components are omitted in Figure 6. A quantizer performs quantization, dividing the amplitude of an analog signal into a specified number of bits. In quantization, errors occur in the process of dividing a continuous, smooth analog signal into specified ranges, and these error components appear in the output signal as noise. This noise due to error components is called quantization noise.

[0005] Conventional ΔΣ modulators use a filter formed by an integrator and a feedback loop to perform a process called noise shaping, which shifts the quantization noise components to extremely high frequencies. This noise shaping separates the quantization noise components from the audio signal components, preventing the quantization noise components from being included in the output signal.

[0006] The frequency characteristic of an integrator is such that the higher the frequency, the more attenuated it becomes (like a low-pass filter with no flat section), as shown in Figure 6. This inversely proportional characteristic acts on the input signal, and then quantization noise with a flat characteristic that has no frequency specificity is added.

[0007] Here, a quantizer is used to feed back the input signal so that its frequency characteristics remain constant, changing the inversely proportional to frequency characteristic to a flat characteristic. At the same time, the quantization noise, which was originally flat, now has a characteristic proportional to frequency (like a high-pass filter with no flat section). In other words, the coefficient acting on the input signal components becomes "1," and a high-pass filter acts on the quantization noise, shifting it to the higher frequency side. This is called noise shaping.

[0008] In this case, in order to prevent the quantization noise from affecting the frequency band of the audio signal by noise shaping, the cutoff frequency of the high-pass filter must be increased. In order to increase the cutoff frequency, the frequency to be captured also increases, so the sampling frequency must be increased. For example, if the integrator is configured as a first-order integrator, the high-pass filter also becomes a first-order filter, and the cutoff characteristic becomes extremely gradual. Therefore, the sampling frequency must be increased to several to several tens of times the upper limit of the frequency of the audio signal. In other words, the quantization noise must have a sufficiently small gain in the frequency band of the audio signal.

[0009] However, the above-mentioned ΔΣ modulation technology, which compresses and transmits data to 1 bit, has a high sampling frequency, which results in large electromagnetic noise radiation from the circuit board pattern wiring and cables, etc., and consumes a lot of power. Therefore, in wireless transmission, the transmission distance is short due to the effects of the radiated electromagnetic noise, and in the case of portable devices, it is not practical due to the large battery consumption. Furthermore, even when used in wired equipment such as amplifiers that are connected to a commercial power source, there is a problem in that electromagnetic shielding and the like must be used extensively to prevent radiation of electromagnetic noise.

[0010] On the other hand, for wireless transmission, compression techniques are used that do not increase the sampling frequency. For example, there is a technique that compresses the signal to a sampling frequency of 48 kHz and a bit rate of 5 bits for wireless transmission, thereby reducing the transmission bandwidth.

[0011] However, for example, under the above conditions, since the number of bits is 5 bits, the data transfer rate per unit time is 240 kbps. The larger the data transfer rate, the wider the band of radio waves, etc. used for wireless transmission. In other words, the occupied bandwidth in wireless transmission becomes wider. Therefore, with the number of bits in the compression technology as described above, the data transfer rate in wireless transmission, etc. is relatively large, limiting the number of simultaneous transmission channels among multiple channels, increasing delays, and consuming large power.

[0012] Conventionally, various technologies have been developed to solve the above-mentioned problems. For example, Patent Document 1 discloses a ΔΣ modulator technology that can simultaneously reduce power consumption and quantization error (quantization noise). The technology of Patent Document 1 is said to be able to suppress an increase in power consumption by subtracting the DA converted value of a first digital signal from the analog voltage output from an integrating circuit using a capacitive DA (Digital to Analog) converter of a successive approximation type AD (Analog to Digital) converter.

[0013] However, the technology of Patent Document 1 has a problem that the system becomes unstable in the third or higher order when compressed to 1 bit. Therefore, when adopting this configuration, it is generally necessary to improve the stability of the system by moving the zero point or by introducing dither into the additive weighted connection method in which integrators are connected in series and weighted and added.

[0014] Patent Document 2 discloses a ΔΣ modulator technology in which a signal obtained by adding a dither to an input signal is subtracted from the output of a quantizer that has been delayed and fed back, and the result is input to an integrator. It is said that the technology of Patent Document 2 can also use a high-order integrator. In this system, by using an additive weighted connection method for the integrator block, it is possible to make the system stable even if it is high-order. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] JP 2023-117731 A [Patent Document 2] JP 2009-182899 A Summary of the Invention [Problem to be solved by the invention]

[0016] In the example disclosed in Patent Document 1, in the above-mentioned conventional technology, in order to stabilize the system, it is necessary to appropriately adjust the delay signals fed back to the multiple integrators to move the zero points. In this case, the higher the order, the more difficult it is to make adjustments to stabilize the system. Therefore, in the configuration of Patent Document 1, in order to facilitate stabilization of the system, the order must be low, which causes a problem that the signal-to-noise ratio (SN ratio) cannot be made high and sound quality is easily deteriorated.

[0017] In terms of system stability, by adopting an additive weighted connection method in the configuration of Patent Document 2, it may be possible to stabilize even a high-order system. However, in the configuration of Patent Document 2, the influence of the filter due to the integrator also acts on the input signal. Therefore, in order to clearly separate the quantization noise from the signal, the sampling frequency must be increased, which makes it impossible to solve the problems of increased power consumption, electromagnetic noise radiation, and expanded occupied bandwidth mentioned above.

[0018] The present invention has been made in consideration of the above-mentioned problems, and has as its object to provide a ΔΣ modulator and a ΔΣ modulation method that can suppress deterioration of sound quality. [Means for solving the problem]

[0019] The means adopted by the present inventors to solve the above problems will be described below. The present invention is configured such that in a ΔΣ modulator having an integrator and a quantizer, a filter acts only on the quantization noise component generated by the quantizer.

[0020] In the present invention, since no coefficients are applied to the input signal, quantization can be performed without giving it frequency characteristics. Therefore, even if the sampling frequency is lowered, the noise shaping effect does not act on the input signal, and there is no impact on the sound quality. On the other hand, since the filter can be applied only to the quantization noise, it is possible to apply various filters to reduce the sampling frequency and the number of bits, stabilize the system, and so on.

[0021] In the above configuration, it is possible to configure the high-order high-pass filter to act only on the quantization noise components generated by the quantizer, without the high-order high-pass filter acting on the components of the input signal to the entire system. By applying a high-order high-pass filter to only the quantization noise, the sampling frequency can be lowered. For example, if the Nyquist frequency is 12 kHz, the sampling frequency can be set to 24 kHz.

[0022] By using a high-order high-pass filter as the filter, the cutoff frequency of the filter can be brought closer to the upper limit of the audio band, so that the sampling frequency can be lowered. Also, as described above, even if the sampling frequency is lowered, the filter does not affect the input signal, so there is no impact on the sound quality.

[0023] In order to solve the above-mentioned problems, the present invention may employ a configuration including a first adder, a second adder, and a third adder in addition to the above-mentioned means. Here, the first adder inverts and adds the output signal of the integrator to the input signal for the entire system. The second adder inverts the output signal of the first adder and adds it to the output signal of the quantizer. The third adder inverts the output signal of the integrator and adds it to the output signal of the second adder. An input signal to the quantizer is an output signal to the first adder, an input signal to the integrator is an output signal to the second adder, and an output signal from the quantizer is an output signal for the entire system.

[0024] By configuring in this manner, the high-order high-pass filter formed by the integrator can shift the quantization noise to a higher frequency than the band of the audio signal, while the effect of the high-order high-pass filter does not act on the components of the input signal, but only on the components of the quantization noise.

[0025] Further, as another means adopted by the present invention to solve the above-mentioned problems, an input signal to the entire system is X, an output signal to the entire system is Y, the integrator is Σ, the quantization noise is N q Then, the output signal Y for the entire system is

number

[0026] With this configuration, the high-pass filter can be configured to have an effect only on the quantization noise components, without affecting the components of the input signal.

[0027] On the other hand, it is also possible to configure the filter formed by the integrator as a high-order high-pass filter and low-pass filter so that the high-order high-pass filter and low-pass filter do not act on the components of the input signal to the entire system, but act only on the quantization noise components generated by the quantizer.

[0028] A high-order high-pass filter may have an extremely large amplitude at the sampling frequency, which may cause divergence and make the system unstable. Therefore, by adding a low-pass filter that attenuates signals near the sampling frequency, it is possible to suppress saturation of the amplitude near the sampling frequency.

[0029] In this case, the high-order high-pass filter and low-pass filter are configured so that they do not affect the components of the input signal, but only the components of the quantization noise, thereby making it possible to suppress saturation of the amplitude near the sampling frequency while preventing deterioration of sound quality.

[0030] The means adopted by the present invention to solve the above-mentioned problems can be configured to include a first filter element and a second filter element in addition to a first adder, and further include a first filter adder, a second filter adder, and a filter branch adder. Here, the first adder inverts and adds the output signal of the integrator to the input signal for the entire system. A first filter adder adds the output signal of the first filter element to the output signal of the integrator. The second filter adder adds the output signal of the second filter element to the output signal of the first filter adder. The filter branch adder inverts the output signal of the quantizer and adds it to the output signal of the first filter adder. The output signal of the filter branch adder is input to the first filter element and the second filter element, the input signal of the quantizer is the output signal of the second filter adder, the input signal of the integrator is the output signal of the first adder, and the output signal of the quantizer is the output signal for the entire system.

[0031] With this configuration, saturation of the amplitude at the sampling frequency due to the high-order high-pass filter formed by the integrator can be prevented by the low-pass filter formed by the first filter element and the second filter element.

[0032] The above configuration can also be configured as the following means. Unlike the above, in addition to the first adder, the second adder, and the third adder, a first filter element and a second filter element may be provided, and further, a first filter adder, a second filter adder, and a filter branch adder may be provided. Here, the first adder inverts and adds the output signal of the integrator to the input signal for the entire system. The second adder inverts the output signal of the first adder and adds it to the output signal of the quantizer. The third adder inverts the output signal of the integrator and adds it to the output signal of the second adder. The first filter adder adds the output signal of the first filter element to the output signal of the first adder. The second filter adder adds the output signal of the second filter element to the output signal of the first filter adder. The filter branch adder inverts the output signal of the quantizer and adds it to the output signal of the first filter adder. The output signal of the filter branch adder is input to the first filter element and the second filter element, the input signal of the quantizer is the output signal of the second filter adder, the input signal of the integrator is the output signal of the second adder, and the output signal of the quantizer is the output signal for the entire system.

[0033] Further, as another means adopted by the present invention to solve the above-mentioned problems, a filter circuit is provided with a first filter element and a second filter element, the first filter element is W1, the second filter element is W2, an input signal to the entire system is X, a coefficient that can be expressed as either 1 or Σ / (1+Σ) is A, an output signal to the entire system is Y, the integrator is Σ, the quantization noise is N, q。 Then, the output signal Y for the entire system is

number

[0034] With the above-described configuration, the high-order high-pass filter and low-pass filter can be applied only to the quantization noise components, regardless of whether or not the high-order high-pass filter and low-pass filter have an effect on the input signal.

[0035] Incidentally, the signal processing performed by the above-mentioned ΔΣ modulator can also be executed in another device as a ΔΣ modulation method. Effect of the Invention

[0036] As described above, in the ΔΣ modulator and ΔΣ modulation method of the present invention, the filter formed by the integrator acts only on the quantization noise components, so no filter acts on the input signal. Therefore, the ΔΣ modulator and ΔΣ modulation method of the present invention have the effect of suppressing deterioration of sound quality. [Brief description of the drawings]

[0037] [Figure 1] 1 is a block diagram of a ΔΣ modulator according to the present invention; [Diagram 2] 1 is a comparison diagram of frequency characteristics when the ΔΣ modulator of the present invention is used and a conventional ΔΣ modulator is used. [Diagram 3] FIG. 1 is a block diagram showing a first modified example of a ΔΣ modulator according to the present invention. [Figure 4] 1 is a comparison diagram of frequency characteristics when a ΔΣ modulator according to the first modified example of the present invention is used and a conventional ΔΣ modulator is used. [Diagram 5] FIG. 11 is a block diagram showing a second modified example of the ΔΣ modulator of the present invention. [Figure 6] FIG. 1 is an explanatory diagram illustrating a conventional example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0038] An embodiment of the present invention will be described below with reference to FIGS. It should be noted that each figure is drawn diagrammatically for the purpose of explanation, with some elements being omitted in the block diagrams and characteristics being simplified in the graphs for easy understanding.

[0039] In the following, a case will be described in which the filter formed by the integrator is a high-pass filter. The delta-sigma modulator 100 of the present invention can be represented by the block diagram shown in Fig. 1. An AD (Analog to Digital) converted digital input signal is input to the delta-sigma modulator 100. Furthermore, the signal that has passed through the delta-sigma modulator 100 is output as a digital signal. Regarding each element of the block diagram shown in FIG. 1, the ΔΣ modulator 100 includes an integrator 1, a quantizer 2, a first adder 3, a second adder 4, and a third adder 5.

[0040] The first adder 3 inverts the output signal 11 of the integrator 1 and adds it to the input signal X for the entire system. The second adder 4 inverts the output signal 31 of the first adder 3 and adds it to the output signal Y of the quantizer 2 . The third adder 5 inverts the output signal 11 of the integrator 1 and adds it to the output signal 41 of the second adder 4 . The input signal of the quantizer 2 is the output signal 31 of the first adder 3, the input signal of the integrator 1 is the output signal 41 of the second adder 4, and the output signal of the quantizer 2 is the output signal Y for the entire system.

[0041] From the block diagram in Figure 1, the output of the ΔΣ modulator 100 can be calculated as follows:

number

[0042] Here, if we calculate the output from the block diagram of the conventional ΔΣ modulator shown in Figure 6, we get the following:

number

[0043] In the conventional ΔΣ modulator shown in equation 4, Σ / (1+Σ) acting on the input signal X is 1, and N q 1 / (1+Σ) acting on the high-pass filter (for example, 1-z -1 ), noise is concentrated in the high frequency region and the effect on the input signal is reduced.

[0044] However, 1-z -1 is a first-order high-pass filter, and has a gentle cutoff characteristic. Therefore, in order to prevent noise from affecting the audible range, it is necessary to set the cutoff frequency high or to use a high-order high-pass filter. In order to raise the cutoff frequency to a level where the effect on the audible range is practically negligible, the sampling frequency must also be extremely high. Also, if a high-order high-pass filter is used, the system may become unstable.

[0045] However, in the case of the ΔΣ modulator 100 configured by the block diagram of FIG. 1, as shown in the above formula 3, the filter formed by the integrator 1 does not act on the input signal X, and the quantization noise N q The filter formed by the integrator 1 acts only on the input signal X. Since the input signal X is not degraded by the filter, deterioration of sound quality can be suppressed, and high sound quality can be maintained even if the signal is compressed to a smaller number of bits.

[0046] In addition, the quantization noise N qIf a high-order high-pass filter is used with 1 / (1+Σ) acting on the input, the sampling frequency can be lowered, power consumption can be reduced, and radiation of unnecessary electromagnetic noise can be prevented, while preventing the system from becoming unstable.

[0047] FIG. 2 is a graph comparing the frequency characteristics of the delta-sigma modulator 100 of the present invention and a conventional delta-sigma modulator. 2(a) is a graph showing the frequency characteristics when a high-order high-pass filter is applied to the filter portion in the delta-sigma modulator 100 of the present invention. For example, a fourth-order high-pass shelving filter can be used as the high-order high-pass filter. By using a shelving filter, it is possible to prevent saturation of the amplitude in the high frequency range.

[0048] Figure 2(b) is a graph showing the frequency characteristics when a second-order high-pass filter is applied to the filter section in a conventional ΔΣ modulator. When compressing to 1 bit, a third-order or higher high-pass filter may cause the system to become unstable, so to ensure stable operation, it is preferable to set it to a second-order high-pass filter. In this case, the quantization noise N q It can be seen that in order to prevent the influence of the above, the sampling frequency must be set to a large value.

[0049] As described above, the ΔΣ modulator 100 that can be represented by the block diagram shown in FIG. 1 has a quantization noise N q Since the high-pass filter formed by the integrator 1 acts only on the component, deterioration of sound quality can be suppressed.

[0050] 『Variation 1』 The present invention is not limited to the above embodiment, and other embodiments may be adopted. Note that the same reference numerals are used to designate parts common to those in Fig. 1 and Fig. 2, and the description thereof will be omitted. In the following, a case will be described in which the filter formed by the integrator is a high-pass filter and a low-pass filter.

[0051] The ΔΣ modulator 101 of the present invention can be represented by the block diagram shown in FIG. Regarding each element of the block diagram shown in FIG. 3, the ΔΣ modulator 101 includes an integrator 1, a quantizer 2, a first adder 3, a first filter element W1, a first filter adder 6, a second filter element W2, a second filter adder 7, and a filter branch adder 8.

[0052] The first adder 3 inverts the output signal 11 of the integrator 1 and adds it to the input signal X for the entire system. The first filter adder 6 adds the output signal W11 of the first filter element W1 to the output signal 11 of the integrator 1. The second filter adder 7 adds the output signal W21 of the second filter element W2 to the output signal 61 of the first filter adder 6. The filter branch adder 8 inverts the output signal Y of the quantizer 2 and adds it to the output signal 61 of the first filter adder 6 . Then, the output signal 81 of the filter branch adder 8 is input to the first filter element W1 and the second filter element W2, the input signal of the quantizer 2 is the output signal 71 of the second filter adder 7, the input signal of the integrator 1 is the output signal 31 of the first adder 3, and the output signal of the quantizer 2 is the output signal Y for the entire system.

[0053] From the block diagram in Figure 3, the output of the ΔΣ modulator 101 can be calculated as follows:

number

[0054] As shown in FIG. 4(a), in noise shaping, the higher the order of the filter by the integrator 1, the steeper the high-pass characteristics become, improving the SNR. However, near the sampling frequency, the amplitude increases significantly and becomes more prone to saturation.

[0055] Therefore, in the delta-sigma modulator 101 of the present invention, the first filter element W1 and the second filter element W2 are determined so that (1-W1) / (1+W2) becomes a low-pass filter. At this time, by obtaining large attenuation near the sampling frequency, it is possible to suppress saturation near the sampling frequency, as shown in FIG. 4(b).

[0056] In this way, with the configuration of the ΔΣ modulator 101 of the present invention, a high S / N ratio can be achieved by noise shaping using a high-order, steep filter, and the system will not become unstable even if a high-order filter is used.

[0057] 『Variation 2』 In the present invention, further other configurations can also be adopted. In the following, a modified example in which a high-pass filter and a low-pass filter are applied as the filter formed by the integrator will be described.

[0058] The ΔΣ modulator 102 of the present invention can be represented by the block diagram shown in FIG. Regarding each element of the block diagram shown in FIG. 6, the ΔΣ modulator 102 includes an integrator 1, a quantizer 2, a first adder 3, a second adder 4, a third adder 5, a first filter element W1, a first filter adder 6, a second filter element W2, a second filter adder 7, and a filter branch adder 8.

[0059] The first adder 3 inverts the output signal 11 of the integrator 1 and adds it to the input signal X for the entire system. The second adder 4 inverts the output signal 31 of the first adder 3 and adds it to the output signal Y of the quantizer 2 . The third adder 5 inverts the output signal 11 of the integrator 1 and adds it to the output signal 41 of the second adder 4 . The first filter adder 6 adds the output signal W11 of the first filter element W1 to the output signal 31 of the first adder 3. The second filter adder 7 adds the output signal W21 of the second filter element W2 to the output signal 61 of the first filter adder 6. The filter branch adder 8 inverts the output signal Y of the quantizer 2 and adds it to the output signal 61 of the first filter adder 6 . Then, the output signal 81 of the filter branch adder 8 is input to the first filter element W1 and the second filter element W2, the input signal of the quantizer 2 is the output signal 71 of the second filter adder 7, the input signal of the integrator 1 is the output signal 41 of the second adder 4, and the output signal of the quantizer 2 is the output signal Y for the entire system.

[0060] From the block diagram of FIG. 6, the output of the ΔΣ modulator 102 can be calculated as follows:

number

[0061] In the delta-sigma modulator 103 of the present invention, the first filter element W1 and the second filter element W2 are determined so that (1-W1) / (1+W2) becomes a low-pass filter. At this time, by obtaining large attenuation near the sampling frequency, saturation near the sampling frequency can be suppressed, as in FIG. 4. As shown in Equation 6, the filter formed by the integrator 1 does not act on the input signal X, and the quantization noise N qThe filter formed by the integrator 1 acts only on the input signal. Since there is no degradation due to the filter in the input signal, degradation in sound quality can be suppressed, and high sound quality can be maintained even if the number of bits is compressed to a smaller number.

[0062] In addition, the quantization noise N q If a high-order high-pass filter is used with 1 / (1+Σ) acting on the input, the sampling frequency can be lowered, power consumption can be reduced, and radiation of unnecessary electromagnetic noise can be prevented, while preventing the system from becoming unstable.

[0063] In this way, with the configuration of the ΔΣ modulator 101 of the present invention, a high S / N ratio can be achieved by noise shaping using a high-order, steep filter without degrading the sound quality of the input signal X, and even a high-order filter does not cause the system to become unstable. [Explanation of symbols]

[0064] 100,101,102 Delta-Sigma Modulator 1 Integrator 11 Integrator output signal 2 Quantizer 3. First Adder 31 Output signal of the first adder 4. Second Adder 41 Output signal of the second adder 5. The third adder 51 Output signal of the third adder 6 First Filter Adder 61 Output signal of the first filter adder 7 Second Filter Adder 71 Output signal of the second filter adder 8 Filter Branch Adder 81 Filter branch adder output signal W1 First filter element W11 Output signal of the first filter element W2 Second filter element W21 Output signal of the second filter element X-system input signal Output signal for the entire Y system

Claims

1. In a ΔΣ modulator having an integrator and a quantizer, A delta-sigma modulator, characterized in that a filter acts only on the quantization noise components generated by the quantizer.

2. the filter is a high pass filter, The delta-sigma modulator of claim 1, characterized in that the high-order high-pass filter is configured to act only on the quantization noise components generated by the quantizer, without acting on the components of the input signal to the entire system.

3. a first adder that inverts and adds an output signal of the integrator to an input signal for the entire system; a second adder that inverts and adds the output signal of the first adder to the output signal of the quantizer; a third adder that inverts and adds the output signal of the integrator to the output signal of the second adder; the input signal of the quantizer is the output signal of the first adder; the input signal of the integrator is the output signal of the second adder; The delta-sigma modulator according to claim 2, wherein the output signal of the quantizer is an output signal for the entire system.

4. The input signal to the entire system is X, the output signal to the entire system is Y, the integrator is Σ, and the quantization noise is N q Then, the output signal Y for the entire system is [0010] 3. The delta-sigma modulator according to claim 2, characterized in that:

5. The filters are high-order high-pass and low-pass filters, The delta-sigma modulator of claim 1, characterized in that the high-order high-pass filter and low-pass filter are configured to act only on the quantization noise components generated by the quantizer, without acting on the components of the input signal to the entire system.

6. A first filter element and a second filter element, a first adder that inverts and adds an output signal of the integrator to an input signal for the entire system; a first filter adder that adds an output signal of the first filter element to an output signal of the integrator; a second filter adder that adds an output signal of the second filter element to an output signal of the first filter adder; a filter branch adder that inverts and adds an output signal of the quantizer to an output signal of the first filter adder, an output signal of the filter branch adder is input to the first filter element and the second filter element; the input signal of the quantizer is the output signal of the second filter adder; the input signal of the integrator is the output signal of the first adder; The delta-sigma modulator according to claim 5, wherein the output signal of the quantizer is an output signal for the entire system.

7. A first filter element and a second filter element, a first adder that inverts and adds an output signal of the integrator to an input signal for the entire system; a second adder that inverts and adds the output signal of the first adder to the output signal of the quantizer; a third adder that inverts and adds an output signal of the integrator to an output signal of the second adder; a first filter adder that adds an output signal of the first filter element to an output signal of the first adder; a second filter adder that adds an output signal of the second filter element to an output signal of the first filter adder; a filter branch adder that inverts and adds an output signal of the quantizer to an output signal of the first filter adder, an output signal of the filter branch adder is input to the first filter element and the second filter element; the input signal of the quantizer is the output signal of the second filter adder; the input signal of the integrator is the output signal of the second adder; The delta-sigma modulator according to claim 5, wherein the output signal of the quantizer is an output signal for the entire system.

8. A first filter element and a second filter element are provided, The first filter element is W 1 , the second filter element W 2 , the input signal to the entire system is X, the coefficient that can be expressed as either 1 or Σ / (1+Σ) is A, the output signal to the entire system is Y, the integrator is Σ, the quantization noise is N q。 Then, the output signal Y for the entire system is [0025] 6. The delta-sigma modulator according to claim 5, characterized in that:

9. In a ΔΣ modulation method including an integration process and a quantization process, A ΔΣ modulation method, characterized in that a filter process is performed only on the quantization noise components generated by the quantization process.

10. the filtering is a high-order high-pass filtering; The delta-sigma modulation method according to claim 9, characterized in that high-order high-pass filter processing is performed only on the quantization noise components generated by the quantization process, without performing high-order high-pass filter processing on the components of the input signal to the entire system.

11. The input signal to the entire system is X, the output signal to the entire system is Y, the integrator is Σ, and the quantization noise is N q Then, the output signal Y for the entire system is [0030] The ΔΣ modulation method according to claim 10, characterized in that it is expressed as follows:

12. the filtering process is a low-pass filtering process, The delta-sigma modulation method of claim 9, characterized in that high-order high-pass filter and low-pass filter processing is not performed on the components of the input signal to the entire system, but high-order high-pass filter and low-pass filter processing is performed only on the components of the quantization noise generated by the quantization process.

13. Further comprising a first filter element and a second filter element, The first filter element is W 1 , the second filter element W 2 , the input signal to the entire system is X, the coefficient that can be expressed as either 1 or Σ / (1+Σ) is A, the output signal to the entire system is Y, the integrator is Σ, the quantization noise is N q Then, the output signal Y for the entire system is [0045] The ΔΣ modulation method according to claim 12, characterized in that it is expressed as follows:

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