Display device

Abstract

To provide a display device for various applications that has a structure suitable for a pad portion provided at a display panel and that is manufactured by stacking an oxide semiconductor, an insulating film, and a conductive film that prevent defects caused by peeling of a thin film.SOLUTION: A semiconductor device is a display device comprises: a pixel electrode layer 110 arranged in a matrix in which scanning lines G1 and G2 intersect with signal lines; and an inverted staggered thin film transistor 170 which has a pixel portion provided corresponding to the pixel electrode layer, is composed of combining at least two types of oxide semiconductor layers with different oxygen contents, and a channel protection layer 133 is provided on a semiconductor layer 103 that serves as a channel formation region overlapping with a gate electrode layer 101. In the outer region of the pixel portion in this display device, a pad portion is provided which is electrically connected to a common electrode layer 190 facing the pixel electrode layer by a conductive layer made of the same material as that constituting the scanning lines and signal lines.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a display device using an oxide semiconductor and a manufacturing method thereof. [Background technology]

[0002] As typified by liquid crystal display devices, thin film transistors formed on flat plates such as glass substrates They are made of amorphous silicon and polycrystalline silicon. Thin-film transistors using GaN have low field-effect mobility, but they are suitable for enlarging the area of ​​glass substrates. On the other hand, thin-film transistors using crystalline silicon have high field-effect mobility. However, a crystallization process such as laser annealing is required, and it is essential to enlarge the area of ​​the glass substrate. It has the characteristic that it is not adapted to

[0003] In response to this, thin-film transistors are being fabricated using oxide semiconductors, and they are being used in electronic devices and optical devices. For example, zinc oxide and In-GaAs films are used as oxide semiconductors. Thin-film transistors are fabricated using a-Zn-O oxide semiconductors, and used as switches for image display devices. Technologies used in switching elements and the like are disclosed in Patent Documents 1 and 2. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0005] Thin film transistors with a channel formation region in an oxide semiconductor are made of amorphous silicon. The oxide semiconductor film has a higher field effect mobility than the thin film transistors that use the oxide semiconductor film. Film formation is possible at temperatures below 300℃ using methods such as sputtering, and polycrystalline silicon The manufacturing process is simpler than that of thin film transistors using

[0006] Using such oxide semiconductors, thin film transistors can be formed on glass substrates, plastic substrates, etc. and then used for liquid crystal displays, electroluminescent displays, electronic paper, etc. Applications are expected.

[0007] However, thin-film transistors using oxide semiconductors have excellent operating characteristics and can be manufactured at low temperatures. In order to make the most of the characteristics of a transistor, it is necessary not only to optimize the structure and manufacturing conditions of the element, but also to optimize the signal input and output. It is necessary to consider the wiring structure and connection structure required for the power supply. Even if this is possible, thin metal films forming wiring and electrodes, and insulating films such as interlayer insulating films may peel off. In addition, the common connection portion provided on the element substrate side of the display panel If the connection resistance of the electrodes is high, problems such as spots appearing on the display screen and reduced brightness can occur. occurs.

[0008] One aspect of the present invention is to provide a structure suitable for a common connection portion provided in a display panel. One of the objectives is to

[0009] One embodiment of the present invention is a semiconductor device for use in a semiconductor device having various applications in which an insulating film and a conductive film are stacked. An object of the present invention is to prevent defects caused by peeling of a thin film in a display device. [Means for solving the problem]

[0010] According to one aspect of the present invention, there is provided a pixel electrode layer in which scanning lines and signal lines cross each other and are arranged in a matrix shape; The pixel portion is provided corresponding to the pixel electrode layer, and the pixel portion has at least one different oxygen content. In both cases, the inverted staggered structure includes a channel protection layer formed by combining two types of oxide semiconductor layers. In this display device, the outer region of the pixel portion is provided with a thin film transistor. In the area, the scanning lines and signal lines are made of the same conductive layer, and the common electrode layer faces the pixel electrode layer. A pad portion is provided for electrical connection with the electrode layer.

[0011] An exemplary embodiment of the present invention is a pixel unit including a thin film transistor connected to a pixel electrode; A display device having a pad portion electrically connected to a common electrode facing the element electrode, Includes the configuration of.

[0012] In the pixel section, scanning lines and signal lines intersect, and pixel electrode layers are arranged in a matrix. The thin film transistor provided corresponding to the electrode layer has a gate electrode layer connected to the scanning line and a gate a gate insulating layer covering the gate electrode layer, a first oxide semiconductor layer serving as a channel formation region, A channel protection layer covering the first oxide semiconductor layer overlapping the gate electrode layer; A second oxide semiconductor layer that becomes a source region and a drain region on the conductor layer and the channel protection layer. and a source electrode layer on the first oxide semiconductor layer, the channel protection layer, and the second oxide semiconductor layer. and a drain electrode layer.

[0013] The pad section provided in the outer region of the pixel section is formed on the insulating layer which is the same layer as the gate insulating layer. A conductive layer formed of the same layer as the source electrode layer and the drain electrode layer is formed on the conductive layer. The openings in the interlayer insulating layer electrically connect the pixel electrode layer and the common electrode layer facing each other. This enables efficient connection.

[0014] In one exemplary embodiment of the present invention, as another configuration of the pad section provided in the outer region of the pixel section, A first conductive layer formed in the same layer as the gate electrode layer and a second conductive layer formed in the same layer as the gate insulating layer A second conductive layer formed of the same layer as the source electrode layer and the drain electrode layer is formed over the insulating layer. and a common electrode layer facing the pixel electrode layer is formed by an opening in an interlayer insulating layer provided on the second conductive layer. This includes those that enable electrical connection with the electrode layer.

[0015] In the above-mentioned structure, the pad portion is formed of an insulating layer and a conductive layer which are formed of the same layer as the gate insulating layer. (or a second conductive layer) between the first oxide semiconductor layer and the second oxide semiconductor layer. The layer may also be formed.

[0016] The oxide semiconductor layer (first oxide semiconductor layer) used as a channel formation region of the semiconductor layer is From the oxide semiconductor layer (second oxide semiconductor layer) used as the source region and the drain region The first oxide semiconductor layer is an oxygen-excess oxide semiconductor layer, and the second oxide semiconductor layer is an oxygen-excess oxide semiconductor layer. The semiconductor layer can be said to be an oxygen-deficient oxide semiconductor layer.

[0017] The second oxide semiconductor layer has n-type conductivity and has higher electrical conductivity than the first oxide semiconductor layer. Therefore, the source region and the drain region using the second oxide semiconductor layer are formed by the first oxide semiconductor layer. The resistance is lower than that of the semiconductor layer.

[0018] The first oxide semiconductor layer has an amorphous structure, and the second oxide semiconductor layer has an amorphous structure. The crystal grains (nanocrystals) in the second oxide semiconductor layer may be included. Nanocrystals have a diameter of 1 nm to 10 nm, typically about 2 nm to 4 nm.

[0019] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the specific names used in this specification are not intended to identify the invention. This does not indicate the

[0020] A first oxide semiconductor layer which becomes a channel formation region and / or a source region and a drain region As the second oxide semiconductor layer, an oxide semiconductor film containing In, Ga, and Zn is used. In addition, any one of In, Ga, and Zn may be replaced with tungsten, molybdenum, Titanium, nickel, or aluminum may be substituted.

[0021] In this specification, a semiconductor formed using an oxide semiconductor film containing In, Ga, and Zn is The semiconductor layer is also referred to as an "IGZO semiconductor layer." The IGZO semiconductor layer is a non-single crystal semiconductor layer. It is assumed that the material contains at least an amorphous component.

[0022] A substrate having a pixel electrode layer and a thin film transistor electrically connected to the pixel electrode layer on a surface thereof. The plate is fixed to the opposing substrate with an adhesive called a sealant.

[0023] In a liquid crystal display device, a liquid crystal material is sealed between a sealant and two substrates.

[0024] The sealing material contains multiple conductive particles (such as plastic particles with gold-plated surfaces). The opposing electrode (also called the common electrode) on the opposing substrate and the The electrode is electrically connected to a common electrode or a common potential line.

[0025] The common potential line can be fabricated on the same substrate using the same process as that for the thin film transistors.

[0026] The area where the common potential line and the conductive particles of the sealing material overlap is sometimes called the common connection area. The portion of the common potential line that overlaps with the conductive particles may be referred to as a common electrode.

[0027] The common potential line formed on the same substrate as the thin film transistor serves as a reference when driving the liquid crystal with an AC current. It can also be said to be a line that provides a reference voltage (common potential).

[0028] In addition to the common potential line connected to the counter electrode, a capacitance line connected to one electrode of the storage capacitor The line can also be called a type of common potential line, and can be provided on the same substrate in the same manner.

[0029] In addition, in a display device using an electrophoretic display element, also called electronic paper, a pair of Between the substrates, white and black particles charged with different polarities and a dispersion medium ( The structure contains a gas or liquid, and an electric The electrode is a common electrode. Opposite to this common electrode is a pixel electrode on the other substrate. A plurality of thin film transistors electrically connected to the pixel electrodes are arranged on the substrate. For example, the driving method of the display device using the electrophoretic display element is For the pixel electrode to be changed, a positive voltage is applied to the common potential applied to the common electrode. A voltage is applied to the common electrode for the pixel electrode that is to be changed from black to white. A negative voltage is applied to the common potential, and pixel electrodes that are not changed are set to the same potential as the common electrode.

[0030] A common potential line formed on the same substrate as the thin film transistor drives the electrophoretic display element. It can also be said that this line provides the reference voltage that is used as the basis for the measurement.

[0031] In addition, a display device using an electrophoretic display element is provided with a pair of substrates and a partition wall between them. Therefore, a plurality of independent spaces having a certain size are provided, and each independent space corresponds to a unit pixel. Each independent space is made up of multiple white particles and multiple It is a space that contains black particles and the dispersion medium (gas or liquid) that disperses them.

[0032] In a display device using an electrophoretic display element, a plurality of colored particles and The dispersion medium that disperses them is sealed with a sealant and two substrates. In the display device using the display element, a common electrode is provided on one substrate and a A common potential line formed on the plate is connected at a common connection portion by conductive particles.

[0033] In addition, in a display device using a liquid crystal display device or an electrophoretic display element, Although it depends on the circumstances, a plastic film may be used as the material for the pair of substrates used.

[0034] A gate insulating layer, a first oxide semiconductor layer which is to be a channel formation region, a source region, and a drain region The second oxide semiconductor layer, the source electrode layer, and the drain electrode layer are formed by sputtering. The film may be formed by a method such as a quartz crystal deposition method.

[0035] There are two types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used for depositing insulating films, while the DC sputtering method is mainly used for depositing metal films. It is used in.

[0036] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0037] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There is a sputtering apparatus that uses this method.

[0038] In addition, in a film formation method using a sputtering method, a target material and a sputtering gas component are mixed during film formation. Reactive sputtering is a method of forming thin films of compounds by chemically reacting them with each other, and There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0039] These various sputtering methods are used to form the gate insulating layer, the semiconductor layer, the source region, and the drain region. A source electrode layer and a drain electrode layer are formed.

[0040] In addition, the first oxide semiconductor layer (oxygen-excess oxide semiconductor layer) and the second oxide semiconductor layer (oxygen When an IGZO semiconductor layer is used as the silicon-deficient oxide semiconductor layer, the first oxide semiconductor layer and The source region and the drain region are formed under different film formation conditions from the film formation conditions of the oxide semiconductor layer of 2. The deposition conditions for the second oxide semiconductor layer to be the gate region are as follows: This includes conditions that include crystal grains smaller than 10 nm. For example, In2O3:Ga2O3:ZnO The target was used with a ratio of argon gas flow rate to oxygen flow rate of 1:1:1. The deposition conditions are that the gas is introduced into the chamber at a ratio of 2:1, or that only argon gas is introduced. When the conditions are met, the film contains crystal grains with a size of 1 nm to 10 nm immediately after deposition. In addition, a target with In2O3:Ga2O3:ZnO=1:1:1 This ratio was intentionally designed to obtain an amorphous oxide semiconductor film. Therefore, in order to obtain a film with higher crystallinity in the source and drain regions, the target The composition ratio of the same may be changed in order to simplify the process or to realize low cost. By using the same target and changing the introduced gas, the first oxide semiconductor which becomes the channel formation region can be grown. It is preferable to form the conductor layer and the second oxide semiconductor layer which becomes the source region and the drain region separately. preferable.

[0041] In addition, a titanium film is preferably used for the source electrode layer and the drain electrode layer.

[0042] In addition, the sputtering method uses Ar ions to apply high energy to the target, In the formed oxide semiconductor layer (typically, an IGZO semiconductor layer), there is a strong strain energy. In order to release this strain energy, the material is heated to 200°C to 600°C, typically It is preferable to carry out a heat treatment at 300°C to 500°C. This heat treatment releases the distortion that inhibits carrier movement, and the The film and heat treatment (including photo-annealing) are important.

[0043] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. Effect of the Invention

[0044] According to one embodiment of the present invention, a structure suitable for a pad portion provided on a display panel is provided. This can be done.

[0045] According to one aspect of the present invention, in a pad portion provided in an outer region of a pixel portion, an oxide semiconductor By laminating the dielectric layer and the conductive layer, defects caused by peeling of the thin film can be prevented. In addition, by using a stacked structure of an oxide semiconductor layer and a conductive layer, The thickness of the contact area is increased, reducing resistance and providing a robust structure.

[0046] In addition, according to one embodiment of the present invention, a semiconductor device having a small photocurrent, a small parasitic capacitance, and a high on-off ratio can be obtained. A thin film transistor having good dynamic characteristics can be obtained. do.

[0047] Therefore, according to one embodiment of the present invention, a display device having high electrical characteristics and high reliability can be provided. can. [Brief description of the drawings]

[0048] [Figure 1] 1A to 1C are diagrams illustrating a semiconductor device. [Diagram 2] 1A to 1C are diagrams illustrating a semiconductor device. [Diagram 3] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 4] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 10] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 11] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 12] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 13] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 14] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 15] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 16] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 17] FIG. 2 is a diagram illustrating a configuration of a shift register. [Figure 18] 18 is a diagram for explaining a connection configuration of the flip-flop shown in FIG. 17. [Figure 19] 1A and 1B are diagrams illustrating a pixel equivalent circuit of a semiconductor device. [Figure 20] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 21] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 22] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 23] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 24] 1A and 1B are diagrams illustrating examples of usage of electronic paper. [Diagram 25] FIG. 1 is an external view showing an example of an electronic book. [Figure 26] FIG. 1 is an external view showing an example of a television device and a digital photo frame. [Figure 27] FIG. 1 is an external view showing an example of a gaming machine. [Figure 28] FIG. 1 is an external view showing an example of a mobile phone. [Figure 29] 1A to 1C are diagrams illustrating a semiconductor device. [Diagram 30] 1A to 1C are diagrams illustrating a semiconductor device. [Diagram 31] 1A to 1C are diagrams illustrating a semiconductor device. [Diagram 32] 1A to 1C are diagrams illustrating a semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0049] The present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the above, and various modifications and variations in form and detail are possible without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be modified in the following manner. The present invention is not limited to the above-described embodiment. In the structure, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. and the repeated explanation will be omitted.

[0050] (Embodiment 1) Here, in a liquid crystal display device in which a liquid crystal layer is sealed between a first substrate and a second substrate, A common connection portion (pad portion) for electrically connecting to the counter electrode provided on the substrate is provided on the first The following shows an example of forming the switching element on a substrate. The manufacturing process of the common connection part is the same as the manufacturing process of the switching element of the pixel part. By standardizing the components, the manufacturing process can be simplified.

[0051] The common connection portion is disposed at a position overlapping a sealant for bonding the first substrate and the second substrate. The sealing material is electrically connected to the counter electrode via conductive particles contained therein. The common connection part is provided in a place where it does not overlap with the sealing material (excluding the pixel part), and the common connection part A paste containing conductive particles is provided separately from the sealing material so as to overlap the opposing electrode. A connection is made.

[0052] FIG. 1(A) is a cross-sectional view of a semiconductor device in which a thin film transistor and a common connection part are fabricated on the same substrate. FIG. 1(A) is a diagram showing a structure of the thin film transistor. The semiconductor layer 103 has a channel region on which a channel is formed. A channel protection layer 133 is provided on the semiconductor layer 103 and the channel protection layer 133. The source or drain electrode layer 105a is formed through the drain region 104a, 104b. 105b is an example of a thin film transistor provided.

[0053] In this embodiment, the semiconductor layer 103 having a channel formation region is made of In, Ga, Zn, and and a non-single crystal semiconductor layer (first oxide semiconductor layer) containing O, The source and drain regions 104a and 104b are an oxide semiconductor layer (second oxide semiconductor layer) containing In, Ga, Zn, and O; The conductive layer 103 is formed under different film forming conditions, and is included more than the semiconductor layer 103. The source or drain region 104a is an oxide semiconductor layer having a low oxygen concentration and low resistance. , 104b has n-type conductivity and has an activation energy (ΔE) of 0.01 eV or more. 1 eV or less, n + The source or drain region 104a, The non-single crystal semiconductor layer 104b contains In, Ga, Zn, and O. Therefore, the oxide semiconductor layer used for the semiconductor layer 103 is The oxide semiconductor layer is an oxygen-excess oxide semiconductor layer and is used as a source region or a drain region. The body layer is an oxygen-deficient semiconductor layer.

[0054] The oxygen-deficient oxide semiconductor layer is provided as the source region and the drain region. As a result, the source electrode layer 105a, 105b, which is a metal layer, and the drain electrode layer 105b, which is a semiconductor layer, are The contact between the semiconductor layer 103 (oxygen excess oxide semiconductor layer) and the semiconductor layer 104 is excellent compared to a Schottky contact. In addition, the source side supplies carriers to the channel. Or, it absorbs the carriers in the channel stably (drain side), or it sources the resistance component. In order to prevent this from occurring at the interface with the source electrode layer (or drain electrode layer), It is effective to provide a drain region. Also, by reducing the resistance, it is possible to operate at a high drain voltage. Good mobility can be maintained.

[0055] Since the channel protection layer 133 is provided on the channel formation region of the semiconductor layer 103, Damage during processing to the channel formation region of the semiconductor layer 103 (protrusion during etching) This prevents the thin film transistor from being damaged by plasma or etching agents, or from being oxidized. This can improve the reliability of the transistor 170.

[0056] FIG. 1B is a top view of a common connection portion, and the dashed line G1-G2 in the figure is This corresponds to the cross section of the common connection part in FIG. 1(A). The same reference numerals will be used for the above parts in the following description.

[0057] The common potential line 185 is provided on the gate insulating layer 102 and is connected to the source electrode layer or the drain electrode It is made of the same material and in the same process as layers 105a, 105b.

[0058] The common potential line 185 is covered with a protective insulating layer 107. The openings are located at positions overlapping the lines 185. The contact holes connect the drain electrode layers 105a and 105b to the pixel electrode layer 110. It is produced using the same process.

[0059] In addition, since the area size is significantly different here, the contact hole in the pixel area and the common In FIG. 1(A), the pixel section and the common connection section are called the openings of the common connection section. For example, the length of the chain line G1-G2 of the common connection is 500 mm. The width of a thin-film transistor is less than 50 μm, and in fact is about 10 The area size is more than twice as large, but for ease of understanding, the pixel section and the common connection section are shown in Figure 1(A). The figures are illustrated at different scales.

[0060] The common electrode layer 190 is provided on the protective insulating layer 107, and the pixel electrode layer 110 of the pixel portion It is made of the same materials and in the same process.

[0061] In this way, the manufacturing process of the common connection portion is common to the manufacturing process of the switching element of the pixel portion. conduct.

[0062] A first substrate 100 having a pixel section and a common connection section and a second substrate having a counter electrode are provided. The plate is fixed using a sealing material.

[0063] When the sealing material contains conductive particles, the sealing material and the common connection part are overlapped with each other. For example, in a small liquid crystal panel, In the above, two common connection parts are arranged overlapping the sealing material at diagonal corners of the pixel part. In a large liquid crystal panel, four or more common connecting portions are arranged overlapping the sealing material.

[0064] The common electrode layer 190 is an electrode that comes into contact with the conductive particles contained in the sealing material. The substrate is electrically connected to the counter electrode of the substrate.

[0065] When using the liquid crystal injection method, a pair of substrates are fixed with a sealant, and then liquid crystal is injected between the pair of substrates. In addition, when the liquid crystal dropping method is used, a sealant is applied to the second substrate or the first substrate. After drawing and dropping liquid crystal, the pair of substrates are bonded together under reduced pressure.

[0066] In this embodiment, an example of a common connection portion electrically connected to the counter electrode has been shown. Not limited to this, it is used for connecting parts to other wiring, connecting parts to external connection terminals, etc. It is possible.

[0067] For example, when a light-emitting display device is manufactured, unlike a liquid crystal display device, a counter electrode is connected to the light-emitting display device. There is no connection part for connecting the cathode of the light-emitting element to the common wiring, The connection structure of the light-emitting element may be the same as that shown in FIG. Alternatively, a connection part may be provided between the pixel section and the driver circuit section. It would be best to set one up.

[0068] (Embodiment 2) Here, the common potential line is formed of the same material and in the same process as the gate line. An example of forming a common connection portion (pad portion) using this method is shown in FIG. 2(A) and FIG. 2(B).

[0069] FIG. 2B is a diagram showing an example of a top view of the common connection portion, and the dashed line E1-E2 in the diagram corresponds to FIG. A) corresponds to the cross section of the common connection part.

[0070] As shown in FIG. 2A, the structure of the thin film transistor in the pixel portion is the same as that in the first embodiment. Therefore, the same parts as those in FIG. 1(A) are designated by the same reference numerals, and detailed explanations are omitted here. It is decided.

[0071] The common potential line 181 is provided on the first substrate 100 and is made of the same material as the gate electrode layer 101. They are made using the same process.

[0072] The common potential line 181 is covered with the gate insulating layer 102 and the protective insulating layer 107. The insulating layer 102 and the protective insulating layer 107 have a plurality of openings at positions overlapping the common potential line 181. Unlike the first embodiment, this opening has a depth equivalent to the thickness of two insulating films. The opening is formed by removing the source and drain electrode layers 105a and 10 After etching in the same process as the contact hole connecting 5b to the pixel electrode layer 110, Further, the gate insulating layer 102 is selectively etched to complete the process.

[0073] The common electrode layer 190 is provided on the protective insulating layer 107, and the pixel electrode layer 110 of the pixel portion It is made of the same materials and in the same process.

[0074] In this way, the manufacturing process of the common connection portion is common to the manufacturing process of the switching element of the pixel portion. conduct.

[0075] A first substrate 100 having a pixel section and a common connection section and a second substrate having a counter electrode are provided. The plate is fixed using a sealing material.

[0076] When the sealing material contains conductive particles, the sealing material and the common connection part are overlapped with each other. The plates are aligned.

[0077] The common electrode layer 190 is an electrode that comes into contact with the conductive particles contained in the sealing material. The substrate is electrically connected to the counter electrode of the substrate.

[0078] When using the liquid crystal injection method, a pair of substrates are fixed with a sealant, and then liquid crystal is injected between the pair of substrates. In addition, when the liquid crystal dropping method is used, a sealant is applied to the second substrate or the first substrate. After drawing and dropping liquid crystal, the pair of substrates are bonded together under reduced pressure.

[0079] In this embodiment, an example of a common connection portion electrically connected to the counter electrode has been shown. Not limited to this, it is used for connecting parts to other wiring, connecting parts to external connection terminals, etc. It is possible.

[0080] (Embodiment 3) Here, the common connection portion (pad portion) is made of the same material as the gate wiring and is formed in the same process. A common potential line is formed on the electrode, and the common potential line is formed by the same process and made of the same material as the source electrode layer. An example of manufacturing a common connection portion using wiring formed in the semiconductor device is shown in FIG.

[0081] FIG. 3B is a diagram showing an example of a top view of the common connection portion, and the dashed line F1-F2 in the diagram corresponds to FIG. A) corresponds to the cross section of the common connection part.

[0082] As shown in FIG. 3A, the structure of the thin film transistor in the pixel portion is the same as that in the first embodiment. Therefore, the same parts as those in FIG. 1(A) are designated by the same reference numerals, and detailed explanations are omitted here. It is decided.

[0083] The connection electrode layer 191 is provided on the first substrate 100 and is made of the same material as the gate electrode layer 101. They are made using the same process.

[0084] The connection electrode layer 191 is covered with the gate insulating layer 102 and the protective insulating layer 107. The insulating layer 102 and the protective insulating layer 107 have openings at positions where they overlap with the common electrode layer 190. Unlike the first embodiment, this opening is a deep opening corresponding to the thickness of two insulating layers. The opening is a portion between the source or drain electrode layer 105b and the pixel electrode layer 105c. After etching in the same process as the contact hole connecting 110, the gate insulation It is produced by selectively etching layer 102 .

[0085] The common potential line 185 is provided on the gate insulating layer 102 and is connected to the source electrode layer or the drain electrode layer. The second electrode layer 105a and the second electrode layer 105b are made of the same material and in the same process as the first electrode layers 105a and 105b.

[0086] The common potential line 185 is covered with a protective insulating layer 107. The openings are located at positions overlapping the lines 185. The contact hole connecting the drain electrode layer 105b and the pixel electrode layer 110 is formed in the same process. It is manufactured.

[0087] The common electrode layer 190 is provided on the protective insulating layer 107, and the pixel electrode layer 110 of the pixel portion It is made of the same materials and in the same process.

[0088] In this way, the manufacturing process of the common connection portion is common to the manufacturing process of the switching element of the pixel portion. conduct.

[0089] A first substrate 100 having a pixel section and a common connection section and a second substrate having a counter electrode are provided. The plate is fixed using a sealing material.

[0090] In this embodiment, a plurality of conductive particles are disposed only in the opening of the gate insulating layer 102. That is, multiple electrodes are selectively arranged in the area where the common electrode layer 190 and the connection electrode layer 191 are in contact with each other. A number of conductive particles are arranged on the common electrode layer 191 and the common potential line 185. The conductive layer 190 is an electrode that contacts the conductive particles and is electrically connected to the counter electrode of the second substrate. The connection is made.

[0091] When using the liquid crystal injection method, a pair of substrates are fixed with a sealant, and then liquid crystal is injected between the pair of substrates. In addition, when the liquid crystal dropping method is used, a sealant is applied to the second substrate or the first substrate. After drawing and dropping liquid crystal, the pair of substrates are bonded together under reduced pressure.

[0092] In this embodiment, an example of a common connection portion electrically connected to the counter electrode has been shown. Not limited to this, it is used for connecting parts to other wiring, connecting parts to external connection terminals, etc. It is possible.

[0093] (Embodiment 4) Here, in the first embodiment, the source electrode layer or the drain electrode layer and the source region or the drain region are An example of a display device formed by etching the rain area with the same mask is shown in FIG. As shown in B).

[0094] FIG. 29(A) shows a semiconductor device in which a thin film transistor and a common connection part (pad part) are fabricated on the same substrate. 29A is a diagram showing a cross-sectional structure of a semiconductor device. The inverted staggered thin film transistor has a channel protection layer. A channel protection layer 133 is provided on the formation region, and the semiconductor layer 103 and the channel protection layer 133 A source electrode layer or a drain electrode layer is disposed on the source region or drain region 104a, 104b. This is an example of a thin film transistor in which electrode layers 105a and 105b are provided. The gate 172 is an oxide semiconductor that forms the source region or the drain region 104a, 104b. The source and drain electrode layers 105a and 105b are formed by etching the layers. The etching of the conductive layer is performed using the same mask.

[0095] Therefore, in the thin film transistor 172, the source electrode layer or the drain electrode layer 105a , 105b and the source or drain regions 104a, 104b have the same shape. Electrode layer or drain electrode layer 105a, 105b source region under the source region or drain region There are areas 104a and 104b.

[0096] Therefore, even in the common connection portion, a source region is formed between the gate insulating layer 102 and the common potential line 185. Alternatively, an oxide semiconductor formed using the same material and process as the drain regions 104a and 104b. A layer 186 is formed.

[0097] FIG. 29B is a diagram showing an example of a top view of the common connection portion, and the dashed line G1-G2 in the diagram corresponds to the cross section of the common connection portion in FIG.

[0098] As shown in FIG. 29(B), the structure of the common connection part in the top view of the first embodiment is the same as that in the first embodiment. Therefore, the same parts as those in FIG. 1(B) are designated by the same reference numerals, and detailed explanations are omitted here. Let us assume that.

[0099] According to this embodiment, in the common connection portion (pad portion) provided in the outer region of the pixel portion, In the case where the oxide semiconductor layer and the conductive layer are stacked, the peeling of the thin film can be prevented. In addition, by using a stacked structure of an oxide semiconductor layer and a conductive layer, This makes the pad portion thicker, lowering its resistance and providing a robust structure.

[0100] (Embodiment 5) Here, in the third embodiment, the source electrode layer or the drain electrode layer and the source region and the drain region are An example of a display device formed by etching the rain area with the same mask is shown in FIG. As shown in B).

[0101] FIG. 30(A) shows a semiconductor device in which a thin film transistor and a common connection part (pad part) are fabricated on the same substrate. FIG. 2 is a cross-sectional view of a conductor device.

[0102] As shown in FIG. 30(A), the structure of the thin film transistor in the pixel portion is the same as that in the fourth embodiment. Since the embodiment is the same as that shown in FIG. 29(A), the same reference numerals are used for the same parts, and detailed explanations are omitted here. It has been decided that.

[0103] The thin film transistor 172 forms source and drain regions 104a, 104b. The oxide semiconductor layer is etched, and the source and drain electrode layers 105a and 105 The etching process of the conductive layer forming the thin film transistor b is performed using the same mask. In the transistor 172, the source electrode layer or drain electrode layer 105a, 105b and The source and drain regions 104a and 104b have the same shape. The source or drain regions 104a, 104b are disposed under the source electrode layers 105a, 105b. 4b exists.

[0104] At the common connection portion, a source region or a drain region is formed between the gate insulating layer 102 and the common potential line 185. An oxide semiconductor layer 18 is formed using the same material and process as the drain regions 104a and 104b. 6 is formed.

[0105] FIG. 30B is a diagram showing an example of a top view of the common connection portion, and the dashed line F1-F2 in the diagram corresponds to the cross section of the common connection portion in FIG.

[0106] As shown in FIG. 30(B), the structure of the common connection part in the top view is the same as that in the third embodiment. Therefore, the same parts as those in FIG. 3(B) are designated by the same reference numerals, and detailed explanations will be omitted here. Let us assume that.

[0107] According to this embodiment, in the common connection portion (pad portion) provided in the outer region of the pixel portion, In the case where the oxide semiconductor layer and the conductive layer are stacked, the peeling of the thin film can be prevented. In addition, by using a stacked structure of an oxide semiconductor layer and a conductive layer, This makes the pad portion thicker, lowering its resistance and providing a robust structure.

[0108] (Embodiment 6) In this embodiment, a manufacturing process of a display device including a thin film transistor according to one embodiment of the present invention will be described. The thin film transistor included in the display device of the present invention is , an inverted staggered thin film transistor having a channel protection layer.

[0109] In FIG. 4A, a first substrate 100 having light transmitting properties is made of barium borosilicate glass or A glass substrate such as an aluminoborosilicate glass substrate can be used.

[0110] Next, a conductive layer is formed on the entire surface of the first substrate 100, and then a first photolithography process is performed. Then, a resist mask is formed, and unnecessary parts are removed by etching to form wiring and electrodes. (Gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121) At this time, a tapered shape is formed at least at the end of the gate electrode layer 101. The cross-sectional view at this stage is shown in FIG. The figure corresponds to FIG.

[0111] The gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121 of the terminal portion are It is preferable to form it from a low resistance conductive material such as aluminum (Al) or copper (Cu), However, since aluminum alone has problems such as poor heat resistance and susceptibility to corrosion, a heat-resistant conductive material The heat-resistant conductive material is titanium (Ti), tantalum (Ta ), tungsten (W), molybdenum (Mo), chromium (Cr), Nd (neodymium), An element selected from the group consisting of Sc, Cr, and Cr, or an alloy containing the above elements, or The film is formed of an alloy film combining the above elements, or a nitride film containing the above elements as components.

[0112] Next, a gate insulating layer 102 is formed on the entire surface of the gate electrode layer 101. For 02, a method such as sputtering is used, and the film thickness is set to 50 to 250 nm.

[0113] For example, a silicon oxide film is used as the gate insulating layer 102 by sputtering, and the thickness is 100 nm. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film. Silicon oxide nitride film, silicon nitride film, aluminum oxide, tantalum oxide film It is also possible to use other insulating films such as those mentioned above and form them as a single layer or a laminated structure made of these materials. stomach.

[0114] The oxide semiconductor layer (IGZO semiconductor layer) that will become the channel formation region is treated with plasma. The surface of the gate insulating layer may be cleaned before the formation of the gate insulating layer. It is useful to perform a plasma treatment to remove any foreign matter. Plasma treatment to make the surface an oxygen-rich region improves reliability in subsequent processes. In the heat treatment (200℃~600℃) for the purpose of It is effective in creating a source of nutrients.

[0115] Furthermore, after the plasma treatment, an oxide semiconductor layer is formed by a sputtering method without exposure to air. When the deposition substrate is exposed to the air before the oxide semiconductor layer is formed, moisture or the like is preferably removed. Adhesion can adversely affect the interface state, resulting in variations in threshold voltage, deterioration of electrical characteristics, and Plasma treatment uses oxygen gas to remove the TFT from the display. Alternatively, argon gas is used. Other rare gases may be used in place of argon gas.

[0116] After plasma treatment, the oxide semiconductor that will become the channel formation region is formed by sputtering without being exposed to the air. To deposit the oxide semiconductor layer, both the plasma treatment and the deposition of the oxide semiconductor layer were performed in the same chamber. It is preferable to carry out a type of plasma treatment called reverse sputtering, which can be carried out by reverse sputtering. Putting is a process in which the target is etched in an oxygen or oxygen and argon atmosphere without applying a voltage to the target. This is a method in which a voltage is applied to the substrate side to generate plasma and modify the surface of a thin film on the substrate.

[0117] In addition, when performing plasma treatment using oxygen gas in the chamber, oxygen is generated on the surface of the gate insulating layer. By irradiating radicals, the surface of the gate insulating layer is modified to an oxygen-excess region, which is then The oxygen concentration at the interface between the oxide semiconductor layer and the gate insulating film, which is to be a channel formation region, is increased. By performing oxygen radical treatment on a gate insulating layer, stacking an oxide semiconductor layer, and performing heat treatment, The oxygen concentration on the gate insulating layer side of the oxide semiconductor layer, which is the panel formation region, can also be made high. Therefore, the oxygen concentration is not increased at the interface between the gate insulating layer and the oxide semiconductor layer which is to be the channel formation region. The oxygen concentration in the gate insulating layer has a concentration gradient, and the gradient is larger than that of the gate insulating layer. The oxygen concentration increases as the concentration approaches the interface between the oxide semiconductor layer and the channel formation region. A gate insulating layer having an excess region and an oxygen-excess oxide semiconductor layer are used as a channel formation region. The oxide semiconductor layer has good compatibility and can provide good interface characteristics.

[0118] The oxygen radicals may be supplied by a plasma generator using a gas containing oxygen; Alternatively, the oxygen may be supplied by an ozone generator. The membrane surface can be modified by irradiation.

[0119] Furthermore, the radical treatment is not limited to oxygen radical treatment, and radical treatment using argon and oxygen may be performed. The argon and oxygen radical treatment involves introducing argon gas and oxygen gas to generate plasma. The purpose of this method is to modify the thin film surface by applying heat to the thin film.

[0120] Argon atoms (Ar) in the reaction space where an electric field is applied and discharge plasma is generated are The electrons (e) in the plasma excite or ionize the argon radicals (Ar * ) and Argon On (Ar + ) and electrons (e). Argon radicals (Ar * ) is a high energy equivalent It is in a stable state and reacts with the same or different atoms in the vicinity, exciting or ionizing those atoms. When the oxygen is in the vicinity, the reaction occurs like an avalanche. When the oxygen atom (O) is excited or ionized, it becomes an oxygen radical (O * ) and oxygen ions (O + ) and oxygen (O). The oxygen radical (O * ) reacts with the material on the surface of the thin film that is being treated. The surface is modified and then a plasma treatment is performed to react with and remove the organic matter on the surface. In addition, the radicals of argon gas are smaller than those of reactive gas (oxygen gas). The metastable state is maintained for a long time, so it is an easy way to generate plasma. Generally, gaseous argon is used.

[0121] Next, a first oxide semiconductor film (a first IGZ film in this embodiment) is formed over the gate insulating layer 102. After the plasma treatment, the first IGZO film is deposited without exposure to the atmosphere. This is useful in that dust and moisture are not attached to the interface between the gate insulating layer and the semiconductor film. In this study, an oxide semiconductor target (In2O3 :Ga2O3:ZnO=1:1:1) was used, and the distance between the substrate and the target was set at 170 mm, pressure 0.4 Pa, direct current (DC) power supply 0.5 kW, deposition in argon or oxygen atmosphere In addition, if a pulsed direct current (DC) power supply is used, dust can be reduced and the film thickness distribution becomes uniform. The thickness of the first IGZO film is preferably 5 nm to 200 nm. In this embodiment, the thickness of the first IGZO film is 100 nm.

[0122] The gate insulating layer and the first IGZO film are formed by sputtering using a gas or By switching the installed target appropriately, continuous film formation can be performed without exposure to the atmosphere. By continuously depositing films without exposing them to the air, it is possible to prevent the inclusion of impurities. When forming films continuously without exposure to the atmosphere, it is recommended to use a multi-chamber manufacturing device. is preferred.

[0123] Next, a channel protection layer 133 is formed in the area overlapping the channel formation area of ​​the first IGZO film. The channel protection layer 133 is also exposed to the atmosphere together with the gate insulating layer 102 and the first IGZO film. The thin films may be successively formed without being exposed to the atmosphere. Deposition of the film improves productivity.

[0124] The channel protection layer 133 may be made of an inorganic material (silicon oxide, silicon nitride, silicon oxynitride, silicon oxynitride, silicon nitride, etc.). The method of manufacture includes plasma CVD and thermal CVD. Any vapor deposition method or sputtering method can be used. The channel protection layer 133 is formed by The shape is processed by etching later. Here, a silicon oxide film is formed by sputtering. The channel is formed by etching using a photolithographic mask. A protective layer 133 is formed.

[0125] Next, a second oxide semiconductor film (in this embodiment) is formed on the first IGZO film and the channel protection layer 133. In this case, the second IGZO film is formed by sputtering. The target used was O3:ZnO = 1:1:1, and the deposition conditions were pressure of 0.4 Pa. The power was set to 500 W, the deposition temperature was set to room temperature, and argon gas was introduced at a flow rate of 40 sccm. Sputtering is performed. The target is In2O3:Ga2O3:ZnO=1:1:1. Although it was intentionally used, the I film immediately after deposition contained crystal grains with sizes of 1 nm to 10 nm. A GZO film may be formed. Note that the target component ratio and deposition pressure (0.1 Pa to 2.0Pa), power (250W~3000W: 8 inch diameter), temperature (room temperature~100℃), By appropriately adjusting the film formation conditions of the reactive sputtering, the presence or absence of crystal grains, the density of the crystal grains, The diameter size can be adjusted in the range of 1 nm to 10 nm. The thickness is 5 nm to 20 nm. Of course, if the film contains crystal grains, the thickness of the crystal grains The size does not exceed the thickness of the film. In this embodiment, the thickness of the second IGZO film is Let's say it's 5nm.

[0126] The first IGZO film is grown under different conditions from the second IGZO film. The first IGZO film contains more oxygen than the oxygen concentration in the second IGZO film. The proportion of oxygen gas flow rate and argon gas flow rate in the deposition conditions of GZO film was The ratio of oxygen gas flow rate in the first IGZO film deposition condition is higher than that in the second IGZO film deposition condition. Specifically, the deposition conditions for the second IGZO film are: rare gas (argon or helium) (or oxygen gas 10% or less, argon gas 90% or more) atmosphere, and The deposition conditions for the IGZO film were an oxygen atmosphere (or an oxygen gas flow rate equal to the argon gas flow rate). By incorporating a large amount of oxygen into the first IGZO film, The conductivity of the IGZO film is lower than that of the IGZO film in the first step. By including it in the O film, the off-current can be reduced, resulting in a high on-off ratio. Therefore, a thin film transistor having a high conductivity can be obtained.

[0127] The second IGZO film was deposited in the same chamber as the previous reverse sputtering. If it is possible to form the film without exposing it to the atmosphere, it is acceptable to use the chamber that was previously subjected to reverse sputtering. The film may be formed in a chamber different from that of the bar.

[0128] Next, it is preferable to carry out a heat treatment at 200°C to 600°C, typically 300°C to 500°C. Here, the sample is placed in a furnace and heat-treated at 350°C for 1 hour in a nitrogen atmosphere. This heat treatment rearranges the IGZO film at the atomic level. The heat treatment (including photo-annealing) is important because it releases the inhibiting strain. The timing of the heat treatment is not particularly limited as long as it is performed after the formation of the second IGZO film. For example, it may be performed after forming the pixel electrodes.

[0129] Next, a second photolithography process is performed to form a resist mask, and the first IGZ The ITO film and the second IGZO film are etched. Here, ITO07N (manufactured by Kanto Chemical Co., Ltd.) is used. The unnecessary parts were removed by wet etching using the oxygen-excess type first IGZO film. A semiconductor layer 103 which is an oxygen-deficient type second IGZO film and an IGZO film 111 which is an oxygen-deficient type second IGZO film are formed. The etching method used here is not limited to wet etching, and may be dry etching. A cross-sectional view at this stage is shown in FIG. Corresponds to Figure 7.

[0130] Next, a conductive film 132 made of a metal material is sputtered on the semiconductor layer 103 and the IGZO film 111. The top view at this stage is shown in Figure 4(C).

[0131] The material of the conductive film 132 is an element selected from Al, Cr, Ta, Ti, Mo, and W, or or an alloy film containing the above elements or a combination of the above elements. In addition, when heat treatment is performed at 200°C to 600°C, the heat resistance that can withstand this heat treatment is introduced. It is preferable to have a conductive film with aluminum as the only component. Aluminum alone has problems such as poor heat resistance and is prone to corrosion. Since there are some points, it is formed by combining it with a heat-resistant conductive material. The conductive materials are titanium (Ti), tantalum (Ta), tungsten (W), and molybdenum. An element selected from Mo, chromium, neodymium, and scandium. or an alloy film containing the above elements or a combination of the above elements; or It is formed of a nitride containing the above-mentioned elements as components.

[0132] Here, the conductive film 132 has a single-layer structure of a titanium film. Alternatively, a titanium film may be stacked on an aluminum film. A Ti film is layered on top of the Ti film, and an aluminum film containing Nd (Al-Nd) is layered on top of the Ti film. A three-layer structure may be formed by further forming a Ti film on the conductive film 132. Alternatively, the aluminum film may have a single layer structure containing the above-mentioned.

[0133] Next, a third photolithography process is performed to form a resist mask 131 and etch the The unnecessary portions are removed by etching to form the source electrode layer or the drain electrode layer 105a, 105b, The source and drain regions 104a and 104b are formed by etching. As a method, wet etching or dry etching is used. When using an aluminum film or an aluminum alloy film, a mixture of phosphoric acid, acetic acid, and nitric acid is used. Wet etching can be performed using a solution. The Ti film was then etched by wet etching using a mixture of hydrogen chloride, ammonia, and water (5:2:2). The conductive film 132 is etched to form the source electrode layer or the drain electrode layer 105a, 105b. The GZO film 111 is etched to form the source and drain regions 104a and 104b. In this etching process, the channel protection layer 133 is etched away from the semiconductor layer 103. Since the etching mask functions as a mask stopper, the semiconductor layer 103 is not etched. In the present embodiment, the source and drain electrode layers 105a and 105b, the source and drain regions The etching of the regions 104a and 104b is performed simultaneously using an etching agent of ammonia hydrogen peroxide. In order to perform this, the source electrode layer or drain electrode layer 105a, 105b and the source region or drain region The ends of the wet-in regions 104a and 104b are aligned to form a continuous structure. In order to use etching, the etching is performed isotropically, and the source electrode layer or the drain electrode The ends of the pole layers 105a and 105b are recessed from the resist mask 131. The IGZO semiconductor layer 103 is used as a channel forming region, and a channel A thin film transistor 170 having a protective layer 133 can be fabricated. A cross-sectional view at this stage is shown in FIG. The top view at this stage is shown in FIG.

[0134] Since the channel protection layer 133 is provided on the channel formation region of the semiconductor layer 103, Damage during processing to the channel formation region of the semiconductor layer 103 (protrusion during etching) This prevents the thin film transistor from being damaged by plasma or etching agents, or from being oxidized. This can improve the reliability of the transistor 170.

[0135] In addition, in the third photolithography step, the source electrode layer or the drain electrode layer The second terminal 122, which is made of the same material as 105a and 105b, is left in the terminal portion. The terminal 122 is a source wiring (a source electrode layer or a source including a drain electrode layer 105a, 105b). The conductor is electrically connected to the

[0136] Also, a resist having regions of multiple thicknesses (typically two types) formed by a multi-tone mask is used. By using a photomask, the number of resist masks can be reduced, simplifying the process and reducing costs. Costs can be calculated.

[0137] Next, the resist mask 131 is removed, and the protective insulating layer 10 covering the thin film transistor 170 is removed. The protective insulating layer 107 is a silicon nitride film obtained by sputtering or the like, an oxide film, or the like. silicon oxide film, silicon oxynitride film, aluminum oxide film, tantalum oxide film, etc. It is possible.

[0138] Next, a fourth photolithography process is performed to form a resist mask and a protective insulating layer 1 By etching in step 07, contact holes reaching the source electrode layer or the drain electrode layer 105b are formed. The contact 125 is formed by etching, and the contact 125 reaches the second terminal 122. A tact hole 127 is also formed. In order to reduce the number of masks, the same resist mask is used. The gate insulating layer is further etched using the etchant to form a contact hole 126 that reaches the gate electrode. It is preferable to form the second resist pattern using the same resist mask. vinegar.

[0139] Next, the resist mask is removed, and then a transparent conductive film is formed. Indium oxide (In2O3) and indium tin oxide alloy (In2O3-SnO 2, ITO) is formed using a sputtering method or a vacuum deposition method. Etching of such materials is done with a hydrochloric acid based solution. However, etching of ITO in particular Residues are easily generated, so indium oxide zinc oxide alloy is used to improve etching processability. Gold (In2O3-ZnO) may also be used.

[0140] Next, a fifth photolithography step is performed to form a resist mask and perform etching. The unnecessary portions are removed to form the pixel electrode layer 110.

[0141] In addition, in this fifth photolithography step, the gate insulating layer 10 in the capacitance section The capacitance line 108 and the pixel electrode layer 110 form a storage capacitor, with the protective insulating layer 107 as a dielectric. A quantity is formed.

[0142] In the fifth photolithography process, the first terminal and the second terminal are resist-bonded. The transparent conductive film 128 and 129 formed on the terminal portion are left covered with a mask. 8, 129 are electrodes or wiring used for connection with the FPC. The formed transparent conductive film 129 is a connection terminal electrode that functions as an input terminal of the source wiring. It is.

[0143] Next, the resist mask is removed, and the cross-sectional view at this stage is shown in FIG. The top view at this stage corresponds to FIG.

[0144] 10(A1) and 10(A2) are top views of the gate line terminal portion at this stage. FIG. 10(A1) is a cross-sectional view taken along line C1-C2 in FIG. 10(A2). In FIG. 10(A1), a transparent insulating film 154 is formed on the protective insulating film 154. The conductive film 155 is a terminal electrode for connection that functions as an input terminal. In the terminal portion, a first terminal 151 made of the same material as the gate wiring and a source A connection electrode layer 153 made of the same material as the gate wiring is overlapped with the gate insulating layer 152. The transparent conductive film 155 is electrically connected to the transparent conductive film 128 shown in FIG. The portion in contact with the first terminal 121 is the transparent conductive film 155 and the first This corresponds to the portion with which terminal 151 is in contact.

[0145] FIG. 10(B1) and FIG. 10(B2) are different from the source wiring terminal portion shown in FIG. 5(C). The top view and the cross-sectional view of the different source wiring terminal parts are shown. 1) corresponds to a cross-sectional view taken along line D1-D2 in FIG. 10(B2). In FIG. 10(B1), The transparent conductive film 155 formed on the protective insulating film 154 is a connection that functions as an input terminal. In FIG. 10B1, the terminal portion is the same as the gate wiring. The electrode layer 156 formed of the material is a second terminal 150 electrically connected to the source line. The electrode layer 156 overlaps the second terminal 150 via the gate insulating layer 152. 1, and the electrode layer 156 is set to a potential different from that of the second terminal 150, e.g., floating. If you set it to GND, GND, 0V, etc., you can set the capacitance for noise prevention or the capacitance for static electricity prevention. A capacitance can be formed. The second terminal 150 is transparent via a protective insulating film 154. It is electrically connected to the transparent conductive film 155 .

[0146] A plurality of gate lines, source lines, and capacitance lines are provided according to the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, The terminal 2 and the third terminal of the same potential as the capacitance wiring are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0147] In this way, five photolithography steps were performed using five photomasks to create the bottom. A pixel having a thin film transistor 170 which is a gate-type n-channel thin film transistor. The thin film transistor and storage capacitor can be completed. Then, these are connected to the individual pixels. By configuring the pixel section in a matrix corresponding to the active matrix type, For the sake of convenience, the present specification will refer to such a substrate as one of the substrates for manufacturing a display device. Such a substrate is called an active matrix substrate.

[0148] When manufacturing an active matrix type liquid crystal display device, an active matrix substrate A liquid crystal layer is provided between the active matrix substrate and a counter substrate having a counter electrode. The counter electrode is fixed to the counter substrate. A fourth terminal electrically connected to the common electrode is provided on the active matrix substrate. This fourth terminal is used to set the common electrode to a fixed potential, such as GND or 0V. This is a terminal for

[0149] In addition, one embodiment of the present invention is not limited to the pixel configuration in FIG. 9 and may be a top view example different from that in FIG. In FIG. 11, no capacitance wiring is provided, and the pixel electrode layer is secured to the gate wiring of the adjacent pixels. In this example, a storage capacitor is formed by stacking a protective insulating film and a gate insulating layer. The third terminal connected to the wiring and the capacitance wiring can be omitted. 9. The same parts as those in FIG. 9 will be described using the same reference numerals.

[0150] In an active matrix type liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the pixel electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0151] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, resulting in image retention. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0152] In addition, the vertical period is increased by 1.5 or 2 times to improve the video characteristics. There is also a driving technology called double speed driving.

[0153] In addition, in order to improve the video characteristics of liquid crystal display devices, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. In addition, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched according to the timing of the optical modulation of the liquid crystal layer. The timing of the LEDs can also be synchronized. This is particularly useful when displaying images with a large proportion of black areas occupying the entire screen. This has the effect of reducing power consumption.

[0154] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the conventional method.

[0155] The n-channel transistor obtained in this embodiment has an IGZO semiconductor layer as a channel type. The combination of these drive technologies has good dynamic characteristics. can be done.

[0156] In addition, when a light-emitting display device is manufactured, one electrode (also called a cathode) of the organic light-emitting element is In order to set the low power supply potential, for example GND or 0V, the cathode is connected to the terminal. A fourth terminal is provided for setting the voltage level, for example, GND, 0V, etc. When manufacturing a device, a power supply line is provided in addition to a source line and a gate line. Therefore, the terminal section is provided with a fifth terminal that is electrically connected to the power supply line.

[0157] A source region or a drain region (oxygen-deficient oxide semiconductor layer containing In, Ga, and Zn) The gate electrode layer, the gate insulating layer, the semiconductor layer (oxygen peroxide containing In, Ga, and Zn) are not provided. In the case of a stacked structure of a gate electrode layer, a gate oxide semiconductor layer, a source electrode layer, and a drain electrode layer, The distance between the electrode layer and the source electrode layer or the drain electrode layer becomes short, and the parasitic capacitance between them increases. Furthermore, this increase in parasitic capacitance becomes more pronounced as the semiconductor layer becomes thinner. In this embodiment, a gate electrode layer, a gate insulating layer, and a gate insulating film are provided. The insulating layer, the semiconductor layer, the source region or drain region, the source electrode layer, and the drain electrode layer are Since the thin-film transistor has a laminated structure, the semiconductor layer can be thin without any loss of sensitivity. The raw volume can be reduced.

[0158] According to the present embodiment, a thin-film transistor having a small photocurrent, a small parasitic capacitance, and a high on-off ratio is obtained. Thus, a thin film transistor having good dynamic characteristics can be obtained. As a result, it is possible to provide a semiconductor device having a thin film transistor with excellent electrical characteristics and high reliability. can.

[0159] (Embodiment 7) Here, in the third embodiment, the source electrode layer or the drain electrode layer is in contact with the semiconductor layer. An example of a display device having a thin film transistor having the above structure is shown in FIGS.

[0160] FIG. 31(A) shows a semiconductor device in which a thin film transistor and a common connection part (pad part) are fabricated on the same substrate. 31A is a cross-sectional view of a semiconductor device. The inverted staggered thin film transistor has a channel protection layer. A channel protection layer 133 is provided on the formation region, and the semiconductor layer 103 and the channel protection layer 133 On the semiconductor layer 103, source and drain electrode layers 105a and 105b are provided. This is an example of a situation where

[0161] In the thin film transistor 171, the semiconductor layer 103 and the source electrode layer or the drain electrode layer 1 The contact areas with 05a and 105b are preferably modified by plasma treatment. In this embodiment mode, before a conductive film to be a source electrode layer or a drain electrode layer is formed, A plasma treatment is performed on the semiconductor layer (an IGZO semiconductor layer in this embodiment).

[0162] The plasma treatment uses argon gas, hydrogen gas, or a mixture of argon and hydrogen gas. The above gases may contain oxygen gas. Argon gas may also be replaced by other rare earth gas. A gas may also be used.

[0163] 32, an insulating layer 135 and an insulating layer 136 are formed on the semiconductor layer 103 as an interlayer insulating layer. The source and drain electrode layers 105a and 105b may be formed of an insulating material. The insulating layer 135 and the semiconductor layer 103 are in contact with each other through contact holes formed in the insulating layer 136. , electrically connect.

[0164] In FIG. 32, the gate insulating layer 102 and the channel protection layer 133 are silicon oxide layers. The semiconductor layer 103 is an IGZO oxygen-excess semiconductor layer, and the insulating layer 135 is a silicon nitride layer. Each is formed by sputtering.

[0165] In FIG. 32, the semiconductor It is preferable to perform plasma treatment on the semiconductor layer 103. This may be performed after forming the panel protection layer 133, or after contacting the insulating layers 135 and 136. After the contact hole is formed, the semiconductor layer 103 exposed at the bottom of the contact hole is subjected to plasma irradiation. Processing may also be performed.

[0166] A conductive layer is formed in contact with the semiconductor layer 103 modified by the plasma treatment, and a source electrode layer or By forming the drain electrode layers 105a and 105b, the semiconductor layer 103 and the source The contact resistance with the electrode layer or the drain electrode layer 105a, 105b can be reduced. do.

[0167] Through the above steps, a display device with high reliability as a semiconductor device can be manufactured.

[0168] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0169] (Embodiment 8) In this embodiment mode, in a display device which is an example of a semiconductor device of the present invention, The following is an example of manufacturing a thin film transistor arranged in at least a part of a driver circuit and a pixel portion. Explained below.

[0170] The thin film transistor disposed in the pixel portion is formed according to the sixth or seventh embodiment. The thin film transistor described in Embodiment 6 or 7 is an n-channel TFT. Therefore, some of the driver circuits can be configured with n-channel TFTs. The thin film transistors in the pixel portion are formed on the same substrate.

[0171] FIG. 1 is a block diagram of an active matrix liquid crystal display device, which is an example of a semiconductor device of the present invention. An example is shown in FIG. 13A. The display device shown in FIG. A pixel portion 5301 having a plurality of pixels, and a scanning line driver circuit 5302 for selecting each pixel. and a signal line driver circuit 5303 for controlling input of a video signal to a selected pixel.

[0172] The pixel portion 5301 includes a signal line driver circuit 5303 and a plurality of signal lines arranged in a column direction. The signal line driver circuit 5303 is connected to the signal line driver circuit 5303 by lines S1 to Sm (not shown). A plurality of scanning lines G1 to Gn (not shown) are arranged extending from 5302 in the row direction. The scanning line driver circuit 5302 is connected to the signal lines S1 to Sm and the scanning lines G1 to Gn. The image sensor has a plurality of pixels (not shown) arranged in a matrix. Signal line Sj (any one of signal lines S1 to Sm), scanning line Gi (any one of scanning lines G1 to Gn) Either one of them is connected.

[0173] The thin film transistor described in Embodiment 6 or 7 is an n-channel TFT. A signal line driver circuit configured with n-channel TFTs will be described with reference to FIG.

[0174] The signal line driver circuit shown in FIG. 02_M, a first wiring 5611, a second wiring 5612, a third wiring 5613 and a wiring 56 Each of the switch groups 5602_1 to 5602_M includes A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has a transistor 5603c.

[0175] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are a first wiring 5611, a second wiring 5612, a third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor For example, the wiring 5621 in the Jth column is connected to three signal lines via a resistor 5603c. _J (any one of the wirings 5621_1 to 5621_M) is a switch group 5602 The first thin film transistor 5603a, the second thin film transistor 5603b, and and the third thin film transistor 5603c, the signal line Sj-1, the signal line Sj, the signal line S j+1 is connected to

[0176] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0177] It is preferable that the driver IC 5601 is formed on a single crystal substrate. The switch group 5602_1 to 5602_M is formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_ It is recommended to connect to M via an FPC or similar.

[0178] Next, the operation of the signal line driver circuit shown in FIG. 14 will be described with reference to the timing chart of FIG. The timing chart in FIG. 15 is explained with reference to the timing chart in FIG. Further, during the selection period of the i-th scanning line Gi, is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, when a scanning line of another row is selected, the signal line driver circuit of FIG. In this case, the same operation as in FIG. 15 is performed.

[0179] In the timing chart of FIG. 15, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603b, and a third thin film transistor 560 When connected to signal line Sj-1, signal line Sj, and signal line Sj+1 via 3c It shows.

[0180] In the timing chart of FIG. 15, the timing when the i-th scanning line Gi is selected, The on / off timing 5703a of the first thin film transistor 5603a, The on / off timing 5703b of the third thin film transistor 56 The on / off timing of 03c is input to 5703c and the wiring 5621_J of the Jth row. 5 shows signal 5721_J.

[0181] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-1 and is input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj, and the line 5621 is connected to the line Sj during the third sub-selection period T3. The video signal input to the first sub-selection period is input to the signal line Sj+1. In the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-1, Data_j, and Data_j+ Let's say it's 1.

[0182] As shown in FIG. 15, in the first sub-selection period T1, the first thin film transistor 5603 a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c At this time, Data_j-1 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-1 via the transistor 5603a. Second sub-selection period T2 In this case, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a is turned on. and the third thin film transistor 5603c are turned off. At this time, the input The Data_j to be output is input to the signal line Sj via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first The first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the third thin film transistor 56 03c and input to the signal line Sj+1.

[0183] From the above, the signal line driver circuit in FIG. 14 can achieve the following by dividing one gate selection period into three. During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit of FIG. The number of connections between the substrate on which the pixel area is formed and the substrate on which the pixel area is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one third, the signal line driver circuit of FIG. This can improve productivity and yield.

[0184] As shown in FIG. 14, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each selection period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, the arrangement, number, driving method, etc. of the thin film transistors are not limited.

[0185] For example, three or more signal lines are connected to one wiring during each of three or more sub-selection periods. When a video signal is input to each of them, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or It is preferably divided into three sub-selection periods.

[0186] As another example, as shown in the timing chart of FIG. 16, one selection period is precharged. The first sub-selection period Tp, the first sub-selection period T1, the second sub-selection period T2, and the third sub-selection period T 3. Furthermore, in the timing chart of FIG. 16, the scanning line Gi of the i-th row is selected. the timing at which the first thin film transistor 5603a is turned on and off; 03a, the on / off timing 5803b of the second thin film transistor 5603b, The on / off timing 5803c of the thin film transistor 5603c and the wiring 5 16, the pre-channel 5821_J is connected to the pre-channel 621_J. During the transition period Tp, the first thin film transistor 5603a and the second thin film transistor 56 At this time, the wiring 5621_J and the third thin film transistor 5603b are turned on. The precharge voltage Vp input to the first thin film transistor 5603a and the second thin film transistor and the third thin film transistor 5603c are connected to the signal line S j-1, signal line Sj, and signal line Sj+1. The first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor At this time, the thin film transistor 5603c is turned off. ata_j-1 is input to the signal line Sj-1 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first The first thin film transistor 5603a and the third thin film transistor 5603c are turned off. At this time, Data_j input to the wiring 5621_J is input to the second thin film transistor 5603 In the third sub-selection period T3, the third thin-film transistor The first thin film transistor 5603a and the second thin film transistor 5603c are turned on. At this time, Data_j+1 input to the wiring 5621_J is , and is input to the signal line Sj+1 via the third thin film transistor 5603c.

[0187] From the above, the signal line driver circuit of FIG. 14 to which the timing chart of FIG. 16 is applied By providing a precharge selection period before the sub selection period, the signal lines can be precharged. This allows high-speed writing of video signals to the pixels. In this embodiment, the same reference numerals are used for the same parts as those in FIG. 15, and the same parts or similar functions are shown. A detailed description of the portion having the symbol will be omitted.

[0188] The configuration of the scanning line driver circuit will be described. The scanning line driver circuit includes a shift register, a buffer, and a In some cases, a level shifter may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP ) is input, the selection signal is generated. The generated selection signal is buffered The signal is buffered and amplified in the 10-bit signal line and then fed to the corresponding scan line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be capable of passing a large current. Used.

[0189] One form of a shift register used as a part of a scanning line driving circuit is shown in FIG. 17 and FIG. 18. He explains.

[0190] The circuit configuration of the shift register is shown in Figure 17. The shift register shown in Figure 17 has multiple free The first flip-flop is composed of flip-flops 5701_1 to 5701_n. The first clock signal, the second clock signal, the start pulse signal, and the reset signal are input. It works like this.

[0191] The connection relationship of the shift register in Fig. 17 will be described. The shift register in Fig. 17 has i-stage The first flip-flop 5701_i (flip-flops 5701_1 to 5701_n In either one of them, the first wiring 5501 shown in FIG. 18 is connected to the seventh wiring 5717_i-1. 18 is connected to the seventh wiring 5717_i+1. 18 is connected to the seventh wiring 5717_i, The sixth wiring 5506 is connected to the fifth wiring 5715 .

[0192] In addition, the fourth wiring 5504 shown in FIG. 18 corresponds to the second wiring in the odd-numbered flip-flops. 5712, and in the even-numbered flip-flops, it is connected to the third wiring 5713. The fifth wiring 5505 shown in FIG.

[0193] However, the first wiring 5501 shown in FIG. 18 of the first-stage flip-flop 5701_1 is 18 of the n-th flip-flop 5701_n. The second wiring 5502 is connected to the sixth wiring 5716 .

[0194] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the third power supply line. This may also be called the power line 2.

[0195] Next, the details of the flip-flop shown in FIG. 17 are shown in FIG. The flip-flop includes a first thin film transistor 5571, a second thin film transistor 5572, A third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor a sixth thin film transistor 5575, a seventh thin film transistor 5576, and and an eighth thin film transistor 5578. A second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor a fifth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, The seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel A transistor in which the gate-source voltage (Vgs) exceeds the threshold voltage (Vth). When this occurs, the device is in a conductive state.

[0196] Next, the connection configuration of the flip-flop shown in FIG. 18 will be described below.

[0197] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0198] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506. A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0199] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0200] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506. The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0201] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0202] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0203] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506. The second electrode of the eighth thin film transistor 5578 is connected to the gate of the second thin film transistor 5572. The gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550. Connected to 1.

[0204] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5543, a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0205] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 are referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be connected to a first power supply line, and the sixth wiring 5506 may be connected to a second power supply line. It may be called a line.

[0206] In addition, the signal line driver circuit and the scanning line driver circuit are formed by using only the n-channel TFT shown in the sixth embodiment. The n-channel TFT shown in the embodiment 6 can be manufactured by Since the mobility is large, it is possible to increase the driving frequency of the driving circuit. The n-channel TFT shown in form 6 is an oxygen-deficient oxide containing indium, gallium, and zinc. The parasitic capacitance is reduced by the source region or drain region, which is a semiconductor layer, so that the frequency For example, the n-channel TFT shown in the sixth embodiment has a high f-characteristic. The scanning line driver circuit can be operated at high speed, so the frame frequency can be increased. It is also possible to realize the insertion of a black screen.

[0207] Furthermore, the channel width of the transistor of the scanning line driving circuit is increased, and multiple scanning lines By arranging the drive circuit, it is possible to achieve even higher frame frequencies. When multiple scanning line driving circuits are arranged, a scanning line driving circuit for driving the even-numbered scanning lines is provided. The circuit is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the opposite side. By placing the pixel clock in the pixel clockwise direction, it is possible to realize a high frame frequency.

[0208] In addition, an active matrix type light emitting display device, which is an example of the semiconductor device of the present invention, is manufactured. In this case, since a plurality of thin film transistors are arranged in at least one pixel, the scanning line driving circuit It is preferable to arrange a plurality of the active matrix type light emitting display device. An example is shown in FIG.

[0209] The light-emitting display device shown in FIG. 13B has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401 for selecting each pixel, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. A driver circuit 5404 and a signal line driver circuit 5405 for controlling the input of a video signal to a selected pixel 403.

[0210] In the case where a video signal input to a pixel of the light-emitting display device shown in FIG. 13B is in a digital format, When a pixel is turned on, the transistor is switched on and off to make it either emitting light or not. Therefore, gray scale display can be performed using area gray scale or time gray scale. The stacked gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is independently driven based on a video signal. The time gray scale method is a driving method that displays gray scales by changing the time when the pixel emits light. This is a driving method that displays gradations by controlling the period during which the liquid crystal display is turned on.

[0211] Light-emitting elements have a higher response speed than liquid crystal elements, so they are more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, the light emitting element of the pixel is divided into sub-frame periods according to the video signal. By dividing the period into multiple subframes, The total length of time that pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0212] In the light-emitting display device shown in FIG. 13B, a switching TFT and a When two TFTs are arranged, the first TFT, which is the gate wiring of the switching TFT, The signal input to the scanning line is generated by the first scanning line driver circuit 5402, and the current control TFT A signal input to the second scanning line, which is the gate wiring of the second pixel, is generated by a second scanning line driver circuit 5404. The example shows a configuration in which a signal input to the first scanning line and a signal input to the second scanning line are The signals to be output may be generated by a single scanning line driving circuit. The operation of the switching element is controlled by the number of transistors that the switching element has. A plurality of first scan lines may be provided for each pixel. Alternatively, all of the signals input to the first scanning lines may be generated by a single scanning line driver circuit. Alternatively, the signals may be generated by a plurality of scanning line driving circuits.

[0213] In addition, in the light-emitting display device, the driver circuit may be configured with n-channel TFTs. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit may be the same as those shown in the n-channel MOSFETs in the embodiment 6 or 7. It is also possible to fabricate the device using only channel TFTs.

[0214] The above-mentioned driving circuit is not limited to liquid crystal display devices and light-emitting display devices, but may also be used in devices with switching elements and It may also be used in electronic paper, where electrically connected elements are used to drive electronic ink. Electronic paper is also called an electrophoretic display (electrophoretic display) and has the same properties as paper. The advantages are ease of reading, lower power consumption compared to other display devices, and the possibility of making them thin and lightweight. It has points.

[0215] Electrophoretic displays can take a variety of forms, but the first particle has a positive charge. A microcapsule containing a negatively charged second particle and a negatively charged second particle is immersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the capsule are moved in opposite directions to each other, and only the color of the particles that have gathered on one side is displayed. The first particles or the second particles contain a dye, and in the absence of an electric field, The first particles and the second particles are different in color (colorless). (including

[0216] Thus, electrophoretic displays operate in such a way that materials with high dielectric constants migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. Electrophoretic displays do not require polarizing plates or opposing substrates, which are necessary for display devices, and are half the thickness and weight. Reduce.

[0217] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0218] In addition, the above microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be achieved by applying an electric field to the cell. For example, in the sixth embodiment or the sixth embodiment, The active matrix substrate obtained by the thin film transistor of 7 can be used. .

[0219] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof. Just use it.

[0220] Through the above steps, a display device with high reliability as a semiconductor device can be manufactured.

[0221] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0222] (Embodiment 9) A thin film transistor according to one embodiment of the present invention is manufactured, and the thin film transistor is used in a pixel portion and further in a driving By using the semiconductor device in the operating circuit, a semiconductor device having a display function (also called a display device) can be manufactured. In addition, a part or the whole of a driver circuit may be formed using a thin film transistor according to one embodiment of the present invention. They can be integrally formed on the same substrate to form a system-on-panel.

[0223] The display device includes a display element. The display element may be a liquid crystal element (also called a liquid crystal display element), a light-emitting A light-emitting element (also called a light-emitting display element) can be used. A light-emitting element is a light-emitting element that emits light by applying a current or a voltage. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. These include organic EL elements, electronic inks, etc. A display medium whose contrast changes due to an electrical effect, such as a liquid crystal display, can also be used.

[0224] The display device includes a panel in which a display element is sealed, and a controller for the panel. and a module in which an IC or the like including the above-mentioned is mounted. Regarding the element substrate, which corresponds to one form before the display element is completed in the process of manufacturing a display device The element substrate includes a means for supplying a current to each of the plurality of pixels. Specifically, the substrate may be in a state where only pixel electrodes of the display element are formed, or the substrate may be in a state where only pixel electrodes of the display element are formed. After the conductive film that will become the electrode is formed, but before etching is performed to form the pixel electrode. It's fine to have one, and any form is acceptable.

[0225] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also refers to connectors, such as FPC (Flexible Printed Circuit). inted circuit) or TAB (Tape Automated Bon ding tape or TCP (Tape Carrier Package) is used. Modules with printed wiring boards attached to the ends of TAB tape or TCP or the display element is mounted with an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which a display circuit (or other circuit) is directly mounted.

[0226] In this embodiment mode, the appearance and cross section of a liquid crystal display panel, which is one embodiment of a semiconductor device of the present invention, will be described. The surface will be described with reference to FIG. 21. FIG. 21(A1) and (A2) show the first substrate 4001. The thin film transistors 4010 and 4011 and the liquid crystal element 4013 formed on the first substrate are 2. This is a top view of a panel sealed between a substrate 4006 and the panel by a sealant 4005. 1(B) corresponds to a cross-sectional view taken along line MN in FIGS. 21(A1) and 21(A2).

[0227] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this manner, a sealant 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealant 4005, and a second substrate 4006. The liquid crystal layer 4008 is sealed together with the first substrate 4001. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0228] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, A wire bonding method, a TAB method, or the like can be used. FIG. 21A shows an example of mounting a signal line driver circuit 4003 by the COG method. This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0229] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In FIG. 21B, the thin film transistor included in the pixel portion 4002 is A transistor 4010 and a thin film transistor 4011 included in a scanning line driver circuit 4004 Insulating layers 4020 and 4021 are formed on the thin film transistors 4010 and 4011. 1 is provided.

[0230] The thin film transistors 4010 and 4011 each have an oxygen-excess oxide semiconductor as a channel formation region. and a highly reliable semiconductor device including an oxygen-deficient oxide semiconductor layer as a source region and a drain region. In addition, the thin film transistor shown in Embodiment 7 can be used. In this embodiment, the thin film transistor 401 may be used. 0, 4011 are n-channel thin film transistors.

[0231] In addition, a pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. A pixel electrode layer 4030, a counter electrode layer 4031, and a liquid crystal layer 4008 are formed on the liquid crystal layer 4006. The overlapping portion corresponds to a liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0232] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Alternatively, you can use aluminum foil with a PVF film or polyester film. A sheet having a structure sandwiched between films can also be used.

[0233] Also, 4035 is a columnar spacer obtained by selectively etching the insulating film. In order to control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion shown in any one of the first to third embodiments is disposed between a pair of substrates. The counter electrode layer 4031 and the common potential line are electrically connected via the conductive particles. The conductive particles are contained in the sealing material 4005 .

[0234] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 10 μs to It is short at 100μs, has optical isotropy so no alignment treatment is required, and has small viewing angle dependency. stomach.

[0235] Although this embodiment is an example of a transmissive liquid crystal display device, one embodiment of the present invention is a reflective liquid crystal display device. The present invention can be applied to both liquid crystal display devices and semi-transmissive liquid crystal display devices.

[0236] In the liquid crystal display device of the present embodiment, a polarizing plate is provided on the outer side (the viewing side) of the substrate, and In this example, the color layer and the electrode layer used for the display element are provided in that order, but the polarizing plate is provided on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment. The color layer may be appropriately selected depending on the material and manufacturing process conditions of the color layer. A light-shielding film that functions as a light-shielding film may be provided.

[0237] In this embodiment, in order to reduce the surface unevenness of the thin film transistor, In order to improve the reliability of the transistor, the thin film transistor obtained in the sixth embodiment is provided with a protective film or The insulating layer 4020 and the insulating layer 4021 function as a planarizing insulating film. The protective film is designed to prevent contamination by organic matter, metals, water vapor, and other contaminants suspended in the air. The protective film is formed by sputtering. Silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum oxide film, nitride A single layer or multilayer of an aluminum film, an aluminum oxynitride film, or an aluminum nitride oxide film. In this embodiment, an example in which the protective film is formed by sputtering is shown. There is no limitation and various methods may be used for forming the insulating layer.

[0238] Here, an insulating layer 4020 having a laminated structure is formed as a protective film. A silicon oxide film is formed by sputtering as the first layer of the 0. Silicon oxide film as a protective film By using the above, it is possible to prevent hillocks in the aluminum film used as the source electrode layer and the drain electrode layer. It is effective in stopping.

[0239] In addition, an insulating layer is formed as the second layer of the protective film. The second layer is a silicon nitride film formed by sputtering. When the TFT is turned on, mobile ions such as sodium penetrate into the semiconductor region and change the electrical properties of the TFT. This can prevent the problem from occurring.

[0240] After forming the protective film, the IGZO semiconductor layer is annealed (300°C to 400°C). It is also possible.

[0241] In addition, an insulating layer 4021 is formed as a planarization insulating film. Heat resistance of amide, acrylic, polyimide, benzocyclobutene, polyamide, epoxy, etc. In addition to the above organic materials, low dielectric constant materials (lo wk materials), siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass) Siloxane-based resins can have hydrogen as a substituent, as well as fluorine, alkyl, etc. In addition, these materials may have at least one of a cyclic group, a cyclic group, or an aryl group. The insulating layer 4021 may be formed by stacking a plurality of insulating films.

[0242] Siloxane-based resin is a type of Si-OS formed using siloxane-based materials as starting materials. Siloxane-based resins contain hydrogen, fluorine, alkyl, and aryl groups as substituents. The alkyl group may have at least one of a cyclic group, a cyclic group, or an aromatic hydrocarbon.

[0243] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife When the insulating layer 4021 is formed using a material liquid, The IGZO semiconductor layer can be annealed (at 300°C to 400°C) at the same time as the annealing process. The firing process of the insulating layer 4021 and the annealing process of the IGZO semiconductor layer are combined to efficiently It becomes possible to manufacture a semiconductor device.

[0244] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material may be used.

[0245] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer. The conductive composition may be used to form the conductive film. The pixel electrode thus fabricated has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity be 0.1 Ω·cm or less.

[0246] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0247] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials are applied to 002 via FPC4018.

[0248] In this embodiment, the connection terminal electrode 4015 is connected to the pixel electrode layer 40 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the same conductive film as the thin film transistors 4010 and 30. The source electrode layer and the drain electrode layer 11 are formed of the same conductive film.

[0249] The connection terminal electrode 4015 is connected to a terminal of the FPC 4018 via an anisotropic conductive film 4019. The electrodes are electrically connected to each other.

[0250] In FIG. 21, a signal line driver circuit 4003 is formed separately and mounted on a first substrate 4001. However, the present embodiment is not limited to this configuration. Alternatively, a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. Alternatively, the circuit board may be formed separately and mounted.

[0251] FIG. 22 shows a liquid crystal display device as a semiconductor device using a TFT substrate 2600 produced by applying the present invention. 1 shows an example of a liquid crystal display module.

[0252] FIG. 22 shows an example of a liquid crystal display module, in which a TFT substrate 2600 and an opposing substrate 2601 are connected. The substrate 2602 is fixed to the substrate 2601 by a bonding material 2602, and a pixel portion 2603 including a TFT and the like and a liquid crystal layer are disposed between the substrate 2601 and the substrate 2602. A display element 2604 and a colored layer 2605 are provided to form a display area. is necessary for color display, and in the case of the RGB method, it corresponds to each color of red, green, and blue. A colored layer is provided corresponding to each pixel. On the outside, a polarizing plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are arranged. It is composed of a cathode ray tube 2610 and a reflector 2611, and a circuit board 2612 is a flexible wiring board. A wiring board 2609 is connected to the wiring circuit section 2608 of the TFT board 2600, and the controller The LCD has external circuits such as a filter circuit and a power supply circuit. The layers may be laminated with a retardation plate interposed therebetween.

[0253] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment), ASM(Axially Symmetric aligned Mic) ro-cell) mode, OCB(Optical Compensated Bire) fringence mode, FLC (Ferroelectric Liquid C rystal) mode, AFLC (AntiFerroelectric Liquid Crystal) can be used.

[0254] By the above steps, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. do.

[0255] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0256] (Embodiment 10) In this embodiment, an example of electronic paper will be described as a semiconductor device according to one embodiment of the present invention.

[0257] FIG. 12 shows an active matrix type electronic paper as an example of a semiconductor device to which the present invention is applied. As the thin film transistor 581 used in the semiconductor device, The channel formation region is an oxygen-excess oxide semiconductor layer. and a highly reliable semiconductor device including an oxygen-deficient oxide semiconductor layer as a source region and a drain region. The thin film transistor shown in the seventh embodiment is also a thin film transistor of this embodiment. It can also be used as the transistor 581 .

[0258] The electronic paper in FIG. 12 is an example of a display device that uses the twisting ball display method. The spherical display method is an electrode layer that uses spherical particles painted in black and white as display elements. A potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying information by controlling the orientation of spherical particles caused by the generation of light.

[0259] The thin film transistor 581 sealed between the substrate 580 and the substrate 596 has a bottom gate structure. The first electrode layer 58 is a thin film transistor having a source electrode layer or a drain electrode layer. 7 through an opening formed in the insulating layer 585 and electrically connected thereto. Between the second electrode layer 587 and the second electrode layer 588 are black areas 590a and white areas 590b. A spherical particle 589 is provided that includes a cavity 594 therein that is filled with a liquid, The periphery of the shaped particle 589 is filled with a filler 595 such as a resin (see FIG. 12). In this embodiment, the first electrode layer 587 corresponds to a pixel electrode, and the second electrode layer 588 corresponds to a common The second electrode layer 588 is provided over the same substrate as the thin film transistor 581. The common potential line shown in any one of the first to third embodiments is electrically connected to the common potential line. The second electrode layer 588 and the common electrode layer 589 are connected to each other through conductive particles disposed between the pair of substrates by using a part. The position wires are electrically connected.

[0260] Also, instead of the twist ball, an electrophoretic element can be used. and a 10μm to 20μm diameter nanoparticle that contains positively charged white nanoparticles and negatively charged black nanoparticles. Microcapsules with a diameter of about 0 μm are used. When an electric field is applied to the microcapsules by the first and second electrode layers, the microcapsules emit white light. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is the electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display, the image that was displayed can be retained. Therefore, a semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0261] Through the above steps, electronic paper having high reliability as a semiconductor device can be manufactured. .

[0262] This embodiment relates to a configuration of the common connection portion described in any one of the first to fifth embodiments. It is possible to carry out the above in combination as appropriate.

[0263] (Embodiment 11) In this embodiment, an example of a light-emitting display device will be described as a semiconductor device according to one embodiment of the present invention. As the display element of the device, a light-emitting element using electroluminescence is used here. The light-emitting element that utilizes electroluminescence uses an organic compound as the light-emitting material. Generally, the former are organic EL elements and the latter are inorganic compounds. These are called inorganic EL elements.

[0264] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0265] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0266] FIG. 19 shows a display device to which digital time gray scale driving can be applied as an example of a semiconductor device to which the present invention is applied. FIG. 2 is a diagram illustrating an example of an element configuration.

[0267] The configuration of a pixel to which digital time gray scale driving can be applied and the operation of the pixel will be described. The present invention is an n-channel transistor that uses an oxide semiconductor layer (IGZO semiconductor layer) in the channel formation region. An example in which two transistors are used in one pixel is shown.

[0268] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, The switching transistor 64 has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate, and the connection portion is used as a common connection portion, The structure shown in FIG. 1(A), FIG. 2(A), or FIG. 3(A) may be used.

[0269] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. Note that the low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. In order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or higher than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0270] The capacitor 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. It is also possible to set the gate capacitance of the driving transistor 6402 as follows: A capacitance may be formed between the gate electrode and the second electrode.

[0271] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is The driving transistor 6402 is in two states, either fully on or fully off. A video signal is inputted, that is, the driving transistor 6402 is operated in a linear region. In order to operate the driving transistor 6402 in a linear region, the voltage of the power supply line 6407 must be higher than that of the driving transistor 6402. A high voltage is applied to the gate of the driving transistor 6402. A voltage equal to or higher than (power supply line voltage + Vth of the driving transistor 6402) is applied.

[0272] In addition, when analog gray scale driving is performed instead of digital time gray scale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 19 can be used.

[0273] In the case of performing analog gradation driving, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or higher than the forward voltage of the light emitting element 6401 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and should be at least 100% forward voltage. In addition, the video transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The gate potential of the light emitting element 6402 is set higher than that of the gate of the transistor 6403. Analog gradation drive can be performed by passing a current corresponding to a video signal through 6404.

[0274] Note that the pixel configuration shown in FIG. 19 is not limited to this. For example, A switch, a resistive element, a capacitive element, a transistor, a logic circuit, or the like may be added.

[0275] Next, the configuration of the light-emitting element will be described with reference to FIG. The cross-sectional structure of a pixel will be described using the example of the type shown in Figures 20(A), (B), and (C). The driving TFTs used in the semiconductor device, TFTs 7001, 7011, and 7021, are The thin film transistor can be fabricated in the same manner as in the sixth embodiment. The semiconductor device includes an oxide semiconductor layer, and an oxygen-deficient oxide semiconductor layer as a source region and a drain region. In addition, the thin film transistor described in the embodiment 7 is a highly reliable thin film transistor. It can also be applied as TFT7001, 7011, and 7021.

[0276] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. Top emission, bottom emission, and side emission. There is a light-emitting element having a dual-side emission structure in which light is emitted from the side of the substrate. The present invention can be applied to any light emitting element with any emission structure.

[0277] A light emitting element having a top emission structure will be described with reference to FIG.

[0278] In FIG. 20A, a TFT 7001 which is a driving TFT is an n-type TFT, and a light emitting element 7002 emits light. FIG. 20(A) shows a cross-sectional view of a pixel when the light incident on the pixel exits the anode 7005 side. A cathode 7003 of a light emitting element 7002 and a TFT 7001 which is a driving TFT are electrically connected. A light-emitting layer 7004 and an anode 7005 are laminated in this order on a cathode 7003. 7003 uses various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are preferable. The light-emitting layer 7004 may be composed of a single layer or a plurality of layers may be laminated. When the cathode 7003 is composed of multiple layers, the electron injection layer 7004 is disposed on the cathode 7003. The layers are laminated in this order: an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer. It is not necessary to provide all of the anodes. The anode 7005 is made of a conductive material that transmits light. For example, indium oxide containing tungsten oxide, indium oxide containing tungsten oxide Indium zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide Oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, oxide A light-transmitting conductive film such as indium tin oxide doped with indium may be used.

[0279] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 constitutes the light-emitting element 7002. In the case of the pixel shown in FIG. 20(A), the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as indicated by the mark.

[0280] Next, a light emitting element having a bottom emission structure will be described with reference to FIG. When 011 is an n-type light emitting element and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, FIG. 20B shows a cross-sectional view of a pixel. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive film 7017. A light-emitting layer 7014 and an anode 7015 are laminated in this order on the cathode 7013. When the anode 15 has a light-transmitting property, a shielding layer for reflecting or blocking light is provided so as to cover the anode. The cathode 7013 may have a film 7016 formed thereon, as in the case of FIG. Various conductive materials with small thermal coefficients can be used. However, the thickness of the material should be The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, a 20 nm film An aluminum film having a thickness of 700 nm can be used as the cathode 7013. 014 may be composed of a single layer, as in FIG. 20(A), or may be composed of multiple layers. The anode 7015 does not need to transmit light, but as shown in FIG. As in the case of 20(A), the insulating film 20 can be formed using a conductive material having light-transmitting properties. The shielding film 7016 may be made of, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0281] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 20B, the light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0282] Next, a light emitting element having a dual emission structure will be described with reference to FIG. On a conductive film 7027 having a light-transmitting property and electrically connected to a driving TFT 7021, A cathode 7023 of the light-emitting element 7022 is formed, and a light-emitting layer 7024 is formed on the cathode 7023. The anode 7025 is laminated in order. The cathode 7023 is, as in the case of FIG. Various conductive materials with small thermal coefficients can be used. However, the thickness of the material should be For example, the cathode 7023 is made of Al having a thickness of 20 nm. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 70 may be configured as a single layer or as a laminate of multiple layers. 25 is formed using a conductive material having a light transmitting property, similar to FIG. It is possible.

[0283] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 constitutes the light-emitting element 70. In the case of the pixel shown in FIG. 20C, the light emitted from the light emitting element 7022 is is emitted toward both the anode 7025 side and the cathode 7023 side as indicated by the arrows.

[0284] Although the organic EL element has been described as the light-emitting element here, inorganic EL elements can also be used as the light-emitting element. It is also possible to provide an L element.

[0285] In this embodiment, a thin film transistor (driving TFT) that controls driving of a light emitting element is Although an example in which the light-emitting element is electrically connected has been shown, the current between the driving TFT and the light-emitting element is A control TFT may be connected.

[0286] Note that the semiconductor device described in this embodiment mode is not limited to the configuration shown in FIG. Various modifications based on the technical concept of the present invention are possible.

[0287] Next, a light-emitting display panel (also called a light-emitting panel) which is one embodiment of the semiconductor device of the present invention will be described. The appearance and cross section will be described with reference to FIG. 23. FIG. 23 shows a semiconductor device formed on a first substrate. A panel in which the thin film transistor and the light emitting element are sealed between the second substrate and the panel by a sealant. 23(B) is a top view of the device, and FIG. 23(B) is a cross-sectional view taken along line HI in FIG. 23(A).

[0288] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. A sealant 4505 is formed to surround the gate driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealant 4505, and a second substrate 4506. The filling material 4507 is sealed with the sealing material 4507. Highly sealed protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the package in a material such as a film or a cover material.

[0289] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b each have a plurality of thin film transistors. In FIG. 23B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45, a thin film transistor 4509 included in a line driver circuit 4503a is illustrated.

[0290] The thin film transistors 4509 and 4510 each have an oxygen-excess oxide semiconductor as a channel formation region. and a highly reliable semiconductor device including an oxygen-deficient oxide semiconductor layer as a source region and a drain region. In addition, the thin film transistor shown in Embodiment 7 can be used. In this embodiment, the thin film transistor 450 9 and 4510 are n-channel thin film transistors.

[0291] In addition, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 is The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light-emitting element 4511 is configured as a first electrode layer 4517, an electroluminescent layer The first electrode layer 4512 and the second electrode layer 4513 are stacked in a stacked structure. The light emitting element 4511 is not rotated in accordance with the direction of the light to be extracted from the light emitting element 4511. The configuration can be changed as appropriate.

[0292] The partition 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable that the inclined surface is formed so as to have a continuous curvature.

[0293] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers may be laminated. It doesn't matter whether it is done or not.

[0294] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511, the second electrode layer A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be a silicon nitride film, A silicon oxynitride film, DLC film, etc. can be formed.

[0295] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are It is supplied by b.

[0296] In this embodiment, the connection terminal electrode 4515 is connected to the first electrode layer 4 of the light emitting element 4511. The terminal electrode 4516 is formed from the same conductive film as the thin film transistors 4509 and 517. The source electrode layer and the drain electrode layer 510 are formed from the same conductive film.

[0297] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. The electrodes are electrically connected to each other.

[0298] The second substrate 4506 located in the direction in which light is extracted from the light emitting element 4511 must be transparent. In this case, a glass plate, a plastic plate, a polyester film or A light-transmitting material such as an acrylic film is used.

[0299] In addition, filler 4507 can be inert gas such as nitrogen or argon, or ultraviolet-curing resin. It can be made of oil or thermosetting resin, and can be made of PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. In this embodiment, nitrogen is used as the filler. was used.

[0300] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0301] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Also, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted. In this embodiment, the structure shown in FIG. Not limited.

[0302] By the above steps, a highly reliable light-emitting display device (display panel) can be manufactured as a semiconductor device. It is possible.

[0303] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0304] (Embodiment 12) The semiconductor device according to one embodiment of the present invention can be used as electronic paper. The display can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, and vehicles such as trains. The present invention can be applied to in-car advertising, displays on various cards such as credit cards, etc. An example of the electronic device is shown in FIG. 24 and FIG.

[0305] FIG. 24(A) shows a poster 2631 made of electronic paper. In the case of printed matter, the advertisements are exchanged manually, but in the case of electronic matter to which the present invention is applied, By using paper, you can change the display of your advertisement in a short time. Also, the display will not collapse. The poster can also be configured to transmit and receive information wirelessly. good.

[0306] FIG. 24B shows an advertisement 2632 on a train or other vehicle. In the case of paper printouts, the advertisements are exchanged manually, but in the case of electronic By using child paper, it is possible to change the display of advertisements in a short time without a lot of manpower. In addition, the display is stable and the image does not collapse. It may be configured to be capable of transmitting and receiving.

[0307] FIG. 25 also shows an example of an electronic book 2700. For example, the electronic book 2700 is The device is made up of two housings, a housing 2701 and a housing 2703. The body 2703 is integrated with a shaft portion 2711, and the opening and closing movement is performed around the shaft portion 2711. This configuration allows the device to operate like a paper book. It becomes.

[0308] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a text is displayed on the right display (display 2705 in FIG. 25) and An image can be displayed on the display unit 2707 in FIG.

[0309] FIG. 25 shows an example in which the housing 2701 is provided with an operation unit. 701, a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The configuration may include a touch panel, a touch screen, a pointing device, etc. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables such as a cable, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have a function as an electronic dictionary. This is also fine.

[0310] The electronic book 2700 may be configured to transmit and receive information wirelessly. The desired book data can be purchased and downloaded from the electronic book server. is also possible.

[0311] (Embodiment 13) The semiconductor device according to the present invention can be applied to various electronic devices (including gaming machines). The electronic device may be, for example, a television device (television or television receiver) (also called "computer monitors"), digital cameras, digital video cameras, digital digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable games Examples of such devices include machines, portable information terminals, audio playback devices, and large game machines such as pachinko machines.

[0312] FIG. 26A shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In addition, the stand 9605 supports the housing 9601. This shows a configuration in which the above is supported.

[0313] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the display 9603 shows In addition, the remote control unit 9610 can control the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0314] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0315] FIG. 26B shows an example of a digital photo frame 9700. The photo frame 9700 includes a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example images captured by a digital camera. By displaying the image data, it can function like a normal photo frame.

[0316] The Digital Photo Frame 9700 is equipped with an operation unit, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section, etc. These components may be installed on the same surface as the display unit, but they may be installed on the side or back. It is preferable to have a digital photo frame with a built-in memory card because it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section to store the image data. The captured image data can be displayed on the display portion 9703 .

[0317] The digital photo frame 9700 may also be configured to transmit and receive information wirelessly. It is also possible to wirelessly import and display desired image data.

[0318] FIG. 27(A) shows a portable gaming machine, which is composed of two housings, a housing 9881 and a housing 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in FIG. 27(A) also includes a speaker unit 9884 and a recording medium insertion unit 988. 6, LED lamp 9890, input means (operation keys 9885, connection terminals 9887, sensors 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration 9889) equipped with a microphone, etc. Of course, the configuration of the portable gaming machine is not limited to the above, and at least the present invention is It is sufficient that the device is provided with the semiconductor device, and other auxiliary equipment is provided as appropriate. The portable game machine shown in FIG. 27(A) can be used to play a game using a program recorded on a recording medium. It has the function of reading the program or data and displaying it on the display unit, and wirelessly communicating with other portable gaming machines. The portable gaming machine shown in FIG. 27(A) has the following functions: The function is not limited to this and may have various functions.

[0319] FIG. 27(B) shows an example of a slot machine 9900, which is a large-scale gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. The Machine 9900 also includes other operating means such as a start lever and stop switch, coin The slot machine 9900 is equipped with a slot slot, a speaker, etc. However, the present invention is not limited to the above, and may be configured to include at least the semiconductor device according to the present invention. Other auxiliary equipment may be provided as appropriate.

[0320] FIG. 28 shows an example of a mobile phone 1000. The mobile phone 1000 has a housing 100 In addition to the display unit 1002 incorporated in the device 1, the device 1002 also includes an operation button 1003, an external connection port 1004, It is equipped with a speaker 1005, a microphone 1006, etc.

[0321] The mobile phone 1000 shown in FIG. 28 allows users to input information by touching the display unit 1002 with a finger or the like. In addition, operations such as making a phone call or typing an e-mail can be performed by the display unit 100. This can be done by touching 2 with a finger or other object.

[0322] The screen of the display unit 1002 has three main modes. The first is a display mode that is mainly used for displaying images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.

[0323] For example, when making a call or composing an e-mail, the display unit 1002 is used for inputting characters. The main character input mode is to input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. I wish.

[0324] In addition, a sensor for detecting tilt, such as a gyro or an acceleration sensor, is installed inside the mobile phone 1000. By providing a detection device having the above configuration, the orientation of the mobile phone 1000 (portrait or landscape) can be determined and the display The screen display of the display unit 1002 can be automatically switched.

[0325] The screen mode can be changed by touching the display unit 1002 or by operating the housing 1001. This is done by operating the button 1003. Also, depending on the type of image displayed on the display unit 1002, For example, the image signal to be displayed on the display unit is a moving image. If it is data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.

[0326] In the input mode, the optical sensor of the display unit 1002 detects a signal and displays If there is no input by touch operation of the part 1002 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0327] The display unit 1002 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to image finger veins, palm veins, etc.

Claims

[Claim 1] a pixel section in which scanning lines and signal lines intersect and pixel electrode layers are arranged in a matrix; a thin film transistor including: a gate electrode layer provided corresponding to the pixel electrode layer and connected to the scanning line; a gate insulating layer covering the gate electrode layer; a first oxide semiconductor layer serving as a channel formation region; a channel protection layer covering the first oxide semiconductor layer overlapping with the gate electrode layer; a second oxide semiconductor layer serving as a source region and a drain region on the first oxide semiconductor layer and the channel protection layer; and a source electrode layer and a drain electrode layer on the first oxide semiconductor layer, the channel protection layer, and the second oxide semiconductor layer; a conductive layer formed of the same layer as the source electrode layer and the drain electrode layer is formed on an insulating layer formed of the same layer as the gate insulating layer in an outer region of the pixel portion, and a pad portion electrically connected to a common electrode layer facing the pixel electrode layer through an opening in an interlayer insulating layer provided on the conductive layer, The first oxide semiconductor layer has a higher oxygen concentration than the second oxide semiconductor layer.

Images