Method for manufacturing laminate substrate

Abstract

To provide a technique which can suppress damages on a semiconductor chip.SOLUTION: The method for manufacturing a laminate substrate includes the following processing. There is prepared a laminate substrate including a first device layer, a first semiconductor substrate, a joint layer, and a second semiconductor substrate in that order, the first semiconductor substrate being thinner than the second semiconductor substrate. The first device layer of the laminate substrate is joined to a second device layer formed in a third semiconductor substrate face-to-face. A laser beam which passes through the second semiconductor substrate is radiated to the joint layer and the second semiconductor substrate and the first semiconductor substrate are removed.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a method for manufacturing a laminated substrate. [Background technology]

[0002] Patent Documents 1 and 2 describe methods for manufacturing an SOI substrate. The manufacturing method described in Patent Document 1 includes the following steps (a) to (f): (a) forming a buried oxide layer at a predetermined depth in a first wafer, and then forming an oxide film on the first wafer. (b) forming a hydrogen buried layer in the first wafer at a depth deeper than the buried oxide layer. (c) bonding a second wafer onto the oxide film. (d) removing the first wafer below the hydrogen buried layer so that the first wafer between the buried oxide layer and the hydrogen buried layer is exposed. (e) sequentially removing the first wafer and the buried oxide layer exposed in (d) so that the first wafer between the buried oxide layer and the oxide layer is exposed. (f) removing a predetermined thickness of the first wafer exposed in (e).

[0003] The manufacturing method described in Patent Document 2 involves preparing a silicon substrate for forming an active layer made of silicon single crystal, and forming a buried insulating layer on the surface of the silicon substrate. Then, hydrogen ions are implanted through the buried insulating layer to form an ion-implanted layer for peeling, and Ar ions or the like are implanted between the ion-implanted layer and the buried insulating layer to form an amorphous layer. Then, the silicon substrate and the support substrate are bonded together through the buried insulating layer. After that, a heat treatment is performed to peel off a part of the silicon substrate at the location of the ion-implanted layer by the smart cut method to form an active layer, and further heat treatment is performed to polycrystallize the amorphous layer to form a polycrystalline silicon layer that functions as a gettering site. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2006-173568 [Patent Document 2] Japanese Patent Application Publication No. 2009-218381 Summary of the Invention [Problem to be solved by the invention]

[0005] One aspect of the present disclosure provides a technique for suppressing damage to a semiconductor chip. [Means for solving the problem]

[0006] A method for manufacturing a laminated substrate according to one embodiment of the present disclosure includes the following steps: preparing a laminated substrate having a first device layer, a first semiconductor substrate, a bonding layer, and a second semiconductor substrate in this order, the first semiconductor substrate being thinner than the second semiconductor substrate; bonding the first device layer of the laminated substrate to a second device layer formed on a third semiconductor substrate while facing each other; irradiating the bonding layer with a laser beam that transmits through the second semiconductor substrate, and peeling off the second semiconductor substrate and the first semiconductor substrate. Effect of the Invention

[0007] According to one aspect of the present disclosure, damage to a semiconductor chip can be suppressed. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a flowchart showing a method for manufacturing a laminated substrate according to an embodiment. [Diagram 2] FIG. 2A is a cross-sectional view showing an example of S102, FIG. 2B is a cross-sectional view showing an example of S103, and FIG. 2C is a cross-sectional view showing an example of S103 following FIG. 2B. [Diagram 3] FIG. 3 is a flowchart showing a first example of the process following FIG. [Figure 4]FIG. 4(A) is a cross-sectional view showing an example of S201, FIG. 4(B) is a cross-sectional view showing an example of S202, FIG. 4(C) is a cross-sectional view showing an example of S203, FIG. 4(D) is a cross-sectional view showing an example of S203 following FIG. 4(C), and FIG. 4(E) is a cross-sectional view showing an example of S204. [Diagram 5] FIG. 5 is a flowchart showing a second example of the process following FIG. [Figure 6] FIG. 6(A) is a cross-sectional view showing an example of S301, FIG. 6(B) is a cross-sectional view showing an example of S302, FIG. 6(C) is a cross-sectional view showing an example of S303, FIG. 6(D) is a cross-sectional view showing an example of S303 following FIG. 6(C), and FIG. 6(E) is a cross-sectional view showing an example of S304. [Figure 7] FIG. 7 is a flowchart showing a third example of the process following FIG. [Figure 8] FIG. 8(A) is a cross-sectional view showing an example of S401, FIG. 8(B) is a cross-sectional view showing an example of S402, FIG. 8(C) is a cross-sectional view showing an example of S403, FIG. 8(D) is a cross-sectional view showing an example of S403 following FIG. 8(C), and FIG. 8(E) is a cross-sectional view showing an example of S404. [Figure 9] FIG. 9 is a flowchart showing an example of the process following FIG. [Figure 10] FIG. 10(A) is a cross-sectional view showing an example of a laminated substrate prepared before S501, FIG. 10(B) is a cross-sectional view showing an example of S501, and FIG. 10(C) is a cross-sectional view showing an example of S502. [Figure 11] FIG. 11(A) is a cross-sectional view showing an example of S503, FIG. 11(B) is a cross-sectional view showing an example of S504, and FIG. 11(C) is a cross-sectional view showing an example of S504 following FIG. 11(B). [Figure 12] FIG. 12 is a plan view showing a substrate processing apparatus according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In each drawing, the same or corresponding configurations are denoted by the same reference numerals, and the description may be omitted. In this specification, the X-axis direction, the Y-axis direction, and the Z-axis direction are perpendicular to each other. The X-axis direction and the Y-axis direction are horizontal directions, and the Z-axis direction is vertical.

[0010] A method for manufacturing a laminated substrate according to one embodiment will be described with reference to Fig. 1 and Fig. 2. The method for manufacturing a laminated substrate includes, for example, steps S101 to S107 as shown in Fig. 1. Note that the method for manufacturing a laminated substrate only needs to include at least steps S101 to S103. The order of steps S104 to S107 is not limited to that shown in Fig. 1, and for example, S106 may be performed after S107.

[0011] Step S101 includes forming a bonding layer 11 on the surface of the first semiconductor substrate 10. The bonding layer 11 includes an oxide layer 11a. The oxide layer 11a is a thermally oxidized layer formed by, for example, a thermal oxidation method. In the thermal oxidation method, the surface of the heated first semiconductor substrate 10 is exposed to oxygen or water vapor, so that the oxide layer 11a grows from the surface of the first semiconductor substrate 10 toward the inside. According to the thermal oxidation method, a denser oxide layer 11a and an oxide layer 11a with excellent insulating properties can be obtained, compared to a CVD method described later. The thickness of the oxide layer 11a is set so that a laser lift-off described later can be easily performed.

[0012] The first semiconductor substrate 10 is, for example, a silicon wafer, and the oxide layer 11a is, for example, a silicon oxide layer. The first semiconductor substrate 10 is not limited to a silicon wafer, and may be a compound semiconductor wafer or the like. The oxide layer 11a may be formed by a CVD (Chemical Vapor Deposition) method or an ALD (Atomic Layer Deposition) method or the like.

[0013] 2A, step S102 includes bonding the first semiconductor substrate 10 and the second semiconductor substrate 20 via the bonding layer 11. No oxide layer or the like is formed on the surface of the second semiconductor substrate 20, and the second semiconductor substrate 20 and the oxide layer 11a of the bonding layer 11 are in direct contact with each other. The second semiconductor substrate 20 is, for example, a silicon wafer. A laminated substrate T including the first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20 is obtained.

[0014] Before bonding the first semiconductor substrate 10 and the second semiconductor substrate 20, the surface of the second semiconductor substrate 20 and the surface of the oxide layer 11a of the bonding layer 11 may be activated by plasma or the like, and may be further hydrophilized by supplying water or water vapor. Hydrogen bonds are generated between OH groups during bonding. Covalent bonds may also be generated by a dehydration condensation reaction of hydrogen bonds. Since solids are directly bonded together without using a liquid adhesive, it is possible to prevent misalignment due to deformation of the adhesive, etc. Furthermore, it is possible to prevent tilting due to uneven thickness of the adhesive, etc.

[0015] Step S103 includes thinning the first semiconductor substrate 10. First, as shown in Fig. 2(B), a modified layer 15 is formed by a laser beam LB on a first planned dividing surface 12 along which the first semiconductor substrate 10 is to be divided in the thickness direction. At this time, a modified layer 15 may also be formed by a laser beam LB on a ring-shaped second planned dividing surface 13 set on the periphery of the first planned dividing surface 12.

[0016] The laser beam LB is irradiated, for example, from the surface of the first semiconductor substrate 10 opposite to the second semiconductor substrate 20 into the inside of the first semiconductor substrate 10. The modified layers 15 are formed in dots, and a plurality of modified layers 15 are formed on the first planned dividing surface 12 and the second planned dividing surface 13. The forming position of the modified layer 15 is moved using a galvano scanner or an XYθ stage. When the modified layers 15 are formed, cracks connecting the modified layers 15 to each other are also formed.

[0017] 2(C), the first semiconductor substrate 10 is divided starting from the modified layer 15 formed on the first planned dividing surface 12, thereby thinning the first semiconductor substrate 10 bonded to the second semiconductor substrate 20 via the bonding layer 11. A laminated substrate T including the thinned first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20 is obtained. At this time, the bevel of the first semiconductor substrate 10 may be removed by dividing the first semiconductor substrate 10 starting from the modified layer 15 formed on the second planned dividing surface 13.

[0018] For example, the upper chuck 131 holds the first semiconductor substrate 10, and the lower chuck 132 holds the second semiconductor substrate 20. However, the first semiconductor substrate 10 and the second semiconductor substrate 20 may be arranged upside down, and the upper chuck 131 may hold the second semiconductor substrate 20, and the lower chuck 132 may hold the first semiconductor substrate 10. Next, when the upper chuck 131 rises relative to the lower chuck 132, a crack spreads in a planar shape starting from the modified layer 15, and the first semiconductor substrate 10 is divided into the first planned division surface 12 and the second planned division surface 13.

[0019] Note that the lower chuck 132 may be lowered instead of or in addition to raising the upper chuck 131. The lower chuck 132 may be rotated about the vertical axis.

[0020] In steps S104 to S107, distortion remaining in the thinned first semiconductor substrate 10 is removed, improving the quality of the first semiconductor substrate 10. As will be described later, defects in the first device layer formed on the surface of the first semiconductor substrate 10 can be reduced.

[0021] In step S104, the surface of the thinned first semiconductor substrate 10 is ground. In step S105, the surface of the thinned first semiconductor substrate 10 is etched. In step S106, the thinned first semiconductor substrate 10 is annealed. In step S107, the thinned first semiconductor substrate 10 is polished.

[0022] When thinning the first semiconductor substrate using the conventional Smart Cut method, a large amount of power is consumed when hydrogen ions are implanted into the first semiconductor substrate. In addition, the depth to which hydrogen ions can be implanted into the first semiconductor substrate is at most about 1 μm, and the thickness of the thinned first semiconductor substrate is at most about 1 μm. Therefore, a process such as epitaxial growth is required to overlay a semiconductor layer on the thinned first semiconductor substrate. In addition, radioactivity is generated when hydrogen ions are implanted into the first semiconductor substrate, and a special chamber is required to shield the radioactivity.

[0023] According to this embodiment, as described above, the modified layer 15 is formed by the laser beam LB, and the first semiconductor substrate 10 is divided starting from the modified layer 15, thereby thinning the first semiconductor substrate 10. The irradiation of the laser beam LB can reduce the amount of power consumption compared to the injection of hydrogen ions. In addition, the depth at which the modified layer 15 is formed can be controlled by the focusing position of the laser beam LB, etc., and the thickness of the thinned first semiconductor substrate 10 can be prevented from becoming too thin, and processes such as epitaxial growth can be omitted. Furthermore, unlike the injection of hydrogen ions, the irradiation of the laser beam LB does not generate radioactivity, so a special chamber for shielding radioactivity is not required. Therefore, the productivity of the laminated substrate T including the thinned first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20 can be improved, and the production cost of the laminated substrate T can be reduced.

[0024] As described above, a laminated substrate T is obtained that includes the thinned first semiconductor substrate 10, the bonding layer 11, and the second semiconductor substrate 20. The thickness of the thinned first semiconductor substrate 10 is thinner than the thickness of the second semiconductor substrate 20. When each of the first semiconductor substrate 10 and the second semiconductor substrate 20 is a silicon wafer and the oxide layer 11a of the bonding layer 11 is a silicon oxide layer, the laminated substrate T obtained by the manufacturing method shown in FIG. 1 is a so-called SOI (Silicon on Insulator) substrate.

[0025] Although the details will be described later, according to this embodiment, as shown in FIG. 3, FIG. 5, and FIG. 7, a first device layer 16 is formed on the surface of the thinned first semiconductor substrate 10. The first device layer 16 includes, for example, a semiconductor element. After the first device layer 16 is formed, a modified layer 15 is formed by a laser beam LB that transmits through the second semiconductor substrate 20. The oxide layer 11a of the bonding layer 11 has a high absorption rate of the laser beam LB, and the modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11. The modified layer 15 may be formed inside the bonding layer 11. Then, the second semiconductor substrate 20 and the bonding layer 11 are peeled off starting from the modified layer 15. If a laminated substrate T including the oxide layer 11a is used, laser lift-off can be performed regardless of the type of the first device layer 16.

[0026] Furthermore, according to this embodiment, the bonding layer 11 is formed on the first semiconductor substrate 10, not on the second semiconductor substrate 20. Therefore, the bonding layer 11 is strongly bonded to the first semiconductor substrate 10. Since the bonding layer 11 and the second semiconductor substrate 20 are peeled off without peeling at the interface between the bonding layer 11 and the first semiconductor substrate 10, the peel strength is low and peeling is easy. The peeled second semiconductor substrate 20 is bonded to a new first semiconductor substrate 10 and reused.

[0027] Next, a first example of the process subsequent to FIG. 1 will be described with reference to FIG. 3 and FIG. 4. The method for manufacturing a laminated substrate includes steps S201 to S204, for example, as shown in FIG. 3. Step S201 includes forming a first device layer 16 on the surface of a thinned first semiconductor substrate 10, as shown in FIG. 4(A). The first device layer 16 includes, for example, an image sensor. The image sensor is, for example, a BSI (Back Side Illumination) type.

[0028] Step S202 includes bonding the first device layer 16 and the second device layer 31 formed on the third semiconductor substrate 30 face to face as shown in FIG. 4(B). The second device layer 31 is formed on the third semiconductor substrate 30 before being bonded to the first device layer 16. A peeling layer 35 may be formed between the third semiconductor substrate 30 and the second device layer 31 as shown in FIG. 10(A). The third semiconductor substrate 30 is, for example, a silicon wafer, and the second device layer 31 includes, for example, a logic circuit of an image sensor. The first device layer 16 and the second device layer 31 constitute a device layer 32.

[0029] Before bonding the first device layer 16 and the second device layer 31, the surfaces of the first device layer 16 and the second device layer 31 may be activated by plasma or the like, and may be further hydrophilized by supplying water or water vapor. Hydrogen bonds are generated between OH groups during bonding. Covalent bonds may also be generated by a dehydration condensation reaction of the hydrogen bonds.

[0030] In step S203, the second semiconductor substrate 20 and the bonding layer 11 are peeled off. First, as shown in FIG. 4(C), a modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 by a laser beam LB that passes through the second semiconductor substrate 20. The oxide layer 11a of the bonding layer 11 has a high absorption rate of the laser beam LB, and the modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the oxide layer 11a. The modified layer 15 may be formed inside the bonding layer 11.

[0031] 4(D), the second semiconductor substrate 20 and the bonding layer 11 are peeled off from each other starting from the modified layer 15 formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 (or inside the bonding layer 11). For example, an upper chuck (not shown) holds the second semiconductor substrate 20, and a lower chuck (not shown) holds the third semiconductor substrate 30. However, the second semiconductor substrate 20 and the third semiconductor substrate 30 may be arranged upside down. Next, when the upper chuck is raised relative to the lower chuck, a crack spreads in a planar shape starting from the modified layer 15, and the second semiconductor substrate 20 and the bonding layer 11 are peeled off.

[0032] Instead of or in addition to raising the upper chuck, the lower chuck may be lowered. Also, the lower chuck may be rotated about the vertical axis.

[0033] 4(E), step S204 includes removing the bonding layer 11 after peeling the second semiconductor substrate 20 from the bonding layer 11. The bonding layer 11 is removed by CMP (Chemical Mechanical Polishing) or the like. As a result, the thinned first semiconductor substrate 10 is exposed on the surface of the laminated substrate T.

[0034] The bonding layer 11 does not have to be removed if it does not affect subsequent processes. The bonding layer 11 is not removed if it is used as a gettering layer, which will be described later. The gettering layer is a layer that captures impurities such as heavy metals.

[0035] Next, a second example of the process subsequent to that shown in FIG. 1 will be described with reference to FIG. 5 and FIG. 6. The method for manufacturing a laminated substrate includes, for example, steps S301 to S304 as shown in FIG. 5. Step S301 includes forming a first device layer 16 on the surface of the thinned first semiconductor substrate 10 as shown in FIG. 6(A). The first device layer 16 includes, for example, a backside PDN (Power Delivery Network).

[0036] 6(B), step S302 includes bonding the first device layer 16 and a second device layer 31 formed on a third semiconductor substrate 30 face to face. The second device layer 31 is formed on the third semiconductor substrate 30 before being bonded to the first device layer 16. The third semiconductor substrate 30 is, for example, a silicon wafer, and the second device layer 31 includes, for example, a logic circuit of a backside PDN. The first device layer 16 and the second device layer 31 constitute a device layer 32.

[0037] Before bonding the first device layer 16 and the second device layer 31, the surfaces of the first device layer 16 and the second device layer 31 may be activated by plasma or the like, and may be further hydrophilized by supplying water or water vapor. Hydrogen bonds are generated between OH groups during bonding. Covalent bonds may also be generated by a dehydration condensation reaction of the hydrogen bonds.

[0038] In step S303, the second semiconductor substrate 20 and the bonding layer 11 are peeled off, similarly to step S203 in Fig. 3. First, as shown in Fig. 6(C), a modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 by a laser beam LB that passes through the second semiconductor substrate 20. The modified layer 15 may be formed inside the bonding layer 11. Next, as shown in Fig. 6(D), the second semiconductor substrate 20 and the bonding layer 11 are peeled off from the modified layer 15 formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 as a starting point.

[0039] 6(E), in step S304, after peeling off the second semiconductor substrate 20 and the bonding layer 11, vias 17 are formed in the bonding layer 11 and the first semiconductor substrate 10. The vias 17 are through electrodes formed to penetrate the bonding layer 11 and the first semiconductor substrate 10. Note that the formation of the vias 17 (step S304) may be performed before the formation of the first device layer 16 (step S301).

[0040] Next, a third example of the process subsequent to that shown in FIG. 1 will be described with reference to FIG. 7 and FIG. 8. The manufacturing method of the laminated substrate includes, for example, steps S401 to S404 as shown in FIG. 7. Step S401 includes forming vias 18 in the thinned first semiconductor substrate 10 and forming a first device layer 16 on the surface of the first semiconductor substrate 10 as shown in FIG. 8(A). The vias 18 are through electrodes formed penetrating the first semiconductor substrate 10. The first device layer 16 includes, for example, a DRAM (Dynamic Random Access Memory). More specifically, the DRAM may be a HBM (High Bandwidth Memory).

[0041] 8(B), step S402 includes bonding the first device layer 16 and a carrier substrate 40 face to face. The carrier substrate 40 is temporarily bonded to the first device layer 16 using, for example, an adhesive (not shown). The carrier substrate 40 may be, for example, a glass substrate.

[0042] In step S403, the second semiconductor substrate 20 and the bonding layer 11 are peeled off, similarly to step S203 in Fig. 3. First, as shown in Fig. 8(C), a modified layer 15 is formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 by a laser beam LB that passes through the second semiconductor substrate 20. The modified layer 15 may be formed inside the bonding layer 11. Next, as shown in Fig. 8(D), the second semiconductor substrate 20 and the bonding layer 11 are peeled off from the modified layer 15 formed at the interface between the second semiconductor substrate 20 and the bonding layer 11 as a starting point.

[0043] Step S404 includes forming a mask pattern on the surface of the bonding layer 11 after peeling off the second semiconductor substrate 20 and the bonding layer 11, and etching the bonding layer 11 using the mask pattern. The etching is, for example, dry etching. After etching the bonding layer 11, the mask pattern is removed. As a result, the via 18 is exposed as shown in FIG. 8(E).

[0044] Next, an example of the process following FIG. 3 will be described with reference to FIG. 9 to FIG. 11. The manufacturing method of the laminated substrate includes, for example, steps S501 to S504 as shown in FIG. 9. The laminated substrate T shown in FIG. 10(A) is obtained by the process shown in FIG. 3. The laminated substrate T has a first semiconductor substrate 10, a device layer 32, a peeling layer 35, and a third semiconductor substrate 30 in this order. The peeling layer 35 may include an oxide layer, similar to the bonding layer 11. The peeling layer 35 may also include a nitride layer. It is also possible to form a modified layer 15 in the nitride layer. Furthermore, the peeling layer 35 may have a multi-layer structure. Furthermore, the laminated substrate T may further have a bonding layer 11 that functions as a gettering layer on the surface of the first semiconductor substrate 10 opposite to the device layer 32.

[0045] As described above, the device layer 32 may include the first device layer 16 and the second device layer 31. The first device layer 16 includes, for example, a semiconductor memory. The second device layer 31 includes, for example, a peripheral circuit (also called "peripheral") of the semiconductor memory or an input / output circuit (also called "IO") of the semiconductor memory.

[0046] Step S501 includes forming a die attach film (DAF) 33 on the surface of the bonding layer 11 (or the first semiconductor substrate 10 when the bonding layer 11 is not present), as shown in FIG. 10(B). The die attach film 33 is an adhesive sheet for die bonding. The die attach film 33 is used for stacking semiconductor chips, etc. The die attach film 33 may be either conductive or insulating. The die attach film 33 is obtained by applying a liquid material and drying it.

[0047] 10(C), step S502 includes dicing the bonding layer 11, the first semiconductor substrate 10, the device layer 32, and the peeling layer 35. A groove 19 is formed that penetrates the bonding layer 11, the first semiconductor substrate 10, the device layer 32, and the peeling layer 35. If the die attachment film 33 has been formed in advance on the bonding layer 11, the die attachment film 33 is also diced, and the groove 19 is formed so as to penetrate the die attachment film 33 as well. The dicing method is, for example, laser dicing or blade dicing.

[0048] The laser dicing includes an ablation process using a laser beam LB2. The die attach film 33, the bonding layer 11, the first semiconductor substrate 10, the device layer 32, and the peeling layer 35 absorb the laser beam LB2, generating heat and sublimating or evaporating. As a result, a groove 19 is formed.

[0049] The control unit may change the energy of the laser beam LB2 when dicing the first semiconductor substrate 10 and when dicing the device layer 32 and the peeling layer 35. For example, when processing the first semiconductor substrate 10, an energy capable of processing silicon is set. On the other hand, when processing the device layer 32 and the peeling layer 35, an energy capable of processing the conductive film and the oxide film but not processing silicon is set. When processing the device layer 32 and the peeling layer 35, damage to the third semiconductor substrate 30 can be prevented.

[0050] 11(A), step S503 includes bonding the laminated substrate T to a tape 51 arranged on the side opposite to the third semiconductor substrate 30, and attaching the laminated substrate T to a frame 52 via the tape 51. The frame 52 is formed in a ring shape, and the tape 51 is attached to the frame 52 so as to cover the opening of the frame 52.

[0051] A die attachment film 33 is disposed between the bonding layer 11 (or the first semiconductor substrate 10 if there is no bonding layer 11) and the tape 51. In this embodiment, the die attachment film 33 is formed in advance on the bonding layer 11 or the like, but may be attached in advance to the surface of the tape 51. In the latter case, steps S503 and S501 are performed simultaneously. In this case, dicing of the die attachment film 33 may be performed after step S504, which will be described later.

[0052] In step S504, the third semiconductor substrate 30 and the peeling layer 35 are peeled off, similarly to step S203 in FIG. 3. First, as shown in FIG. 11(B), a modified layer 15 is formed at the interface between the third semiconductor substrate 30 and the peeling layer 35 by a laser beam LB that passes through the third semiconductor substrate 30. The modified layer 15 may be formed inside the peeling layer 35. Next, as shown in FIG. 11(C), the third semiconductor substrate 30 and the peeling layer 35 are peeled off from the modified layer 15 formed at the interface between the third semiconductor substrate 30 and the peeling layer 35 as a starting point. Even after peeling, the semiconductor chips can be prevented from scattering by the tape 51. The semiconductor chips are picked up one by one.

[0053] After the third semiconductor substrate 30 and the separation layer 35 are peeled off, the bonding layer 11 remains on the surface of the first semiconductor substrate 10. The remaining bonding layer 11 is used as a gettering layer that captures impurities such as heavy metals. Therefore, a process for forming a gettering layer is not required.

[0054] Conventionally, a device layer 32 is formed on the surface of a thick first semiconductor substrate 10, the device layer 32 is diced with a blade, a protective tape is applied to the device layer 32, and then the first semiconductor substrate 10 is ground to be thinned. The blade fully cuts the device layer 32 and half cuts the first semiconductor substrate 10. The first semiconductor substrate 10 is then ground from the side opposite the device layer 32 to divide the first semiconductor substrate 10 into a plurality of semiconductor chips. Then, a gettering layer is formed on the ground surface of the first semiconductor substrate 10, a tape 51 is placed on the side opposite the protective tape with the first semiconductor substrate 10 sandwiched therebetween, the first semiconductor substrate 10 is attached to a frame 52 via the tape 51, and the protective tape is removed.

[0055] According to this embodiment, the first semiconductor substrate 10 is thinned before the device layer 32 is formed (see FIG. 4). (1) Since the first semiconductor substrate 10 is not ground after the device layer 32 is formed as in the conventional method, damage to the device layer 32 and the first semiconductor substrate 10 can be suppressed. Also, according to this embodiment, the device layer 32 and the first semiconductor substrate 10 are diced to obtain a plurality of semiconductor chips. Next, the first semiconductor substrate 10 is attached to a frame 52 via a tape 51 arranged on the opposite side to the third semiconductor substrate 30. Furthermore, after that, the third semiconductor substrate 30 is removed by laser lift-off. The third semiconductor substrate 30 is harder than a conventional protective tape. (2) Until the third semiconductor substrate 30 is removed, the third semiconductor substrate 30 can reinforce the semiconductor chip, and damage to the semiconductor chip can be suppressed. (3) Unlike the conventional method, the attachment and removal of a protective tape is not necessary. (4) The bonding layer 11 remaining after the removal of the third semiconductor substrate 30 can be used as a gettering layer, and a process for forming a gettering layer is not necessary. As described above, according to this embodiment, the productivity of semiconductor chips can be improved.

[0056] In this embodiment, the laminated substrate T is prepared in which the bonding layer 11 is formed on the first semiconductor substrate 10 as shown in Fig. 10(A), but the bonding layer 11 may be formed on the second semiconductor substrate 20. Even in this case, the above effects (1) to (4) can be obtained, and the productivity of the semiconductor chips can be improved. When the laminated substrate T is prepared in which the bonding layer 11 is formed on the first semiconductor substrate 10 as shown in Fig. 10(A), (5) the second semiconductor substrate 20 and the bonding layer 11 can be easily peeled off.

[0057] Next, the substrate processing apparatus 100 that performs step S103 in Fig. 1 will be described with reference to Fig. 12 etc. The substrate processing apparatus 100 has a loading / unloading section 101, a transport section 110, a laser processing section 120, a dividing section 130, and a control section 140.

[0058] The loading / unloading section 101 has a placement section 102 on which a cassette C is placed. The cassette C accommodates a plurality of laminated substrates T as shown in FIG. 2(A), for example. The laminated substrate T includes a first semiconductor substrate 10, a second semiconductor substrate 20, and a bonding layer 11 that bonds the first semiconductor substrate 10 and the second semiconductor substrate 20. Note that the number of placement sections 102 and the number of cassettes C are not limited to those shown in FIG.

[0059] The transport unit 110 is disposed next to the loading / unloading unit 101, the laser processing unit 120, and the dividing unit 130, and transports the laminated substrate T to these units. The transport unit 110 has a transport arm 111 that holds the laminated substrate T. The transport arm 111 is capable of moving in the horizontal direction (both in the X-axis direction and the Y-axis direction) and the vertical direction, and of rotating about the vertical axis.

[0060] As shown in FIG. 2(B), the laser processing unit 120 uses a laser beam LB to form a modified layer 15 on a planned dividing surface along which the laminated substrate T is to be divided in the thickness direction. The laser processing unit 120 includes, for example, a stage 121 that holds the laminated substrate T, and an optical system 122 that irradiates the laser beam LB onto the laminated substrate T held by the stage 121. The stage 121 is, for example, an XYθ stage or an XYZθ stage. The optical system 122 includes, for example, a focusing lens. The focusing lens focuses the laser beam LB toward the laminated substrate T. The optical system 122 may further include a galvanometer scanner.

[0061] As shown in FIG. 2C, the dividing unit 130 divides the laminated substrate T starting from the modified layer 15 formed on the intended dividing surface. The dividing unit 130 includes, for example, an upper chuck 131 and a lower chuck 132. The upper chuck 131 holds the first semiconductor substrate 10, and the lower chuck 132 holds the second semiconductor substrate 20. However, the first semiconductor substrate 10 and the second semiconductor substrate 20 may be arranged upside down. Next, when the upper chuck 131 rises relative to the lower chuck 132, a crack spreads in a planar shape starting from the modified layer 15, and the laminated substrate T is divided at the first intended dividing surface 12 and the like. Instead of or in addition to the raising of the upper chuck 131, the lower chuck 132 may be lowered. The lower chuck 132 may be rotated around a vertical axis.

[0062] 12, the control unit 140 includes a CPU (Central Processing Unit) 141 and a storage medium 142 such as a memory. The storage medium 142 stores programs for controlling various processes executed in the substrate processing apparatus 100. The control unit 140 controls the operation of the substrate processing apparatus 100 by causing the CPU 141 to execute the programs stored in the storage medium 142.

[0063] The control unit 140 sets the planned dividing surface inside the first semiconductor substrate 10. The control unit 140 forms a modified layer 15 on the first planned dividing surface 12, and divides the first semiconductor substrate 10 starting from the formed modified layer 15, thereby thinning the first semiconductor substrate 10 bonded to the second semiconductor substrate 20 via the bonding layer 11.

[0064] The substrate processing apparatus 100 shown in FIG. 12 can be used for steps other than step S103 in FIG. 1, for example, step S203 in FIG. 3, step S303 in FIG. 5, step S403 in FIG. 7, and step S504 in FIG. 9.

[0065] 3 or step S303 in FIG. 5, the control unit 140 sets the intended dividing surface at the interface between the second semiconductor substrate 20 and the bonding layer 11, and peels off the second semiconductor substrate 20 and the bonding layer 11 from the modified layer 15 formed at the interface as a starting point. In this case, in the dividing unit 130, the upper chuck 131 holds the second semiconductor substrate 20, and the lower chuck 132 holds the third semiconductor substrate 30. The modified layer 15 may be formed inside the bonding layer 11.

[0066] 7, the control unit 140 sets the intended dividing surface at the interface between the second semiconductor substrate 20 and the bonding layer 11, and peels off the second semiconductor substrate 20 and the bonding layer 11 from the modified layer 15 formed at the interface as a starting point. In this case, in the dividing unit 130, the upper chuck 131 holds the second semiconductor substrate 20, and the lower chuck 132 holds the carrier substrate 40.

[0067] 9, the control unit 140 sets the intended dividing surface at the interface between the third semiconductor substrate 30 and the peeling layer 35, and peels the third semiconductor substrate 30 from the peeling layer 35 starting from the modified layer 15 formed at the interface. In this case, in the dividing unit 130, the upper chuck 131 holds the third semiconductor substrate 30, and the lower chuck 132 holds the tape 51. The modified layer 15 may be formed inside the peeling layer 35. The transfer arm 111 of the transfer unit 110 holds the frame 52 shown in FIG. 11 to thereby hold the laminated substrate T.

[0068] Although the embodiments of the manufacturing method for a laminated substrate and the substrate processing apparatus according to the present disclosure have been described above, the present disclosure is not limited to the above embodiments. Various changes, modifications, substitutions, additions, deletions, and combinations are possible within the scope of the claims. These naturally fall within the technical scope of the present disclosure.

[0069] This application claims priority based on Patent Application No. 2021-037189 filed with the Japan Patent Office on March 9, 2021, and the entire contents of Patent Application No. 2021-037189 are incorporated by reference into this application. [Explanation of symbols]

[0070] 10 First semiconductor substrate 11 Bonding layer 11a Oxide layer 12 First division plan surface 15 Modification layer 20 Second semiconductor substrate

Claims

1. providing a laminated substrate having a first device layer, a first semiconductor substrate, a bonding layer, and a second semiconductor substrate in this order, the first semiconductor substrate being thinner than the second semiconductor substrate; bonding the first device layer of the laminated substrate and a second device layer formed on a third semiconductor substrate in a face-to-face relationship; irradiating the bonding layer with a laser beam that transmits through the second semiconductor substrate, thereby peeling off the second semiconductor substrate and the first semiconductor substrate; A method for manufacturing a laminated substrate, comprising the steps of:

2. The method for manufacturing a laminated substrate according to claim 1 , further comprising removing the bonding layer after peeling off the second semiconductor substrate and the first semiconductor substrate.

3. The method for manufacturing a multilayer substrate according to claim 1 , further comprising forming a via in the first semiconductor substrate after separating the second semiconductor substrate from the first semiconductor substrate.

4. 2. The method for manufacturing a laminated substrate according to claim 1, further comprising, after peeling off the second semiconductor substrate and the first semiconductor substrate, forming a mask pattern on a surface of the bonding layer, and etching the bonding layer using the mask pattern.

5. a release layer is formed between the third semiconductor substrate and the second device layer; After peeling off the second semiconductor substrate and the first semiconductor substrate, dicing the first semiconductor substrate, the first device layer, the second device layer, and the peeling layer; After the dicing, the first semiconductor substrate is attached to a frame via a tape arranged on an opposite side to the third semiconductor substrate; After mounting the first semiconductor substrate on the frame, a laser beam that transmits through the third semiconductor substrate is irradiated onto the peeling layer to peel off the third semiconductor substrate and the first semiconductor substrate; The method for producing the laminated substrate according to any one of claims 1 to 4, comprising:

6. 6. The method for manufacturing a multilayer substrate according to claim 1, wherein the bonding layer includes a thermally oxidized layer formed by thermally oxidizing a surface of the first semiconductor substrate.

7. 7. The method for manufacturing a laminated substrate according to claim 1, wherein each of the first semiconductor substrate and the second semiconductor substrate is a silicon wafer, and the bonding layer includes a silicon oxide layer.

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