Semiconductor element
The evaluation method for electric field distribution at the semiconductor device interface uses the Franz Keldysch effect and photocurrent measurement to accurately assess electric field concentrations, addressing the challenges of existing technologies and enhancing semiconductor device design.
Patent Information
- Application Number
- JP2025029909
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2041-05-24
AI Technical Summary
Existing methods struggle to accurately evaluate the electric field distribution at the interface between the electrode and the semiconductor in semiconductor devices, particularly at locations where the electric field is concentrated.
The evaluation method involves applying an electric field that enables the Franz Keldysch effect, scanning the interface with laser light having an energy below the semiconductor's band gap, and measuring the photocurrent to assess the electric field distribution.
This method allows for accurate and easy evaluation of the electric field distribution at the interface, particularly at concentrated areas, improving the design and manufacturing of semiconductor devices with enhanced high-voltage resistance.
Smart Images

Figure 2025071355000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an evaluation method, an evaluation system, a method for manufacturing a semiconductor element, and a semiconductor element, and in particular to a technique for evaluating an interface between an electrode and a semiconductor in a semiconductor element. [Background technology]
[0002] Patent Document 1 discloses a method for evaluating the interface of a semiconductor crystal growth layer by an interface photoresponse microscopy method. The interface photoresponse microscopy method is a method for non-destructively evaluating metal / semiconductor interfaces and semiconductor / semiconductor interfaces. The interface photoresponse microscopy method utilizes the phenomenon that, for example, in a sample having a metal (Schottky electrode) formed on the surface of a semiconductor, when a laser beam equal to or smaller than the band gap is irradiated from the semiconductor side to the interface between the metal (Schottky electrode) and the semiconductor, a photocurrent is generated between the metal (Schottky electrode) and an electrode (ohmic electrode) on the back surface of the semiconductor due to the internal photoelectron emission effect. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2018-18869 A Summary of the Invention [Problem to be solved by the invention]
[0004] An object of the present invention is to provide an evaluation method and the like that can easily and accurately evaluate the electric field distribution at the interface between an electrode and a semiconductor in a semiconductor element. [Means for solving the problem]
[0005] In order to achieve the above object, an evaluation method according to one embodiment of the present invention includes an electric field application step, a first scanning step, and a first evaluation step. In the electric field application step, an electric field capable of generating the Franz-Keldysh effect is applied to an interface between an electrode and a semiconductor in a semiconductor element. In the first scanning step, while the electric field is applied, the interface is scanned at least one-dimensionally while being irradiated with a predetermined light having an energy smaller than the band gap of the semiconductor and a beam diameter smaller than the diameter of the electrode. In the first evaluation step, the electric field distribution at the interface is evaluated by measuring a photocurrent flowing through the semiconductor element while performing the first scanning step.
[0006] In order to achieve the above object, an evaluation system according to one embodiment of the present invention includes an electric field application unit, a scanning unit, and an evaluation unit. The electric field application unit applies an electric field at which the Franz-Keldysh effect can occur to an interface between an electrode and a semiconductor in a semiconductor element. The scanning unit, while applying the electric field, scans the interface at least one-dimensionally while irradiating the interface with a predetermined light having an energy smaller than the band gap of the semiconductor and a beam diameter smaller than the diameter of the electrode. The evaluation unit evaluates the electric field distribution at the interface by measuring a photocurrent flowing through the semiconductor element while performing scanning by the scanning unit.
[0007] In addition, in order to achieve the above-mentioned object, a manufacturing method for a semiconductor element according to one embodiment of the present invention is a manufacturing method for a semiconductor element that manufactures a semiconductor element by providing an electrode on a semiconductor, and includes a step of providing a relaxation portion that relaxes electric field concentration at a location at the interface that shows an electric field strength of a predetermined magnitude or greater based on evaluation by the evaluation method.
[0008] In order to achieve the above object, a semiconductor element according to an embodiment of the present invention includes a semiconductor and an electrode provided on one surface of the semiconductor, the electrode having a relaxation portion protruding from a side surface of the electrode and contacting the one surface of the semiconductor, for relaxing electric field concentration. Effect of the Invention
[0009] The present invention provides an evaluation method and the like that can easily and accurately evaluate the electric field distribution at the interface between an electrode and a semiconductor in a semiconductor element. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is an explanatory diagram of the electric field distribution at the interface between an electrode and a semiconductor when a high voltage is applied. [Diagram 2] FIG. 2 is a block diagram showing a configuration of the evaluation system according to the embodiment. [Diagram 3] FIG. 3 is a schematic diagram showing an overall configuration including an evaluation system according to an embodiment. [Figure 4] Figure 4 is an explanatory diagram of the Franz-Keldysh effect. [Diagram 5] FIG. 5 is a diagram showing a photocurrent image when red light is irradiated onto the interface between the electrode and the semiconductor. [Figure 6] FIG. 6 is a diagram showing a line profile when red light is irradiated onto the interface between the electrode and the semiconductor. [Figure 7] FIG. 7 is a diagram showing a photocurrent image when violet light is irradiated onto the interface between the electrode and the semiconductor. [Figure 8] FIG. 8 is a diagram showing a line profile when the interface between an electrode and a semiconductor is irradiated with violet light. [Figure 9] FIG. 9 is a flowchart showing an operation example of the evaluation system according to the embodiment. [Figure 10] FIG. 10 is a flowchart showing another operation example of the evaluation system according to the embodiment. [Figure 11] FIG. 11 is a flowchart showing an example of a method for manufacturing a semiconductor device according to the embodiment. [Figure 12] FIG. 12 is a cross-sectional view showing a main part of a semiconductor element according to an embodiment. [Figure 13]FIG. 13 is a diagram showing a photocurrent image when violet light is irradiated onto the interface between the semiconductor and an electrode provided with a relaxation portion. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] (Findings on which the present invention is based) First, the inventor's viewpoint will be explained below.
[0012] In recent years, in order to increase the withstand voltage of semiconductor elements such as Schottky diodes, research and development of wide-gap semiconductors such as gallium nitride (GaN), silicon carbide (SiC), and gallium oxide (Ga2O3) has been actively conducted. Here, in order to increase the withstand voltage of a Schottky diode, for example, it is necessary not only to adopt a wide-gap semiconductor but also to increase the withstand voltage of the electrode (Schottky electrode). The necessity of increasing the withstand voltage of the electrode will be explained below.
[0013] Fig. 1 is an explanatory diagram of an electric field distribution at an interface 5A between an electrode 4A (Schottky electrode 41A) and a semiconductor 3A when a high voltage is applied. In the example shown in Fig. 1, a Schottky electrode 41A is formed on an upper surface of the semiconductor 3A, and an ohmic electrode 42A is formed on a lower surface of the semiconductor 3A. In the example shown in Fig. 1, a reverse bias DC voltage of about 100 V is applied to the Schottky electrode 41A and the ohmic electrode 42A. Note that electric field lines A1 shown in Fig. 1 are imaginary lines for visually expressing the state of the electric force.
[0014] 1, electric field lines A1 are uniformly distributed in the center of interface 5A between Schottky electrode 41A and semiconductor 3A, that is, the electric field is uniformly distributed. On the other hand, electric field lines A1 are concentrated in the peripheral portion of interface 5A (i.e., the end of electrode 4A), that is, the electric field is concentrated. For this reason, the concentration of the electric field in the peripheral portion of interface 5A may cause an event in which Schottky electrode 41A undergoes dielectric breakdown.
[0015] In order to prevent the above phenomenon, that is, to increase the withstand voltage of electrode 4A (Schottky electrode 41A), it is possible to provide a relaxation structure for relaxing the concentration of the electric field in the periphery of interface 5A. Examples of the relaxation structure include a field plate electrode and a guard ring structure. Another example of the relaxation structure is a structure in which the periphery of interface 5A is etched.
[0016] Incidentally, when providing the above-mentioned relaxation structure, it is essential to grasp the location at the interface 5A where the electric field concentrates. In general, the electric field distribution at the interface 5A is calculated by using a two-dimensional electromagnetic field simulation. However, the periphery of the interface 5A when a high voltage is applied basically has discontinuous boundary conditions such as unevenness. For this reason, there is a problem that it is very difficult to accurately calculate the electric field distribution at the interface 5A by the above-mentioned simulation.
[0017] In view of the above, the inventors have come up with the present invention.
[0018] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. Each of the embodiments described below shows a specific example of the present invention. The numerical values, shapes, methods, components, connection forms of the components, steps, order of steps, and the like shown in the following embodiments are merely examples and are not intended to limit the present invention. In addition, in each drawing, substantially the same configuration is given the same reference numeral, and duplicated explanations may be omitted or simplified.
[0019] [composition] Fig. 2 is a block diagram showing a configuration of an evaluation system 100 according to an embodiment. Fig. 3 is a schematic diagram showing an overall configuration including the evaluation system 100 according to an embodiment. The evaluation system 100 (evaluation method) according to the embodiment is a system (method) for evaluating an interface 5 between an electrode 4 (Schottky electrode 41 in the embodiment) and a semiconductor 3 in a semiconductor element 2, in particular, for evaluating an electric field distribution at the interface 5.
[0020] First, a semiconductor element 2 that is an object of evaluation by the evaluation system 100 (evaluation method) will be described. The semiconductor element 2 is an element having electrodes 4 provided on the surface of a semiconductor 3, and functions when a current is passed through the electrodes 4 or a voltage is applied to the electrodes 4. In the embodiment, the semiconductor element 2 is a Schottky diode.
[0021] In the embodiment, the semiconductor 3 of the semiconductor element 2 is formed by growing a silicon (Si)-doped n-GaN layer 32 having a thickness of about 2 μm on the upper surface of a gallium nitride (GaN) substrate 31, for example, by using MOCVD (Metal Organic Chemical Vapor Deposition), and by growing a silicon (Si)-doped n-GaN layer 33 having a thickness of about 12 μm on the upper surface of the n-GaN layer 32.
[0022] In the embodiment, the electrode 4 of the semiconductor element 2 includes a Schottky electrode 41 having a diameter of about 200 μm and a thickness of about 100 nm, and an ohmic electrode 42. The Schottky electrode 41 is made of nickel (Ni) and is formed on the upper surface of the n-GaN layer 33 by, for example, electron beam deposition. The ohmic electrode 42 is made of an InGa (indium-gallium) alloy and is formed on the lower surface of the n-GaN substrate 31 by, for example, coating. The ohmic electrode 42 may be made of an Al / Ti (aluminum-titanium) alloy. In this case, the ohmic electrode 42 may be formed by depositing the alloy on the lower surface of the n-GaN substrate 31 by, for example, electron beam deposition, and then performing a heat treatment at a high temperature of about 900 degrees Celsius.
[0023] Next, an evaluation system 100 (evaluation method) according to an embodiment will be described. As shown in Fig. 2, the evaluation system 100 includes an electric field application unit 11, a scanning unit 12, and an evaluation unit 13. In other words, the evaluation method includes an electric field application step ST1, a scanning step ST2, and a first evaluation step ST3 (see Fig. 9).
[0024] The electric field application unit 11 (in the electric field application step ST1) applies to the interface 5 between the electrode 4 (Schottky electrode 41) in the semiconductor element 2 and the semiconductor 3 an electric field that can cause the Franz-Keldysh effect.
[0025] Here, we will briefly explain the Franz-Keldysh effect using Figure 4. Figure 4 is an explanatory diagram of the Franz-Keldysh effect. The Franz-Keldysh effect is a phenomenon in which the wavelength corresponding to the band gap (fundamental absorption edge) shifts to the longer wavelength side when a relatively high electric field is applied to a semiconductor from the outside. Figure 4 shows the energy band of a semiconductor with an electric field applied. As shown in Figure 4, when an electric field is applied, the valence band and conduction band tilt according to the electric field, causing the wave function of the electrons in the semiconductor to seep into the band gap, and the effective band gap Eg' becomes smaller than the band gap Eg under normal conditions (i.e., when no electric field is applied).
[0026] For this reason, it is known that when a relatively high electric field is applied to the semiconductor 3 and the interface 5 is irradiated with light having a photon energy slightly smaller than the band gap Eg, a relatively large photocurrent is generated due to the Franz-Keldysh effect (see, for example, Franz-Keldysh effect in n-type GaN Schottky barrier diode under high reverse bias voltage, Applied Physics Express, Volume 9, Number 9).
[0027] Although details will be described later, an evaluation system 100 (evaluation method) according to the embodiment utilizes this Franz-Keldysh effect to evaluate the electric field distribution at the interface 5. Therefore, in the embodiment, the electric field application unit 11 applies a reverse bias DC voltage of several tens to about 100 V from a DC power source 111 between the Schottky electrode 41 and the ohmic electrode 42 so that an electric field of a magnitude large enough to cause the Franz-Keldysh effect to appear is applied. Note that this voltage is smaller than the voltage that causes the electrode 4 (Schottky electrode 41) to undergo dielectric breakdown.
[0028] Although not shown, the scanning unit 12 has a laser light source, a lens, and a moving table. The laser light source outputs laser light (predetermined light) L1 from below toward above (i.e., from the semiconductor 3 toward the electrode 4 (Schottky electrode 41)). The laser light source is configured to change the wavelength of the output laser light L1.
[0029] In the embodiment, the scanning unit 12 can output laser light L1 having energy slightly smaller than the band gap Eg (here, about 3 eV) of the semiconductor 3 (that is, energy exceeding the effective band gap Eg' due to the Franz-Keldysh effect). Specifically, the scanning unit 12 can output laser light L1 such as violet light (wavelength: about 403 nm) or near-ultraviolet light (wavelength: about 375 nm).
[0030] The lens is disposed opposite to the laser light source and focuses the laser light L1 outputted by the laser light source toward the interface 5. Therefore, the interface 5 is irradiated with the focused laser light L1 having a beam diameter smaller than the diameter of the electrode 4 (Schottky electrode 41).
[0031] The moving table is a table on which the semiconductor element 2 is placed, and is configured to be movable by being controlled by an actuator. Therefore, the semiconductor element 2 can move along the XY plane together with the moving table. The XY plane here is a plane perpendicular (or approximately perpendicular) to the thickness direction (vertical direction) of the semiconductor element 2.
[0032] In the embodiment, while the electric field application unit 11 is applying an electric field, the scanning unit 12 drives the laser light source to focus the laser light L1 on the interface 5 and scans the interface 5 by moving the semiconductor element 2 along the XY plane by driving the moving table.
[0033] That is, in a state in which an electric field is applied, the scanner 12 (in the first scanning step ST2) scans the interface 5 at least one-dimensionally while irradiating the interface 5 with a predetermined light (laser light) L1 having energy smaller than the band gap Eg of the semiconductor 3 and a beam diameter smaller than that of the electrode 4 (Schottky electrode 41). In the embodiment, the interface 5 is scanned by moving the semiconductor element 2 along the XY plane, so that the scanner 12 (in the first scanning step ST2) scans the interface 5 two-dimensionally.
[0034] In the embodiment, the laser light L1 irradiated to the interface 5 in the first scanning step ST2 is violet light or near-ultraviolet light. That is, the predetermined light (laser light) L1 is light having a shorter wavelength than visible light, or is visible light with a relatively short wavelength. The wavelength of the laser light L1 may be a wavelength that is smaller than the band gap Eg (3.4 eV in this case) of the semiconductor 3 and has a photon energy larger than the effective band gap Eg' (that is, a photon energy large enough to cause a large increase in photocurrent due to the Franz-Keldysh effect).
[0035] The evaluation unit 13 has an ammeter 131 connected in series to the DC power supply 111. The ammeter 131 measures a current flowing through the Schottky electrode 41, the semiconductor 3, and the ohmic electrode 42, thereby measuring a photocurrent generated by irradiation of the interface 5 with the laser light L1. In the embodiment, the evaluation unit 13 measures a photoelectron yield (Photoyield: Y) indicating a photocurrent per unit number of photons.
[0036] Here, if the electric field intensity at the interface 5 where the laser light L1 is irradiated is large (i.e., if the electric field is concentrated), the Franz-Keldysh effect occurs, and the laser light L1 is absorbed, resulting in a large increase in photocurrent. On the other hand, if the electric field intensity at the interface 5 where the laser light L1 is irradiated is small (i.e., if the electric field is not concentrated), the depletion layer expands due to the application of a reverse voltage, and the laser light L1 is absorbed by the increased width, but the Franz-Keldysh effect does not occur, and the photocurrent increases only slightly. In this way, the degree of electric field concentration at the interface 5 corresponds to the increase in photocurrent, so it is possible to measure the electric field distribution at the interface 5 by scanning the interface 5 while irradiating it with the laser light L1 and measuring the photocurrent.
[0037] That is, the evaluation unit 13 (in first evaluation step ST3) measures the photocurrent flowing through the semiconductor element 2 while performing scanning by the scanning unit 12 (first scanning step ST2), thereby evaluating the electric field distribution at the interface 5. In the embodiment, the evaluation unit 13 evaluates the electric field distribution at the interface 5 by outputting a photocurrent image (or a line profile) of the interface 5.
[0038] The following describes an evaluation result when red light is irradiated onto the interface 5 as the laser light (predetermined light) L1, and an evaluation result when violet light is irradiated onto the interface 5 as the laser light L1.
[0039] Fig. 5 is a diagram showing a photocurrent image when red light is irradiated onto interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3. Fig. 6 is a diagram showing a line profile when red light is irradiated onto interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3. Fig. 7 is a diagram showing a photocurrent image when violet light is irradiated onto interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3. Fig. 8 is a diagram showing a line profile when violet light is irradiated onto interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3.
[0040] 5 and 7 represent the interface 5. The light and dark areas in Fig. 5 and 7 correspond to the magnitude of the photocurrent (photoelectron yield Y), with the brighter the area, the larger the photocurrent, and the darker the area, the smaller the photocurrent. The magnitude of the photocurrent (photoelectron yield Y) is expressed in an arbitrary unit. Furthermore, in each of Fig. 5 and Fig. 7, (a) shows the results when the DC voltage applied between the Schottky electrode 41 and the ohmic electrode 42 (hereinafter referred to as "interelectrode voltage") is 0 V, (b) shows the results when the interelectrode voltage is -41 V, and (c) shows the results when the interelectrode voltage is -82 V.
[0041] Both Figures 6 and 8 show the distribution of photocurrent on a line along the Y direction (horizontal direction) passing through the center of interface 5, with the vertical axis representing the magnitude of photocurrent (in arbitrary units) and the horizontal axis representing the distance (in μm) from a reference point (the left end in Figures 5 and 7).
[0042] As shown in Figures 5 and 7, when red light was irradiated onto interface 5, the distribution of photocurrent at interface 5 was almost uniform, and a large increase in photocurrent due to the Franz-Keldysh effect was hardly observed. In other words, in this case, it was confirmed that the photocurrent image and line profile do not represent the electric field distribution at interface 5. Note that, although the case where red light was irradiated onto interface 5 is given as an example here, it was also confirmed that the photocurrent image and line profile do not represent the electric field distribution at interface 5 when green light, blue-green light, and blue light were irradiated onto interface 5.
[0043] On the other hand, as shown in Figs. 6 and 8, when the interface 5 is irradiated with violet light and the interelectrode voltage is relatively large (i.e., a relatively high electric field is applied to the interface 5), a large increase in the photocurrent due to the Franz-Keldysh effect is hardly observed in the center of the interface 5, whereas a large increase in the photocurrent due to the Franz-Keldysh effect is remarkably observed in the peripheral part of the interface 5. In other words, in this case, it was confirmed that the photocurrent image and line profile represent the electric field distribution at the interface 5. Note that, although the case where the interface 5 is irradiated with violet light is given as an example here, it was confirmed that the photocurrent image and line profile represent the electric field distribution at the interface 5 even when the interface 5 is irradiated with near-ultraviolet light.
[0044] [Operation] An example of the operation (evaluation method) of the evaluation system 100 according to the embodiment will be described below. Fig. 9 is a flowchart showing an example of the operation of the evaluation system 100 according to the embodiment. First, the electric field application unit 11 applies a reverse bias DC voltage from the DC power supply 111 between the Schottky electrode 41 and the ohmic electrode 42 (S101). The process S101 corresponds to the electric field application step ST1 in the evaluation method.
[0045] Next, while the electric field application unit 11 is applying the electric field, the scanning unit 12 drives the laser light source to focus the laser light L1 on the interface 5, and drives the moving table to move the semiconductor element 2 along the XY plane, thereby scanning the interface 5 (S102). The process S102 corresponds to the first scanning step ST2 in the evaluation method.
[0046] Then, while performing scanning by the scanner 12, the evaluation unit 13 measures the photocurrent flowing through the semiconductor element 2 with the ammeter 131 and outputs a photocurrent image (or a line profile) of the interface 5, thereby evaluating the electric field distribution at the interface 5 (S103). The process S103 corresponds to the first evaluation step ST3 in the evaluation method.
[0047] [advantage] As described above, the evaluation system 100 (evaluation method) according to the embodiment is capable of indirectly measuring the actual electric field distribution at the interface 5 by utilizing a large increase in photocurrent due to the Franz-Keldysh effect. Therefore, while it is difficult to accurately calculate the electric field strength at a location where the electric field is concentrated, such as the periphery of the interface 5, in a two-dimensional electromagnetic field simulation, the evaluation system 100 (evaluation method) according to the embodiment has the advantage that it is easy to accurately calculate the electric field strength at a location where the electric field is concentrated at the interface 5. In other words, the evaluation system 100 (evaluation method) according to the embodiment has the advantage that it is easy to accurately evaluate the electric field distribution at the interface 5 between the electrode 4 and the semiconductor 3 in the semiconductor element 2.
[0048] (Other embodiments) Although the evaluation system 100 and evaluation method of the present invention have been described above based on the embodiment, the present invention is not limited to this embodiment. As long as it does not deviate from the gist of the present invention, various modifications conceived by a person skilled in the art to the present embodiment and other forms constructed by combining some of the components of the embodiment are also included within the scope of the present invention.
[0049] In the above-described embodiment, the evaluation system 100 (in the evaluation method) may further evaluate unevenness of the interface 5. The unevenness of the interface 5 may be caused by distortion, grain boundaries, crystal defects, or the like of the semiconductor 3. Specifically, the scanning unit 12 may further perform a second scanning step ST4, and the evaluation unit 13 may further perform a second evaluation step ST5 and a third evaluation step ST6.
[0050] Fig. 10 is a flowchart showing another operation example of the evaluation system 100 according to the embodiment. The operation (evaluation method) example of the evaluation system 100 shown in Fig. 10 is an operation example when further evaluating the non-uniformity of the interface 5. Note that, in the example shown in Fig. 10, steps S201 and S202 are performed, and then steps S203 to S205 are performed, but the order of the steps may be reversed.
[0051] First, the evaluation system 100 (in the evaluation method) executes a second evaluation step ST5 (S202) while executing a second scanning step ST4 (S201). In the second scanning step ST4, the scanning unit 12 drives the laser light source while the electric field application unit 11 is not applying an electric field, thereby focusing the interface 5 and irradiating the laser light L1, which is visible light, and moves the semiconductor element 2 along the XY plane by driving the moving table, thereby scanning the interface 5. That is, in the second scanning step ST4, the interface 5 is scanned at least one-dimensionally by irradiating the interface 5 with visible light while no electric field is applied. Here, the scanning unit 12 scans the interface 5 two-dimensionally, similarly to the first scanning step ST2.
[0052] In the second evaluation step ST5, the evaluation unit 13 measures the photocurrent flowing through the semiconductor element 2 with the ammeter 131 while performing scanning by the scanner 12 (second scanning step ST4). The variation in the measured photocurrent corresponds to the non-uniformity at the interface 5. That is, in the second evaluation step ST5, the photocurrent flowing through the semiconductor element 2 is measured while performing the second scanning step ST4, thereby evaluating the non-uniformity at the interface 5. Here, the evaluation unit 13 evaluates the non-uniformity at the interface 5 by outputting a photocurrent image (or a line profile) of the interface 5.
[0053] Next, the evaluation system 100 (in the evaluation method) executes the voltage application step ST1 (S203) while executing the first scanning step ST2 (S204) and the first evaluation step ST3 (S205). The voltage application step ST1, the first scanning step ST2, and the first evaluation step ST3 have already been described, so their description will be omitted here.
[0054] Then, the evaluation system 100 (in the evaluation method) executes a third evaluation step ST6 (S206). In the third evaluation step ST6, the evaluation unit 13 calculates the difference between the photocurrent image (or line profile) obtained in the second evaluation step ST5 and the photocurrent image (or line profile) obtained in the first evaluation step ST3, thereby evaluating the electric field distribution at the interface 5 from which the non-uniformity at the interface 5 has been eliminated. That is, in the third evaluation step ST6, the non-uniformity at the interface 5 and the electric field distribution are correlated and evaluated based on the evaluation in the first evaluation step ST3 and the evaluation in the second evaluation step ST5.
[0055] The above-described embodiment has an advantage that the unevenness at the interface 5 can be eliminated and the electric field distribution at the interface 5 can be more easily obtained with higher accuracy.
[0056] Furthermore, in the above-described embodiment, the evaluation system 100 (in the evaluation method) may perform a degradation test on the semiconductor element 2. Specifically, the first scanning step ST2 is performed after or while continuing the application of the electric field in the electric field application step ST1 for a predetermined time, which is at least one hour, thereby making it possible to perform a degradation test on the semiconductor element 2. From the viewpoint of accurately estimating the period during which the semiconductor element 2 can withstand use, it is preferable that the predetermined time be, for example, several tens of hours or more.
[0057] The above-described embodiment has the advantage that it is possible to test the deterioration of the semiconductor element 2 caused by application of a voltage for a long period of time, and it is easy to identify weak parts of the semiconductor element 2.
[0058] [Method of manufacturing semiconductor devices] Moreover, by using the evaluation of the electric field distribution at the interface 5 by the evaluation system 100 (evaluation method) according to the above-mentioned embodiment (evaluation by the first evaluation step ST3 or evaluation by the third evaluation step ST6), it is expected that it will be easier to design a semiconductor element 2 provided with a relaxation portion 6 (see FIG. 12) for relaxing the concentration of the electric field in the periphery of the interface 5. That is, the manufacturing method of the semiconductor element 2 is a method of manufacturing the semiconductor element 2 by providing an electrode 4 on the semiconductor 3, and may include a step of providing the relaxation portion 6 for relaxing the concentration of the electric field at a location showing an electric field intensity of a predetermined magnitude or more at the interface 5 based on the evaluation by the evaluation method according to the embodiment. The evaluation of the electric field distribution at the interface 5 can be used to greatly contribute to research and development aimed at increasing the withstand voltage of the electrode 4 in the semiconductor element 2, such as the Schottky electrode 41.
[0059] Fig. 11 is a flow chart showing an example of a method for manufacturing a semiconductor device 2 according to an embodiment. Although omitted in Fig. 11, the method for manufacturing a semiconductor device 2 also includes a step of forming an electrode 4 (ohmic electrode 42). In the example shown in Fig. 11, the electrode 4 (Schottky electrode 41) having a relaxation portion 6 is formed based on the first evaluation (evaluation in the first evaluation step ST3), but the electrode 4 (Schottky electrode 41) having a relaxation portion 6 may be formed based on the third evaluation (evaluation in the third evaluation step ST6).
[0060] First, the semiconductor 3 is created (S301). In step S301, an n-GaN layer 32 doped with silicon (Si) is grown to a thickness of about 2 μm on the upper surface of a GaN substrate 31, for example, by using MOCVD, and an n-GaN layer 33 doped with silicon (Si) is grown to a thickness of about 12 μm on the upper surface of the n-GaN layer 32, thereby creating the semiconductor 3.
[0061] Next, based on the first evaluation, an electrode 4 (Schottky electrode 41) having a relaxation portion 6 is formed (S302). In step S302, the electrode 4 (Schottky electrode 41) is formed on the upper surface of the n-GaN layer 33 by, for example, electron beam evaporation. Then, in step S302, by referring to the first evaluation, the relaxation portion 6 is provided in a portion of the electrode 4 (Schottky electrode 41) where the electric field concentrates. The relaxation portion 6 may be, for example, a field plate electrode or a guard ring structure.
[0062] Here, the inventors of the present application have found a relaxation structure different from the above-mentioned field plate electrode or guard ring structure. Fig. 12 is a cross-sectional view showing a main part of a semiconductor element 2 according to an embodiment. In the example shown in Fig. 12, the relaxation portion 6 as the relaxation structure is a skirt portion 61.
[0063] Bottom portion 61 has a circular ring shape in a plan view (i.e., when viewed from above semiconductor element 2). Bottom portion 61 protrudes from side surface 400 of electrode 4 (Schottky electrode 41) in a direction intersecting side surface 400, and the protruding portion contacts one surface 300 of semiconductor 3 on which electrode 4 (Schottky electrode 41) is provided. Bottom portion 61 begins to protrude from a vertical middle portion of side surface 400, and has a shape in which protrusion length d1 gradually increases toward one surface 300 of semiconductor 3. Here, protrusion length d1 of bottom portion 61 is approximately 10 nm or less. Bottom portion 61 has a thickness of approximately several nm.
[0064] The effect of reducing the electric field concentration by the skirt 61 will be described below using evaluation results when violet light is irradiated as the laser light (predetermined light) L1 to the interface 5. Fig. 13 is a diagram showing a photocurrent image when violet light is irradiated to the interface 5 between the electrode 4 (Schottky electrode 41) provided with the reducing portion 6 (skirt 61) and the semiconductor 3.
[0065] The circular region in Fig. 13 represents the interface 5. The light and dark areas in Fig. 13 correspond to the magnitude of the photocurrent (photoelectron yield Y), with the brighter the area, the larger the photocurrent, and the darker the area, the smaller the photocurrent. The magnitude of the photocurrent (photoelectron yield Y) is expressed in arbitrary units. Furthermore, in Fig. 13, (a) shows the results when the interelectrode voltage is 0V, and (b) shows the results when the interelectrode voltage is -45V.
[0066] The evaluation results shown in Fig. 6, already described, that is, the electric field distribution at the interface 5 between the electrode 4 and the semiconductor 3 where the relaxation section 6 is not provided, confirmed that the electric field was concentrated at the periphery of the interface 5. In contrast to this, the evaluation results shown in Fig. 13, that is, the electric field distribution at the interface 5 between the electrode 4 and the semiconductor 3 where the relaxation section 6 is provided, showed almost no significant increase in the photocurrent due to the Franz-Keldysh effect even when the interelectrode voltage was relatively large (i.e., a relatively high electric field was applied to the interface 5). In this way, it was confirmed that the relaxation section 6 relaxed the electric field concentration at the interface 5.
[0067] Therefore, in the manufacturing method of the semiconductor element 2, in step S302, it is preferable to provide, as the relaxation portion 6, a skirt portion 61 that protrudes from the side surface 400 of the electrode 4 (Schottky electrode 41) and has a protruding length d1 that increases toward the surface 300 on which the electrode 4 (Schottky electrode 41) of the semiconductor 3 is provided.
[0068] [Semiconductor element] The semiconductor element 2 manufactured by the method for manufacturing the semiconductor element 2 described above will be briefly described below.
[0069] The semiconductor element 2 includes a semiconductor 3 and an electrode 4 (Schottky electrode 41) provided on one surface 300 of the semiconductor 3. The electrode 4 (Schottky electrode 41) protrudes from a side surface 400 of the electrode 4 (Schottky electrode 41) and is in contact with the one surface 300 of the semiconductor 3, and has a relaxation portion 6 that relaxes the concentration of an electric field.
[0070] In particular, it is preferable that the relaxation portion 6 be a skirt portion 61 whose protruding length d1 increases toward the surface 300 of the semiconductor 3 .
[0071] Such a semiconductor element 2 has the advantage that it is easy to avoid electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, even if the element 2 does not have an electrode 4 having a complex structure such as a field plate electrode or a guard ring structure.
[0072] (summary) As described above, the evaluation method according to the embodiment includes an electric field application step ST1, a first scanning step ST2, and a first evaluation step ST3. In the electric field application step ST1, an electric field capable of generating the Franz-Keldysh effect is applied to an interface 5 between an electrode 4 and a semiconductor 3 in a semiconductor element 2. In the first scanning step ST2, in a state in which the electric field is applied, the interface 5 is scanned at least one-dimensionally while irradiating the interface 5 with a predetermined light L1 having an energy smaller than the band gap Eg of the semiconductor 3 and a beam diameter smaller than the diameter of the electrode 4. In the first evaluation step ST3, the electric field distribution at the interface 5 is evaluated by measuring a photocurrent flowing through the semiconductor element 2 while performing the first scanning step ST2.
[0073] Such an evaluation method has the advantage that it is easy to accurately obtain the electric field strength at the location where the electric field concentrates at the interface 5, whereas it is difficult to accurately calculate the electric field strength at the location where the electric field concentrates, such as the periphery of the interface 5, with a two-dimensional electromagnetic field simulation. In other words, it has the advantage that it is easy to accurately evaluate the electric field distribution at the interface 5 between the electrode 4 and the semiconductor 3 in the semiconductor element 2.
[0074] Also, for example, in the evaluation method, in the first scanning step ST2, the interface 5 is scanned two-dimensionally.
[0075] Such an evaluation method has the advantage that the electric field distribution at the interface 5 can be obtained two-dimensionally.
[0076] Also, for example, in the evaluation method, the predetermined light L1 is light having a wavelength shorter than that of visible light.
[0077] This evaluation method has the advantage that the photocurrent is more likely to increase significantly due to the Franz-Keldysh effect, as compared to when the specified light L1 is visible light.
[0078] Also, for example, the evaluation method further includes a second scanning step ST4, a second evaluation step ST5, and a third evaluation step ST6. In the second scanning step ST4, the interface 5 is scanned at least one-dimensionally by irradiating the interface 5 with visible light in a state where no electric field is applied. In the second evaluation step ST5, the non-uniformity at the interface 5 is evaluated by measuring the photocurrent flowing through the semiconductor element 2 while performing the second scanning step ST4. In the third evaluation step ST6, the non-uniformity at the interface 5 is correlated with the electric field distribution and evaluated based on the evaluation in the first evaluation step ST3 and the evaluation in the second evaluation step ST5.
[0079] According to such an evaluation method, for example, there is an advantage that it is easy to eliminate unevenness at the interface 5 and obtain the electric field distribution at the interface 5 with higher accuracy.
[0080] Also, for example, in the evaluation method, the first scanning step ST2 is performed after or while continuing the application of the electric field in the electric field application step ST1 for a predetermined time, which is at least one hour or more.
[0081] Such an evaluation method has the advantage that it is possible to test the deterioration of the semiconductor element 2 caused by application of a voltage for a long period of time, and it is easy to identify weak parts of the semiconductor element 2.
[0082] Also, for example, in the evaluation method, the semiconductor element 2 is a Schottky diode.
[0083] This evaluation method has the advantage that, compared to analysis using two-dimensional electromagnetic field simulation, it is easier to accurately determine locations where the electric field is concentrated at interface 5, such as the periphery of interface 5 between Schottky electrode 41 and semiconductor 3.
[0084] Moreover, the evaluation system 100 according to the embodiment includes an electric field application unit 11, a scanning unit 12, and an evaluation unit 13. The electric field application unit 11 applies an electric field that can cause the Franz-Keldysh effect to occur to an interface 5 between an electrode 4 and a semiconductor 3 in a semiconductor element 2. In a state where the electric field is applied, the scanning unit 12 scans the interface 5 at least one-dimensionally while irradiating the interface 5 with a predetermined light L1 having an energy smaller than the band gap Eg of the semiconductor 3 and a beam diameter smaller than the diameter of the electrode 4. The evaluation unit 13 evaluates the electric field distribution at the interface 5 by measuring the photocurrent flowing through the semiconductor element 2 while performing scanning by the scanning unit 12.
[0085] Such evaluation system 100 has an advantage that it is easy to accurately obtain the electric field intensity at the portion where the electric field concentrates at the interface 5, whereas it is difficult to accurately calculate the electric field intensity at the portion where the electric field concentrates, such as the periphery of the interface 5, in the two-dimensional electromagnetic field simulation. In other words, it has an advantage that it is easy to accurately evaluate the electric field distribution at the interface 5 between the electrode 4 and the semiconductor 3 in the semiconductor element 2.
[0086] Furthermore, the manufacturing method of the semiconductor element 2 according to the embodiment is a method for manufacturing the semiconductor element 2 by providing an electrode 4 on a semiconductor 3, and includes a step S302 of providing a relaxation portion 6 for relaxing the concentration of the electric field at a location at the interface 5 that exhibits an electric field strength equal to or greater than a predetermined value based on evaluation by the above-mentioned evaluation method.
[0087] According to such a method for manufacturing the semiconductor element 2, it is easy to manufacture the semiconductor element 2 in which the electric field is less likely to concentrate at the interface 5 between the electrode 4 and the semiconductor 3, and there is an advantage in that it is easy to achieve a high voltage resistance of the semiconductor element 2.
[0088] Also, for example, in the manufacturing method of the semiconductor element 2, in the above-mentioned step S302, a bottom portion 61 is provided as the mitigating portion 6, which protrudes from the side surface 400 of the electrode 4 and has a protruding length d1 that increases toward the surface 300 of the semiconductor 3 on which the electrode 4 is provided.
[0089] Such a manufacturing method for the semiconductor element 2 has the advantage that it is possible to manufacture a semiconductor element 2 in which concentration of an electric field at the interface 5 between the electrode 4 and the semiconductor 3 can be easily avoided, without forming an electrode 4 having a complex structure such as a field plate electrode or a guard ring structure.
[0090] Also, for example, in the method for manufacturing the semiconductor element 2, the semiconductor element 2 is a Schottky diode.
[0091] Such a method for manufacturing the semiconductor element 2 has the advantage that it is easy to manufacture a Schottky diode in which an electric field is not easily concentrated at the interface 5 between the electrode 4 and the semiconductor 3, and it is easy to achieve a high withstand voltage Schottky diode.
[0092] Moreover, the semiconductor element 2 according to the embodiment includes a semiconductor 3 and an electrode 4 provided on one surface 300 of the semiconductor 3. The electrode 4 protrudes from a side surface 400 of the electrode 4, is in contact with the one surface 300 of the semiconductor 3, and has a relaxation portion 6 that relaxes the concentration of an electric field.
[0093] Such a semiconductor element 2 has the advantage that it is easy to avoid electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, even if the element 2 does not have an electrode 4 having a complex structure such as a field plate electrode or a guard ring structure.
[0094] Also, for example, in the semiconductor element 2, the relaxation portion 6 is a skirt portion 61 whose protruding length d1 increases toward the one surface 300 of the semiconductor 3.
[0095] Such a semiconductor element 2 has the advantage that it is easy to avoid electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, even if the element 2 does not have an electrode 4 having a complex structure such as a field plate electrode or a guard ring structure. [Industrial Applicability]
[0096] The present invention can be used as a method for evaluating the interface between an electrode and a semiconductor in a semiconductor element such as a Schottky diode. [Explanation of symbols]
[0097] 100 Rating System 11 Electric field application section 111 DC power supply 12 Scanning section 13 Evaluation Section 131 Ammeter 2. Semiconductor elements 3,3A Semiconductor 31 GaN substrate 32,33 n-GaN layer 300 side 4,4A electrode 41,41A Schottky electrode 42,42A Ohmic electrode 400 Side 5 Interface 6 Relaxation part 61 Hem A1 Electric field lines d1 protruding length Eg Band gap Eg' Effective band gap L1 Laser light (specified light) S101~S103, S201~S206 Processing S301,S302 process ST1 Electric field application step ST2 First scanning step ST3 First evaluation step ST4 Second scanning step ST5 Second evaluation step ST6 Third evaluation step
Claims
1. an electric field application step of applying an electric field capable of generating the Franz-Keldysh effect to an interface between an electrode and a semiconductor in a semiconductor element; a first scanning step of at least one-dimensionally scanning the interface while irradiating the interface with a predetermined light having energy smaller than the band gap of the semiconductor and a beam diameter smaller than a diameter of the electrode in a state in which the electric field is applied; a first evaluation step of evaluating an electric field distribution at the interface by measuring a photocurrent flowing through the semiconductor element while performing the first scanning step; Evaluation method.
2. In the first scanning step, the interface is scanned two-dimensionally. The evaluation method according to claim 1 .
3. The predetermined light is light having a wavelength shorter than that of visible light. The evaluation method according to claim 1 or 2.
4. a second scanning step of scanning the interface at least one-dimensionally by irradiating the interface with visible light in a state in which the electric field is not applied; a second evaluation step of evaluating non-uniformity at the interface by measuring a photocurrent flowing through the semiconductor element while performing the second scanning step; and a third evaluation step of evaluating the nonuniformity at the interface in relation to the electric field distribution based on the evaluation in the first evaluation step and the evaluation in the second evaluation step. The evaluation method according to any one of claims 1 to 3.
5. The first scanning step is performed after or while continuing the application of the electric field in the electric field application step for a predetermined time, which is at least one hour or more. The evaluation method according to any one of claims 1 to 4.
6. The semiconductor element is a Schottky diode. The evaluation method according to any one of claims 1 to 5.
7. an electric field application unit that applies an electric field that can cause the Franz-Keldysh effect to occur to an interface between an electrode and a semiconductor in a semiconductor element; a scanning unit that scans the interface at least one-dimensionally while irradiating the interface with a predetermined light having energy smaller than a band gap of the semiconductor and a beam diameter smaller than a diameter of the electrode in a state in which the electric field is applied; and an evaluation unit that evaluates an electric field distribution at the interface by measuring a photocurrent flowing through the semiconductor element while performing scanning by the scanning unit. Rating system.
8. A method for manufacturing a semiconductor element by providing an electrode on a semiconductor, comprising the steps of: A step of providing a relaxation portion for relaxing electric field concentration at a location showing an electric field intensity of a predetermined magnitude or more at the interface based on an evaluation by the evaluation method according to any one of claims 1 to 6, A method for manufacturing a semiconductor device.
9. In the step, a skirt portion is provided as the relaxation portion, the skirt portion protruding from a side surface of the electrode and having a protruding length that increases toward the surface of the semiconductor on which the electrode is provided. The method for manufacturing a semiconductor device according to claim 8 .
10. The semiconductor element is a Schottky diode. The method for manufacturing a semiconductor device according to claim 8 or 9.
11. Semiconductors and an electrode provided on one surface of the semiconductor; the electrode has a relaxation portion that protrudes from a side surface of the electrode and is in contact with the one surface of the semiconductor, and that relaxes the concentration of an electric field; Semiconductor element.
12. The relaxation portion is a skirt portion whose protruding length increases toward the one surface of the semiconductor. The semiconductor device according to claim 11.
Citation Information
Patent Citations
Manufacture of semiconductor multilayer electrode
JP1984111325A
Semiconductor device and its fabricating method
JP2002043329A
Semiconductor device and method for manufacturing the same
JP2005051096A
Semiconductor device
JP2012054544A
Semiconductor device
JP2013239607A