Amplifier circuit

Abstract

To provide an amplifier circuit in which change in resistance characteristics or deterioration of resistance can be suppressed.SOLUTION: An amplifier circuit comprises: an amplifier that amplifies a high frequency signal input to an input terminal and outputs the amplified high frequency signal to an output terminal; a first inductor having a first end connected to a line between the amplifier and the output terminal; a resistance component 30 comprising an insulating substrate 31 having a first end connected to a second end of the first inductor, mounted on the upper surface of the base substrate and having a thermal conductivity of 20 W / m / K or more and a band gap energy of 1.5 eV or more; a resistance film 36 provided on the upper surface of the insulating substrate; and a first capacitor having a first end connected to the second end of the resistance component and a second end connected to a reference potential, and the absolute value of the impedance of the first inductor at the center frequency of the operating band of the amplifier is more than the absolute value of the impedance of the first capacitor at a frequency corresponding to the bandwidth of the operating band.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an amplifier circuit. [Background technology]

[0002] It is known to provide a baseband termination circuit (video bypass circuit or envelope frequency termination circuit) or the like in a line between an amplifier and an output terminal of a high-output amplifier circuit for high-frequency signals such as microwaves (for example, Patent Documents 1 to 4, Non-Patent Documents 1 and 2). It is also known to provide a resistor in the baseband termination circuit on a substrate mounted on the base of a package (for example, Patent Document 1 or 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-138983 A [Patent Document 2] European Patent Application Publication No. 3273596 [Patent Document 3] Special Publication No. 2006-501678 [Patent Document 4] JP 2018-101975 A [Non-patent literature]

[0004] [Non-Patent Document 1] Hussain Ladhani et.al. “Analysis of the Baseband Termination of High Power RF Transistors” 2019 IEEE / MTT-S International Microwave Symposium [Non-Patent Document 2] Ning Zhu et.al. “Compact High-Efficiency High-Power Wideband GaN Amplifier Supporting 395 MHz Instantaneous Bandwidth” 2019 IEEE / MTT-S International Microwave Symposium Summary of the Invention [Problem to be solved by the invention]

[0005] The baseband termination circuit is configured to show low impedance to signals in the baseband frequency range in order to terminate at a signal reference potential of a baseband frequency lower than the frequency of the amplifier's operating band. The baseband termination circuit is also configured to show high impedance to the frequency of the amplifier's operating band so that signals of that frequency are minimized from flowing in. Therefore, it is considered that most of the high-power output signals amplified by the amplifier are not applied to the resistance of the baseband termination circuit. However, some of the signals in the operating band are applied to the resistance of the baseband termination circuit, which may change the characteristics of the resistance or deteriorate the resistance.

[0006] The present disclosure has been made in consideration of the above-mentioned problems, and aims to suppress changes in resistor characteristics or deterioration of resistors. [Means for solving the problem]

[0007] One embodiment of the present disclosure is an amplifier circuit comprising: an amplifier that amplifies a high-frequency signal input to an input terminal and outputs the amplified high-frequency signal to an output terminal; a first inductor having a first end connected to a line between the amplifier and the output terminal; a resistive component having a first end connected to a second end of the first inductor, the resistive component comprising: an insulating substrate having a thermal conductivity of 20 W / m / K or more and a band gap energy of 1.5 eV or more and mounted on an upper surface of a base substrate; and a first capacitor having a first end connected to the second end of the resistive component and a second end connected to a reference potential, wherein the absolute value of the impedance of the first inductor at a center frequency of an operating band of the amplifier is greater than the absolute value of the impedance of the first capacitor at a frequency corresponding to the bandwidth of the operating band. Effect of the Invention

[0008] According to the present disclosure, changes in resistor characteristics or deterioration of resistors can be suppressed. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a circuit diagram of an amplifier circuit according to a first embodiment. [Diagram 2] FIG. 2 is a circuit diagram of the semiconductor device in the first embodiment. [Diagram 3] FIG. 3 is a plan view of the semiconductor device in the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view taken along line AA of FIG. [Diagram 5] FIG. 5 is a cross-sectional view taken along line BB of FIG. [Figure 6] FIG. 6 is a plan view of the resistance component in the first embodiment. [Figure 7] FIG. 7 is a cross-sectional view taken along line AA in FIG. [Figure 8] FIG. 8 is another circuit diagram of the semiconductor device in the first embodiment. [Figure 9] FIG. 9 is a plan view of a semiconductor device according to a first modification of the first embodiment. [Figure 10]FIG. 10 is a plan view of a semiconductor device according to a second modification of the first embodiment. [Figure 11] FIG. 11 is a circuit diagram of a semiconductor device according to a second embodiment. [Figure 12] FIG. 12 is a plan view of a semiconductor device according to a second embodiment. [Figure 13] FIG. 13 is a plan view of a semiconductor device according to a first modification of the second embodiment. [Figure 14] FIG. 14 is a circuit diagram of a semiconductor device according to a third embodiment. [Figure 15] FIG. 15 is a plan view of a semiconductor device according to a third embodiment. [Figure 16] FIG. 16 is a plan view of a semiconductor device according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] [Description of the embodiments of the present disclosure] First, the contents of the embodiments of the present disclosure will be listed and described. (1) One embodiment of the present disclosure is an amplifier circuit including: an amplifier that amplifies a high-frequency signal input to an input terminal and outputs the amplified high-frequency signal to an output terminal; a first inductor having a first end connected to a line between the amplifier and the output terminal; an insulating substrate having a thermal conductivity of 20 W / m / K or more and a band gap energy of 1.5 eV or more, the insulating substrate being mounted on an upper surface of a base substrate and having a resistive film provided on the upper surface of the insulating substrate; and a first capacitor having a first end connected to the second end of the resistive component and a second end connected to a reference potential, the absolute value of the impedance of the first inductor at a center frequency of an operating band of the amplifier being greater than the absolute value of the impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating band. This makes it possible to suppress changes or deterioration of the characteristics of the resistive components used in a baseband termination circuit due to temperature rise. It is possible to suppress deterioration of the resistive components due to application of high voltage. It is possible to suppress deviation from desired characteristics due to parasitic capacitance. (2) In the above (1), the absolute value of the impedance of the first inductor at a center frequency of the operating band may be 10Ω or more, and the absolute value of the impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating band may be 1Ω or less, thereby allowing the first inductor and the first capacitor to function as a baseband termination circuit. (3) In the above (1) or (2), the inductance of the first inductor may be 100 pH or more, and the capacitance of the first capacitor may be 100 pF or more. This allows the first inductor and the first capacitor to function as a baseband termination circuit. (4) In any one of (1) to (3) above, a matching circuit may be provided on the line, the matching circuit including a second inductor and a second capacitor, the inductance of the first inductor being larger than the inductance of the second inductor, and the capacitance of the first capacitor being larger than the capacitance of the second capacitor, thereby allowing the first inductor and the first capacitor to function as a baseband termination circuit. (5) In any one of the above (1) to (4), the center frequency of the operating band may be 0.5 GHz or more and 10 GHz or less, and the bandwidth of the operating band may be 100 MHz or more. This allows the amplifier circuit to be used in a base station for mobile communication. (6) In the above (5), the saturation power of the high frequency signal output from the output terminal may be equal to or greater than 10 W. This makes it possible to suppress changes or deterioration in the characteristics of a resistance component even when a large power is applied to the resistance component. (7) In any one of the above (1) to (6), the first inductor may include a line pattern provided on an upper surface of the insulating substrate, thereby making it possible to suppress a temperature rise in the first inductor. (8) In any of (1) to (7) above, a third capacitor may be provided between the line and the reference potential, and connected in parallel with the first capacitor. This makes it possible to broaden the frequency band suppressed by the baseband termination circuit. A resistive component can suppress resonance caused by the first capacitor and the second capacitor. (9) In any one of the above (1) to (8), the insulating substrate may be an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate, thereby making it possible to suppress deterioration of the resistance components. (10) In any one of the above (1) to (9), the first capacitor may include a dielectric substrate mounted on the upper surface of the base substrate and an electrode provided on the upper surface of the dielectric substrate and connected to the second end of the resistance component, and the amplifier may include a semiconductor substrate mounted on the upper surface of the base substrate and a transistor provided on the semiconductor substrate, thereby making it possible to miniaturize the amplifier circuit.

[0011] [Details of the embodiment of the present disclosure] Specific examples of semiconductor devices according to embodiments of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0012] [Example 1] As an example of the amplifier circuit, a high-output high-frequency amplifier circuit used in a base station for mobile communication will be described. FIG. 1 is a circuit diagram of the amplifier circuit according to the first embodiment. As shown in FIG. 1, the amplifier circuit 10 includes a semiconductor device 100, an external output matching circuit 72, and an external input matching circuit 74. The semiconductor device 100 includes an amplifier 16, an internal output matching circuit 71, an internal input matching circuit 73, and a baseband termination circuit 70 (also called a video bypass circuit or an envelope frequency termination circuit). An input terminal Tin is connected to the amplifier 16 via the external input matching circuit 74 and the internal input matching circuit 73. The external input matching circuit 74 and the internal input matching circuit 73 match the input impedance of the amplifier 16 with a load connected to the input terminal Tin.

[0013] The amplifier 16 is connected to an output terminal Tout via an internal output matching circuit 71 and an external output matching circuit 72. The internal output matching circuit 71 and the external output matching circuit 72 match the output impedance of the amplifier 16 with the load connected to the output terminal Tout. A high-frequency signal input to the input terminal Tin is transmitted to the amplifier 16 via an external input matching circuit 74 and an internal input matching circuit 73. The amplifier 16 amplifies the high-frequency signal, and outputs the amplified signal to the output terminal Tout via the internal output matching circuit 71 and the external output matching circuit 72.

[0014] A baseband termination circuit 70 is connected between a node N1 between the internal output matching circuit 71 and the external output matching circuit 72 and a reference potential such as ground. The baseband termination circuit 70 is a circuit for improving the VBW (Video Bandwidth). The video bandwidth is used as an index representing the band of distortion. When the VBW is small, when measuring the third order intermodulation distortion (IMD3: 3rd order InterModulation Distortion) of a two-tone signal corresponding to the bandwidth of the amplifier (for example, 400 MHz), a difference in signal strength occurs between the IMD3 component on the low frequency side and the IMD3 component on the high frequency side. When asymmetry occurs in IMD3 in this way, even if distortion compensation is performed by DPD (Digital Predistortion), the amount of distortion improvement decreases and sufficient distortion characteristics cannot be obtained (for example, see Non-Patent Document 1). A known cause of this asymmetry in IMD3 is the second order intermodulation distortion IMD2 component occurring in the difference frequency component of the two-tone signal. This difference frequency component is a signal component in a low frequency band included in the range of the baseband frequency. Therefore, by providing the baseband termination circuit 70, the impedance of the low frequency band at the node N1 is lowered, and the video bandwidth is increased and the IMD2 component is suppressed. This improves the asymmetry of IMD3, and enables sufficient distortion compensation by DPD.

[0015] Fig. 2 is a circuit diagram of the semiconductor device in Example 1. As shown in Fig. 2, the semiconductor device 100 includes a package 11. An amplifier 16, an internal output matching circuit 71, an internal input matching circuit 73, and a baseband termination circuit 70 are mounted in the package 11. An output lead 50 and an input lead 51 connect the circuits in the package 11 to the outside.

[0016] The amplifier 16 includes a transistor 18. The transistor 18 is a FET (Field Effect Transistor), such as a GaN HEMT (Gallium Nitride High Electron Mobility Transistor) or an LDMOS (Laterally Diffused Metal Oxide Semiconductor). A source S of the transistor 18 is grounded. A G of the transistor 18 is electrically connected to an input lead 51 via an internal input matching circuit 73. A drain D of the transistor 18 is electrically connected to an output lead 50 via an internal output matching circuit 71.

[0017] The internal output matching circuit 71 includes an inductor L11. The internal output matching circuit 71 may be a low-pass circuit having two inductors connected in series and a capacitor connected in shunt to a node between the two inductors. The internal output matching circuit 71 may be a high-pass circuit having inductors connected in series, a shunt-connected inductor, and a DC cut capacitor connected between the inductor and ground. The number of inductors and the number of capacitors in the internal output matching circuit 71 can be set appropriately.

[0018] The internal input matching circuit 73 is an LCL T-type low-pass circuit and includes inductors L21, L22 and a capacitor C21. The internal input matching circuit 73 may include only one inductor connected in series. The internal input matching circuit 73 may be a low-pass circuit in which two LCL T-type low-pass circuits are connected in series. The internal input matching circuit 73 may be a circuit in which an inductor and a capacitor connected in series are shunt-connected in the rear stage of an LCL T-type low-pass circuit. The number of inductors and the number of capacitors in the internal input matching circuit 73 can be set appropriately.

[0019] The baseband termination circuit 70 includes an inductor L1, a resistor R1, and a capacitor C1. The inductor L1 (first inductor) has a first end electrically connected to a node N1 of a line between the amplifier 16 and the output lead 50. The first end of the resistor R1 is electrically connected to a second end of the inductor L1. The first end of the capacitor C1 (first capacitor) is electrically connected to the second end of the resistor R1, and the second end of the capacitor C1 is electrically connected to a reference potential.

[0020] The inductor L1 has a function of suppressing a high-frequency signal in the operating band (for example, 0.5 GHz or more and 10 GHz or less) amplified by the amplifier 16 from passing through the capacitor C1 to the ground. For this reason, the inductor L1 has an inductance that provides high impedance in the frequency band of the operating band. The inductor L1 has an inductance of, for example, 1 nH or more. The capacitor C1 has low impedance at a frequency (for example, greater than 0 MHz and less than 400 MHz) corresponding to the bandwidth of the high-frequency signal amplified by the amplifier 16. For this reason, the capacitor C1 has a large capacitance and is large in size. The capacitance of the capacitor C1 is, for example, 1 nF or more. The resistor R1 is a damping resistor. For example, if a capacitor (for example, a parasitic capacitance) is connected in parallel with the capacitor C1 and the inductor L1, there is a possibility that unwanted resonance will occur. By providing the resistor R1, the unwanted resonance can be suppressed. The resistance value of the resistor R1 is, for example, 1 Ω or more and 100 Ω or less.

[0021] Fig. 3 is a plan view of the semiconductor device in Example 1. Figs. 4 and 5 are cross-sectional views taken along lines AA and BB in Fig. 3, respectively. Lid 13 is not shown in Fig. 3. The normal direction to the upper surface of base substrate 12 is defined as Z direction, the direction from input lead 51 to output lead 50 is defined as X direction, and the direction perpendicular to the X direction and Z direction is defined as Y direction.

[0022] As shown in FIG. 3 to FIG. 5, in the semiconductor device 100 of the first embodiment, the package 11 has a base substrate 12, a frame 14, and a lid 13. The base substrate 12 is a conductive substrate such as a laminated substrate of copper and molybdenum. A reference potential such as a ground potential is supplied to the base substrate 12. The frame 14 and the lid 13 are dielectric layers made of resin or ceramic such as FR-4 (Flame Retardant Type 4). The semiconductor chip 20, the resistive component 30, and the capacitive components 25 and 40 are mounted on the base substrate 12. The capacitive component 25 and the semiconductor chip 20 are arranged in the X direction. The frame 14 is provided on the base substrate 12 so as to surround the semiconductor chip 20, the resistive component 30, and the capacitive components 25 and 40. The frame 14 is bonded to the upper surface of the base substrate 12 by a bonding layer (not shown) such as a metal paste or a brazing material. The lid 13 is bonded to the upper surface of the frame 14 by an insulating adhesive (not shown) such as a resin. The frame 14 and the lid 13 seal the semiconductor chip 20 within the cavity.

[0023] The planar shape of the frame 14 is substantially rectangular. The input lead 51 and the output lead 50 are substantially T-shaped. The input lead 51 and the output lead 50 may each be integrally formed from the same metal layer or metal plate. The input lead 51 and the output lead 50 may each be a rod-shaped lead joined onto a metal layer provided on the frame 14. The input lead 51 and the output lead 50 are, for example, a metal layer or metal plate made of copper or the like.

[0024] The semiconductor chip 20 includes a semiconductor substrate 21, electrodes 22 and 23 provided on the upper surface of the semiconductor substrate 21, and an electrode 24 formed on the lower surface of the semiconductor substrate 21. The electrodes 22, 23, and 24 are a gate electrode, a drain electrode, and a source electrode, respectively, and the electrodes 22 and 23 are an input pad and an output pad, respectively. The semiconductor substrate 21 includes the transistor 18 shown in FIG. 2. When the transistor 18 is a GaN HEMT, the semiconductor substrate 21 is, for example, a silicon carbide (SiC) substrate, a sapphire substrate, or a gallium nitride (GaN) substrate. When the transistor 18 is an LDMOS, the semiconductor substrate 21 is, for example, a silicon (Si) substrate. The electrodes 22, 23, and 24 are, for example, metal layers such as gold layers.

[0025] The capacitive component 25 includes a dielectric substrate 26, an electrode 27 provided on the upper surface of the dielectric substrate 26, and an electrode 28 provided on the lower surface of the dielectric substrate 26. The dielectric substrate 26 and the electrodes 27 and 28 sandwiching the dielectric substrate 26 form a capacitor C21 shown in FIG. 2. The capacitive component 40 includes a dielectric substrate 41, an electrode 42 provided on the upper surface of the dielectric substrate 41, and an electrode 43 provided on the lower surface of the dielectric substrate 41. The dielectric substrate 41 and the electrodes 42 and 43 sandwiching the dielectric substrate 41 form a capacitor C1 shown in FIG. 2. The dielectric substrate 26 is, for example, alumina, and the dielectric substrate 41 is, for example, a high dielectric material having a higher relative dielectric constant than alumina, such as barium titanate. The electrodes 27, 28, 42, and 43 are, for example, metal layers such as gold layers.

[0026] FIG. 6 is a plan view of the resistance component in the first embodiment. FIG. 7 is a cross-sectional view taken along line AA in FIG. 6. As shown in FIGS. 6 and 7, the resistance component 30 includes an insulating substrate 31, a line pattern 32 provided on the upper surface of the insulating substrate 31, a pad 33, electrodes 34 and 35, and a resistance film 36. A bonding wire 64 is connected to the pad 33. The line pattern 32 is a line pattern extending in the X direction. The planar shape of the line pattern 32 may be a spiral shape or a meandering shape. Electrodes 34 and 35 are provided on both ends of the resistance film 36 in the X direction, respectively, in electrical contact with each other. The resistance film 36 forms the resistor R1 shown in FIG. 2. The line pattern 32 forms a part of the inductor L1 shown in FIG. 2. The resistance film 36 is made of, for example, tantalum nitride (TaN or Ta 2 The insulating substrate 31 is made of a metal nitride film or a metal oxide film such as NiN, or an alloy film such as a NiCr alloy. An electrode 38 is provided on the lower surface of the insulating substrate 31. The line pattern 32, the pad 33, and the electrodes 34, 35, and 38 are formed, for example, from the same metal layer, for example a gold layer.

[0027] The electrodes 24, 38, 28, and 43 of the semiconductor chip 20, the resistive component 30, and the capacitive components 25 and 40, respectively, are joined to the upper surface of the base substrate 12 by a joining layer 48 such as a metal paste or a brazing material. As a result, the potentials of the electrodes 24, 28, 38, and 43 become the reference potential supplied to the base substrate 12.

[0028] Bonding wire 61 electrically connects input lead 51 and electrode 27. Bonding wire 62 electrically connects electrodes 27 and 22. Bonding wire 63 electrically connects electrode 23 and output lead 50. Bonding wire 64 electrically connects output lead 50 and pad 33. Bonding wire 65 electrically connects electrodes 35 and 42. Bonding wires 61 to 65 extend approximately in the X direction in a plan view. Bonding wires 61, 62, and 63 form inductors L21, L22, and L11, respectively, in FIG. 2. Bonding wire 64 forms a part of inductor L1 in FIG. 2.

[0029] FIG. 8 is another circuit diagram of the semiconductor device in the first embodiment. As shown in FIG. 8, an inductor L2 is provided between a resistor R1 and a capacitor C1. A first end of the inductor L2 is electrically connected to a second end of the resistor R1, and a second end of the inductor L2 is electrically connected to a first end of the capacitor C1. The bonding wire 65 shown in FIG. 3 and FIG. 5 forms the inductor L2 in FIG. 8. The inductor L2 does not have to be provided. When the bonding wire 65 is provided to electrically connect the resistive component 30 and the capacitive component 40, the inductor L2 is formed. The inductance of the inductor L2 is smaller than the inductance of the inductor L1, for example, 1 / 2 or less of the inductance of the inductor L1.

[0030] Problems when a silicon substrate or an alumina substrate is used as the insulating substrate 31 of the resistor component 30 will be described. Silicon substrates and alumina substrates are inexpensive and therefore easy to use insulating substrates. In the baseband termination circuit 70, the inductor L1 prevents almost all high-frequency signals in the operating band from passing through the resistor R1. For this reason, it was thought that a signal with a large power would not be applied to the resistor R1. However, for example, in the amplifier circuit 10 for a base station, the saturation power of the output signal in the operating band output by the amplifier 16 is 10 W or more, and the amplitude of the output signal is 50 V or more. If the inductor L1 does not sufficiently suppress the output signal, a part of the output signal is applied to the resistor R1, and the temperature of the resistor R1 rises. This causes the resistance value of the resistor R1 to change from the desired value. In addition, the resistor R1 deteriorates due to temperature.

[0031] Furthermore, for example, when the bias voltage of the drain D of the transistor 18 is 50V, the amplitude of the output signal may be about 100V. The voltage of the output signal that cannot be completely suppressed by the inductor L1 is applied to the resistor R1. Furthermore, during operation or testing, the voltage applied to the resistor R1 may be about 200V. When such a high voltage is applied to the resistor R1, the resistor R1 deteriorates. Furthermore, if the parasitic capacitance added to the resistor R1 is large, the baseband termination circuit 70 may not have the desired characteristics.

[0032] Table 1 shows the thermal conductivity, band gap energy, and dielectric constant of each material. 2 O 3 , AlN, GaN, and SiC respectively refer to silicon, alumina (aluminum oxide), aluminum nitride, gallium nitride, and silicon carbide. Band gap refers to band gap energy. Note that materials with larger band gap energy are considered to have higher withstand voltage. [Table 1]

[0033] When a silicon substrate is used as insulating substrate 31, silicon has high thermal conductivity. This makes it possible to suppress a rise in temperature of resistance component 30. However, silicon has a small band gap energy and a low withstand voltage. This causes resistance component 30 to deteriorate when a high voltage is applied to resistor R1. Silicon also has a high dielectric constant. This causes parasitic capacitance, causing the characteristics of baseband termination circuit 70 to deviate from the desired characteristics.

[0034] When an alumina substrate is used as the insulating substrate 31, alumina has a higher band gap energy and a higher withstand voltage than silicon. This makes it possible to suppress deterioration of the resistive component 30 even when a high voltage is applied to the resistor R1. Alumina also has a lower dielectric constant than silicon, making it possible to suppress deviation of the characteristics of the baseband termination circuit 70 from the desired characteristics. However, alumina has a low thermal conductivity. This causes the temperature of the resistive component 30 to rise, resulting in a change in the resistance value.

[0035] When the baseband termination circuit 70 is provided in the amplifier circuit 10, a substrate having a thermal conductivity of 20 W / m / K or more and a band gap energy of 1.5 eV or more is used as the insulating substrate 31 of the resistance component 30 forming the resistor R1. By setting the thermal conductivity of the insulating substrate 31 to 20 W / m / K or more, the thermal conductivity of the insulating substrate 31 is higher than that of alumina. This makes it possible to suppress a temperature rise in the resistance component 30. From the viewpoint of suppressing a temperature rise, the thermal conductivity of the insulating substrate 31 is, for example, 50 W / m / K or more, and 100 W / m / K or more. The thermal conductivity of the insulating substrate 31 is 1000 W / m / K or less for a general material. By setting the band gap energy of the insulating substrate 31 to 1.5 eV or more, the band gap energy is higher than that of silicon. This makes it possible to suppress deterioration of the resistance component 30 even if a high voltage is applied to the resistor R1. From the viewpoint of improving the withstand voltage, the band gap energy of the insulating substrate 31 is, for example, 2.0 eV or more, and 3.0 eV or more. Regarding the thermal conductivity of the insulating substrate 31, the band gap energy of a general material is 10 eV or less.

[0036] When an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate is used as the insulating substrate 31, the thermal conductivity of the insulating substrate 31 can be made higher than that of alumina, and the withstand voltage can be made higher than that of silicon. Since aluminum nitride has a higher band gap energy than gallium nitride and silicon carbide, an aluminum nitride substrate can be used as the insulating substrate 31 to improve the withstand voltage. The relative dielectric constants of aluminum nitride, gallium nitride, and silicon carbide are lower than the relative dielectric constants of silicon and alumina. This makes it possible to suppress deviation of the characteristics of the baseband termination circuit 70 from the desired characteristics due to parasitic capacitance. The relative dielectric constant of the insulating substrate 31 can be, for example, 10 or less. The aluminum nitride substrate, the gallium nitride substrate, or the silicon carbide substrate used as the insulating substrate 31 is, for example, polycrystalline or single crystalline. By using a polycrystalline substrate or a sintered substrate as the insulating substrate 31, an inexpensive insulating substrate 31 can be used. The thickness of the insulating substrate 31 is, for example, 300 μm or less, 200 μm or less, or 100 μm or less. This makes it possible to suppress a rise in temperature of the resistance component 30. From the viewpoint of manufacturing, the thickness of the resistance component 30 is, for example, 10 μm or more.

[0037] In the baseband termination circuit 70, the absolute value of the impedance of the inductor L1 at the center frequency of the operating band of the amplifier 16 is greater than the absolute value of the impedance of the capacitor C1 at a frequency corresponding to the bandwidth of the operating band. As a result, the inductor L1 suppresses high-frequency signals in the operating band from leaking to the reference potential, and the capacitor C1 passes low-frequency signals to the reference potential. Thus, the inductor L1 and the capacitor C1 can function as the baseband termination circuit 70. The absolute value of the impedance of the inductor L1 can be 10 times or more, and can be 20 times or more, the absolute value of the impedance of the capacitor C1 at a frequency corresponding to the bandwidth of the operating band.

[0038] The absolute value of the impedance of the inductor L1 is, for example, 10 Ω or more and 100 Ω or more. The absolute value of the impedance of the capacitor C1 is, for example, 1 Ω or less and 0.1 Ω or less. This allows the inductor L1 and the capacitor C1 to function as the baseband termination circuit 70.

[0039] The inductance of the inductor L1 is, for example, 100 pH or more, and 1 nH or more. The capacitance of the capacitor C1 is, for example, 100 pF or more, and 1 nF or more. If the inductor L1 and the capacitor C1 are too large, the semiconductor device becomes large. From this point of view, the inductance of the inductor L1 is 1 μH or less, and the capacitance of the capacitor C1 is 1 μF or less. This allows the inductor L1 and the capacitor C1 to function as the baseband termination circuit 70.

[0040] When the amplifier circuit 10 is used in a mobile communication base station, the center frequency of the operating band of the amplifier 16 is, for example, 0.5 GHz or more and 10 GHz or less, and the bandwidth of the operating band is, for example, 0.01 times or more and 0.5 times or less of the center frequency of the operating band. The center frequency of the operating band of the amplifier 16 may be 0.5 GHz or more and 5 GHz or less, and is 0.1 times or more and 0.3 times or less of the center frequency of the operating band.

[0041] The saturation power of the high frequency signal output from the output terminal Tout (e.g., the saturation power of the amplifier 16) is, for example, 10 W or more, 100 W or more, or 500 W or more. In such a case, a signal of high power may be applied to the resistance component 30. Therefore, an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate is used as the insulating substrate 31. This makes it possible to suppress changes or deterioration in the characteristics of the resistance component 30 even if a large power is applied to the resistance component 30. The saturation power output from the output terminal Tout is, for example, 1500 W or less.

[0042] It is sufficient that the resistive component 30 mounted on the base substrate 12 forms the resistor R1, and the capacitor C1 and the amplifier 16 do not have to be provided in the capacitive component 25 and the semiconductor chip 20, respectively. The capacitor C1 and the amplifier 16 are provided in the capacitive component 25 and the semiconductor chip 20, respectively, which are mounted on the base substrate 12. This allows the semiconductor device 100 to be miniaturized.

[0043] [Modification 1 of Example 1] Fig. 9 is a plan view of a semiconductor device according to Modification 1 of Example 1. As shown in Fig. 9, in a semiconductor device 102 according to Modification 1 of Example 1, the resistance component 30 is not provided with the line pattern 32 and the pad 33. The bonding wire 64 electrically connects the output lead 50 and the electrode 34. The bonding wire 64 forms the inductor L1 in Fig. 2. The other configurations are the same as those of Example 1, and therefore description thereof will be omitted.

[0044] [Modification 2 of Example 1] FIG. 10 is a plan view of a semiconductor device according to a second modification of the first embodiment. As shown in FIG. 10, in the semiconductor device 104 according to the second modification of the first embodiment, a wiring component 30a is provided in addition to the resistance component 30. The wiring component 30a includes an insulating substrate 31a, a line pattern 32a provided on the upper surface of the insulating substrate 31a, pads 33a and 34a, and an electrode (not shown) provided on the lower surface of the insulating substrate 31a. The electrode on the lower surface of the insulating substrate 31a is joined to the base substrate 12 by a conductive bonding layer, and a reference potential is supplied to the electrode. The bonding wire 64, the line pattern 32a, and the bonding wire 66 form the inductor L1 in FIG. 2. The insulating substrates 31 and 31a may be substrates of the same material or substrates of different materials. From the viewpoint of suppressing deviation of the characteristics of the baseband termination circuit 70 from the desired characteristics due to temperature rise in the wiring component 30a, deterioration due to high voltage, and parasitic capacitance, the insulating substrate 31a may be an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate. The other configurations are the same as those in the first embodiment, and therefore the description will be omitted.

[0045] As in the first embodiment and its first and second modifications, the inductor L1 may be formed by the bonding wire 64, or may be formed by the bonding wire 64 and the line pattern 32 or 32a. As in Patent Document 1, at least a part of the inductor L1 may be a line pattern provided on the frame 14.

[0046] In order to prevent the temperature of the inductor L1 from increasing due to the current flowing through the inductor L1, the insulating substrate 31 or 31a on which the line pattern 32 or 32a is provided is made of a substrate having a thermal conductivity of 20 W / m / K or more and a band gap energy of 1.5 eV or more, such as an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate. For miniaturization, the line pattern 32 may be provided on the resistance component 30.

[0047] As in the second modification of the first embodiment, when the line pattern 32a forming part of the inductor L1 is provided in the wiring component 30a separate from the resistive component 30, the material of the insulating substrate 31a may be the same as or different from that of the insulating substrate 31. The line pattern 32a does not generate as much heat as the resistive film 36. Therefore, the thermal conductivity of the insulating substrate 31a may be lower than that of the insulating substrate 31.

[0048] [Example 2] FIG. 11 is a circuit diagram of a semiconductor device in the second embodiment. As shown in FIG. 11, the semiconductor device 106 in the second embodiment is provided with an inductor L3 and a capacitor C2, in comparison with FIG. 8 in the first embodiment. A first end of the inductor L3 is electrically connected to a node N2 between the inductor L1 and the resistor R1. A first end of the capacitor C2 is electrically connected to a second end of the inductor L3, and a second end of the capacitor C2 is electrically connected to a reference potential. The capacitance of the capacitor C2 is different from the capacitance of the capacitor C1. For example, the capacitance of the capacitor C2 is 1 / 2 or less of the capacitance of the capacitor C1. This allows the frequency band suppressed by the baseband termination circuit 70 to be increased.

[0049] FIG. 12 is a plan view of a semiconductor device in the second embodiment. As shown in FIG. 12, in the semiconductor device 106 in the second embodiment, a capacitive component 45 is provided on a base substrate 12. The capacitive component 45 includes a dielectric substrate 46, an electrode 47 provided on an upper surface of the dielectric substrate 46, and an electrode (not shown) provided on a lower surface of the dielectric substrate 46. The electrode on the lower surface of the dielectric substrate 46 is joined to the base substrate 12 by a conductive bonding layer, and a reference potential is supplied. A bonding wire 67 electrically connects the electrodes 34 and 47. The capacitor C2 shown in FIG. 11 is formed by the dielectric substrate 46, the electrode 47 sandwiching the dielectric substrate 46, and the electrode on the lower surface of the dielectric substrate 46. The inductor L3 shown in FIG. 11 is formed by the bonding wire 67. The dielectric substrates 46 and 41 may be substrates of the same material or may be substrates of different materials. The inductor L3 may not be provided. When a bonding wire 67 is provided to electrically connect the resistive component 30 and the capacitive component 45, the inductor L3 is formed. The inductance of the inductor L3 is smaller than the inductance of the inductor L1, for example, equal to or smaller than half the inductance of the inductor L1.

[0050] 11 is a line pattern or via wiring that connects the electrodes 34 and 47. The inductance of the inductor L3 is smaller than the inductance of the bonding wire 67.

[0051] [Modification 1 of Example 2] FIG. 13 is a plan view of a semiconductor device in the first modification of the second embodiment. As shown in FIG. 13, in the semiconductor device 108 in the first modification of the second embodiment, the lead 52 is provided on the frame 14. The bonding wire 68 electrically connects the electrode 34 and the lead 52. The end of the lead 52 extends outside the package 11 and is electrically connected to a first end of the external capacitive component 54. The second end of the capacitive component 54 is electrically connected to the reference potential. The bonding wire 68 and the lead 52 form the inductor L3 in FIG. 11, and the capacitive component 54 corresponds to the capacitor C2. By making the capacitive component 54 external, the capacitance of the capacitor C2 can be increased. The capacitance of the capacitor C2 is, for example, larger than the capacitance of the capacitor C1, for example, twice or more the capacitance of the capacitor C1. This allows the frequency band suppressed by the baseband termination circuit 70 to be increased. The other configurations are the same as those in the second embodiment, and will not be described.

[0052] In the second embodiment and its modified examples, the first end of the bonding wire 67 or 68 may be connected to the electrode 35 instead of the electrode 34, or may be connected to the pad 33. Although an example in which one capacitor C2 is provided has been described, two or more capacitors C2 connected in parallel to the capacitor C1 may be provided between the node N1 and the reference potential. The first and second modified examples of the first embodiment may include the capacitor C2.

[0053] As in the second embodiment and its modified example, the capacitor C2 (third capacitor) is connected in parallel with the capacitor C1 between the line between the amplifier 16 and the output terminal Tout and the reference potential. By making the capacitances of the capacitors C1 and C2 different, the frequency band suppressed by the baseband termination circuit 70 can be widened. In addition, resonance is likely to occur due to the capacitors C1 and C2. For this reason, the resonance can be suppressed by providing the resistor R1.

[0054] [Example 3] Fig. 14 is a circuit diagram of a semiconductor device according to a third embodiment. As shown in Fig. 14, in a semiconductor device 110 according to the third embodiment, an internal output matching circuit 71 is an LCL T-type low-pass circuit, and includes inductors L11, L12, and a capacitor C11. The inductors L11 and L12 are connected in series between an amplifier 16 and a node N1. The capacitor C11 is shunt-connected to a node N3 between the inductors L11 and L12.

[0055] FIG. 15 is a plan view of a semiconductor device in the third embodiment. As shown in FIG. 15, in the semiconductor device 110 in the third embodiment, in addition to the semiconductor chip 20, the capacitive components 25 and 40, and the resistive component 30, a capacitive component 25a is mounted in one package 11. The capacitive component 25a includes a dielectric substrate 26a, an electrode 27a provided on the upper surface of the dielectric substrate 26a, and an electrode (not shown) provided on the lower surface of the dielectric substrate 26a. The dielectric substrate 26a, the electrode 27a sandwiching the dielectric substrate 26a, and an electrode not shown form a capacitor C11 shown in FIG. 14. The configurations of the dielectric substrate 26a and the electrode 27a of the capacitive component 25a are the same as those of the capacitive component 25.

[0056] The bonding wire 63 electrically connects the electrodes 23 and 27a. The bonding wire 69 electrically connects the electrode 27a and the output lead 50. The bonding wires 63 and 69 form the inductors L11 and L12, respectively, of FIG.

[0057] The internal output matching circuit 71 may include inductors L11 and L12 (second inductors) and a capacitor C11 (second capacitor). The capacitance of the capacitor C11 used in the matching circuit is small, 10 pF or less. Therefore, the capacitance of the capacitor C1 is larger than the capacitance of the capacitor C11, for example, 10 times or more, 100 times or more. Moreover, the inductances of the inductors L11 and L12 used in the matching circuit are small, 10 nH or less. Therefore, the inductance of the inductor L1 is larger than the inductors L11 and L12, for example, 10 times or more, 100 times or more. This allows the inductor L1 and the capacitor C1 to function as the baseband termination circuit 70. The other configurations are the same as those in the first embodiment, and description thereof will be omitted.

[0058] [Example 4] Example 4 is an example in which a plurality of semiconductor chips are provided in a package. FIG. 16 is a plan view of the semiconductor device in Example 4. As shown in FIG. 16, in the semiconductor device 112 of Example 4, two sets 56 and 58 of the semiconductor chip 20, the capacitive components 25 and 40, the resistive component 30, the input lead 51, and the output lead 50 are provided in one package 11. The two sets 56 and 58 are arranged in the Y direction. The set 56 is, for example, a main amplifier of a Doherty amplifier circuit. The set 58 is, for example, a peak amplifier of a Doherty amplifier circuit. Three or more sets 56 and 58 may be provided. The other configurations are the same as those of Example 1, and description thereof will be omitted. In the modified example of Example 1, Example 2, and the modified examples thereof, a plurality of sets 56 and 58 may be provided.

[0059] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is defined by the claims, not by the above meaning, and is intended to include all modifications within the scope and meaning equivalent to the claims. [Explanation of symbols]

[0060] 10 Amplification circuit 11 Packages 12 Base board 13 Lid 14 Frame 16 Amplifier 18 Transistor 20. Semiconductor Chips 21 Semiconductor substrate 22, 23, 24, 27, 28, 34, 35, 38, 42, 43, 47 electrode 25, 40, 45, 54 Capacitive components 26, 41, 46 Dielectric substrate 30 Resistance Components 30a Wiring parts 31, 31a Insulating substrate 32, 32a track pattern 33, 33a, 34a Pads 36 Resistive Film 48 Bonding layer 50 Output Leads 51 Input Lead Sets 56 and 58 61, 62, 63, 64, 65, 66, 67, 68 Bonding wire 70 Baseband termination circuit 71 Internal output matching circuit 72 External output matching circuit 73 Internal input matching circuit 74 External input matching circuit 100, 102, 104, 106, 108, 110 Semiconductor device

Claims

1. an amplifier that amplifies a high-frequency signal input to an input terminal and outputs the amplified high-frequency signal to an output terminal; a first inductor having a first end connected to a line between the amplifier and the output terminal; a resistance component including: an insulating substrate having a first end connected to the second end of the first inductor, the insulating substrate being mounted on an upper surface of a base substrate, the insulating substrate having a thermal conductivity of 20 W / m / K or more and a band gap energy of 1.5 eV or more; and a resistive film provided on the upper surface of the insulating substrate; a first capacitor having a first end connected to the second end of the resistive component and a second end connected to a reference potential; Equipped with An amplifier circuit in which the absolute value of the impedance of the first inductor at a center frequency of an operating band of the amplifier is greater than the absolute value of the impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating band.

2. 2. The amplifier circuit according to claim 1, wherein an absolute value of the impedance of the first inductor at a center frequency of the operating band is 10 Ω or more, and an absolute value of the impedance of the first capacitor at a frequency corresponding to a bandwidth of the operating band is 1 Ω or less.

3. The inductance of the first inductor is 100 pH or more; 3. The amplifier circuit according to claim 1, wherein the capacitance of the first capacitor is 100 pF or more.

4. a matching circuit provided on the line, the matching circuit including a second inductor and a second capacitor; The inductance of the first inductor is greater than the inductance of the second inductor, 3. The amplifier circuit according to claim 1, wherein the capacitance of the first capacitor is greater than the capacitance of the second capacitor.

5. the center frequency of the operating band is greater than or equal to 0.5 GHz and less than or equal to 10 GHz; 3. The amplifier circuit according to claim 1, wherein the bandwidth of the operating band is 100 MHz or more.

6. 6. The amplifier circuit according to claim 5, wherein the saturation power of the high frequency signal output from the output terminal is 10 W or more.

7. 3. The amplifier circuit according to claim 1, wherein the first inductor includes a line pattern provided on an upper surface of the insulating substrate.

8. 3. The amplifier circuit according to claim 1, further comprising a third capacitor connected in parallel with the first capacitor between the line and the reference potential.

9. 3. The amplifier circuit according to claim 1, wherein the insulating substrate is an aluminum nitride substrate, a gallium nitride substrate, or a silicon carbide substrate.

10. the first capacitor includes a dielectric substrate mounted on an upper surface of the base substrate, and an electrode provided on the upper surface of the dielectric substrate and connected to a second end of the resistance component; 3. The amplifier circuit according to claim 1, wherein the amplifier comprises: a semiconductor substrate mounted on an upper surface of the base substrate; and a transistor provided on the semiconductor substrate.

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