Photoelectric conversion device, and apparatus

Abstract

To reduce noise or power consumption in reading signals from pixels.SOLUTION: A photoelectric conversion device comprises: pixels that each include a photoelectric conversion part accumulating electric charges according to incident light, generate photoelectric conversion signals according to the accumulated electric charges, and output the generated photoelectric conversion signals; sample and hold units that each sample and hold a first photoelectric conversion signal and a second photoelectric conversion signal output from the pixel; and over-sampling type conversion units that each perform analog-digital (AD) conversion of the first photoelectric conversion signal and the second photoelectric conversion signal output from the sample and hold unit. In processing from when the first photoelectric conversion signal and the second photoelectric conversion signal are generated until when the AD conversion of the first photoelectric conversion signal and the second photoelectric conversion signal is performed, a gain set in correspondence with the first photoelectric conversion signal and a gain set in correspondence with the second photoelectric conversion signal, are different from each other.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a photoelectric conversion device and equipment.

Background Art

[0002] There is a solid-state imaging device having a delta-sigma (ΔΣ) type analog-to-digital (AD) conversion circuit, which is one of oversampling type AD conversion circuits. Patent Document 1 discloses a solid-state imaging device capable of coping with a wide input voltage range by providing two capacitive elements for storing signals from pixels and outputting a weighted average of the voltages stored in the two capacitive elements.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a photoelectric conversion device configured with an oversampling type AD conversion circuit such as the ΔΣ type AD conversion circuit shown in Patent Document 1, there is room for improvement in optimizing the operation of AD conversion.

[0005] An object of the present invention is to provide a photoelectric conversion device capable of reducing noise or power consumption when reading a signal from a pixel.

Means for Solving the Problems

[0006] According to one disclosure of the present specification, a pixel includes a photoelectric conversion unit that accumulates charges in response to incident light, generates a photoelectric conversion signal in response to the accumulated charges, and outputs the generated photoelectric conversion signal, a sample hold unit that samples and holds a first photoelectric conversion signal and a second photoelectric conversion signal output from the pixel, and an oversampling type conversion unit that performs analog-to-digital (AD) conversion on the first photoelectric conversion signal and the second photoelectric conversion signal output from the sample hold unit. In the process from when the first photoelectric conversion signal and the second photoelectric conversion signal are generated to when they are AD converted, a gain set corresponding to the first photoelectric conversion signal and a gain set corresponding to the second photoelectric conversion signal are different. A photoelectric conversion device is provided.

Advantages of the Invention

[0007] According to the present invention, it is possible to reduce noise or power consumption when reading a signal from a pixel.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying Out the Invention

[0009] Hereinafter, each embodiment will be described with reference to the drawings. Note that the following embodiments do not limit the invention according to the claims. Although a plurality of features are described in the embodiments, not all of these plurality of features are essential to the invention, and the plurality of features may be arbitrarily combined. Further, in the accompanying drawings, the same or similar configurations are denoted by the same reference numerals, and redundant explanations are omitted. In each of the embodiments described below, as an example of a photoelectric conversion device, a sensor for imaging will be mainly described. However, each embodiment is not limited to a sensor for imaging, and is also applicable to other examples of photoelectric conversion devices. For example, there are an imaging device, a distance measuring device (a device for distance measurement using focus detection or TOF (Time Of Flight)), a photometric device (a device for measuring the amount of incident light), and the like.

[0010] In this specification, terms indicating specific directions and positions as necessary (for example, "up", "down", "right", "left", and other terms including these terms) are used. The use of these terms is for facilitating the understanding of the embodiments with reference to the drawings, and the technical scope of the present invention is not limited by the meanings of these terms.

[0011] In this specification, when it is described that "member A and member B are electrically connected", it is not limited to the case where member A and member B are directly connected. For example, even if another member C is connected between member A and member B, it is sufficient that they are electrically connected.

[0012] 〈First Embodiment〉 The photoelectric conversion device according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 4.

[0013] FIG. 1 is an example of a block diagram of the photoelectric conversion device according to the present embodiment.

[0014] The photoelectric conversion device includes a pixel substrate 1 and a circuit board 2 on which a circuit is mounted. A pixel portion 5 is arranged on the pixel substrate 1. In the pixel portion 5, a plurality of pixels 10 each including a photoelectric conversion portion that generates charges according to incident light are arranged in a matrix. Outputs from the plurality of pixels are output to the circuit board 2 via vertical signal lines 30. The circuit board 2 may be laminated on the pixel substrate 1, or each of the above-described components arranged on the pixel substrate 1 and the circuit board 2 may be arranged on the same substrate. Here, the column direction refers to the vertical direction in FIG. 1, and the vertical direction in which the vertical signal lines 30 extend from the pixel substrate 1 to the circuit board 2. The row direction refers to the left-right direction in FIG. 1 and is a direction orthogonal to the vertical signal lines 30.

[0015] On the circuit board 2, a current source 40, a sample hold portion 50, a conversion portion 60, a data processing portion 90, and an output portion 100 are arranged. The current source 40 is arranged corresponding to each of the vertical signal lines 30. The current source 40 supplies a bias current to the pixel 10 selected for reading out the pixel signal via the vertical signal line 30. The vertical signal line 30 transfers a pixel signal corresponding to the charges generated by the photoelectric conversion portion of the pixel 10 from the pixel 10 to the sample hold portion 50.

[0016] The sample hold portion 50 samples and holds the pixel signals generated in the respective pixels 10 from the pixel portion 5 via the vertical signal lines 30. In the present embodiment, the sample hold portion 50 includes two sample hold circuits. The first sample hold circuit samples and holds a pixel signal (hereinafter, a signal at the reset level) corresponding to the reset level when the photoelectric conversion portion is reset. The second sample hold circuit samples and holds a pixel signal (hereinafter, a photoelectric conversion signal) corresponding to the imaging signal obtained when the photoelectric conversion operation is performed in the photoelectric conversion portion. The first sample hold circuit and the second sample hold circuit are each provided on each of the vertical signal lines 30.

[0017] Each of the plurality of conversion units 60 includes an AD conversion circuit that AD-converts the pixel signal output from the sample hold unit 50. One of the plurality of conversion units 60 is connected to each of the plurality of vertical signal lines 30. Here, as the AD conversion circuit, a slope type AD conversion circuit, a successive comparison type AD conversion circuit, a ΔΣ type AD conversion circuit, etc. are used, but it is not limited thereto. In the present embodiment, a form using an oversampling type AD conversion circuit will be described.

[0018] The data processing unit 90 processes the digital signal output from the conversion unit 60. The data processing unit 90 can also perform digital processing such as correction processing and complement processing on the digital signal output from the conversion unit 60. The output unit 100 outputs the signal processed by the data processing unit 90 to the outside.

[0019] FIG. 2 is an example of a circuit diagram of the pixel 10 included in the photoelectric conversion device according to the present embodiment. Note that the present disclosure can be applied to any of surface illumination type and backside illumination type sensors.

[0020] The pixel 10 includes a photoelectric conversion unit 400, a transfer transistor 410, a reset transistor 455, an amplification transistor 430, and a selection transistor 440. The photoelectric conversion unit 400 is, for example, a photodiode. One of the main electrodes of the photoelectric conversion unit 400 is connected to the reference voltage 450, and the received light is photoelectrically converted into charges (for example, photoelectrons) having a charge amount corresponding to the light amount and accumulated.

[0021] The other of the main electrodes of the photoelectric conversion unit 400 is electrically connected to the gate electrode of the amplification transistor 430 via the transfer transistor 410. The node 420 to which the gate electrode of the amplification transistor 430 is electrically connected functions as a floating diffusion (FD). The floating diffusion unit (FD unit) functions as a charge-voltage conversion unit that receives the charges generated by the photoelectric conversion unit 400 and converts the input charges into a signal voltage. Hereinafter, the node 420 may also be described as the FD unit 420.

[0022] A transfer signal TX is supplied to the gate electrode of the transfer transistor 410. When the transfer transistor 410 becomes conductive in response to the transfer signal TX, the charge accumulated in the photoelectric conversion unit 400 is transferred to the node 420 which is the FD unit.

[0023] The reset transistor 455 is connected between the power supply voltage 460 and the node 420. Note that when it is expressed that a transistor is connected between A and B, it indicates that one of the main electrodes (source and drain) of the transistor is connected to A and the other of the main electrodes is connected to B. The gate electrode of the transistor is not connected to A or B.

[0024] A reset signal RES is supplied to the gate electrode of the reset transistor 455. When the reset transistor 455 becomes conductive in response to the reset signal RES, the charge held in the FD unit 420 is swept out. Thus, the voltage of the node 420 is reset to the power supply voltage 460. By this reset operation, the pixel is reset.

[0025] One of the main electrodes of the amplification transistor 430 is connected to the node 420, one of the main electrodes is connected to the power supply voltage 460, and the other of the main electrodes is connected to the selection transistor 440, respectively. The gate electrode of the amplification transistor 430 serves as the input of a source follower circuit that reads out the signal obtained by the photoelectric conversion of the photoelectric conversion unit 400. The other of the main electrodes of the amplification transistor 430 is connected to the vertical signal line 30 via the selection transistor 440. The amplification transistor 430 and the current source 40 connected to the vertical signal line 30 constitute a source follower that converts the voltage of the node 420 into the voltage of the vertical signal line 30.

[0026] The selection transistor 440 is connected between the amplification transistor 430 and the vertical signal line 30. A selection signal SEL is supplied to the gate electrode of the selection transistor 440. When the selection transistor 440 becomes conductive in response to the selection signal SEL, the pixel 10 is set to the selected state. In the selected state, a signal based on the voltage of the node 420 is output as a pixel signal to the vertical signal line 30 via the amplification transistor 430.

[0027] The circuit configuration of the pixel 10 is not limited to the configuration shown in FIG. 2. For example, the selection transistor 440 may be connected between the power supply voltage 460 and the amplification transistor 430. Also, when a plurality of vertical signal lines 30 are arranged in one pixel column, one pixel 10 may have a plurality of selection transistors 440 connected to different vertical signal lines 30. Further, in the configuration shown in FIG. 2, as the pixel 10, a so-called 4Transistor (4Tr.) type configuration including a transfer transistor 410, a reset transistor 455, an amplification transistor 430, and a selection transistor 440 is shown. However, it is not limited thereto. For example, a 3Tr. type configuration may be adopted in which the amplification transistor 430 also functions as a selection transistor by omitting the selection transistor 440 and controlling the voltage of the node 420. Also, a configuration of 5Tr. type or more with an increased number of transistors may be adopted.

[0028] When the control signal RES is applied to the pixel 10, the voltage of the node 420 is reset by the reset transistor 455. When the pixel is reset, a signal at the reset level corresponding to the reset level when the photoelectric conversion unit 400 is reset from the pixel may be output. Also, a photoelectric conversion signal corresponding to an imaging signal generated by performing photoelectric conversion in response to light incident on the photoelectric conversion unit 400 from the pixel may be output.

[0029] FIG. 3 is an example of a circuit diagram of a sample hold unit 50 and a conversion unit 60 included in the photoelectric conversion device according to the present embodiment. In FIG. 3, the sample hold unit 50 and the conversion unit 60 arranged corresponding to the vertical signal line 30 are shown. In the present embodiment, one sample hold unit 50 and one conversion unit 60 are arranged for each one vertical signal line 30.

[0030] The sample hold unit 50 includes a first sample hold circuit 210 and a second sample hold circuit 211. As will be described later, the first sample hold circuit 210 samples and holds the reset level signal output from the pixel when the photoelectric conversion unit 400 is reset. The second sample hold circuit 211 samples and holds the photoelectric conversion signal generated according to the incident light to the photoelectric conversion unit.

[0031] The first sample hold circuit 210 includes a capacitive element 120 and an inverting amplifier 220. The switch 110 controls the connection between the vertical signal line 30 and the capacitive element 120 according to the control signal Smp_n. The inverting amplifier 220 can be configured by a combination of a source grounded circuit and a source follower circuit. The inverting amplifier 220 includes transistors 130, 140, 150, 160, 230, switches 170, 180, 190, and a current source 200. The switch 170 is connected between the input and output of the source grounded circuit composed of the transistors 130, 140, 150, 160, and is controlled by the control signal Smpa_n. According to the control signal Hld_n, the reset level signal is output via the inverting amplifier 220.

[0032] The second sample hold circuit 211 may have a configuration substantially the same as that of the first sample hold circuit 210, but is mainly different from the first sample hold circuit 210 in that switches 112 and 192 and a capacitive element 122 are added. The second sample hold circuit 211 includes capacitive elements 121 and 122 that hold pixel signals from the vertical signal line 30 and an inverting amplifier 221. The switches 111 and 112 control the connections between the vertical signal line 30 and the capacitive elements 121 and the capacitive element 122 according to the control signals Smp_s1 and Smp_s2, respectively.

[0033] Similar to the inverting amplifier 220, the inverting amplifier 221 can be configured by a combination of a source grounding circuit and a source follower circuit. The inverting amplifier 221 includes transistors 131, 141, 151, 161, 231, switches 171, 181, 191, 192, and a current source 201. The switch 171 is connected between the input and output of the source grounding circuit composed of the transistors 131, 141, 151, and 161 and is controlled by the control signal Smpa_s. The photoelectric conversion signal is output via the inverting amplifier 221 according to the control signals Hld_s1 to Hld_s2.

[0034] A resistance element 240 is electrically connected between the output terminal of the first sample hold circuit 210 and the output terminal of the second sample hold circuit 211. Consider the case where the first sample hold circuit 210 outputs a signal at the reset level and the second sample hold circuit 211 outputs a photoelectric conversion signal. Let the voltage at the output terminal of the first sample hold circuit 210, that is, the voltage of the signal at the reset level, be Vn, and the voltage at the output terminal of the second sample hold circuit 211, that is, the voltage of the photoelectric conversion signal, be Vs. Let the resistance value of the resistance element 240 be R. Thus, the current I flowing through the resistance element 240 is represented by the following (Equation 1). I = (Vn - Vs) / R (Equation 1)

[0035] This current I is input to the conversion unit 60. At this time, the current I flowing through the resistance element 240 is proportional to the difference between the voltage Vn of the reset-level signal and the voltage Vs of the photoelectric conversion signal, as shown in Equation 1. Therefore, CDS (correlated double sampling) is being performed at the stage where the current I is input to the conversion unit 60.

[0036] The conversion unit 60 is an oversampling type AD conversion circuit, for example, a ΔΣ type AD conversion circuit. The ΔΣ type AD conversion circuit includes a first integrator, a second integrator, a quantizer 370, and a decimation filter 380. In the conversion unit 60, the first integrator includes an integration capacitor 320. The second integrator includes a voltage-current conversion circuit (Gm cell) 330 that converts voltage to current and an integration capacitor 360. An AD converter 305 including a current source 300 and a switch 310 is connected to the input node of the first integrator.

[0037] The AD converter 305 controls the current to the first integrator according to the digital signal via the second integrator and the quantizer 370. An AD converter 345 including a current source 340 and a switch 350 is connected to the input node of the second integrator. The AD converter 345 controls the current to the second integrator according to the result of quantizing the output of the second integrator by the quantizer 370.

[0038] In the conversion unit 60, an operation is performed in which the previous quantization value is fed back to the second integrator and the first integrator through the AD converters 305 and 345 by the quantizer 370. In this way, by passing through the integrator twice while feeding back the previous quantization value to the AD converters 305 and 345, second-order noise shaping characteristics can be obtained. Furthermore, by removing high-frequency noise by the decimation filter 380 arranged at the subsequent stage of the quantizer 370, a highly accurate AD conversion output can be obtained.

[0039] FIG. 4 is an example of a drive timing chart showing the operation timings of the sample hold section 50 and the conversion section 60 included in the photoelectric conversion device according to the present embodiment. In FIG. 4, the horizontal axis represents time and the vertical axis represents voltage. The control signal RES is a signal for resetting the pixel 10. The transfer signal TX controls the reading out of signals from the photoelectric conversion section 400. The control signals Smpa_n, Smp_n, Smpa_s, Smp_s1, Smp_s2, Hld_n, Hld_s, Hld_s1, Hld_s2 control the respective switches of the first sample hold circuit 210 and the second sample hold circuit 211. In the following, in the waveforms of FIG. 4, it is assumed that during the period when the control signal is at the high level (for example, the state of the RES waveform between time t1 and time t2), the corresponding switch is in the on state, and during the period when the control signal is at the low level, the corresponding switch is in the off state. Note that the on state of the switch means a state where the input node and the output node of the switch are in a conductive state. On the other hand, the off state of the switch means a state where the input node and the output node of the switch are in a non-conductive state.

[0040] At times t1 to t2, the control signal RES in FIG. 2 becomes high level and the reset transistor 455 turns on, whereby the FD section 420 is reset. The control signal SEL shown in FIG. 2 is also controlled, and accordingly, the voltage of the vertical signal line 30 becomes the reset level voltage Vn. Also, at time t1, the control signals Smp_n and Smpa_n become high level, and the switches 110 and 170 of the first sample hold circuit 210 become on state. Next, at time t3 when the control signal Smpa_n transitions from high level to low level, the reset level voltage Vn is sampled and stored in the capacitive element 120. Next, at time t4, the control signal Smp_n transitions from high level to low level, the switch 110 becomes off state, and the capacitive element 120 is disconnected from the vertical signal line 30.

[0041] At times t5 to t6, the control signal TX in FIG. 2 becomes high level and the transfer transistor 410 turns on. During this period, the charge generated by the photoelectric conversion unit 400 due to the light incident between time t2 and time t6 is transferred to the FD unit 420. That is, the period from time t2 to time t6 is the exposure period. The voltage of the FD unit 420 decreases according to the amount of charge. According to the control signal SEL, the voltage of the FD unit 420 is output to the vertical signal line 30 via the amplification transistor 430.

[0042] As a result, the voltage of the vertical signal line 30 becomes the voltage Vs1 of the first photoelectric conversion signal. Also, at time t5, the control signals Smp_s and Smpa_s1 become high level, and in the second sample and hold circuit 211 for the photoelectric conversion signal, the switches 111 and 171 are turned on. Then, at time t7 when the control signal Smpa_s transitions from high level to low level, the switch 171 turns off and the voltage Vs1 of the first photoelectric conversion signal is sampled and stored in the capacitor element 121. Next, at time t8, the control signal Smp_s1 transitions from high level to low level, the switch 111 becomes off state, and the capacitor element 121 is disconnected from the vertical signal line 30.

[0043] Note that the voltage across both ends of the switch 171 when turning off the switch 171 at time t7 is always substantially the same regardless of the voltage of the vertical signal line 30. Therefore, no charge injection occurs due to turning off the switch 171, and no voltage that causes an error occurs with respect to the voltage Vs1 of the first photoelectric conversion signal stored in the capacitor element 121. Also, when turning off the switch 111 at time t8, both ends of the capacitor element 121 are in a high impedance state. Therefore, no influence is caused by turning off the switch 111. In this way, the generation of an error voltage in the voltage Vs1 of the first photoelectric conversion signal can be suppressed.

[0044] At times t9 to t10, again, the control signal TX in FIG. 2 becomes high level and the transfer transistor 410 turns on. During this period, the charges generated by the photoelectric conversion unit 400 due to the light incident between times t6 and t10 are additionally transferred to the FD unit 420. That is, in addition to the time from t2 to t6, the time from t6 to t10 becomes the exposure period. The voltage of the FD unit 420 further decreases according to the amount of charge. As a result, the voltage of the vertical signal line 30 decreases and becomes the voltage Vs2 of the second photoelectric conversion signal. Also, at time t9, the control signals Smp_s and Smpa_s2 become high level, and in the second sample and hold circuit 211 for the photoelectric conversion signal, the switches 112 and 171 are turned on.

[0045] Next, at time t11 when the control signal Smpa_s transitions from high level to low level, the voltage Vs2 of the second photoelectric conversion signal is sampled and stored in the capacitive element 122. Next, at time t12, the control signal Smp_s2 transitions from high level to low level, the switch 112 is turned off, and the capacitive element 122 is disconnected from the vertical signal line 30.

[0046] Note that the voltage across both ends of the switch 171 when turning off the switch 171 at time t11 is always substantially the same regardless of the voltage of the vertical signal line 30. Therefore, no charge injection occurs due to turning off the switch 171, and no voltage that causes an error with respect to the voltage Vs2 of the second photoelectric conversion signal stored in the capacitive element 122 is generated. Also, when turning off the switch 112 at time t12, both ends of the capacitive element 122 are in a high impedance state. Therefore, no influence is caused by turning off the switch 112. In this way, generation of an error voltage with respect to the voltage Vs2 of the second photoelectric conversion signal can be suppressed.

[0047] At time t13, the control signal Hld_n becomes high level, and switches 180 and 190 turn on. As a result, in the first sample-and-hold circuit 210, the capacitive element 120 outputs the voltage Vn of the signal at the reset level. At the same time, at time t13, the control signals Hld_s1 and Hld_s become high level, and switches 181 and 191 turn on. As a result, in the second sample-and-hold circuit 211, the capacitive element 121 outputs the voltage Vs1 of the first photoelectric conversion signal.

[0048] As described above, the input current to the conversion unit 60 is a current corresponding to the difference between the voltage Vn of the signal at the reset level at the output terminal of the first sample-and-hold circuit 210 and the voltage Vs1 of the first photoelectric conversion signal at the output terminal of the second sample-and-hold circuit 211. The conversion unit 60 performs AD conversion on the current corresponding to the difference between the voltage Vn and the voltage Vs1.

[0049] At time t14, the control signal Hld_s1 becomes low level, and switch 191 turns off. Then, at time t15, the control signal Hld_s2 becomes high level, and switch 192 turns on. As a result, in the second sample-and-hold circuit 211, the capacitive element 122 outputs the voltage Vs2 of the second photoelectric conversion signal.

[0050] As described above, the input current to the conversion unit 60 is a current corresponding to the difference between the voltage Vn of the signal at the reset level at the output terminal of the first sample-and-hold circuit 210 and the voltage Vs2 of the second photoelectric conversion signal at the output terminal of the second sample-and-hold circuit 211. The conversion unit 60 performs AD conversion on the current corresponding to the difference between the voltage Vn and the voltage Vs2.

[0051] Then, at time t16, the control signal Hld_n becomes low level, and switches 180 and 190 turn off. At the same time, at time t16, the control signal Hld_s becomes low level, and switch 181 turns off. At the same time, at time t16, the control signal Hld_s2 becomes low level, and switch 192 turns off.

[0052] Here, since the first photoelectric conversion signal and the second photoelectric conversion signal are pixel signals corresponding to different accumulation times, they are unlikely to be signals with the same output amplitude except in the dark state where there is no exposure. The exposure period (t2 to t10) for accumulating the charge corresponding to the second photoelectric conversion signal is longer than the exposure period (t2 to t6) for accumulating the charge corresponding to the first photoelectric conversion signal. Therefore, when there is no significant change in the amount of light incident on the photoelectric conversion unit 400, the voltage Vs2 becomes a signal with a larger output amplitude than the voltage Vs1. That is, the output amplitude ranges of the first photoelectric conversion signal and the second photoelectric conversion signal are different. Thus, in this embodiment, it is possible to read a plurality of photoelectric conversion signals (the first photoelectric conversion signal and the second photoelectric conversion signal) with different charge accumulation times, and a signal with a high dynamic range can be obtained. Then, using the signal with a high dynamic range, a high dynamic range image (HDR image) and a high dynamic range video (HDR video) can be generated. Here, the output amplitude referred to here corresponds to the voltage difference with respect to the reference voltage, where the reference voltage is the voltage of the signal output by the pixel 10 when the FD unit 420 is reset. For subsequent output amplitudes, unless otherwise specified, the reference voltage can be the signal output by the pixel 10 when the FD unit 420 is reset. Typically, this signal level is a signal level near the voltage of the power supply voltage 460.

[0053] Also, as described above, in this embodiment, in order to suppress the generation of error voltages in the first photoelectric conversion signal and the second photoelectric conversion signal, deterioration in the quality of the signal with a high dynamic range can be suppressed. Then, deterioration in the image quality of the HDR image and the HDR video generated using the signal with a high dynamic range can be suppressed.

[0054] Note that the resistor element 240 electrically connected between the output terminal of the first sample-and-hold circuit 210 and the output terminal of the second sample-and-hold circuit 211 may be a variable resistance circuit. That is, the output amplitude level of the signal input to the conversion unit 60 may be adjusted according to the resistance value. In this case, the resistor element 240 functions as a gain setting unit. The resistance value of the resistor element 240 is changed at the time t13 to t14 when the capacitor element 121 reads the voltage Vs1 of the first photoelectric conversion signal and at the time t15 to t16 when the capacitor element 122 reads the voltage Vs2 of the second photoelectric conversion signal. By changing the resistance value and thus changing the set gain, it is possible to reduce the noise or power consumption according to the output amplitude level. This will be described below.

[0055] At times t13 to t14, when the resistance value is made relatively smaller than at times t15 to t16, it is possible to reduce the noise of the voltage Vs1 of the first photoelectric conversion signal by reducing the thermal noise generated in the resistor element 240. On the other hand, at times t13 to t14, by making the resistance value relatively larger than at times t15 to t16, the output current to the conversion unit 60 can be reduced, and the power can be reduced. Thus, the above effects can be obtained by making the gain set corresponding to the first photoelectric conversion signal larger than the gain set corresponding to the second photoelectric conversion signal.

[0056] In this embodiment, in the process from when the first photoelectric conversion signal and the second photoelectric conversion signal are generated until they are AD-converted, it is possible to make the gain set corresponding to the first photoelectric conversion signal different from the gain set corresponding to the second photoelectric conversion signal. That is, it is possible to read a plurality of photoelectric conversion signals with different gains, and at that time, noise or power consumption can be reduced. Note that a configuration in which the gains are made different by means other than making the resistance value of the resistance element 240 variable may also be used. For example, the gain may be made different by making the current value output from the current source 300 variable. However, when switching the current value output from the current source 300, a certain amount of time is required until the current value stabilizes after the switching of the current value. Therefore, compared with the case of switching the current value output from the current source 300, when switching the resistance value of the resistance element 240, signal processing can be performed at a higher speed.

[0057] Also, in this embodiment, by sharing the second sample-and-hold circuit 211 with the capacitor element 121 and the capacitor element 122, it is possible to read the first photoelectric conversion signal and the second photoelectric conversion signal without increasing the operating power.

[0058] Also, in this embodiment, by reading the first photoelectric conversion signal and the second photoelectric conversion signal using a common resistance element 240, level fluctuations due to temperature and process variations are likely to be linked. Thereby, for example, it is possible to suppress the superposition of different variations on both the first photoelectric conversion signal and the second photoelectric conversion signal, so that the quality deterioration of a signal with a high dynamic range can be suppressed. And it is possible to suppress the deterioration of the image quality of HDR images and HDR videos generated using a signal with a high dynamic range.

[0059] In addition, in the present embodiment, a resistance element 240 for setting a gain when reading the first photoelectric conversion signal and the second photoelectric conversion signal is disposed at a subsequent stage of the first sample hold circuit 210 and the second sample hold circuit 211. With this configuration, even when the resistance value of the resistance element 240 is made variable at the time of reading each of the first photoelectric conversion signal and the second photoelectric conversion signal, highly accurate CDS can be implemented. This will be described below.

[0060] Here, a reference example is shown in FIG. 5. The photoelectric conversion device shown in FIG. 5 includes a gain setting circuit 1000, a capacitance element 1030 that accumulates a reset level signal, a capacitance element 1040 that accumulates a first photoelectric conversion signal, and a capacitance element 1050 that accumulates a second photoelectric conversion signal. The gain setting circuit 1000 includes an operational amplifier 1001, a resistance element 1002, and a variable resistance element 1003. A switch 1060 is electrically connected between the gain setting circuit 1000 and the capacitance element 1030, and when the switch 1060 is in an on state, a signal output from the gain setting circuit 1000 is input to the capacitance element 1030 via the switch 1060. A switch 1070 is electrically connected between the gain setting circuit 1000 and the capacitance element 1040, and when the switch 1070 is in an on state, a signal output from the gain setting circuit 1000 is input to the capacitance element 1040 via the switch 1070. A switch 1080 is electrically connected between the gain setting circuit 1000 and the capacitance element 1050, and when the switch 1080 is in an on state, a signal output from the gain setting circuit 1000 is input to the capacitance element 1050 via the switch 1080. That is, in the configuration of FIG. 5, the gain setting circuit 1000 is disposed at a stage before the capacitance elements 1030, 1040, and 1050, rather than at a subsequent stage. Note that the capacitance elements 1030, 1040, and 1050 respectively correspond to the capacitance elements 120, 121, and 122 shown in FIG. 3. Note that the switches 1060, 1070, and 1080 respectively correspond to the switches 110, 111, and 112 shown in FIG. 3.

[0061] In the configuration shown in FIG. 5, consider the case where correlated double sampling (CDS) is performed on the first and second photoelectric conversion signals read using different gains, using a signal of a common reset level. In this case, since the gain setting circuit 1000 is arranged upstream of the capacitor element 1030, the gain corresponding to the signal of the reset level accumulated in the capacitor element 1030 cannot be changed. Therefore, the gain corresponding to at least one of the first and second photoelectric conversion signals is different from the gain corresponding to the signal of the reset level. Accordingly, the accuracy of CDS using at least one of the first and second photoelectric conversion signals corresponding to a gain different from the gain corresponding to the signal of the reset level decreases. For example, when the signal of the reset level and the first photoelectric conversion signal are read using the first gain, and the second photoelectric conversion signal is read using the second gain, the accuracy of CDS for the second photoelectric conversion signal decreases. This is due to different gains being applied to the pixel signal and the offset component of the operational amplifier 1001 during the reading of the signal of the reset level and the reading of the second photoelectric conversion signal.

[0062] On the other hand, in the configuration shown in FIG. 3, consider the case where CDS is performed on the first and second photoelectric conversion signals read using different gains, using a signal of a common reset level. In this case, since the resistor element 240 for setting the gain is arranged downstream of the first sample hold circuit 210 and the second sample hold circuit 211, the gain corresponding to the signal of the reset level accumulated in the capacitor element 120 can be changed. Therefore, even when the gains corresponding to the first and second photoelectric conversion signals are made different, the gain corresponding to the signal of the reset level can be set to the same gain as the gains corresponding to the first and second photoelectric conversion signals, respectively. Accordingly, even when CDS is performed on the first and second photoelectric conversion signals read using different gains, using a signal of a common reset level, CDS using the first and second photoelectric conversion signals can be implemented with high accuracy.

[0063] A photoelectric conversion device according to a modified example of the first embodiment of the present invention will be described with reference to FIG. 6. Note that the same reference numerals are given to the same components as those in the first embodiment, and the description of these components may be omitted or simplified.

[0064] In the modified example of the first embodiment, the configuration of the pixel circuit is different from that of the first embodiment. FIG. 6 is an example of a circuit diagram of a pixel 10 included in the photoelectric conversion device according to this modified example.

[0065] As shown in FIG. 6, the pixel 10 may have a transistor 456 (floating diffusion capacitance switching transistor 456 (FD capacitance switching transistor 456)) that switches the capacitance value of the FD unit 420. During the read period, for example, at time t9 in FIG. 4, the on / off state of the FD capacitance switching transistor 456 is switched by a signal FDINC, so that the capacitance value of FD420 changes. At this time, the FD capacitance switching transistor 456 functions as a gain changing unit (gain setting unit) that changes the capacitance value of the FD unit 420, and switches the capacitance values of the FD unit 420 when outputting the first photoelectric conversion signal and the second photoelectric conversion signal, respectively.

[0066] Alternatively, another capacitive element may be connected to the FD unit 420 via a transistor, and the capacitance value may be changed by switching the on / off state of the transistor. Pixel signals having different voltage conversion gains can be output to and held by the capacitive elements 121 and 122 by the gain changing unit. Then, HDR images and HDR videos can be acquired using signals having different voltage gains.

[0067] Note that, for the high-gain pixel signal output with the FD capacitance switching transistor 456 turned off, the resistance value of the resistance element 240 can be switched to set a relatively larger gain. In that case, a signal having a higher dynamic range can be acquired. Then, HDR images and HDR videos can be generated using the signal having a higher dynamic range.

[0068] <Second Embodiment> The photoelectric conversion device according to the second embodiment of the present invention will be described with reference to FIGS. 7 and 8. Note that the same reference numerals are given to the same components as in the first embodiment, and the description of these components may be omitted or simplified.

[0069] This embodiment is different from the first embodiment in that one pixel has a plurality of photoelectric conversion units. FIG. 7 is an example of a circuit diagram of a pixel 10 included in the photoelectric conversion device according to this embodiment. Note that the present disclosure can be applied to both surface-irradiation type and back-irradiation type sensors.

[0070] As shown in FIG. 7, the pixel 10 further includes a photoelectric conversion unit 401 and a transfer transistor 411. The photoelectric conversion unit 401 is, for example, a photodiode. One of the main electrodes of the photoelectric conversion unit 401 is connected to a reference voltage 450, and the received light is photoelectrically converted into charges (for example, photoelectrons) having an amount of charge corresponding to the amount of the light and accumulated.

[0071] The other of the main electrodes of the photoelectric conversion unit 401 is electrically connected to the gate electrode of the amplification transistor 430 via the transfer transistor 411. A node 420 to which the gate electrode of the amplification transistor 430 is electrically connected functions as an FD. The FD unit functions as a charge-voltage conversion unit that converts the charges generated in the photoelectric conversion unit 400 into a signal voltage. The pixel 10 has a configuration in which the FD unit 420 is shared by the photoelectric conversion unit 400 and the photoelectric conversion unit 401. When each pixel is considered to have two photoelectric conversion units and one FD unit arranged in the column direction, the pixel 10 in FIG. 7 corresponds to, for example, two pixels in which the pixel 10 in FIG. 2 is arranged in the column direction.

[0072] A transfer signal TXA is supplied to the gate electrode of the transfer transistor 410. When the transfer transistor 410 becomes conductive in response to the transfer signal TXA, the charge accumulated in the photoelectric conversion unit 400 is transferred to the FD unit 420. A transfer signal TXB is supplied to the gate electrode of the transfer transistor 411. When the transfer transistor 411 becomes conductive in response to the transfer signal TXB, the charge accumulated in the photoelectric conversion unit 401 is transferred to the FD unit 420.

[0073] In this embodiment, the pixel signal output from the photoelectric conversion unit 400 is held by the capacitive element 121, and the pixel signal output from the photoelectric conversion unit 401 is held by the capacitive element 122. With such a configuration, it becomes possible to read out pixel signals for two rows during a single read period, enabling faster reading.

[0074] The circuit configuration of the pixel 10 is not limited to the configuration shown in FIG. 7. For example, the selection transistor 440 may be connected between the power supply voltage 460 and the amplification transistor 430. Also, when a plurality of vertical signal lines 30 are arranged in one pixel column, one pixel 10 may have a plurality of selection transistors 440 connected to different vertical signal lines 30. Further, in the configuration shown in FIG. 2, the pixel 10 is shown as a so-called 4Transistor (4Tr.) type configuration including a transfer transistor 410, a reset transistor 455, an amplification transistor 430, and a selection transistor 440. However, it is not limited to this. For example, the selection transistor 440 may be omitted, and the amplification transistor 430 may also function as a selection transistor by controlling the voltage of the node 420, resulting in a 3Tr. type configuration. Also, a configuration with 5Tr. type or more with an increased number of transistors may be used.

[0075] FIG. 8 is an example of a drive timing chart showing the operation timings of the sample hold section 50 and the conversion section 60 included in the photoelectric conversion device according to the present embodiment. In FIG. 8, the horizontal axis represents time and the vertical axis represents voltage. The control signal RES is a signal for resetting the pixel 10. The transfer signal TXA controls the reading of the signal from the photoelectric conversion section 400, and the transfer signal TXB controls the reading of the signal from the photoelectric conversion section 401. The control signals Smpa_n, Smp_n, Smpa_s, Smp_s1, Smp_s2, Hld_n, Hld_s, Hld_s1, and Hld_s2 control the respective switches of the first sample hold circuit 210 and the second sample hold circuit 211. Hereinafter, in the waveforms of FIG. 8, it is assumed that the corresponding switch is in the on state during the period when the control signal is at the high level (for example, the state of the RES waveform between time t1 and time t2), and the corresponding switch is in the off state during the period when the control signal is at the low level. Note that the on state of the switch means that the switch is in the conductive state, and the off state of the switch means that the switch is in the non-conductive state.

[0076] At times t1 to t2, the control signal RES in FIG. 7 becomes high level and the reset transistor 455 is turned on, whereby the FD section 420 is reset. The control signal SEL shown in FIG. 7 is also controlled, and accordingly, the voltage of the vertical signal line 30 becomes the reset level voltage Vn. Also, at time t1, the control signals Smp_n and Smpa_n become high level, and the switches 110 and 170 of the first sample hold circuit 210 are turned on. Next, at time t3 when the control signal Smpa_n transitions from high level to low level, the reset level voltage Vn is sampled and stored in the capacitive element 120. Next, at time t4, the control signal Smp_n transitions from high level to low level, the switch 110 is turned off, and the capacitive element 120 is disconnected from the vertical signal line 30.

[0077] At times t5 to t6, the control signal TXA in FIG. 7 becomes high level and the transfer transistor 410 turns on. During this period, the charge generated by the photoelectric conversion unit 400 due to the light incident between time t2 and time t6 is transferred to the FD unit 420. That is, the period from time t2 to time t6 is the exposure period. The voltage of the FD unit 420 decreases according to the amount of charge. According to the control signal SEL, the voltage of the FD420 unit is output to the vertical signal line 30 via the amplification transistor 430.

[0078] As a result, the voltage of the vertical signal line 30 becomes the voltage Vs1 of the first photoelectric conversion signal. Also, at time t5, the control signals Smp_s and Smpa_s1 become high level, and in the second sample-and-hold circuit 211 for the photoelectric conversion signal, the switches 111 and 171 are turned on. Then, at time t7 when the control signal Smpa_s transitions from high level to low level, the switch 171 turns off and the voltage Vs1 of the first photoelectric conversion signal is sampled and stored in the capacitive element 121. Next, at time t8, the control signal Smp_s1 transitions from high level to low level, the switch 111 becomes off state, and the capacitive element 121 is disconnected from the vertical signal line 30.

[0079] Note that the voltage across both ends of the switch 171 when turning off the switch 171 at time t7 is always substantially the same regardless of the voltage of the vertical signal line 30. Therefore, no charge injection occurs due to turning off the switch 171, and no voltage that causes an error occurs with respect to the voltage Vs1 of the first photoelectric conversion signal stored in the capacitive element 121. Also, when turning off the switch 111 at time t8, both ends of the capacitive element 121 are in a high-impedance state. Therefore, no influence is caused by turning off the switch 111. In this way, the generation of an error voltage in the voltage Vs1 of the first photoelectric conversion signal can be suppressed.

[0080] At times t9 to t10, the control signal TXB in FIG. 7 becomes high level and the transfer transistor 411 turns on. During this period, the charge generated by the photoelectric conversion unit 401 due to the light incident between times t2 and t10 is transferred to the FD unit 420. The voltage of the FD unit 420 further decreases according to the amount of charge. As a result, the voltage of the vertical signal line 30 decreases and becomes the voltage Vs2 of the second photoelectric conversion signal. Also, at time t9, the control signals Smp_s and Smpa_s2 become high level, and in the second sample-and-hold circuit 211 for the photoelectric conversion signal, the switches 112 and 171 become on state.

[0081] Next, at time t11 when the control signal Smpa_s transitions from high level to low level, the voltage Vs2 of the second photoelectric conversion signal is sampled and stored in the capacitor element 122. Next, at time t12, the control signal Smp_s2 transitions from high level to low level, the switch 112 becomes off state, and the capacitor element 122 is disconnected from the vertical signal line 30. That is, the voltage Vs2 of the second photoelectric conversion signal based on the charge generated by the photoelectric conversion unit 400 and the photoelectric conversion unit 401 is stored in the capacitor element 122.

[0082] Note that the voltage across both ends of the switch 171 when turning off the switch 171 at time t11 is always substantially the same regardless of the voltage of the vertical signal line 30. Therefore, no charge injection occurs due to turning off the switch 171, and no voltage that becomes an error with respect to the voltage Vs2 of the second photoelectric conversion signal stored in the capacitor element 122 is generated. Also, when turning off the switch 112 at time t12, both ends of the capacitor element 122 are in a high-impedance state. Therefore, no influence due to turning off the switch 112 occurs. Thus, generation of an error voltage with respect to the voltage Vs2 of the second photoelectric conversion signal can be suppressed.

[0083] At time t13, the control signal Hld_n becomes high level, and switches 180 and 190 turn on. As a result, in the first sample-and-hold circuit 210, the capacitive element 120 outputs the voltage Vn of the reset-level signal. At the same time, at time t13, the control signals Hld_s1 and Hld_s become high level, and switches 181 and 191 turn on. As a result, in the second sample-and-hold circuit 211, the capacitive element 121 outputs the voltage Vs1 of the first photoelectric conversion signal.

[0084] As described above, the input current to the conversion unit 60 is a current corresponding to the difference between the voltage Vn of the reset-level signal at the output terminal of the first sample-and-hold circuit 210 and the voltage Vs1 of the photoelectric conversion signal at the output terminal of the second sample-and-hold circuit 211. The conversion unit 60 performs AD conversion on the current corresponding to the difference between the voltage Vn and the voltage Vs1.

[0085] At time t14, the control signal Hld_s1 becomes low level, and switch 191 turns off. Then, at time t15, the control signal Hld_s2 becomes high level, and switch 192 turns on. As a result, in the second sample-and-hold circuit 211, the capacitive element 122 outputs the voltage Vs2 of the second photoelectric conversion signal.

[0086] As described above, the input current to the conversion unit 60 is a current corresponding to the difference between the voltage Vn of the reset-level signal at the output terminal of the first sample-and-hold circuit 210 and the voltage Vs2 of the photoelectric conversion signal at the output terminal of the second sample-and-hold circuit 211. The conversion unit 60 performs AD conversion on the current corresponding to the difference between the voltage Vn and the voltage Vs2.

[0087] Then, at time t16, the control signal Hld_n becomes low level, and switches 180 and 190 turn off. At the same time, at time t16, the control signal Hld_s becomes low level, and switch 181 turns off. At the same time, at time t16, the control signal Hld_s2 becomes low level, and switch 192 turns off.

[0088] Here, the first photoelectric conversion signal corresponds to the charges generated by the photoelectric conversion unit 400, and the second photoelectric conversion signal corresponds to the charges generated by the photoelectric conversion unit 400 and the photoelectric conversion unit 401. That is, the first photoelectric conversion signal is output from one of the plurality of photoelectric conversion units, and the second photoelectric conversion signal is output from the plurality of photoelectric conversion units. After time t16, a difference is taken between the digital signal corresponding to the current corresponding to the difference between the voltage Vn and the voltage Vs1 and the digital signal corresponding to the current corresponding to the difference between the voltage Vn and the voltage Vs2 to obtain the digital signal corresponding to the charges generated by the photoelectric conversion unit 401. Note that the first photoelectric conversion signal may correspond to the charges generated by the photoelectric conversion unit 400, and the second photoelectric conversion signal may correspond to the charges generated by the photoelectric conversion unit 401. That is, the first photoelectric conversion signal may be output from one of the plurality of photoelectric conversion units, and the second photoelectric conversion signal may be output from the other of the plurality of photoelectric conversion units.

[0089] In this way, in this embodiment, it is possible to read out pixel signals corresponding to pixels for two rows during a unit read period, and the speed of the read operation can be increased. Note that the pixel signals that can be read out during a unit read period may be pixel signals corresponding to pixels for a plurality of rows according to the pixel configuration, or may be pixel signals corresponding to pixels for a plurality of columns.

[0090] Also, as described above, in this embodiment, since the generation of error voltages in the first photoelectric conversion signal and the second photoelectric conversion signal is suppressed, deterioration in the quality of the signals can be suppressed.

[0091] Note that the resistor element 240 electrically connected between the output terminal of the first sample hold circuit 210 and the output terminal of the second sample hold circuit 211 may be a variable resistance circuit. That is, the output amplitude level of the signal input to the conversion unit 60 may be adjusted according to the resistance value. In this case, the resistor element 240 functions as a gain setting unit. The resistance value of the resistor element 240 is changed at the time t13 to t14 when the capacitor element 121 reads the voltage Vs1 of the first photoelectric conversion signal and at the time t15 to 16 when the capacitor element 122 reads the voltage Vs2 of the second photoelectric conversion signal. Similar to the first embodiment, in this embodiment, a plurality of photoelectric conversion signals can be read with different gains, and noise or power consumption can be reduced at that time.

[0092] Note that a configuration in which the gains are made different by means other than making the resistance value of the resistor element 240 variable may be used. For example, the gain may be made different by making the current value output from the current source 300 variable. However, when switching the current value output from the current source 300, a certain amount of time is required until the current value becomes stable after the switching of the current value. Therefore, compared with the case of switching the current value output from the current source 300, when switching the resistance value of the resistor element 240, signal processing can be performed at a higher speed.

[0093] Also, in this embodiment, by sharing the second sample hold circuit 211 with the capacitor element 121 and the capacitor element 122, it is possible to read the first photoelectric conversion signal and the second photoelectric conversion signal without increasing the operating power.

[0094] Also, in this embodiment, by reading the first photoelectric conversion signal and the second photoelectric conversion signal using a common resistor element 240, level fluctuations due to temperature and process variations are likely to be linked. Thereby, for example, it is possible to suppress the superposition of different variations on both the first photoelectric conversion signal and the second photoelectric conversion signal, and thus suppress the deterioration of the signal quality.

[0095] Also, in the present embodiment, a resistance element 240 for setting a gain when reading the first photoelectric conversion signal and the second photoelectric conversion signal is arranged at a subsequent stage of the first sample hold circuit 210 and the second sample hold circuit 211. With this configuration, even when the resistance value of the resistance element 240 is made variable at the time of reading each of the first photoelectric conversion signal and the second photoelectric conversion signal, highly accurate CDS can be implemented.

[0096] Note that one microlens may be provided corresponding to one pixel 10, that is, the photoelectric conversion unit 400 and the photoelectric conversion unit 401. In that case, the photoelectric conversion unit 400 and the photoelectric conversion unit 401 may function as pixels for phase difference detection. By the photoelectric conversion unit 400 and the photoelectric conversion unit 401 functioning as pixels for phase difference detection, focus detection of a subject can be performed. In this case, the above-described first photoelectric conversion signal becomes a signal for autofocus (AF), and the second photoelectric conversion signal becomes a signal for imaging. Note that even when the photoelectric conversion unit 400 and the photoelectric conversion unit 401 function as pixels for phase difference detection, it is possible to read a plurality of photoelectric conversion signals with different gains respectively. For example, by relatively increasing the gain corresponding to the first photoelectric conversion signal, it is possible to improve the AF accuracy. However, when the resistance value of the resistance element 240 is decreased in order to increase the gain, the current output to the conversion unit 60 may exceed the current value of the current source 300. And when the current output to the conversion unit 60 exceeds the current value of the current source 300, the current output to the conversion unit 60 may exceed the range of the current value that can be AD-converted. Here, the range of the output amplitude of the second photoelectric conversion signal for two photoelectric conversion units is generally larger than the range of the output amplitude of the first photoelectric conversion signal which is a signal for one photoelectric conversion unit. Therefore, even when the current corresponding to the first photoelectric conversion signal using a certain gain does not exceed the range of the current value that can be AD-converted, the current corresponding to the second photoelectric conversion signal using the same gain may exceed the range of the current value that can be AD-converted. Thus, by increasing the gain when reading the first photoelectric conversion signal and decreasing the gain when reading the second photoelectric conversion signal, it is possible to improve the AF accuracy while preventing the signal from deviating from the range of the current value that can be AD-converted. Therefore, in the present embodiment, it is possible to read a plurality of photoelectric conversion signals with different gains respectively, and at that time, it is possible to improve the AF accuracy while preventing the signal from deviating from the range of the current value that can be AD-converted.

[0097] Note that in FIG. 7, the photoelectric conversion units 400 and 401 may have different areas. The amount of charge that can be held differs between the photoelectric conversion unit with a large area and the photoelectric conversion unit with a small area. That is, the photoelectric conversion unit with a large area and the photoelectric conversion unit with a small area generate different amounts of charge with respect to the light incident in the same period. Therefore, the photoelectric conversion units 400 and 401 can output signals having different output amplitude ranges from each other.

[0098] Note that in FIG. 7, pixel 10 may further include an FD capacitance switching transistor 456, and the on / off state of the FD capacitance switching transistor 456 may be switched during the pixel signal readout period to read out pixel signals having different voltage conversion gains. Also in this case, the photoelectric conversion units 400 and 401 can output signals having different output amplitude ranges from each other. This is caused by, for example, the difference in the threshold values of the reset transistor 455 and the FD capacitance switching transistor 456. When the threshold value of the reset transistor 455 is relatively high, the FD capacitance switching transistor 456 is in the on state, and the output amplitude range of the pixel signal with a lower voltage conversion gain becomes larger. This is because the voltage of the FD unit 420 can be reduced to a lower level from the reset level.

[0099] <Third Embodiment> The third embodiment is applicable to the first and second embodiments. FIG. 9(a) is a schematic diagram for explaining a device 9191 including a semiconductor device 930 according to this embodiment. The semiconductor device 930 can use the photoelectric conversion device (imaging device) of each of the above-described embodiments. The device 9191 including the semiconductor device 930 will be described in detail. The semiconductor device 930 can include a semiconductor device 910. In addition to the semiconductor device 910, the semiconductor device 930 can include a package 920 that houses the semiconductor device 910. The package 920 can include a substrate to which the semiconductor device 910 is fixed and a lid such as glass facing the semiconductor device 910. The package 920 can further include a bonding member such as a bonding wire or a bump that connects a terminal provided on the substrate and a terminal provided on the semiconductor device 910.

[0100] The device 9191 can include at least any one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, a shutter, or a mirror, and includes an optical system that guides light to the semiconductor device 930. The control device 950 controls the semiconductor device 930. The control device 950 is a semiconductor device such as an ASIC, for example.

[0101] The processing device 960 processes the signal output from the semiconductor device 930. The processing device 960 is a semiconductor device such as a CPU or an ASIC for constituting an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (image) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or a semiconductor device that stores information (image) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0102] The mechanical device 990 has movable parts or propulsion parts such as motors and engines. In the device 9191, the signal output from the semiconductor device 930 is displayed on the display device 970 or transmitted to the outside by a communication device (not shown) provided in the device 9191. For this purpose, it is preferable that the device 9191 further includes a storage device 980 and a processing device 960 separately from the storage circuit and the arithmetic circuit included in the semiconductor device 930. The mechanical device 990 may be controlled based on the signal output from the semiconductor device 930.

[0103] In addition, the device 9191 is suitable for electronic devices such as information terminals having a photographing function (for example, smartphones and wearable terminals) and cameras (for example, interchangeable-lens cameras, compact cameras, video cameras, surveillance cameras). The mechanical device 990 in the camera can drive the components of the optical device 940 for zooming, focusing, and shutter operations. Alternatively, the mechanical device 990 in the camera can move the semiconductor device 930 for anti-vibration operation.

[0104] In addition, the device 9191 can be a transportation device such as a vehicle, a ship, or an aircraft (drone, airplane, etc.). The mechanical device 990 in the transportation device can be used as a moving device. The device 9191 as a transportation device is suitable for those that transport the semiconductor device 930 or those that assist and / or automate driving (operation) by means of a photographing function. The processing device 960 for assisting and / or automating driving (operation) can perform processing for operating the mechanical device 990 as a moving device based on the information obtained by the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analysis device such as an electron microscope, an office device such as a copier, or an industrial device such as a robot.

[0105] According to the above-described embodiment, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. The increase in the value here corresponds to at least one of the addition of functions, the improvement of performance, the improvement of characteristics, the improvement of reliability, the improvement of manufacturing yield, the reduction of environmental load, the cost reduction, the miniaturization, and the weight reduction.

[0106] Therefore, if the semiconductor device 930 according to this embodiment is used in the device 9191, the value of the device can also be improved. For example, when the semiconductor device 930 is mounted on a transportation device to perform external shooting or measurement of the external environment of the transportation device, excellent performance can be obtained. Therefore, in manufacturing and selling the transportation device, it is advantageous to decide to mount the semiconductor device according to this embodiment on the transportation device in terms of improving the performance of the transportation device itself. In particular, the semiconductor device 930 is suitable for a transportation device that performs driving support and / or autonomous driving of the transportation device using the information obtained by the semiconductor device.

[0107] Further, the photoelectric conversion system and the moving body of this embodiment will be described with reference to FIGS. 9(b) and (c).

[0108] FIG. 9(b) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 8 includes a photoelectric conversion device 80. The photoelectric conversion device 80 is the photoelectric conversion device (imaging device) described in any of the above embodiments. The photoelectric conversion system 8 includes an image processing unit 801 that performs image processing on a plurality of pieces of image data acquired by the photoelectric conversion device 80, and a parallax acquisition unit 802 that calculates parallax (phase difference of a parallax image) from the plurality of pieces of image data acquired by the photoelectric conversion system 8. Here, the photoelectric conversion system 8 may include an optical system (not shown) that guides light to the photoelectric conversion device 80, such as a lens, a shutter, or a mirror. Further, a plurality of photoelectric conversion units that are substantially conjugate to the pupil of the optical system may be arranged in the pixels included in the photoelectric conversion device 80. For example, a plurality of photoelectric conversion units that are substantially conjugate to the pupil are arranged corresponding to one microlens. The plurality of photoelectric conversion units receive light beams that have passed through different positions of the pupil of the optical system, and the photoelectric conversion device 80 outputs image data corresponding to the light beams that have passed through different positions. Then, the parallax acquisition unit 802 may calculate the parallax using the output image data. Further, the photoelectric conversion system 8 includes a distance acquisition unit 803 that calculates the distance to the object based on the calculated parallax, and a collision determination unit 804 that determines whether there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means for acquiring distance information to the object. That is, the distance information is information related to parallax, defocus amount, distance to the object, and the like. The collision determination unit 804 may determine the possibility of collision using any of these distance information. Note that the distance information may be acquired by ToF (Time of Flight). The distance information acquisition means may be realized by dedicatedly designed hardware, or may be realized by a software module. Further, it may be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or the like, or may be realized by a combination of these.

[0109] The photoelectric conversion system 8 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, the photoelectric conversion system 8 is connected to a control ECU 820, which is a control device that outputs a control signal for generating a braking force for the vehicle based on the determination result of the collision determination unit 804. Further, the photoelectric conversion system 8 is also connected to an alarm device 830 that issues an alarm to the driver based on the determination result of the collision determination unit 804. For example, when the collision determination unit 804 determines that there is a high possibility of collision, the control ECU 820 performs vehicle control to avoid collision and reduce damage, such as applying brakes, returning the accelerator, and suppressing engine output. The alarm device 830 warns the user by sounding an alarm such as a sound, displaying alarm information on a screen of a car navigation system, or applying vibration to a seat belt or a steering wheel.

[0110] In the present embodiment, the photoelectric conversion system 8 images the surroundings of the vehicle, for example, the front or the rear. FIG. 9(c) shows the photoelectric conversion system 8 when imaging the front of the vehicle (imaging range 850). The vehicle information acquisition device 810 sends an instruction to the photoelectric conversion system 8 or the photoelectric conversion device 80. With such a configuration, the ranging accuracy can be further improved.

[0111] In the above, an example of controlling to avoid collision with other vehicles has been described, but it is also applicable to control for automatically driving while following other vehicles and control for automatically driving so as not to deviate from the lane. Further, the photoelectric conversion system 8 can be applied not only to vehicles such as automobiles but also to moving bodies (moving devices) such as ships, airplanes, or industrial robots. In addition, it can be applied not only to moving bodies but also to devices that widely utilize object recognition, such as an advanced road traffic system (ITS).

[0112] In this specification, expressions such as "A or B", "at least one of A and B", "at least one of A or / and B", "one or more of A or / and B" include all possible combinations of the listed items, unless otherwise explicitly defined. That is, the above expressions are understood to disclose all cases including at least one A, including at least one B, and including both at least one A and at least one B. This also applies equally to combinations of three or more elements.

[0113] As described above, the embodiments can be appropriately modified without departing from the technical idea. The disclosure of this specification includes not only what is described in this specification but also all matters that can be grasped from this specification and the drawings attached hereto. Also, the disclosure of this specification includes the complement set of the concepts described in this specification. That is, for example, if this specification describes that "A is larger than B", even if the description that "A is not larger than B" is omitted, it can be said that this specification discloses that "A is not larger than B". Because when the description that "A is larger than B" is given, it is premised that the case where "A is not larger than B" is considered.

[0114] Note that the disclosure of this embodiment includes the following configurations.

[0115] (Configuration 1) A photoelectric conversion device including a photoelectric conversion unit that accumulates charges according to incident light, generates a photoelectric conversion signal according to the accumulated charges, and outputs the generated photoelectric conversion signal; a sample and hold unit that samples and holds a first photoelectric conversion signal and a second photoelectric conversion signal output from the pixel; and an oversampling type conversion unit that performs analog-to-digital (AD) conversion on the first photoelectric conversion signal and the second photoelectric conversion signal output from the sample and hold unit, wherein in the process from when the first photoelectric conversion signal and the second photoelectric conversion signal are generated to when the first photoelectric conversion signal and the second photoelectric conversion signal are AD-converted, a gain set corresponding to the first photoelectric conversion signal and a gain set corresponding to the second photoelectric conversion signal are different.

[0116] (Configuration 2) The photoelectric conversion device according to Configuration 1, wherein the first photoelectric conversion signal and the second photoelectric conversion signal have different output amplitude ranges.

[0117] (Configuration 3) The photoelectric conversion device according to Configuration 1 or 2, wherein the first photoelectric conversion signal has a smaller output amplitude range than the second photoelectric conversion signal, and a larger gain is set for the first photoelectric conversion signal than for the second photoelectric conversion signal.

[0118] (Configuration 4) The photoelectric conversion device according to any one of Configurations 1 to 3, wherein the time for the photoelectric conversion unit to accumulate the charges is different, and the time for accumulating the charges corresponding to the first photoelectric conversion signal is different from the time for accumulating the charges corresponding to the second photoelectric conversion signal.

[0119] (Configuration 5) The photoelectric conversion device according to any one of Configurations 1 to 4, wherein the first photoelectric conversion signal accumulates the charges in a shorter time than the second photoelectric conversion signal, and a larger gain is set for the first photoelectric conversion signal than for the second photoelectric conversion signal.

[0120] (Configuration 6) The conversion unit AD-converts the difference between the first photoelectric conversion signal and the second photoelectric conversion signal and the signal of the reset level of the photoelectric conversion unit, respectively. The photoelectric conversion device according to any one of Configurations 1 to 5, characterized in that.

[0121] (Configuration 7) The sample hold unit includes a first sample hold circuit that samples and holds the signal of the reset level, and a second sample hold circuit that samples and holds the first photoelectric conversion signal and the second photoelectric conversion signal, respectively. The photoelectric conversion device according to any one of Configurations 1 to 6, characterized in that.

[0122] (Configuration 8) The first photoelectric conversion signal and the second photoelectric conversion signal are respectively held in two capacitors included in the second sample hold circuit. The photoelectric conversion device according to any one of Configurations 1 to 7, characterized in that.

[0123] (Configuration 9) The sample hold unit includes an inverting amplifier, and the first photoelectric conversion signal and the second photoelectric conversion signal are output via the inverting amplifier. The photoelectric conversion device according to any one of Configurations 1 to 8, characterized in that.

[0124] (Configuration 10) The photoelectric conversion device further includes a gain setting unit for setting the gain, and the gain setting unit sets the gain corresponding to the first photoelectric conversion signal and the gain corresponding to the second photoelectric conversion signal, respectively. The photoelectric conversion device according to any one of Configurations 1 to 9, characterized in that.

[0125] (Configuration 11) The gain setting unit is electrically connected between output terminals respectively included in a plurality of sample hold circuits included in the sample hold unit. The photoelectric conversion device according to any one of Configurations 1 to 10, characterized in that.

[0126] (Configuration 12) The gain setting unit includes a variable resistance circuit, and the gain corresponding to the first photoelectric conversion signal and the gain corresponding to the second photoelectric conversion signal are respectively set by changing the resistance value of the variable resistance circuit. The photoelectric conversion device according to any one of Configurations 1 to 11.

[0127] (Configuration 13) The pixel includes a floating diffusion unit to which the charge is input, and a floating diffusion capacitance switching unit that switches the capacitance value of the floating diffusion unit. When the pixel outputs the first photoelectric conversion signal and the second photoelectric conversion signal, the capacitance value of the floating diffusion unit is switched respectively. The photoelectric conversion device according to any one of Configurations 1 to 12.

[0128] (Configuration 14) The pixel includes a plurality of photoelectric conversion units. A photoelectric conversion signal output from one of the plurality of photoelectric conversion units is the first photoelectric conversion signal, and a photoelectric conversion signal output from the other of the plurality of photoelectric conversion units is the second photoelectric conversion signal. The photoelectric conversion device according to any one of Configurations 1 to 13.

[0129] (Configuration 15) The pixel includes a plurality of photoelectric conversion units. A photoelectric conversion signal output from one of the plurality of photoelectric conversion units is the first photoelectric conversion signal, and a photoelectric conversion signal output from the plurality of photoelectric conversion units is the second photoelectric conversion signal. The photoelectric conversion device according to any one of Configurations 1 to 14.

[0130] (Configuration 16) A microlens is arranged corresponding to the pixel, and the plurality of photoelectric conversion units are arranged corresponding to the microlens. The photoelectric conversion device according to any one of Configurations 1 to 15.

[0131] (Configuration 17) The photoelectric conversion device according to any one of Configurations 1 to 16, wherein the amounts of charges generated by the plurality of photoelectric conversion units are different for light incident in the same period.

[0132] (Configuration 18) The photoelectric conversion device according to any one of Configurations 1 to 17, wherein the plurality of pixels are arranged in a row direction and a column direction, and the plurality of photoelectric conversion units are arranged in the column direction.

[0133] (Configuration 19) An apparatus comprising the photoelectric conversion device according to any one of Configurations 1 to 18, further comprising at least one of: an optical device that guides light to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and a mechanical device that operates based on information obtained by the photoelectric conversion device.

Explanation of Reference Numerals

[0134] 10 pixels 50 sample-and-hold units 60 conversion units 400 photoelectric conversion units

Claims

1. A pixel including a photoelectric conversion unit that accumulates charges in response to incident light, generates a photoelectric conversion signal in response to the accumulated charges, and outputs the generated photoelectric conversion signal; A sample-and-hold unit that samples and holds a first photoelectric conversion signal and a second photoelectric conversion signal output from the pixel; An oversampling type conversion unit that performs analog-to-digital (AD) conversion on the first photoelectric conversion signal and the second photoelectric conversion signal output from the sample-and-hold unit; A photoelectric conversion device comprising: In the process from when the first photoelectric conversion signal and the second photoelectric conversion signal are generated until they are AD-converted, the gain set corresponding to the first photoelectric conversion signal and the gain set corresponding to the second photoelectric conversion signal are different A photoelectric conversion device characterized by this.

2. The photoelectric conversion device according to claim 1, characterized in that the first photoelectric conversion signal and the second photoelectric conversion signal have different output amplitude ranges.

3. The photoelectric conversion device according to claim 2, characterized in that the first photoelectric conversion signal has a smaller output amplitude range than the second photoelectric conversion signal, and a larger gain is set for the first photoelectric conversion signal than for the second photoelectric conversion signal.

4. The photoelectric conversion device according to claim 1, characterized in that the time for the photoelectric conversion unit to accumulate the charges is different, and the time for accumulating the charges corresponding to the first photoelectric conversion signal and the time for accumulating the charges corresponding to the second photoelectric conversion signal are different.

5. The photoelectric conversion device according to claim 4, characterized in that the first photoelectric conversion signal accumulates the charges in a shorter time than the second photoelectric conversion signal, and a larger gain is set for the first photoelectric conversion signal than for the second photoelectric conversion signal.

6. The conversion unit AD-converts the difference between the first photoelectric conversion signal and the second photoelectric conversion signal and the signal of the reset level of the photoelectric conversion unit, respectively. The photoelectric conversion device according to claim 1.

7. The sample hold unit includes a first sample hold circuit that samples and holds the signal of the reset level, and a second sample hold circuit that samples and holds the first photoelectric conversion signal and the second photoelectric conversion signal, respectively. The photoelectric conversion device according to claim 6.

8. The first photoelectric conversion signal and the second photoelectric conversion signal are respectively held in two capacitors included in the second sample hold circuit. The photoelectric conversion device according to claim 7.

9. The sample hold unit includes an inverting amplifier, and the first photoelectric conversion signal and the second photoelectric conversion signal are output via the inverting amplifier. The photoelectric conversion device according to claim 1.

10. The photoelectric conversion device further includes a gain setting unit that sets the gain corresponding to the first photoelectric conversion signal and the gain corresponding to the second photoelectric conversion signal, respectively. The photoelectric conversion device according to claim 1.

11. The gain setting unit is electrically connected between output terminals of a plurality of sample hold circuits included in the sample hold unit. The photoelectric conversion device according to claim 10.

12. The gain setting unit includes a variable resistance circuit, and the gain corresponding to the first photoelectric conversion signal and the gain corresponding to the second photoelectric conversion signal are respectively set by changing the resistance value of the variable resistance circuit. The photoelectric conversion device according to claim 10.

13. The pixel includes a floating diffusion part into which the charge is input, and a floating diffusion capacitance switching part that switches the capacitance value of the floating diffusion part. When the pixel outputs the first photoelectric conversion signal and the second photoelectric conversion signal, the capacitance value of the floating diffusion part is switched respectively. The photoelectric conversion device according to claim 1, characterized in that.

14. The pixel includes a plurality of photoelectric conversion parts. A photoelectric conversion signal output from one of the plurality of photoelectric conversion parts is the first photoelectric conversion signal, and a photoelectric conversion signal output from the other of the plurality of photoelectric conversion parts is the second photoelectric conversion signal. The photoelectric conversion device according to claim 1, characterized in that.

15. The pixel includes a plurality of photoelectric conversion parts. A photoelectric conversion signal output from one of the plurality of photoelectric conversion parts is the first photoelectric conversion signal, and a photoelectric conversion signal output from the plurality of photoelectric conversion parts is the second photoelectric conversion signal. The photoelectric conversion device according to claim 1, characterized in that.

16. A microlens is arranged corresponding to the pixel, and the plurality of photoelectric conversion parts are arranged corresponding to the microlens. The photoelectric conversion device according to claim 14 or 15, characterized in that.

17. For light incident in the same period, the amount of charge generated by the plurality of photoelectric conversion parts is different. The photoelectric conversion device according to claim 14 or 15, characterized in that.

18. A plurality of the pixels are arranged in a row direction and a column direction, and the plurality of photoelectric conversion parts are arranged in the column direction. The photoelectric conversion device according to claim 14 or 15, characterized in that.

19. A device including the photoelectric conversion device according to any one of claims 1 to 15, An optical device that guides light to the photoelectric conversion device, A control device that controls the photoelectric conversion device, A processing device that processes a signal output from the photoelectric conversion device, A display device that displays information obtained by the photoelectric conversion device, A storage device that stores information obtained by the photoelectric conversion device, and, An apparatus characterized by further comprising at least any one of a mechanical device that operates based on information obtained by the photoelectric conversion device.

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