Reference voltage circuit

Abstract

To provide a reference voltage circuit capable of reducing variations in reference voltage due to process variation, temperature variation, and power supply voltage variation, and having enhanced radiation resistance.SOLUTION: A reference voltage generation unit 2 includes: a transistor M1 constituted by a depletion-type field-effect transistor in which a gate electrode containing an n-type impurity is formed; and a transistor M2 constituted by an enhancement-type field-effect transistor in which a gate electrode containing a p-type impurity is formed. Aspect ratios of the transistors M1 and M2 are equal. A temperature characteristic correction unit 3 includes: resistors R1 and R2 connected in series to a source of the transistor M2; and transistors M11 and M12 having different aspect ratios. A difference between the gate-source voltages of the transistors M11 and M12 is applied to both ends of the resistor R1.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a reference voltage circuit.

Background Art

[0002] In electronic devices used in environments irradiated with radiation such as outer space and around nuclear reactors, and in electronic components where radiation transmission inspections are performed by irradiating X-rays or γ-rays in non-destructive inspections during the manufacturing process, various radiation damages are caused by the irradiation of ionizing radiation such as X-rays and γ-rays, resulting in malfunction and characteristic variations of circuits, and sometimes leading to a decrease in the function of the system. With the rapid progress of the communication and informatization society, the radiation resistance of electronic devices and electronic components has become a major issue. Many semiconductor integrated circuits are used in electronic devices, and the present invention aims to enhance the radiation resistance of a reference voltage circuit widely used as a constant voltage source of a semiconductor integrated circuit and contribute to the stable operation of electronic devices.

[0003] Conventionally, as a reference voltage circuit used in a semiconductor integrated circuit, a circuit using the principle of the work function difference of the gate electrode of a transistor as shown in FIG. 5 is known (see, for example, Patent Documents 1 and 2). The reference voltage circuit 100 shown in FIG. 5 is mainly composed of a depletion-type field-effect transistor M1 whose gate electrode is formed of polysilicon containing n-type impurities and an enhancement-type field-effect transistor M2 whose gate electrode is formed of polysilicon containing p-type impurities.

[0004] The impurity concentrations of the substrates and channel doping regions forming transistors M1 and M2 are made the same, and the conductivity type of the polysilicon forming the gate electrodes is such that the gate electrode of depletion-type field-effect transistor M1 is n-type and the gate electrode of enhancement-type field-effect transistor M2 is p-type. By using the work function difference caused by the difference in the conductivity type of the gate electrodes, a difference is provided in the threshold voltages of transistors M1 and M2, generating a reference voltage of about 1V (see, for example, Patent Document 3). In this case, since the impurity concentrations of the substrates and channel doping regions of transistors M1 and M2 are equal, it is possible to reduce the variation in the reference voltage due to process variations, temperature variations, and power supply voltage variations.

[0005] The gate and source of transistor M1 are connected to the gate and drain of transistor M2, and the constant current generated by transistor M1 is passed through transistor M2, and a voltage corresponding to the difference in the threshold voltages of transistors M1 and M2, that is, the difference in the work functions of the gate electrodes of transistors M1 and M2, is output as a reference voltage from the common connection part of transistors M1 and M2.

[0006] The temperature characteristics of the reference voltage are such that the gate electrode of transistor M1 is formed of polysilicon containing n-type impurities and the gate electrode of transistor M2 is formed of polysilicon containing p-type impurities. Therefore, the temperature characteristics of the work functions of the gate electrodes of transistors M1 and M2 have opposite polarities, a difference occurs in the temperature coefficients of the threshold voltages, and when the aspect ratios S (W / L) of the channel widths W and channel lengths L of transistors M1 and M2 are equal (S M1 =S M2 )), the temperature coefficient does not become zero and has a negative temperature characteristic of about -0.5 mV / °C (see, for example, Patent Document 3).

[0007] Since the reference voltage VREF is the voltage difference between the threshold voltages of transistors M1 and M2 as expressed by Equation 1, it is possible to generate a stable reference voltage that is not easily affected by process variations or power supply voltage fluctuations. Also, good temperature characteristics can be obtained by adjusting the aspect ratio S (W / L) of the channel width W and channel length L of transistors M1 and M2.

[0008]

Equation

[0009] Here, V TH_M1 is the threshold voltage of transistor M1, V TH_M2 is the threshold voltage of transistor M2, S M1 is the aspect ratio (W M1 / L M1 ) of transistor M1, S M2 is the aspect ratio (W M2 / L M2 ) of transistor M2.

[0010] Characteristic degradation due to radiation irradiation is mainly caused by the generation of positive charges in the silicon oxide film and an increase in the interface trap density at the interface between the silicon oxide film and the silicon substrate, which reduces the threshold voltages of transistors M1 and M2 constituting the reference voltage circuit 100 (see, for example, Non-Patent Document 1).

[0011] In the above-described conventional reference voltage circuit 100, since the amount of change in the threshold voltages of transistors M1 and M2 due to radiation irradiation is equal, when the ratio of the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2 ) of transistor M2 is equal (S M1 =S M2 ), the reference voltage does not change due to radiation irradiation. However, in order to correct the temperature characteristics, the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2) in different ratios (S M1 ≠S M2 ), when irradiated with radiation, there is a problem that the reference voltage fluctuates because the amounts of variation of the first and second terms of Equation 1 are different.

Prior Art Documents

Patent Documents

[0012]

Patent Document 1

Patent Document 2

Patent Document 3

Non-Patent Documents

[0013]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0014] The present invention has been made in view of the above circumstances, and an object thereof is to provide a reference voltage circuit capable of reducing variations in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and enhancing radiation resistance.

Means for Solving the Problems

[0015] In order to achieve the above object, the reference voltage circuit according to the present invention is characterized by the following [1] to [7]. [1] A depletion-type first field-effect transistor having a gate electrode containing n-type impurities, and A gate electrode containing p-type impurities is formed, and it has an enhancement-mode second field-effect transistor having the same aspect ratio as the first field-effect transistor. A reference voltage generation unit that causes a constant current generated by the first field-effect transistor to flow through the second field-effect transistor, and generates an output voltage corresponding to the difference between the threshold voltage of the first field-effect transistor and the threshold voltage of the second field-effect transistor between the gate and source of the second field-effect transistor. A temperature characteristic correction unit that generates a correction voltage having a positive temperature characteristic for correcting the temperature characteristic of the output voltage generated by the reference voltage generation unit. Outputs, as a reference voltage, a voltage obtained by adding the correction voltage generated by the temperature characteristic correction unit to the output voltage generated by the reference voltage generation unit. It is a reference voltage circuit. [2] In the reference voltage circuit according to [1], The temperature characteristic correction unit A first resistor and a second resistor connected in series to the source of the second field-effect transistor, It has a first transistor and a second transistor with different aspect ratios, A difference in the gate-source voltage between the first transistor and the second transistor is applied across the first resistor. It is a reference voltage circuit. [3] In the reference voltage circuit according to [2], The temperature characteristic correction unit A third transistor connected in series to the second transistor, Further has a fourth transistor connected in series to the first transistor, The first transistor and the second transistor are connected in a current mirror configuration, The third transistor and the fourth transistor are connected in a current mirror configuration, The source or emitter of the first transistor and the second transistor are respectively connected to both ends of the first resistor. It is a reference voltage circuit. [4] In the reference voltage circuit according to [2], The temperature characteristic correction unit A third transistor connected in series to the first transistor, A fourth transistor connected in series to the second transistor, A current source commonly connected to the sources or emitters of the first transistor and the second transistor, A fifth transistor having a source or emitter connected to the sources or emitters of the third transistor and the fourth transistor, a drain or collector connected to the source of the second field effect transistor, and a gate or base connected to the connection point between the fourth transistor and the second transistor, The third transistor and the fourth transistor are connected in a current mirror configuration, The first transistor and the second transistor are composed of depletion types, The gates of the first transistor and the second transistor are respectively connected to both ends of the first resistor, It is a reference voltage circuit. [5] In the reference voltage circuit according to [4], The current source is composed of the first field effect transistor with its gate-source connected, It has a sixth transistor connected in a current mirror configuration to the third transistor and folding back the current flowing through the third transistor, The current folded back by the sixth transistor is supplied to the second field effect transistor, It is a reference voltage circuit. [6] In the reference voltage circuit according to any one of [1] to [5], At least one of the transistors is composed of a field effect transistor. It is a reference voltage circuit. [7] In the reference voltage circuit according to any one of [1] to [5], At least one of the transistors is composed of a bipolar transistor. It is a reference voltage circuit.

Advantages of the Invention

[0016] According to the present invention, it is possible to reduce the variation of the reference voltage due to process variation, temperature variation, and power supply voltage variation, and to provide a reference voltage circuit with enhanced radiation resistance.

[0017] The present invention has been briefly described above. Further, the details of the present invention will be further clarified by reading through the embodiments (hereinafter referred to as "embodiments") for carrying out the invention described below with reference to the accompanying drawings.

Brief Description of the Drawings

[0018]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Embodiments for Carrying out the Invention

[0019] Specific embodiments of the present invention will be described below with reference to the respective drawings.

[0020] (First Embodiment) First, the reference voltage circuit 1 of the first embodiment will be described with reference to FIG. 1. As shown in the figure, the reference voltage circuit 1 includes a reference voltage generation unit 2 that generates a reference voltage, and a temperature characteristic correction unit 3 that generates a PTAT (Proportional To Absolute Temperature) voltage (= correction voltage) for correcting the temperature characteristic of the reference voltage.

[0021] The reference voltage generation unit 2 includes a transistor M1 (= first field effect transistor) and a transistor M2 (= second field effect transistor). The transistor M1 is composed of an N-channel depletion type field effect transistor in which polysilicon containing an n-type impurity is formed as a gate electrode. The transistor M2 is composed of an N-channel enhancement type field effect transistor in which polysilicon containing a p-type impurity is formed as a gate electrode.

[0022] The drain of the transistor M1 is connected to the positive power supply terminal T21. A positive power supply voltage VDD is supplied to the positive power supply terminal T21. The gate and source of the transistor M1 are connected to the gate and drain of the transistor M2, and the common connection portion of the transistors M1 and M2 is connected to the output terminal T3. The reference voltage VREF1 is output from the output terminal T3. The constant current I1 generated by the transistor M1 is passed through the transistor M2, and a voltage corresponding to the difference between the threshold voltage of the transistor M2 and the threshold voltage of the transistor M1 is output as the gate-source voltage of the transistor M2. The transistors M1 and M2 are provided with equal aspect ratios. For this reason, the gate-source voltage of the transistor M2 has a negative temperature characteristic.

[0023] The temperature characteristic correction unit 3 has a PTAT voltage V with a positive temperature characteristic PTATIt is supplied to the source of transistor M2 to reduce the temperature variation of the reference voltage VREF1. The temperature characteristic correction unit 3 includes a transistor M11 (= first transistor), a transistor M12 (= second transistor), a transistor M13 (= third transistor), a transistor M14 (= fourth transistor), a resistor R1 (= first resistor), and a resistor R2 (= second resistor). Transistors M11 and M12 are composed of N-channel field-effect transistors. Transistors M13 and M14 are composed of P-channel field-effect transistors.

[0024] The source of transistor M11 is connected to the negative power supply terminal T22 via resistor R2. A negative power supply voltage VSS is supplied to the negative power supply terminal T22. The gate of transistor M12 is connected to the gate and drain of transistor M11. That is, transistors M11 and M12 are current-mirror connected, and the drain current flowing through transistor M11 is copied and folded back to the drain current of transistor M12. The source of transistor M12 is connected to the source of transistor M2. Resistors R1 and R2 are connected in series between the source of transistor M2 and the negative power supply terminal T22. Resistor R1 is connected between the source of transistor M11 and the source of transistor M12.

[0025] The source of transistor M13 is connected to the positive power supply terminal T21, and the gate and drain are connected to the drain of transistor M12. That is, transistors M12 and M13 are connected in series.

[0026] The source of transistor M14 is connected to the positive power supply terminal T21, the gate is connected to the gate and drain of transistor M13, and the drain is connected to the gate and drain of transistor M11. That is, transistors M13 and M14 are current-mirror connected, and the drain current flowing through transistor M13 is copied and folded back to the drain current of transistor M14. Also, transistors M11 and M14 are connected in series.

[0027] Next, the operation of the reference voltage circuit 1 configured as described above will be explained. First, the operation of the reference voltage generation unit 2 will be explained with reference to FIG. 2. FIG. 2 is a graph showing the relationship between the gate-source voltage Vgs and the drain current Ids of the transistors M1 and M2. As shown in the figure, the depletion-type transistor M1 connected to function as a current source supplies a constant current I1 to the drain of the enhancement-type transistor M2 connected in diode connection. When the aspect ratios of the transistors M1 and M2 are equal, this constant current I1 causes a voltage corresponding to the difference between the threshold voltage V TH_M2 of the transistor M2 and the threshold voltage V TH_M1 of the transistor M1 to be output as the gate-source voltage V GS_M2 of the transistor M2. This gate-source voltage V GS_M2 becomes the output voltage generated by the reference voltage generation unit 2. Considering the ratio of the aspect ratios of the transistors M1 and M2, the gate-source voltage V GS_M2 of the transistor M2 is expressed by the following formula 2.

[0028]

Equation

[0029] Here, V TH_M1 is the threshold voltage of the transistor M1, V TH_M2 is the threshold voltage of the transistor M2, S M1 is the aspect ratio (W M1 / L M1 ) of the transistor M1, and S M2 is the aspect ratio (W M2 / L M2 ) of the transistor M2.

[0030] The output voltage V GS_M2 generated by the reference voltage generation unit 2 expressed by formula 2 is less affected by process variations and power supply voltage fluctuations and can generate a stable voltage.

[0031] As described above, the gate electrode of transistor M1 is formed of polysilicon containing n-type impurities, and the gate electrode of transistor M2 is formed of polysilicon containing p-type impurities. Therefore, the temperature characteristics of the work functions of the gate electrodes of transistors M1 and M2 have opposite polarities, resulting in a difference in the temperature coefficient of the threshold voltage. When the aspect ratios S (W / L) of the channel widths W and channel lengths L of transistors M1 and M2 are equal (S M1 =S M2 ), if there is a difference in the temperature coefficient of the threshold voltage, the temperature coefficient of the output voltage V GS_M2 will not be zero. The output voltage V GS_M2 has a negative temperature characteristic of about -0.5 mV / °C.

[0032] As an improvement of the temperature characteristics, the ratio S M1 of the channel width W M1 and the channel length L M1 of transistor M1 (W M1 / L M1 ) and the ratio S M2 of the channel width W M2 and the channel length L M2 of transistor M2 (W M2 / L M2 ) are adjusted respectively, and the ratio of the aspect ratios S (W / L) of transistors M1 and M2 (S M1 / S M2 ) is set in the range of about 1.5 to 2, so that the stabilization of the output voltage V GS_M2 against temperature changes can be achieved.

[0033] However, due to radiation irradiation, positive charges are generated in the oxide film and the interface trap density at the interface between the silicon oxide film and the silicon substrate increases, so the threshold voltages of transistors M1 and M2 decrease. Since the amount of change in the threshold voltages of transistors M1 and M2 due to radiation irradiation is equal, the ratio of the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2 ) of transistor M2 is equal (S M1 =S M2) In this case, the reference voltage does not vary due to radiation irradiation. However, in order to correct the temperature characteristics, the aspect ratios (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2 ) of transistor M2 are made different ratios (S M1 ≠S M2 ). When irradiated with radiation, since the amounts of variation of the first term and the second term in Equation 2 are different, the output voltage V GS_M2 varies.

[0034] The reference voltage circuit 1 of the present invention equalizes the aspect ratios of transistors M1 and M2 in order to reduce the variation of the reference voltage VREF1 due to radiation irradiation. Also, in order to reduce the variation of the reference voltage VREF1 due to temperature, a PTAT voltage V PTAT having a positive temperature characteristic is generated by the temperature characteristic correction unit 3 and added to the output voltage V GS_M2 of the reference voltage generation unit 2.

[0035] Next, the operation of the temperature characteristic correction unit 3 will be described. As an initial state, it is assumed that currents of different densities flow through the current paths of transistors M11 and M12. Since transistors M13 and M14 and transistors M11 and M12 are respectively connected in a current mirror configuration, they receive the self-feedback bias action generated by each current control operation, and the ratio of the currents flowing through transistors M11 and M12 is always kept constant, and the currents flowing through each transistor maintain stable values.

[0036] For simplicity of explanation, it is assumed that the aspect ratios of transistors M13 and M14 are equal. Also, the aspect ratio S M12 of transistor M12 is set to N times (N>1) the aspect ratio S M11 of transistor M11.

[0037] Since the aspect ratios of transistors M13 and M14 are equal, equal currents (I2 - I1) flow through transistors M13 and M14. Therefore, equal currents also flow through transistors M11 and M12. Thus, the PTAT voltage V PTATIt is represented by the following Formula 3.

[0038] [Number]

[0039] Also, as shown in Formula 4, the difference between the gate-source voltages V GS_M11 , V GS_M12 of transistors M11 and M12 is equal to the voltage drop R1·I2 of resistor R1. When current (I2 - I1) flows and transistors M11 and M12 operate in the subthreshold region, the gate-source voltages V GS_M11 , V GS_M12 are represented by the following Formulas 5 and 6, respectively.

[0040] [Number]

[0041] [Number]

[0042] [Number]

[0043] Here, V T is the thermal voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M11, and I S ·S M12 / S M11 is the reverse saturation current of transistor M12.

[0044] From Formulas 3 to 6, the following Formulas 7 and 8 are obtained.

[0045] [Number]

[0046]

Number

[0047] According to Equation 7 and Equation 8, the PTAT voltage V PTAT is the value obtained by multiplying the thermal voltage V T of the semiconductor material by a constant K G1 . The thermal voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0048] The reference voltage VREF1 generated by the reference voltage circuit 1 is represented by Equation 9.

[0049]

Number

[0050] That is, by adjusting the ratio of the aspect ratios S(W / L) of the transistors M11 and M12 (S M12 / S M11 ) and the ratio of the resistance values of the resistors R1 and R2, as shown in Equation 10, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 and the temperature characteristic of the thermal voltage V T generated by the temperature characteristic correction unit 3 are made equal to the constant K T representing the amplification factor of the thermal voltage V G1 . Under this condition, by adding the PTAT voltage V GS_M2 having a positive temperature coefficient generated by the temperature characteristic correction unit 3 to the output voltage V PTAT having a negative temperature coefficient generated by the reference voltage generation unit 2, the temperature characteristic of the reference voltage VREF1 can be offset.

[0051]

Number

[0052] That is, the reference voltage circuit 1 in this first embodiment sets the ratio (S M1 / S M2 ) of the aspect ratios S(W / L) of the transistors M1 and M2 to an equal condition (about 1) so that the reference voltage VREF1 does not fluctuate even when irradiated with radiation, and has a circuit configuration in which the negative temperature characteristic generated by the reference voltage generation unit 2 is offset by the positive temperature characteristic generated by the temperature characteristic correction unit 3, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0053] Therefore, it is possible to reduce the variation in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and the effect of enhancing radiation resistance is obtained.

[0054] Also, according to the first embodiment described above, the constant K G1 can be adjusted not only by the ratio of the aspect ratios of the transistors M11 and M12 but also by the ratio of the resistance values of the resistors R1 and R2, which makes it easier to adjust.

[0055] (Second Embodiment) Next, the reference voltage circuit 1B of the second embodiment will be described with reference to FIG. 3. In FIG. 3, the same components as those in the circuit shown in FIG. 1 are denoted by the same reference numerals, and detailed descriptions thereof are omitted.

[0056] As shown in the figure, the reference voltage circuit 1B includes, similarly to the first embodiment, a reference voltage generation unit 2 that generates a reference voltage, and a temperature characteristic correction unit 3B that generates a PTAT voltage V PTAT for correcting the temperature characteristic of the reference voltage. Since the reference voltage generation unit 2 is the same as that in the first embodiment described above, detailed description thereof is omitted here.

[0057] The difference between the first embodiment and the second embodiment lies in the configuration of the temperature characteristic correction unit 3B. The temperature characteristic correction unit 3B includes a transistor M11B (= the first transistor), a transistor M12B (= the second transistor), a transistor M13B (= the third transistor), a transistor M14B (= the fourth transistor), a transistor M5 (= the fifth transistor), a resistor R1B (= the first resistor), a resistor R2B (= the second resistor), and a constant current source 31 (= the current source). The transistors M11B and M12B are composed of N-channel depletion-type field-effect transistors. The transistors M13B, M14B, and M5 are composed of P-channel field-effect transistors.

[0058] The transistors M11B and M12B constitute a differential input section in which the sources are commonly connected and currents with a current ratio corresponding to the input potential difference flow through them respectively. The constant current source 31 is connected between the sources of the transistors M11B and M12B and the negative power supply terminal T22. The gate of the transistor M12B is connected to the negative power supply terminal T22.

[0059] The source of the transistor M13B is connected to the positive power supply terminal T21, and the gate and drain are connected to the drain of the transistor M11B. That is, the transistors M11B and M13B are connected in series.

[0060] The source of the transistor M14B is connected to the positive power supply terminal T21, the gate is connected to the gate and drain of the transistor M13B, and the drain is connected to the drain of the transistor M12B. That is, the transistors M13B and M14B are connected in a current mirror configuration, and the drain current flowing through the transistor M13B is copied and folded back to the drain current of the transistor M14B. Also, the transistors M12B and M14B are connected in series.

[0061] The gate of the transistor M5 is connected to the connection point between the transistor M12B and the transistor M14B, the source is connected to the sources of the transistors M13B and M14B, and the drain is connected to the source of the transistor M2.

[0062] Resistors R1B and R2B are connected in series between the source of transistor M2 and the negative power supply terminal T22. Resistor R1B is connected between the gates of transistors M11B and M12B. Resistor R2B is connected between the gate of transistor M11B and the drain of transistor M5.

[0063] Next, the operation of the reference voltage circuit 1B having the above-described configuration will be described. The reference voltage circuit 1B in such a configuration is basically the same as that of the first embodiment, except for the points described later.

[0064] Since transistors M13B and M14B are connected in a current mirror configuration, the ratio (shunt ratio) of the currents flowing from the constant current source 31 to transistors M11B and M12B is always kept constant. Transistor M5 controls the current I3 flowing through resistors R1B and R2B, that is, the gate potential of transistor M11B, so that the current from the constant current source 31 always flows to transistors M11B and M12B at a constant ratio.

[0065] For simplicity of explanation, it is assumed that the aspect ratios of transistors M13B and M14B are equal. Also, the aspect ratio S M12 of transistor M12B is set to be N times (N > 1) the aspect ratio S M11 of transistor M11B.

[0066] Assuming that the current flowing through resistors R1B and R2B is I3, the PTAT voltage V PTAT is represented by the following equation 11.

[0067]

Equation

[0068] Since the aspect ratios of transistors M13B and M14B are equal, equal currents flow through transistors M13B and M14B. Transistor M5 controls current I3 so that the currents flowing through transistors M11B and M12B are equal. Therefore, equal currents always flow through transistors M11B and M12B. Thus, as shown in Equation 12, the difference in the gate-source voltages V GS_M11B , V GS_M12B of transistors M11B and M12B is equal to the voltage drop R1B·I3 of resistor R1B. Let the current flowing through transistors M11B and M12B be I2. When transistors M11B and M12B operate in the subthreshold region, the gate-source voltages V GS_M11B , V GS_M12B are represented by the following Equations 13 and 14, respectively.

[0069]

Equation

[0070]

Equation

[0071]

Equation

[0072] Here, V T is the thermal voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M11B, and I S ·S M12B / S M11B is the reverse saturation current of transistor M12B.

[0073] From Equations 11 to 14, the following Equations 15 and 16 are obtained.

[0074]

Equation

[0075] [Number]

[0076] According to Equation 15 and Equation 16, the PTAT voltage V PTAT is the value obtained by multiplying the thermal voltage V T of the semiconductor material by a constant K G2 . The thermal voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0077] The reference voltage VREF2 generated by the reference voltage circuit 1B is represented by Equation 17.

[0078] [Number]

[0079] That is, by adjusting the ratio of the aspect ratios S (W / L) of the transistors M11B and M12B (S M12B / S M11B ) and the ratio of the resistance values of the resistors R1B and R2B, as shown in Equation 18, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 and the temperature characteristic of the thermal voltage V T generated by the temperature characteristic correction unit 3B are made equal to the constant K T representing the amplification factor of the thermal voltage V G2 . Under this condition, the temperature characteristic of the reference voltage VREF2 can be canceled out by adding the PTAT voltage V GS_M2 having a positive temperature coefficient generated by the temperature characteristic correction unit 3B to the output voltage V PTAT having a negative temperature coefficient generated by the reference voltage generation unit 2.

[0080] [Number]

[0081] That is, the reference voltage circuit 1B in this second embodiment sets the ratio (S M1 / S M2 ) of the aspect ratios S(W / L) of the transistors M1 and M2 to an equal condition (about 1) so that the reference voltage VREF2 does not fluctuate even when irradiated with radiation, and has a circuit configuration in which the negative temperature characteristic generated by the reference voltage generation unit 2 is offset by the positive temperature characteristic generated by the temperature characteristic correction unit 3B, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0082] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0083] Further, in the first embodiment, a startup circuit for turning on the transistors M11 to M14 was necessary, but in the second embodiment described above, the startup circuit is no longer necessary.

[0084] (Third Embodiment) Next, the reference voltage circuit 1C of the third embodiment will be described with reference to FIG. 4. In FIG. 4, the same components as those in the circuit shown in FIG. 3 are denoted by the same reference numerals, and detailed descriptions thereof are omitted.

[0085] As shown in the figure, the reference voltage circuit 1C includes, similarly to the second embodiment, a reference voltage generation unit 2C that generates a reference voltage, and a temperature characteristic correction unit 3C that generates a PTAT voltage for correcting the temperature characteristic of the reference voltage.

[0086] The temperature characteristic correction unit 3C of the third embodiment replaces the constant current source 31 of the second embodiment with a transistor M1C (= first field effect transistor). The transistor M1C is composed of an N-channel depletion type field effect transistor in which polysilicon containing n-type impurities is formed as a gate electrode.

[0087] The drain of transistor M1C is connected to the common source of transistors M11B and M12B, and the gate and source are connected to the negative power supply terminal T22.

[0088] In the reference voltage generation unit 3C of the third embodiment, transistor M1 of the second embodiment is replaced with transistor M6. Transistor M6 is composed of a P-channel field effect transistor.

[0089] The source of transistor M6 is connected to the positive power supply terminal T21, the gate is connected to the gate and drain of transistor M13B, and the drain is connected to the gate and drain of transistor M2. That is, transistors M13B and M6 are connected in a current mirror configuration, and the drain current flowing through transistor M13B is copied and folded back to the drain current of transistor M6. The common connection part of transistors M6 and M2 is connected to the output terminal T3.

[0090] When the ratio of the aspect ratios S (W / L) of the current mirror-connected transistors M13B and M14B is equal (S M13B = S M14B ) and the ratio of the aspect ratios S (W / L) of the current mirror-connected transistors M6 and M13B is 2:1 (S M6 / S M13B = 2), the drain current of transistor M6 is equal to the constant current generated by transistor M1C. That is, the constant current generated by transistor M1C is passed through transistor M2, and a voltage corresponding to the difference between the threshold voltage of transistor M2 and the threshold voltage of transistor M1C is output as the gate-source voltage of transistor M2.

[0091] Next, the operation of the reference voltage circuit 1C having the above-described configuration will be described. The reference voltage circuit 1C in such a configuration is basically the same as that of the second embodiment, except for the points described later.

[0092] Similar to the second embodiment, the PTAT voltage V PTAT is represented by the above equations 15 and 16.

[0093] According to Equation 15 and Equation 16, the PTAT voltage V PTAT is the value obtained by multiplying the thermal voltage V of the semiconductor material T by a constant K G2 . The thermal voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0094] The reference voltage VREF3 generated by the reference voltage circuit 1C is represented by Equation 19.

[0095]

Equation

[0096] That is, by adjusting the ratio of the aspect ratios S (W / L) of the transistors M11B and M12B (S M12B / S M11B ) and the ratio of the resistance values of the resistors R1B and R2B, as shown in Equation 20, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2C and the temperature characteristic of the thermal voltage V T generated by the temperature characteristic correction unit 3C are made equal to the constant K T representing the amplification factor of the thermal voltage V G2 . Under this condition, by adding the PTAT voltage V GS_M2 having a positive temperature coefficient generated by the temperature characteristic correction unit 3C to the output voltage V PATA having a negative temperature coefficient generated by the reference voltage generation unit 2C, the temperature characteristic of the reference voltage VREF3 can be offset.

[0097]

Equation

[0098] That is, in this third embodiment, the reference voltage circuit 1C adjusts the ratio of the aspect ratios S (W / L) of the transistors M1C and M2 (S M1C / S M2Set [[ID=]] to equal conditions (approx. 1), and adopt a circuit configuration in which the negative temperature characteristics generated by the reference voltage generation unit 2C are offset by the positive temperature characteristics generated by the temperature characteristic correction unit 3C, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0099] Therefore, it is possible to reduce the variation in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and an effect of enhancing radiation resistance is obtained.

[0100] Also, according to the above-described third embodiment, it is not necessary to prepare a constant current source 31 separately from the transistor M1C.

[0101] Note that the present invention is not limited to the above-described embodiments, and can be appropriately modified, improved, etc. In addition, the material, shape, dimensions, number, arrangement location, etc. of each component in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.

[0102] In the above-described embodiments, the transistors M11 to M14, M13B, M14B, M5, and M6 were composed of field effect transistors, but the present invention is not limited to this. A bipolar transistor may be used instead of the field effect transistor. In this case, "P channel" can be read as "PNP type", "N channel" as "NPN type", "gate" as "base", "source" as "emitter", and "drain" as "collector" for explanation.

[0103] In the above-described embodiments, the temperature characteristic correction units 3, 3B, and 3C were composed of transistors M11 and M12, and M11B and M12B having different aspect ratios, but the present invention is not limited to this. As the temperature characteristic correction units 3, 3B, and 3C, any other configuration may be used as long as it can generate a PTAT voltage V having positive temperature characteristics. PTAT

Explanation of Reference Numerals

[0104] 1, 1B, 1C Reference voltage circuit ​2,2C Reference Voltage Generation Unit 3,3B,3C Temperature Characteristic Correction Unit 31 Constant Current Source (Current Source) M1,M1C Transistor (First Field Effect Transistor) M2 Transistor (Second Field Effect Transistor) M11,M11B Transistor (First Transistor) M12,M12B Transistor (Second Transistor) M13,M13B Transistor (Third Transistor) M14,M14B Transistor (Fourth Transistor) M5 Transistor (Fifth Transistor) M6 Transistor (Sixth Transistor) R1,R1B Resistor (First Resistor) R2,R2B Resistor (Second Resistor)

Claims

1. A depletion-type first field-effect transistor having a gate electrode containing an n-type impurity, and an enhancement-type second field-effect transistor having a gate electrode containing a p-type impurity and having an aspect ratio equal to that of the first field-effect transistor, a reference voltage generation unit that causes a constant current generated by the first field-effect transistor to flow through the second field-effect transistor to generate an output voltage corresponding to a difference between a threshold voltage of the first field-effect transistor and a threshold voltage of the second field-effect transistor between a gate and a source of the second field-effect transistor, and a temperature characteristic correction unit that generates a correction voltage having a positive temperature characteristic for correcting a temperature characteristic of the output voltage generated by the reference voltage generation unit, and outputs, as a reference voltage, a voltage obtained by adding the correction voltage generated by the temperature characteristic correction unit to the output voltage generated by the reference voltage generation unit. A reference voltage circuit.

2. In the reference voltage circuit according to Claim 1, the temperature characteristic correction unit includes a first resistor and a second resistor connected in series to a source of the second field-effect transistor, and a first transistor and a second transistor having different aspect ratios, and a difference between gate-source voltages of the first transistor and the second transistor is applied across the first resistor. A reference voltage circuit.

3. In the reference voltage circuit according to Claim 2, the temperature characteristic correction unit further includes a third transistor connected in series to the second transistor, and a fourth transistor connected in series to the first transistor, and the first transistor and the second transistor are connected in a current mirror configuration, The third transistor and the fourth transistor are connected in a current mirror configuration, The sources or emitters of the first transistor and the second transistor are respectively connected to both ends of the first resistor, A reference voltage circuit. **Claim 4** In the reference voltage circuit according to claim 2, The temperature characteristic correction unit, A third transistor connected in series with the first transistor, A fourth transistor connected in series with the second transistor, A current source commonly connected to the sources or emitters of the first transistor and the second transistor, A fifth transistor having a source or emitter connected to the sources or emitters of the third transistor and the fourth transistor, a drain or collector connected to the source of the second field effect transistor, and a gate or base connected to the connection point between the fourth transistor and the second transistor, and further having, The third transistor and the fourth transistor are connected in a current mirror configuration, The first transistor and the second transistor are composed of depletion types, The gates of the first transistor and the second transistor are respectively connected to both ends of the first resistor, A reference voltage circuit. **Claim 5** In the reference voltage circuit according to claim 4, The current source is composed of the first field effect transistor with its gate and source connected, It has a sixth transistor connected in a current mirror configuration to the third transistor and folding back the current flowing through the third transistor, The current folded back by the sixth transistor is supplied to the second field effect transistor, A reference voltage circuit. **Claim 6** In the reference voltage circuit according to any one of claims 1 to 5, at least one of the transistors is composed of a field effect transistor, reference voltage circuit.

7. In the reference voltage circuit according to any one of claims 1 to 5, at least one of the transistors is composed of a bipolar transistor, reference voltage circuit.

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