Reference voltage circuit

Abstract

To provide a reference voltage circuit capable of reducing variations in reference voltage due to process variation, temperature variation, and power supply voltage variation, and having enhanced radiation resistance.SOLUTION: A reference voltage generation unit 2 includes: a depletion-type transistor M1 in which a gate electrode containing an n-type impurity is formed; and an enhancement-type transistor M2 in which a gate electrode containing a p-type impurity is formed. The reference voltage generation unit 2 generates an output voltage VGS_M2 having a negative temperature characteristic. A temperature characteristic correction unit 3 includes: a transistor M11 whose drain is connected to a source of the transistor M2; a transistor M12 whose gate and drain are connected to a gate of the transistor M11 and whose source is connected to the drain of the transistor M11; and a depletion-type transistor M3 that supplies current to the transistors M11 and M12.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a reference voltage circuit.

Background Art

[0002] In electronic devices used in environments irradiated with radiation such as outer space and around nuclear reactors, and in electronic components such as those subjected to radiation transmission inspection in non-destructive inspection in the manufacturing process, where X-rays or γ-rays are irradiated, due to the irradiation of ionizing radiation such as X-rays and γ-rays, various radiation damages are suffered, resulting in malfunction or characteristic variation of the circuit, and sometimes causing degradation of the system function. With the rapid progress of the communication and informatization society, the radiation resistance of electronic devices and electronic components has become a major issue. Many semiconductor integrated circuits are used in electronic devices, and the present invention aims to enhance the radiation resistance of a reference voltage circuit widely used as a constant voltage source of a semiconductor integrated circuit and contribute to the stable operation of electronic devices.

[0003] Conventionally, as a reference voltage circuit used in a semiconductor integrated circuit, a circuit using the principle of the work function difference of the gate electrode of a transistor as shown in FIG. 5 is known (see, for example, Patent Documents 1 and 2). The reference voltage circuit 100 shown in FIG. 5 is mainly composed of a depletion-type field-effect transistor M1 whose gate electrode is formed of polysilicon containing n-type impurities and an enhancement-type field-effect transistor M2 whose gate electrode is formed of polysilicon containing p-type impurities.

[0004] The impurity concentrations of the substrates and channel doping regions forming transistors M1 and M2 are made the same, and the conductivity type of the polysilicon forming the gate electrodes is such that the gate electrode of the depletion-type field-effect transistor M1 is n-type and the gate electrode of the enhancement-type field-effect transistor M2 is p-type. By using the work function difference caused by the difference in the conductivity type of the gate electrodes, a difference is provided in the threshold voltages of transistors M1 and M2, generating a reference voltage of about 1V (see, for example, Patent Document 3). In this case, since the impurity concentrations of the substrates and channel doping regions of transistors M1 and M2 are equal, it is possible to reduce the variation in the reference voltage due to process variations, temperature variations, and power supply voltage variations.

[0005] The gate and source of transistor M1 are connected to the gate and drain of transistor M2, and the constant current generated by transistor M1 is passed through transistor M2, and a voltage corresponding to the difference in the threshold voltages of transistors M1 and M2, that is, the difference in the work functions of the gate electrodes of transistors M1 and M2, is output as a reference voltage from the common connection part of transistors M1 and M2.

[0006] The temperature characteristic of the reference voltage is such that since the gate electrode of transistor M1 is formed of polysilicon containing n-type impurities and the gate electrode of transistor M2 is formed of polysilicon containing p-type impurities, the temperature characteristics of the work functions of the gate electrodes of transistors M1 and M2 have opposite polarities, resulting in a difference in the temperature coefficients of the threshold voltages. When the aspect ratios S (W / L) of the channel widths W and channel lengths L of transistors M1 and M2 are equal (S M1 =S M2 ), the temperature coefficient does not become zero and has a negative temperature characteristic of about -0.5 mV / °C (see, for example, Patent Document 3).

[0007] Since the reference voltage VREF is the voltage difference between the threshold voltages of transistors M1 and M2 as expressed by Equation 1, it is possible to generate a stable reference voltage that is less affected by process variations and power supply voltage fluctuations. Also, good temperature characteristics can be obtained by adjusting the aspect ratio S (W / L) of the channel width W and channel length L of transistors M1 and M2.

[0008]

Number

[0009] Here, V TH_M1 is the threshold voltage of transistor M1, V TH_M2 is the threshold voltage of transistor M2, S M1 is the aspect ratio (W M1 / L M1 ) of transistor M1, S M2 is the aspect ratio (W M2 / L M2 ) of transistor M2.

[0010] The characteristic degradation due to radiation irradiation is mainly caused by the generation of positive charges in the silicon oxide film and the increase in the interface trap density at the interface between the silicon oxide film and the silicon substrate, which reduces the threshold voltages of transistors M1 and M2 constituting the reference voltage circuit 100 (see, for example, Non-Patent Document 1).

[0011] In the conventional reference voltage circuit 100 described above, since the amount of change in the threshold voltages of transistors M1 and M2 due to radiation irradiation is equal, when the ratio of the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2 ) of transistor M2 is equal (S M1 =S M2 ), the reference voltage does not change due to radiation irradiation. However, in order to correct the temperature characteristics, the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2) at different ratios (S M1 ≠S M2 ), when irradiated with radiation, there was a problem that the reference voltage fluctuated because the amounts of variation of the first and second terms of Equation 1 were different.

Prior Art Documents

Patent Documents

[0012]

Patent Document 1

Patent Document 2

Patent Document 3

Non-Patent Documents

[0013]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0014] The present invention has been made in view of the above circumstances, and its object is to provide a reference voltage circuit capable of reducing variations in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and enhancing radiation resistance.

Means for Solving the Problems

[0015] In order to achieve the above object, the reference voltage circuit according to the present invention is characterized by the following [1] to [7]. [1] A depletion-type first field-effect transistor having a gate electrode containing n-type impurities, and A gate electrode containing p-type impurities is formed, and it has an enhancement-type second field-effect transistor having the same aspect ratio as the first field-effect transistor. A reference voltage generation unit that causes the constant current generated by the first field-effect transistor to flow through the second field-effect transistor, and generates a voltage corresponding to the difference between the threshold voltage of the first field-effect transistor and the threshold voltage of the second field-effect transistor between the gate and source of the second field-effect transistor. A first transistor having a drain or collector connected to the source of the second field-effect transistor. A second transistor having a gate and a drain or a base and a collector connected to the gate or base of the first transistor, and a source or emitter connected to the drain or collector of the first transistor. A first temperature characteristic correction unit including a first current source that supplies current to the first transistor and the second transistor. The first transistor and the second transistor have different aspect ratios. It is a reference voltage circuit. [2] In the reference voltage circuit according to [1], The first current source is composed of a depletion-type third field-effect transistor having a gate electrode containing n-type impurities with a gate and a source connected to the drain or collector of the second transistor. It is a reference voltage circuit. [3] In the reference voltage circuit according to [1], A third transistor having a drain or collector connected to the source or emitter of the first transistor. A fourth transistor having a gate and a drain or a base and a collector connected to the gate or base of the third transistor, and a source or emitter connected to the drain or collector of the third transistor. A second temperature characteristic correction unit having a second current source that supplies current to the third transistor and the fourth transistor; The third transistor and the fourth transistor have different aspect ratios; It is a reference voltage circuit. [4] In the reference voltage circuit according to [1], A third transistor; A fourth transistor having a gate and a drain or a base and a collector connected to the gate or the base of the third transistor, and a source or an emitter connected to the drain or the collector of the third transistor; A plurality of second temperature characteristic correction units having a second current source that supplies current to the third transistor and the fourth transistor; The third transistor and the fourth transistor have different aspect ratios; The plurality of second temperature characteristic correction units are connected in parallel; The drain or collector of the third transistor of the second temperature characteristic correction unit connected closest to the first temperature characteristic correction unit is connected to the source or emitter of the first transistor; The drain or collector of the third transistor of the remaining second temperature characteristic correction units is connected to the source or emitter of the third transistor of the adjacent second temperature characteristic correction unit; It is a reference voltage circuit. [5] In the reference voltage circuit according to [3] or [4], The second current source is composed of a depletion-type fourth field-effect transistor in which an n-type impurity-containing gate electrode having a gate and a source connected to the drain or collector of the fourth transistor is formed; It is a reference voltage circuit. [6] In the reference voltage circuit according to any one of [1] to [4], At least one of the transistors is composed of a field-effect transistor. It is a reference voltage circuit. [7] In the reference voltage circuit according to any one of [1] to [4], At least one of the transistors is composed of a bipolar transistor. It is a reference voltage circuit. [Advantages of the Invention]

[0016] According to the present invention, it is possible to reduce variations in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and to provide a reference voltage circuit with enhanced radiation resistance.

[0017] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments") with reference to the accompanying drawings. [Brief Description of the Drawings]

[0018]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

[0019] Specific embodiments of the present invention will be described below with reference to the respective drawings.

[0020] (First Embodiment) First, the reference voltage circuit 1 of the first embodiment will be described with reference to FIG. 1. As shown in the figure, the reference voltage circuit 1 includes a reference voltage generation unit 2 that generates a reference voltage, and a temperature characteristic correction unit 3 (= first temperature characteristic correction unit) that generates a PTAT (Proportional To Absolute Temperature) voltage for correcting the temperature characteristic of the reference voltage.

[0021] The reference voltage generation unit 2 includes a transistor M1 (= first field effect transistor) and a transistor M2 (= second field effect transistor). The transistor M1 is composed of an N-channel depletion type field effect transistor in which polysilicon containing n-type impurities is formed as a gate electrode. The transistor M2 is composed of an N-channel enhancement type field effect transistor in which polysilicon containing p-type impurities is formed as a gate electrode.

[0022] The drain of the transistor M1 is connected to the positive power supply terminal T21. A positive power supply voltage VDD is supplied to the positive power supply terminal T21. The gate and source of the transistor M1 are connected to the gate and drain of the transistor M2, and the common connection portion of the transistors M1 and M2 is connected to the output terminal T3. The reference voltage VREF1 is output from the output terminal T3. The constant current I1 generated by the transistor M1 is passed through the transistor M2, and a voltage corresponding to the difference between the threshold voltage of the transistor M2 and the threshold voltage of the transistor M1 is output as the gate-source voltage of the transistor M2. The transistors M1 and M2 are provided with equal aspect ratios. Therefore, the gate-source voltage of the transistor M2 has a negative temperature characteristic.

[0023] The temperature characteristic correction unit 3 is a PTAT voltage V having a positive temperature characteristic PTATIt is supplied to the source of the transistor M2 to reduce the temperature variation of the reference voltage VREF1. The temperature characteristic correction unit 3 includes a transistor M3 (= third field effect transistor, first current source), a transistor M11 (= first transistor), and a transistor M12 (= second transistor). The transistor M3 is composed of an N-channel depletion type field effect transistor in which polysilicon containing n-type impurities is formed as a gate electrode. The transistors M11 and M12 are composed of N-channel field effect transistors.

[0024] The drain of the transistor M3 is connected to the positive power supply terminal T21, and the gate and source are connected to the gate and drain of the transistor M12.

[0025] The gate and drain of the transistor M12 are connected to the gate of the transistor M11, and the source is connected to the drain of the transistor M11 and the source of the transistor M2.

[0026] The source of the transistor M11 is connected to the negative power supply terminal T22. A negative power supply voltage VSS is supplied to the negative power supply terminal T22. The aspect ratio S of the transistor M12 M12 is provided as N times (N>1) the aspect ratio S of the transistor M11 M11 .

[0027] Next, the operation of the reference voltage circuit 1 having the above-described configuration will be described. First, the operation of the reference voltage generation unit 2 will be described with reference to FIG. 2. FIG. 2 is a graph showing the relationship between the gate-source voltage Vgs and the drain current Ids of the transistors M1 and M2. As shown in the figure, the depletion type transistor M1 connected so as to function as a current source supplies a constant current I1 to the drain of the enhancement type transistor M2 connected in diode connection. When the aspect ratios of the transistors M1 and M2 are equal, this constant current I1 causes the threshold voltage V of the transistor M2 TH_M2 and the threshold voltage V of the transistor M1 TH_M1A voltage corresponding to the difference from [voltage value] is output as the gate-source voltage V GS_M2 of transistor M2. This gate-source voltage V GS_M2 becomes the output voltage generated by the reference voltage generation unit 2. Considering the ratio of the aspect ratios of transistors M1 and M2, the output voltage V GS_M2 generated by the reference voltage generation unit 2 is expressed by Equation 2.

[0028]

Equation

[0029] Here, V TH_M1 is the threshold voltage of transistor M1, V TH_M2 is the threshold voltage of transistor M2, S M1 is the aspect ratio (W M1 / L M1 ) of transistor M1, S M2 is the aspect ratio (W M2 / L M2 ) of transistor M2.

[0030] The output voltage V GS_M2 generated by the reference voltage generation unit 2 expressed by Equation 2 can generate a stable voltage that is not easily affected by process variations or power supply voltage fluctuations.

[0031] As described above, the gate electrode of transistor M1 is formed of polysilicon containing n-type impurities, and the gate electrode of transistor M2 is formed of polysilicon containing p-type impurities. Therefore, the temperature characteristics of the work functions of the gate electrodes of transistors M1 and M2 have opposite polarities, resulting in a difference in the temperature coefficients of the threshold voltages. When the aspect ratios S (W / L) of the channel widths W and channel lengths L of transistors M1 and M2 are equal (S M1 = S M2 ), if there is a difference in the temperature coefficients of the threshold voltages, the temperature coefficient of the output voltage V GS_M2 will not be zero. The output voltage V GS_M2 has a negative temperature characteristic of about -0.5 mV / °C.

[0032] As for improving the temperature characteristics, the channel width W of the transistor M1 M1 and the channel length L M1 ratio S M1 (W M1 / L M1 ) and the channel width W of the transistor M2 M2 and the channel length L M2 ratio S M2 (W M2 / L M2 ) are each adjusted, and the ratio (S M1 / S M2 ) of the aspect ratios S (W / L) of the transistors M1 and M2 is set in the range of about 1.5 to 2, so that the output voltage V GS_M2 can be stabilized against temperature changes.

[0033] However, due to radiation irradiation, positive charges are generated in the oxide film and the interface trap density at the interface between the silicon oxide film and the silicon substrate increases, so the threshold voltages of the transistors M1 and M2 decrease. Since the amount of change in the threshold voltages of the transistors M1 and M2 due to radiation irradiation is equal, when the aspect ratios (W M1 / L M1 ) of the transistor M1 and the aspect ratio (W M2 / L M2 ) of the transistor M2 are equal (S M1 =S M2 ), the reference voltage does not change due to radiation irradiation. However, when the aspect ratios (W M1 / L M1 ) of the transistor M1 and the aspect ratio (W M2 / L M2 ) of the transistor M2 are different ratios (S M1 ≠S M2 ), when irradiated with radiation, the amounts of change in the first and second terms of Equation 2 are different, so the output voltage V GS_M2 varies.

[0034] The reference voltage circuit 1 of the present invention equalizes the aspect ratios of transistors M1 and M2 in order to reduce fluctuations in the reference voltage VREF1 due to radiation irradiation. Further, in order to reduce fluctuations in the reference voltage VREF1 due to temperature, a PTAT voltage V having a positive temperature characteristic is generated by the temperature characteristic correction unit 3 and added to the output voltage V of the reference voltage generation unit 2. PTAT is generated and added to GS_M2 the output voltage V of

[0035] Next, the operation of the temperature characteristic correction unit 3 will be described. The depletion-type transistor M3 connected to function as a current source supplies a constant current I2 to transistors M11 and M12 connected in series. The depletion-type transistor M1 connected to function as a current source supplies a constant current I1 to transistor M11 via transistor M2.

[0036] The PTAT voltage V which is the source potential of transistor M2 PTAT is represented by Equation 3.

[0037]

Equation

[0038] When transistors M11 and M12 operate in the subthreshold region, since the drain current changes exponentially with respect to the change in the gate-source potential difference, the gate-source voltages V GS_M11 , V GS_M12 of transistors M11 and M12 are represented by the following Equations 4 and 5, respectively.

[0039]

Equation

[0040]

Equation

[0041] Here, V Tis the thermoelectric voltage (kT / q), where k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, and I S is the reverse saturation current of transistor M11, and I S ·S M12 / S M11 is the reverse saturation current of transistor M12.

[0042] From Equations 3 to 5, the following Equations 6 and 7 are obtained.

[0043]

Equation

[0044]

Equation

[0045] When the ratio of the aspect ratios S (W / L) of transistors M1 and M3 is equal (S M1 = S M3 ), the drain currents of transistors M1 and M3 are equal (I1 = I2). In this case, the constant K G1 is represented by the following Equation 8.

[0046]

Equation

[0047] According to Equations 6 to 8, the PTAT voltage V PTAT is the value obtained by multiplying the thermoelectric voltage V T of the semiconductor material by the constant K G1 . The thermoelectric voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0048] The reference voltage VREF1 generated by the reference voltage circuit 1 is represented by Equation 9.

[0049]

Equation

[0050] That is, the ratio (S M12 / S M11 ) of the aspect ratios S(W / L) of the transistors M11 and M12 is adjusted, and as shown in Equation 10, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 and the temperature characteristic of the thermoelectric voltage V T generated by the temperature characteristic correction unit 3 are made equal to the constant K T representing the amplification factor of the thermoelectric voltage V G1 . Under this condition, the positive temperature coefficient PTAT voltage V GS_M2 generated by the temperature characteristic correction unit 3 is added to the output voltage V PTAT having a negative temperature coefficient generated by the reference voltage generation unit 2, so that the temperature characteristic of the reference voltage VREF1 can be canceled out.

[0051]

Equation

[0052] That is, the reference voltage circuit 1 in this first embodiment sets the ratio (S M12 / S M11 ) of the aspect ratios S(W / L) of the transistors M11 and M12 to an equal condition (about 1) so that the reference voltage VREF1 does not fluctuate even when irradiated with radiation, and has a circuit configuration in which the negative temperature characteristic generated by the reference voltage generation unit 2 is canceled out by the positive temperature characteristic generated by the temperature characteristic correction unit 3, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0053] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0054] In the first embodiment, the source of the transistor M11 was connected to the negative power supply terminal T22. However, this is not restrictive. A circuit for generating at least one or more PTAT voltages may be connected between the source of the transistor M11 and the negative power supply terminal T22.

[0055] (Second Embodiment) Next, the reference voltage circuit 1B of the second embodiment will be described with reference to FIG. 3. In FIG. 3, the same components as those in the circuit shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

[0056] As shown in the figure, the reference voltage circuit 1B includes a temperature characteristic correction unit 3B (= second temperature characteristic correction unit) in addition to the reference voltage generation unit 2 and the temperature characteristic correction unit 3, similar to the first embodiment. Since the reference voltage generation unit 2 and the temperature characteristic correction unit 3 are the same as those in the first embodiment described above, detailed description thereof is omitted here.

[0057] The temperature characteristic correction unit 3B includes a transistor M4 (= fourth field effect transistor, second current source), a transistor M13 (= third transistor), and a transistor M14 (= fourth transistor). The transistor M4 is composed of an N-channel depletion type field effect transistor in which polysilicon containing n-type impurities is formed as a gate electrode. The transistors M13 and M14 are composed of N-channel field effect transistors.

[0058] For the transistor M4, the drain is connected to the positive power supply terminal T21, and the gate and source are connected to the gate and drain of the transistor M14.

[0059] For the transistor M14, the gate and drain are connected to the gate of the transistor M13, and the source is connected to the drain of the transistor M13 and the source of the transistor M11. For the transistor M13, the source is connected to the load power supply terminal T22. The aspect ratio S of the transistor M14 M14 is the aspect ratio S of the transistor M13M13 is provided at N times (N > 1) of

[0060] Next, the operation of the reference voltage circuit 1B having the above-described configuration will be described. The reference voltage circuit 1B in such a configuration is basically the same as that of the first embodiment except for the points described later.

[0061] The depletion-type transistor M4 connected so as to function as a current source supplies a constant current I3 to the transistors M13 and M14 connected in series. The depletion-type transistor M3 connected so as to function as a current source supplies a constant current I2 to the transistor M13 through the transistors M12 and M11 connected in series. The depletion-type transistor M1 connected so as to function as a current source supplies a constant current I1 to the transistor M13 through the transistors M2 and M11.

[0062] The PTAT voltage V PTAT is represented by Equation 11.

[0063]

Equation

[0064] The gate-source voltages V GS_M11 , V GS_M12 of the transistors M11 and M12 are represented by the above-described Equations 4 and 5 in the same manner as in the first embodiment. When the transistors M13 and M14 operate in the subthreshold region, the drain current changes exponentially with respect to the change in the gate-source potential difference. Therefore, the gate-source voltages V GS_M13 , V GS_M14 of the transistors M13 and M14 are represented by the following Equations 12 and 13, respectively.

[0065]

Equation

[0066]

Equation

[0067] Here, V T is the thermoelectric voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M13, I S ·S M14 / S M13 is the reverse saturation current of transistor M14.

[0068] From equations 4, 5, 11 to 13, the following equations 14 and 15 are obtained.

[0069]

Equation

[0070]

Equation

[0071] When the ratios of the aspect ratios S (W / L) of transistors M1, M3, and M4 are equal (S M1 = S M3 = S M4 ), the drain currents of transistors M1, M3, and M4 are equal (I1 = I2 = I3). In this case, the constant K G2 is represented by the following equation 16.

[0072]

Equation

[0073] According to equations 14 to 16, the PTAT voltage V PTAT is the value obtained by multiplying the thermoelectric voltage V T of the semiconductor material by the constant K G2 . The thermoelectric voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0074] The reference voltage VREF2 generated by the reference voltage circuit 1B is represented by Equation 17.

[0075]

Equation

[0076] That is, the ratio of the aspect ratios S (W / L) of the transistors M11 and M12 (S M12 / S M11 ) and the ratio of the drain currents, and the ratio of the aspect ratios S (W / L) of the transistors M13 and M14 (S M14 / S M13 ) and the ratio of the drain currents are adjusted. As shown in Equation 18, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 is made equal to the ratio of the temperature characteristic of the thermoelectric voltage V T generated by the temperature characteristic correction units 3 and 3B to the temperature characteristic of the thermoelectric voltage V T . The constant K G2 representing the amplification factor of the thermoelectric voltage V GS_M2 having a negative temperature coefficient generated by the reference voltage generation unit 2, and the PTAT voltage V PTAT having a positive temperature coefficient generated by the temperature characteristic correction units 3 and 3B are added to cancel out the temperature characteristic of the reference voltage VREF2.

[0077]

Equation

[0078] That is, in the reference voltage circuit 1B of this second embodiment, the ratio of the aspect ratios S (W / L) of the transistors M1 and M2 (S M1 / S M2 ) is set to an equal condition (about 1) so that the reference voltage VREF2 does not fluctuate even when irradiated with radiation. The circuit configuration is such that the negative temperature characteristic generated by the reference voltage generation unit 2 is canceled out by the positive temperature characteristic generated by the temperature characteristic correction units 3 and 3B, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0079] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0080] In addition, in the above-described second embodiment, in addition to the ratio of the aspect ratios and the ratio of the drain currents of the transistors M11 and M12, the ratio of the aspect ratios and the ratio of the drain currents of the transistors M13 and M14 are adjusted to adjust the PTAT voltage V PTAT Therefore, the PTAT voltage V PTAT can be easily adjusted.

[0081] (Third Embodiment) Next, the reference voltage circuit 1C of the third embodiment will be described with reference to FIG. 4. In FIG. 4, the same components as those in the circuit shown in FIG. 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0082] As shown in the figure, the reference voltage circuit 1C includes a temperature characteristic correction unit 3C (= second temperature characteristic correction unit) in addition to the reference voltage generation unit 2 and the temperature characteristic correction units 3 and 3B, similar to the second embodiment. Since the reference voltage generation unit 2 and the temperature characteristic correction units 3 and 3B are the same as those in the above-described second embodiment, detailed description thereof will be omitted here.

[0083] The temperature characteristic correction unit 3C includes a transistor M4C (= fourth field effect transistor, second current source), a transistor M13C (= third transistor), and a transistor M14C (= fourth transistor). The transistor M4C is composed of an N-channel depletion type field effect transistor in which polysilicon containing an n-type impurity is formed as a gate electrode. The transistors M13C and M14C are composed of N-channel field effect transistors.

[0084] The drain of the transistor M4C is connected to the positive power supply terminal T21, and the gate and source are connected to the gate and drain of the transistor M14C.

[0085] The transistor M14C has its gate and drain connected to the gate of the transistor M13C, and its source connected to the drain of the transistor M13C and the source of the transistor M13.

[0086] The transistor M13C has its source connected to the negative power supply terminal T22. The aspect ratio S of the transistor M14C M14C is set to N times (N > 1) the aspect ratio S of the transistor M13C. M13C of the transistor M13C.

[0087] Next, the operation of the reference voltage circuit 1C having the above-described configuration will be described. The reference voltage circuit 1C in such a configuration is basically the same as that of the second embodiment, except for the points described later.

[0088] The depletion-type transistor M4C connected so as to function as a current source supplies a constant current I4 to the transistors M13C and M14C connected in series. The depletion-type transistor M4 connected so as to function as a current source supplies a constant current I3 to the transistor M13C through the transistors M14 and M13 connected in series. The depletion-type transistor M3 connected so as to function as a current source supplies a constant current I2 to the transistor M13C through the transistors M12, M11, and M13 connected in series. The depletion-type transistor M1 connected so as to function as a current source supplies a constant current I1 to the transistor M13C through the transistors M2, M11, and M13.

[0089] The PTAT voltage V which is the source potential of the transistor M12 PTAT is represented by Equation 19.

[0090]

Equation

[0091] The gate-source voltages V GS_M11 , V GS_M12is represented by Expressions 4 and 5 described above in the same manner as in the first embodiment. The gate-source voltages V GS_M13 , V GS_M14 are represented by Expressions 12 and 13 described above in the same manner as in the second embodiment. When transistors M13C and M14C operate in the subthreshold region, since the drain current changes exponentially with respect to the change in the gate-source potential difference, the gate-source voltages V GS_M13C , V GS_M14C of transistors M13C and M14C are represented by the following Expressions 20 and 21, respectively.

[0092]

Equation

[0093]

Equation

[0094] Here, V T is the thermal voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M13C, and I S ·S M14C / S M13C is the reverse saturation current of transistor M14C.

[0095] From Expressions 4, 5, 12, 13, and 19 to 21, the following Expressions 22 and 23 are obtained.

[0096]

Equation

[0097]

Equation

[0098] When the ratios of the aspect ratios S(W / L) of the transistors M1, M3, M4, and M4C are equal (S M1 = S M3 = S M4 = S M4C ), the drain currents of the transistors M1, M3, M4, and M4C become equal (I1 = I2 = I3 = I4). In this case, the constant K G3 is represented by Equation 24 below.

[0099]

Equation

[0100] According to Equations 22 to 24, the PTAT voltage V PTAT is a value obtained by multiplying the thermal voltage V T of the semiconductor material by the constant K G3 . The thermal voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0101] The reference voltage VREF3 generated by the reference voltage circuit 1C is represented by Equation 25.

[0102]

Equation

[0103] That is, by adjusting the ratios of the aspect ratios S(W / L) and the ratios of the drain currents of the transistors M11 and M12, the ratios of the aspect ratios S(W / L) and the ratios of the drain currents of the transistors M13 and M14, and the ratios of the aspect ratios S(W / L) and the ratios of the drain currents of the transistors M13C and M14C, as shown in Equation 26, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 is made equal to the ratio of the temperature characteristic of the thermal voltage V T generated by the temperature characteristic correction units 3, 3B, and 3C. Under this condition, the output voltage V T having a negative temperature coefficient generated by the reference voltage generation unit 2 G3 GS_M2 ​is added to cancel out the temperature characteristics of the reference voltage VREF3. PTAT That is, in the reference voltage circuit 1C of this third embodiment, the ratio of the aspect ratios S (W / L) of the transistors M1 and M2 (S

[0104]

Equation

[0105] / S M1 is set to an equal condition (about 1) so that the reference voltage VREF3 does not fluctuate even when irradiated with radiation, and the negative temperature characteristics generated by the reference voltage generation unit 2 are canceled out by the positive temperature characteristics generated by the temperature characteristic correction units 3, 3B, and 3C. By adopting such a circuit configuration, characteristic fluctuations due to radiation irradiation are suppressed. M2 )

[0106] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0107] Also, in the third embodiment described above, in addition to the ratio of the aspect ratios and the drain current ratios of the transistors M11 and M12, and the ratio of the aspect ratios and the drain current of the transistors M13 and M14, the ratio of the aspect ratios and the drain current ratio of the transistors M13C and M14C are adjusted to adjust the PTAT voltage V PTAT Therefore, the PTAT voltage V PTAT can be easily adjusted.

[0108] Note that the present invention is not limited to the above-described embodiments, and can be appropriately modified, improved, etc. In addition, the materials, shapes, dimensions, numbers, arrangement locations, etc. of the respective components in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.

[0109] In the above-described embodiments, the transistors M11 to M14, M13C, and M14C were composed of field-effect transistors, but the present invention is not limited thereto. A bipolar transistor may be used instead of the field-effect transistor. In this case, "P-channel" may be read as "PNP type", "N-channel" as "NPN type", "gate" as "base", "source" as "emitter", and "drain" as "collector" for explanation.

[0110] In the above-described embodiments, one or two temperature characteristic correction units 3B and 3C were connected to the temperature characteristic correction unit 3, but the present invention is not limited thereto. Three or more temperature characteristic correction units may be connected.

[0111] In the above-described embodiments, the first current source and the second current source were composed of depletion-type field-effect transistors M3, M4, and M4C, but the present invention is not limited thereto. As long as it is a constant current source proportional to the current generated by the transistor M1, other well-known constant current sources may be used as the first current source and the second current source. Also, the current generated by the depletion-type field-effect transistor may be connected in a current mirror configuration and supplied to the transistors M2, M11, M12, M13, M14, M13C, and M14C.

Explanation of Reference Numerals

[0112] 1, 1B, 1C Reference voltage circuit 2 Reference voltage generation unit 3 Temperature characteristic correction unit (first temperature characteristic correction unit) 3B, 3C Temperature characteristic correction unit (second temperature characteristic correction unit) M1 Transistor (first field-effect transistor) M2 Transistor (second field-effect transistor) M3 Transistor (third field-effect transistor, first current source) M4, M4C Transistors (fourth field-effect transistor, second current source) M11 Transistor (first transistor) M12 transistor (second transistor) M13, M13C transistors (third transistor) M14, M14C transistors (fourth transistor)

Claims

1. A depletion-type first field-effect transistor having a gate electrode containing an n-type impurity, and an enhancement-type second field-effect transistor having a gate electrode containing a p-type impurity and having an aspect ratio equal to that of the first field-effect transistor, a reference voltage generation unit that causes a constant current generated by the first field-effect transistor to flow through the second field-effect transistor, and generates a voltage corresponding to the difference between the threshold voltage of the first field-effect transistor and the threshold voltage of the second field-effect transistor between the gate and source of the second field-effect transistor, a first transistor having a drain or collector connected to the source of the second field-effect transistor, a second transistor having a gate and a drain or a base and a collector connected to the gate or base of the first transistor, and a source or emitter connected to the drain or collector of the first transistor, and a first temperature characteristic correction unit having a first current source that supplies current to the first transistor and the second transistor, wherein the first transistor and the second transistor have different aspect ratios, A reference voltage circuit.

2. In the reference voltage circuit according to claim 1, the first current source is composed of a depletion-type third field-effect transistor having a gate electrode containing an n-type impurity, with a gate and a source connected to the drain or collector of the second transistor, A reference voltage circuit.

3. In the reference voltage circuit according to claim 1, a third transistor having a drain or collector connected to the source or emitter of the first transistor, A fourth transistor in which a gate and a drain or a base and a collector are connected to the gate or the base of the third transistor, and a source or an emitter is connected to the drain or the collector of the third transistor, A second temperature characteristic correction unit including a second current source that supplies current to the third transistor and the fourth transistor, The third transistor and the fourth transistor have different aspect ratios, A reference voltage circuit.

4. In the reference voltage circuit according to claim 1, A third transistor, A fourth transistor in which a gate and a drain or a base and a collector are connected to the gate or the base of the third transistor, and a source or an emitter is connected to the drain or the collector of the third transistor, A plurality of second temperature characteristic correction units including a second current source that supplies current to the third transistor and the fourth transistor, The third transistor and the fourth transistor have different aspect ratios, The plurality of second temperature characteristic correction units are connected in parallel, A drain or a collector of the third transistor of the second temperature characteristic correction unit connected closest to the first temperature characteristic correction unit is connected to a source or an emitter of the first transistor, A drain or a collector of the third transistor of the remaining second temperature characteristic correction units is connected to a source or an emitter of the third transistor of the adjacent second temperature characteristic correction unit, A reference voltage circuit.

5. In the reference voltage circuit according to claim 3 or 4, The second current source is composed of a depletion-type fourth field-effect transistor in which a gate electrode including an n-type impurity whose gate and source are connected to the drain or the collector of the fourth transistor is formed, Reference voltage circuit.

6. In the reference voltage circuit according to any one of claims 1 to 4, at least one of the transistors is composed of a field effect transistor, Reference voltage circuit.

7. In the reference voltage circuit according to any one of claims 1 to 4, at least one of the transistors is composed of a bipolar transistor, Reference voltage circuit.

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