Printed circuit board

Abstract

To provide a printed circuit board capable of improving a delamination that may be generated when building an electron component such as an IPD.SOLUTION: The present invention contains: a main body; a plurality of metal pads that is arranged so as to be separated each other onto the main body; an electron part that contains a passivation layer coating each of one parts of the plurality of metal pads; and an insulation layer that coats at least one part of the electron part. The passivation layer includes: a plurality of first openings that exposes different portions of each of the plurality of metal pads; and a plurality of second openings that penetrates at least one part of the passivation layer so as to be separated from the plurality of metal pads. The insulation layer fills at least one part of the plurality of first and second openings.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a printed circuit board.

Background Art

[0002] Recently, for improving electrical characteristics such as Power Integrity and for high integration, it has been required to incorporate, for example, IPD (Integrated Passive Device) inside a printed circuit board. However, when simply incorporating an IPD into a substrate, various delamination phenomena may occur.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One of several objects of the present invention is to provide a printed circuit board capable of improving delamination that may occur when incorporating electronic components such as IPDs.

Means for Solving the Problems

[0004] One of several solutions proposed through the present invention is to further form an opening capable of exposing the body of an electronic component in the passivation layer of the electronic component before and / or after incorporating an electronic component such as an IPD into an insulating layer such as ABF of the substrate.

[0005] For example, a printed circuit board according to an example includes a body, a plurality of metal pads arranged separately from each other on the body, and an electronic component including a passivation layer covering a part of each of the plurality of metal pads, and an insulating layer covering at least a part of the electronic component, wherein the passivation layer includes a plurality of first openings exposing the other parts of each of the plurality of metal pads, and a plurality of second openings penetrating at least a part of the passivation layer separately from the plurality of metal pads, and the insulating layer may fill at least a part of each of the plurality of first and second openings.

[0006] Another one of several solutions proposed through the present invention is to form roughness on the surfaces of a plurality of metal pads of an electronic component before and / or after incorporating the electronic component such as an IPD into an insulating layer such as ABF of a substrate.

[0007] For example, a printed circuit board according to an example includes a main body, a plurality of copper pads arranged separately from each other on the main body, and at least a part is respectively arranged between two adjacent metal pads among the plurality of copper pads on the main body, and an IPD (Integrated Passive Device) including a polyimide film covering at least a part of the upper surface and at least a part of the side surface of each of the plurality of copper pads, and an ABF (Ajinomoto Build-up Film) covering at least another part of the upper surface of each of the plurality of copper pads and at least a part of the polyimide film. At least another part of the upper surface of each of the plurality of copper pads covered with the ABF (Ajinomoto Build-up Film) may have a surface roughness greater than at least a part of the lower surface in contact with the main body of each of the plurality of metal pads.

Effect of the Invention

[0008] As one of various effects of the present invention, it is possible to provide a printed circuit board capable of improving delamination that may occur when incorporating an electronic component such as an IPD.

Brief Description of the Drawings

[0009]

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DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, the present invention will be described with reference to the accompanying drawings. The shapes and sizes of elements in the drawings can be exaggerated or reduced for clearer explanation.

[0011] Electronic device FIG. 1 is a block diagram schematically showing an example of an electronic device system.

[0012] Referring to the drawings, the electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also combined with other electronic components described later to form various signal lines 1090.

[0013] Examples of the chip-related components 1020 include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller; and logic chips such as an analog-to-digital converter and an ASIC (application-specific IC). However, the present invention is not limited thereto, and it goes without saying that other different forms of chip-related electronic components may be included. Also, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in a package form including the above-described chips and electronic components.

[0014] Examples of the network-related component 1030 include, but are not limited to, Wi-Fi (such as the IEEE 802.11 family), WiMAX (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and any other wireless and wired protocols designated for those and later generations. In addition to these, any of a number of other different wireless or wired standards and protocols may also be included. Needless to say, the network-related component 1030 may be combined with the chip-related component 1020 and used in combination with each other.

[0015] Examples of the other component 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filters, MLCC (Multi-Layer Ceramic Condensers), etc. However, it is not limited to these, and in addition to these, passive elements in the form of chip components used for various other different applications may also be included. Needless to say, the other component 1040 may be combined with the chip-related component 1020 and / or the network-related component 1030 and used in combination with each other.

[0016] Depending on the type of the electronic device 1000, the electronic device 1000 can include other electronic components that are physically and / or electrically connected or not connected to the main board 1010. Examples of other electronic components include a camera 1050, an antenna 1060, a display 1070, a battery 1080, etc. However, it is not limited thereto, and it may be an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a CD (compact disk), a DVD (digital versatile disk), etc. Needless to say, other electronic components used for various purposes according to the type of the electronic device 1000 may also be included.

[0017] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an Automotive, etc. However, it is not limited thereto, and needless to say, it may be any other electronic device that processes data other than these.

[0018] FIG. 2 is a perspective view schematically showing an example of an electronic device.

[0019] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. Inside the smartphone 1100, a motherboard 1110 is housed, and various components 1120 are physically and / or electrically connected to such a motherboard 1110. Also, other components that are or are not physically and / or electrically connected to the motherboard 1110, such as a camera module 1130 and / or a speaker 1140, are housed inside. Some of the components 1120 may be the chip-related components described above, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board with built-in active components and / or passive components. On the other hand, it goes without saying that the electronic device is not necessarily limited to the smartphone 1100 and may be other electronic devices as described above.

[0020] Printed circuit board FIG. 3 is a cross-sectional view schematically showing an example of a printed circuit board, and FIGS. 4A to 4C are enlarged cross-sectional views schematically showing various examples of the A region of the printed circuit board of FIG. 3.

[0021] Referring to the drawings, a printed circuit board 100A according to an example can include an insulating layer 110, a wiring layer 120 disposed on or within the insulating layer 110, a via layer 130 disposed within the insulating layer 110, and an electronic component 150 disposed within the insulating layer 110. For example, it can have a substrate structure with the electronic component 150 built therein. The electronic component 150 can include a main body 151, a plurality of metal pads 152 disposed spaced apart from each other on the main body 151, and a passivation layer 153 covering a part of each of the plurality of metal pads 152. The passivation layer 153 can have a plurality of first openings h1 exposing a part of each of the plurality of metal pads 152 from the passivation layer 153, and a plurality of second openings h2 spaced apart from the plurality of metal pads 152 and each penetrating at least a part of the passivation layer 153. Each of the plurality of second openings h2 can penetrate at least a part of the passivation layer 153 between two adjacent metal pads 152 among the plurality of metal pads 152. For example, each of the plurality of second openings h2 can penetrate the passivation layer 153 until a part of the main body 151 is exposed from the passivation layer 153. Each of the plurality of second openings h2 can have various forms such as trenches and holes on a plane. At least two of the plurality of second openings h2 may be connected to each other. The insulating layer 110 can fill at least a part of each of the plurality of first and second openings h1, h2.

[0022] On the one hand, recently, the market for package substrates for high-specification servers with large areas has been expanding. In relation to this, in order to manufacture a differentiated high-performance substrate with improved power integrity characteristics due to a decrease in impedance, it is possible to consider embedding IPD inside the substrate. However, generally, since the surface of the copper pads of IPD has no roughness, when performing a process using a liquid chemical in the substrate manufacturing process, a phenomenon may occur where the liquid penetrates through the vias formed on the IPD. In addition, there is a possibility that a crevice may be formed more severely at the bottom of the via. As a result, lifting may occur at the interface between the copper pad of the IPD and the insulating layer of the substrate, at the interface between the copper pad of the IPD and the polyimide film protecting it, at the interface in the edge region of the polyimide, etc. On the other hand, the printed circuit board 100A according to an example forms a plurality of second openings h2 in the passivation layer 153 disposed on the main body 151 of the electronic component 150, and the insulating layer 110 can also fill at least a part of each of the plurality of second openings h2. In this case, the adhesive force between the plurality of metal pads 152 and the insulating layer 110 and / or between the plurality of metal pads 152 and the passivation layer 153 can be improved by the insulating layer 110 filling the plurality of second openings h2. Therefore, even when embedding an IPD including, for example, a plurality of copper pads and a polyimide film protecting it in the electronic component 150, problems such as the above-described delamination can be improved. Thereby, the reliability of the printed circuit board 100A according to an example and a product including the same can be improved.

[0023] Further, the passivation layer 153 can cover at least a part of the upper surface and at least a part of the side surface of each of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 4a, the passivation layer 153 can cover the edge portion of the upper surface and the side surface of each of the metal pads 152 between two adjacent metal pads 152 among the plurality of metal pads 152. At this time, if necessary, roughness may be formed on the surface of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 4b, the surface roughness of a part of the upper surface of each of the plurality of metal pads 152 exposed from the passivation layer 153 may be greater than the lower surface in contact with the main body 151 of each of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 4c, at least a part of the upper surface and at least a part of the side surface covered by the passivation layer 153 of each of the plurality of metal pads 152 may also have a greater surface roughness than the lower surface in contact with the main body 151 of each of the plurality of metal pads 152. In this case, due to an increase in the surface area of the plurality of metal pads 152, the adhesion between the plurality of metal pads 152 and the insulating layer 110 and / or between the plurality of metal pads 152 and the passivation layer 153 can be further improved. Therefore, even when an IPD including, for example, a plurality of copper pads and a polyimide film for protecting the same is embedded in the electronic component 150, problems such as the above-described delamination can be more effectively improved. Thereby, the reliability of the printed circuit board 100A according to one example and a product including the same can be improved. Note that the surface roughness can be formed during the manufacture of the electronic component 150, for example, during the manufacture of a single IPD, but is not limited thereto. For example, the surface roughness exemplarily shown in FIG. 4b can also be formed during the embedding process as described later.

[0024] On the one hand, the printed circuit board 100A according to one example can be applied as at least a part of a multilayer circuit board. For example, it can be applied to the central part of the multilayer circuit board. In this case, a build-up process can be further performed on one or both sides of the printed circuit board 100A. Such a multilayer circuit board can be used as an FCB (Flip-Chip Board), BGA (Ball Grid Array), an interposer substrate, a package substrate, etc. However, it is not limited thereto, and it may be applied to other various forms of substrates as well.

[0025] Hereinafter, with reference to the drawings, the components of the printed circuit board 100A according to one example will be described in more detail.

[0026] The insulating layer 110 can include a first insulating layer 111 having a through-hole H in which at least a part of the electronic component 150 is disposed, and a second insulating layer 112 that covers at least a part of each of the first insulating layer 111 and the electronic component 150 and fills at least a part of the through-hole H. The first insulating layer 111 may be a core layer, and the second insulating layer 112 may be a build-up layer, but is not limited thereto. The first and second insulating layers 111 and 112 may each be composed of a plurality of insulating layers. The through-hole H can penetrate between the upper surface and the lower surface of the first insulating layer 111, but may penetrate only a part of the first insulating layer 111 from the upper surface as required. For example, the through-hole H may be a through-cavity or a blind cavity. An additional build-up insulating layer may be further disposed on the second insulating layer 112. The first and second insulating layers 111 and 112 can include an inorganic insulating material and / or an organic insulating material. As a non-limiting example, both the first and second insulating layers 111 and 112 can include an organic insulating material. Alternatively, the first insulating layer 111 can include an inorganic insulating material, and the second insulating layer 112 can include an organic insulating material. However, it is not limited thereto. The organic insulating material can include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or an inorganic filler, an organic filler, and / or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) together with the resin. For example, the organic insulating material may be a CCL (Copper Clad Laminate), a PPG (Prepreg), an ABF (Ajinomoto Build-up Film), a PID (Photo Imageable Dielectric), etc., but is not limited thereto. The inorganic insulating material can include a glass substrate, a silicon substrate, and / or a ceramic substrate. For example, the glass substrate can include glass, and the glass can include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc.However, without being limited thereto, alternative glass materials such as fluorine glass, phosphate glass, chalcogen glass, etc. can also be used as the material of the glass layer. Further, in order to form a glass having specific physical properties, other additives can also be further included. Such additives include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur and antimony, and carbonates and / or oxides of such elements and other elements. On the other hand, the glass can be distinguished from glass fibers (glass fiber, glass cloth, glass fabric) contained in organic insulators. Also, the silicon substrate can contain silicon (Si), and optionally can also contain an oxide layer formed on silicon (Si). Further, it may include a nitride layer formed on the oxide layer. On the other hand, the oxide layer can include a silicon oxide film, and the nitride layer can include a silicon nitride film, but is not limited thereto. Also, the ceramic substrate can contain ceramic, and the ceramic can include, for example, alumina (Al2O3), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride (Si3N4), etc., but is not limited thereto.

[0027] The wiring layer 120 can include a first wiring layer 121 disposed on the upper surface of the second insulating layer 112, a second wiring layer 122 disposed on the lower surface of the second insulating layer 112, a third wiring layer 123 disposed on the upper surface of the first insulating layer 111 and at least partially embedded in the second insulating layer 112, and a fourth wiring layer 124 disposed on the lower surface of the first insulating layer 111 and at least partially embedded in the second insulating layer 112. When the insulating layer 110 further includes a build-up insulating layer, the wiring layer 120 can also further include a build-up wiring layer. The first to fourth wiring layers 121, 122, 123, 124 can each include a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The first to fourth wiring layers 121, 122, 123, 124 can each perform various functions according to the design. For example, it can include a signal pattern, a power pattern, a ground pattern, etc. These patterns can each have various forms such as a line, a plane, a pad, etc. The first to fourth wiring layers 121, 122, 123, 124 can each include a seed layer and a plating layer formed on the seed layer. The seed layer may be an electroless plating layer (or electroless copper) and / or a sputtering layer, and the plating layer may be an electrolytic plating layer (or electroplated copper), but is not limited thereto.

[0028] The via layer 130 includes a first via layer 131 including a plurality of first connection vias 131a each penetrating through a part of the second insulating layer 112 to connect each of the plurality of metal pads 152 to at least a part of the first wiring layer 121, and a plurality of second connection vias 131b each penetrating through another part of the second insulating layer 112 to connect at least a part of each of the first and third wiring layers 121, 123; a second via layer 132 including a plurality of third connection vias 132a each penetrating through still another part of the second insulating layer 112 to connect at least a part of each of the second and fourth wiring layers 122, 124 to each other; and a third via layer 133 including a plurality of through vias 133a each penetrating through the first insulating layer 111 to connect at least a part of each of the third and fourth wiring layers 123, 124 to each other. When the insulating layer 110 further includes a build-up insulating layer, the via layer 130 can also further include a build-up via layer. The first to third via layers 131, 132, 133 can each include a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The first to third via layers 131, 132, 133 can each include a filled via filling a via hole or a through hole, or can also include a conformal via disposed along the wall surface of the via hole or the through hole. The first to third via layers 131, 132, 133 can perform various functions according to the design. For example, it can include a ground via, a power via, a signal via, etc. The first to third via layers 131, 132, 133 can each include an electroless plating layer (or electroless copper) and an electroplating layer (or electroplated copper). Instead of the electroless plating layer (or electroless copper), a sputtering layer can be included, or both can be included. The plurality of first and second connection vias 131a, 131b can each have a tapered shape in cross section where the width of the upper end portion is wider than the width of the lower end portion.Each of the plurality of third connection vias 132a can have a tapered shape in cross-section where the width of the lower end portion is wider than the width of the upper end portion. Each of the plurality of through vias 133a may have a substantially vertical side surface in cross-section, and may have a column shape such as a cylinder, an elliptical cylinder, or a square column, but is not limited thereto. A plugging material may be disposed inside each of the plurality of through vias 133a, and the plugging material may include an insulating material or a conductive material.

[0029] The electronic component 150 can include active components and / or passive components. The electronic component 150 may be a chip component, and for example, can include an integrated circuit (IC) in which hundreds to millions or more of elements are integrated in one chip. For example, the electronic component 150 may be formed based on an active wafer. In this case, as the base material forming the main body 151, silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc. can be used. Various circuits may be formed on the main body 151. A plurality of metal pads 152 can be formed on the main body 151, and each of the plurality of metal pads 152 can include a conductive material such as aluminum (Al) or copper (Cu). For example, each of the plurality of metal pads 152 can include a copper pad. A passivation layer 153 for protecting the plurality of metal pads 152 can be formed on the main body 151, and the passivation layer 153 can include an organic insulating film and / or an inorganic insulating film. For example, the passivation layer 153 can include a polyimide film. The passivation layer 153 can have a plurality of first openings h1 that expose each of the plurality of metal pads 152 and a plurality of second openings h2 that expose the main body 151 respectively. As an electronic component 150 in such a form, preferably, an IPD can be cited as an example, but it is not limited thereto.

[0030] Figs. 5a to 5g are process cross-sectional views schematically showing an example of the manufacture of the printed circuit board of Fig. 3.

[0031] Referring to FIG. 5a, the first insulating layer 111 can be prepared. The first insulating layer 111 may be a CCL, but is not limited thereto. Next, vias can be formed in the first insulating layer 111 by methods such as mechanical drilling, laser drilling, and chemical etching. Next, the third and fourth wiring layers 123, 124 and the third via layer 133 can be formed on the first insulating layer 111 by an electroplating process.

[0032] Referring to FIG. 5b, a through-hole H can be formed in the first insulating layer 111 by methods such as mechanical drilling, laser drilling, and chemical etching. Next, the tape 210 can be attached to the lower side of the first insulating layer 111. For example, the third wiring layer 123 can be adhered to the tape 210. The tape 210 can include an adhesive containing an epoxy resin, but is not limited thereto. Next, an electronic component 150, for example, an IPD, can be arranged in a face-down form in the through-hole H of the first insulating layer 111 using the tape 210. For example, a plurality of metal pads 152 can be adhered to the tape 210.

[0033] Referring to FIG. 5c, a second insulating layer 112-1 covering the first insulating layer 111 and the electronic component 150 can be formed. The second insulating layer 112-1 can be formed by laminating an insulating material such as ABF. The second insulating layer 112-1 can fill at least a part of the through-hole H. The second insulating layer 112-1 may be in a mid-cure state.

[0034] Referring to FIG. 5d, the tape 210 can be removed. The tape 210 can be removed by a physical method. If necessary, it can also be removed by a chemical method. When the tape 210 is removed, a plurality of metal pads 152 and a passivation layer 153 of the electronic component 150 can be exposed from the second insulating layer 112-1.

[0035] Referring to FIG. 5e, a plurality of second openings h2 can be formed in the exposed passivation layer 153 by methods such as laser drilling and chemical etching. If necessary, roughness can be formed on the surfaces of the exposed plurality of metal pads 152 through surface treatment. In this case, problems such as delamination as described above can be improved due to an increase in surface area.

[0036] Referring to FIG. 5f, a first insulating layer 111 and a second - 2 insulating layer 112 - 2 covering the electronic component 150 can be formed. The second - 2 insulating layer 112 - 2 can be formed by laminating an insulating material such as ABF in a direction opposite to that of the second - 1 insulating layer 112 - 1. The second - 2 insulating layer 112 - 2 can cover the exposed passivation layer 153 and the exposed plurality of metal pads 152. For example, the second - 2 insulating layer 112 - 2 can fill at least a part of each of the plurality of first and second openings h1, h2. After lamination, the second - 1 and second - 2 insulating layers 112 - 1, 112 - 2 can be in a cured state and may be integrated with each other such that the boundary becomes unclear. For example, the second insulating layer 112 can be formed.

[0037] Referring to FIG. 5g, via holes are processed in the second insulating layer 112 by methods such as mechanical drilling, laser drilling, and chemical etching, and a plating process is performed to form the first and second wiring layers 121, 122 and the first and second via layers 131, 132.

[0038] Through a series of processes, the printed circuit board 100A according to the above - mentioned example can be manufactured. Since other contents are substantially the same as those described in the printed circuit board 100A according to the above - mentioned example, repeated explanations are omitted.

[0039] FIG. 6 is a cross - sectional view schematically showing another example of a printed circuit board, and FIGS. 7a - 7c are enlarged cross - sectional views schematically showing various examples of region B of the printed circuit board in FIG. 6.

[0040] Referring to the drawings, in a printed circuit board 100B according to another example, among a plurality of metal pads 152 in the printed circuit board 100A according to the above-described example, each side surface of two adjacent metal pads 152 may have a recessed portion r recessed toward the inside of each metal pad 152. For example, among the plurality of metal pads 152, the separation distance between the recessed portions r of the two adjacent metal pads 152 may be even greater than the separation distance at the upper end and / or the lower end of each of the two metal pads 152. In this case, the adhesion between the plurality of metal pads 152 and the passivation layer 153 can be further improved by an anchor effect or the like. Therefore, even when an IPD including, for example, a plurality of copper pads and a polyimide film for protecting the same is embedded in the electronic component 150, the above-described delamination problem and the like can be more effectively improved. Thereby, the reliability of the printed circuit board 100B according to another example and the product including the same can be further improved. On the other hand, the recessed portion r can be formed during the manufacture of the electronic component 150, for example, during the manufacture of a single IPD.

[0041] On the other hand, also in the case of the printed circuit board 100B according to another example, the passivation layer 153 can cover at least a part of the upper surface and at least a part of the side surface of each of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 7a, the passivation layer 153 can cover the edge portion of the upper surface and the side surface of each of the plurality of metal pads 152 between two adjacent metal pads 152 among the plurality of metal pads 152. At this time, if necessary, roughness may be formed on the surfaces of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 7b, a part of the upper surface of each of the plurality of metal pads 152 exposed from the passivation layer 153 may have a larger surface roughness than the lower surface in contact with the main body 151 of each of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 7c, at least a part of the upper surface covered with the passivation layer 153 of each of the plurality of metal pads 152 and at least a part of the side surface including the recessed portion r may also have a larger surface roughness than the lower surface in contact with the main body 151 of each of the plurality of metal pads 152. In this case, due to an increase in the surface area of the plurality of metal pads 152 and the like, the adhesion between the plurality of metal pads 152 and the insulating layer 110 and / or between the plurality of metal pads 152 and the passivation layer 153 can be further improved. Therefore, even when an IPD including, for example, a plurality of copper pads and a polyimide film for protecting the same is embedded in the electronic component 150, problems such as the above-described delamination can be more effectively improved. Thereby, the reliability of the printed circuit board 100B according to another example and the product including the same can be further improved. On the other hand, the surface roughness can be formed during the manufacture of the electronic component 150, for example, during the manufacture of a single IPD, but is not limited thereto. For example, the surface roughness exemplarily shown in FIG. 7b can also be formed during the embedding process as described above.

[0042] Since the other contents are substantially the same as those described in the printed circuit board 100A according to the above-described example, redundant descriptions are omitted.

[0043] FIG. 8 is a cross-sectional view schematically showing still another example of a printed circuit board, and FIGS. 9a to 9c are enlarged cross-sectional views schematically showing various examples of the C region of the printed circuit board of FIG. 8.

[0044] Referring to the drawings, a printed circuit board 100C according to still another example can have protrusions p in which side surfaces of two adjacent metal pads 152 among the plurality of metal pads 152 protrude toward the passivation layer 153 in the printed circuit board 100A according to the above-described example. For example, the side surfaces of two adjacent metal pads 152 among the plurality of metal pads 152 may be such that the separation distance between the protrusions p of the two metal pads 152 is even smaller than the separation distance at the upper end and / or the lower end of each of the two metal pads 152. In this case, due to the anchor effect or the like, the adhesion between the plurality of metal pads 152 and the passivation layer 153 can be further improved. Therefore, even when an IPD including, for example, a plurality of copper pads and a polyimide film for protecting the same is embedded in the electronic component 150, problems such as the above-described delamination can be more effectively improved. Thereby, the reliability of the printed circuit board 100C according to still another example and a product including the same can be further improved. On the other hand, the protrusion p can be formed during the manufacture of the electronic component 150, for example, during the manufacture of a single IPD.

[0045] On the other hand, also in the case of the printed circuit board 100C according to still another example, the passivation layer 153 can cover at least a part of the upper surface and at least a part of the side surface of each of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 9a, the passivation layer 153 can cover the edge portion of the upper surface and the side surface of each of the plurality of metal pads 152 between two adjacent metal pads 152 among the plurality of metal pads 152. At this time, if necessary, roughness may be formed on the surfaces of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 9b, a part of the upper surface of each of the plurality of metal pads 152 exposed from the passivation layer 153 may have a larger surface roughness than the lower surface in contact with the main body 151 of each of the plurality of metal pads 152. For example, as exemplarily shown in FIG. 9c, at least a part of the upper surface covered with the passivation layer 153 of each of the plurality of metal pads 152 and at least a part of the side surface including the protrusion p may also each have a larger surface roughness than the lower surface in contact with the main body 151 of each of the plurality of metal pads 152. In this case, due to an increase in the surface area of the plurality of metal pads 152 and the like, the adhesion between the plurality of metal pads 152 and the insulating layer 110 and / or between the plurality of metal pads 152 and the passivation layer 153 can be further improved. Therefore, even when an IPD including, for example, a plurality of copper pads and a polyimide film for protecting the same is embedded in the electronic component 150, problems such as the above-described delamination can be more effectively improved. Thereby, the reliability of the printed circuit board 100C according to still another example and the product including the same can be further improved. On the other hand, the surface roughness can be formed during the manufacture of the electronic component 150, for example, during the manufacture of a single IPD, but is not limited thereto. For example, the surface roughness exemplarily shown in FIG. 9b can also be formed during the embedding process as described later.

[0046] Since the other contents are substantially the same as those described in the printed circuit board 100A according to the above-described example, redundant descriptions are omitted.

[0047] In the present invention, the expression "cover" can include not only the case of covering entirely but also the case of covering at least a part, and can include not only the case of directly covering but also the case of indirectly covering. Further, the expression "fill" can include not only the case of completely filling but also the case of filling at least a part, and can include the case of generally filling. For example, it can include the case where there are some voids or voids. Further, the expression "surround" can include not only the case of completely surrounding but also the case of surrounding a part and the case of generally surrounding. Note that the expression "adjacent" means the case of being arranged adjacent to substantially the same layer, and is not limited to the case of being in contact with each other. Further, "exposing" can include not only the case of completely exposing but also the case of exposing a part, and "exposure" can mean being exposed from other configurations embedding the said configuration. For example, on the exposed configuration, in addition to other configurations, still another configuration can be additionally arranged, and in this case, the meaning of "exposure" can be the same.

[0048] In the present invention, it can be judged including substantially process errors, position deviations, errors at the time of measurement, etc. generated in the manufacturing process. For example, "substantially coplanar" can include not only the case of existing exactly on the same plane but also the case of existing on substantially the same plane.

[0049] In the present invention, the meaning in the cross-section can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed in a side view. Further, the meaning on the plane can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed in a top view or a bottom view.

[0050] In the present invention, terms such as "lower side", "lower part", and "lower surface" are used, for the sake of convenience, to mean the downward direction with reference to the cross-section of the drawing, and terms such as "upper side", "upper part", and "upper surface" are used to mean the opposite direction. However, this is only for the convenience of explanation and defines the direction, and it goes without saying that the scope of rights in the claims is not particularly limited by the description of such a direction, and the concept of up / down can be changed at any time.

[0051] In the present invention, the term "connected" includes not only being directly connected but also being indirectly connected via an adhesive layer or the like. Further, the term "electrically connected" includes both the case of being physically connected and the case of not being connected. Furthermore, expressions such as "first" and "second" are used to distinguish one component from another component, and do not limit the order and / or importance of the said component. In some cases, within the scope not departing from the scope of rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0052] In the present invention, the term "penetrate" includes not only the case of completely penetrating between the upper surface and the lower surface of the object with reference to the thickness direction or the stacking direction, but also the case of penetrating from the upper surface or the lower surface in the form of a recess or a blind hole partially.

[0053] In the present invention, "thickness", "width", "length", "depth", "line width", "interval", "pitch", "separation distance", "surface roughness", etc. can be measured by a scanning microscope, an optical microscope, etc. with reference to the cross-section obtained by polishing or cutting a printed circuit board. The cut cross-section can be a vertical cross-section or a horizontal cross-section, and each numerical value can be measured with reference to the required cut cross-section. For example, the width of the upper end and / or the lower end of a via can be measured on the cross-section cut along the central axis of the via. At this time, when the numerical value is not constant, the numerical value can be determined by the average value of the values measured at any five points.

[0054] The expression "an example" used in the present invention does not mean the same embodiments as each other, but is provided to emphasize and explain each different unique feature. However, the examples presented above do not exclude being combined with the features of other examples. For example, even if a matter described in a specific example is not described in another example, in another example, as long as there is no description contrary to or conflicting with that matter, it can be understood as a description related to the other example.

[0055] The terms used in the present invention are merely used to explain an example and are not intended to limit the present invention. At this time, the singular expression includes the plural expression unless the context clearly indicates a different meaning.

Explanation of Reference Numerals

[0056] 1000: Electronic device 1010: Main board 1020: Chip-related components 1030: Network-related components 1040: Other components 1050: Camera 1060: Antenna 1070: Display 1080: Battery 1090: Signal line 1100: Smartphone 1110: Motherboard 1120: Components 1121: Component package 1130: Camera module 1140: Speaker 100A, 100B, 100C: Printed circuit board 110: Insulating layer 111, 112, 112-1, 112-2: Insulating layer 120: Wiring layer 121, 122, 123, 124: Wiring layer 130: Via layer 131, 132, 133: Via layer 131a, 131b, 132a: Connection via 133a: Through-hole via 150: Electronic component 151: Body 152: Metal pad 153: Passivation layer H: Through-hole part h1, h2: Opening r: Recessed part p: Protruding part 210: Tape

Claims

1. an electronic component including a body, a plurality of metal pads spaced apart from one another on the body, and a passivation layer covering a portion of each of the plurality of metal pads; an insulating layer covering at least a portion of the electronic component; the passivation layer has a plurality of first openings exposing other portions of the plurality of metal pads, and a plurality of second openings spaced apart from the plurality of metal pads and penetrating at least a portion of the passivation layer, The insulating layer fills at least a portion of each of the first and second plurality of openings.

2. The printed circuit board of claim 1 , wherein each of the second openings penetrates at least a portion of the passivation layer between two adjacent ones of the plurality of metal pads.

3. The printed circuit board of claim 2 , wherein each of the plurality of second openings exposes a portion of the body.

4. The printed circuit board of claim 1 , wherein the passivation layer covers a portion of a top surface and at least a portion of a side surface of each of the plurality of metal pads.

5. The printed circuit board according to claim 4 , wherein the upper surface of each of the plurality of metal pads, which is exposed from the passivation layer, has a surface roughness greater than that of the lower surface in contact with the body.

6. The printed circuit board according to claim 5 , wherein a portion of the upper surface and at least a portion of the side surface of each of the plurality of metal pads that are covered with the passivation layer have a surface roughness greater than that of a lower surface that is in contact with the body.

7. 5. The printed circuit board according to claim 4, wherein each of the side surfaces of two adjacent metal pads among the plurality of metal pads has a recess portion recessed toward an inner side of each of the metal pads.

8. 8. The printed circuit board of claim 7, wherein the side surfaces of two adjacent metal pads among the plurality of metal pads are spaced apart by a greater distance between the recesses of the metal pads than between the upper ends of the metal pads and between the lower ends of the metal pads.

9. The printed circuit board according to claim 4 , wherein each side of two adjacent metal pads among the plurality of metal pads has a protrusion protruding toward the passivation layer.

10. 10. The printed circuit board of claim 9, wherein the distance between the sides of two adjacent metal pads between the protruding portions of the metal pads is smaller than the distance between the upper ends of the metal pads and the distance between the lower ends of the metal pads.

11. A wiring layer disposed on or within the insulating layer; a via layer disposed within the insulating layer; 2. The printed circuit board of claim 1, wherein the via layer includes a plurality of first connection vias that each penetrate at least a portion of the insulating layer over the plurality of first openings and connect each of the plurality of metal pads to at least a portion of the wiring layer.

12. the insulating layer includes a first insulating layer having a through portion in which at least a portion of the electronic component is disposed, and a second insulating layer covering at least a portion of the first insulating layer and the electronic component and filling at least a portion of the through portion; the wiring layer includes a first wiring layer disposed on the upper surface of the second insulating layer, a second wiring layer disposed on the lower surface of the second insulating layer, a third wiring layer disposed on the upper surface of the first insulating layer and at least a portion of which is embedded in the second insulating layer, and a fourth wiring layer disposed on the lower surface of the first insulating layer and at least a portion of which is embedded in the second insulating layer; 12. The printed circuit board of claim 11, wherein the via layer includes a first via layer including a plurality of first connection vias each penetrating a portion of the second insulating layer to connect each of the plurality of metal pads to at least a portion of the first wiring layer, and a plurality of second connection vias each penetrating another portion of the second insulating layer to connect at least a portion of each of the first and third wiring layers to each other, a second via layer including a plurality of third connection vias each penetrating yet another portion of the second insulating layer to connect at least a portion of each of the second and fourth wiring layers to each other, and a third via layer including a plurality of through vias each penetrating the first insulating layer to connect at least a portion of each of the third and fourth wiring layers to each other.

13. The electronic component includes an IPD (Integrated Passive Device), each of the plurality of metal pads includes copper (Cu); The printed circuit board of claim 1 , wherein the passivation layer comprises polyimide (PI).

14. an integrated passive device (IPD) including a body, a plurality of copper pads spaced apart from one another on the body, and a polyimide film at least a portion of which is disposed between two adjacent metal pads among the plurality of copper pads on the body and covers at least a portion of an upper surface and at least a portion of a side surface of each of the plurality of copper pads; an Ajinomoto Build-up Film (ABF) covering at least a portion of the other top surface of each of the copper pads and at least a portion of the polyimide film; At least another portion of the upper surface of each of the plurality of copper pads covered with the ABF (Ajinomoto Build-up Film) has a surface roughness greater than that of at least a portion of the lower surface of each of the plurality of metal pads that is in contact with the body.

15. 15. The printed circuit board of claim 14, wherein at least a portion of the upper surface and at least a portion of the side surface of each of the plurality of copper pads covered with the polyimide film have a surface roughness greater than that of at least a portion of the lower surface of each of the plurality of metal pads that contacts the body.

16. 15. The printed circuit board according to claim 14, wherein at least a portion of the side surface of each of the plurality of copper pads covered with the polyimide film has a recess portion recessed toward the inside of each of the plurality of metal pads or a protrusion protruding toward the polyimide film.

Images