Lead frame and semiconductor device

Abstract

To provide a lead frame having a structure in which, when a semiconductor chip is mounted and filled with resin, unfilled resin is unlikely to be formed between the lead frame and a semiconductor chip.SOLUTION: A lead frame includes a plurality of terminal portions including a first terminal portion, and the first terminal portion has, on the upper surface, a mounting area defined in which a semiconductor chip is mounted, a plurality of bonding areas which are bonded one-to-one to electrodes of the semiconductor chip, and a recess provided between adjacent bonding areas, which opens on the upper surface side and reaches at least one side surface.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a lead frame and a semiconductor device.

Background Art

[0002] A semiconductor device in which a semiconductor chip is flip-chip mounted on a lead frame and sealed with a resin part is known (see, for example, Patent Document 1). In the manufacturing process of such a semiconductor device, after flip-chip mounting a semiconductor chip on a lead frame, resin is poured between the lead frame and the semiconductor chip using a mold, and then the resin is cured to form a resin part that seals the semiconductor chip.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the semiconductor device as described above, when the distance between the lead frame and the semiconductor chip becomes narrow, the fluidity of the resin deteriorates, so there is a risk of unfilled resin between the lead frame and the semiconductor chip.

[0005] The present invention has been made in view of the above points, and an object thereof is to provide a lead frame having a structure in which unfilled resin is less likely to occur between the lead frame and the semiconductor chip when mounting the semiconductor chip and filling the resin.

Means for Solving the Problems

[0006] This lead frame includes a plurality of terminal portions including a first terminal portion. The first terminal portion is defined in a mounting region on the upper surface where a semiconductor chip is mounted, and includes a plurality of bonding regions that are bonded one-to-one with the electrodes of the semiconductor chip, and a recess that is provided between the adjacent bonding regions, opens to the side of the upper surface, and reaches at least one side surface.

Advantages of the Invention

[0007] According to the disclosed technology, when mounting a semiconductor chip and filling it with resin, it is possible to provide a lead frame having a structure in which resin unfilling is less likely to occur between the semiconductor chip and the resin.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

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Mode for Carrying Out the Invention

[0009] Hereinafter, modes for carrying out the invention will be described with reference to the drawings. In each drawing, the same reference numerals are given to the same constituent parts, and redundant descriptions may be omitted.

[0010] 〈First Embodiment〉 [Semiconductor Device] FIG. 1 is a view exemplifying a semiconductor device according to the first embodiment, FIG. 1(a) is a plan view, and FIG. 1(b) is a cross-sectional view taken along line A-A of FIG. 1(a). FIG. 2 is a view exemplifying a lead frame according to the first embodiment, FIG. 2(a) is a plan view, and FIG. 2(b) is a cross-sectional view taken along line B-B of FIG. 2(a).

[0011] Referring to FIGS. 1 and 2, the semiconductor device 1 includes a lead frame 10, a semiconductor chip 20, and a resin portion 40. The semiconductor device 1 is a QFN (Quad Flat Non-leaded package) type semiconductor device in which the semiconductor chip 20 is flip-chip mounted on the lead frame 10 and sealed with the resin portion 40.

[0012] In the present embodiment, for the sake of convenience, the semiconductor chip 20 side of the semiconductor device 1 is defined as the upper side or one side, and the lead frame 10 side is defined as the lower side or the other side. Also, the surface on the semiconductor chip 20 side of each part is defined as one surface or the upper surface, and the surface on the lead frame 10 side is defined as the other surface or the lower surface. However, the semiconductor device 1 can be used in an upside-down state or arranged at an arbitrary angle. Also, the plan view means viewing the object from the normal direction of one surface of the lead frame 10, and the planar shape means the shape of the object viewed from the normal direction of one surface of the lead frame 10.

[0013] The lead frame 10 includes a plurality of terminal portions including a first terminal portion. The thickness of the lead frame 10 can be, for example, about 100 to 200 μm. As the material of the lead frame 10, for example, copper (Cu), copper alloy, 42 alloy (alloy of Fe and Ni), etc. can be used.

[0014] In the example of FIG. 2, the lead frame 10 includes a first terminal portion 11, a second terminal portion 12, a third terminal portion 13, a fourth terminal portion 14, and a fifth terminal portion 15. The first terminal portion 11 to the fifth terminal portion 15 are arranged apart from each other and are electrically independent of each other. Note that which terminal portion is referred to as the first terminal portion can be arbitrarily determined. Also, the number of the plurality of terminal portions can be arbitrarily determined.

[0015] The first terminal portion 11 has a plurality of bonding regions 11x defined in a mounting region 20r where the semiconductor chip 20 is mounted on the upper surface 11a and bonded one-to-one with the electrodes 22 of the semiconductor chip 20. Note that the mounting region 20r is a region that overlaps the semiconductor chip 20 in a plan view on the upper surface of each terminal portion including the upper surface 11a of the first terminal portion 11.

[0016] The first terminal portion 11 is provided between adjacent bonding regions 11x and has a recess 11y that opens to the side of the upper surface 11a. The recess 11y has a bottom and does not open to the side of the lower surface 11b. The depth of the recess 11y can be, for example, about half of the thickness of the region where the recess 11y of the first terminal portion 11 is not formed. Note that the connection portion between the bottom surface and the side surface of the recess 11y may have corners or may have a round shape. For example, the recess 11y may be U-shaped in a cross-sectional view.

[0017] The first terminal portion 11 has a recess 11y that reaches at least one side surface 11c. In the example of FIG. 2, all five recesses 11y reach the side surface 11c of the first terminal portion 11. However, it is sufficient that at least one recess 11y reaches the side surface 11c of the first terminal portion 11. With such a structure, as will be described later, in the manufacturing process of the semiconductor device 1, when the semiconductor chip 20 is mounted and the resin that becomes the resin portion 40 is filled, it is possible to less likely cause unfilling of the resin between the lead frame 10 and the semiconductor chip 20.

[0018] The first terminal portion 11 preferably has a recess 11y that reaches one side surface 11c and another side surface 11d that faces the one side surface 11c. In the example of FIG. 2, all five recesses 11y reach the side surface 11d that faces the side surface 11c of the first terminal portion 11. However, it is sufficient that at least one recess 11y reaches the side surface 11d of the first terminal portion 11. With such a structure, it is possible to further less likely cause unfilling of the resin between the lead frame 10 and the semiconductor chip 20.

[0019] In the example of FIG. 2, the plurality of bonding regions 11x are arranged in a 7-row and 4-column matrix in a plan view. Here, the X direction is the row direction and the Y direction is the column direction, but the definitions of the row direction and the column direction may be the opposite. The first terminal portion 11 preferably has a recess 11y disposed between one adjacent column. With such a structure, it is possible to less likely cause unfilling of the resin between the lead frame 10 and the semiconductor chip 20.

[0020] In the example of FIG. 2, the first terminal portion 11 has recesses 11y disposed between all adjacent columns. Such a structure can further reduce the occurrence of unfilled resin between the lead frame 10 and the semiconductor chip 20. The first terminal portion 11 may have one recess 11y each on the outside of the columns located at both ends in the row direction (X direction).

[0021] The second terminal portion 12 has, on the upper surface 12a, a plurality of bonding regions 12x defined in a mounting region 20r where the semiconductor chip 20 is mounted and bonded one-to-one with the electrodes 22 of the semiconductor chip 20.

[0022] The second terminal portion 12 has recesses 12y provided between adjacent bonding regions 12x and opening to the side of the upper surface 12a. The recesses 12y are bottomed and do not open to the side of the lower surface 12b. The depth of the recesses 12y can be, for example, about half of the thickness of the region where the recesses 12y of the second terminal portion 12 are not formed. Note that the connection portion between the bottom surface and the side surface of the recess 12y may have corners or may be round. For example, the recess 12y may be U-shaped in cross section.

[0023] The second terminal portion 12 has recesses 12y reaching at least one side surface 12c. In the example of FIG. 2, all three recesses 12y reach the side surface 12c of the second terminal portion 12. However, it is sufficient that at least one recess 12y reaches the side surface 12c of the second terminal portion 12. Such a structure can reduce the occurrence of unfilled resin between the lead frame 10 and the semiconductor chip 20.

[0024] The second terminal portion 12 preferably has recesses 12y reaching one side surface 12c and the other side surface 12d facing the one side surface 12c. In the example of FIG. 2, all three recesses 12y reach the side surface 12d facing the side surface 12c of the second terminal portion 12. However, it is sufficient that at least one recess 12y reaches the side surface 12d of the second terminal portion 12. Such a structure can further reduce the occurrence of unfilled resin between the lead frame 10 and the semiconductor chip 20.

[0025] In the example of FIG. 2, the plurality of bonding regions 12x are arranged in a matrix of one row and three columns in a plan view. The second terminal portion 12 preferably has a recess 12y disposed between one adjacent column. Such a structure can make it difficult for the resin to be unfilled between the lead frame 10 and the semiconductor chip 20.

[0026] In the example of FIG. 2, the second terminal portion 12 has recesses 12y disposed between all adjacent columns. Such a structure can further make it difficult for the resin to be unfilled between the lead frame 10 and the semiconductor chip 20. The second terminal portion 12 may have one recess 12y further outside the column located at the +X side end.

[0027] The third terminal portion 13, the fourth terminal portion 14, and the fifth terminal portion 15 each have a plurality of bonding regions defined in a mounting region 20r where the semiconductor chip 20 is mounted on their respective upper surfaces and are joined to the electrodes 22 of the semiconductor chip 20 one-to-one. Since the third terminal portion 13, the fourth terminal portion 14, and the fifth terminal portion 15 have the same structure as the second terminal portion 12, the description thereof is omitted.

[0028] As shown in FIG. 1, the semiconductor chip 20 is flip-chip mounted in a face-down state in the mounting region 20r of the lead frame 10. The semiconductor chip 20 has a chip body 21 and a plurality of electrodes 22. The chip body 21 is, for example, a semiconductor integrated circuit or the like formed on a thinned semiconductor substrate made of silicon or the like. Electrodes 22 electrically connected to the semiconductor integrated circuit are formed on the semiconductor substrate. The electrodes 22 are, for example, copper pillars. The height of the electrodes 22 is, for example, about 10 to 20 μm.

[0029] The lower surface of each electrode 22 is joined to the joining region 11x of the first terminal portion 11, the joining region 12x of the second terminal portion 12, and the joining regions of each of the third terminal portion 13 to the fifth terminal portion 15 via a joining material 30. The joining material 30 is, for example, solder. As the material of the solder, for example, an alloy containing Pb, an alloy of Sn and Cu, an alloy of Sn and Ag, an alloy of Sn, Ag, and Cu, etc. can be used.

[0030] The resin portion 40 seals the lead frame 10 and the semiconductor chip 20. The resin portion 40 is filled in the region where the upper surfaces of the first terminal portion 11 to the fifth terminal portion 15 face the lower surface of the semiconductor chip 20 and inside all the recesses including the recesses 11y and 12y. The lower surfaces of the first terminal portion 11 to the fifth terminal portion 15 are exposed from the resin portion 40. The lower surfaces of the first terminal portion 11 to the fifth terminal portion 15 can be flush with, for example, the lower surface of the resin portion 40. A part of the side surfaces of the first terminal portion 11 to the fifth terminal portion 15 is exposed from the resin portion 40. The lower surfaces and / or the side surfaces exposed from the resin portion 40 of the first terminal portion 11 to the fifth terminal portion 15 can be used as, for example, external connection terminals. As the resin portion 40, for example, a so-called mold resin in which a filler is contained in an epoxy resin can be used. Note that the resin portion 40 may be formed so as to expose a part or all of the upper surface of the chip body 21 of the semiconductor chip 20.

[0031] [Method for manufacturing a semiconductor device] Figs. 3 to 7 are diagrams illustrating the manufacturing process of the semiconductor device according to the first embodiment.

[0032] First, in the process shown in FIG. 3, a metal plate 100 is prepared. The material and thickness of the metal plate 100 are the same as those of the lead frame 10. For example, in the metal plate 100, three regions 1001, 1002, and 1003 are defined in a plan view, and a plurality of regions R that will become the lead frame 10 when separated are arranged vertically and horizontally in each of the regions 1001, 1002, and 1003. Each region R includes a plurality of terminal portions including a first terminal portion. Each terminal portion is, for example, independent of each other. The number of arranged regions R in the regions 1001, 1002, and 1003 can be arbitrarily determined. Note that the dashed line indicating the partition of the region R is the position to be cut when separating. From FIG. 4 onwards, only the region R and its vicinity will be illustrated and described.

[0033] FIG. 4 is a diagram illustrating one region R and its vicinity, FIG. 4(a) is a plan view, and FIG. 4(b) is a cross-sectional view taken along the line C-C of FIG. 4(a). In the process shown in FIG. 4, each region R is patterned by performing pressing on the metal plate 100. Alternatively, each region R may be patterned by etching the metal plate 100. After patterning, the first terminal portion 11 to the fifth terminal portion 15 are arranged in each region R. The first terminal portion 11 to the fifth terminal portion 15 are connected and supported by a frame portion 18 surrounding the first terminal portion 11 to the fifth terminal portion 15. A bonding region 11x is defined in the first terminal portion 11, and a bonding region 12x is defined in the second terminal portion 12. Also, bonding regions are defined in the third terminal portion 13 to the fifth terminal portion 15.

[0034] FIG. 5 is a diagram illustrating one region R and its vicinity. FIG. 5(a) is a plan view, and FIG. 5(b) is a cross-sectional view taken along line D-D of FIG. 5(a). In the process shown in FIG. 5, in each region R of the metal plate 100, a photosensitive resist 300 is formed on the entire upper surfaces of the first terminal portion 11 to the fifth terminal portion 15 and the frame portion 18. As the resist 300, for example, a dry film resist, an electrodeposition resist, or the like can be used. Then, the resist 300 is exposed and developed to provide an opening 300x in a portion where each recess including the recess 11y and the recess 12y is formed. At this time, in each region R of the metal plate 100, a photosensitive resist 300 that covers the entire lower surfaces of the first terminal portion 11 to the fifth terminal portion 15 and the frame portion 18 may be formed.

[0035] FIG. 6 is a diagram illustrating one region R and its vicinity. FIG. 6(a) is a plan view, and FIG. 6(b) is a cross-sectional view taken along line E-E of FIG. 6(a). In the process shown in FIG. 6, each region R of the metal plate 100 is half-etched using the resist 300 as an etching mask. The region not covered by the resist 300 is half-etched from the upper surface side to the lower surface side of the metal plate 100. As a result, a plurality of recesses 11y that open on the upper surface 11a side and do not reach the lower surface 11b are formed in the first terminal portion 11. Also, a plurality of recesses 12y that open on the upper surface 12a side and do not reach the lower surface 12b are formed in the second terminal portion 12. Also, a plurality of recesses that open on the upper surface side and do not reach the lower surface are formed in the third terminal portion 13 to the fifth terminal portion 15. When the metal plate 100 is copper, for example, each recess can be formed by wet etching using a cupric chloride aqueous solution.

[0036] FIG. 7 is a cross-sectional view illustrating one region R and its vicinity, showing a cross-section corresponding to FIG. 6(b). In the process shown in FIG. 7(a), after removing the resist 300 shown in FIG. 6, a semiconductor chip 20 is mounted in a face-down state in each region R of the metal plate 100. Specifically, the electrode 22 of the semiconductor chip 20 is joined to each joining region of the first terminal portion 11 to the fifth terminal portion 15 via a joining material 30 made of solder or the like.

[0037] Next, in the process shown in FIG. 7(b), a resin portion 40 for encapsulating the semiconductor chip 20 is formed in each region R of the metal plate 100. As the resin portion 40, for example, a so-called mold resin in which a filler is contained in an epoxy resin can be used. The resin portion 40 can be formed, for example, by a transfer molding method, a compression molding method, or the like. For example, the resin portion 40 is formed in each of the regions 1001, 1002, and 1003 shown in FIG. 3. The encapsulation of each of the regions 1001, 1002, and 1003 can be performed simultaneously using a mold.

[0038] Next, in the process shown in FIG. 7(c), the structure shown in FIG. 7(b) is cut at the position of the broken line that partitions the region R and fragmented. The cutting can be performed, for example, by a slicer or the like. Thereby, a plurality of semiconductor devices 1 are completed.

[0039] FIG. 8 is a diagram showing the flow of the resin when forming the resin portion in the process shown in FIG. 7(b). In FIG. 8, a plurality of arrows I indicate the injection direction of the resin that becomes the resin portion 40 in the mold, and a plurality of arrows O indicate the air vent direction. That is, the resin flows from the direction of the arrow I to the direction of the arrow O, and is filled between each terminal portion including the first terminal portion 11 and the semiconductor chip 20 in each region R of the metal plate 100.

[0040] By the way, the gap between the upper surface 11a of the first terminal portion 11 and the lower surface of the semiconductor chip 20 is approximately determined by the height of the electrode 22, and is, for example, about 10 to 20 μm. The same applies to the gap between the other terminal portions and the lower surface of the semiconductor chip 20. Since the gap is narrow, if recesses are not provided in each terminal portion, the risk of unfilled resin increases. In particular, in a region where the bonding regions 11x are dense, such as the first terminal portion 11, the risk of unfilled resin is even higher.

[0041] Therefore, in the semiconductor device 1, in the first terminal portion 11, one or more recesses 11y are provided between adjacent bonding regions 11x, and the recesses 11y are arranged so as to reach a pair of opposing side surfaces 11c and 11d of the first terminal portion 11 in plan view. As a result, in the portion of the recess 11y, the distance between the bottom surface of the recess 11y and the lower surface of the semiconductor chip 20 becomes wider. For example, if the thickness of the first terminal portion 11 is 200 μm, the height of the electrode 22 is 20 μm, and the depth of the recess 11y is 100 μm, the distance between the bottom surface of the recess 11y and the lower surface of the semiconductor chip 20 is 120 μm, which is about six times the distance of 20 μm when there is no recess. Therefore, the fluidity of the resin in the direction of the arrow F is increased, and the risk of unfilling can be reduced.

[0042] Note that the recess 11y may be provided so as to reach only the side surface 11c of the first terminal portion 11. Also in this case, by setting the side reaching the side surface 11c of the recess 11y as the resin injection direction, the fluidity of the resin can be improved, and the risk of unfilling can be reduced. Since air can escape even through a small gap on the air vent side, the fluidity of the resin can be improved even if the recess 11y does not reach the side surface 11d. However, if the recess 11y is arranged so as to reach the side surfaces 11c and 11d, the air escape on the air vent side becomes better, so the fluidity of the resin can be further improved.

[0043] Also, as in the example of FIG. 8, it is preferable that the recesses 11y are arranged between all adjacent columns of the bonding regions 11x. Thereby, the fluidity of the resin becomes even higher, and the risk of unfilling can be further reduced.

[0044] Since the bonding regions of the second terminal portion 12 to the fifth terminal portion 15 are not as dense as those of the first terminal portion 11, recesses do not have to be provided, but by providing recesses, the fluidity of the resin can be improved.

[0045] <Modification Example of the First Embodiment> In a modification of the first embodiment, an example of a lead frame with a different formation position of the recess is shown. In the modification of the first embodiment, the description of the same components as those in the already described embodiment may be omitted.

[0046] FIG. 9 is a diagram showing another example of the resin flow when forming the resin portion. The resin injection direction I and the air vent direction O vary depending on the mold. Therefore, it is preferable to arrange the recess according to the specifications of the mold.

[0047] In the example of FIG. 9, there are a region where the resin flows obliquely with respect to the column direction (Y direction) and a region where the resin flows substantially parallel to the column direction as the resin flows from the injection direction I toward the air vent direction O. In such a case, it is preferable that the first terminal portions 11 in one region R and the first terminal portions 11 in the other region R have recesses 11y extending in different directions from each other.

[0048] For example, in the region R1 shown in FIG. 9, the resin flows obliquely with respect to the column direction. On the other hand, in the region R2, the resin initially flows obliquely with respect to the column direction but then flows substantially parallel to the column direction midway. In such a case, it is preferable to change the direction of the recess 11y provided in the first terminal portion 11 between the region R1 and the region R2.

[0049] FIG. 10 is a partial plan view illustrating a lead frame according to Modification 1 of the first embodiment. In the region R1 shown in FIG. 9, as shown in FIG. 10, it is preferable that the first terminal portion 11 has a recess 11y extending in an oblique direction with respect to the column direction (Y direction). The recess 11y may be arranged so as to reach the side surfaces 11c and 11f of the first terminal portion 11 in plan view, or may be arranged so as to reach a pair of opposing side surfaces 11e and 11f of the first terminal portion 11, or may be arranged so as to reach the side surfaces 11e and 11d of the first terminal portion 11. The resin flow is improved by providing even one such recess 11y, but the resin flow is further improved by providing a large number of recesses 11y as shown in FIG. 10. Depending on the resin flow from the injection direction I toward the air vent direction O, all the regions R may have the structure shown in FIG. 10.

[0050] FIG. 11 is a partial plan view illustrating a lead frame according to Modification Example 2 of the first embodiment. In region R2 shown in FIG. 9, as shown in FIG. 11, it is preferable that the first terminal portion 11 has a recess 11y including a portion extending in an oblique direction with respect to the column direction (Y direction) and a portion extending in a direction substantially parallel to the column direction. Providing even one such recess 11y improves the flow of the resin, but providing a large number of recesses 11y as shown in FIG. 11 further improves the flow of the resin. Depending on the flow of the resin from the injection direction I toward the air vent direction O, all regions R may have the structure shown in FIG. 11.

[0051] In the examples of FIGS. 10 and 11, the second terminal portion 12 to the fifth terminal portion 15 are provided with recesses substantially parallel to the column direction, but it is also preferable that the direction of the recesses provided in the second terminal portion 12 to the fifth terminal portion 15 is matched with the direction of the recess 11y.

[0052] FIG. 12 is a plan view illustrating a lead frame according to Modification Example 3 of the first embodiment. In the lead frame 10A shown in FIG. 12, the first terminal portion 11 has one recess 11y arranged in a lattice pattern between all adjacent rows and between all adjacent columns. Thereby, when mounting the semiconductor chip 20 on the lead frame 10A and forming the resin portion 40, the fluidity of the resin is significantly increased, and the risk of non-filling can be significantly reduced.

[0053] Note that, as in the example shown in FIG. 12, when forming recesses by performing half-etching over a wide range of the lead frame, the balance of the internal stress of the material constituting the lead frame may be disrupted, and the lead frame may be warped. When the warpage becomes large, a gap is generated between the electrode of the semiconductor chip and the bonding region of the lead frame when mounting the semiconductor chip, making the mounting difficult. Therefore, when warpage becomes a problem, it is preferable to limit the range in which the recesses are formed, as in the example of FIG. 2.

[0054] FIG. 13 is a diagram illustrating a lead frame according to Modification Example 4 of the first embodiment. FIG. 13(a) is a plan view, and FIG. 13(b) is a cross-sectional view taken along line G-G of FIG. 13(a). In the lead frame 10B shown in FIG. 13, the first terminal portion 11 has a recess 11z that opens to the side of the lower surface 11b at a position that does not overlap with the recess 11y in a plan view. Specifically, one recess 11z extending in the Y direction is provided on each side of the first terminal portion 11 in the X direction. Further, the second terminal portion 12 has a recess 12z that opens to the side of the lower surface 12b at a position that does not overlap with the recess 12y in a plan view. Specifically, one recess 12z extending in the Y direction is provided on each side of the second terminal portion 12 in the X direction. The third terminal portion 13 to the fifth terminal portion 15 are also provided with recesses at the same positions as the second terminal portion 12.

[0055] FIG. 14 is a cross-sectional view illustrating a semiconductor device according to Modification Example 4 of the first embodiment. As shown in FIG. 14, in the semiconductor device 1B, since the resin portion 40 enters the recesses 11z, 12z, etc. provided in the first terminal portion 11 to the fifth terminal portion 15, an anchor effect is generated, and the resin portion 40 can be prevented from coming off the lead frame 10.

[0056] Further, in the first terminal portion 11 to the fifth terminal portion 15 shown in FIG. 13, the recesses disposed outside the mounting region 20r serve as cutting positions when the semiconductor device including the lead frame is separated into individual pieces. In this way, at the cutting position when separating into individual pieces, by providing recesses that open to the lower surface side in each terminal portion and thinning each terminal portion, the number of cutting portions of the metal plate, which is harder than the resin portion, is reduced, so that cutting becomes easier. Further, by reducing the number of cutting portions of the metal plate, burrs generated at the cutting portions can be reduced. Further, by reducing the number of cutting portions of the metal plate, the life of the blade of the dicing saw used for cutting can be extended.

[0057] Although the preferred embodiments etc. have been described in detail above, the present invention is not limited to the above-described embodiments etc., and various modifications and substitutions can be made to the above-described embodiments etc. without departing from the scope described in the claims.

Description of Reference Numerals

[0058] 1,1B semiconductor device 10, 10A, 10B lead frame 11 First terminal portion 11a, 12a Upper surface 11b, 12b Lower surface 11c, 11d, 11e, 11f, 12c, 12d Side surface 11x, 12x Bonding region 11y, 11z, 12y, 12z Recess 12 Second terminal portion 13 Third terminal portion 14 Fourth terminal portion 15 Fifth terminal portion 18 Frame portion 20 Semiconductor chip 20r Mounting region 21 Chip body 22 Electrode 100 Metal plate 1001, 1002, 1003 regions 300 Resist 300x Opening

Claims

1. Comprising a plurality of terminal portions including a first terminal portion, The first terminal portion, On the upper surface, a plurality of bonding regions defined in a mounting region where a semiconductor chip is mounted and bonded one-to-one with the electrodes of the semiconductor chip, A lead frame having a recess provided between adjacent ones of the bonding regions, opening to the side of the upper surface, and reaching at least one side surface.

2. The first terminal portion has one of the side surfaces and another side surface facing the one side surface, and the recess reaches the other side surface. The lead frame according to claim 1.

3. The plurality of bonding regions are arranged in a matrix in a plan view, The first terminal portion has the recess arranged between one adjacent column. The lead frame according to claim 1.

4. The first terminal portion has the recess arranged between all adjacent columns. The lead frame according to claim 3.

5. The plurality of bonding regions are arranged in a matrix in a plan view, The first terminal portion has one of the recesses arranged in a grid pattern between all adjacent rows and between all adjacent columns. The lead frame according to claim 1.

6. The plurality of bonding regions are arranged in a matrix in a plan view, The first terminal portion has the recess extending in a direction oblique to the column direction. The lead frame according to claim 1.

7. The plurality of bonding regions are arranged in a matrix in a plan view, The first terminal portion has the recess including a portion extending in a direction oblique to the column direction and a portion extending in a direction parallel to the column direction. The lead frame according to claim 1.

8. The first terminal portion has a lower surface facing the upper surface, The lead frame according to claim 1, having a second recess opening to the side of the lower surface at a position not overlapping with the recess in a plan view.

9. Having a plurality of regions to be singulated, Each of the regions comprises a plurality of terminal portions including the first terminal portion, The first terminal portion of one of the regions and the first terminal portion of another of the regions have the recesses extending in different directions. The lead frame according to any one of claims 1 to 8.

10. The lead frame according to any one of claims 1 to 8, A semiconductor chip mounted on the lead frame, And a resin portion for encapsulating the lead frame and the semiconductor chip. The resin part is filled in the region where the upper surface of each of the terminal parts faces the lower surface of the semiconductor chip and inside the recess. A semiconductor device in which the lower surface of each of the terminal parts is exposed from the resin part.

Images