Method of inspecting optical circuit chip using PLC prober, and optical circuit chip

Abstract

To facilitate coarse alignment of a PLC prober to optical circuit chips in an optical characteristic inspection of the optical circuit chips on a wafer using the PLC prober.SOLUTION: A method of inspecting optical circuit chips on a wafer using a PLC prober is provided, the PLC prober being designed to have a tip thereof to be inserted to an etching groove from a top surface of the wafer to establish optical coupling with an optical waveguide of the optical circuit chip formed on a connection end face. The method comprises a step of performing coarse alignment for adjusting relative positions of the PLC prober and the optical circuit chip by inputting colored light to an optical waveguide constituting an alignment port of the PLC prober.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present disclosure relates to an inspection method using a PLC probe that enables inspection of the characteristics of an optical circuit of an optical circuit chip in a wafer state and an optical circuit chip.

Background Art

[0002] Towards the realization of the IOWN (Innovative Optical and Wireless Network) concept, higher capacity than ever is required for data centers and the like, and for each device, higher density by optoelectronic integration implementation is required. Therefore, attempts have been made to connect a silicon photonics optical circuit chip (hereinafter referred to as "SiP chip") and an optical fiber array to achieve miniaturization and high density.

[0003] Among the manufacturing costs of optical transceivers, the mounting and inspection processes account for a large proportion. To reduce the cost of optical transceivers, it is desirable to inspect the SiP chips in a wafer state, select good products, and then perform module mounting.

[0004] For the inspection of optical circuits such as SiP chips, after dicing from a wafer, an optical fiber or the like is aligned, light is incident on the optical circuit from an external light source, and while a drive signal is input to an optical modulator or the like of the optical circuit, an optical signal waveform that is modulated and output is acquired and evaluated. Such methods are common.

[0005] Therefore, in order to inspect the characteristics of the optical circuit of the optical circuit chip in the wafer state, it is necessary to input light into the optical waveguide of the optical circuit formed on the wafer and make it possible to detect the output light output from the optical waveguide of the optical circuit. For this reason, conventionally, wafer inspection using a grating coupler (GC) for inspection formed on the optical circuit has been carried out on the optical circuit formed on the wafer so that light can be input and output from above (Patent Document 1). However, wafer inspection using a GC has a problem that the optical circuit area increases because a GC for optical coupling needs to be additionally fabricated on the optical circuit. In addition, since the GC has poor optical coupling efficiency and variations in connection loss, improvement is desired.

[0006] Therefore, in recent years, wafer inspection by end-face coupling using a PLC probe has been proposed (Non-Patent Document 1). With reference to FIG. 1, a method for inspecting an optical circuit chip in a wafer state using a conventional PLC probe will be described. A plurality of optical circuit chips 110 are formed on the wafer 100 in FIG. 1. In the figure, only one optical circuit chip is labeled with reference numeral 110, the optical circuit is illustrated, and for other chips, the labeling and illustration of the optical circuit are omitted. Etching grooves 121 and 122 are formed on the upper surface of the wafer 100 by etching along the dicing lines for chip formation of the optical circuit chips 110. The etching groove 121 forms a connection end face for connecting a fiber or the like to the optical waveguide constituting the optical circuit of each optical circuit chip 110. As will be described later, the PLC probe 130 has a structure capable of emitting light in the optical axis direction (Y-axis direction) of the optical waveguide of the connection end face of the optical circuit chip from the tip portion.

[0007] Insert the tip of the PLC probe 130 into the groove 121 from above the wafer 100 (in the Z-axis direction), and input and output the light necessary for inspection to the optical waveguide on the connection end face of the optical circuit chip 110 from the tip of the PLC probe 130 to perform an optical characteristic inspection of the optical circuit. In this specification, as shown in FIG. 1, the X-axis direction is the direction parallel to the connection end face of the optical circuit chip (i.e., the direction parallel to the etching groove 121), the Y-axis direction is the direction perpendicular to the connection end face (i.e., the direction parallel to the etching groove 122), and the Z-axis direction is defined as the direction orthogonal to the X-axis and Y-axis.

[0008] FIG. 2 is a diagram showing an example of the PLC probe 130 in FIG. 1. FIG. 2(a) is a front view of the PLC probe, and FIG. 2(b) is a side view of the PLC probe. In the figure, the optical waveguide formed in the PLC probe 130 is shown in a transmissive manner. The PLC probe 130 includes an optical circuit chip portion 201 and an optical fiber block 202. The optical circuit chip portion 201 is formed with a planar optical waveguide formed using semiconductor manufacturing technology on a substrate such as Si. The planar optical waveguide of the optical circuit chip portion 201 includes an optical waveguide array 211 composed of a plurality of optical waveguides optically coupled to the optical waveguides constituting the optical input / output ports of the optical circuit chip to be inspected, and optical waveguides 216 and 217 constituting alignment ports. The optical fiber block 202 fixedly holds an optical fiber array 218 connected to each optical waveguide of the optical circuit chip portion, and is adhesively fixed to the optical circuit chip portion.

[0009] FIG. 2(c) shows an enlarged view of the portion IIc in FIG. 2(b). As shown in FIGS. 2(b) and (c), the tip surface 221, which is the end face opposite to the end face to which the optical fiber array of the PLC probe is connected, is formed obliquely with its tip cut so that the angle formed by the tip surface 221 and the main surface 222 of the PLC probe is a predetermined inclination angle θ.

[0010] FIG. 2(d) shows a state in which the PLC probe 130 is aligned with an optical circuit chip to be inspected in a wafer state and inspected. The PLC probe 130 in FIG. 2(d) shows only the vicinity of the tip, and a fiber block array or the like is omitted. The optical circuit chip 110 formed on the wafer 100 to be inspected shows only the vicinity of its connection end face. The figure also shows a part of an adjacent optical circuit chip 110. The etching groove 121 is a groove that forms the connection end face of the optical circuit chip 110 formed on the wafer in advance by an etching process along the chip cutting line described in FIG. 1.

[0011] The tip surface of the PLC probe is obliquely cut at an inclination angle θ with respect to the main surface, and is formed to be an inclined surface with an inclination angle θ with respect to the main surface. In this example, the inclination angle θ is set to 45°. Therefore, the optical axis of the incident and outgoing light from the optical waveguide 216 of the PLC probe is reflected by the tip surface 221 formed obliquely at an angle of 45° with respect to the optical axis and becomes the Y-axis direction, and can be optically coupled with the optical waveguide 232 of the optical circuit chip 110 to be inspected. By using the PLC probe 130, the optical characteristics can be measured as they are in the actual use circuit, and measurement close to the chip inspection performed by connecting an optical fiber block after chip cutting is possible.

Prior Art Documents

Patent Documents

[0012]

Patent Document 1

Non-Patent Documents

[0013]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0014] In order to perform an optical characteristic inspection of an optical circuit chip using the PLC probe 130 shown in FIG. 2, it is essential to perform an alignment process to make the optical waveguides of both of them optically coupled. The PLC probe 130 shown in FIG. 2 is formed with two optical waveguides used as alignment monitor ports, and the optical circuit chip to be inspected is also formed with two optical waveguides used as alignment monitor ports in the same manner.

[0015] For the PLC probe and the optical circuit chip, if the monitor ports at both ends are aligned, the optical waveguides forming the optical waveguide array of any other optical circuit can be aligned simultaneously with fine processing accuracy. Therefore, only the monitor ports at both ends need to be aligned.

[0016] (Alignment Method in Inspection Using a PLC Probe) FIG. 3 shows a state in which the PLC probe 310 is arranged at an initial position for alignment with respect to the optical circuit chip 320 to be inspected. Although not shown in FIG. 3, the PLC probe 310 is attached to a fine adjustment stage that can adjust the position of the PLC probe 310 in the X, Y, and Z axis directions and the angles (θx, θy, θz) around each axis via an arm-type jig 340.

[0017] The object to be measured, for example, a Si photonics wafer, is placed on the stage of a wafer inspection apparatus capable of inspecting chip characteristics using a conventional electrical probe. In such an apparatus, it is possible to evaluate electrical characteristics by contacting an electrical probe with the electrode pads of each chip. Furthermore, the above-described PLC probe 310 and the fine adjustment stage can be installed in the apparatus so that they can be optically coupled, enabling an optical characteristic inspection to be performed.

[0018] In this state, the orientation (θx, θy, θz) of the PLC probe 310 is perpendicular to the substrate surface of the optical circuit chip 320 (in the Z-axis direction), and the main surface 311 of the PLC probe 310 is set parallel to the connection end surface 321 of the optical circuit chip, which is a part of the etching groove 330. The setting of the orientation of this probe can be relatively easily implemented, for example, by fixing it to a previously parallelized holding jig 340 (in the figure, side contact to the chip guide, surface contact to the back surface), or by recognizing the outer shapes such as the chip sides, tip lines, and optical waveguide surfaces of the PLC probe.

[0019] Fig. 3(a) is a front view of the PLC probe 310 as seen from the side of the optical circuit formation surface. In Fig. 3(a), only the waveguide of the tip portion of the optical waveguide is shown through transmission, but the basic optical circuit configuration is the same as that described in Fig. 2. Also, the portion of the optical circuit chip 320 shown in Fig. 3(a) is a part near the connection end surface, and the optical circuit chip 320 is also a part of a wafer on which a plurality of optical circuit chips are formed. Fig. 3(a) shows a cross-sectional view of the X-Z plane of the optical circuit chip 320 (the portion IIIa in Fig. 3(b)). The PLC probe 310 is formed with an optical waveguide array 318 composed of optical waveguides 312, 313 that constitute alignment ports and optical waveguides 314 to 317 corresponding to the optical input / output ports of the optical circuit of the optical circuit chip. The optical circuit chip 320 is formed with an optical waveguide array 328 composed of optical waveguides 322, 323 that constitute alignment ports and optical waveguides 324 to 327 that constitute the optical input / output ports of the optical circuit.

[0020] Note that the optical waveguides 314 to 317 and the optical waveguides 324 to 327 that constitute the optical waveguide arrays 318 and 328 are examples, and actually, any optical waveguides are formed corresponding to the optical input / output ports that constitute the optical circuit of the optical circuit chip to be inspected. For example, as the optical waveguides 322 and 323 that constitute the alignment ports, optical circuits in a loop-back shape, such as those in which the light input to the port is returned as it is, are used for the convenience of active alignment.

[0021] As shown in the side view of FIG. 3(b), the tip surface 341 of the PLC probe is an inclined surface with an inclination angle θ = 45° with respect to the main surface 311, and is configured to be optically coupled with the optical waveguide of an optical circuit chip formed in the horizontal direction (Y-axis direction) of an optical waveguide arranged in the vertical direction (Z-axis direction) so as to be accessible from the upper surface of the wafer. The optical circuit chip 320 in FIG. 3(b) is a part of the wafer on which the optical circuit chip is formed, and is a cross-sectional view of the Y-Z plane of the optical circuit chip. In this figure, the optical circuit chip 320 shows only the portion near the connection end surface of the optical circuit chip.

[0022] FIG. 4 shows a state in which the PLC probe and the optical circuit chip to be inspected are aligned. Since the same reference numerals as those in FIG. 3 in FIG. 4 are the same as those in FIG. 3, the description here is omitted. The procedure for alignment from the state of FIG. 3 to the state of FIG. 4 is as follows.

[0023] (Active alignment) For the final optical connection alignment of the optical waveguides of the PLC probe 310 and the optical circuit chip 320, a method called active alignment is used. Active alignment means, for example, in the example of FIG. 3, while monitoring the intensity of light input from the optical waveguides 312 and 313 of the PLC probe into the optical waveguides 322 and 323 of the optical circuit chip, adjusting the position of the PLC probe and setting it to the position with the highest light intensity. By this alignment, the positions of the alignment optical waveguides at both end portions of the optical waveguide array can be aligned.

[0024] In order to perform this active alignment, first, it is necessary to align the optical waveguide that constitutes the alignment port of the PLC probe and the optical circuit chip so that the monitoring light can be detected, and this alignment is defined as rough alignment. In this rough alignment, starting from the state of FIG. 3, the PLC probe is relatively moved in the X-axis, Y-axis, and Z-axis directions with respect to the connection end face of the optical circuit chip, and from the optimal alignment position, in each direction of the X-axis, Y-axis, and Z-axis, it is necessary to align to a position on the order of, for example, ±10 μm. Since this rough alignment is performed by passive alignment based on appearance using visual inspection or image recognition technology, it cannot be easily performed without some guide structure or ingenuity in the alignment procedure. One of the objectives of the present disclosure is to facilitate the rough alignment of the PLC probe and the optical circuit chip in the optical characteristic inspection of the optical circuit chip in wafer form using the PLC probe.

Means for Solving the Problems

[0025] The present disclosure relates to a method for inspecting the optical characteristics of an optical circuit chip in wafer form using a PLC probe that is inserted into an etching groove formed on the upper surface of a wafer where an etching groove serving as the connection end face of each optical circuit chip is formed, and whose tip is inserted into the etching groove to optically couple with the optical waveguide of the optical circuit chip formed on the connection end face. The direction parallel to the connection end face of the optical circuit chip is defined as the X-axis direction, the direction perpendicular to the connection end face of the optical circuit chip is defined as the Y-axis direction, and the X-axis, Y-axis, and Z-axis are orthogonal to each other. The method includes a first step of performing rough alignment by inputting colored light into the optical waveguide that constitutes the alignment port of the PLC probe to adjust the relative positions of the PLC probe and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions; a second step of performing active alignment by measuring the intensity of light input from the alignment port of the PLC probe to the alignment port of the optical circuit chip while adjusting the relative positions of the alignment ports of the PLC probe and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions; and a third step of inspecting the optical characteristics of the optical circuit chip.

Effects of the Invention

[0026] According to the present disclosure, in the rough alignment of the PLC probe and the optical circuit chip in the inspection of the optical characteristics of the optical circuit chip in wafer state using the PLC probe, the visibility of the optical waveguide constituting the alignment port of the PLC probe can be improved, thereby facilitating the adjustment.

Brief Description of the Drawings

[0027]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Figure 21

Figure 22

Figure 23

Figure 24

Figure 25

Embodiments for Carrying Out the Invention

[0028] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the following description is illustrative, and embodiments in which some configurations are changed are possible without departing from the gist of the present disclosure. The same or similar reference numerals indicate the same or similar elements, and repeated descriptions may be omitted. The numerical values in the following description are illustrative, and the present disclosure may be implemented using other numerical values without departing from the gist of the present disclosure.

[0029] (First Embodiment) The first embodiment of the present disclosure relates to an inspection method for optical characteristics of an optical circuit chip in a wafer state using a PLC probe, which includes a coarse alignment step of inputting (passing colored light through) colored light into an optical waveguide constituting an alignment port of the PLC probe.

[0030] The inspection method of the present disclosure includes at least three steps. As a first step, rough alignment of the PLC probe and the optical circuit chip is performed. As a second step, active alignment of the alignment ports of the PLC probe and the optical circuit chip is performed. As a third step, optical characteristic inspection of the optical circuit of the optical circuit chip is performed. In order to facilitate the rough alignment of the PLC probe and the optical circuit chip in the first step, it is effective to improve the visibility of the optical waveguide of the PLC probe to be aligned.

[0031] The first embodiment of the present disclosure is an optical characteristic inspection method of an optical circuit chip in a wafer state using a PLC probe in which the tip is inserted into an etching groove formed on the upper surface of the wafer where an etching groove serving as a connection end face of each optical circuit chip is formed and optically coupled to the optical waveguide of the optical circuit chip formed on the connection end face of the optical circuit chip. The direction parallel to the connection end face of the optical circuit chip is defined as the X-axis direction, the direction perpendicular to the connection end face of the optical circuit chip is defined as the Y-axis direction, the X-axis, Y-axis, and Z-axis are perpendicular to each other, respectively. A first step of performing rough alignment by adjusting the relative positions of the PLC probe and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions by inputting colored light into the optical waveguide constituting the alignment port of the PLC probe; a second step of performing active alignment by adjusting the relative positions of the alignment ports of the PLC probe and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions while measuring the input light intensity input from the alignment port of the PLC probe to the alignment port of the optical circuit chip; and a third step of performing optical characteristic inspection of the optical circuit chip.

[0032] In this specification, colored light is light having a light color different from white light, and is, for example, light realized by any one color such as red, green, blue, or a combination of a plurality of colors. Red light is light having an intensity peak in a wavelength range of 600 nm or more and 700 nm or less, green light is light having an intensity peak in a wavelength range of 520 nm or more and 580 nm or less, and blue light is light having an intensity peak in a wavelength range of 400 nm or more and 500 nm or less. Although not limiting, when using colored light in this embodiment, it is desirable to use monochromatic light from the viewpoint of visibility. In particular, when using red light, it is advantageous in that the contrast is high and it can be visually recognized more clearly.

[0033] FIG. 5 is a flowchart showing the procedure of the optical characteristic inspection method of the optical circuit chip according to the first embodiment of the present disclosure. Steps 501 to 503 are the first step of performing rough alignment by moving the PLC probe in the X-axis, Y-axis, and Z-axis directions from the state of FIG. 3 described above. In step 501, the PLC probe is set at a predetermined position above the etching groove that becomes the connection end face of the optical circuit chip to be inspected. In step 502, colored light is input into the optical waveguide constituting the alignment port of the PLC probe. In step 503, using the optical waveguide into which the colored light is input as a mark, position adjustment in the X-axis direction, Y-axis direction, and Z-axis direction of the PLC probe is performed to perform rough alignment, and it is completed. The rough alignment performed while inputting colored light into the alignment port of the PLC probe of the optical circuit chip in step 503 is performed by visual inspection by an operator or position adjustment by image recognition processing.

[0034] In this embodiment, it is characterized by performing while inputting colored light into the optical waveguide constituting the alignment port of the PLC probe. The optical waveguide constituting the alignment port of the PLC probe has an improved contrast of the core portion of the optical waveguide with respect to other portions due to the colored light propagating in the optical waveguide, thereby enhancing visibility. In this way, by using the colored light emitted from the optical waveguide of the PLC probe and irradiated onto the connection end face of the optical circuit chip as a mark, it becomes easier to grasp the positional relationship between the optical waveguide and the connection end face of the optical circuit chip. In the present embodiment, although colored light is input at least into the optical waveguide constituting the alignment port, it may also be input into other optical waveguides.

[0035] Step 504 is a second step of performing active alignment while measuring the input light intensity input from the alignment port of the PLC probe to the alignment port of the optical circuit chip. By the rough alignment in steps 501 to 503 which are the first step, the optical waveguides constituting the alignment ports of the PLC probe and the optical circuit chip are aligned to such an extent that they can be optically coupled (within a range of ±10 μm).

[0036] In that state, in step 504, while measuring the light intensity of the light input from each optical waveguide constituting the alignment port of the PLC probe to each optical waveguide constituting the alignment port of the optical circuit chip, the positions in the X-axis direction, Y-axis direction, and Z-axis direction of the PLC probe are adjusted to perform active alignment. Note that one optical waveguide and the other optical waveguide constituting the alignment port of the optical circuit chip may be configured in one path, and active alignment may be performed using the light intensity input from one optical waveguide constituting the alignment port into the optical circuit and output from the other optical waveguide of the alignment port. The light used for active alignment does not necessarily have to be colored light as in the first step, and light such as near-infrared light can be used.

[0037] Step 505 is the third step of performing an optical characteristic inspection of the optical circuit chip using the aligned PLC probe. The optical characteristic inspection of the optical circuit chip here includes, for example, an optical loss of the optical circuit formed on the optical circuit chip, an operation inspection for obtaining the bias point of the high-speed modulator of the modulator, and the like.

[0038] When the optical characteristic inspection in step 505 is completed, it is determined in step 506 whether the optical characteristic inspection for all the optical circuit chips formed on the wafer has been completed. If not (NO), the process returns to step 501, the PLC probe is set to the state shown in FIG. 3 for the next optical circuit chip to be inspected, and steps 502 to 505 are executed again. When it is determined in step 506 that the optical characteristic inspection for all the optical circuit chips formed on the wafer has been completed, the inspection process ends. Then, the optical circuit chip is manufactured by a manufacturing method including a step of cutting the wafer along the etching groove.

[0039] Note that the optical waveguide of the PLC probe used in the present embodiment may be formed using a material capable of forming an optical circuit other than SiO2-based glass. For example, it may be formed of a TiO2 core - SiO2-based, ZrO2 core - SiO2-based, Si core - SiO2-based, or polymer-based material.

[0040] FIG. 6 is a diagram for explaining the first embodiment according to the present disclosure. FIG. 6(a) shows, as in FIG. 3, a state where the PLC probe 310 is arranged at the initial position before rough alignment with respect to the optical circuit chip 320 to be inspected (the state of step 501 in FIG. 5). Note that members denoted by the same reference numerals as in FIG. 3 are the same as those in FIG. 3, and thus the description thereof is omitted here. In this state, step 502 in FIG. 5 is executed. That is, visible colored light is input to the optical waveguides 312 and 313 constituting the alignment ports of the PLC probe. Although not limited, in the following description, the case where red light 601 is input as the colored light will be described.

[0041] FIG. 6(b) shows a state where rough alignment, which is the first step of the present embodiment, is executed. In the first step of this embodiment, red light is input into the optical waveguide to enhance the visibility of the PLC probe, and the optical waveguide into which the red light is input is used as a mark. As in this embodiment, if red light is input into the optical waveguide of the PLC probe for rough core alignment, the visibility of the positions of the optical waveguides 312 and 313 on the PLC probe and the positions of the light emitted from each optical waveguide is improved. Therefore, it is convenient for rough core alignment that is adjusted by appearance using image recognition or the like.

[0042] FIG. 7 shows another example of the PLC probe used in this embodiment. In FIG. 7, the same reference numerals as those in FIG. 3 are the same as those in FIG. 3, and thus the description thereof will be omitted here. As shown in FIG. 7(a), the tip surface 341, which is the reflecting surface of the light emitted from the optical waveguide of the PLC probe 310, may be protected by providing a coating layer 701 on the clad layer portion. The coating layer 701 may be a metal with a high reflectivity such as Au, or an HR coating or an AR coating composed of a SiO2 multilayer film or a TiO2 multilayer film, and the material thereof is not limited. By coating the inclined reflecting surface at the tip of the PLC probe, the influence of external disturbances on the reflecting surface, such as dew condensation, can be eliminated, and the reflection characteristics can be stably maintained.

[0043] In FIG. 6, the tip surface 341 of the PLC probe 310 is set at an inclination angle θ of 45° with respect to the main surface 311 of the PLC probe. However, this inclination angle θ is not limited to 45°, and may be set to any angle from 40° to 50°. When a quartz-based glass material is used, if the inclination angle θ is about 48° or less, the inclined reflecting surface satisfies the total reflection angle condition, and the loss is small, which is convenient.

[0044] Fig. 7(b) shows an example in which the tilt angle θ is made narrower and set to 43°. Since the light emission angle of the light emitted after being reflected from the diagonal tip surface 341 is deviated from the vertical direction (Y-axis direction in the figure) of the main surface of the PLC probe as the tilt angle of the tip is narrower, as shown in Fig. 7(b), the PLC probe is arranged to be tilted with respect to the Z-axis direction. In this case, since the connection end surface 321 of the optical circuit chip and the surface of the overclad layer (main surface 311 of the optical circuit chip) from which the light emitted from the optical waveguide of the PLC probe is emitted are not parallel to each other, there is an advantage that the generation of resonance component noise between the two planes can be prevented.

[0045] (Example 1) Fig. 8 is a diagram for explaining the first example of the first embodiment according to the present disclosure. Fig. 8(a) shows a state in which the optical circuit chip 320 to be inspected is arranged at the initial position before alignment, similar to Fig. 6. Members denoted by the same reference numerals as in Fig. 6 in Fig. 8 are the same as those in Fig. 6, and thus the description thereof is omitted here. Further, Fig. 8(b) shows a state in which rough alignment, which is the first step of the present embodiment, is executed.

[0046] This embodiment is characterized in that red light is input to the optical waveguide of the PLC probe in the first step. In this case, if an image captured from the direction of arrow A in Fig. 8(a) can be used, the red light propagating through the optical waveguide of the PLC probe can be visually recognized, which is convenient when performing rough alignment in the first step. In particular, since the line of the optical waveguide of the PLC probe can be visually recognized, it is convenient for rough alignment in the X-axis direction.

[0047] However, in the actual device configuration, the installation position and field of view of the camera are restricted, and it is often impossible to take pictures from the direction of arrow A. For example, when measuring while pressing an electrical probe on the chip and applying a voltage, there is also a fine adjustment micromotion stage etc. around the electrical probe, so the field of view of the camera is limited. Therefore, in this embodiment, by using a quartz glass substrate 811 for the substrate of the PLC probe 810, it is possible to take pictures of the line of red light propagating through the optical waveguide, the spot on the reflecting surface near the tip of the PLC probe, etc. from the substrate side (the direction of arrow B) of the substrate 811 of the PLC probe, and in the captured camera image, use the red light as a landmark so that rough alignment can be performed.

[0048] Note that since the tip surface 341 of the PLC probe 810 is cut so as to be inclined at an inclination angle θ with respect to the main surface 311, only the tip of the waveguide layer can be photographed even from the Si substrate side, but there are also spots such as stray light, and it is easier to visually recognize when photographed in a set with the line of the optical waveguide. Also, by measuring the interval C-D using the image taken from the direction of arrow B, rough alignment in the Z direction is also possible. In this case, since the distance D-E from D in the figure to the optical waveguide can be grasped from the design data of the optical circuit chip, in addition to the measured interval C-D, by translating the PLC probe in the Z direction by the distance D-E, rough alignment in the Z direction is possible.

[0049] (Example 2) Next, a second embodiment according to the present disclosure will be described with reference to FIG. 9. FIG. 9 shows only the vicinity of the tip of the PLC probe 310, similar to FIG. 3(b). Also, the optical circuit chip 320 to be inspected shows only the vicinity of the optical waveguide formation portion of the connection end face 321 of the optical circuit chip. In the first step of the first embodiment, red light 601 is incident on the optical waveguide constituting the alignment port, improving the visibility of the position of the optical waveguide. In the second embodiment, by allowing red light to be incident from the optical waveguides 312 and 313 constituting the alignment port of the PLC probe onto the waveguide formation layer portion of the connection end face 321 of the optical circuit chip 320, the red light 601 can be observed from the upper surface of the optical circuit chip 320. By using this phenomenon, it is used as a reference for adjusting the Z-axis direction in the rough alignment, which is the first step, to facilitate the rough alignment in the Z-axis direction.

[0050] FIGS. 9(a) to 9(d) each show the state of moving the PLC probe 310 downward from above the wafer substrate in the Z-axis direction. As shown in FIG. 9(a), when the PLC probe 310 is displaced above the optical circuit chip 320, or as shown in FIG. 9(d), when the PLC probe 310 is displaced below the waveguide formation layer of the connection end face 321 of the optical circuit chip 320, the red light 601 is not observed from above the optical circuit chip. As shown in FIG. 9(b), when the red light 601 from the PLC probe 310 is incident near the surface of the overclad layer of the optical circuit chip 320, a line of the red light 601 is observed on the surface of the overclad layer from above the optical circuit chip. Further, as shown in FIG. 9(c), when the red light 601 is incident on the clad layer of the optical circuit chip 320, the red light 601 that scatters the clad layer of the alignment port is observed from above.

[0051] Thus, in the second embodiment, by using the red light 601 that can be observed from above the optical circuit chip as a reference for rough alignment in the Z-axis direction, the rough alignment in the Z-axis direction can be facilitated.

[0052] (Embodiment 3) To simplify the rough alignment in the Z-axis direction, a PLC probe provided with a Z-axis positioning stopper can also be used. Referring to FIG. 10, the rough alignment in the Z-axis direction using the PLC probe 1010 of the third embodiment of the present disclosure will be described. FIG. 10 shows only the vicinity of the tip of the PLC probe 1010 of Embodiment 3, and the other parts of the PLC probe are omitted, but it has the same configuration as the PLC probe shown in FIGS. 2 and 3. The optical circuit chip 320 and the like indicated by other reference numerals are the same as those in FIG. 3, so the description here is omitted.

[0053] The PLC probe 1010 includes a stopper portion 1013 formed by etching the overclad layer 1012 at the tip portion thereof to form a recess. As shown in FIG. 10, by lightly touching the stopper portion against the surface of the optical circuit chip 320 to be inspected, positioning in the Z-axis direction, that is, rough alignment in the Z-axis direction can be performed. Note that by providing a recess in the overclad layer 1012 of the PLC probe 1010, the overclad layer at the tip of the PLC probe is thinned, and the coupling loss can be reduced by narrowing the gap between the waveguide core of the PLC probe and the optical connection surface of the measurement chip.

[0054] (Embodiment 4) As in the fourth embodiment shown in FIG. 11, instead of providing a stopper by etching the overclad layer, a binary lens or a metalens may be formed in the overclad layer by etching. By doing so, a plurality of lenses corresponding to the light incident and exit positions from each optical waveguide provided in the PLC probe can be integrally formed on the overclad layer at the tip of the PLC probe. Thereby, the coupling loss of each optical waveguide between the PLC probe and the optical circuit chip can be reduced.

[0055] FIG. 11 shows an example in which a binary lens 1113 is formed by etching on the overclad layer 1112 at the tip of the PLC probe 1110. In FIG. 11, only the tip portion of the PLC probe is shown, and other portions of the PLC probe are omitted, but it has the same configuration as the PLC probe shown in FIGS. 2, 3, etc.

[0056] (Example 5) In the fifth example of the present embodiment, in order to more easily perform the rough alignment while observing the red light 601 of Example 2 described above from the upper surface of the optical circuit chip, a structure for scattering colored light is added to the clad layer of the optical circuit chip to be inspected.

[0057] Referring to FIG. 12, the configuration of the optical circuit chip 1220 according to Example 5 will be described. FIG. 12(a) shows a state in which the red light 601 from the PLC probe 310 is incident on the clad layer of the optical circuit chip 1220. Further, FIG. 12(b) is a view of the XIIb portion near the connection end face 321 of the optical circuit chip 1220 in FIG. 12(a) as seen from the upper surface of the chip (Z-axis direction). The connection end face 321 of the optical circuit chip 1220 is provided with optical waveguides 322 and 323 that constitute the alignment ports in the same manner as the above-described optical circuit chips, and optical waveguides 324 to 327 that constitute the input / output optical ports of the optical circuit of the optical circuit chip. Further, in this example, etching patterns 1221, 1222, 1223, and 1224 are respectively formed on both sides of the optical waveguides 322 and 323.

[0058] When the red light from the optical waveguide constituting the alignment port of the PLC probe is incident on the etching pattern, the red light is scattered. Therefore, it becomes possible to more clearly observe from the upper surface the scattered light generated when the optical waveguide constituting the alignment port of the PLC probe is located at the position corresponding to the etching pattern. Thereby, the rough alignment in the Z-axis direction can be performed more reliably.

[0059] Furthermore, this etching pattern is formed in a corresponding positional relationship, such as on both sides of the optical waveguides 322 and 323 that need to be finally aligned. By sweeping the PLC probe in the X-axis direction, the positions of the optical waveguides 322 and 323 can be grasped, thus facilitating the rough alignment in the X-axis direction. Note that the shape of the etching pattern is not limited to a rectangle, and any shape that scatters visible light and makes recognition easier is acceptable. Also, the etching pattern may be a groove formed by etching.

[0060] For example, as shown in FIG. 13, dummy optical waveguide patterns 1321, 1322, 1323, and 1324 may be formed on both sides of the optical waveguides 322 and 323. FIG. 13 is a view of the round portion near the connection end face 321 as seen from the top surface (Z direction) of the chip, similar to FIG. 12(b). The dummy optical waveguide patterns in this embodiment of the optical circuit chip 1320 are each formed from a plurality of optical waveguides. When using the dummy optical waveguide pattern, the rough adjustment in the Z direction is completed when visible light is scattered by any of the optical waveguides, so it can be easily performed as in FIG. 12.

[0061] (Embodiment 6) FIG. 14 shows an example in which, instead of forming a structure that scatters colored light, photo-detector (PD) elements are formed on both sides of the optical waveguides 322 and 323 that constitute the alignment ports of the optical circuit chip. FIG. 14 shows only the vicinity of the optical waveguide 322 side of the connection end face 321 of the optical circuit chip 1420.

[0062] The optical circuit chip 1420 of this embodiment includes, similar to the optical circuit chip 1320 described in FIG. 13, another optical waveguide 323 that constitutes the alignment port, and optical waveguides 324 to 327 that constitute the input / output ports of the optical circuit. The SiP chip is characterized by the ability to easily integrate a large number of PDs such as Ge-PD. The optical circuit chip 1420 of this Embodiment 6 uses a plurality of PDs arranged at appropriate intervals instead of the etching grooves and dummy optical waveguides of Embodiment 4.

[0063] When any one of PDs 1421 to 1427 receives the red light 601 from the PLC probe, a received light signal is output, and it can be detected that the optical waveguide constituting the alignment port of the PLC probe is located at the position of the PD that output the received light signal.

[0064] In the example of FIG. 14, seven PDs 1421 to 1427 are integrated and configured to be connected in parallel by the same cathode electrode 1428 and anode electrode 1429. In this case, it is impossible to distinguish which PD the red light 601 is incident on. However, during the rough alignment of the PLC probe, by performing position adjustment in the X-axis direction from one side to the other side of the PDs arranged in parallel, light is swept from one end, and using the intensity pattern of the received light signal at that time, the position of the PD corresponding to the place where alignment is desired, that is, the position of the optical waveguide 322, can be obtained. PDs 1421 to 1427 similar to the optical waveguide 322 are also formed in the optical waveguide 323 of the optical circuit chip 1420. Also, the number of PDs is an example and may be other than seven.

[0065] FIG. 15 shows an example in which the arrangement and structure of the cathode electrode and anode electrode are devised so that the PD 1424 on the optical waveguide can be used after the optical circuit chip is formed into a chip. The anode electrode is configured to be connected in parallel by the same anode electrode 1429 as in the optical circuit chip of FIG. 14. Then, the cathode electrodes of PDs 1421 to 1423 and PDs 1425 to 1427 other than PD 1424 are connected in parallel by the combined cathode electrodes 1521 and 1523, and only PD 1424 has its cathode electrode 1522 separated. Also, the cathode electrodes 1521 to 1523 are configured to be short-circuited on the adjacent chip region 1530. Therefore, the optical circuit chip 1520 in FIG. 15 can be used in the same way as the optical circuit chip 1420 shown in FIG. 14.

[0066] Since the cathode electrode 1522 of PD1424 is separated after being cut by the groove 122 in the chip formation process, after chip cutting, PD1424 can be used as a PD. Therefore, for example, it is possible to perform alignment when connecting an optical fiber array to an optical circuit chip and use it as a PD for the optical circuit of the optical circuit chip. In this embodiment, PDs are installed in the optical waveguides 322 and 323 that constitute the alignment ports. However, instead of installing PDs in the optical waveguides 322 and 323, PDs may be installed in the optical waveguides branched from the optical waveguides 322 and 323.

[0067] (Embodiment 7) In each of the above-described methods, the facilitation of rough alignment, which is the first step, is realized by inputting red light into the optical waveguides that constitute the alignment ports. In FIG. 16, for easy understanding, the XZ plane of the PLC probe is developed in the XY plane direction and shown.

[0068] In this embodiment, when the optical axis directions of the optical waveguides formed on the connection end face 1621 of the optical circuit chip 1620 are formed obliquely with respect to the connection end face, near-infrared light is input into the optical waveguides that constitute the alignment ports, and the minute reflection surface 1660 formed on the connection end face of the optical circuit chip 1620 is used as a mark to perform rough alignment. FIG. 16 shows only the optical waveguide 1623 that constitutes one of the alignment ports of the optical circuit chip, and the optical waveguides of this circuit and the optical waveguides that constitute the other alignment port are omitted.

[0069] A PLC prober that inspects an optical circuit chip in which the optical axis of the optical waveguide on the connection end face is formed obliquely with respect to the connection end face is formed such that the optical axis of each optical waveguide 1611 is also obliquely oriented as shown in the figure in order to make the emitted light from the prober tip face coincide with the optical axis direction of the optical waveguide. Therefore, in FIG. 16(a), even when the PLC prober 1610 is moved in the X-Z direction, the reflected light from the end face is always reflected in the direction of the dotted line and does not return to the optical waveguide of the PLC prober.

[0070] On one hand, in the optical circuit chip 1650 of FIG. 16(b), a minute reflecting surface 1660 perpendicular to the optical axis direction of the emitted light (the optical axis direction of the optical waveguide 1623 in the optical circuit chip 1650), where the emitted light from 1611 returns to 1611, is formed by etching only a part near the core of the optical waveguide 1623 and the clad layer 1624 portion of the connection end face 1651. In FIG. 16, the size of the minute reflecting surface is shown larger for easy viewing, but by using etching, a minute reflecting surface with a size of about 100 um or less in width can be created.

[0071] FIG. 16(c) shows a view of the portion of the optical circuit chip 1650 shown in FIG. 16(b) seen from the connection end face side. As shown in FIG. 16(c), the minute reflecting surface 1660 formed perpendicular to the optical axis direction of the optical waveguide 1623 is formed only on the clad layer 1624 portion formed on the substrate 1625 of the optical circuit chip. With such a structure, the emitted light from the optical waveguide 1611 that constitutes the alignment port of the PLC probe returns to the optical waveguide 1611 only when it is incident on this minute reflecting surface 1660. When the PLC probe 1610 moves in the Z direction or the X direction from that position, the reflected light does not return to the optical waveguide 1611.

[0072] By using this principle, rough alignment in the X-axis direction or the Z-axis direction can be performed using this minute reflecting surface 1660 as a positioning reference. Note that this embodiment is used in combination in the first step, which is a rough alignment process using colored light input into the optical waveguide that constitutes the alignment port as a mark, in the same manner as the above-described embodiments.

[0073] (Second Embodiment) Next, as a second embodiment of the present disclosure, a method for facilitating rough alignment in the Y-axis direction by using a PLC probe with a proximity detection waveguide circuit will be described. The second embodiment is an optical characteristic inspection method of an optical circuit chip in a wafer state using a PLC probe including steps 501 to 506 shown in the flowchart of FIG. 5, similar to the first embodiment.

[0074] In the first step of this embodiment, a rough alignment in the Y-axis direction is performed by detecting the distance in the Y-axis direction of the PLC probe using a proximity detection waveguide circuit.

[0075] (Example 1) FIG. 17 shows FIG. 17(a), which is a schematic plan view of the PLC probe used in the first example of the second embodiment, and FIG. 17(b), which is an enlarged view of the main part thereof. In FIG. 17(a), the optical waveguide provided in the PLC probe 1710 is shown as being transmitted only near the tip.

[0076] The PLC probe 1710 includes optical waveguides 1711 and 1712 that form alignment ports, and an optical waveguide array 1713 to 1716 for coupling to the optical waveguides that form the input / output ports of the optical circuit chip. The tip of the PLC probe is formed obliquely in the same manner as the above-described PLC probe, and the light emission direction from each optical waveguide of the PLC probe is the Y-axis direction. The structure of the other PLC probes is the same as that described above with reference to FIGS. 2 and 3, but is omitted in this drawing.

[0077] The PLC probe 1710 of this example further includes proximity detection waveguide circuits 1721 and 1722. FIG. 17(b) is an enlarged view of the region near the proximity detection waveguide circuit 1722 surrounded by the two-dot chain line in FIG. 17(a), and is an enlarged view of only the side of the optical waveguide 1712 that forms the alignment port. In FIG. 17(b), for ease of understanding, the XZ plane of the PLC probe is developed in the XY plane direction. Note that the proximity detection waveguide circuit 1721 (not shown) also has the same structure as 1722.

[0078] As shown in Fig. 17(b), the proximity detection waveguide circuit 1722 is composed of an input-side waveguide 1731 that emits light at a predetermined angle with respect to the connection end face 1741 of the optical circuit chip 1740, and a plurality of output-side waveguides 1732 to 1734 into which the reflected return light reflected from the connection end face 1741 of the optical circuit chip is incident. The tilt angle of the optical axis of the input-side waveguide 1731 and the tilt angles of the optical axes of the respective output-side waveguides are set to the same angle α. And the distance β between the input-side waveguide and the output-side waveguide is set according to the proximity distance to be detected.

[0079] For example, when the distance L from the upper surface 1718 of the overclad layer of the PLC probe 1710 in Fig. 17(b) to the connection end face 1741 of the optical circuit chip 1740 is taken as the distance to be detected, the distance β between the input-side waveguide 1731 and the output-side waveguide 1733 may be set to β = 2Ltanα. By doing so, when the distance in the Y-axis direction between the upper surface 1718 of the overclad layer of the PLC probe and the connection end face 1741 of the optical circuit chip 1740 becomes L, the light from the input-side waveguide 1731 is reflected by the connection end face 1741 of the optical circuit chip and enters the output-side waveguide 1733.

[0080] The proximity detection waveguide circuit in Fig. 17(b) includes an output-side waveguide 1732 with a smaller distance β than the output-side waveguide 1733 and an output-side waveguide 1734 with a larger distance β. When the distance in the Y-axis direction between the PLC probe and the connection end face becomes larger than L, the output-side waveguide into which the light enters changes to 1734. Similarly, when the distance in the Y-axis direction between the PLC probe and the connection end face becomes smaller than L, the output-side waveguide into which the light enters changes to 1732. In this way, by adding a proximity detection waveguide circuit to the PLC probe and using it to grasp the distance in the Y-axis direction between the PLC probe and the connection end face of the optical circuit chip, it becomes possible to easily perform rough alignment in the Y-axis direction.

[0081] In Fig. 17, a configuration with three output-side waveguides 1732 to 1734 is illustrated, but the number of output-side waveguides may be set according to the number and range of detectable distances, and can be any number of one or more.

[0082] (Example 2) Next, a second embodiment of the present embodiment will be described with reference to FIG. 18. The proximity detection waveguide circuit of the PLC probe in Example 2 of FIG. 17 can also be configured using an Arrayed waveguide gratings (AWG).

[0083] FIG. 18 is an example of the configuration of such a proximity detection waveguide circuit. The wavelength of the light incident from port 1 and exiting from port 2 changes corresponding to the distance between the connection end face 1741 of the PLC probe 1810 and the optical circuit chip 1740 to be inspected. That is, by measuring the wavelength of the transmitted light, a proximity detection operation of obtaining the distance in the Y-axis direction from the connection end face 1741 of the optical circuit chip becomes possible.

[0084] FIG. 18(b) is an enlarged view of the region near the proximity detection waveguide circuit 1822 surrounded by the two-dot chain line in FIG. 18(a), and is an enlarged view of only the side of the optical waveguide 1712 that constitutes the alignment port. In FIG. 18 as well, for easy understanding, the XZ plane of the PLC probe is developed and shown in the XY plane direction. Note that the PLC probe 1820 in this embodiment also includes a proximity detection waveguide circuit 1821 with the same structure on the side of the optical waveguide 1711 that constitutes the alignment port (not shown). In FIG. 18, those with the same reference numerals as in FIG. 17 are the same as in FIG. 17, so the description here is omitted.

[0085] First, using FIG. 18, the constituent requirements of the proximity detection waveguide circuit 1822 through which a specific wavelength λ i transmits at a specific distance D i will be described.

[0086] The light with wavelength λ i incident from Port1 is branched into a plurality of array waveguides in the first slab waveguide section 1831 of the AWG up 1823, given a delay amount corresponding to the optical path length of each array waveguide, and then incident on the second slab waveguide section 1832. The light with wavelength λ iAs for the entire light, it is emitted from P which is the central position of each connection point between the array waveguide and the second slab waveguide section. up in the direction of an angle that satisfies the following equation. n s d up θ upi +n c ΔL up =m up λ i (Equation 1) Note that the effective refractive indices of the array waveguide and the slab waveguide are n c , n s , the waveguide interval at the array waveguide end of the AWG up is d up , the diffraction angle is θ up,i , the optical path length difference between adjacent array waveguides is ΔL up , and m up is taken as an arbitrary integer.

[0087] The light with the above wavelength λ i is further incident on the chip end at an incident angle α up,i =φ slab,up -θ up,i (φ slab,up is the inclination of the second slab waveguide section of the AWG up ). Assuming that the effective refractive index of the gap between the PLC probe 1810 and the optical circuit chip 1740 to be inspected is n space , then β up,i ≈n s / n space ·α up,i and is emitted from the PLC probe at this angle. (If the gap is filled with air at this time, then n space =1, and if it is filled with a refractive index matching liquid, then n space ≈n s .)

[0088] When the surfaces of the PLC probe 1810 and the optical circuit chip 1740 are parallel, the incident angle θ up,i on the connection end face 1741 of the optical circuit chip, the reflection angle θ dn,i , and further the re-incident angle β dn,i on the PLC probe are all equal to each other, and α up,i =n space / ns ·β up,i At an angle of, from the connection end face 1741 of the optical circuit chip 1740 to the PLC probe 1810 side, that is, AWG dn Light with a wavelength of λ propagates in the second slab waveguide section 1835 of 1824 i .

[0089] At this time, AWG dn P, which is the central position of the array waveguide end of 1824 dn is arranged on the propagation path of the light with the above-mentioned wavelength λ i , and the waveguide interval at the array waveguide end of AWG dn 1824 is d dn , the diffraction angle is θ dn,i , the optical path length difference between adjacent array waveguides is ΔL dn , m dn is an arbitrary integer, and when the tilt of the second slab waveguide section 1835 of AWG dn 1824 is φ slab,dn , if it is designed to satisfy the following formulas (2) and (3), a proximity detection waveguide circuit through which light with a specific wavelength λ i transmits at a specific distance D i can be configured. α dn,i = φ slab,dn - θ dn,i (Formula 2) n s d dn θ up,i + n c ΔL dn = m dn λ i (Formula 3)

[0090] In addition, in order to easily realize a proximity detection waveguide circuit through which light with a specific wavelength λ i transmits at a specific distance D i , the parameters of AWG dn 1824 can be set to the same values as those of AWG up 1823, that is, the two AWGs can be of the same shape.

[0091] Next, with reference to FIG. 19, the operation when the distance between the PLC probe 1810 configured as described above and the optical circuit chip 1740 to be inspected is changed will be described. FIG. 19 is an enlarged view of the vicinity of the second slab waveguide portions 1832 and 1835 of the AWG up 1823 and the AWG dn 1824 in the proximity detection waveguide circuit described in FIG. 18(b). Also in FIG. 19, for ease of understanding, similar to FIG. 18(b), the XZ plane of the PLC probe is expanded and shown in the XY plane direction.

[0092] FIG. 19(b) shows the case where the distance D b is a specific distance D i . According to the configuration requirements of the proximity detection waveguide circuit described above, the condition for the light emitted from P up of the AWG up 1823 to be reflected by the connection end face 1741 of the optical circuit chip 1740 and incident on P dn of the AWG dn 1824 is satisfied when θ dn,b is equal to θ dn which is a configuration requirement of the AWG dn,i 1824. Therefore, the AWG dn 1824 transmits light of a specific wavelength λ i .

[0093] FIG. 19(a) shows the case where the distance D a is smaller than a specific distance D i . In this case, the angle θ up at which the light emitted from P up of the AWG dn 1823 is reflected by the connection end face 1741 of the optical circuit chip 1740 and incident on P dn of the AWG dn,a 1824 becomes smaller than θ dn,i and does not coincide with θ dn,i . As a result, the AWG up 1823 does not transmit light of a specific wavelength λ i .

[0094] On the other hand, FIG. 19(c) shows the case where the distance D c is a specific distance D iWhen it is larger, in this case AWG up P of 1823 up The light emitted from hits the connection end face 1741 of the optical circuit chip 1740 and is reflected to AWG dn P of 1824 dn The angle θ when incident on dn,c is θ dn,i becomes larger and does not match θ dn,i and in this case also AWG up 1823 stops transmitting light of a specific wavelength λ i That is, by adjusting the Y-axis direction position of the PLC probe so that the transmittance of a specific wavelength λ i becomes maximum, the distance D between the PLC probe and the optical circuit chip can be adjusted i to match.

[0095] In the above description, it has been explained that the distance between the PLC probe and the optical circuit chip can be adjusted to a specific distance D i However, regarding the two AWGs of the proximity detection waveguide circuit up 1823 and AWG dn 1824, in addition to the constituent requirements described above, a modification example will be described in which the angular dispersion (differential coefficient of the diffraction angle with respect to the wavelength λ i ) at a specific wavelength λ i is set to be equal to each other.

[0096] AWG up The angular dispersion (differential coefficient of the diffraction angle with respect to the wavelength λ i ) of 1823 at a specific wavelength λ i is obtained as Equation (4) by solving Equation (1) for θ and differentiating with respect to λ. The angular dispersion of AWG dn 1824 is obtained as Equation (5) in the same manner from Equation (3). dθ up / dλ(λ i ) = m up n g / m s d up n c Equation (4) dθ dn / dλ(λ i ) = mdn n g / m s d dn n c Equation (5)

[0097] Note that in the above, as a method for easily realizing the configuration of the proximity detection waveguide circuit, the parameters of AWG up 1823 are set to the same values as those of AWG dn 1824, that is, a configuration example in which two AWGs are of the same shape is shown. However, this configuration example satisfies the configuration condition of the proximity detection waveguide circuit in which the angular dispersion (the derivative coefficient at the wavelength λ i in terms of the diffraction angle) at a specific wavelength λ i is set to be equal between the two AWGs at the same time.

[0098] Referring to FIG. 19, it has been described that the angle θ up at which the light emitted from P of AWG up 1823 is reflected by the connection end face 1741 of the optical circuit chip 1740 and enters P of AWG dn 1824 changes according to the distance D dn between the PLC probe and the optical circuit chip. More specifically, θ dn in FIG. 19(a) is equal to the angle θ i at which the light is emitted from P of AWG dn,a 1823, and similarly, θ up in FIG. 19(c) is equal to θ up at which the light is emitted from P of AWG up,a 1823. dn,c is equal to θ up,c is equal to θ

[0099] AWG up 1823 and AWG dn 1824 having equal angular dispersions at a specific wavelength λ i means that the wavelength λ up near λ up,a that satisfies the diffraction angle θ i of AWG a 1823, that is, the wavelength λ up that can pass through AWG a 1823 can also pass through AWG dn 1824. Similarly, AWGup The diffraction angle θ in 1823 up,c λ that satisfies i λ in the vicinity c is the AWG dn can also transmit 1824.

[0100] In this way, for a specific wavelength λ i the angular dispersion at (the differential coefficient of the diffraction angle with respect to the wavelength λ i at) is set to be equal to each other by two AWGs at a distance D i At this time, λ i is the AWG up 1823 and the AWG dn 1824 can both be transmitted through. (Needless to say, when incident on the AWG up 1823 at an angle of θ up,c light of wavelengths other than λ c cannot be transmitted through the AWG dn 1824.)

[0101] As described above, in this modification, as the distance between the PLC probe and the SIP changes as D a →D b →D c the wavelength of the light that can be transmitted from port 1 to port 2 changes as λ a →λ b →λ c Therefore, by measuring the wavelength of the light output from port 2 and associating it with the distance L in the Y-axis direction between the PLC probe and the connection end face of the optical circuit chip, it is possible to easily perform rough alignment in the Y-axis direction by grasping it.

[0102] (Example 3) Next, referring to FIG. 20, Example 3 of the second embodiment will be described. In Examples 1 and 2 described with reference to FIGS. 17 and 18, an example was shown in which a proximity detection waveguide circuit was separately provided in the PLC probe. However, in this example, the optical waveguides 312 and 313 that constitute the alignment ports of the PLC probe can also be configured to be used as the proximity detection waveguide circuit.

[0103] FIG. 20 is an enlarged view of the region near the optical waveguide 313 surrounded by the two-dot chain line of the PLC probe 310 in FIG. 20(a) for easy understanding, similar to FIG. 17(b), and is shown by developing the XZ plane in the XY plane direction. Note that the PLC probe shown in FIG. 20(a) has the same configuration as the PLC probe described in FIG. 3, and the components with the same reference numerals as in FIG. 3 are the same as those in FIG. 3, so the description here is omitted. Also, since the optical circuit chip 1740 in FIG. 20(b) is the same as that in FIG. 17(b), the description here is omitted.

[0104] The light emitted from the optical waveguide 313 of the PLC probe 310 is reflected by the emission end face 2011 of the front end face of the PLC probe and the connection end face 1741 of the optical circuit chip 1740, respectively, so that it can operate as an etalon filter. When operating in this way, the light reflection intensity changes sharply due to the change in the gap distance in the Y-axis direction. By utilizing this, it is possible to grasp the distance in the Y-axis direction. By adding a half mirror 2012 to the overclad layer portion at the tip of the PLC probe from which the light from the optical waveguide 313 is emitted, the change in the light reflection intensity can be made more sensitive.

[0105] (Configuration for facilitating other inspections) As described above, among the manufacturing costs of optical transceivers using optical circuit chips such as SiP chips, the proportion occupied by the mounting and inspection processes is large. To reduce the cost of optical transceivers, it is desirable to inspect optical circuit chips such as SiP chips in a wafer state, select good products, and then perform module mounting. Also, improvement in inspection efficiency is desired in the optical characteristic inspection using the above-described PLC probe. Hereinafter, the measures for improving the inspection efficiency of the optical characteristic inspection, which is the third process, will be described.

[0106] The examples described below also relate to the method for inspecting the optical characteristics of optical circuit chips in a wafer state. In the figures, only one or several optical circuit chips in a wafer state are exemplified, but actually, the optical circuit chips are in a wafer state before dicing.

[0107] (Embodiment Example 1) FIG. 21 enables the collective inspection of the optical characteristics of a plurality of optical waveguides of an optical circuit chip by applying an optical splitter to a PLC probe. FIG. 21 shows a PLC probe 2110 and an optical circuit chip 2120 to be inspected. Also in FIG. 21, for the sake of simplicity and easy understanding of the figure, the XZ plane of the PLC probe is expanded onto the XY plane. Therefore, actually, the plane on which the optical waveguides, which are the main surfaces of the PLC probe, are formed is arranged perpendicular to the XY plane as shown in FIGS. 1 to 3 and the like. In FIG. 21, the description of the optical waveguides constituting the alignment ports of the PLC probe and the optical circuit chip is omitted, but similar to the above-described ones, it is provided with two optical waveguides constituting the alignment ports. And it is the same that a first step of performing rough alignment between the PLC probe and the optical circuit chip and a second step of performing active alignment are carried out.

[0108] In this example, the optical circuit chip 2120 to be inspected is a 1-input × 4-output circuit, and the optical circuit may have branches as shown in FIG. 21, or may be one in which Mach-Zehnder type modulators are provided in each optical circuit from 2122 to 2125. When the optical circuit chip to be inspected includes a modulator, the optical characteristics may be inspected while performing phase adjustment.

[0109] The optical circuit chip 2120 includes an input optical waveguide 2121 constituting an input port and output optical waveguides 2122 to 2125 constituting output ports, and an optical circuit is configured that includes an optical splitter 2126 that branches the light from the input optical waveguide 2121 to the output optical waveguides 2122 to 2125. The inspection of the optical characteristics of such an optical circuit chip is performed by measuring the output light from the output optical waveguides 2122 to 2125 respectively, but in order to realize a high-speed inspection, it is convenient if a large number of ports can be measured simultaneously in a batch.

[0110] Therefore, the PLC probe 2110 used for inspecting the optical circuit chip 2120 is provided with an optical splitter 2118 that functions as a multiplexer for combining the light propagating through the output-side optical waveguides 2112 to 2115 and outputting it to a single output optical waveguide 2117 in a configuration where the optical waveguides 2111 to 2115 constituting the optical waveguide array are one input-side optical waveguide 2111 and four output-side optical waveguides 2112 to 2115, according to the optical circuit chip to be inspected.

[0111] With the PLC probe 2110, it becomes possible to collectively inspect the output light from the four output optical waveguides 2122 to 2125 of the optical circuit chip 2120 through the output optical waveguide 2117. For example, when performing a loss inspection collectively, if an increase in loss is detected, it can be determined that there is a defect in one of the output optical waveguides 2122 to 2125. Therefore, by performing the inspection using this PLC probe 2110, it becomes possible to perform an inspection equivalent to the characteristic inspection for each channel at a higher speed. In the above example, the number of output optical waveguides of the optical circuit chip and the number of output-side optical waveguides of the corresponding PLC probe are both four, but inspections can be performed similarly even if they are more or less than that.

[0112] (Modification Example 2) Next, with reference to FIG. 22, another example of a PLC probe 2210 to which an optical splitter is applied will be described. In the PLC probe to which the optical splitter described in FIG. 21 is applied, it is also possible to apply a thermo-optic switch (TO switch) to the optical splitter portion. Here, although detailed drawings are omitted, the 1×4 TO switch 2220 is composed of, for example, two stages of 1×2 optical switches, and it is possible to branch light into 1×4 like an optical splitter, or to set it to allow only the light from an arbitrary optical waveguide among 2112 to 2115 to pass through and block the light from the remaining three ports.

[0113] By switching the TO switch, the output light from the four output optical waveguides 2122 to 2125 of the optical circuit chip 2120 is collectively inspected by the output optical waveguide 2117. When it is detected that there is a defect in any of them, it is possible to inspect each of the output optical waveguides 2122 to 2125.

[0114] Also in FIG. 22, in order to simplify and facilitate understanding in the same manner as in FIG. 21, the XZ plane of the PLC probe is developed into the XY plane. Also in FIG. 22, the description of the optical waveguides constituting the alignment ports of the LC probe and the optical circuit chip is omitted as in FIG. 21. Since the components in FIG. 22 with the same reference numerals as those in FIG. 21 are the same as those in FIG. 21, the description here is omitted.

[0115] In the PLC probe 2210 of FIG. 22, a TO switch 2220 is formed at the portion of the optical splitter 2118. The TO switch 2220 is formed with a common electrode 2231 commonly connected to all the switches constituting the TO switch and individual electrodes 2232 to 2234 connected to each switch. Drive wirings mounted on a jig 2230 or the like to which the PLC probe 2210 of the inspection device is attached are connected to each electrode.

[0116] The TO switch 2220 can not only connect the output side optical waveguides 2112 to 2113 to the output optical waveguide 2117 one by one, but also connect them collectively or in plural. Therefore, as described above, by using the PLC probe 2210, it is possible to perform not only a collective inspection of a plurality of channels but also an individual inspection for each channel.

[0117] (Inventive Example 3) Instead of forming a TO switch in the optical splitter section, gate circuits may be provided in the output-side optical waveguides 2112 to 2115 of the PLC provider, respectively. This gate circuit can be configured using, for example, a TO switch. By using the gate circuit, after it is determined that there is a defect in any of the output optical waveguides 2122 to 2125 as a result of collectively inspecting the optical characteristics of the four output optical waveguides of the optical circuit chip, the gate circuit can be controlled to individually perform inspections on each of the output optical waveguides 2122 to 2125.

[0118] Also in FIG. 23, similar to FIG. 20, for the sake of simplifying the figure and facilitating understanding, the XZ plane of the PLC provider is expanded to the XY plane. Therefore, actually, the plane on which the optical waveguide, which is the main surface of the PLC provider, is formed is arranged perpendicular to the XY plane as shown in FIG. 1. The same applies to the fact that optical waveguides forming alignment ports are formed in the PLC provider and the optical circuit chip, respectively.

[0119] In the PLC provider 2310 of FIG. 23, gate switches 2322 to 2325 are formed in the output-side optical waveguides 2112 to 2115, respectively. Each of the gate switches 2322 to 2325 is formed with a common electrode 2331 and each electrode 2332 to 2335, and drive wiring mounted on a jig 2330 or the like to which the PLC provider 2310 of the inspection device is attached is connected to each electrode. By using the PLC provider 2310, it is possible to perform not only a collective inspection of a plurality of channels but also an individual inspection for each channel, similar to that described in FIG. 22.

[0120] (Device Example 4) Next, consider the case where a plurality of interferometric modulators are included in the optical circuit chip to be inspected. The interferometric modulator uses the thermo-optical effect or the electro-optical effect to adjust the phase of the interferometer constituting the modulator. In the inspection of such an interferometric modulator, by sweeping power and voltage to each modulator and monitoring the optical output, the drive waveform shown in FIG. 24(b) is drawn, and the P π 、V π, V bias Optical property inspections such as obtaining

[0121] The waveform in Fig. 24(b) is an example of the drive waveform of the TO shifter for phase adjustment of the modulator. For such measurements to obtain drive conditions corresponding to P π and the maximum light intensity, unlike measurements that can be completed in a short time under only one drive condition such as normal optical loss and resistance, for example, it is necessary to perform several hundred measurements while changing the heater power. Therefore, in the inspection to obtain such a drive waveform, the optical property inspection time of the modulator becomes long for each time. Thus, it has taken a considerable amount of time to obtain the drive waveform one by one for each modulator of the optical circuit chip that is the inspection target, that is, for each channel (1ch).

[0122] In such an inspection, in order to shorten the inspection time, it is desirable to simultaneously drive a plurality of modulators included in the optical circuit chip to obtain the drive waveform. In this inventive example, it is characterized in that the drive electrodes of a plurality of modulators included in the optical circuit chip are short-circuited only during the inspection so that they can be inspected while being simultaneously driven.

[0123] Referring to Fig. 24, an inventive example for shortening the inspection time will be described. Also in Fig. 24, similar to Fig. 21 etc., for the sake of simplifying the figure and facilitating understanding, the XZ plane of the PLC probe is developed into the XY plane. Therefore, actually, the plane on which the optical waveguide, which is the main surface of the PLC probe, is formed is arranged perpendicular to the XY plane as shown in Fig. 1. Also in Fig. 24, similar to Fig. 21, the description of the optical waveguides constituting the alignment ports of the PLC probe and the optical circuit chip is omitted. Since the parts with the same reference numerals as in Fig. 21 in Fig. 24 are the same as those in Fig. 21, the description here is omitted.

[0124] The optical circuit chip 2420 to be inspected is a 1-input × 4-output circuit. Similar to the optical circuit chip described in FIG. 21, it includes an input optical waveguide 2121 that constitutes an input port, and output optical waveguides 2122 to 2125 that constitute output ports. An optical circuit is configured that includes an optical splitter 2126 that branches the light from the input optical waveguide 2121 to each of the output optical waveguides 2122 to 2125. In FIG. 24, modulators 2431 to 2434 are respectively formed in the output optical waveguides 2122 to 2125. Electrodes 2441 to 2444 for inputting a modulation signal and an electrode 2445 are respectively connected to each of the modulators 2431 to 2434. The electrodes 2441 to 2444 and the electrode 2445 are formed to extend into the region of the adjacent optical circuit chip 2450 formed adjacent on the wafer, and the electrodes 2441 to 2444 are short-circuited by the electrode 2451.

[0125] The PLC probe 2410 used for inspecting this optical circuit chip 2320 is configured to include optical waveguides 2411 to 2415 that constitute an optical waveguide array, with one input-side optical waveguide 2411 and four output-side optical waveguides 2412 to 2415, in accordance with the optical circuit chip to be inspected. Note that the PLC probe 2410 may be configured to include a 4-output × 1-input optical splitter that functions as a multiplexer for multiplexing the light propagating through the output-side optical waveguides 2412 to 2415 and outputting it to a single output optical waveguide, similar to the PLC probe 2110 in FIG. 21. Also, the PLC probe 2210 in FIG. 22 or the PLC probe 2310 in FIG. 23 may be used.

[0126] Next, the procedure for inspecting the optical circuit chip 2420 of this inventive example will be described taking 1ch as an example. For example, although not shown in the figure, modulator 2431 is provided with a Mach-Zehnder interference system and an electrode for changing its phase by voltage or power. Using electrode 2445 as the ground electrode, by applying and changing power or voltage to electrode 2451, the optical output from the modulator changes like a drive waveform.

[0127] As described above, obtaining such a drive waveform is necessary for determining the bias point, which is the reference potential for applying a high-speed signal when actually driving the modulator at high speed. And since many measurement points are required to obtain this drive waveform, by driving four modulators together and simultaneously monitoring the optical output waveforms of 4 channels, the time can be reduced to 1 / 4 compared to the case of driving and inspecting each modulator one by one. Measurements such as resistance and optical loss for each individual channel are to be performed for each channel, but this process does not take much time as described above.

[0128] The electrodes 2451 used for inspecting the optical circuit chip 2420 are formed in the region of the adjacent chip 2450, so they will be cut when chip formation is done. Thus, the electrodes 2441 to 2444 can be used as independent electrodes. Also, as described in the inventive example 5 to be mentioned later, multi-chip circuits can also be measured all together in the same way for all channels.

[0129] Even when the electrodes of each modulator are independent, it is also possible to bring electrical signal input probes into contact with each of the four electrodes and short-circuit each electrode on the measurement device side to perform simultaneous driving. However, in that case, the number of probes required is five, and compared to the case of probing at two locations as described above, it is necessary to use an expensive probe device for electrical signal input. For example, in order to simultaneously measure four optical circuit chips configured with a 1-input × 8-output optical circuit, it is necessary to simultaneously probe 33 electrodes. However, as in this inventive example, by short-circuiting the electrodes of each modulator, the number of probes required for inspection is two, so cost reduction of the probe device for electrical signal input can be achieved.

[0130] (Inventive Example 5) Next, with reference to Fig. 25, the fifth inventive example will be described. If it is possible to inspect a plurality of optical circuit chips collectively with a single PLC probe, the alignment process of the PLC probe can be reduced, and the inspection time can be further shortened. Fig. 25 shows an example in which four optical circuit chips each having a 1-input × 4-output optical circuit are aligned collectively by a single PLC probe to enable optical characteristic inspection.

[0131] In Fig. 25, similar to Fig. 21, for simplicity and easy understanding of the figure, the XZ plane of the PLC probe is developed into the XY plane. Therefore, actually, the plane on which the optical waveguide, which is the main surface of the PLC probe, is formed is arranged perpendicular to the XY plane as shown in Figs. 1 and 2.

[0132] The PLC probe 2510 includes a plurality of optical waveguide arrays 25111 to 25114 corresponding to the optical waveguides constituting the input / output ports of a plurality of optical circuit chips 25201 to 25204. The optical waveguide array 25111 includes an input-side optical waveguide 2512 and output-side optical waveguides 2513 to 2516.

[0133] Although reference numerals are omitted in the figure, the same applies to the optical waveguide arrays 25112 to 25114. Also, a pair of optical waveguides 2517 and 2518 constituting the alignment ports are formed on the end side of the PLC probe.

[0134] In this inventive example, the output-side optical waveguides 2513 to 2516 of each optical waveguide array are respectively coupled to output optical waveguides 25311 to 25314 via thermo-optical switches (TO switches) 25411 to 25414. Further, each of the output optical waveguides 25311 to 25314 is coupled to an optical waveguide 2532 constituting the output port of the PLC probe via a TO switch 2542.

[0135] The optical waveguide 2533 serving as the input port of the PLC probe is branched via the TO switch 2543 to the input-side optical waveguides 2512 of the respective optical waveguide arrays 25211 to 24214. Further, a pair of optical waveguides 2527 and 2528 constituting the alignment port are connected via the TO switch 2544 to the optical waveguide 2534 constituting the alignment port of the PLC probe.

[0136] The optical circuit chips 25201 to 25204 to be inspected are formed adjacent to each other on the wafer, and each optical circuit chip has a 1-input × 4-output optical circuit formed therein. Similar to the optical circuit chip 2120 in FIG. 21, each of the optical circuit chips 25201 to 25204 includes one input optical waveguide and four output optical waveguides branched therefrom. However, the numbers of the input optical waveguide and the output optical waveguides here are merely examples, and those having other numbers may be used.

[0137] A pair of alignment optical waveguides 2521 and 2522 corresponding to the pair of optical waveguides 2517 and 2518 constituting the alignment port of the PLC probe are formed in the optical circuit chips 25201 and 25204. Similar to the optical circuit chips in FIG. 21, the pair of optical waveguides 2521 and 2522 constituting the alignment port may be provided in each of the optical circuit chips 25201 to 25204.

[0138] Next, the procedure of the optical characteristic inspection method using the PLC probe 2510 of this inventive example will be described. First, similar to the optical characteristic inspection method of the first embodiment, the PLC probe 2510 is set at a predetermined position above the etching groove including the connection end face of the optical circuit chip to be inspected. Then, as the first step, colored light is input to the optical waveguides 2517 and 2518 constituting the alignment port of the PLC probe 2510, and position adjustment in the X-axis direction, Y-axis direction, and Z-axis direction of the PLC probe is performed to execute rough alignment of the relative position between the PLC probe and the alignment port of the optical circuit chip.

[0139] When the rough alignment by the first process is completed, next, as the second process, while measuring the input optical intensity input from the alignment port of the PLC probe to the alignment port of the optical circuit chip, active alignment is performed to adjust the positions of the PLC probe in the X-axis direction, Y-axis direction, and Z-axis direction. Then, at the stage where the alignment is completed, as the third process, an optical characteristic inspection of the optical circuit chip is performed using the aligned PLC probe.

[0140] In this inventive example, in the third process, an optical characteristic inspection is performed for four optical circuit chips 25201 to 25204. Thus, in this inventive example, by using the PLC probe 2510 to perform the optical characteristic inspection of four optical circuit chips in one alignment process, the alignment process can be reduced as compared to the case of performing the optical characteristic inspection of each optical circuit chip one by one, so that the inspection time can be further shortened.

[0141] According to the PLC probe 2510 of this inventive example, since it is provided with TO switches 25411 to 25414, as described with reference to FIG. 22, by switching the TO switch 2541, the output light from the four output optical waveguides of the optical circuit chip 2520 is collectively inspected by the output optical waveguide, and when it is detected that there is a defect in any of them, it is possible to inspect each output optical waveguide.

[0142] Also, the TO switch 2542 is configured to be able to output the light from each of the output optical waveguides 25311 to 25314 to the output port collectively or individually. And the TO switch 2543 can output the light from the input port to each of the input-side optical waveguides 2512 collectively or individually, so that it is possible to perform the optical characteristic inspection of the optical circuit chip collectively or sequentially one by one. Thus, by using the PLC probe 2510, it becomes possible to perform a more efficient optical characteristic inspection.

[0143] Since the PLC probe is manufactured by photolithography, the accuracy of the optical waveguide array spacing and the like is as high as the sub-micron order. The characteristic variation between arrays is smaller than that of the grating coupler, and the characteristics of the PLC probe can be utilized.

[0144] Since the TO switch can freely set branching and selection for any port, in the PLC probe 2510, for example, loss measurements for 16 channels of 4 optical circuit chips can be collectively performed with 1 input and 1 output. As a result, when the loss values deviate, individual measurements for each chip and each channel of each chip can be performed by switching the TO switch.

Industrial Applicability

[0145] The present invention can realize an optical characteristic inspection method that facilitates adjustment by improving the visibility of the optical waveguide constituting the alignment port of the PLC probe in the rough alignment of the PLC probe and the optical circuit chip in the optical characteristic inspection of the optical circuit chip in the wafer state using the PLC probe.

Explanation of Signs

[0146] 100 ··· Wafer 110, 320, 1120, 1220, 1320, 1420, 1520, 1620, 1650, 1740, 2120, 2420, 2520 ··· Optical circuit chip 121, 122, 330 ··· Etching groove 130, 310, 810, 1010, 1110, 1610, 1710, 1810, 2110, 2210, 2310, 2410, 2510 ··· PLC probe 311 ··· Main surface of the PLC probe 321, 1621, 1651, 1741 ··· Connection end face 341 ··· Tip end face of the PLC probe 601 ··· Colored light (red light) 811 ··· Substrate of the PLC probe 1013 ··· Stopper portion 1113 ··· Binary lens 1221, 1222, 1223, 1224 ··· Etching pattern 1321, 1322, 1323, 1324 ···Dummy optical waveguide pattern 1421, 1422, 1423, 1424 ··· PD 1425, 1426, 1427 ········· PD 1660 ··· Microscopic reflecting surface 1721, 1722, 1821, 1822 ··· Proximity detection waveguide circuit 1823 ··· AWG up 1824 ··· AWG dn

Claims

1. A method for inspecting the optical characteristics of optical circuit chips in a wafer state using a PLC probe in which the tip is inserted into an etching groove formed in a wafer upper surface having an etching groove serving as a connection end surface of each optical circuit chip and optically coupled to an optical waveguide of the optical circuit chip formed on the connection end surface, wherein a direction parallel to the connection end surface of the optical circuit chip is defined as the X-axis direction, a direction perpendicular to the connection end surface of the optical circuit chip is defined as the Y-axis direction, and the X-axis, Y-axis, and Z-axis are perpendicular to each other, a first step of performing rough alignment for adjusting the relative positions of the PLC probe and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions by inputting colored light into an optical waveguide constituting an alignment port of the PLC probe, a second step of performing active alignment for adjusting the relative positions of the alignment ports of the PLC probe and the optical circuit chip in the X-axis, Y-axis, and Z-axis directions while measuring the intensity of light input from the alignment port of the PLC probe to the alignment port of the optical circuit chip, and a third step of inspecting the optical characteristics of the optical circuit chip, the method for inspecting the optical characteristics of an optical circuit chip including these steps.

2. The PLC probe includes a quartz glass substrate and an optical waveguide constituting the alignment port formed on the quartz glass substrate, and the colored light input into the optical waveguide constituting the alignment port in the first step is observable from the quartz glass substrate side. The method for inspecting the optical characteristics of an optical circuit chip according to claim 1.

3. A stopper is formed in an overclad layer at the tip of the PLC probe, and in the first step, the adjustment in the Z-axis direction is performed by bringing the stopper into contact with the upper surface of the optical circuit chip. The method for inspecting the optical characteristics of an optical circuit chip according to claim 1.

4. At least one etching pattern is formed in the vicinity of an optical waveguide constituting an alignment port of the optical circuit chip, and in the first step, the colored light input into the optical waveguide constituting the alignment port is observed using the etching pattern. The method for inspecting the optical characteristics of an optical circuit chip according to claim 1.

5. The optical axis of the light emitted from the tip of the PLC probe and the optical axis of the optical waveguide formed on the connection end face of the optical circuit chip are inclined at the same inclination angle with respect to the connection end face. A minute reflecting surface perpendicular to the optical axis of the optical waveguide is formed in the waveguide formation layer of the optical circuit chip. In the first step, rough alignment in the X-axis direction and the Y-axis direction is performed by detecting the reflected light returning from the minute reflecting surface to the optical waveguide constituting the alignment port of the PLC probe. The method for inspecting the optical characteristics of an optical circuit chip according to claim 1, characterized in that.

6. The method for inspecting the optical characteristics of an optical circuit chip according to claim 1, characterized in that the PLC probe includes a proximity detection waveguide circuit, and adjustment in the Y-axis direction is performed using the proximity detection waveguide circuit in the first step.

7. The method for inspecting the optical characteristics of an optical circuit chip according to claim 6, characterized in that the proximity detection waveguide circuit is composed of an optical waveguide whose optical axis is inclined at a predetermined angle with respect to the tip face of the PLC probe and at least one optical waveguide formed symmetrically with respect to the optical waveguide with a predetermined distance interval therebetween.

8. The proximity detection waveguide circuit includes a pair of arrayed waveguide grating AWGs up and AWGs dn configured thereby the said AWG up and the said AWG dn are the AWG up and the AWG dnn each have one slab waveguide in contact with the tip of the PLC probe, the AWG up the one slab waveguide with which the tip of the AWG is in contact and the AWG up the center point P of the connection point between the array waveguide of the AWG up the light emitted from P is bent at the tip according to Snell's law, reflected at the connection end face of the optical circuit chip at a distance D from the tip, bent again at the tip, and the array waveguide of the AWG i is arranged so as to obtain an optical path leading to the center point P of the connection point between the slab waveguide with which the tip is in contact dn and the array waveguide of the AWG dnn ​ When the distance is the said D i AWG up P up is designed such that the direction (diffraction angle) in which light of a specific wavelength λ i emitted from P up travels becomes the said optical path When the distance is also the same as that of D i the AWG dn at P dn the specific wavelength λ i is guided to, the direction (diffraction angle) in which the light travels is the optical path, and the AWG dn is designed. The method for inspecting the optical characteristics of the optical circuit chip according to claim 6, characterized in that.

9. The method for inspecting the optical characteristics of an optical circuit chip according to claim 6, characterized in that the proximity detection waveguide circuit is an optical waveguide configured to operate as an etalon filter.

10. The PLC probe includes a plurality of output-side optical waveguides corresponding to a plurality of optical waveguides constituting the output port of the optical circuit chip, and a branching circuit that couples the plurality of output-side optical waveguides to one optical waveguide constituting the output port of the PLC probe. The method for inspecting the optical characteristics of an optical circuit chip according to claim 1, characterized in that in the third step, the optical characteristics of the plurality of optical waveguides of the optical circuit chip are inspected collectively.

11. An optical circuit chip for applying the optical characteristic inspection method of claim 1, The optical circuit chip includes a substrate and a waveguide formation layer formed on the substrate, and includes a plurality of optical waveguides constituting an alignment port, an output port, and an input port in the waveguide formation layer of the connection end face. The optical axes of the plurality of optical waveguides are inclined at a predetermined inclination angle with respect to the connection end face. An optical circuit chip, characterized in that a minute reflecting surface perpendicular to the optical axis of the optical waveguide is formed in the waveguide formation layer of the connection end face.

Images