Semiconductor device

Abstract

To provide a semiconductor device with reduced consumption power.SOLUTION: A semiconductor device includes a differential circuit and a latch circuit. The differential circuit includes a transistor including an oxide semiconductor in a channel formation region. The latch circuit includes a transistor including a single semiconductor or a compound semiconductor in the channel formation region. The differential circuit and the latch circuit include an overlapping region.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device.

[0002] The technical field of the invention disclosed in this specification etc. relates to an article, a method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter.

[0003] More specifically, as the technical field of one aspect of the present invention disclosed in this specification, semiconductor devices, display devices, liquid crystal display devices, light emitting devices, power storage devices, imaging devices, storage devices, signal processing devices, processors, electronic devices, systems, their driving methods, their manufacturing methods, or their inspection methods can be cited as examples. Note that one aspect of the present invention is not limited to the above technical fields.

Background Art

[0004] A comparator that outputs the comparison result of two analog signals or one analog signal and a reference signal as High or Low binary data is known. As comparators, continuous comparators and synchronous (dynamic) comparators are known. In a continuous comparator, current flows even during the standby period. A synchronous comparator operates while switching between a precharge period and an evaluation period, and current flows only when necessary. Therefore, a synchronous comparator consumes less power than a continuous comparator.

[0005] Also, a comparator is also used in an analog-to-digital conversion circuit (ADC: Analog-to-Digital Converter) that converts analog information (also referred to as an "analog signal") into digital information (also referred to as a "digital signal").

[0006] Semiconductor devices such as comparators are fabricated using a single semiconductor mainly composed of one element such as Si (silicon), or a compound semiconductor mainly composed of a plurality of elements such as Ga (gallium) and As (arsenic). Furthermore, in recent years, an oxide semiconductor, which is a type of metal oxide, has attracted attention.

[0007] In oxide semiconductors, CAAC (c-axis aligned crystalline) structures and nc (nanocrystalline) structures that are neither single crystals nor amorphous have been found (see Non-Patent Document 1 and Non-Patent Document 2).

[0008] Non-Patent Document 1 and Non-Patent Document 2 disclose techniques for fabricating transistors using an oxide semiconductor having a CAAC structure.

Prior Art Documents

Non-Patent Documents

[0009]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0010] There is a demand for further reduction in power consumption in semiconductor devices such as comparators. In Si processes, leakage current tends to increase due to miniaturization, making it difficult to reduce power consumption. Also, an increase in leakage current is likely to cause a problem that the holding period of input data becomes short. Further, when the power supply voltage becomes small due to miniaturization, it is necessary to reduce the amplitude of the signal input to the semiconductor device. When the amplitude of the input voltage is small, it leads to a decrease in the resolution of an ADC using a comparator.

[0011] One aspect of the present invention is to provide a semiconductor device with reduced power consumption or the like. Or, one aspect of the present invention is to provide a semiconductor device with good reliability or the like. Or, one aspect of the present invention is to provide a semiconductor device with reduced occupied area or the like. Or, one aspect of the present invention is to provide a novel semiconductor device or the like.

[0012] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc.

Means for Solving the Problems

[0013] One aspect of the present invention has a differential circuit and a latch circuit. The differential circuit has a transistor including an oxide semiconductor in a channel formation region, and the latch circuit has a transistor including a single semiconductor or a compound semiconductor in a channel formation region. The differential circuit and the latch circuit are semiconductor devices having regions overlapping with each other.

[0014] Also, another aspect of the present invention has a differential circuit and a latch circuit. The differential circuit has first to fifth transistors, and the latch circuit has sixth to twelfth transistors. Each of the first to fifth transistors includes an oxide semiconductor in a channel formation region, and each of the sixth to twelfth transistors includes a single semiconductor or a compound semiconductor in a channel formation region.

[0015] Another aspect of the present invention has a differential circuit and a latch circuit. The differential circuit has first to fifth transistors, and the latch circuit has sixth to twelfth transistors. Each of the first to fifth transistors, the eleventh transistor, and the twelfth transistor includes an oxide semiconductor in a channel formation region, and each of the sixth to tenth transistors includes a single semiconductor or a compound semiconductor in a channel formation region. This is a semiconductor device.

[0016] Also, for example, one of the source or drain of the first transistor is electrically connected to the first terminal, and the other of the source or drain of the first transistor is electrically connected to one of the source or drain of the third transistor. One of the source or drain of the second transistor is electrically connected to the first terminal, and the other of the source or drain of the second transistor is electrically connected to one of the source or drain of the fourth transistor. The other of the source or drain of the third transistor and the other of the source or drain of the fourth transistor are electrically connected to one of the source or drain of the fifth transistor. The gates of the first transistor and the second transistor are electrically connected to the second terminal, the gate of the third transistor is electrically connected to the third terminal, the gate of the fourth transistor is electrically connected to the fourth terminal, the gate of the fifth transistor is electrically connected to the fifth terminal, and the other of the source or drain of the fifth transistor may be electrically connected to the sixth terminal.

[0017] Also, for example, one of the source or drain of the sixth transistor is electrically connected to the seventh terminal, the other of the source or drain of the sixth transistor is electrically connected to one of the source or drain of the seventh transistor, the other of the source or drain of the seventh transistor is electrically connected to one of the source or drain of the ninth transistor, one of the source or drain of the eighth transistor is electrically connected to the other of the source or drain of the sixth transistor, the gate of the sixth transistor is electrically connected to the eighth terminal, the other of the source or drain of the eighth transistor is electrically connected to one of the source or drain of the tenth transistor, the gates of the seventh transistor and the ninth transistor are each electrically connected to one of the source or drain of the tenth transistor, the gates of the eighth transistor and the tenth transistor are each electrically connected to one of the source or drain of the ninth transistor, one of the source or drain of the eleventh transistor is electrically connected to the ninth terminal and one of the source or drain of the ninth transistor, one of the source or drain of the twelfth transistor is electrically connected to the tenth terminal and one of the source or drain of the tenth transistor, the other of the source or drain of each of the ninth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor is electrically connected to the eleventh terminal, the gate of the eleventh transistor may be electrically connected to one of the source or drain of the third transistor, and the gate of the twelfth transistor may be electrically connected to one of the source or drain of the fourth transistor.

[0018] The oxide semiconductor preferably contains at least one of indium or zinc. Examples of the single semiconductor include silicon. Examples of the compound semiconductor include gallium nitride.

Advantages of the Invention

[0019] According to one aspect of the present invention, it is possible to provide a semiconductor device with reduced power consumption or the like. Or, it is possible to provide a semiconductor device with good reliability or the like. Or, it is possible to provide a semiconductor device with a reduced occupied area or the like. Or, it is possible to provide a novel semiconductor device or the like.

[0020] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0021]

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DETAILED DESCRIPTION OF THE INVENTION

[0022] Hereinafter, embodiments of the present invention will be described. However, one embodiment of the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, one embodiment of the present invention is not to be construed as being limited to the description of the embodiments shown below.

[0023] In this specification and the like, a semiconductor device refers to a device that utilizes semiconductor characteristics, including circuits containing semiconductor elements (such as transistors, diodes, photodiodes, etc.), devices having such circuits, and the like. It also refers to all things that can function by utilizing semiconductor characteristics. For example, integrated circuits, chips equipped with integrated circuits, and electronic components that house chips in packages are examples of semiconductor devices. In addition, storage devices, display devices, light-emitting devices, lighting devices, electro-optical devices, communication devices, and electronic equipment, etc., are themselves semiconductor devices and may have semiconductor devices.

[0024] Also, in this specification and the like, when it is described that X and Y are connected, it is assumed that X and Y are electrically connected, X and Y are functionally connected, and X and Y are directly connected, as disclosed in this specification and the like. Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in a figure or text, and those other than the connection relationship shown in the figure or text are also considered to be disclosed in the figure or text. It is assumed that X and Y are objects (such as devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0025] As an example of the case where X and Y are electrically connected, one or more elements (such as switches, transistors, capacitor elements, inductors, resistor elements, diodes, display devices, light-emitting devices, loads, etc.) that enable electrical connection between X and Y can be connected between X and Y. Note that the switch has its on state and off state controlled. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state) and has a function of controlling whether to allow current to flow or not.

[0026] As an example of the case where X and Y are functionally connected, one or more circuits that enable the functional connection between X and Y (for example, logic circuits (such as inverters, NAND circuits, NOR circuits, etc.), signal conversion circuits (such as digital - analog conversion circuits, analog - digital conversion circuits, gamma correction circuits, etc.), potential - level conversion circuits (such as power supply circuits (boost circuits, buck circuits, etc.), level - shifter circuits that change the potential level of signals, etc.), voltage sources, current sources, switching circuits, amplification circuits (circuits that can increase signal amplitude or current amount, operational amplifiers, differential amplification circuits, source - follower circuits, buffer circuits, etc.), signal generation circuits, memory circuits, control circuits, etc.) can be connected between X and Y. Note that, as an example, even if another circuit is interposed between X and Y, if the signal output from X is transmitted to Y, X and Y are considered to be functionally connected.

[0027] Also, for example, it can be expressed as "X, Y, the source (or the first terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, and Y." Or, it can be expressed as "The source (or the first terminal, etc.) of the transistor is electrically connected to X, the drain (or the second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, and Y are electrically connected in this order." Or, it can be expressed as "X is electrically connected to Y via the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor, and X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, and Y are provided in this connection order." By using an expression method similar to these examples to define the connection order in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. Note that these expression methods are just examples and are not limited to these expression methods. Here, X and Y are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0028] Note that even when components that are independent on the circuit diagram are shown as being electrically connected, one component may have the functions of multiple components combined. For example, when a part of the wiring also functions as an electrode, one conductive film has the functions of both the wiring component and the electrode component combined. Therefore, the electrically connected in this specification includes such cases where one conductive film has the functions of multiple components combined within its scope.

[0029] In addition, in this specification and the like, the "resistive element" can be, for example, a circuit element, wiring, etc. having a resistance value higher than 0 Ω. Therefore, in this specification and the like, the "resistive element" includes wiring having a resistance value, a transistor through which current flows between the source and the drain, a diode, an inductor, etc. Therefore, the term "resistive element" can be replaced with terms such as "resistance", "load", "region having a resistance value", and conversely, the terms "resistance", "load", "region having a resistance value" can be replaced with terms such as "resistive element". As the resistance value, for example, it can be preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more and 5 Ω or less, and still more preferably 10 mΩ or more and 1 Ω or less. Also, for example, it can be 1 Ω or more and 1×10 9 Ω or less.

[0030] In addition, in this specification and the like, the "capacitive element" can be, for example, a circuit element having a capacitance value higher than 0 F, a region of wiring having a capacitance value higher than 0 F, parasitic capacitance, the gate capacitance of a transistor, etc. Therefore, in this specification and the like, the "capacitive element" includes not only a circuit element including a pair of electrodes and a dielectric contained between the electrodes, but also parasitic capacitance generated between wirings, gate capacitance generated between one of the source or drain of a transistor and the gate, etc. Also, terms such as "capacitive element", "parasitic capacitance", "gate capacitance" can be replaced with terms such as "capacitance", and conversely, the term "capacitance" can be replaced with terms such as "capacitive element", "parasitic capacitance", "gate capacitance". Also, the term "pair of electrodes" of "capacitance" can be replaced with "pair of conductors", "pair of conductive regions", "pair of regions", etc. Note that as the capacitance value, for example, it can be 0.05 fF or more and 10 pF or less. Also, for example, it can be 1 pF or more and 10 μF or less.

[0031] Also, in this specification and the like, a transistor has three terminals called a gate, a source, and a drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as the source or the drain are the input / output terminals of the transistor. Depending on the conductivity type of the transistor (n-channel type, p-channel type) and the levels of the potentials applied to the three terminals of the transistor, one of the two input / output terminals becomes the source and the other becomes the drain. Therefore, in this specification and the like, the terms source and drain are assumed to be interchangeable with each other. Further, in this specification and the like, when explaining the connection relationship of a transistor, the notations "one of the source or the drain" (or the first electrode, or the first terminal), "the other of the source or the drain" (or the second electrode, or the second terminal) may be used. Note that depending on the structure of the transistor, in addition to the three terminals described above, it may have a back gate. In this case, in this specification and the like, one of the gate or the back gate of the transistor may be referred to as the first gate, and the other of the gate or the back gate of the transistor may be referred to as the second gate. Furthermore, in the same transistor, the terms "gate" and "back gate" may be interchangeable with each other. Also, when a transistor has three or more gates, in this specification and the like, each gate may be referred to as the first gate, the second gate, the third gate, and so on.

[0032] Also, in this specification and the like, the "on state" of a transistor refers to a state in which the source and the drain of the transistor can be regarded as being electrically short-circuited (also referred to as the "conductive state"). The "off state" of a transistor refers to a state in which the source and the drain of the transistor can be regarded as being electrically disconnected (also referred to as the "non-conductive state").

[0033] Also, in this specification and the like, the "on current" may refer to the current flowing between the source and the drain when the transistor is in the on state. The "off current" may refer to the current flowing between the source and the drain when the transistor is in the off state.

[0034] In addition, in this specification and the like, "node" can be rephrased as a terminal, wiring, electrode, conductive layer, conductor, impurity region, etc., according to the circuit configuration or device structure. Further, it is possible to rephrase a terminal, wiring, etc. as a node.

[0035] In addition, in this specification and the like, "voltage" and "electric potential" can be rephrased as appropriate. "Voltage" is the potential difference from a reference potential. For example, when the reference potential is the ground potential (earth potential), "voltage" can be rephrased as "electric potential". Note that the ground potential does not necessarily mean 0V. Also, the electric potential is relative, and when the reference potential changes, the potential applied to the wiring, the potential applied to a circuit, etc., and the potential output from a circuit, etc. also change.

[0036] In addition, in this specification and the like, the high power supply potential VDD (hereinafter, also simply referred to as "VDD") indicates a power supply potential having a potential higher than the low power supply potential VSS (hereinafter, also simply referred to as "VSS"). Also, VSS indicates a power supply potential having a potential lower than VDD. Also, the ground potential (hereinafter, also simply referred to as "GND") can be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential, and when VSS is the ground potential, VDD is a potential higher than the ground potential. Also, the potential difference between VDD and VSS is also referred to as the power supply voltage.

[0037] "Current" refers to the phenomenon of charge movement (electrical conduction). For example, the description "electrical conduction of a positive charge carrier is occurring" can be equivalently stated as "electrical conduction of a negative charge carrier is occurring in the opposite direction." Therefore, in this specification and the like, unless otherwise specified, "current" shall refer to the phenomenon of charge movement (electrical conduction) associated with the movement of carriers. Here, carriers include electrons, holes, anions, cations, complex ions, etc., and the carriers vary depending on the system through which the current flows (e.g., semiconductors, metals, electrolytes, vacuum, etc.). Also, the "direction of current" in wiring, etc., is taken as the direction in which positive carriers move, and is described in terms of the amount of positive current. In other words, the direction in which negative carriers move is the opposite of the direction of current and is expressed in terms of the amount of negative current. Therefore, in this specification and the like, when there is no indication regarding the positive or negative of the current (or the direction of the current), descriptions such as "a current flows from element A to element B" can be equivalently stated as "a current flows from element B to element A," etc. Also, descriptions such as "a current is input to element A" can be equivalently stated as "a current is output from element A," etc.

[0038] Also, in this specification and the like, ordinal numbers such as "first," "second," and "third" are attached to avoid confusion of components. Therefore, they do not limit the number or order of components. For example, in one of the embodiments of this specification and the like, the component referred to as "first" may be the component referred to as "second" in other embodiments or in the claims. Also, for example, the component referred to as "first" in one of the embodiments of this specification and the like may be omitted in other embodiments or in the claims.

[0039] Also, the terms "above" and "below" do not limit the positional relationship of components to be directly above or directly below and in direct contact. For example, in the expression "electrode B above insulating layer A," it is not necessary for electrode B to be formed directly in contact on insulating layer A, and components other than insulating layer A and electrode B are not excluded.

[0040] In addition, the positional relationship of the components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification or the like, and can be appropriately rephrased according to the situation. For example, in this specification or the like, terms indicating arrangements such as "above" and "below" may be used for convenience in order to explain the positional relationship of the components with reference to the drawings. Thus, in the expression "the insulator located on the upper surface of the conductor", by rotating the orientation of the shown drawing by 180 degrees, it can be rephrased as "the insulator located on the lower surface of the conductor". Also, in the expression "the insulator located on the upper surface of the conductor", by rotating the orientation of the shown drawing by 90 degrees, it can be rephrased as "the insulator located on the left (or right) surface of the conductor".

[0041] Similarly, in this specification or the like, terms such as "overlap" do not limit the state such as the stacking order of the components. For example, in the expression "electrode B overlapping insulating layer A", it is not limited to the state where "electrode B is formed on insulating layer A", and states such as "electrode B is formed under insulating layer A" or "electrode B is formed on the right (or left) side of insulating layer A" are not excluded.

[0042] In addition, in this specification or the like, the terms "adjacent" and "proximate" do not limit that the components are in direct contact. For example, in the expression "electrode B adjacent to insulating layer A", it is not necessary for insulating layer A and electrode B to be formed in direct contact, and those including other components between insulating layer A and electrode B are not excluded.

[0043] In addition, in this specification and the like, terms such as "film" and "layer" can be interchanged with each other depending on the situation. For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating film" may be changed to the term "insulating layer". Or, in some cases, or depending on the situation, it is possible to interchange with another term without using terms such as "film" and "layer". For example, the term "conductive layer" or "conductive film" may be changed to the term "conductor". Or, for example, the terms "insulating layer" and "insulating film" may be changed to the term "insulator".

[0044] Also, in this specification and the like, terms such as "electrode", "wiring", and "terminal" do not functionally limit these components. For example, an "electrode" may be used as part of "wiring", and vice versa. Furthermore, the terms "electrode" or "wiring" also include cases where a plurality of "electrodes" or "wirings" are integrally formed. Also, for example, a "terminal" may be used as part of "wiring" or "electrode", and vice versa. Furthermore, the term "terminal" also includes cases where a plurality of "electrodes", "wirings", "terminals", etc. are integrally formed. Therefore, for example, an "electrode" can be part of "wiring" or "terminal", and, for example, a "terminal" can be part of "wiring" or "electrode". Also, terms such as "electrode", "wiring", "terminal", etc. may be replaced with terms such as "region" in some cases.

[0045] Also, in this specification and the like, terms such as "wiring", "signal line", and "power line" can be interchanged with each other in some cases or depending on the situation. For example, the term "wiring" may be changed to the term "signal line". Also, for example, the term "wiring" may be changed to terms such as "power line". Conversely, terms such as "signal line" and "power line" may be changed to the term "wiring". Terms such as "power line" may be changed to terms such as "signal line". Conversely, terms such as "signal line" may be changed to terms such as "power line". Also, the term "potential" applied to the wiring may be changed to terms such as "signal" in some cases or depending on the situation. Conversely, terms such as "signal" may be changed to the term "potential".

[0046] In this specification and the like, impurities in a semiconductor refer to, for example, components other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic% is an impurity. When impurities are included, for example, the density of defect levels in the semiconductor may increase, the carrier mobility may decrease, or the crystallinity may decrease. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition metals other than the main components, etc. In particular, for example, hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. are included. Also, when the semiconductor is silicon, impurities that change the characteristics of the semiconductor include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0047] Also, unless otherwise specified, the transistors shown in this specification and the like are enhancement-type (normally-off type) n-channel field-effect transistors. Therefore, the threshold voltage (also referred to as "Vth") is greater than 0V.

[0048] In this specification and the like, a switch refers to a device that can be in a conductive state (on state) or a non-conductive state (off state) and has a function of controlling whether or not to allow current to flow. Alternatively, a switch refers to a device that has a function of selecting and switching a path through which current flows. As an example, an electrical switch, a mechanical switch, etc. can be used. That is, the switch only needs to be able to control current and is not limited to a specific type.

[0049] As an example of an electrical switch, there are transistors (e.g., bipolar transistors, MOS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, diode-connected transistors, etc.), or logic circuits combining these. When a transistor is used as a switch, the "conductive state" of the transistor refers to a state in which the source electrode and the drain electrode of the transistor can be regarded as being electrically short-circuited. Also, the "non-conductive state" of the transistor refers to a state in which the source electrode and the drain electrode of the transistor can be regarded as being electrically disconnected. When operating a transistor merely as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0050] As an example of a mechanical switch, there is a switch using MEMS (Micro-Electro-Mechanical Systems) technology. The switch has electrodes that can be mechanically moved, and by moving the electrodes, it controls conduction and non-conduction to operate.

[0051] In this specification, "parallel" refers to a state where two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" or "approximately parallel" refers to a state where two straight lines are arranged at an angle of -30° or more and 30° or less. Also, "perpendicular" refers to a state where two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Also, "substantially perpendicular" or "approximately perpendicular" refers to a state where two straight lines are arranged at an angle of 60° or more and 120° or less.

[0052] In this specification and the like, regarding numerical values and measured values, or regarding things or methods that can be converted into numerical values or measured values, when terms such as "identical", "the same", "equal", or "uniform" are used, unless otherwise specified, they shall include an error of plus or minus 20%.

[0053] In this specification and the like, a metal oxide is an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS), etc. For example, when a metal oxide is used for the active layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when a metal oxide can constitute a channel formation region of a transistor having at least one of an amplification action, a rectification action, and a switching action, the metal oxide can be referred to as a metal oxide semiconductor. Also, when referring to an "OS transistor", it can be paraphrased as a transistor having a metal oxide or an oxide semiconductor.

[0054] Also, in this specification and the like, metal oxides containing nitrogen may also be collectively referred to as metal oxides (metal oxide). Also, a metal oxide containing nitrogen may be referred to as a metal oxynitride.

[0055] In addition, in this specification and the like, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form an aspect of the present invention. Also, when multiple configuration examples are shown within one embodiment, it is possible to appropriately combine the configuration examples with each other.

[0056] Note that the content described in one embodiment (even part of the content) can be applied to, combined with, or replaced with at least one of the content described in another part of the same embodiment (even part of the content) and the content described in one or more other embodiments (even part of the content).

[0057] Note that the content described in the embodiments refers to the content described using various figures in each embodiment (or example) or the content described using the text written in the specification.

[0058] Note that the figure (even part of it) described in one embodiment can be combined with at least one of another part of the figure, another figure (even part of it) described in the same embodiment, and the figure (even part of it) described in one or more other embodiments to form more figures.

[0059] The embodiments described in this specification will be explained with reference to the drawings. However, it is easily understood by those skilled in the art that the embodiments can be implemented in many different ways and that the form and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not to be construed as being limited to the content described in the embodiments. In the configuration of the invention of the embodiments, the same reference numerals are commonly used for the same part or parts having the same or similar functions among different drawings, and the repeated description may be omitted. Also, for ease of understanding the drawings, in perspective views or top views, the description of some components may be omitted.

[0060] In this specification and the like, in the block diagram, components are classified according to their functions and shown as independent blocks. However, in an actual circuit or the like, it is difficult to separate components according to their functions, and there may be cases where a single circuit is related to multiple functions, or where a single function is related to multiple circuits. Therefore, the blocks in the block diagram are not limited to the components described in the specification and can be appropriately rephrased according to the situation.

[0061] Also, in the drawings and the like, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to its size, aspect ratio, etc. Note that the drawings schematically show ideal examples and are not limited to the shapes or values shown in the drawings. For example, it is possible to include variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing deviations.

[0062] Also, in the drawings and the like, in order to make the potentials of wirings and electrodes, etc. easier to understand, "H" indicating the potential H or "L" indicating the potential L may be added adjacent to the wirings and electrodes, etc. Also, for wirings and electrodes, etc. where a potential change has occurred, "H" or "L" may be added in enclosed characters. Also, when a transistor is in the off state, an "×" symbol may be added over the transistor.

[0063] In this specification and the like, when the same reference numerals are used for a plurality of elements, especially when it is necessary to distinguish them, identification symbols such as "_1", "[n]", "[m,n]", "a", etc. may be added to the reference numerals for description. For example, one of the two wirings GL may be described as wiring GL[1] and the other as wiring GL[2], etc.

[0064] (Embodiment 1) A semiconductor device 100 according to one embodiment of the present invention will be described with reference to the drawings.

[0065] <Configuration example of semiconductor device 100> FIG. 1A shows a circuit diagram of a semiconductor device 100 according to an aspect of the present invention. The semiconductor device 100 includes a differential circuit 110 and a latch circuit 120.

[0066] 〔Differential Circuit 110〕 The differential circuit 110 includes transistors 111 to 115. One of the source or drain of transistor 111 is electrically connected to terminal VH1, and the other of the source or drain is electrically connected to one of the source or drain of transistor 113. Also, the gate of transistor 111 is electrically connected to terminal ENB1.

[0067] The other of the source or drain of transistor 113 is electrically connected to one of the source or drain of transistor 115. Also, the gate of transistor 113 is electrically connected to terminal Vin1. The other of the source or drain of transistor 115 is electrically connected to terminal VL1. The gate of transistor 115 is electrically connected to terminal EN1.

[0068] One of the source or drain of transistor 112 is electrically connected to terminal VH1, and the other of the source or drain is electrically connected to one of the source or drain of transistor 114. Also, the gate of transistor 112 is electrically connected to terminal ENB1. The other of the source or drain of transistor 114 is electrically connected to one of the source or drain of transistor 115. Also, the gate of transistor 114 is electrically connected to terminal Vin2.

[0069] The node where the other of the source or drain of transistor 111 and one of the source or drain of transistor 113 are electrically connected functions as node ND11. Also, the node where the other of the source or drain of transistor 112 and one of the source or drain of transistor 114 are electrically connected functions as node ND12.

[0070] In addition, as the transistors 111 to 115, it is preferable to use transistors (also referred to as "OS transistors") including an oxide semiconductor, which is a kind of metal oxide, in the channel formation region. Since the oxide semiconductor has a bandgap of 2 eV or more, the OS transistor has extremely low off-current. As an example, when the voltage between the source and the drain is 3.5 V and at room temperature (25°C), the off-current per 1 μm channel width is less than 1×10 -20 A, less than 1×10 -22 A, or less than 1×10 -24 A. By using the OS transistor for the transistors 111 to 115, the leakage current between the terminal VH1 and the terminal VL1 when the semiconductor device 100 is in the standby state can be made extremely small.

[0071] In addition, the OS transistor has higher heat resistance than a Si transistor (a transistor including silicon in the channel formation region), and it is less likely to cause deterioration of transistor characteristics (such as field-effect mobility) due to temperature rise. By using the OS transistor for the transistors included in the semiconductor device 100, stable operation can be realized even in a high-temperature environment. Also, since the OS transistor has a high breakdown voltage, a higher voltage can be applied than to a Si transistor.

[0072] Oxide semiconductors used for OS transistors include zinc oxide, zinc-tin oxide, gallium-tin oxide, indium-gallium oxide, indium-zinc oxide, indium-M-zinc oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf), etc. In particular, when an oxide semiconductor using Ga as M is adopted for an OS transistor, it is preferable because a transistor excellent in electrical characteristics such as field-effect mobility can be obtained by adjusting the ratio of elements. Further, an oxide containing indium (In) and zinc (Zn) may contain one or more selected from aluminum (Al), gallium (Ga), yttrium (Y), copper (Cu), vanadium (V), beryllium (Be), boron (B), silicon (Si), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), etc.

[0073] The oxide semiconductor has the characteristics of a large bandgap, electrons being difficult to be excited, and a large effective mass of holes. Therefore, an OS transistor may be less likely to cause avalanche breakdown or the like compared with an Si transistor. Accordingly, in an OS transistor, for example, hot carrier degradation caused by avalanche breakdown is suppressed. By being able to suppress hot carrier degradation, the OS transistor can be operated at a high drain voltage.

[0074] The OS transistor is an accumulation-type transistor having electrons as majority carriers. Therefore, DIBL (Drain-Induced Barrier Lowering), which is one of the short-channel effects, is less likely to occur compared with an inversion-type transistor having a pn junction (typically an Si transistor). That is, the OS transistor has higher resistance to the short-channel effect than an Si transistor.

[0075] Since the OS transistor has high resistance to the short-channel effect, the channel length can be reduced without degrading the reliability of the OS transistor. Therefore, the integration degree of the circuit can be increased by using the OS transistor. As the channel length becomes shorter due to miniaturization, the drain electric field becomes stronger. However, as described above, the OS transistor is less likely to cause avalanche breakdown than the Si transistor.

[0076] Also, since the OS transistor has high resistance to the short-channel effect, it is possible to make the gate insulating film thicker than that of the Si transistor. For example, even in a fine transistor with a channel length and a channel width of 50 nm or less, it may be possible to provide a gate insulating film about 10 nm thick. By making the gate insulating film thicker, the parasitic capacitance can be reduced, so that the operating speed of the circuit can be improved. Also, by making the gate insulating film thicker, the leakage current through the gate insulating film is reduced, leading to a reduction in power consumption.

[0077] Note that the oxide semiconductor will be described in detail in Embodiment 3.

[0078] A high power supply potential VDD1 is supplied to the terminal VH1, and a low power supply potential VSS1 is supplied to the terminal VL1. The high power supply potential VDD1 may be the same potential as the high power supply potential VDD2 described later, or may be a different potential. Note that when OS transistors are used for the transistors 111 to 115, the high power supply potential VDD1 can be set to a potential higher than the high power supply potential VDD2.

[0079] A potential H or a potential L is supplied to the terminal EN1. Also, a potential H or a potential L is supplied to the terminal ENB1. Different potentials are supplied to the terminal EN1 and the terminal ENB1. That is, when a potential H is supplied to the terminal EN1, a potential L is supplied to the terminal EN1. Similarly, when a potential L is supplied to the terminal EN1, a potential H is supplied to the terminal EN1.

[0080] Here, the potential H is the potential to turn on the n-channel transistor, and the potential L is the potential to turn off the n-channel transistor. Also, the potential H is the potential to turn off the p-channel transistor, and the potential L is the potential to turn on the p-channel transistor.

[0081] Input signals for comparing the magnitudes of the potentials are supplied to terminal Vin1 and terminal Vin2. Alternatively, a reference potential (potential Vref) may be supplied to either one of terminal Vin1 and terminal Vin2, and an input signal may be supplied to the other. The reference potential and the potential of the input signal use the potential to turn on the transistor. Therefore, the reference potential and the potential of the input signal use a potential greater than the threshold voltages of transistor 113 and transistor 114.

[0082] Note that transistor 111 and transistor 112 preferably have the same electrical characteristics. In particular, it is preferable that the gate voltages when the mutual conductance (gm) is maximized are equal for transistor 111 and transistor 112. For example, it is preferable that the channel lengths of transistor 111 and transistor 112 are the same, and that the channel widths of transistor 111 and transistor 112 are the same. Also, it is preferable that the compositions of the main components of the semiconductor are the same for transistor 111 and transistor 112. Further, it is preferable that the crystallinity of the semiconductor is equal.

[0083] Also, transistor 113 and transistor 114 preferably have the same electrical characteristics. In particular, it is preferable that the gate voltages when gm is maximized are equal for transistor 113 and transistor 114. For example, it is preferable that the channel lengths of transistor 113 and transistor 114 are the same, and that the channel widths of transistor 113 and transistor 114 are the same. Also, it is preferable that the compositions of the main components of the semiconductor are the same for transistor 113 and transistor 114. Further, it is preferable that the crystallinity of the semiconductor is equal.

[0084] 〔Latch circuit 120〕 The latch circuit 120 includes transistors 121 to 127. FIG. 1A shows an example in which p-channel transistors are used for transistors 121 to 123.

[0085] One of the source or drain of transistor 121 is electrically connected to terminal VH2, and the other of the source or drain is electrically connected to one of the source or drain of transistor 122. Also, the gate of transistor 121 is electrically connected to terminal ENB2.

[0086] The other of the source or drain of transistor 122 is electrically connected to one of the source or drain of transistor 124. The other of the source or drain of transistor 124 is electrically connected to terminal VL2. Also, the gate of transistor 122 is electrically connected to the gate of transistor 124.

[0087] One of the source or drain of transistor 123 is electrically connected to the other of the source or drain of transistor 121. The other of the source or drain of transistor 123 is electrically connected to one of the source or drain of transistor 125. The other of the source or drain of transistor 125 is electrically connected to terminal VL2. Also, the gate of transistor 123 is electrically connected to the gate of transistor 125.

[0088] One of the source or drain of transistor 126 is electrically connected to one of the source or drain of transistor 124, the gate of transistor 125, and terminal OUT1. The other of the source or drain of transistor 126 is electrically connected to terminal VL2. The gate of transistor 126 is electrically connected to node ND11.

[0089] One of the source or drain of transistor 127 is electrically connected to one of the source or drain of transistor 125, the gate of transistor 124, and terminal OUT2. The other of the source or drain of transistor 127 is electrically connected to terminal VL2. The gate of transistor 127 is electrically connected to node ND12.

[0090] As the semiconductor in which the channels of transistors 121 to 127 are formed, a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, etc. can be used singly or in combination. As the semiconductor material, for example, a single semiconductor mainly composed of one element such as silicon or germanium can be used. Also, compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, and nitride semiconductors may be used.

[0091] Also, gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, indium phosphide, silicon germanium, etc. applicable to high electron mobility transistors (HEMTs) may be used.

[0092] Note that semiconductors may be stacked. When stacking semiconductors, semiconductors having different crystal states may be used, or semiconductors having different semiconductor materials may be used.

[0093] The oxide semiconductor can be formed by a sputtering method or an ALD (Atomic Layer Deposition) method. When the differential circuit 110 is composed of OS transistors, the differential circuit 110 and the latch circuit 120 can be provided overlapping each other. FIG. 1B is a conceptual perspective view of the case where the differential circuit 110 provided in the first layer 151 and the latch circuit 120 provided in the second layer 152 are provided overlapping each other. By providing the differential circuit 110 and the latch circuit 120 overlapping each other, the occupied area of the semiconductor device can be reduced. In FIG. 1B, for ease of understanding the configuration of the semiconductor device 100, the first layer 151 and the second layer 152 are shown separated from each other. However, the semiconductor device according to one aspect of the present invention is not limited to this, and the first layer 151 and the second layer 152 may be in contact with each other, or other layers may be provided between the first layer 151 and the second layer 152.

[0094] Also, a high power supply potential VDD2 is supplied to the terminal VH2, and a low power supply potential VSS2 is supplied to the terminal VL2. The low power supply potential VSS2 preferably has the same potential as the low power supply potential VSS1. A potential H or a potential L is supplied to the terminal ENB2. Synchronized signals are supplied to the terminal ENB1 and the terminal ENB2. That is, when a potential H is supplied to the terminal ENB1, a potential H is also supplied to the terminal ENB2. Note that the potential H supplied to the terminal ENB1 and the potential H supplied to the terminal ENB2 do not necessarily have the same potential. The potential L supplied to the terminal ENB1 and the potential L supplied to the terminal ENB2 do not necessarily have the same potential.

[0095] Note that the transistors 122 and 123 preferably have the same electrical characteristics. In particular, it is preferable that the gate voltages when the mutual conductance (gm) is maximized are equal for the transistors 122 and 123. For example, it is preferable that the channel lengths of the transistors 122 and 123 are the same, and the channel widths of the transistors 122 and 123 are the same. Also, it is preferable that the compositions of the main components of the semiconductors of the transistors 122 and 123 are the same. Further, it is preferable that the crystallinity of the semiconductor is equal.

[0096] Further, transistors 124 and 125 are preferably transistors having the same electrical characteristics. In particular, it is preferable that the gate voltages when gm is maximized are equal for transistors 124 and 125. For example, it is preferable that the channel lengths of transistors 124 and 125 are the same, and the channel widths of transistors 124 and 125 are the same. Further, it is preferable that the compositions of the main components of the semiconductors of transistors 124 and 125 are the same. Also, it is preferable that the crystallinity of the semiconductor is equal.

[0097] <Modification Example 1> FIG. 2A shows a circuit diagram of a semiconductor device 100A according to an aspect of the present invention. The semiconductor device 100A is a modification of the semiconductor device 100. Therefore, here, the differences between the semiconductor device 100A and the semiconductor device 100 will be mainly described. The semiconductor device 100A has a latch circuit 120A instead of the latch circuit 120 of the semiconductor device 100. Further, the latch circuit 120A is different from the latch circuit 120 in that OS transistors are used for transistors 126 and 127.

[0098] As described above, the OS transistor has a high breakdown voltage. By using OS transistors for transistors 126 and 127, the latch circuit 120A can operate stably even when the output potential of the differential circuit 110 (the potential of node ND11 or the potential of node ND12) is high.

[0099] Further, the OS transistor has an extremely small off-current. By turning off transistor 126, the leakage current between terminal OUT1 and terminal VL2 via transistor 126 can be made extremely small. Similarly, by turning off transistor 127, the leakage current between terminal OUT2 and terminal VL2 via transistor 127 can be made extremely small. Therefore, the number of current paths between terminal OUT1 and terminal VL2 and the number of current paths between terminal OUT2 and terminal VL2 are reduced, and the power consumption of the semiconductor device 100 can be reduced.

[0100] FIG. 2B shows a perspective view of the semiconductor device 100A. As shown in FIG. 2B, when OS transistors are used for the transistors 126 and 127, the transistors 126 and 127 may be provided in the first layer 151. That is, a part of the latch circuit 120A may be provided in the first layer 151.

[0101] In addition, when the transistor 126 is provided in the first layer 151, the other of the source or drain of the transistor 126 may be electrically connected to the terminal VL1. Similarly, when the transistor 127 is provided in the first layer 151, the other of the source or drain of the transistor 127 may be electrically connected to the terminal VL1.

[0102] <Modification Example 2> FIG. 3A shows a circuit diagram of the differential circuit 110A. FIG. 3B shows a circuit diagram of the differential circuit 110B. FIG. 4A shows a circuit diagram of the differential circuit 110C. FIG. 4B shows a circuit diagram of the differential circuit 110D. FIG. 6 shows a circuit diagram of the differential circuit 110E. The differential circuits 110A to 110E are modification examples of the differential circuit 110. Therefore, the differences from the differential circuit 110 will be mainly described here.

[0103] The differential circuit 110A uses transistors having back gates as the transistors 111 to 115. The back gate is arranged so as to sandwich the semiconductor channel formation region between the gate and the back gate. The back gate can function in the same way as the gate. In the differential circuit 110A, for each of the transistors 111 to 115, the gate and the back gate are electrically connected. Therefore, in the transistors 111 to 115, the gate and the back gate always have the same potential.

[0104] Fig. 3B shows a circuit diagram of the differential circuit 110B. Similar to the differential circuit 110A, each of the transistors 111 to 115 in the differential circuit 110B has a back gate. However, in the differential circuit 110B, the back gate of the transistor 111 is electrically connected to the terminal Vbg1, the back gate of the transistor 112 is electrically connected to the terminal Vbg2, the back gate of the transistor 113 is electrically connected to the terminal Vbg3, the back gate of the transistor 114 is electrically connected to the terminal Vbg4, and the back gate of the transistor 115 is electrically connected to the terminal Vbg5.

[0105] The potential of the back gate may be the same as the potential of the gate, may be the ground potential (GND potential), or may be an arbitrary potential. By changing the potential of the back gate without linking the potential of the gate and the back gate, the threshold voltage of the transistor can be changed.

[0106] Also, since the gate and the back gate are formed of a conductor, they also have a function (particularly an electrostatic shielding function against static electricity) to prevent the electric field generated outside the transistor from acting on the semiconductor where the channel is formed. That is, it is possible to prevent the electrical characteristics of the transistor from fluctuating due to the influence of an external electric field such as static electricity. By providing the back gate, the operation of the semiconductor device can be stabilized and the reliability can be improved.

[0107] Also, in the differential circuit 110C shown in Fig. 4A, the gate and the back gate are electrically connected in each of the transistors 111, 112, and 115. Also, the back gate of the transistor 113 is electrically connected to the terminal Vbg3, and the back gate of the transistor 114 is electrically connected to the terminal Vbg4.

[0108] Also, in the differential circuit 110D shown in FIG. 4B, the gates and back gates of transistors 111 to 113 and transistor 115 are electrically connected. Also, the back gate of transistor 114 is electrically connected to terminal Vbg4.

[0109] Also, in the differential circuit 110E shown in FIG. 5, the back gate of transistor 111 and the back gate of transistor 112 are electrically connected to terminal Vbg1. Also, the back gate of transistor 113 and the back gate of transistor 114 are electrically connected to terminal Vbg3.

[0110] The connection destination of the back gate and the potential supplied to the back gate can be arbitrarily determined depending on the purpose and / or application.

[0111] Since differential circuits 110A to 110E are modified examples of differential circuit 110, any one of differential circuits 110A to 110E can be used instead of differential circuit 110.

[0112] <Modified Example 3> FIG. 6A shows a circuit diagram of latch circuit 120B. FIG. 6B shows a circuit diagram of latch circuit 120C. Latch circuits 120B and 120C are modified examples of latch circuit 120A. Therefore, they are also modified examples of latch circuit 120. Therefore, the differences from latch circuit 120 and latch circuit 120A will be mainly described here.

[0113] Latch circuit 120B shows an example in which transistors 126 and 127 use transistors having back gates. Also, in latch circuit 120B shown in FIG. 6A, an example in which the gates and back gates of transistors 126 and 127 are electrically connected is shown. As described above, the back gate does not necessarily have to be electrically connected to the gate, and it may be electrically connected to a terminal that supplies a potential to the back gate.

[0114] The latch circuit 120C has a configuration in which the transistors 124 and 125 of the latch circuit 120B are replaced with OS transistors having back gates. In the latch circuit 120C shown in FIG. 6B, an example of electrically connecting the gate and the back gate is shown for each of the transistors 126 and 127. Note that the back gate may be electrically connected to other terminals than the gate. For example, it may be electrically connected to a terminal that supplies a potential to the back gate.

[0115] Also, as in the latch circuit 120D shown in FIG. 7A, transistors having back gates may be used for the transistors 121 to 127. In the latch circuit 120D, an example of electrically connecting the gate and the back gate is shown for each of the transistors 121 to 127. Also, in the latch circuit 120E shown in FIG. 7B, an example of electrically connecting the back gate of the transistor 121 to the terminal Vbg6 is shown. For the transistors 122 to 127, the back gate may also be electrically connected to a terminal (not shown).

[0116] Since the latch circuits 120A to 120E are modified examples of the latch circuit 120, any one of the latch circuits 120A to 120E can be used instead of the latch circuit 120.

[0117] <Operation example of semiconductor device 100> A semiconductor device according to an aspect of the present invention can convert various analog signals into binary or multi-valued digital signals (also referred to as "AD conversion"). For example, it can be used for AD conversion of various analog signals such as imaging information obtained by an imaging device including an image sensor, acoustic information obtained by a sound collection device including a microphone, illuminance information obtained by a light receiving device including an optical sensor, temperature information obtained by a temperature measurement device including a temperature sensor, humidity information obtained by a humidity measurement device including a humidity sensor, and the like.

[0118] An operation example of the semiconductor device 100 will be described with reference to the drawings. FIG. 8 is a timing chart for explaining the operation of the semiconductor device 100, and FIGS. 9 and 10 are circuit diagrams showing the operation states of the semiconductor device 100.

[0119] [Binarization of Analog Signal (2-bit AD Conversion)] An operation example of binarization (1-bit conversion) of an analog signal using the semiconductor device 100 according to an aspect of the present invention will be described. The binarization of the analog signal can be performed, for example, by determining whether the potential (potential Vsig) of the analog signal input to the semiconductor device 100 is higher or lower than the reference potential (potential Vref).

[0120] In the present embodiment, a case will be described where the potential Vsig, which is the potential of the analog signal, is supplied to the terminal Vin1 of the semiconductor device 100, and the potential Vref, which is the reference potential, is supplied to the terminal Vin2. Note that the potential Vsig is higher than the threshold voltage of the transistor 113, and the potential Vref is higher than the threshold voltage of the transistor 114. In the present embodiment, a case where the potential Vsig supplied to the terminal Vin1 is higher than the potential Vref will be described.

[0121] Also, it is assumed that the high power supply potential VDD1 is supplied to the terminal VH1, the low power supply potential VSS1 is supplied to the terminal VL1, the high power supply potential VDD2 is supplied to the terminal VH2, and the low power supply potential VSS2 is supplied to the terminal VL2. In some cases, each of the high power supply potential VDD1 and the high power supply potential VDD2 is referred to as a potential H, and each of the low power supply potential VSS1 and the low power supply potential VSS2 is referred to as a potential L.

[0122] During period T11, a potential L (low power supply potential VSS1) is supplied to terminal EN1, and a potential H (high power supply potential VDD1) is supplied to terminal ENB1 (see FIGS. 8 and 9A). Also, a potential H (high power supply potential VDD2) is supplied to terminal ENB2. Thus, transistors 111 to 114 are turned on, and transistor 115 is turned off. Also, a potential H (high power supply potential VDD1) is supplied to nodes ND11 and ND12. Also, transistor 121 is turned off.

[0123] Also, since a potential H is supplied to nodes ND11 and ND12, transistors 126 and 127 are turned on. When transistor 126 is turned on, a potential L (low power supply potential VSS2) is supplied to terminal OUT1, and transistor 123, which is a p-channel transistor, is turned on. Similarly, when transistor 127 is turned on, a potential L (low power supply potential VSS2) is supplied to terminal OUT2, and transistor 122, which is a p-channel transistor, is turned on. Note that period T11 is also referred to as a "precharge period".

[0124] During period T12, a potential H (high power supply potential VDD1) is supplied to terminal EN1, a potential L (low power supply potential VSS1) is supplied to terminal ENB1, and a potential L (low power supply potential VSS2) is supplied to terminal ENB2.

[0125] FIG. 9B is a circuit diagram for explaining the state of semiconductor device 100 at time T12a immediately after the start of period T12. At time T12a, transistors 111 and 112 are off, and transistors 113 to 115 are on. Also, transistor 121 is on, and transistors 122 and 123 remain on.

[0126] Also, the node ND11 and the terminal VL1 become conductive through the transistors 113 and 115. Similarly, the node ND12 and the terminal VL1 become conductive through the transistors 114 and 115. Therefore, the potentials of the node ND11 and the node ND12 change from the potential H toward the potential L.

[0127] Also, the potential of the analog signal supplied to the terminal Vin1 is higher (greater) than the potential Vref supplied to the terminal Vin2. Therefore, the on-current of the transistor 113 is greater than the on-current of the transistor 114. Therefore, the potential change of the node ND11 is faster than that of the node ND12, and the transistor 126 turns off before the transistor 127.

[0128] When the transistor 126 turns off, the terminal OUT1 and the terminal VL2 become non-conductive. The terminal OUT1 becomes conductive with the terminal VH2 through the transistors 121 and 122, and the potential H is supplied. Also, the transistor 123 turns off and the transistor 125 turns on. Note that FIG. 9B shows the state immediately after the transistor 126 turns off.

[0129] Thereafter, the potential of the node ND12 also becomes the potential L, and the transistor 127 turns off (see FIG. 10). When the potential of the analog signal supplied to the terminal Vin1 is lower (smaller) than the potential Vref, the potential L is supplied to the terminal OUT1 and the potential H is supplied to the terminal OUT2. In this way, the analog signal can be binarized.

[0130] Also, when the potential of the analog signal input to the differential circuit 110 is high (the voltage is large), it is preferable to use a transistor with a high breakdown voltage as the transistor constituting the differential circuit 110. As described above, since the OS transistor has a high breakdown voltage, the OS transistor is suitable for the transistors 111 to 115. Also, when the voltage of the analog signal input to the differential circuit 110 is large, it is preferable to increase the power supply voltage used for the differential circuit 110.

[0131] Also, by increasing the power supply voltage used for the differential circuit 110, the potential changes of the nodes ND11 and ND12 can be accelerated. Therefore, the operating speed of the semiconductor device 100 can be increased.

[0132] Also, in the latch circuit 120, it is sufficient to obtain a 1-bit (binary data) output. Therefore, the power supply voltage used for the latch circuit 120 may be equal to or lower than the power supply voltage used for the differential circuit 110. By making the power supply voltages used for the differential circuit 110 and the latch circuit 120 different, the power consumption of the semiconductor device 100 can be reduced. Alternatively, an improvement in the operating speed of the semiconductor device 100 and a reduction in power consumption can be achieved.

[0133] [Multi-valuing of analog signals (multi-valued AD conversion)] Subsequently, with reference to the drawings, an example of the multi-valuing operation of an analog signal using the semiconductor device 100 according to one aspect of the present invention will be described.

[0134] FIG. 11A is a block diagram for explaining a configuration example of the AD conversion circuit 200. FIG. 11B is a timing chart for explaining an example of multi-valued AD conversion. Note that the AD conversion circuit 200 is also a type of semiconductor device.

[0135] The AD conversion circuit 200 includes a control circuit 210, a counting circuit 220, and the semiconductor device 100. The control circuit 210 includes a terminal SPout, a terminal Din, and a terminal Vout. Note that the control circuit 210 may include other terminals. The counting circuit 220 includes a terminal Spin, a terminal Dout, a terminal CK, and a terminal Cin. Note that the counting circuit 220 may include other terminals. The semiconductor device 100 may include terminals other than the terminals Vin1, Vin2, OUT1, and OUT2.

[0136] The terminal Vout and the terminal Vin2 are electrically connected. The terminal SPout is electrically connected to the terminal Spin. The terminal Din is electrically connected to the terminal Dout. The terminal Cin is electrically connected to the terminal OUT1.

[0137] The control circuit 210 has a function of outputting a start pulse signal SP from the terminal SPout. The start pulse signal SP is supplied to the terminal Spin provided in the counting circuit 220. Further, the control circuit 210 has a function of outputting a reference potential Vref from the terminal Vout. The reference potential Vref is supplied to the terminal Vin2 provided in the semiconductor device 100.

[0138] A clock signal CLK is supplied to the terminal CK of the counting circuit 220. Also, a potential Vsig which is an analog signal is supplied to the terminal Vin1. In the present embodiment, in the initial state before AD conversion, the reference potential Vref is set to the potential H. Also, the potential Vsig is set to a potential lower than the reference potential Vref. Therefore, the potential of the terminal OUT1 is the potential L.

[0139] The control circuit 210 supplies the start pulse signal SP to the counting circuit 220 and slowly changes the potential of the reference potential Vref from the potential H to the potential L. That is, a slope signal is supplied as the reference potential Vref.

[0140] When the potential of the reference potential Vref falls below the potential Vsig, the potential of the terminal OUT1 changes from the potential L to the potential H. The counting circuit 220 measures the number of clock cycles (the number of rising edges or falling edges of the clock signal CLK) during the period (period T21) from when the start pulse SP is input until the potential of the terminal Cin changes from the potential L to the potential H. The number of clock cycles becomes a larger value as the potential difference between the potential Vsig and the reference potential Vref is larger. In this way, the potential Vsig which is an analog signal can be replaced with digital data DData (the number of clock cycles during the period T21). The digital data DData obtained by the counting circuit 220 is supplied to the terminal Din of the control circuit 210 via the terminal Dout.

[0141] The AD conversion accuracy can be improved by increasing the frequency of the clock signal CLK, or by decreasing the change rate dVref (the amount of change in the reference potential Vref per unit time.) of the reference potential Vref during the period T21, or by doing both.

[0142] Also, without changing the frequency of the clock signal CLK and the rate of change dVref, the AD conversion accuracy can be improved by increasing the potential difference between the potential H (high power supply potential VDD1) and the potential L (low power supply potential VSS1) of the differential circuit 110.

[0143] Also, by increasing the frequency of the clock signal CLK and increasing the power supply voltage of the differential circuit 110, the time required for AD conversion can be shortened without degrading the accuracy. That is, the AD conversion speed can be increased.

[0144] By increasing the power supply voltage of the differential circuit 110, the AD conversion accuracy and / or the AD conversion speed can be improved. Therefore, it is preferable to use OS transistors for at least a part of the transistors constituting the semiconductor device 100.

[0145] As described above, the power supply voltage used for the latch circuit 120 may be equal to or lower than the power supply voltage used for the differential circuit 110. By making the power supply voltages used in the differential circuit 110 and the latch circuit 120 different, an increase in unnecessary power consumption of the semiconductor device 100 can be suppressed. Also, the power consumption of the semiconductor device 100 can be reduced.

[0146] Also, as shown in FIG. 12A, a sample and hold circuit 230[1] may be provided in front of the terminal Vin1 of the semiconductor device 100, and a sample and hold circuit 230[2] may be provided in front of the terminal Vin2. The sample and hold circuit 230 (sample and hold circuit 230[1] and sample and hold circuit 230[2]) has terminals Vin and Vout, and has a function of holding the potential supplied from the terminal Vin and a function of outputting the potential from the terminal Vout.

[0147] Either one of the sample-and-hold circuits 230[1] and 230[2] may be provided. As shown in FIG. 12B, a configuration may be adopted in which the sample-and-hold circuit 230[1] is provided before the terminal Vin1 of the semiconductor device 100, and the sample-and-hold circuit 230[2] is not provided before the terminal Vin2. As shown in FIG. 12C, a configuration may be adopted in which the sample-and-hold circuit 230[2] is provided before the terminal Vin2 of the semiconductor device 100, and the sample-and-hold circuit 230[1] is not provided before the terminal Vin2.

[0148] By holding the potential Vsig and / or the potential Vref using the sample-and-hold circuit 230, it becomes unnecessary to continuously supply the potential Vsig and / or the potential Vref to the semiconductor device 100. Therefore, the power consumption of the AD conversion circuit 200 can be reduced.

[0149] Also, for example, in the case where the AD conversion circuit 200 has a plurality of semiconductor devices 100 and one control circuit 210 controls the plurality of semiconductor devices 100, while performing AD conversion using one semiconductor device 100, the control circuit 210 can supply the potential Vref and the potential Vsig to other semiconductor devices 100. Thus, by using the sample-and-hold circuit 230, the operation efficiency of the AD conversion circuit 200 can be increased. Also, the operation speed of the AD conversion circuit 200 can be increased.

[0150] FIGS. 13A to 13D show circuit configuration examples that can be used for the sample-and-hold circuit 230.

[0151] FIG. 13A shows a circuit configuration example of a sample-and-hold circuit 230a having one transistor and one capacitor element (also referred to as a “1Tr1C type”). The sample-and-hold circuit 230a includes a transistor M11 and a capacitor element Cs. One of the source or drain of the transistor M11 is electrically connected to a terminal Vin. The other of the source or drain of the transistor M11 is electrically connected to one electrode of the capacitor element Cs and a terminal Vout. The other electrode of the capacitor element Cs is electrically connected to a wiring GND. The gate of the transistor M11 is electrically connected to a wiring WL. A node to which the other of the source or drain of the transistor M11, one electrode of the capacitor element Cs, and the terminal Vout are electrically connected functions as a storage node SN.

[0152] Writing of data is performed by applying a potential H to the wiring WL to turn on the transistor M11 and electrically connecting the terminal Vin and the node SN. After writing the data, by applying a potential L to the wiring WL to turn off the transistor M11, the data written in the storage node SN is held. It is preferable to supply a fixed potential such as a ground potential, VDD (such as VDD1 or VDD2), or VSS (such as VSS1 or VSS2) to the wiring GND. Note that the fixed potential may be a potential other than these.

[0153] It is preferable to use an OS transistor as the transistor M11. Further, the transistor M11 may include a back gate. Since the OS transistor has an extremely small off-current (leakage current), by using the OS transistor as the transistor M11, the leakage current of the transistor M11 can be made very low. That is, the data written in the storage node SN can be held for a long time.

[0154] FIG. 13B shows a circuit configuration example of the sample hold circuit 230b. The sample hold circuit 230b is a modified example of the sample hold circuit 230a and is a type of 1Tr1C sample hold circuit. The sample hold circuit 230b includes a transistor M11 and a capacitor element Cs. One of the source or drain of the transistor M11 is electrically connected to the terminal Vin and the terminal Vout. The other of the source or drain of the transistor M11 is electrically connected to one electrode of the capacitor element Cs. The other electrode of the capacitor element Cs is electrically connected to the wiring GND. The gate of the transistor M11 is electrically connected to the wiring WL. The node where the other of the source or drain of the transistor M11 is electrically connected to one electrode of the capacitor element Cs functions as the storage node SN.

[0155] Similar to the sample hold circuit 230a, it is preferable to supply a fixed potential to the wiring GND. Writing and reading of data are performed by applying a potential H to the wiring WL, turning on the transistor M11, and electrically connecting the terminal Vin and the node SN. Also in the sample hold circuit 230b, it is preferable to use an OS transistor as the transistor M11.

[0156] FIG. 13C shows a circuit configuration example of a gain cell type (also referred to as "2Tr1C type") sample hold circuit 230c having two transistors and one capacitor element. The sample hold circuit 230c includes a transistor M11, a transistor M12, and a capacitor element Cs.

[0157] One of the source or drain of transistor M11 is electrically connected to terminal Vin, the other of the source or drain is electrically connected to one electrode of capacitor element Cs, and the gate is electrically connected to wiring WL. The other electrode of capacitor element Cs is electrically connected to wiring RL. One of the source or drain of transistor M12 is electrically connected to wiring SL, the other of the source or drain is electrically connected to terminal Vout, and the gate is electrically connected to one electrode of capacitor element Cs. The node to which the other of the source or drain of transistor M11, one electrode of capacitor element Cs, and the gate of transistor M11 are electrically connected functions as memory node SN.

[0158] Writing of data is performed by applying a potential H to wiring WL, turning on transistor M11, and making terminal Vin and memory node SN conductive. Thereafter, a potential L is applied to wiring WL to turn off transistor M11, thereby holding the charge supplied to memory node SN. In sample hold circuit 230c as well, it is preferable to use an OS transistor as transistor M11.

[0159] Reading of data is performed by applying a predetermined potential to wiring RL and wiring SL. The current flowing between the source and drain of transistor M12 and the potential of terminal Vout are determined by the potential of wiring SL, memory node SN, and the gate of transistor M12. For example, a high power supply potential VDD1 is supplied to wiring SL. By supplying a potential for reading (for example, a potential equal to or higher than the threshold value of transistor M12) to wiring RL, a voltage corresponding to the amount of charge held in memory node SN is supplied to terminal Vout.

[0160] Sample hold circuit 230d shown in FIG. 13D is a modified example of sample hold circuit 230c. In sample hold circuit 230d, the other of the source or drain of transistor M12 is electrically connected to terminal Vin and terminal Vout. Sample hold circuit 230d can also operate in the same manner as sample hold circuit 230c.

[0161] In the sample - hold circuit 230d, while the potential is being supplied to the terminal Vin, the same potential is also supplied to the terminal Vout. After the supply of potential to the terminal Vin stops, a potential corresponding to the memory node SN can be supplied to the terminal Vout.

[0162] The sample - hold circuit 230 (sample - hold circuit 230a, sample - hold circuit 230b, sample - hold circuit 230c, and sample - hold circuit 230d) functions as a memory circuit. A memory circuit using at least a part of the transistors constituting the memory circuit as OS transistors may be called an "OS memory".

[0163] The OS memory can hold the information written for a period of one year or more, and even more than 10 years, even when the power supply is stopped. Therefore, the OS memory can also be regarded as a non - volatile memory.

[0164] Also, since the amount of charge written in the OS memory hardly changes over a long period, the OS memory can hold not only binary (1 - bit) but also multi - valued (multi - bit) or analog information.

[0165] Also, since the OS memory writes charge to a node via an OS transistor, the high voltage required in a conventional flash memory is not necessary, and a high - speed write operation can also be realized. Also, the erase operation before data rewriting performed in a flash memory is not necessary in the OS memory. Also, since charge injection and extraction into a floating gate or a charge trapping layer are not performed, the OS memory can perform data writing and reading an almost unlimited number of times. The OS memory has less degradation compared to a conventional flash memory and can obtain high reliability.

[0166] Also, the OS memory does not involve a structural change at the atomic level during the write operation, like a magnetic - resistance memory (MRAM) or a resistive - random - access memory (ReRAM). Therefore, the OS memory is more resistant to rewriting than a magnetic - resistance memory and a resistive - random - access memory.

[0167] Also, in a high-temperature environment, the off-current of the OS transistor hardly increases. Specifically, the off-current hardly increases even in an environmental temperature range from room temperature to 200°C. Also, the on-current is less likely to decrease even in a high-temperature environment. A memory device including the OS memory operates stably even in a high-temperature environment and can provide high reliability. Also, the OS transistor has a high breakdown voltage between the source and the drain. By using the OS transistor as a transistor constituting a semiconductor device, a semiconductor device that operates stably and has good reliability can be realized even in a high-temperature environment.

[0168] The configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, structures, methods, etc. shown in other embodiments.

[0169] (Embodiment 2) In this embodiment, a configuration example of a transistor applicable to the semiconductor device described in the above embodiment will be described. As an example, a configuration in which transistors having different electrical characteristics are stacked and provided will be described. By adopting such a configuration, the degree of freedom in designing the semiconductor device can be increased. Also, by stacking and providing transistors having different electrical characteristics, the integration degree of the semiconductor device can be increased.

[0170] A partial cross-sectional structure of a semiconductor device is shown in FIG. 14. The semiconductor device shown in FIG. 14 has a transistor 550 and a transistor 500. FIG. 15A is a top view of the transistor 500. FIG. 15B is a cross-sectional view taken along the line L1 - L2 shown by the dashed-dotted line in FIG. 15A, and is a cross-sectional view of the transistor 500 in the channel length direction. FIG. 15C is a cross-sectional view taken along the line W1 - W2 shown by the dashed-dotted line in FIG. 15A, and is a cross-sectional view of the transistor 500 in the channel width direction. For example, the transistor 500 corresponds to the OS transistor included in the semiconductor device 100 shown in the above embodiment, that is, a transistor having an oxide semiconductor in the channel formation region. Also, the transistor 550 corresponds to the Si transistor included in the latch circuit 120 shown in the above embodiment, that is, a transistor having silicon in the channel formation region.

[0171] The transistor 500 is an OS transistor. The OS transistor has an extremely small off-current. Therefore, it is possible to hold the data voltage or charge written to the memory node via the transistor 500 for a long period of time. That is, since the refresh operation frequency of the memory node can be reduced or the refresh operation is not required, the power consumption of the semiconductor device can be reduced.

[0172] In FIG. 14, the transistor 500 is provided above the transistor 550.

[0173] The transistor 550 is provided on the substrate 371. The substrate 371 is, for example, a p-type silicon substrate. The substrate 371 may also be an n-type silicon substrate. The oxide layer 374 is preferably an insulating layer (also referred to as a BOX layer) formed by buried oxide in the substrate 371, for example, silicon oxide. The transistor 550 is provided on a single crystal silicon, so-called SOI (Silicon On Insulator) substrate provided on the substrate 371 via the oxide layer 374.

[0174] In the SOI substrate, a substrate 371 is provided with an insulator 373 that functions as an element isolation layer. The substrate 371 also has a well region 372. The well region 372 is a region to which n-type or p-type conductivity is imparted according to the conductivity type of the transistor 550. In the single-crystalline silicon of the SOI substrate, a semiconductor region 375, low-resistance regions 376a and 376b that function as a source region or a drain region are provided. Also, a low-resistance region 376c is provided on the well region 372.

[0175] The transistor 550 can be provided so as to overlap with the well region 372 to which an impurity element for imparting conductivity is added. The well region 372 can function as the bottom gate electrode of the transistor 550 by independently changing the potential through the low-resistance region 376c. Therefore, the threshold voltage of the transistor 550 can be controlled. In particular, by applying a negative potential to the well region 372, the threshold voltage of the transistor 550 can be made larger and the off-current can be reduced. Therefore, by applying a negative potential to the well region 372, the drain current when the potential applied to the gate electrode of the Si transistor is 0 V can be made smaller. As a result, the power consumption based on the through-current or the like in the arithmetic circuit having the transistor 550 can be reduced, and the arithmetic efficiency can be improved.

[0176] The transistor 550 is preferably a so-called Fin type in which the upper surface of the semiconductor layer and the side surfaces in the channel width direction are covered with a conductor 378 via an insulator 377. By making the transistor 550 of the Fin type, the on-characteristics of the transistor 550 can be improved by increasing the effective channel width. Also, since the contribution of the electric field of the gate electrode can be increased, the off-characteristics of the transistor 550 can be improved.

[0177] Note that the transistor 550 may be either a p-channel type transistor or an n-channel type transistor.

[0178] The conductor 378 may function as a first gate (also referred to as a top gate) electrode. Also, the well region 372 may function as a second gate (also referred to as a bottom gate) electrode. In that case, the potential applied to the well region 372 can be controlled via the low-resistance region 376c.

[0179] In the region where the channel of the semiconductor region 375 is formed, the region in the vicinity thereof, the source region, or the drain region, the low-resistance region 376a, the low-resistance region 376b, and the low-resistance region 376c connected to the electrode for controlling the potential of the well region 372, etc., it is preferable to include a semiconductor such as a silicon-based semiconductor, and it is preferable to include single-crystalline silicon. Alternatively, it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), etc. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may also be used. Alternatively, by using GaAs and GaAlAs, etc., the transistor 550 may be a HEMT.

[0180] The well region 372, the low-resistance region 376a, the low-resistance region 376b, and the low-resistance region 376c include, in addition to the semiconductor material applied to the semiconductor region 375, an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron.

[0181] The conductor 378 that functions as a gate electrode can use a conductive material such as a semiconductor material such as silicon, a metal material, an alloy material, or a metal oxide material that includes an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron. Also, the conductor 378 may use a silicide such as nickel silicide.

[0182] Since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten from the viewpoint of heat resistance.

[0183] The low-resistance regions 376a, 376b, and 376c may be configured by laminating another conductor, such as a silicide such as nickel silicide. By adopting such a configuration, the conductivity of the region functioning as an electrode can be enhanced. Also, at this time, an insulator functioning as a sidewall spacer (also referred to as a sidewall insulating layer) may be provided on the side surfaces of the conductor 378 functioning as a gate electrode and the insulator functioning as a gate insulating film. By adopting such a configuration, it is possible to prevent the conductor 378 and the low-resistance regions 376a and 376b from being in a conductive state.

[0184] An insulator 379, an insulator 381, an insulator 383, and an insulator 385 are sequentially laminated and provided so as to cover the transistor 550.

[0185] As the insulator 379, the insulator 381, the insulator 383, and the insulator 385, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, etc. may be used.

[0186] In this specification, silicon oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and silicon nitride oxide refers to a material having a higher nitrogen content than oxygen in its composition. Also, in this specification, aluminum oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and aluminum nitride oxide refers to a material having a higher nitrogen content than oxygen in its composition.

[0187] The insulator 381 may function as a planarization film that planarizes the step formed by the transistor 550 or the like provided below it. For example, the upper surface of the insulator 381 may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness.

[0188] Also, for the insulator 383, it is preferable to use a film having a barrier property that prevents hydrogen and impurities from diffusing from the substrate 371 or the transistor 550 or the like into the region where the transistor 500 is provided.

[0189] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film having a small amount of hydrogen desorption.

[0190] The amount of hydrogen desorption can be analyzed using, for example, temperature programmed desorption gas analysis method (TDS). For example, the amount of hydrogen desorption of the insulator 383 is such that in the TDS analysis, in the range where the surface temperature of the film is from 50 °C to 500 °C, the desorption amount converted to hydrogen atoms, when converted per unit area of the insulator 383, is 10×10 15 atoms / cm 2 or less, preferably 5×10 15 atoms / cm 2 or less.

[0191] Note that the insulator 385 preferably has a lower dielectric constant than the insulator 383. For example, the relative dielectric constant of the insulator 385 is preferably less than 4, more preferably less than 3. Also, for example, the relative dielectric constant of the insulator 385 is preferably 0.7 times or less, more preferably 0.6 times or less, of the relative dielectric constant of the insulator 383. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0192] In addition, conductors 328, conductors 330, etc. that are connected to the transistor 500 are embedded in the insulator 379, the insulator 381, the insulator 383, and the insulator 385. Note that the conductors 328 and the conductors 330 have functions as plugs or wirings. In addition, conductors having functions as plugs or wirings may be given the same reference numeral collectively for a plurality of configurations. Also, in this specification and the like, a wiring and a plug connected to the wiring may be an integral body. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

[0193] As materials for each plug and wiring (conductors 328, conductors 330, etc.), conductive materials such as metal materials, alloy materials, metal nitride materials, or metal oxide materials can be used singly or in a stacked manner. It is preferable to use a high melting point material such as tungsten or molybdenum that achieves both heat resistance and conductivity, and it is more preferable to use tungsten. Alternatively, it is preferable to form with a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be lowered.

[0194] A wiring layer may be provided on the insulator 385 and the conductor 330. For example, in FIG. 14, the insulator 350, the insulator 352, and the insulator 354 are sequentially stacked and provided. In addition, a conductor 356 is formed in the insulator 350, the insulator 352, and the insulator 354. The conductor 356 has a function as a plug connected to the transistor 550 or a wiring. Note that the conductor 356 can be provided using the same material as the conductors 328 and the conductors 330.

[0195] Incidentally, for example, as the insulator 350, it is preferable to use an insulator having a barrier property against hydrogen, similar to the insulator 383. Further, the conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 350 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0196] Incidentally, as the conductor having a barrier property against hydrogen, for example, tantalum nitride or the like may be used. Further, by laminating tantalum nitride and tungsten having high conductivity, the diffusion of hydrogen from the transistor 550 can be suppressed while maintaining the conductivity as a wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen is in contact with the insulator 350 having a barrier property against hydrogen.

[0197] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. 14, the insulator 360, the insulator 362, and the insulator 364 are laminated and provided in this order. Further, a conductor 366 is formed in the insulator 360, the insulator 362, and the insulator 364. The conductor 366 has a function as a plug or a wiring. Note that the conductor 366 can be provided using the same materials as the conductor 328 and the conductor 330.

[0198] Incidentally, for example, as the insulator 360, it is preferable to use an insulator having a barrier property against hydrogen, similar to the insulator 383. Further, the conductor 366 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 360 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0199] A wiring layer may be provided on the insulator 364 and the conductor 366. For example, in FIG. 14, the insulator 370, the insulator 369, and the insulator 368 are sequentially stacked and provided. Further, a conductor 376 is formed in the insulator 370, the insulator 369, and the insulator 368. The conductor 376 has a function as a plug or a wiring. Note that the conductor 376 can be provided using the same material as the conductor 328 and the conductor 330.

[0200] Note that, for example, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 370, similar to the insulator 383. Further, the conductor 376 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 370 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0201] A wiring layer may be provided on the insulator 368 and the conductor 376. For example, in FIG. 14, the insulator 380, the insulator 382, and the insulator 384 are sequentially stacked and provided. Further, a conductor 386 is formed in the insulator 380, the insulator 382, and the insulator 384. The conductor 386 has a function as a plug or a wiring. Note that the conductor 386 can be provided using the same material as the conductor 328 and the conductor 330.

[0202] Note that, for example, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 380, similar to the insulator 383. Further, the conductor 386 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 380 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0203] In the above description, the wiring layers including the conductor 356, the wiring layer including the conductor 366, the wiring layer including the conductor 376, and the wiring layer including the conductor 386 have been described. However, the semiconductor device according to the present embodiment is not limited thereto. The number of wiring layers similar to the wiring layer including the conductor 356 may be three or less, or may be five or more.

[0204] On the insulator 384, an insulator 510, an insulator 512, an insulator 514, and an insulator 516 are laminated in this order. Any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 is preferably made of a material having barrier properties against oxygen and hydrogen.

[0205] For example, for the insulator 510 and the insulator 514, it is preferable to use a film having barrier properties against hydrogen and impurities from, for example, the region where the substrate 371 or the transistor 550 is provided to the region where the transistor 500 is provided. Therefore, a material similar to that of the insulator 383 can be used.

[0206] As an example of a film having barrier properties against hydrogen, silicon nitride formed by CVD can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550.

[0207] Also, as a film having barrier properties against hydrogen, for example, for the insulator 510 and the insulator 514, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide.

[0208] In particular, aluminum oxide has a high blocking effect that prevents the film from permeating both oxygen and impurities such as hydrogen and moisture, which are factors causing fluctuations in the electrical characteristics of transistors. Therefore, aluminum oxide can prevent the incorporation of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. In addition, it is possible to suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, it is suitable for use as a protective film for the transistor 500.

[0209] Also, for example, the same materials as those of the insulator 379 can be used for the insulator 512 and the insulator 516. In addition, by applying a material with a relatively low dielectric constant to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, a silicon oxide film or a silicon oxynitride film can be used as the insulator 512 and the insulator 516.

[0210] Also, conductors such as the conductor 518 and the conductor (for example, the conductor 503) constituting the transistor 500 are embedded in the insulator 510, the insulator 512, the insulator 514, and the insulator 516. Note that the conductor 518 has a function as a plug connected to the transistor 550 or a wiring. The conductor 518 can be provided using the same materials as those of the conductor 328 and the conductor 330.

[0211] In particular, the conductor 518 in the region in contact with the insulator 510 and the insulator 514 is preferably a conductor having a barrier property against oxygen, hydrogen, and water. With this configuration, the transistor 550 and the transistor 500 can be separated by a layer having a barrier property against oxygen, hydrogen, and water, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0212] A transistor 500 is provided above the insulator 516.

[0213] As shown in FIGS. 15A to 15C, the transistor 500 includes a conductor 503 arranged to be embedded in insulators 514 and 516, an insulator 520 arranged on the insulator 516 and the conductor 503, an insulator 522 arranged on the insulator 520, an insulator 524 arranged on the insulator 522, an oxide 530a arranged on the insulator 524, an oxide 530b arranged on the oxide 530a, conductors 542a and 542b arranged separately from each other on the oxide 530b, an insulator 580 arranged on the conductors 542a and 542b and having an opening formed by overlapping between the conductor 542a and the conductor 542b, an insulator 545 arranged on the bottom and side surfaces of the opening, and a conductor 560 arranged on the formation surface of the insulator 545.

[0214] Also, as shown in FIGS. 15B and 15C, it is preferable that an insulator 544 is arranged between the oxides 530a, 530b, conductors 542a, and 542b and the insulator 580. Also, as shown in FIGS. 15A to 15C, the conductor 560 preferably includes a conductor 560a provided inside the insulator 545 and a conductor 560b provided to be embedded inside the conductor 560a. Also, as shown in FIGS. 15B and 15C, it is preferable that an insulator 574 is arranged on the insulator 580, the conductor 560, and the insulator 545.

[0215] In this specification and the like, the oxides 530a and 530b may sometimes be collectively referred to as the oxide 530.

[0216] Note that in the transistor 500, a configuration in which two layers of the oxides 530a and 530b are laminated in a region where a channel is formed and in its vicinity is shown, but the present invention is not limited to this. For example, a configuration in which a single layer of the oxide 530b or a laminated configuration of three or more layers is provided may be used.

[0217] In addition, although the conductor 560 is shown as a two-layer stacked structure in the transistor 500, the present invention is not limited thereto. For example, the conductor 560 may have a single-layer structure or a stacked structure of three or more layers. Further, the transistor 500 shown in FIGS. 14, 15A to 15C is an example, and the present invention is not limited to its configuration, and an appropriate transistor may be used according to the circuit configuration or driving method.

[0218] Here, the conductor 560 functions as a gate electrode of the transistor 500, and the conductors 542a and 542b function as a source electrode and a drain electrode, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductors 542a and 542b. The arrangement of the conductor 560, the conductor 542a, and the conductor 542b is self-aligned with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be self-alignedly arranged between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing an alignment margin, and the occupied area of the transistor 500 can be reduced. Thereby, miniaturization and high integration of the semiconductor device can be achieved.

[0219] Furthermore, since the conductor 560 is self-alignedly formed in the region between the conductors 542a and 542b, the conductor 560 does not have a region overlapping with the conductor 542a or the conductor 542b. Thereby, the parasitic capacitance formed between the conductor 560, the conductor 542a, and the conductor 542b can be reduced. Therefore, the switching speed of the transistor 500 can be improved, and high frequency characteristics can be obtained.

[0220] The conductor 560 may function as a first gate (also referred to as a gate or a top gate) electrode. Further, the conductor 503 may function as a second gate (also referred to as a back gate or a bottom gate) electrode. In that case, by changing the potential applied to the conductor 503 independently without linking it to the potential applied to the conductor 560, the threshold voltage of the transistor 500 can be controlled. In particular, by applying a negative potential to the conductor 503, the threshold voltage of the transistor 500 can be made larger and the off-current can be reduced. Therefore, applying a negative potential to the conductor 503 can make the drain current smaller when the potential applied to the conductor 560 is 0V than when no negative potential is applied.

[0221] The conductor 503 is arranged so as to overlap with the oxide 530 and the conductor 560. Thereby, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected and can cover the channel formation region formed in the oxide 530.

[0222] In this specification and the like, a configuration of a transistor in which a channel formation region is electrically surrounded by the electric fields of a pair of gate electrodes (a first gate electrode and a second gate electrode) is called a surrounded channel (S-channel) configuration. Further, the S-channel configuration disclosed in this specification and the like is different from the Fin type configuration and the planar type configuration. By adopting the S-channel configuration, it is possible to increase the resistance to the short-channel effect, in other words, to make a transistor in which the short-channel effect is less likely to occur.

[0223] Further, the conductor 503 has the same configuration as the conductor 518. A conductor 503a is formed in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and a conductor 503b is further formed inside. Note that, in the transistor 500, the configuration in which the conductor 503a and the conductor 503b are laminated is shown, but the present invention is not limited thereto. For example, the conductor 503 may be provided in a single layer or a laminated configuration of three or more layers.

[0224] Here, it is preferable to use a conductive material for the conductor 503a that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the above impurities are less likely to permeate). Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules) (the above oxygen is less likely to permeate). In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.

[0225] For example, by having the function of suppressing the diffusion of oxygen in the conductor 503a, it is possible to suppress the oxidation of the conductor 503b and the decrease in conductivity.

[0226] Also, when the conductor 503 also serves as a wiring function, it is preferable to use a highly conductive material mainly composed of tungsten, copper, or aluminum for the conductor 503b. Note that, in the present embodiment, the conductor 503 is illustrated as a laminate of the conductor 503a and the conductor 503b, but the conductor 503 may have a single-layer configuration.

[0227] The insulator 520, the insulator 522, and the insulator 524 have a function as a second gate insulating film.

[0228] Here, as the insulator 524 in contact with the oxide 530, it is preferable to use an insulator containing more oxygen than the stoichiometric composition. Such oxygen is likely to be released from the film by heating. In this specification and the like, the oxygen released by heating may be referred to as "excess oxygen". That is, it is preferable that a region containing excess oxygen (also referred to as an "excess oxygen region") is formed in the insulator 524. By providing such an insulator containing excess oxygen in contact with the oxide 530, the oxygen vacancies (V O : also referred to as oxygen vacancy) in the oxide 530 can be reduced, and the reliability of the transistor 500 can be improved. When hydrogen enters the oxygen vacancies in the oxide 530, such defects (hereinafter, may be referred to as V O H) may function as donors and generate electrons as carriers. Also, a part of hydrogen may combine with oxygen bonded to metal atoms to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Further, since hydrogen in the oxide semiconductor is likely to move due to stress such as heat and an electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may deteriorate. In one aspect of the present invention, it is preferable to reduce V O H in the oxide 530 as much as possible to make it highly pure intrinsic or substantially highly pure intrinsic. In this way, to obtain an oxide semiconductor in which V O H is sufficiently reduced, it is important to remove impurities such as moisture and hydrogen in the oxide semiconductor (also referred to as "dehydration" or "dehydrogenation treatment"), and to supply oxygen to the oxide semiconductor to fill the oxygen vacancies (also referred to as "oxygen addition treatment"). By using an oxide semiconductor in which impurities such as V O H are sufficiently reduced in the channel formation region of the transistor, stable electrical characteristics can be imparted.

[0229] As the insulator having an excess oxygen region, specifically, it is preferable to use an oxide material in which some oxygen is desorbed by heating. The oxide that desorbs oxygen by heating means that in TDS (Thermal Desorption Spectroscopy) analysis, the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more, and it is an oxide film. Note that the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0230] In addition, the insulator having the excess oxygen region and the oxide 530 may be subjected to any one or more of heat treatment, microwave treatment, or RF treatment in contact with each other. By performing this treatment, water or hydrogen in the oxide 530 can be removed. For example, in the oxide 530, a reaction in which the bond of VoH is broken occurs. In other words, a reaction of "V O H→Vo+H" occurs, and dehydrogenation can be achieved. A part of the hydrogen generated at this time may be combined with oxygen to form H2O and removed from the oxide 530 or the insulator in the vicinity of the oxide 530. In addition, a part of the hydrogen may be gettered by the conductor 542a and the conductor 542b.

[0231] In addition, the microwave treatment is preferably carried out using, for example, a device having a power source for generating high-density plasma or a device having a power source for applying RF to the substrate side. For example, by using a gas containing oxygen and high-density plasma, high-density oxygen radicals can be generated. By applying RF to the substrate side, the oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or the insulator near the oxide 530. Further, the microwave treatment may be carried out at a pressure of 133 Pa or more, preferably 200 Pa or more, more preferably 400 Pa or more. Further, as the gas introduced into the apparatus for performing the microwave treatment, for example, oxygen and argon are used, and the oxygen flow rate ratio (O2 / (O2+Ar)) is 50% or less, preferably 10% or more and 30% or less.

[0232] In addition, during the manufacturing process of the transistor 500, it is preferable to perform a heat treatment in a state where the surface of the oxide 530 is exposed. The heat treatment may be carried out, for example, at 100°C or more and 450°C or less, more preferably 350°C or more and 400°C or less. The heat treatment is carried out in an atmosphere of nitrogen gas or inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably carried out in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 530 to reduce the oxygen deficiency (V O ). The heat treatment may also be carried out under reduced pressure. Alternatively, after the heat treatment in an atmosphere of nitrogen gas or inert gas, the heat treatment may be carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen. Alternatively, after the heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, the heat treatment may be continuously carried out in an atmosphere of nitrogen gas or inert gas.

[0233] By subjecting the oxide 530 to an oxygen addition treatment, the oxygen vacancies in the oxide 530 can be repaired with the supplied oxygen, that is, the reaction of "Vo + O → null" can be promoted. Furthermore, by reacting the supplied oxygen with the hydrogen remaining in the oxide 530, the hydrogen can be removed (dehydrated) as H2O. As a result, the hydrogen remaining in the oxide 530 can be prevented from recombining with the oxygen vacancies to form V O H can be suppressed.

[0234] In addition, when the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate).

[0235] Since the insulator 522 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 530 does not diffuse to the insulator 520 side, which is preferable. In addition, the conductor 503 can be prevented from reacting with the oxygen possessed by the insulator 524 and the oxide 530.

[0236] The insulator 522 is preferably a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator functioning as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0237] In particular, an insulator containing one or both oxides of aluminum and hafnium, which is an insulating material having a function of suppressing diffusion of impurities and oxygen (the above oxygen is difficult to permeate), may be used. As the insulator containing one or both oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), and the like. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 and the incorporation of impurities such as hydrogen from the peripheral portion of the transistor 500 into the oxide 530.

[0238] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be laminated on the above insulator and used.

[0239] Also, the insulator 520 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Further, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride, an insulator 520 having a laminated structure that is thermally stable and has a high relative dielectric constant can be obtained.

[0240] In the transistor 500 of FIGS. 15A to 15C, the insulator 520, the insulator 522, and the insulator 524 are shown as the second gate insulating film having a three-layer laminated structure. However, the second gate insulating film may have a single-layer, two-layer, or four-layer or more laminated structure. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used.

[0241] The transistor 500 uses a metal oxide that functions as an oxide semiconductor for the oxide 530 including a channel formation region. For example, as the oxide 530, a metal oxide such as an In-M-Zn oxide (element M is selected from one or more of aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be used.

[0242] The formation of the metal oxide that functions as an oxide semiconductor may be performed by a sputtering method or an ALD (Atomic Layer Deposition) method. Note that the metal oxide that functions as an oxide semiconductor will be described in detail in other embodiments.

[0243] In addition, for the metal oxide that functions as a channel formation region in the oxide 530, it is preferable to use a metal oxide having a band gap of preferably 2 eV or more, more preferably 2.5 eV or more. Thus, by using a metal oxide with a large band gap, the off-current of the transistor can be reduced.

[0244] The oxide 530 has the oxide 530a under the oxide 530b, so that the diffusion of impurities from the composition formed below the oxide 530a to the oxide 530b can be suppressed.

[0245] Note that the oxide 530 preferably has a laminated structure of a plurality of oxide layers with different atomic ratios of each metal atom. Specifically, in the metal oxide used for the oxide 530a, the atomic ratio of the element M in the constituent elements is preferably larger than the atomic ratio of the element M in the constituent elements in the metal oxide used for the oxide 530b. Further, in the metal oxide used for the oxide 530a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 530b. Further, in the metal oxide used for the oxide 530b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 530a.

[0246] Further, it is preferable that the energy of the lower end of the conduction band of the oxide 530a is higher than the energy of the lower end of the conduction band of the oxide 530b. In other words, it is preferable that the electron affinity of the oxide 530a is smaller than the electron affinity of the oxide 530b.

[0247] Here, at the junction of the oxide 530a and the oxide 530b, the energy level of the lower end of the conduction band changes smoothly. In other words, it can also be said that the energy level of the lower end of the conduction band at the junction of the oxide 530a and the oxide 530b changes continuously or is continuously joined. To achieve this, it is preferable to lower the density of defect energy levels in the mixed layer formed at the interface between the oxide 530a and the oxide 530b.

[0248] Specifically, by having a common element (as the main component) other than oxygen in the oxide 530a and the oxide 530b, a mixed layer with a low density of defect energy levels can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, etc. may be used as the oxide 530a.

[0249] At this time, the main path of the carrier becomes the oxide 530b. By configuring the oxide 530a as described above, the density of defect energy levels at the interface between the oxide 530a and the oxide 530b can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 500 can obtain a high on-current.

[0250] On the oxide 530b, a conductor 542a and a conductor 542b that function as a source electrode and a drain electrode are provided. As the conductor 542a and the conductor 542b, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Furthermore, a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen.

[0251] In addition, in FIG. 15B, although the conductors 542a and 542b are shown as a single-layer structure, they may also be a laminated structure of two or more layers. For example, a tantalum nitride film and a tungsten film may be laminated. Also, a titanium film and an aluminum film may be laminated. Further, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, or a two-layer structure in which a copper film is laminated on a tungsten film may be used.

[0252] Also, a three-layer structure in which a titanium film or a titanium nitride film is provided, an aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, or a three-layer structure in which a molybdenum film or a molybdenum nitride film is provided, an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed thereon, etc. are available. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0253] Also, as shown in FIG. 15B, regions 543a and 543b may be formed as low-resistance regions at the interface between the oxide 530 and the conductor 542a (conductor 542b) and in the vicinity thereof. At this time, region 543a functions as one of the source region or the drain region, and region 543b functions as the other of the source region or the drain region. Also, a channel formation region is formed in the region sandwiched between region 543a and region 543b.

[0254] By providing the conductor 542a (conductor 542b) in contact with the oxide 530, the oxygen concentration in region 543a (region 543b) may be reduced. Also, a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and the components of the oxide 530 may be formed in region 543a (region 543b). In such a case, the carrier density in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0255] The insulator 544 is provided to cover the conductor 542a and the conductor 542b, and suppresses the oxidation of the conductor 542a and the conductor 542b. At this time, the insulator 544 may be provided to cover the side surface of the oxide 530 and be in contact with the insulator 524.

[0256] As the insulator 544, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. can be used. Further, silicon oxynitride or silicon nitride can also be used as the insulator 544.

[0257] In particular, as the insulator 544, it is preferable to use aluminum oxide, hafnium oxide, aluminum, and an oxide containing hafnium and aluminum (hafnium aluminate), which is an insulator containing one or both oxides of aluminum or hafnium. In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in a later process. When the conductor 542a and the conductor 542b are made of a material having oxidation resistance or a material that does not significantly decrease in conductivity even when absorbing oxygen, the insulator 544 is not an essential component. It may be appropriately designed according to the required transistor characteristics.

[0258] By having the insulator 544, it is possible to suppress the diffusion of impurities such as water and hydrogen contained in the insulator 580 to the oxide 530b. Further, oxidation of the conductor 542 due to the excess oxygen of the insulator 580 can be suppressed.

[0259] The insulator 545 functions as a first gate insulating film. The insulator 545 is preferably formed using an insulator that contains an excessive amount of oxygen and releases oxygen by heating, similar to the insulator 524 described above.

[0260] Specifically, silicon oxide with excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, and silicon oxide with pores can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0261] By providing an insulator containing excess oxygen as insulator 545, oxygen can be effectively supplied from insulator 545 to the channel formation region of oxide 530b. Also, similar to insulator 524, it is preferable that the concentration of impurities such as water or hydrogen in insulator 545 is reduced. The film thickness of insulator 545 is preferably 1 nm or more and 20 nm or less. Also, the microwave treatment described above may be performed before and / or after the formation of insulator 545.

[0262] Also, in order to efficiently supply the excess oxygen possessed by insulator 545 to oxide 530, a metal oxide may be provided between insulator 545 and conductor 560. It is preferable that the metal oxide suppresses the diffusion of oxygen from insulator 545 to conductor 560. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from insulator 545 to conductor 560 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to oxide 530. Also, oxidation of conductor 560 by excess oxygen can be suppressed. As the metal oxide, a material that can be used for insulator 544 may be used.

[0263] Note that insulator 545 may have a stacked structure, similar to the second gate insulating film. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by forming an insulator that functions as a gate insulating film into a stacked structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a stacked structure that is thermally stable and has a high relative dielectric constant can be achieved.

[0264] The conductor 560 that functions as the first gate electrode is shown as a two-layer structure in FIGS. 15B and 15C, but it may be a single-layer structure or a laminated structure of three or more layers.

[0265] For the conductor 560a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). Since the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 560b by the oxygen contained in the insulator 545 and the resulting decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use tantalum, tantalum nitride, ruthenium, or ruthenium oxide. Also, as the conductor 560a, an oxide semiconductor applicable to the oxide 530 can be used. In that case, by forming the conductor 560b by sputtering, the electrical resistance value of the conductor 560a can be decreased to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0266] Also, for the conductor 560b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Also, since the conductor 560b also functions as a wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. Also, the conductor 560b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0267] Insulator 580 is provided on conductor 542a and conductor 542b via insulator 544. Insulator 580 preferably has an excess oxygen region. For example, as insulator 580, it is preferable to have silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, or resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having pores are preferable because an excess oxygen region can be easily formed in a later process.

[0268] Insulator 580 preferably has an excess oxygen region. By providing insulator 580 that releases oxygen upon heating, oxygen in insulator 580 can be efficiently supplied to oxide 530. It is preferable that the concentration of impurities such as water or hydrogen in insulator 580 is reduced.

[0269] The opening of insulator 580 is formed to overlap the region between conductor 542a and conductor 542b. Thereby, conductor 560 is formed to be embedded in the opening of insulator 580 and the region sandwiched between conductor 542a and conductor 542b.

[0270] When miniaturizing a semiconductor device, it is required to shorten the gate length, but it is necessary to prevent the conductivity of conductor 560 from decreasing. Therefore, if the film thickness of conductor 560 is increased, conductor 560 can have a high aspect ratio shape. In the present embodiment, since conductor 560 is provided so as to be embedded in the opening of insulator 580, even if conductor 560 has a high aspect ratio shape, it can be formed without collapsing conductor 560 during the process.

[0271] The insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 545. By forming the insulator 574 by a sputtering method, an excess oxygen region can be provided in the insulator 545 and the insulator 580. Thereby, oxygen can be supplied from the excess oxygen region into the oxide 530.

[0272] For example, as the insulator 574, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used.

[0273] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm or more and 3.0 nm or less. Therefore, aluminum oxide formed by a sputtering method can function as an oxygen supply source and also as a barrier film for impurities such as hydrogen.

[0274] Also, it is preferable to provide an insulator 581 that functions as an interlayer film on the insulator 574. Similar to the insulator 524 and the like, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

[0275] Also, conductors 540a and 540b are disposed in openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544. The conductors 540a and 540b are provided to face each other with the conductor 560 interposed therebetween. The conductors 540a and 540b have the same configuration as the conductors 546 and 548 described later.

[0276] An insulator 582 is provided on an insulator 581. It is preferable to use a material that is barrier against oxygen and hydrogen for the insulator 582. Therefore, the same material as that of the insulator 514 can be used for the insulator 582. For example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.

[0277] In particular, aluminum oxide has a high blocking effect of not allowing the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent the incorporation of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. In addition, it is possible to suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, it is suitable for use as a protective film for the transistor 500.

[0278] An insulator 586 is provided on the insulator 582. The same material as that of the insulator 379 can be used for the insulator 586. In addition, by applying a material having a relatively low relative permittivity to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, a silicon oxide film or a silicon oxynitride film can be used as the insulator 586.

[0279] Conductors 546, 548, etc. are embedded in the insulator 520, insulator 522, insulator 524, insulator 544, insulator 580, insulator 574, insulator 581, insulator 582, and insulator 586.

[0280] The conductor 546 and the conductor 548 function as plugs or wirings connected to the transistor 500 or the transistor 550. The conductor 546 and the conductor 548 can be provided using the same materials as the conductor 328 and the conductor 330.

[0281] Also, after the formation of the transistor 500, an opening may be formed so as to surround the transistor 500, and an insulator having a high barrier property against hydrogen or water may be formed so as to cover the opening. By wrapping the transistor 500 with the above-described insulator having a high barrier property, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, a plurality of transistors 500 may be collectively wrapped with an insulator having a high barrier property against hydrogen or water. When forming an opening so as to surround the transistor 500, for example, when an opening reaching the insulator 522 or the insulator 514 is formed and the above-described insulator having a high barrier property is formed so as to contact the insulator 522 or the insulator 514, it also serves as part of the manufacturing process of the transistor 500, which is preferable. As the insulator having a high barrier property against hydrogen or water, for example, the same material as the insulator 522 or the insulator 514 may be used.

[0282] Also, a conductor 612 may be provided on the conductor 546 and the conductor 548. The conductor 612 has a function as a plug connected to the transistor 500 or a wiring. Note that the conductor 612 and the conductor 610 can be formed simultaneously.

[0283] For the conductor 612 and the conductor 610, a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, scandium, or a metal nitride film (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above-described elements as components can be used. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide can also be applied.

[0284] In this embodiment, the conductors 612 and 610 are shown in a single-layer configuration, but the present invention is not limited to this configuration, and a stacked configuration of two or more layers may be used. For example, between a conductor having barrier properties and a conductor having high conductivity, a conductor having barrier properties and a conductor having high adhesion to the conductor having high conductivity may be formed.

[0285] Note that as the conductive material, it is preferable to use a high melting point material such as tungsten or molybdenum that achieves both heat resistance and conductivity, and it is particularly preferable to use tungsten. Further, when forming the conductor simultaneously with other components such as a conductor, a low-resistance metal material such as Cu (copper) or Al (aluminum) may be used.

[0286] In addition, an insulator 640 is provided on the insulator 586, the conductor 612, and the conductor 610. The insulator 640 can be provided using the same material as the insulator 379. Further, the insulator 640 may function as a planarization film that covers the uneven shape below it.

[0287] By using this configuration, in a semiconductor device using a transistor having an oxide semiconductor, miniaturization or high integration can be achieved.

[0288] <Modification example of transistor> The transistor 500A shown in FIGS. 16A to 16C is a modification example of the transistor 500 having the configuration shown in FIGS. 15A to 15C. FIG. 16A is a top view of the transistor 500A, FIG. 16B is a cross-sectional view of the transistor 500A in the channel length direction, and FIG. 16C is a cross-sectional view of the transistor 500A in the channel width direction. In the top view of FIG. 16A, the description of some elements is omitted for clarity of the drawing. Note that the configuration shown in FIGS. 16A to 16C can also be applied to other transistors included in a semiconductor device according to an aspect of the present invention, such as the transistor 550.

[0289] The transistor 500A having the configuration shown in FIGS. 16A to 16C is different from the transistor 500 having the configuration shown in FIGS. 15A to 15C in that it has an insulator 552, an insulator 513, and an insulator 404. Also, the transistor 500A is different from the transistor 500 in that an insulator 552 is provided in contact with the side surface of the conductor 540a and an insulator 552 is provided in contact with the side surface of the conductor 540b. Further, the transistor 500A is different from the transistor 500 in that it does not have an insulator 520.

[0290] Also, in the transistor 500A, an insulator 513 is provided on the insulator 512. Also, an insulator 404 is provided on the insulator 574 and on the insulator 513. In the transistor 500A, the insulators 514, 516, 522, 524, 544, 580, and 574 are patterned, and the insulator 404 is configured to cover them. That is, the insulator 404 is in contact with the upper surface of the insulator 574, the side surface of the insulator 574, the side surface of the insulator 580, the side surface of the insulator 544, the side surface of the insulator 524, the side surface of the insulator 522, the side surface of the insulator 516, the side surface of the insulator 514, and the upper surface of the insulator 513, respectively. Thereby, the oxide 530 etc. are isolated from the outside by the insulator 404 and the insulator 513.

[0291] It is preferable that the insulators 513 and 404 have a high function of suppressing the diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, etc.) or water molecules. For example, it is preferable to use silicon nitride or silicon oxynitride, which are materials having high hydrogen barrier properties, as the insulators 513 and 404. Thereby, it is possible to suppress the diffusion of hydrogen or the like into the oxide 530, so that the deterioration of the characteristics of the transistor 500A can be suppressed. Therefore, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.

[0292] The insulator 552 is provided in contact with the insulator 581, the insulator 404, the insulator 574, the insulator 580, and the insulator 544. The insulator 552 preferably has a function of suppressing the diffusion of hydrogen or water molecules. For example, as the insulator 552, it is preferable to use an insulator such as silicon nitride, aluminum oxide, or silicon oxynitride, which is a material having high hydrogen barrier properties. In particular, since silicon nitride is a material having high hydrogen barrier properties, it is suitable for use as the insulator 552. By using a material having high hydrogen barrier properties as the insulator 552, it is possible to suppress the diffusion of impurities such as water or hydrogen from the insulator 580 or the like through the conductor 540a and the conductor 540b to the oxide 530. In addition, it is possible to suppress the absorption of oxygen contained in the insulator 580 by the conductor 540a and the conductor 540b. As described above, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.

[0293] The configurations, structures, methods, etc. shown in the present embodiment can be used in appropriate combination with the configurations, structures, methods, etc. shown in other embodiments.

[0294] (Embodiment 3) In the present embodiment, a metal oxide (hereinafter also referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment will be described.

[0295] The metal oxide preferably contains either indium or zinc. In particular, it preferably contains indium and zinc. In addition to these, it is preferable that aluminum, gallium, yttrium, tin, etc. are contained. Further, one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. may be contained.

[0296] <Classification of crystal structures> First, the classification of the crystal structure in the oxide semiconductor will be described with reference to FIG. 17A. FIG. 17A is a diagram for explaining the classification of the crystal structure of an oxide semiconductor, typically an IGZO (metal oxide containing In, Ga, and Zn).

[0297] As shown in FIG. 17A, the oxide semiconductor is roughly classified into "Amorphous", "Crystalline", and "Crystal". Further, "completely amorphous" is included in "Amorphous". Also, CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (Cloud-Aligned Composite) are included in "Crystalline". Note that single crystal, poly crystal, and completely amorphous are excluded from the classification of "Crystalline". Also, single crystal and poly crystal are included in "Crystal".

[0298] Note that the structure within the thick frame shown in FIG. 17A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). That is, the structure can be rephrased as a structure completely different from "Crystal" and the energetically unstable "Amorphous".

[0299] Note that the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. Here, the XRD spectrum obtained from the grazing-incidence XRD (GIXD) measurement of the CAAC-IGZO film classified as "Crystalline" is shown in FIG. 17B. Note that the GIXD method is also called the thin-film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained from the GIXD measurement shown in FIG. 17B will be simply referred to as the XRD spectrum. Note that the composition of the CAAC-IGZO film shown in FIG. 17B is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, the thickness of the CAAC-IGZO film shown in FIG. 17B is 500 nm.

[0300] As shown in FIG. 17B, peaks indicating clear crystallinity are detected in the XRD spectrum of the CAAC-IGZO film. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected in the vicinity of 2θ = 31°. Note that, as shown in FIG. 17B, the peak in the vicinity of 2θ = 31° is asymmetric about the angle at which the peak intensity was detected.

[0301] Also, the crystal structure of the film or substrate can be evaluated by the diffraction pattern (also referred to as the nano-beam electron diffraction pattern) observed by the nano-beam electron diffraction method (NBED). The diffraction pattern of the CAAC-IGZO film is shown in FIG. 17C. FIG. 17C is a diffraction pattern observed by NBED in which the electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in FIG. 17C is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Also, in the nano-beam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0302] As shown in FIG. 17C, a plurality of spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0303] <<Structure of Oxide Semiconductor>> Note that when focusing on the crystal structure, the oxide semiconductor may be classified differently from that in FIG. 17A. For example, the oxide semiconductor can be divided into a single-crystalline oxide semiconductor and other non-single-crystalline oxide semiconductors. Examples of the non-single-crystalline oxide semiconductor include the above-mentioned CAAC-OS and nc-OS. In addition, the non-single-crystalline oxide semiconductor includes a polycrystalline oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.

[0304] Here, the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.

[0305] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystal regions, and the c-axis of the plurality of crystal regions is oriented in a specific direction. The specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. In addition, the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region where the lattice arrangements are aligned. Further, CAAC-OS has a region where a plurality of crystal regions are connected in the a-b plane direction, and this region may have strain. The strain refers to a portion where the direction of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in the region where the plurality of crystal regions are connected. That is, CAAC-OS is an oxide semiconductor in which the c-axis is oriented and there is no obvious orientation in the a-b plane direction.

[0306] Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm). When a crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10 nm. In addition, when a crystal region is composed of a large number of minute crystals, the size of the crystal region may be about several tens of nm.

[0307] In addition, in an In-M-Zn oxide (where element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the (M,Zn) layer) are laminated. Note that indium and element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain element M. Note that the In layer may also contain Zn. The layered structure is observed as a lattice image, for example, in a high-resolution TEM image.

[0308] When a structural analysis is performed on a CAAC-OS film using, for example, an XRD apparatus, in an Out-of-plane XRD measurement using a θ / 2θ scan, a peak indicating c-axis orientation is detected at 2θ = 31° or in the vicinity thereof. Note that the position (the value of 2θ) of the peak indicating c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.

[0309] Also, for example, in the electron diffraction pattern of a CAAC-OS film, a plurality of bright spots (spots) are observed. Note that one spot and another spot are observed at point-symmetric positions with the spot of the incident electron beam transmitted through the sample (also referred to as the direct spot) as the center of symmetry.

[0310] When observing the crystal region from the specific direction, the lattice arrangement within the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be an irregular hexagon. Also, in the above-mentioned strain, there may be lattice arrangements such as pentagons and heptagons. In CAAC-OS, even in the vicinity of the strain, no distinct grain boundaries can be confirmed. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is presumably because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal atoms, etc.

[0311] Note that a crystal structure in which distinct grain boundaries are confirmed is called a so-called polycrystal. Grain boundaries can become recombination centers, and carriers are likely to be trapped, causing a decrease in the on-current of the transistor and a decrease in the field-effect mobility. Therefore, CAAC-OS in which no distinct grain boundaries are confirmed is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor. To form CAAC-OS, a configuration having Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are preferable because they can suppress the generation of grain boundaries more than In oxide.

[0312] CAAC-OS is an oxide semiconductor with high crystallinity and no distinct grain boundaries confirmed. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is unlikely to occur. Also, since the crystallinity of the oxide semiconductor may decrease due to the incorporation of impurities and the generation of defects, etc., CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of the oxide semiconductor having CAAC-OS are stable. For this reason, the oxide semiconductor having CAAC-OS is heat-resistant and highly reliable. Also, CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when CAAC-OS is used for the OS transistor, it becomes possible to expand the degree of freedom in the manufacturing process.

[0313] [nc-OS] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In other words, nc-OS has minute crystals. Since the size of the minute crystals is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystals are also referred to as nanocrystals. Further, nc-OS does not show regularity in the crystal orientation among different nanocrystals. Therefore, no orientation is observed in the entire film. Thus, depending on the analysis method, nc-OS may not be distinguishable from a-like OS and an amorphous oxide semiconductor. For example, when performing structural analysis on an nc-OS film using an XRD apparatus, in an Out-of-plane XRD measurement using θ / 2θ scan, no peak indicating crystallinity is detected. Further, when performing electron beam diffraction (also referred to as restricted-view electron beam diffraction) using an electron beam having a probe diameter larger than that of the nanocrystals (for example, 50 nm or more) on the nc-OS film, a diffraction pattern such as a halo pattern is observed. On the other hand, when performing electron beam diffraction (also referred to as nano-beam electron beam diffraction) using an electron beam having a probe diameter close to or smaller than that of the nanocrystals (for example, 1 nm or more and 30 nm or less) on the nc-OS film, an electron beam diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be obtained.

[0314] [a-like OS] a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor. a-like OS has a loose or low-density region. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Further, a-like OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0315] [[Constitution of Oxide Semiconductor]] Next, the details of the above-described CAC-OS will be described. Note that CAC-OS relates to the material constitution.

[0316] [CAC-OS] CAC-OS is, for example, a component of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, in the metal oxide, a state in which one or more metal elements are unevenly distributed and the regions having the metal elements are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof is also referred to as a mosaic state or a patch state.

[0317] Furthermore, CAC-OS is a structure in which the material is separated into a first region and a second region to form a mosaic state, and the first region is a structure distributed in the film (hereinafter also referred to as a cloud state). That is, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0318] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0319] Specifically, the first region is a region mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. That is, the first region can be rephrased as a region mainly composed of In. The second region can be rephrased as a region mainly composed of Ga.

[0320] Note that there may be cases where no clear boundary can be observed between the above-mentioned first region and the second region.

[0321] For example, in CAC-OS in In-Ga-Zn oxide, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that the region mainly composed of In (the first region) and the region mainly composed of Ga (the second region) are unevenly distributed and have a mixed structure.

[0322] When using CAC-OS in a transistor, the conductivity caused by the first region and the insulating property caused by the second region act complementarily, thereby enabling the function of switching (the function of turning on / off) to be imparted to CAC-OS. That is, CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be maximally enhanced. Therefore, by using CAC-OS in a transistor, a high on-current (I on ), a high field-effect mobility (μ), and a good switching operation can be realized.

[0323] Oxide semiconductors have various structures and each has different characteristics. The oxide semiconductor according to one aspect of the present invention may have two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0324] <Transistor having an oxide semiconductor> Subsequently, the case of using the above-mentioned oxide semiconductor in a transistor will be described.

[0325] By using the above-described oxide semiconductor for a transistor, a transistor with high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0326] For a transistor, it is preferable to use an oxide semiconductor with a low carrier concentration. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, still more preferably 1×10 11 cm -3 or less, even more preferably 1×10 10 cm -3 or less, and 1×10 -9 cm -3 or more. In the case of reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced and the density of defect levels may be reduced. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as highly pure intrinsic or substantially highly pure intrinsic. In some cases, an oxide semiconductor with a low carrier concentration may be referred to as a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor.

[0327] Also, since an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic has a low density of defect levels, the density of trap levels may also be low.

[0328] Also, the time required for the charges trapped in the trap levels of the oxide semiconductor to disappear may be long, and they may behave as if they were fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics.

[0329] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Further, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0330] <Impurity> Here, the influence of each impurity in the oxide semiconductor will be described.

[0331] When silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor, defect levels are formed in the oxide semiconductor. For this reason, the concentration of silicon and carbon in the oxide semiconductor and the concentration of silicon and carbon near the interface with the oxide semiconductor (the concentration obtained by secondary ion mass spectrometry (SIMS)) are set to 2×10 18 atoms / cm 3 or less, preferably 2×10 17 atoms / cm 3 or less.

[0332] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0333] In an oxide semiconductor, when nitrogen is contained, electrons as carriers are generated, the carrier concentration increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have normally-on characteristics. Or, in an oxide semiconductor, when nitrogen is contained, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. Therefore, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to be less than 5×10 19 atoms / cm 3 , preferably less than 5×10 18 atoms / cm 3 , more preferably less than 1×10 18 atoms / cm 3 , even more preferably less than 5×10 17 atoms / cm 3 .

[0334] In addition, hydrogen contained in the oxide semiconductor may react with oxygen bonded to metal atoms to form water, thereby forming oxygen vacancies. When hydrogen enters the oxygen vacancies, electrons as carriers may be generated. Also, a part of hydrogen may bond with oxygen bonded to metal atoms to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that the hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is set to be less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , even more preferably less than 1×10 18 atoms / cm 3 .

[0335] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0336] The configurations, structures, methods, etc. shown in this embodiment can be appropriately combined and used with those shown in other embodiments, etc.

[0337] (Embodiment 4) In this embodiment, as an example of a semiconductor device, an IC chip, an electronic component, an electronic device, etc. will be described.

[0338] <Example of method for manufacturing an electronic component> FIG. 18A is a flowchart showing an example of a method for manufacturing an electronic component. An electronic component is also referred to as a semiconductor package or an IC package. This electronic component has a plurality of standards and names depending on the terminal extraction direction or the shape of the terminals. Therefore, in this embodiment, an example thereof will be described.

[0339] A semiconductor device composed of transistors is completed by attaching a plurality of detachable components to a printed circuit board through an assembly process (post-process). The post-process can be completed by going through each process shown in FIG. 18A. Specifically, after the element substrate obtained in the pre-process is completed (step ST71), the back surface of the substrate is ground. At this stage, the substrate is thinned to reduce warping of the substrate in the pre-process and to miniaturize the components. Next, a dicing process for separating the substrate into a plurality of chips is performed (step ST72).

[0340] FIG. 18B is a top view of a semiconductor wafer 7100 before the dicing process is performed. FIG. 18C is a partially enlarged view of FIG. 18B. A plurality of circuit regions 7102 are provided on the semiconductor wafer 7100. In the circuit region 7102, a semiconductor device according to the embodiment of the present invention (for example, a holding circuit, a memory device, an imaging device, an MCU, etc.) is provided.

[0341] The plurality of circuit regions 7102 are each surrounded by a separation region 7104. A separation line (also referred to as a "dicing line") 7106 is set at a position overlapping the separation region 7104. In the dicing process (step ST72), the semiconductor wafer 7100 is cut along the separation line 7106 to cut out the chip 7110 including the circuit region 7102 from the semiconductor wafer 7100. An enlarged view of the chip 7110 is shown in FIG. 18D.

[0342] A conductive layer or a semiconductor layer may be provided in the separation region 7104. By providing a conductive layer or a semiconductor layer in the separation region 7104, ESD that may occur during the dicing process can be mitigated, and a decrease in yield due to the dicing process can be prevented. In general, the dicing process is performed while supplying pure water with a reduced resistivity by dissolving carbon dioxide gas or the like to the cutting part for the purpose of cooling the substrate, removing chips, preventing charging, and the like. By providing a conductive layer or a semiconductor layer in the separation region 7104, the amount of use of the pure water can be reduced. Therefore, the production cost of the semiconductor device can be reduced. In addition, the productivity of the semiconductor device can be increased.

[0343] After performing step ST72, a die bonding process is performed in which the separated chips are individually picked up and mounted and joined on a lead frame (step ST73). As the bonding method between the chip and the lead frame in the die bonding process, a method suitable for the product may be selected. For example, the bonding may be performed by resin or tape. In the die bonding process, the chip may be mounted and joined on an interposer. In a wire bonding process, the lead of the lead frame and the electrode on the chip are electrically connected with a thin metal wire (wire) (step ST74). As the thin metal wire, a silver wire or a gold wire can be used. The wire bonding may be either ball bonding or wedge bonding.

[0344] The wire-bonded chip is encapsulated with an epoxy resin or the like, and a molding process is performed (step ST75). By performing the molding process, the inside of the electronic component is filled with resin, which can reduce damage to the built-in circuit portion and wires due to mechanical external force, and can also reduce deterioration of characteristics caused by moisture and dust. The leads of the lead frame are plated. Then, the leads are cut and formed (step ST76). The plating process can prevent the leads from rusting and enable more reliable soldering when later mounted on a printed circuit board. Printing processing (marking) is performed on the surface of the package (step ST77). Through the inspection process (step ST78), the electronic component is completed (step ST79). By incorporating the semiconductor device of the above-described embodiment, a small-sized electronic component with low power consumption can be provided.

[0345] A perspective schematic view of the completed electronic component is shown in FIG. 18E. In FIG. 18E, as an example of the electronic component, a perspective schematic view of a QFP (Quad Flat Package) is shown. As shown in FIG. 18E, the electronic component 7000 has leads 7001 and a chip 7110.

[0346] The electronic component 7000 is mounted on, for example, a printed circuit board 7002. A plurality of such electronic components 7000 are combined and electrically connected on the printed circuit board 7002, whereby they can be mounted on an electronic device. The completed circuit board 7004 is provided inside an electronic device or the like. By mounting the electronic component 7000, the power consumption of the electronic device can be reduced. Or, it becomes easier to miniaturize the electronic device.

[0347] The electronic component 7000 can be applied to electronic components (IC chips) in a wide range of fields of electronic devices, such as digital signal processing, software radio, avionics (electronic devices related to aviation such as communication devices, navigation systems, autopilot devices, flight management systems, etc.), ASIC prototyping, medical image processing, speech recognition, cryptography, bioinformatics (bioinformatics), emulators of mechanical devices, and radio telescopes in radio astronomy. Such electronic devices include cameras (video cameras, digital still cameras, etc.), display devices, personal computers (PCs), mobile phones, game machines including portable ones, portable information terminals (smartphones, tablet information terminals, etc.), electronic book terminals, wearable information terminals (watch type, head-mounted type, goggle type, glasses type, armband type, bracelet type, necklace type, etc.), navigation systems, audio playback devices (car audio, digital audio players, etc.), copiers, facsimiles, printers, printer multifunction devices, automated teller machines (ATMs), vending machines, and household electrical appliances.

[0348] The configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, structures, methods, etc. shown in other embodiments.

[0349] (Embodiment 5) In this embodiment, an example of an electronic device having a semiconductor device according to an aspect of the present invention will be described. FIGS. 19A to 19J show an example of the electronic device. Note that FIGS. 19A to 19J show a state in which the electronic component 7000 having a semiconductor device according to an aspect of the present invention is included in each electronic device.

[0350] In various electronic devices, for example, AD conversion for converting various analog information such as acoustic information, imaging information, illuminance information, and temperature information into digital information may be performed. By using the semiconductor device according to one aspect of the present invention in an electronic device, AD conversion with suppressed power consumption can be performed. That is, by using the semiconductor device according to one aspect of the present invention in an electronic device, power consumption can be reduced. Further, by using the semiconductor device according to one aspect of the present invention, high-precision AD conversion can be realized. Further, by using the semiconductor device according to one aspect of the present invention, high-speed AD conversion can be realized.

[0351] [Mobile phone] The information terminal 5500 shown in FIG. 19A is a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 includes a housing 5510, a display unit 5511, a speaker 5512, a camera 5513, a microphone 5514, etc. As an input interface, a touch panel is provided in the display unit 5511, and an operation switch 5515 is provided in the housing 5510.

[0352] The information terminal 5500 can hold temporary files (for example, caches when using a web browser, etc.) generated when an application is executed. In the information terminal 5500, AD conversion for converting various analog information such as acoustic information, imaging information, and illuminance information into digital information is performed.

[0353] [Wearable terminal] Further, FIG. 19B shows an information terminal 5900, which is an example of a wearable terminal. The information terminal 5900 includes a housing 5901, a display unit 5902, operation switches 5903 and 5904, a band 5905, etc.

[0354] The information terminal 5900 includes various sensors such as a temperature sensor, a pressure sensor, and an illuminance sensor. In the information terminal 5900, AD conversion for converting analog information obtained by various sensors into digital information is performed.

[0355] [Information terminal] In addition, FIG. 19C shows a desktop information terminal 5300. The desktop information terminal 5300 includes a main body 5301 of the information terminal, a display unit 5302, a keyboard 5303, a camera 5304, and the like.

[0356] Similar to the information terminal 5500 described above, the desktop information terminal 5300 performs AD conversion or the like that converts various analog information into digital information.

[0357] In the above description, smartphones, wearable terminals, and desktop information terminals are taken as examples of electronic devices and are illustrated in FIGS. 19A to 19C, respectively. However, information terminals other than smartphones, wearable terminals, and desktop information terminals can be applied. Examples of information terminals other than smartphones, wearable terminals, and desktop information terminals include PDAs (Personal Digital Assistants), notebook information terminals, workstations, and the like.

[0358] [Household Appliance] In addition, FIG. 19D shows an electric refrigerator-freezer 5800 as an example of a household appliance. The electric refrigerator-freezer 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like. For example, the electric refrigerator-freezer 5800 is an electric refrigerator-freezer compatible with IoT (Internet of Things).

[0359] The semiconductor device according to one aspect of the present invention can be applied to the electric refrigerator-freezer 5800. The electric refrigerator-freezer 5800 can transmit and receive information such as the food stored in the electric refrigerator-freezer 5800 and the expiration date of the food to and from an information terminal or the like through the Internet or the like. In the electric refrigerator-freezer 5800, AD conversion or the like that converts various analog information such as the temperature inside the cabinet into digital information is performed.

[0360] In this example, an electric refrigerator is described as an electric appliance. Other electric appliances include, for example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, IH cookers, water servers, air conditioners and other heating and cooling appliances, washing machines, dryers, audio-visual equipment, etc.

[0361] [Game console] In addition, FIG. 19E shows a portable game console 5200 which is an example of a game console. The portable game console 5200 includes a housing 5201, a display unit 5202, an operation switch 5203, an illuminance sensor 5204, a microphone 5205, etc.

[0362] Furthermore, FIG. 19F shows a stationary game console 7500 which is an example of a game console. The stationary game console 7500 includes a main body 7520 and a controller 7522. Note that the controller 7522 can be connected to the main body 7520 wirelessly or by wire. Although not shown in FIG. 19F, the controller 7522 can include a display unit for displaying game images, a touch panel serving as an input interface other than the operation switch, a stick, a rotary knob, a slide knob, or a microphone, etc. Also, the controller 7522 is not limited to the shape shown in FIG. 19F, and the shape of the controller 7522 can be changed variously according to the genre of the game. For example, in a shooting game such as FPS (First Person Shooter), a controller shaped like a gun with a trigger as the operation switch can be used. Also, for example, in a music game, etc., a controller shaped like a musical instrument or a music device can be used. Furthermore, the stationary game console may be in a form that does not use a controller and instead includes a camera, a depth sensor, a microphone, etc., and is operated by the gestures and / or voices of the game player.

[0363] In addition, the video of the game machine described above can be output by a display device such as a television device, a personal computer display, a game display, or a head-mounted display.

[0364] Also, in a portable game machine 5200 or a stationary game machine 7500, AD conversion or the like for converting various analog information into digital information is performed. By using the semiconductor device according to one aspect of the present invention in the portable game machine 5200 or the stationary game machine 7500, a low-power portable game machine 5200 or a low-power stationary game machine 7500 can be realized. In addition, since heat generation from the circuit can be reduced due to low power consumption, the influence on the circuit itself, peripheral circuits, and modules due to heat generation can be minimized.

[0365] As game machines, which are a type of electronic device, the portable game machine 5200 and the stationary game machine 7500 are shown. However, as the electronic device according to one aspect of the present invention, for example, arcade game machines installed in entertainment facilities (such as game centers and amusement parks), pitching machines for batting practice installed in sports facilities, and the like are also included.

[0366] [Mobile object] The semiconductor device described in the above embodiment can be applied to an automobile, which is a mobile object, and the periphery of the driver's seat of the automobile.

[0367] FIG. 19G shows an automobile 5700, which is an example of a mobile object.

[0368] Around the driver's seat of the automobile 5700, an instrument panel that provides various information by displaying speed, engine speed, mileage, remaining fuel amount, gear state, air conditioner setting state, and the like is provided. In addition, a display device for indicating those information may be provided around the driver's seat.

[0369] In particular, by using the display device and the video from an imaging device (not shown) provided outside the vehicle 5700, it is possible to supplement the field of view blocked by pillars and the like and the blind spots of the driver's seat, thereby enhancing safety.

[0370] In the vehicle 5700, AD conversion and the like for converting various analog information into digital information are performed. The digital information obtained by AD conversion is used in systems for performing automatic driving, road guidance, and danger prediction. The semiconductor device according to one aspect of the present invention can perform highly accurate AD conversion. Alternatively, the semiconductor device according to one aspect of the present invention can perform high-speed AD conversion. By using the semiconductor device according to one aspect of the present invention, the calculation processing accuracy of automatic driving, road guidance, danger prediction, and the like can be enhanced. By using the semiconductor device according to one aspect of the present invention, the calculation processing speed of automatic driving, road guidance, danger prediction, and the like can be enhanced.

[0371] In the above description, the vehicle is described as an example of the moving body, but the moving body is not limited to the vehicle. For example, examples of the moving body include trains, monorails, ships, flying bodies (helicopters, unmanned aerial vehicles (drones), airplanes, rockets), and the like.

[0372] [Camera] The semiconductor device according to one aspect of the present invention can be applied to a camera.

[0373] FIG. 19H shows a digital camera 6240 which is an example of an imaging device. The digital camera 6240 includes a housing 6241, a display unit 6242, an operation switch 6243, a shutter button 6244, and the like. A detachable lens 6246 is attached to the digital camera 6240. Here, the digital camera 6240 is configured such that the lens 6246 can be removed from the housing 6241 and replaced, but the lens 6246 and the housing 6241 may be integrated. Further, the digital camera 6240 may be configured such that a strobe device or a viewfinder can be separately attached.

[0374] By applying the semiconductor device according to one aspect of the present invention to the digital camera 6240, high-speed AD conversion can be realized. Further, since the power consumption is reduced, heat generation from the circuit can be reduced, and thus the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be minimized.

[0375] [Video camera] The semiconductor device described in the above embodiment can be applied to a video camera.

[0376] FIG. 19I shows a video camera 6300 which is an example of an imaging device. The video camera 6300 includes a first housing 6301, a second housing 6302, a display unit 6303, an operation switch 6304, a lens 6305, a connection unit 6306, and the like. The operation switch 6304 and the lens 6305 are provided on the first housing 6301, and the display unit 6303 is provided on the second housing 6302. The first housing 6301 and the second housing 6302 are connected by the connection unit 6306, and the angle between the first housing 6301 and the second housing 6302 can be changed by the connection unit 6306. The video on the display unit 6303 may be switched according to the angle between the first housing 6301 and the second housing 6302 at the connection unit 6306.

[0377] By applying the semiconductor device according to one aspect of the present invention to the video camera 6300, high-speed AD conversion can be realized. Further, since the power consumption is reduced, heat generation from the circuit can be reduced, and thus the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be minimized.

[0378] [ICD] The semiconductor device described in the above embodiment can be applied to an implantable cardioverter defibrillator (ICD).

[0379] FIG. 19J is a schematic cross-sectional view showing an example of an ICD. The ICD body 5400 includes at least a battery 5401, electronic components 7000, a regulator, a control circuit, an antenna 5404, a wire 5402 to the right atrium, and a wire 5403 to the right ventricle.

[0380] The ICD body 5400 is surgically implanted in the body, and the two wires are passed through the subclavian vein 5405 and the superior vena cava 5406 of the human body so that one wire tip is placed in the right ventricle and the other wire tip is placed in the right atrium.

[0381] The ICD body 5400 has a function as a pacemaker and performs pacing on the heart when the heart rate deviates from the specified range. Also, when the heart rate is not improved by pacing (such as rapid ventricular tachycardia and ventricular fibrillation), treatment by electric shock is performed.

[0382] The ICD body 5400 needs to constantly monitor the heart rate in order to perform pacing and electric shock appropriately. Therefore, the ICD body 5400 is provided with a sensor for detecting the heart rate. Also, the ICD body 5400 can store in the electronic components 7000 data on the heart rate acquired by the sensor and the like, the number of times and time of treatment by pacing, and the like.

[0383] Also, power can be received by the antenna 5404, and the power is charged to the battery 5401. Also, by providing the ICD body 5400 with a plurality of batteries, the safety can be enhanced. Specifically, even if some of the batteries of the ICD body 5400 become unusable, the remaining batteries can function, so it also functions as an auxiliary power source.

[0384] Also, separately from the antenna 5404 that can receive power, it may have an antenna that can transmit physiological signals. For example, a system for monitoring heart activity may be configured such that physiological signals such as pulse, respiratory rate, heart rate, and body temperature can be confirmed by an external monitoring device.

[0385] By applying the semiconductor device according to one aspect of the present invention to the ICD body 5400, high-speed AD conversion can be realized. Further, since the power consumption is reduced, heat generation from the circuit can be reduced, so that the influence of the heat generation on the circuit itself, the peripheral circuit, and the module can be minimized. Therefore, the reliability of the ICD body 5400 can be enhanced.

[0386] The configurations, structures, methods, etc. shown in the present embodiment can be used in appropriate combination with the configurations, structures, methods, etc. shown in other embodiments, etc.

Description of Reference Numerals

[0387] 100: Semiconductor device, 110: Differential circuit, 111: Transistor, 112: Transistor, 113: Transistor, 114: Transistor, 115: Transistor, 120: Latch circuit, 121: Transistor, 122: Transistor, 123: Transistor, 124: Transistor, 125: Transistor, 126: Transistor, 127: Transistor

Claims

1. comprising a differential circuit and a latch circuit, wherein the differential circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor, wherein the latch circuit includes a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the eleventh transistor, and the twelfth transistor include an oxide semiconductor in a channel formation region, wherein the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor include a single semiconductor or a compound semiconductor in a channel formation region, wherein one of a source or a drain of the first transistor is electrically connected to a first terminal, wherein the other of the source or the drain of the first transistor is electrically connected to one of a source or a drain of the third transistor, wherein one of a source or a drain of the second transistor is electrically connected to the first terminal, wherein the other of the source or the drain of the second transistor is electrically connected to one of a source or a drain of the fourth transistor, wherein the other of the source or the drain of the third transistor and the other of the source or the drain of the fourth transistor are electrically connected to one of a source or a drain of the fifth transistor, wherein a gate of the first transistor and a gate of the second transistor are electrically connected to a second terminal, wherein a gate of the third transistor is electrically connected to a third terminal, wherein a gate of the fourth transistor is electrically connected to a fourth terminal, wherein a gate of the fifth transistor is electrically connected to a fifth terminal, wherein the other of the source or the drain of the fifth transistor is electrically connected to a sixth terminal, wherein one of a source or a drain of the sixth transistor is electrically connected to a seventh terminal, wherein the other of the source or the drain of the sixth transistor is electrically connected to one of a source or a drain of the seventh transistor, wherein the other of the source or the drain of the seventh transistor is electrically connected to one of a source or a drain of the ninth transistor, One of the source or drain of the eighth transistor is electrically connected to the other of the source or drain of the sixth transistor, The gate of the sixth transistor is electrically connected to the eighth terminal, The other of the source or drain of the eighth transistor is electrically connected to one of the source or drain of the tenth transistor, The gates of the seventh transistor and the ninth transistor are electrically connected to one of the source or drain of the tenth transistor, The gates of the eighth transistor and the tenth transistor are electrically connected to one of the source or drain of the ninth transistor, One of the source or drain of the eleventh transistor is electrically connected to the ninth terminal and one of the source or drain of the ninth transistor, One of the source or drain of the twelfth transistor is electrically connected to the tenth terminal and one of the source or drain of the tenth transistor, The other of the source or drain of the ninth transistor, the other of the source or drain of the tenth transistor, the other of the source or drain of the eleventh transistor, and the other of the source or drain of the twelfth transistor are electrically connected to the eleventh terminal, The gate of the eleventh transistor is electrically connected to one of the source or drain of the third transistor, The gate of the twelfth transistor is electrically connected to one of the source or drain of the fourth transistor, a semiconductor device.

2. In claim 1, The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the eleventh transistor, and the twelfth transistor are disposed in a first layer, The sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor are disposed in a second layer, The first layer is disposed above the second layer, a semiconductor device.

3. In claim 1 or claim 2, The oxide semiconductor contains at least one of indium or zinc, a semiconductor device.

4. In any one of claims 1 to 3, The single semiconductor is silicon, a semiconductor device.

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