Liquid crystal display device

Abstract

To provide, in a semiconductor device including a holding capacitor with a light-transmitting property including a semiconductor film with a light-transmitting property, a conductive film, and an insulating film, a driving method for stably operating the holding capacitor.SOLUTION: A display device includes a pixel including an enhancement transistor, a pixel electrode to which a predetermined potential is supplied from a signal line through the transistor, and a holding capacitor having the pixel electrode functioning as one electrode, electrically connected to a capacitor line, and including a semiconductor film with a light-transmitting property that functions as the other electrode. The potential in which the potential difference between the pixel electrode and the capacitor line becomes higher than a threshold voltage of the holding capacitor is supplied to the capacitor line.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The invention disclosed in this specification and the like relates to a semiconductor device and a method for driving the semiconductor device.

Background Art

[0002] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely popular. In a display device such as an LCD, within pixels arranged in the row direction and the column direction, there are provided a transistor as a switching element, a liquid crystal element electrically connected to the transistor, and a holding capacitor connected in parallel with the liquid crystal element. As a semiconductor material constituting the semiconductor film included in the transistor, silicon semiconductors such as amorphous (non-crystalline) silicon or poly (polycrystalline) silicon are widely used.

[0003] Moreover, a metal oxide exhibiting semiconductor characteristics (hereinafter referred to as an oxide semiconductor) is a semiconductor material applicable to the semiconductor film included in a transistor. For example, techniques for fabricating a transistor using zinc oxide or an In-Ga-Zn-based oxide semiconductor are disclosed (see Patent Document 1 and Patent Document 2).

[0004] In a display device, a dielectric film is provided between a pair of electrodes of the holding capacitor, and at least one of the pair of electrodes is often formed of a conductive film having light-shielding properties such as a gate electrode, a source electrode, or a drain electrode constituting the transistor.

[0005] The larger the capacitance value of the holding capacitor, the more the liquid crystal molecules of the liquid crystal element in a situation where an electric field is applied.

[0006] The period during which the orientation can be kept constant can be extended, and power consumption of the display device can be reduced. This is desirable.

[0007] For example, in order to increase the charge capacity of the storage capacitor, the area occupied by the storage capacitor is increased. Specifically, there is a method of increasing the area where a pair of electrodes overlap. However, in the above display device, if the area of the conductive film having light-shielding property is increased to increase the area where a pair of electrodes overlap, the aperture ratio of the pixel is reduced and the display quality of the image is degraded.

[0008] Therefore, a technique is disclosed in which a storage capacitor having translucency formed using a translucent material is provided in the display device, enabling an increase in charge capacity without reducing the aperture ratio (see Patent Document 3).

Prior Art Documents

Patent Documents

[0009]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0010] In the storage capacitor of the display device disclosed in Patent Document 3, a semiconductor film having translucency is used for one electrode, a conductive film having translucency (specifically, a pixel electrode) is used for the other electrode, and an insulating film having translucency is used for the dielectric film. Also, one electrode included in the storage capacitor is included in a display device and is a channel layer (specifically, an oxide semiconductor) provided on a gate insulating layer of a thin film transistor (TFT) which is a switching element. And the oxide semiconductor used as the one electrode is an oxide semiconductor with increased electron density and can be used for a depletion-type TFT. Further, the other electrode uses a pixel electrode. In Patent Document 3, the potential difference (voltage) between the common potential applied to the capacitance line connected to the one electrode and the pixel potential applied to the pixel electrode is in the vicinity of 0V to operate the holding capacitance. When one electrode of the holding capacitance is an oxide semiconductor with increased electron density as in Patent Document 3, considering the manufacturing method of the display device, the TFT functioning as a switching element included in the display device can be a depletion-type TFT. When a depletion-type transistor is used as the switching element, the threshold voltage of the transistor is a voltage lower than 0V. Also, generally, in a display device, the video data potential supplied to the display element uses a potential within the potential amplitude centered on the common potential, and the common potential is often set to 0V. As described above, in a display device having a holding capacitance formed using an oxide semiconductor included in a depletion-type TFT as in Patent Document 3, since the voltage range required to drive the display device becomes wide, the display device has increased power consumption. Also, in order for the TFT to function as a switching element, the TFT always...

[0011]

[0012]

[0013] ​​​​​​​​​​​​​​​Applying a voltage thereto also causes an increase in the power consumption of the display device.

[0014] Therefore, one aspect of the present invention is a semiconductor device including a light-transmissive holding capacitor composed of a light-transmissive semiconductor film, a light-transmissive conductive film, and a light-transmissive insulating film, and an object thereof is to provide a semiconductor device with reduced power consumption.

[0015] In addition, in the holding capacitor described in Patent Document 3, during its operation, a positive bias is constantly applied to the light-transmissive conductive film which is the other electrode. Therefore, the threshold voltage of the holding capacitor varies in the positive direction over time. Therefore, when the voltage range for operating the holding capacitor is near 0 V, there is a possibility that the holding capacitor may not operate due to the change over time of the threshold voltage.

[0016] Therefore, in a holding capacitor using an oxide semiconductor for one electrode, it is significant to widen its operating range.

[0017] Therefore, one aspect of the present invention is a semiconductor device including a light-transmissive holding capacitor composed of a light-transmissive semiconductor film, a light-transmissive conductive film, and a light-transmissive insulating film, and an object thereof is to provide a driving method for stably operating the holding capacitor.

[0018] Another aspect of the present invention is to provide a semiconductor device capable of stably operating a light-transmissive holding capacitor.

Means for Solving the Problems

[0019] In view of the above problems, one aspect of the present invention is an enhancement-type transistor and a transistor A holding capacitor electrically connected to a resistor, a capacitance line electrically connected to the holding capacitor, a transistor, and a display element electrically connected to the holding capacitor, wherein the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that makes the translucent semiconductor film conductive. A semiconductor device comprising a transistor, a holding capacitor electrically connected to the transistor, a capacitance line electrically connected to the holding capacitor, and a display element electrically connected to the transistor and the holding capacitor, wherein the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that is greater than the threshold voltage of the holding capacitor. The holding capacitor can be formed by using the formation process of the transistor. The translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. That is, as one electrode of the holding capacitor, it can be formed by using the formation process of the semiconductor film included in the transistor. The holding capacitor can be formed by using the formation process of the transistor. The translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. That is, as one electrode of the holding capacitor, it can be formed by using the formation process of the semiconductor film included in the transistor. A semiconductor device, characterized in that the holding capacitor is electrically connected to a resistor, a capacitance line electrically connected to the holding capacitor, a transistor, and a display element electrically connected to the holding capacitor, the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that makes the translucent semiconductor film conductive.

[0020] Also, one aspect of the present invention is an enhancement-type transistor, a holding capacitor electrically connected to the transistor, a capacitance line electrically connected to the holding capacitor, a transistor, and a display element electrically connected to the holding capacitor and the holding capacitor, the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that is greater than the threshold voltage of the holding capacitor. A semiconductor device, characterized in that the holding capacitor is electrically connected to a resistor, a capacitance line electrically connected to the holding capacitor, a transistor, and a display element electrically connected to the holding capacitor, the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that makes the translucent semiconductor film conductive. The holding capacitor can be formed by using the formation process of the transistor. The translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. That is, the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that makes the translucent semiconductor film conductive. A semiconductor device, characterized in that the holding capacitor is electrically connected to a resistor, a capacitance line electrically connected to the holding capacitor, a transistor, and a display element electrically connected to the holding capacitor, the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that makes the translucent semiconductor film conductive. The holding capacitor can be formed by using the formation process of the transistor. The translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. That is, as one electrode of the holding capacitor, it can be formed by using the formation process of the semiconductor film included in the transistor. A semiconductor device, characterized in that the holding capacitor is electrically connected to a resistor, a capacitance line electrically connected to the holding capacitor, a transistor, and a display element electrically connected to the holding capacitor, the holding capacitor is electrically connected to the capacitance line, has a translucent semiconductor film that functions as one electrode, a translucent conductive film that functions as the other electrode and is included in the display element, and a dielectric film provided between the one electrode and the other electrode, and has a threshold voltage of 0 V or more, and the holding capacitor operates based on a potential difference between the translucent conductive film and the capacitance line that makes the translucent semiconductor film conductive.

[0021] The holding capacitor can be formed by using the formation process of the transistor. The translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. That is, the holding capacitor can be formed by using the formation process of the transistor. The translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. That is, the translucent semiconductor film that functions as one electrode of the holding capacitor can be formed by using the formation process of the semiconductor film included in the transistor. The semiconductor film having translucency is formed on the same surface as the semiconductor film having translucency of the transistor. An oxide semiconductor film can be used for the semiconductor film having translucency of the transistor. A transistor using an oxide semiconductor film formed by performing appropriate processing is an enhancement type transistor. And since the off-current of the transistor is extremely low, the power consumption of the semiconductor device can be reduced.

[0022] In the following, the semiconductor film included in the transistor and the semiconductor film having translucency of the holding capacitor are described as oxide semiconductor films.

[0023] In the above, the oxide semiconductor film of the holding capacitor and the oxide semiconductor film of the transistor have the same carrier density. And the oxide semiconductor film of the holding capacitor is an oxide semiconductor film in which no treatment for increasing the conductivity by adding impurities for intentionally increasing the carrier density is performed.

[0024] As in the semiconductor device which is one aspect of the present invention, a transistor functioning as a switching element is an enhancement type transistor having an oxide semiconductor film, and an oxide semiconductor film formed simultaneously with the oxide semiconductor film constituting the enhancement type transistor is used for one electrode of the holding capacitor. By doing so, the voltage range for driving the semiconductor device can be made narrower than that of a semiconductor device using a depletion type transistor, and the power consumption of the semiconductor device can be reduced.

[0025] Also, the dielectric film of the holding capacitor is provided on the oxide semiconductor film included in the transistor. An insulating film can be applied, and a light-transmitting conductive film that functions as the other electrode of the storage capacitor is included in the display element and can be applied as a pixel electrode electrically connected to the transistor. By doing so, since the storage capacitor has light-transmittance, it can be formed largely (in a large area) in a region other than the location where the transistor is formed in the pixel. Therefore, according to one aspect of the present invention, a semiconductor device with an increased charge capacity while increasing the aperture ratio can be obtained. Also, a semiconductor device with excellent display quality can be obtained by improving the aperture ratio.

[0026] Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device. One aspect of the present invention is a driving method for a display device including a pixel having an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, a storage capacitor having a light-transmitting semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode, the method including: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having the gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line such that the potential difference between the light-transmitting semiconductor film and the capacitance line is higher than the threshold voltage of the storage capacitor, and holding the potential difference between the potential of the pixel electrode and the potential of the capacitance line in the storage capacitor for a certain period. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device. One aspect of the present invention is a driving method for a display device including a pixel having an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, a storage capacitor having a light-transmitting semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode, the method including: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having the gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line such that the potential difference between the light-transmitting semiconductor film and the capacitance line is higher than the threshold voltage of the storage capacitor, and holding the potential difference between the potential of the pixel electrode and the potential of the capacitance line in the storage capacitor for a certain period. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device.

[0027] Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device.

[0028] One aspect of the present invention includes an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, and a storage capacitor having a light-transmitting semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode. A driving method for a display device including a pixel having the above components includes: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having the gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line such that the potential difference between the light-transmitting semiconductor film and the capacitance line is higher than the threshold voltage of the storage capacitor, and holding the potential difference between the potential of the pixel electrode and the potential of the capacitance line in the storage capacitor for a certain period. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device. One aspect of the present invention is a driving method for a display device including a pixel having an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, a storage capacitor having a light-transmitting semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode, the method including: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having the gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line such that the potential difference between the light-transmitting semiconductor film and the capacitance line is higher than the threshold voltage of the storage capacitor, and holding the potential difference between the potential of the pixel electrode and the potential of the capacitance line in the storage capacitor for a certain period. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device. One aspect of the present invention is a driving method for a display device including a pixel having an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, a storage capacitor having a light-transmitting semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode, the method including: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having the gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line such that the potential difference between the light-transmitting semiconductor film and the capacitance line is higher than the threshold voltage of the storage capacitor, and holding the potential difference between the potential of the pixel electrode and the potential of the capacitance line in the storage capacitor for a certain period. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device. One aspect of the present invention is a driving method for a display device including a pixel having an enhancement-type transistor, a pixel electrode to which a predetermined potential is supplied from a signal line via the transistor, a storage capacitor having a light-transmitting semiconductor film that functions as one electrode and is electrically connected to a capacitance line and functions as the other electrode, the method including: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having the gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line such that the potential difference between the light-transmitting semiconductor film and the capacitance line is higher than the threshold voltage of the storage capacitor, and holding the potential difference between the potential of the pixel electrode and the potential of the capacitance line in the storage capacitor for a certain period. Note that one aspect of the present invention includes not only the above semiconductor device but also a driving method for the above semiconductor device.

[0029] Also, one aspect of the present invention is an enhancement-type transistor, and through the transistor a pixel electrode to which a predetermined potential is supplied from a signal line, the pixel electrode functioning as one electrode, a holding capacitor having a translucent semiconductor film that is electrically connected to a capacitance line and functions as the other electrode. A driving method for a display device including a pixel having a holding capacitor, the method comprising: supplying a potential equal to or higher than the threshold voltage of the transistor to a scanning line having a gate electrode of the transistor to turn on the transistor; supplying a predetermined potential from the signal line to the pixel electrode; and supplying a potential to the capacitance line that is lower than the predetermined potential supplied to the pixel electrode by at least the threshold voltage of the holding capacitor, so as to hold a potential difference between the potential of the pixel electrode and the potential of the capacitance line for a certain period. This is a driving method for a semiconductor device. By the above driving method, the operating range of the holding capacitor of a semiconductor device including a holding capacitor having a translucent semiconductor film, a translucent conductive film, and a translucent insulating film can be widened, and the holding capacitor can be stably operated. In this specification, the threshold voltage of the holding capacitor refers to the voltage at which an accumulation layer is formed in the translucent semiconductor film and the charge capacitance starts to increase when a so-called MOS capacitor is considered to be formed by the translucent semiconductor film, the pixel electrode, and the insulating film provided therebetween.

[0030]

[0031]

Advantages of the Invention

[0032] Provided is a method for stably operating a holding capacitor in a semiconductor device including a holding capacitor having a translucent semiconductor film, a translucent conductive film, and a translucent insulating film. It is possible. Further, according to one aspect of the present invention, a semiconductor device having a high aperture ratio, a large charge capacity in the holding capacitor, and reduced power consumption can be provided.

Brief Description of the Drawings

[0033]

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Embodiments for Carrying Out the Invention

[0034] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that its form and details can be variously changed. Also, the present invention is not construed as being limited to the description of the embodiments shown below.

[0035] In the configuration of the present invention described below, the same parts or parts having the same function are commonly used with the same reference numerals among different drawings, and the repeated description thereof is omitted. Also, when referring to parts having the same function, the hatch pattern is the same, and there are cases where no particular reference numeral is attached.

[0036] In each of the drawings described in this specification, the size, film thickness, or area of each component may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0037] In this specification and the like, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the process order or stacking order. Also, in this specification and the like, they do not indicate specific names for identifying the invention.

[0038] Also, in the present invention, the functions of the "source" and "drain" may be interchanged when the direction of the current changes during circuit operation. Therefore, in this specification, the terms "source" and "drain" are assumed to be interchangeable. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential.

[0039] Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential. Also, the voltage refers to the potential difference between two points, and the potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in an electrostatic field at a certain point. Generally, the potential difference between the potential at a certain point and the reference potential (for example, the ground potential) is simply referred to as the potential or voltage, and the potential and voltage are often used as synonyms. Therefore, in this specification, unless otherwise specified, the potential may be read as voltage, or the voltage may be read as potential.

[0040] In this specification, when an etching process is performed after a photolithography process, the mask formed by the photolithography process shall be removed. In this specification, when an etching process is performed after a photolithography process, the mask formed by the photolithography process shall be removed.

[0041] (Embodiment 1) In this embodiment, a semiconductor device and a method for driving the semiconductor device, which are aspects of the present invention, will be described with reference to the drawings. In this embodiment, the semiconductor device, which is an aspect of the present invention, will be described as a liquid crystal display device. In this embodiment, a semiconductor device and a method for driving the semiconductor device, which are aspects of the present invention, will be described with reference to the drawings. In this embodiment, the semiconductor device, which is an aspect of the present invention, will be described as a liquid crystal display device. In this embodiment, a semiconductor device and a method for driving the semiconductor device, which are aspects of the present invention, will be described with reference to the drawings. In this embodiment, the semiconductor device, which is an aspect of the present invention, will be described as a liquid crystal display device.

[0042] <Configuration of the Semiconductor Device> Fig. 1(A) shows a diagram illustrating a configuration example of a semiconductor device. The semiconductor device shown in Fig. 1(A) includes a pixel portion 100, a scanning line driving circuit 104, a signal line driving circuit 106, and m scanning lines 10 that are arranged in parallel or substantially parallel to each other and whose potentials are controlled by the scanning line driving circuit 104. Fig. 1(A) shows a diagram illustrating a configuration example of a semiconductor device. The semiconductor device shown in Fig. 1(A) includes a pixel portion 100, a scanning line driving circuit 104, a signal line driving circuit 106, and m scanning lines 10 that are arranged in parallel or substantially parallel to each other and whose potentials are controlled by the scanning line driving circuit 104. Fig. 1(A) shows a diagram illustrating a configuration example of a semiconductor device. The semiconductor device shown in Fig. 1(A) includes a pixel portion 100, a scanning line driving circuit 104, a signal line driving circuit 106, and m scanning lines 10 that are arranged in parallel or substantially parallel to each other and whose potentials are controlled by the scanning line driving circuit 104. 7 and n signal lines 109 that are each arranged in parallel or substantially parallel and whose potentials are controlled by the signal line drive circuit 106 Further, the pixel portion 100 has a plurality of pixels 101 arranged in a matrix. Also, along the scanning line 107, there are capacitance lines 115 that are each arranged in parallel or substantially parallel Note that the capacitance lines 115 may each be arranged in parallel or substantially parallel along the signal lines 109 Note that the capacitance lines 115 may each be arranged in parallel or substantially parallel along the signal lines 109 Note that the capacitance lines 115 may each be arranged in parallel or substantially parallel along the signal lines 109

[0043] Each scanning line 107 is electrically connected to n pixels 101 arranged in any one row among the pixels 101 arranged in m rows and n columns in the pixel portion 100. Also, each signal line 109 is electrically connected to m pixels 101 arranged in any one column among the pixels 101 arranged in m rows and n columns. m and n are both integers of 1 or more. Also, each capacitance line 115 is electrically connected to n pixels 101 arranged in any one row among the pixels 101 arranged in m rows and n columns. Note that when the capacitance lines 115 are each arranged in parallel or substantially parallel along the signal lines 109 is electrically connected to m pixels 101 arranged in any one column among the pixels 101 arranged in m rows and n columns is electrically connected to n pixels 101 arranged in any one row among the pixels 101 arranged in m rows and n columns. Note that when the capacitance lines 115 are each arranged in parallel or substantially parallel along the signal lines 109 is electrically connected to n pixels 101 arranged in any one row among the pixels 101 arranged in m rows and n columns. Note that when the capacitance lines 115 are each arranged in parallel or substantially parallel along the signal lines 109 is electrically connected to m pixels 101 arranged in any one column among the pixels 101 arranged in m rows and n columns is electrically connected to m pixels 101 arranged in any one column among the pixels 101 arranged in m rows and n columns

[0044] FIG. 1(B) is an example of a circuit diagram of the pixel 101 included in the semiconductor device shown in FIG. 1(A). The pixel 101 shown in FIG. 1(B) includes a transistor 103 electrically connected to the scanning line 107 and the signal line 109, and a holding capacitor 1 05 electrically connected to a capacitance line 115 that supplies a constant potential to one electrode, and the other electrode of which is electrically connected to the drain electrode of the transistor 103, and a pixel electrode 121 that is connected to the drain electrode of the transistor 103 and the other electrode of the holding capacitor 105 05 electrically connected to a capacitance line 115 that supplies a constant potential to one electrode, and the other electrode of which is electrically connected to the drain electrode of the transistor 103, and a pixel electrode 121 that is connected to the drain electrode of the transistor 103 and the other 05 electrically connected to a capacitance line 115 that supplies a constant potential to one electrode, and the other electrode of which is electrically connected to the drain electrode of the transistor 103, and a pixel electrode 121 that is connected to the drain electrode of the transistor 103 and the other An electrode electrically connected to the electrode and provided opposite to the pixel electrode 121 (opposite electrode) is connected to a wiring that supplies an opposite potential. It has a liquid crystal element 108 electrically connected to the wiring that supplies the opposite potential.

[0045] The transistor 103 is an enhancement-type transistor. Therefore, when the threshold voltage is 0 V or higher, that is, when the gate voltage (Vg) is 0 V or higher, an on-current (drain current: Id) flows and the transistor 103 enters a conductive state (see Fig. 2(A)). That is, since no on-current flows when no gate voltage is applied, the power consumption of the semiconductor device can be reduced compared to the case where a depletion-type transistor is applied to the transistor 103. In this specification, the gate voltage refers to the potential difference between the gate electrode and the source electrode. See Fig. 2(A). That is, since no on-current flows when no gate voltage is applied, the power consumption of the semiconductor device can be reduced compared to the case where a depletion-type transistor is applied to the transistor 103. In this specification, the gate voltage refers to the potential difference between the gate electrode and the source electrode. In this specification, the gate voltage refers to the potential difference between the gate electrode and the source electrode. That is, since no on-current flows when no gate voltage is applied, the power consumption of the semiconductor device can be reduced compared to the case where a depletion-type transistor is applied to the transistor 103.

[0046] Also, by using an oxide semiconductor film processed under appropriate conditions in the channel formation region of the transistor, the off-current of the transistor can be extremely reduced. Since an oxide semiconductor film 111 processed under appropriate conditions is used in the channel formation region of the transistor 103, the transistor 103 is a transistor with an extremely low off-current. Therefore, the semiconductor device according to one aspect of the present invention is a semiconductor device with reduced power consumption. Also, by using an oxide semiconductor film processed under appropriate conditions in the channel formation region of the transistor, the off-current of the transistor can be extremely reduced. Since an oxide semiconductor film 111 processed under appropriate conditions is used in the channel formation region of the transistor 103, the transistor 103 is a transistor with an extremely low off-current. Therefore, the semiconductor device according to one aspect of the present invention is a semiconductor device with reduced power consumption. Therefore, the semiconductor device according to one aspect of the present invention is a semiconductor device with reduced power consumption.

[0047] Also, a transistor using an oxide semiconductor with an increased carrier density becomes a depletion-type transistor. On the other hand, the transistor 103 is an enhancement-type transistor, and the oxide semiconductor film 111 included in the transistor 103 is an oxide semiconductor film in which no process such as adding an impurity to increase the conductivity is performed in order to intentionally increase the carrier density. On the other hand, the transistor 103 is an enhancement-type transistor, and the oxide semiconductor film 111 included in the transistor 103 is an oxide semiconductor film in which no process such as adding an impurity to increase the conductivity is performed in order to intentionally increase the carrier density. On the other hand, the transistor 103 is an enhancement-type transistor, and the oxide semiconductor film 111 included in the transistor 103 is an oxide semiconductor film in which no process such as adding an impurity to increase the conductivity is performed in order to intentionally increase the carrier density. On the other hand, the transistor 103 is an enhancement-type transistor, and the oxide semiconductor film 111 included in the transistor 103 is an oxide semiconductor film in which no process such as adding an impurity to increase the conductivity is performed in order to intentionally increase the carrier density. On the other hand, the transistor 103 is an enhancement-type transistor, and the oxide semiconductor film 111 included in the transistor 103 is an oxide semiconductor film in which no process such as adding an impurity to increase the conductivity is performed in order to intentionally increase the carrier density.

[0048] The holding capacitor 105 has a dielectric film provided between a pair of electrodes and has translucency. . One electrode of the holding capacitor 105 is the oxide semiconductor film 119, and the dielectric film is a translucent insulating film provided on the oxide semiconductor film 111 included in the transistor 103. , and the other electrode is the pixel electrode 121. Therefore, the holding capacitor 105 can be formed using the formation process of the transistor 103. By controlling the potential applied to the pixel electrode 121 and making the oxide semiconductor film 119 in a conductive state, the oxide semiconductor film 119 functions as one electrode. Thus, it can be said that the holding capacitor 105 has a MOS (Metal Oxide Semiconductor) capacitor structure. iconductor) capacitor structure.

[0049] Further, the oxide semiconductor film 119 of the holding capacitor 105 is formed using the formation process of the oxide semiconductor film 111 included in the transistor 103, which is an enhancement-type transistor. Therefore, the holding capacitor 105 starts to charge when the potential difference between the pixel electrode 121 and the capacitor line 115 becomes 0 V or more, similar to the transistor 103. In other words, the threshold voltage of the holding capacitor 105 is 0 V or more.

[0050] Fig. 2(B) shows the CV curve of the holding capacitor 105. In Fig. 2(B), the horizontal axis represents the potential difference (VP - VC) between the pixel electrode 121 and the capacitor line 115 of the holding capacitor 105, and the vertical axis represents the capacitance (C) with respect to the potential difference. Note that when the frequency of the voltage during CV measurement (Capacitance-Voltage-Measurement) is smaller than the frame frequency of the semiconductor device, the CV curve as shown in Fig. 2(B) is obtained. ltage-Measurement) is smaller than the frame frequency of the semiconductor device, the CV curve as shown in Fig. 2(B) is obtained.

[0051] In this specification, the potential difference between the pixel electrode 121 and the capacitance line 115 is the value obtained by subtracting the potential (VC) of the capacitance line 115 from the potential (VP) of the pixel electrode 12 1 (see Fig. 2(C)). Note that Fig. 2(C) shows the transistor 103 and the holding capacitor 105 for clarity. .

[0052] Also, since the oxide semiconductor film 119 of the holding capacitor 105 can be formed using the formation process of the oxide semiconductor film 111 included in the transistor 103, the oxide semiconductor film is one in which a process of adding an impurity for increasing the conductivity is not performed in order to intentionally increase the carrier density. The carrier density of the oxide semiconductor film 119 is equivalent to the carrier density of the oxide semiconductor film 111.

[0053] As described above, since the oxide semiconductor film 119 of the holding capacitor 105 and the oxide semiconductor film 111 included in the transistor 103 have the same configuration, the threshold voltage (Vth) of the holding capacitor 105 is equivalent to the threshold voltage (Vth_Tr) of the transistor 103 (see Fig. 2(A) and Fig 2(B)).

[0054] The liquid crystal element 108 controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal sandwiched between the substrate on which the transistor 103 and the pixel electrode 121 are formed and the substrate on which the counter electrode is formed. Note that the optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including a vertical electric field or an oblique electric field). When a counter electrode (also referred to as a common electrode) is formed on the substrate on which the pixel electrode is formed, the electric field applied to the liquid crystal is a horizontal electric field.

[0055] ​​​​​​​The scanning line driving circuit 104 and the signal line driving circuit 106 are roughly classified into a logic circuit section and a switch section or a buffer section. Although the detailed configurations of the scanning line driving circuit 104 and the signal line driving circuit 106 are omitted, the scanning line driving circuit 104 and the signal line driving circuit 106 include transistors. The scanning line driving circuit 104 and the signal line driving circuit 106 are roughly classified into a logic circuit section and a switch section or a buffer section. Although the detailed configurations of the scanning line driving circuit 104 and the signal line driving circuit 106 are omitted, the scanning line driving circuit 104 and the signal line driving circuit 106 include transistors. The scanning line driving circuit 104 and the signal line driving circuit 106 are roughly classified into a logic circuit section and a switch section or a buffer section. Although the detailed configurations of the scanning line driving circuit 104 and the signal line driving circuit 106 are omitted, the scanning line driving circuit 104 and the signal line driving circuit 106 include transistors. The scanning line driving circuit 104 and the signal line driving circuit 106 are roughly classified into a logic circuit section and a switch section or a buffer section. Although the detailed configurations of the scanning line driving circuit 104 and the signal line driving circuit 106 are omitted, the scanning line driving circuit 104 and the signal line driving circuit 106 include transistors.

[0056] Note that the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be formed using the formation process of the transistor 103. That is, one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. In this way, by integrally forming one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 on the substrate, the number of components of the semiconductor device can be reduced, and the manufacturing cost can be reduced. Note that the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be formed using the formation process of the transistor 103. That is, one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. In this way, by integrally forming one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 on the substrate, the number of components of the semiconductor device can be reduced, and the manufacturing cost can be reduced. Note that the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be formed using the formation process of the transistor 103. That is, one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. In this way, by integrally forming one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 on the substrate, the number of components of the semiconductor device can be reduced, and the manufacturing cost can be reduced. Note that the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be formed using the formation process of the transistor 103. That is, one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. In this way, by integrally forming one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 on the substrate, the number of components of the semiconductor device can be reduced, and the manufacturing cost can be reduced. Note that the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be formed using the formation process of the transistor 103. That is, one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. In this way, by integrally forming one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 on the substrate, the number of components of the semiconductor device can be reduced, and the manufacturing cost can be reduced. Note that the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be formed using the formation process of the transistor 103. That is, one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 can be provided on the substrate on which the transistor 103 and the pixel electrode 121 are provided. In this way, by integrally forming one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 on the substrate, the number of components of the semiconductor device can be reduced, and the manufacturing cost can be reduced.

[0057] Also, the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 are preferably enhancement-type transistors rather than depletion-type transistors in order to operate the scanning line driving circuit 104 and the signal line driving circuit 106 accurately. From this, it is also significant that the transistor 103 is an enhancement-type transistor. Also, the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 are preferably enhancement-type transistors rather than depletion-type transistors in order to operate the scanning line driving circuit 104 and the signal line driving circuit 106 accurately. From this, it is also significant that the transistor 103 is an enhancement-type transistor. Also, the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 are preferably enhancement-type transistors rather than depletion-type transistors in order to operate the scanning line driving circuit 104 and the signal line driving circuit 106 accurately. From this, it is also significant that the transistor 103 is an enhancement-type transistor. Also, the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 are preferably enhancement-type transistors rather than depletion-type transistors in order to operate the scanning line driving circuit 104 and the signal line driving circuit 106 accurately. From this, it is also significant that the transistor 103 is an enhancement-type transistor. Also, the transistors included in one or both of the scanning line driving circuit 104 and the signal line driving circuit 106 are preferably enhancement-type transistors rather than depletion-type transistors in order to operate the scanning line driving circuit 104 and the signal line driving circuit 106 accurately. From this, it is also significant that the transistor 103 is an enhancement-type transistor.

[0058] As described above, since the holding capacitor 105 has translucency, it can be formed largely (in a large area) in a region other than the region where the transistor 103 of the pixel 101 is formed. Therefore, the semiconductor device shown in FIG. 1 is a semiconductor device that increases the charge capacitance while increasing the aperture ratio. Also As described above, since the holding capacitor 105 has translucency, it can be formed largely (in a large area) in a region other than the region where the transistor 103 of the pixel 101 is formed. Therefore, the semiconductor device shown in FIG. 1 is a semiconductor device that increases the charge capacitance while increasing the aperture ratio. Also As described above, since the holding capacitor 105 has translucency, it can be formed largely (in a large area) in a region other than the region where the transistor 103 of the pixel 101 is formed. Therefore, the semiconductor device shown in FIG. 1 is a semiconductor device that increases the charge capacitance while increasing the aperture ratio. Also For example, in the semiconductor device according to one embodiment of the present invention, and set the pixel density to 300ppi (pixels per inch) or more (for example, 300pp When the pixel aperture ratio is set to 50% or more, the pixel aperture ratio The aperture ratio of the pixel can be increased to 55% or more, and further increased to 60% or more. One aspect is a semiconductor device having a pixel aperture ratio that is higher than that of a conventional semiconductor device.

[0059] Here, a method for driving the semiconductor device according to one embodiment of the present invention will be described. Since the semiconductor device has a storage capacitor 105 having a MOS capacitor structure, In order to stably operate the storage capacitor 105, a capacitor that functions as one electrode of the storage capacitor 105 is The potential applied to the oxide semiconductor film 119 (in other words, the capacitance line 115) is set as follows.

[0060] The CV curve of the storage capacitor 105 is shown in FIG. 2B when the threshold voltage is 0 V or more. CV curve. During the period in which the storage capacitor 105 is operated, the storage capacitor 105 is operated stably. In order to operate the storage capacitor 105, the storage capacitor 105 is kept in a sufficiently charged state. The potential difference between the potential of the pixel electrode 121 of the storage capacitor 105 and the potential of the capacitance line 115 (VP A potential VC is applied to the capacitance line 115 so that the potential Vc-VC is equal to or higher than V1 and equal to or lower than V2 in FIG. 2B. (See Figures 2(B) and 2(C)).

[0061] During the period in which the storage capacitor 105 is operated, the potential of the pixel electrode 121 is The amplitude of the positive and negative signals depends on the signal input to the input terminal 09. , fluctuates in the positive and negative directions with respect to the central potential of the video signal. , in order to make the potential difference (VP - VC) be V1 or more and V2 or less during this period, the capacitance line 115 (oxide semiconductor film 119) may be set to a potential that is lower than the low potential of the pixel electrode 121 by at least the threshold voltage of the holding capacitor 105 (see FIG. 3). In FIG. 3, among the potentials supplied to the scanning line 107, the lowest potential is GVss and the highest potential is GVdd.

[0062] In other words, in order to operate the holding capacitor 105, during the period of operating the holding capacitor 105, the potential difference between the pixel electrode 121 and the capacitance line 115 (oxide semiconductor film 119) should be higher than the threshold voltage of the holding capacitor 105.

[0063] Also, since the threshold voltage of the holding capacitor 105 is equivalent to the threshold voltage of the transistor 103, the potential of the capacitance line 115 (oxide semiconductor film 119) may be set to be lower than the threshold voltage of the transistor 103 by at least the threshold voltage. By doing so, during the period of operating the holding capacitor 105, the oxide semiconductor film 119 can always be kept in a conductive state, and the holding capacitor 105 can be stably operated.

[0064] From the above, by using the driving method which is one aspect of the present invention, in a semiconductor device including a holding capacitor having a semiconductor film with translucency, a conductive film with translucency, and an insulating film with translucency, the holding capacitor can be stably operated over time.

[0065] Also, the transistor 103 is an enhancement type transistor, and the formation process of the transistor 103 which is an enhancement type transistor is utilized for the holding capacitor 105 ​​​​is formed. Therefore, in the semiconductor device according to one aspect of the present invention, the voltage range required to drive the holding capacitance is narrower than the voltage range required to drive the holding capacitance formed using an oxide semiconductor film with an increased carrier density formed by applying a depletion-type transistor to the transistor and using the formation process of the depletion-type transistor. Therefore, by adopting one aspect of the present invention, the power consumption of the semiconductor device can be reduced.

[0066] <Top surface structure and cross-sectional structure of semiconductor device> Next, the specific structure of the semiconductor device will be described. Here, the pixel 101 will be described as an example. The top view of the pixel 101 is shown in FIG. 4. Note that, for clarity of the drawing, some of the components of the semiconductor device (for example, the liquid crystal element 108, etc.) are omitted in FIG. 4.

[0067] In FIG. 4, the scanning line 107 is provided to extend in a direction substantially orthogonal to the signal line 109 (the left-right direction in the figure). The signal line 109 is provided to extend in a direction substantially orthogonal to the scanning line 107 (the up-down direction in the figure). The capacitance line 115 is provided to extend in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)). The signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)).

[0068] The transistor 103 is provided in a region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least an oxide semiconductor film 111 having a channel formation region, a gate electrode, a gate insulating film (not shown in FIG. 4), a source electrode, and a drain electrode. ​​​​​​​

[0069] Further, the scanning line 107 includes a region that functions as the gate electrode of the transistor 103, and the signal line 109 includes a region that functions as the source electrode of the transistor 103. The conductive film 113 includes a region that functions as the drain electrode of the transistor 103 and is electrically connected to the pixel electrode 121 through the opening 117. In FIG. 4, the pixel electrode 121 is illustrated with the hatchings omitted. In FIG. 4, the pixel electrode 121 is illustrated with the hatchings omitted.

[0070] The region that functions as the gate electrode is a region that overlaps at least the oxide semiconductor film 111 in the scanning line 107. The region that functions as the source electrode is a region that overlaps at least the oxide semiconductor film 111 in the signal line 109. The region that functions as the drain electrode is a region that overlaps at least the oxide semiconductor film 111 in the conductive film 113. In the following, when indicating the gate electrode of the transistor 103, the scanning line 107 may also be described, and when indicating the source electrode of the transistor 103, the signal line 109 may also be described. When indicating the drain electrode of the transistor 103, the conductive film 113 is also described.

[0071] Further, the scanning line 107 has an end portion located outside the end portion of the semiconductor film in the upper surface shape. Therefore, the scanning line 107 functions as a light-shielding film that blocks light from a light source such as a backlight. As a result, the oxide semiconductor film 111 included in the transistor is not irradiated with light, and fluctuations in the electrical characteristics of the transistor can be suppressed.

[0072] The holding capacitor 105 is provided in a region surrounded by the scanning line 107 and the signal line 109. ​​​​​​​​​. The holding capacitor 105 is composed of an oxide semiconductor film 119, a pixel electrode 121 having translucency, and a dielectric film, which is a translucent insulating film formed on the transistor 103 (not shown in FIG. 4 .). Since the oxide semiconductor film 119, the pixel electrode 121 having translucency, and the dielectric film each have translucency, the holding capacitor 105 has translucency. Also, since the oxide semiconductor film 119 is in contact with the capacitance line 115 through the conductive film 125 provided in the opening 123, the holding capacitor 105 is electrically connected to the capacitance line 115.

[0073] The charge capacitance accumulated in the holding capacitor changes according to the area where a pair of electrodes overlap. If the pixel size is reduced to increase the resolution, the size of the holding capacitor also becomes smaller accordingly, and the charge capacitance that can be accumulated becomes smaller. As a result, there is a possibility that the liquid crystal element cannot operate sufficiently. Since the holding capacitor 105 has translucency, it is possible to form the holding capacitor as large as possible (with a large area) within the pixel, and a holding capacitor can be formed over the entire operating range of the liquid crystal element 108. As long as a charge capacitance sufficient to operate the liquid crystal element can be ensured, the pixel density can be increased and the resolution can be improved.

[0074] Here, the characteristics of a transistor using an oxide semiconductor will be described. A transistor using an oxide semiconductor is an n-channel type transistor. Also, carriers may be generated due to oxygen deficiency contained in the oxide semiconductor, which may deteriorate the electrical characteristics and reliability of the transistor. For example, the threshold voltage of the transistor may vary in the negative direction, and a drain current may flow when the gate voltage is 0V. Thus, the gate The condition in which drain current flows when the base voltage is 0V is called a normally-on characteristic. In addition, when the gate voltage is 0V, it can be considered that no drain current flows. The transistor is said to have normally-off characteristics.

[0075] In this regard, when an oxide semiconductor film is used, defects contained in the oxide semiconductor film, typically oxygen, It is preferable to reduce defects as much as possible. For example, the direction of the magnetic field is parallel to the film surface. The spin density (g value = 1.93 in the oxide semiconductor film) measured by electron spin resonance was It is preferable that the defect density is reduced to below the detection limit of the measuring instrument. It is desirable to reduce defects, typically oxygen vacancies, contained in an oxide semiconductor film as much as possible. In this way, it is possible to prevent the transistor from becoming normally on, and thus the electric field of the semiconductor device can be improved. The thermal characteristics and reliability can be improved.

[0076] The negative shift in the threshold voltage of a transistor is not only due to oxygen vacancies, but also due to oxide It can also be caused by hydrogen (including hydrogen compounds such as water) contained in the semiconductor film. Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In both cases, there is a defect (which can also be called an oxygen vacancy) in the lattice from which oxygen has been removed (or in the part from which oxygen has been removed). In addition, some of the hydrogen reacts with oxygen to generate electrons, which act as carriers. Therefore, a transistor including an oxide semiconductor film containing hydrogen is normally It is easy to have ON characteristics.

[0077] As described above, hydrogen is generated in the oxide semiconductor film 111 included in the transistor 103. Specifically, in the oxide semiconductor film 111, the secondary The hydrogen concentration obtained by ion mass spectrometry (SIMS: Secondary Ion Mass Spectro metry) is less than 5×10 18 atoms / cm 3 , preferably or less than 1×10 18 atoms / cm 3 , more preferably less than 5×10 17 atoms / c m 3 , even more preferably less than 1×10 16 atoms / cm 3 .

[0078] In addition, for the oxide semiconductor film 111, the concentration of alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry is 1×10 18 atoms / cm 3 or less, preferably 2×1 0 16 atoms / cm 3 or less. Alkali metals and alkaline earth metals may generate carriers when combined with the oxide semiconductor, which may increase the off-current of the transistor 103.

[0079] Also, if nitrogen is contained in the oxide semiconductor film 111, carriers, i.e., electrons, are generated, the carrier density increases, and it tends to become n-type. As a result, a transistor having an oxide semiconductor film containing nitrogen tends to have normal-on characteristics. Therefore, in the oxide semiconductor film 111, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration is preferably 5× 10 18 atoms / cm 3 or less.

[0080] Also, if the oxide semiconductor contains group 14 elements such as silicon and carbon, carriers ​Electrons are generated, the carrier density increases, and it is easy to become n-type. Therefore, in a transistor having an oxide semiconductor film In particular, at the interface between the gate insulating film 127 (not shown in FIG. 4) and the oxide semiconductor film 111, the silicon concentration obtained by secondary ion mass spectrometry is 3×10 18 atoms / cm 3 or less, preferably 3×10 17 atoms / cm 3 or less. In addition, at the interface, the carbon concentration obtained by secondary ion mass spectrometry is 3×10 18 atoms / cm 3 or less, preferably 3×10 17 atoms / cm 3 or less.

[0081] From the above, by using an oxide semiconductor film 111 in which impurities (such as hydrogen, nitrogen, silicon, carbon, alkali metals, or alkaline earth metals ) are reduced as much as possible and made highly pure, it is possible to suppress the transistor 103 from having normally-on characteristics, and the off current of the transistor 103 can be extremely reduced. Therefore, one aspect of the present invention is a semiconductor device having good electrical characteristics and a semiconductor device with excellent reliability. Note that the highly purified oxide semiconductor can be said to be an intrinsic or substantially intrinsic semiconductor.

[0082] In addition, the transistor 103 is an enhancement-type transistor, and since the oxide semiconductor film 111 has not been subjected to a process such as adding an impurity that increases the conductivity in order to intentionally increase the carrier density, the carrier density of the oxide semiconductor film 111 is 1×10 / cm 17 or less, or 1×10 3 or less, or 1×10​​​16 / cm 3 Below, again is 1×10 15 / cm 3 or less, or 1×10 14 / cm 3 or less, or 1×10 13 / cm 3 The following is the result.

[0083] The oxide semiconductor film 119 included in the storage capacitor 105 is the same as that included in the transistor 103. Since the oxide semiconductor film 111 can be formed by utilizing the formation process of the oxide semiconductor film 111, The carrier density of the oxide semiconductor film 19 is equal to that of the oxide semiconductor film 111. The carrier density of the compound semiconductor film 119 is within the above range.

[0084] The reason why the off-state current of a transistor using a highly purified oxide semiconductor film is low is that This can be proved by various experiments. For example, when the channel width is 1×10 6 Channel length L in μm Even if the element has a thickness of 10 μm, the voltage between the source and drain electrodes (drain voltage) is 1 In the range from V to 10 V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. , i.e. 1 × 10 -13 In this case, the transistor The off-state current, which is equivalent to the value divided by the channel width of the transistor, must be 100zA / μm or less. In addition, by connecting the storage capacitor and the transistor, the flow of current into the storage capacitor or the flow of current out of the storage capacitor can be The off-state current was measured using a circuit that controls the outflow of charge using the transistor. In the measurement, a highly purified oxide semiconductor film was used for a channel formation region of the transistor. The off-state current of the transistor is measured based on the change in the charge amount per unit time of the storage capacitance. As a result, when the voltage between the source electrode and the drain electrode of the transistor is 3 V, it was found that an even lower off-current of several tens yA / μm can be obtained. Therefore, a transistor using a highly purified oxide semiconductor film has an extremely small off-current.

[0085] Next, cross-sectional views between the dashed-dotted lines A1 - A2 and between the dashed-dotted lines B1 - B2 in FIG. 4 are shown in FIG. 5. .

[0086] The cross-sectional structures between the dashed-dotted lines A1 - A2 and between the dashed-dotted lines B1 - B2 are as follows. On a substrate 102, a scanning line 107 including a region that functions as a gate electrode and a capacitance line 115 are provided. A gate insulating film 127 is provided on the scanning line 107 and the capacitance line 115. An oxide semiconductor film 111 is provided on a region of the gate insulating film 127 that overlaps with the scanning line 107. An oxide semiconductor film 119 is provided on the gate insulating film 127. On the oxide semiconductor film 111 and on the gate insulating film 127, a signal line 109 including a region that functions as a source electrode and a conductive film 113 including a region that functions as a drain electrode are provided. An opening 1 23 reaching the capacitance line 115 is provided in a part of the gate insulating film 127 in contact with the capacitance line 115, and a conductive film 125 is provided on the opening 123, the gate insulating film 127, and the oxide semiconductor film 119. On the gate insulating film 127, on the signal line 109, on the oxide semiconductor film 111, on the conductive film 113, on the conductive film 125, and on the oxide semiconductor film 119, insulating films 129, 131, and 132 that function as a protective insulating film of the transistor 103 are provided. An opening 117 reaching the conductive film 113 is provided in the insulating films 129, 131, and 132, and a pixel electrode 121 is provided on the opening 117 and the insulating film 132. ​ is provided. Further, an alignment film 158 is provided on the pixel electrode 121 and the insulating film 132 There may be an underlying insulating film provided between the substrate 102, the scanning line 107 and the capacitance line 115, and the gate insulating film 127

[0087] Further, the cross-sectional structure of the liquid crystal element 108 is as follows. A light-shielding film 152 is provided in at least a region overlapping with the transistor 103 on the surface of the substrate 150 facing the substrate 102 and a counter electrode 154 which is a conductive film having translucency is provided so as to cover the light-shielding film 152 and an alignment film 156 is provided so as to cover the counter electrode. An alignment film 158 is provided on the pixel electrode 121 and the insulating film 132 An alignment film 158 is provided on the insulating film 132 and the pixel electrode 121 on the substrate 102 side The liquid crystal 160 is provided in contact with the alignment film 156 and the alignment film 158 and is sandwiched between the substrate 102 and the substrate 150

[0088] When the semiconductor device which is one aspect of the present invention is a liquid crystal display device, light sources such as a backlight optical members such as polarizing plates provided on the substrate 102 side and the substrate 150 side respectively (optical substrates), a sealing material for fixing the substrate 102 and the substrate 150, etc. are required, but these will be described later

[0089] From the above, in the holding capacitance 105 shown in the present embodiment, one of the pair of electrodes is the oxide semiconductor film 119, the other of the pair of electrodes is the pixel electrode 121, and the dielectric film provided between the pair of electrodes is the insulating film 129, the insulating film 131, and the insulating film 132

[0090] ​​​​​​​The details of the components of the above cross-sectional structure will be described below.

[0091] There are no major restrictions on the material of the substrate 102, etc., but it is necessary to have at least heat resistance enough to withstand the heat treatment performed in the manufacturing process of the semiconductor device. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency. For example, there are a glass substrate, a ceramic substrate, a plastic substrate, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, a substrate having no translucency such as a stainless alloy can be used. In that case, it is preferable to provide an insulating film on the substrate surface. Note that as the substrate 102, a quartz substrate, a sapphire substrate, or a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used. Note that when the semiconductor device which is one aspect of the present invention is a transmissive liquid crystal display device, the substrate 102 uses a substrate having translucency.

[0092] Since the scanning line 107 and the capacitor line 115 conduct a large current, it is preferably formed of a metal film. Typically, a single-layer structure or a laminated structure provided with a metal material such as molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. or an alloy material containing these as a main component is used. Since the scanning line 107 and the capacitor line 115 conduct a large current, it is preferably formed of a metal film. Typically, a single-layer structure or a laminated structure provided with a metal material such as molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. or an alloy material containing these as a main component is used. Since the scanning line 107 and the capacitor line 115 conduct a large current, it is preferably formed of a metal film. Typically, a single-layer structure or a laminated structure provided with a metal material such as molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. or an alloy material containing these as a main component is used. Since the scanning line 107 and the capacitor line 115 conduct a large current, it is preferably formed of a metal film. Typically, a single-layer structure or a laminated structure provided with a metal material such as molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. or an alloy material containing these as a main component is used. Since the scanning line 107 and the capacitor line 115 conduct a large current, it is preferably formed of a metal film. Typically, a single-layer structure or a laminated structure provided with a metal material such as molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. or an alloy material containing these as a main component is used.

[0093] As an example of the scanning line 107 and the capacitor line 115, a single-layer structure using aluminum containing silicon, a two-layer structure in which titanium is laminated on aluminum, a structure in which titanium is laminated on titanium nitride As an example of the scanning line 107 and the capacitor line 115, a single-layer structure using aluminum containing silicon, a two-layer structure in which titanium is laminated on aluminum, a structure in which titanium is laminated on titanium nitride A two-layer structure, a two-layer structure in which tungsten is laminated on titanium nitride, a two-layer structure in which tungsten is laminated on tantalum nitride, a two-layer structure in which copper is laminated on a copper-magnesium-aluminum alloy, a three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. A two-layer structure in which tungsten is laminated on a copper-magnesium-aluminum alloy, A three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. There are.

[0094] In addition, as the materials of the scanning line 107 and the capacitance line 115, a conductive material having translucency applicable to the pixel electrode 121 can be used. In the case where the semiconductor device according to one aspect of the present invention is a reflective display device, a conductive material having no translucency (for example, a metal material) can be used for the pixel electrode 121. In that case, a substrate 102 that also has no translucency can be used. In addition, as the materials of the scanning line 107 and the capacitance line 115, a conductive material having translucency applicable to the pixel electrode 121 can be used. When the semiconductor device according to one aspect of the present invention is a reflective display device, a conductive material having no translucency (for example, a metal material) can be used for the pixel electrode 121. At that time, a substrate 102 that also has no translucency can be used. Furthermore, when the semiconductor device according to one aspect of the present invention is a reflective display device, a conductive material having no translucency (for example, a metal material) can be used for the pixel electrode 121. At that time, a substrate 102 that also has no translucency can be used. For example, a metal material) can be used. At that time, a substrate 102 that also has no translucency can be used. Can be used.

[0095] Furthermore, as the materials of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volts) or more. By using these nitrogen-containing metal oxides as the scanning line (gate electrode), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration of at least higher than that of the oxide semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. There are, for example, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.). Including In-Ga-based oxides containing nitrogen, In-Zn-based oxides containing nitrogen, Sn-based oxides containing nitrogen, In-based oxides containing nitrogen, and metal nitride films (InN, SnN, etc.). Including In-based oxides containing nitrogen, and metal nitride films (InN, SnN, etc.). Can be used. These materials have a work function of 5 eV (electron volts) or more. By using these nitrogen-containing metal oxides as the scanning line (gate electrode), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration of at least higher than that of the oxide semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. At least a nitrogen concentration higher than that of the oxide semiconductor film 111, specifically, an In-Ga-Zn-based oxide having a nitrogen concentration of 7 atomic% or more. Can be used.

[0096] In the scanning line 107 and the capacitance line 115, it is preferable to use aluminum or copper, which are low-resistance materials. By using aluminum or copper, signal delay can be reduced and display quality can be improved. However, aluminum has low heat resistance and is prone to defects due to hillock, whisker, or migration. To prevent the migration of aluminum, it is preferable to laminate a metal material with a melting point higher than that of aluminum, such as molybdenum, titanium, or tungsten, on the aluminum. Also, when using copper, to prevent defects due to migration and diffusion of copper elements, it is preferable to laminate a metal material with a melting point higher than that of copper, such as molybdenum, titanium, or tungsten.

[0097] Further, as shown in FIGS. 4 and 5, the scanning line 107 is preferably provided in a shape that enables the oxide semiconductor film 111 to be provided within the region of the scanning line 107. As shown in FIG. 4, it is preferably provided in a protruding shape in the region where the oxide semiconductor film 111 is provided, so that the oxide semiconductor film 111 can be provided inside the scanning line 107. By doing so, the light (such as the light from a light source such as a backlight in a liquid crystal display device) irradiated from the surface of the substrate 102 opposite to the surface where the scanning line 107 is provided (the back surface of the substrate 102) is blocked by the scanning line 107, so that fluctuations or decreases in the electrical characteristics (such as the threshold voltage) of the transistor 103 can be suppressed. )

[0098] The gate insulating film 127 is, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or a Ga-Zn-based metal ​​​​​​It is provided in a single-layer structure or a stacked structure using an insulating material such as an oxide. Note that the oxide semiconductor film In order to improve the interface characteristics with 111, in the gate insulating film 127, at least the region in contact with the oxide semiconductor film 111 is preferably formed of an oxide insulating film.

[0099] Further, by providing an insulating film having a barrier property against oxygen, hydrogen, water, etc. on the gate insulating film 127, diffusion of oxygen contained in the oxide semiconductor film 111 to the outside and intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor film 111 can be prevented. Examples of the insulating film having a barrier property against oxygen, hydrogen, water, etc. include an aluminum oxide film, an aluminum oxynitride film, a gallium oxide film, a gallium oxynitride film, a yttrium oxide film, a yttrium oxynitride film, a hafnium oxide film, a hafnium oxynitride film, and a silicon nitride film.

[0100] Further, as the gate insulating film 127, hafnium silicate (HfSiO x ) having nitrogen, hafnium silicate (HfSi O x O y N z ), hafnium aluminate (HfAl O x O y N z ) having nitrogen, high-k materials such as hafnium oxide and yttrium oxide are used to reduce the gate leakage current of the transistor 103.

[0101] Further, the gate insulating film 127 preferably has the following stacked structure. As the first silicon nitride film, a silicon nitride film with a small amount of defects is provided, and as the second silicon nitride film on the first silicon nitride film, a silicon nitride film with a small amount of hydrogen desorption and ammonia desorption is provided. ​​​​​​​​​, on the second silicon nitride film, a laminated structure is provided with any one of the insulating oxide films applicable as the gate insulating film 127. It is a laminated structure provided with any one of them.

[0102] As the second silicon nitride film, in the temperature programmed desorption gas analysis method, the desorption amount of hydrogen molecules is 5 ×10 21 molecules / cm 3 less than, preferably 3×10 21 molecules / cm 3 or less, more preferably even more preferably 1×10 21 molecules / cm 3 or less, and the desorption amount of ammonia molecules is 1×10 22 molecules / cm 3 less than, preferably 5×10 21 molecules / cm 3 or less, more preferably 1×10 2 1 molecules / cm 3 or less. It is preferable to use a nitride insulating film. By using the first silicon nitride film and the second silicon nitride film as part of the gate insulating film 127, a gate insulating film with a small amount of defects and a small desorption amount of hydrogen and ammonia can be formed as the gate insulating film 127. As a result, the amount of hydrogen and nitrogen contained in the gate insulating film 127 moving into the oxide semiconductor film 111 can be reduced.

[0103] In a transistor using an oxide semiconductor, when there are trap levels (also referred to as interface levels) at the interface between the oxide semiconductor film and the gate insulating film or in the gate insulating film, it causes fluctuations in the threshold voltage of the transistor, typically a negative shift in the threshold voltage, and an increase in the subthreshold swing coefficient (S value) indicating the gate voltage required for the drain current to change by one digit when the transistor is in the on state. As a result, the electrical characteristics vary from transistor to transistor. characteristics vary from transistor to transistor. There is a problem that characteristics vary. Therefore, as the gate insulating film, a silicon nitride film with a small amount of defects is used. In addition, by providing an insulating oxide film in the region in contact with the oxide semiconductor film 111, it is possible to reduce the negative shift of the threshold voltage and suppress the increase in the S value.

[0104] The thickness of the gate insulating film 127 is 5 nm or more and 400 nm or less, preferably 10 nm or more and 3 00 nm or less, more preferably 50 nm or more and 250 nm or less.

[0105] The oxide semiconductor film 111 and the oxide semiconductor film 119 can have an amorphous structure, a single crystal structure, or a polycrystalline structure. In addition, the thickness of the oxide semiconductor film 111 is 1 nm or more and 100 nm or less, more preferably 1 nm or more and 50 nm or less, still more preferably 1 nm or more and 30 nm or less, and even more preferably 3 nm or more and 20 nm or less.

[0106] In addition, the oxide semiconductor film 111 and the oxide semiconductor film 119 are composed of the same metal element. . As the oxide semiconductor applicable to the oxide semiconductor film 111, the energy gap is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. In this way, by using an oxide semiconductor with a wide energy gap, the off-current of the transistor 103 can be reduced.

[0107] The oxide semiconductor applicable to the oxide semiconductor film 111 is preferably a metal oxide containing at least indium (In) or zinc (Zn). Or, it is preferably contains both In and Zn. In addition, the variation in the electrical characteristics of the transistor using the oxide semiconductor ​​​To reduce them, it is preferable to have one or more of the stabilizers together with them.

[0108] Examples of the stabilizer include gallium (Ga), tin (Sn), hafnium (Hf), al uminum (Al), or zirconium (Zr). Further, examples of other stabilizers include lanthanum (La), cerium (Ce), praseodymium (P r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium ( Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc., which are lanthanoids.

[0109] Examples of the oxide semiconductor applicable to the oxide semiconductor film 111 and the oxide semiconductor film 119 include for example, as the oxide semiconductor, indium oxide, tin oxide, zinc oxide, an oxide containing two kinds of metals such as In-Zn-based oxide, Sn-Zn-based oxide, Al-Zn-based oxide, Zn- Mg-based oxide, Sn-Mg-based oxide, In-Mg-based oxide, In-Ga-based oxide, an oxide containing three kinds of metals such as In-Ga-Zn-based oxide (also denoted as IGZO), In -Al-Zn-based oxide, In-Sn-Zn-based oxide, Sn-Ga-Zn-based oxide, Al- Ga-Zn-based oxide, Sn-Al-Zn-based oxide, In-Hf-Zn-based oxide, In-Z r-Zn-based oxide, In-Ti-Zn-based oxide, In-Sc-Zn-based oxide, In-Y- Zn-based oxide, In-La-Zn-based oxide, In-Ce-Zn-based oxide, In-Pr-Z n-based oxide, In-Nd-Zn-based oxide, In-Sm-Zn-based oxide, In-Eu-Zn Oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides, In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides, In-Lu-Zn oxides, oxides containing four kinds of metals, such as In-Sn-Ga-Zn oxides, In-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides, In-Sn-Al-Zn oxides, In-Sn-Hf-Zn oxides, and In-Hf-Al-Zn oxides can be used.

[0110] Here, the In-Ga-Zn oxide means an oxide having In, Ga, and Zn as main components, and the ratio of In, Ga, and Zn is not limited. Also, metal elements other than In, Ga, and Zn may be included.

[0111] Also, as the oxide semiconductor, a material represented by InMO3(ZnO) m (m>0) may be used. Here, M represents one metal element or a plurality of metal elements selected from Ga, Fe, Mn, and Co, or an element as the above stabilizer.

[0112] For example, In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Ga: Zn = 2:2:1 (= 2 / 5:2 / 5:1 / 5), or In:Ga:Zn = 3:1: 2 (= 1 / 2:1 / 6:1 / 3) atomic ratio In-Ga-Zn based metal oxides can be used. Alternatively, In:Sn:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2) or In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8) atomic ratio In-Sn-Zn based metal oxides It may be used. Note that the atomic ratio of the metal element contained in the metal oxide includes fluctuations of plus or minus 20% of the above atomic ratio.

[0113] However, it is not limited to these, and those with an appropriate atomic ratio may be used according to the required semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, variation, etc.). Also, in order to obtain the required semiconductor characteristics, it is preferable to make the carrier density, impurity concentration, defect density, atomic ratio of the metal element and oxygen, interatomic distance, density, etc. appropriate. For example, a relatively high field-effect mobility can be obtained relatively easily in an In-Sn-Zn-based oxide. However, even in an In-Ga-Zn-based oxide, the field-effect mobility can be increased by reducing the defect density in the bulk. The oxide semiconductor film 119 can use an oxide semiconductor applicable to the oxide semiconductor film 111. Also, since the oxide semiconductor film 119 can be formed while forming the oxide semiconductor film 111, the oxide semiconductor film 119 contains the metal element of the oxide semiconductor constituting the oxide semiconductor film 111. The insulating film 129 that functions as a protective insulating film of the transistor 103 and a dielectric film of the holding capacitor 105, the insulating film 131, and the insulating film 132 are insulating films using a material applicable to the gate insulating film 127. In particular, it is preferable that the insulating film 129 and the insulating film 131 are oxide insulating films, and the insulating film 132 is a nitride insulating film. Also, by making the insulating film 132 a nitride insulating film, it is possible to suppress the intrusion of impurities such as hydrogen and water from the outside into the transistor 103 (particularly the oxide semiconductor film 111). Note that the insulating film 129 may not be provided.

[0114]

[0115] ​

[0116] One or both of the insulating films 129 and 131 may contain oxygen having a stoichiometric composition. It is preferable that the oxide insulating film contains more oxygen than the oxide insulating film. The oxygen elimination from the semiconductor film 111 is prevented, and the oxygen contained in the oxygen excess region is prevented. The oxygen vacancies can be reduced by moving the oxygen atoms to the oxide semiconductor film 111. For example, The amount of released oxygen molecules measured by thermal desorption spectrometry (hereinafter referred to as TDS analysis) , 1.0×10 18 molecules / cm 3 By using the oxide insulating film described above, the oxide semiconductor film 1 The oxygen vacancies in the insulating film 129 and the insulating film 131 can be reduced. A region containing more oxygen than the stoichiometric composition in one or both of the above (oxygen excess region) The oxide insulating film may be an oxide semiconductor film having at least the oxide semiconductor film 111 and The presence of an oxygen excess region in the overlapping region reduces oxygen release from the oxide semiconductor film 111. In addition, the oxygen contained in the oxygen excess region is moved to the oxide semiconductor film 111. This makes it possible to reduce oxygen vacancies.

[0117] The insulating film 131 is an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. In this case, the insulating film 129 is preferably an oxide insulating film that transmits oxygen. In this case, oxygen that enters the insulating film 129 from the outside does not pass through the insulating film 129 at all, and Some oxygen remains in the insulating film 129. Some oxygen also migrates from the insulating film 129 to the outside. It is preferable that the insulating film is a chemical insulating film.

[0118] In addition, since the insulating film 129 is in contact with the oxide semiconductor film 111, it is not only permeable to oxygen, but also preferably an insulating oxide film capable of reducing the interface level density with the oxide semiconductor film 111. For example, the insulating film 129 is preferably an insulating oxide film having a lower defect density in the film than the insulating film 131. Specifically, the spin density of g value = 2.001 (E´-center) by electron spin resonance measurement is 3.0×10 spins / cm or less, preferably 5.0×10 spins / cm 17 or less of the insulating oxide film. Note that the spin density of g value = 2.001 by electron spin resonance measurement corresponds to the abundance of dangling bonds contained in the insulating film 129. 3 16 3 The thickness of the insulating film 129 can be 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less, and more preferably 10 nm or more and 30 nm or less. The thickness of the insulating film 131 can be 30 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less.

[0119]

[0120] In addition, by forming the insulating film 129 provided on the oxide semiconductor film 111 as an insulating oxide film that allows oxygen to permeate and reduces the interface level density with the oxide semiconductor film 111, and forming the insulating film 131 as an insulating oxide film containing an oxygen-excess region or containing more oxygen than oxygen satisfying the stoichiometric composition, it becomes easier to supply oxygen to the oxide semiconductor film 111, prevent the desorption of oxygen from the oxide semiconductor film 111, move the oxygen contained in the insulating film 131 to the oxide semiconductor film 111, and compensate for the oxygen deficiency contained in the oxide semiconductor film 111. ​​​​​​​​​​​​​​ This becomes possible. As a result, it is possible to suppress the transistor 103 from having normal-on characteristics.

[0121] In addition, when one or both of the insulating film 129 and the insulating film 131 are made of a silicon oxynitride or silicon oxynitride containing nitrogen, such as silicon oxynitride, the nitrogen concentration obtained by SIMS is equal to or higher than the SIMS detection lower limit and less than 3×10 atoms / cm 20 3 and preferably equal to or higher than 1×10 18 a toms / cm 3 and less than or equal to 1×10 20 atoms / cm 3 . By doing so, the amount of nitrogen moving to the oxide semiconductor film 111 included in the transistor 103 can be reduced. Also, by doing so, the amount of defects in the insulating film containing nitrogen itself can be reduced.

[0122] When the insulating film 132 is a nitride insulating film, it is preferable that one or both of the insulating film 129 and the insulating film 131 are insulating films having a barrier property against nitrogen. For example, a dense insulating oxide film can have a barrier property against nitrogen. Specifically, it is preferable to use an insulating oxide film having an etching rate of 10 nm / min or less when using 0.5 wt% hydrofluoric acid at 25°C.

[0123] As the insulating film 132, a nitride insulating film with a low hydrogen content can be provided. As the nitride insulating film, for example, the amount of hydrogen molecule release measured by TDS analysis is less than 5.0× 10 21 / cm 3 and preferably less than 3.0×10 21 / cm 3is less than, and further preferably 1.0×10 21 / cm 3 is a nitride insulating film that is less than.

[0124] In addition, since the nitride insulating film has excellent step coverage, it is useful as a protective insulating film of the transistor 103.

[0125] The insulating film 132 has a thickness that can function to suppress the intrusion of impurities such as hydrogen and water from the outside. For example, it can be 50 nm or more and 200 nm or less, preferably 50 nm or more and 150 nm or less, more preferably 50 nm or more and 100 nm or less.

[0126] In addition, by using a nitride insulating film as the insulating film 132 provided on the insulating film 131, the intrusion of impurities such as hydrogen and water from the outside into the oxide semiconductor film 111 can be suppressed. Furthermore, by providing a nitride insulating film with a low hydrogen content as the insulating film 132, the electrical characteristic variation of the transistor 103 can be suppressed.

[0127] In addition, a silicon oxide film formed by CVD using an organic silane gas may be provided between the insulating film 131 and the insulating film 132. Since the silicon oxide film has excellent step coverage, it is useful as a protective insulating film of the transistor 103. The silicon oxide film can be provided at 30 0 nm or more and 600 nm or less. As the organic silane gas, ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetramethylsilane (TMS: chemical formula Si (CH3)4), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), trieth (CH3)4), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), trieth ylsilane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), trieth Silicon-containing compounds such as xylylsilane (SiH(OC2H5)3) and tris(dimethylamino)silane (SiH(N(C H3)2)3) can be used.

[0128] The pixel electrode 121 is formed using a conductive film having translucency. The conductive film having translucency is provided with a conductive material having translucency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide, etc.

[0129] As the substrate 150, a base material applicable to the substrate 102 can be used.

[0130] The light-shielding film 152, also called a black matrix, is provided for suppressing light leakage of a light source such as a backlight in a liquid crystal display device and suppressing a decrease in contrast due to color mixing that occurs when performing color display using a color filter. The light-shielding film 152 can be provided using a commonly used one. For example, as a light-shielding material, metals, organic resins containing pigments, etc. can be mentioned. Note that the light-shielding film 152 may be provided in a region other than the region overlapping with the transistor 103, such as the scanning line drive circuit 104 and the signal line drive circuit 106 (see FIG. 1) in the pixel portion 100 other than the pixel.

[0131] Also, in the pixel portion 100, a colored film having a function of transmitting light of a predetermined wavelength may be provided between the light-shielding films provided for each pixel. Furthermore, an overcoat film may be provided between the light-shielding film and the colored film and the counter electrode.

[0132] ​​​​​​​​​​​The counter electrode 154 is provided by appropriately using a material applicable to the pixel electrode 121.

[0133] The alignment films 156 and 158 can be provided using commonly used materials such as polyamide. It can be done.

[0134] As the liquid crystal 160, thermotropic liquid crystal, low molecular liquid crystal, high molecular liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials, depending on the conditions, show a cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. mesophase and the like.

[0135] Also, as the liquid crystal 160, a liquid crystal showing a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the cholesteric liquid crystal is heated, it is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent is used to improve the temperature range. Note that the alignment film is formed of an organic resin, and since the organic resin contains hydrogen or water, etc., there is a risk of degrading the electrical characteristics of the transistor of the semiconductor device which is one aspect of the present invention. Therefore, by using the blue phase as the liquid crystal 160, a semiconductor device which is one aspect of the present invention can be manufactured without using an organic resin, and a highly reliable semiconductor device can be obtained. 160, a semiconductor device which is one aspect of the present invention can be manufactured without using an organic resin, and a highly reliable semiconductor device can be obtained. body device can be manufactured, and a highly reliable semiconductor device can be obtained.

[0136] Note that the liquid crystal element 108 can be appropriately configured, such as changing the shapes of the pixel electrode 12 1 and the counter electrode 154, and forming protrusions called ribs, based on the display mode of the liquid crystal element 108. It can be changed.

[0137] <Method for manufacturing a semiconductor device> Next, a method for manufacturing the above semiconductor device will be described with reference to FIGS. 6 and 7.

[0138] First, a scanning line 107 and a capacitor line 115 are formed on a substrate 102, and an insulating film 126 that will later be processed into a gate insulating film 127 is formed so as to cover the scanning line 107 and the capacitor line 115. An oxide semiconductor film 111 is formed in a region overlapping the scanning line 107 of the insulating film 126, and an oxide semiconductor film 119 is formed so as to overlap a region where a pixel electrode 1 21 will be formed (see FIG. 6(A)). See

[0139] The scanning line 107 and the capacitor line 115 can be formed by forming a conductive film using the materials listed above, forming a mask on the conductive film, and processing using the mask. The conductive film can be formed using various film formation methods such as vapor deposition, CVD, sputtering, and spin coating. Note that the thickness of the conductive film is not particularly limited and can be determined in consideration of the formation time, desired resistivity, etc. The mask can be, for example, a resist mask formed by a first photolithography process. Further, the processing of the conductive film can be performed by one or both of dry etching and wet etching.

[0140]

[0141] The insulating film 126 can be formed using various film formation methods such as CVD or sputtering using a material applicable to the gate insulating film 127. Further, when gallium oxide is applied to the gate insulating film 12 7, the insulating film 126 can be formed using MOCVD (Metal Organic Che mical Vapor Deposition) method.

[0141] The oxide semiconductor films 111 and 119 are formed by using the oxide semiconductors listed above, forming a mask on the oxide semiconductor film, and processing using the mask. Thus, they can be formed. Therefore, the oxide semiconductor films 111 and 119 are composed of the same metal element. The oxide semiconductor film can be formed by using a sputtering method, a coating method, a pulsed laser deposition method, a laser ablation method, or the like. By using a printing method, the element-isolated oxide semiconductor films 111 and 119 can be directly formed on the gate insulating film 127. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. As the sputtering gas, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen can be appropriately used. In the case of a mixed gas of a rare gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the rare gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a second photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so as to be etched into a desired shape. After forming the oxide semiconductor films 111 and 119, it is preferable to perform a heat treatment to dehydrogenate or dehydrate the oxide semiconductor films 111 and 119.

[0142] ​​​​​​​​​​​ The temperature of the heat treatment is typically 150°C or higher and less than the substrate distortion point, preferably 200°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower. Note that the heat treatment may be performed on the oxide semiconductor film before processing into the oxide semiconductor film 111 and the oxide semiconductor film 119 .

[0143] In the heat treatment, the heat treatment apparatus is not limited to an electric furnace, and may be an apparatus that heats the object to be treated by heat conduction from a medium such as heated gas, or heat radiation. For example, an RTA (Rapid Thermal Anneal) apparatus such as a GRTA (Gas Rapid Thermal Anneal) apparatus or an LRTA (La mp Rapid Thermal Anneal) apparatus can be used. The LRTA apparatus is an apparatus that heats the object to be treated by radiation of light (electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium um lamp, or a high-pressure mercury lamp. The GRTA apparatus is an apparatus that performs heat treatment using high-temperature gas . . . . .

[0144] The heat treatment may be performed in an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less), or a noble gas (argon, helium, etc ). Note that it is preferable that hydrogen, water, etc. are not contained in the above nitrogen, oxygen, ultra-dry air, or noble gas. After heating in an inert gas atmosphere, heating in an oxygen atmosphere may be performed. Note that the treatment time is 3 minutes to 24 hours .

[0145] Note that between the substrate 102, the scanning line 107, the capacitor line 115, and the gate insulating film 127 When providing an underlying insulating film, the underlying insulating film can be formed of silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride, etc. Note that, as the underlying insulating film, by forming it of silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc., diffusion of impurities, typically alkali metals, water, hydrogen, etc. from the substrate 102 into the oxide semiconductor film 111 can be suppressed. The underlying insulating film can be formed using a sputtering method or a CVD method.

[0146] Next, after forming an opening 123 in the insulating film 126 that reaches the capacitor line 115 to form the gate insulating film 127, a signal line 109 including the source electrode of the transistor 103, a conductive film 113 including the drain electrode of the transistor 103, and a conductive film 125 that electrically connects the oxide semiconductor film 119 and the capacitor line 115 are formed (see FIG. 6(B)).

[0147] The opening 123 can be formed by forming a mask in a third photolithography process so that a part of the region overlapping the capacitor line 115 of the insulating film 126 is exposed, and processing using the mask. Note that the mask and the processing can be performed in the same manner as the scanning line 107 and the capacitor line 115.

[0148] The signal line 109, the conductive film 113, and the conductive film 125 are formed by forming a conductive film using a material applicable to the signal line 109, the conductive film 113, and the conductive film 125, forming a mask in a fourth photolithography process on the conductive film, and processing using the mask. This can be done in the same manner as the scanning line 107 and the capacitance line 115. After forming the signal line 109 and the conductive film 113, the surface of the oxide semiconductor film 111 can be cleaned to reduce the variation in the electrical characteristics of the transistor 103. For example, a diluted phosphoric acid solution can be used. Specifically, a phosphoric acid solution obtained by diluting 85% phosphoric acid 100 times can be used.

[0149] Next, an insulating film 128 is formed over the oxide semiconductor film 111, the oxide semiconductor film 119, the signal line 109, the conductive film 113, the conductive film 125, and the gate insulating film 127. Then, an insulating film 130 is formed over the insulating film 128, and an insulating film 133 is formed over the insulating film 130 (see FIG. 7(A)). Note that it is preferable to form the insulating film 128, the insulating film 130, and the insulating film 133 continuously. By doing so, it is possible to suppress the inclusion of impurities at the interfaces of the insulating film 128, the insulating film 130, and the insulating film 133. In this way, it is possible to suppress the inclusion of impurities at each interface of the insulating film 128, the insulating film 130, and the insulating film 133. The insulating film 128 can be formed using various film formation methods such as CVD method or sputtering method using a material applicable to the insulating film 129. The insulating film 130 can be formed using a material applicable to the insulating film 131. The insulating film 133 can be formed using a material applicable to the insulating film 132.

[0150] When an insulating oxide film capable of reducing the interface state density with the oxide semiconductor film 111 is applied to the insulating film 129, the insulating film 128 can be formed using the following formation conditions. Here, the case of forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film is described. The insulating film 130 can be formed using a material applicable to the insulating film 131. The insulating film 133 can be formed using a material applicable to the insulating film 132. The insulating film 133 can be formed using a material applicable to the insulating film 132. The insulating film 133 can be formed using a material applicable to the insulating film 132.

[0151] When an insulating oxide film capable of reducing the interface state density with the oxide semiconductor film 111 is applied to the insulating film 129, the insulating film 128 can be formed using the following formation conditions. Here, the case of forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film is described. When forming the insulating oxide film, the insulating film 128 can be formed using the following formation conditions. Here, the case of forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film is described. When forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film, the formation conditions are as follows: A substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is heated to 1 degrees Celsius. Maintain at a temperature of 80°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower, in the processing chamber introduce a deposition gas containing silicon of the source gas and an oxidizing gas, and the pressure in the processing chamber is set to 20 Pa or higher and 250 Pa or lower, more preferably 40 Pa or higher and 200 Pa or lower, and the condition is to supply high-frequency power to the electrode provided in the processing chamber.

[0152] Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, fluorinated silane, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. There are.

[0153] By setting the amount of the oxidizing gas to 100 times or more with respect to the deposition gas containing silicon, it is possible to reduce the hydrogen content contained in the insulating film 128 (insulating film 129) and at the same time reduce the dangling bonds contained in the insulating film 128 (insulating film 129). 。 Since the oxygen moving from the insulating film 130 (insulating film 131) may be captured by the dangling bonds contained in the insulating film 128 (insulating film 129), if the dangling bonds contained in the insulating film 128 (insulating film 129) are reduced, the oxygen contained in the insulating film 130 (insulating film 13 1) can be efficiently transferred to the oxide semiconductor film 111, and the oxygen deficiency contained in the oxide semiconductor film 111 can be reduced. As a result, the amount of hydrogen mixed into the oxide semiconductor film 111 can be reduced and the oxygen deficiency contained in the oxide semiconductor film 111

[0154] The insulating film 131 is an oxide insulating film containing the above oxygen-excess region or oxygen satisfying a stoichiometric composition When forming an insulating oxide film containing more oxygen, the insulating film 130 can be formed using the following formation conditions. Here, the case of forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film will be described. The formation conditions are as follows: the substrate placed in the evacuated processing chamber of the plasma CVD apparatus is maintained at 180°C or higher and 260°C or lower, more preferably 180°C or higher and 230°C or lower. Raw material gas is introduced into the processing chamber, and the pressure in the processing chamber is set to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0.17 W / cm² or higher and 0.5 W / cm² or lower, more preferably 0.25 W / cm² or higher and 0.35 W / cm² or lower, is supplied to the electrode provided in the processing chamber. The raw material gas for the insulating film 130 can be the same as the raw material gas applicable to the formation of the insulating film 128. By supplying the high-frequency power with the above power density in the processing chamber with the above pressure, the decomposition efficiency of the raw material gas in the plasma increases, the oxygen radicals increase, and the oxidation of the raw material gas proceeds. As a result, the oxygen content in the insulating film 130 becomes higher than the stoichiometric composition. However, when the substrate temperature is at the above temperature, 2 the binding force between silicon and oxygen is weak, so part of the oxygen desorbs due to heating. 2 As a result, it is possible to form an insulating oxide film that contains more oxygen than the oxygen satisfying the stoichiometric composition and part of the oxygen desorbs due to heating. Also, the insulating film 128 is provided on the oxide semiconductor film 111. 2 Therefore, the insulation 2 is as follows.

[0155] The raw material gas for the insulating film 130 can be the same as the raw material gas applicable to the formation of the insulating film 128. It is possible.

[0156] As the formation conditions of the insulating film 130, by supplying the high-frequency power with the above power density in the processing chamber with the above pressure, the decomposition efficiency of the raw material gas in the plasma increases, the oxygen radicals increase, and the oxidation of the raw material gas proceeds. Therefore, the oxygen content in the insulating film 130 becomes higher than the stoichiometric composition. However, when the substrate temperature is at the above temperature, the binding force between silicon and oxygen is weak, so part of the oxygen desorbs due to heating. As a result, it is possible to form an insulating oxide film that contains more oxygen than the oxygen satisfying the stoichiometric composition and part of the oxygen desorbs due to heating. Also, the insulating film 128 is provided on the oxide semiconductor film 111. Therefore, the insulation can be achieved. In the step of forming the film 130, the insulating film 128 serves as a protective film for the oxide semiconductor film 111. Thus, even when the insulating film 130 is formed using high-frequency power with a high power density, damage to the oxide semiconductor film 111 can be suppressed.

[0157] In addition, since the insulating film 130 can increase the amount of oxygen desorbed by heating by increasing its film thickness, it is preferable to provide the insulating film 130 thicker than the insulating film 128. Even when the insulating film 130 is provided thicker by providing the insulating film 128, the coverage can be improved.

[0158] When the insulating film 132 is formed of a nitride insulating film with a low hydrogen content, the insulating film 133 can be formed using the following formation conditions. Here, the case of forming a silicon nitride film as the nitride insulating film will be described. The formation conditions are as follows: A substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is maintained at 80°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A raw material gas is introduced into the processing chamber, and the pressure in the processing chamber is set to 100 Pa or higher and 250 Pa or lower, preferably 100 Pa or higher and 200 Pa or lower. High-frequency power is supplied to an electrode provided in the processing chamber.

[0159] As the raw material gas for the insulating film 133, it is preferable to use a depositable gas containing silicon, nitrogen, and ammonia. Typical examples of the depositable gas containing silicon include silane, disilane, trisilane, and silane fluoride. Also, the flow rate of nitrogen is preferably 5 times or more and 50 times or less, more preferably 10 times or more and 50 times or less, relative to the flow rate of ammonia. Note that by using ammonia as the raw material gas, the decomposition of the depositable gas containing silicon and nitrogen can be promoted.​​​ It can be promoted. This is because ammonia is dissociated by plasma energy or thermal energy, and the energy generated by the dissociation contributes to the decomposition of the bonds of the depositable gas molecules containing silicon and the bonds of nitrogen molecules. By doing so, a silicon nitride film with a low hydrogen content and capable of suppressing the intrusion of impurities such as hydrogen and water from the outside can be formed. It dissociates, and the energy generated by the dissociation contributes to the decomposition of the bonds of the depositable gas molecules containing silicon and the bonds of nitrogen molecules. In this way, it is possible to form a silicon nitride film with a low hydrogen content and capable of suppressing the intrusion of impurities such as hydrogen and water from the outside. It can be formed. It can be formed.

[0160] In addition, when a silicon oxide film formed by CVD using an organic silane gas is provided between the insulating film 131 and the insulating film 132, the silicon oxide film is formed on the insulating film 130 by CVD using the above-listed organic silane gas. When a silicon oxide film formed by CVD using an organic silane gas is provided between the insulating film 131 and the insulating film 132, the silicon oxide film is formed on the insulating film 130 by CVD using the above-listed organic silane gas. It is formed on the insulating film 130 by CVD using the above-listed organic silane gas.

[0161] At least after forming the insulating film 130, a heat treatment is performed to move at least the oxygen contained in the insulating film 128 or the insulating film 130 to the oxide semiconductor film 111, preferably reducing the oxygen deficiency of the oxide semiconductor film 111. Note that the heat treatment can be appropriately performed with reference to the details of the heat treatment for dehydrogenation or dehydration of the oxide semiconductor film 111 and the oxide semiconductor film 119. At least after forming the insulating film 130, a heat treatment is performed to move at least the oxygen contained in the insulating film 128 or the insulating film 130 to the oxide semiconductor film 111, preferably reducing the oxygen deficiency of the oxide semiconductor film 111. It is preferable to move at least the oxygen contained in the insulating film 128 or the insulating film 130 to the oxide semiconductor film 111 to reduce the oxygen deficiency of the oxide semiconductor film 111. Note that the heat treatment can be appropriately performed with reference to the details of the heat treatment for dehydrogenation or dehydration of the oxide semiconductor film 111 and the oxide semiconductor film 119. It can be appropriately performed with reference to the details of the heat treatment for dehydrogenation or dehydration of the oxide semiconductor film 111 and the oxide semiconductor film 119. It can be performed.

[0162] Also, one of the preferred formation procedures of the transistor 103 is to form an insulating oxide film that contains more oxygen than oxygen satisfying the stoichiometric composition and from which a part of the oxygen is desorbed by heating as the insulating film 130, perform a heat treatment at 350°C after forming the insulating film 130, form a silicon oxide film by CVD using the above-listed organic silane gas while maintaining the substrate temperature at 350°C, and form a nitride insulating film with a low hydrogen content as the insulating film 132 with the substrate temperature at 350°C. Form an insulating oxide film that contains more oxygen than oxygen satisfying the stoichiometric composition and from which a part of the oxygen is desorbed by heating as the insulating film 130. After forming the insulating film 130, perform a heat treatment at 350°C, form a silicon oxide film by CVD using the above-listed organic silane gas while maintaining the substrate temperature at 350°C. Form a silicon oxide film by CVD using the above-listed organic silane gas while maintaining the substrate temperature at 350°C. As the insulating film 132, form a nitride insulating film with a low hydrogen content with the substrate temperature at 350°C. This is to be done.

[0163] Next, the insulating film 128, the insulating film 130, and the insulating film 133 are After forming a mask by a fifth photolithography process, the insulating film 128 and the insulating film 13 are The insulating film 133 is etched to form an opening 117 reaching the conductive film 113. Then, insulating films 129, 131, and 132 are formed (see FIG. 7B). A pixel electrode 121 is formed on the opening 117 and the insulating film 132 (see FIG. 5).

[0164] The opening 117 can be formed in the same manner as the opening 123. A conductive film is formed using the above-listed materials in contact with the conductive film 113 through the opening 117, A mask is formed on the conductive film by a sixth photolithography process, and the mask is used to process the conductive film. The mask and the processing are performed on the scanning line 107 and the capacitance This can be done in the same manner as line 115.

[0165] Next, an alignment film 158 is formed on the insulating film 132 and the pixel electrode 121. A light-shielding film 152 is formed on the substrate 50. A counter electrode 154 is formed to cover the light-shielding film 152. An alignment film 156 is formed on the counter electrode 154. A liquid crystal 160 is provided on the alignment film 158. Then, the substrate 150 is provided on the substrate 102 so that the alignment film 156 contacts the liquid crystal 160, and the substrate 150 is sealed. The substrate 102 and the substrate 150 are fixed together by a material (not shown).

[0166] The alignment film 156 and the alignment film 158 are formed by using the above-mentioned materials by a method such as spin coating or printing. The film can be formed by appropriately using various film forming methods.

[0167] The light-shielding film 152 is formed by sputtering using the above-listed materials, and is then removed using a mask. It can be formed by etching.

[0168] The counter electrode 154 can be formed using a material applicable to the pixel electrode 121 and by using various film-forming methods such as the CVD method or the sputtering method.

[0169] The liquid crystal 160 can be directly provided on the alignment film 158 by the dispenser method (droplet method). Alternatively, after bonding the substrate 102 and the substrate 150 together, the liquid crystal 16 0 may be injected using capillary action or the like. Further, in order to facilitate alignment of the liquid crystal 160, it is preferable to perform a rubbing process on the alignment films 156 and 158.

[0170] Through the above steps, a semiconductor device according to one aspect of the present invention can be manufactured (see Fig. 5). ).

[0171] <Modification Example 1> In a semiconductor device according to one aspect of the present invention, the connection between the oxide semiconductor film that functions as one electrode constituting the holding capacitance and the capacitance line can be appropriately changed. For example, in order to further increase the opening ratio, a structure can be adopted in which the semiconductor film is in direct contact with the capacitance line without passing through a conductive film. A specific example of this structure will be described with reference to Figs. 8 and 9.

[0172] In the drawings showing the modification examples below, for clarity of the drawings, the substrate 150, the light-shielding film 152, the counter electrode 154, the alignment films 156 and 158, and the liquid crystal 160 are omitted. Also, in the drawings showing the modification examples, the reference numerals used in Fig. 4 or Fig. 5 are appropriately used. In the following modification examples, only the points different from the structures shown in Figs. 4 and 5 will be described.

[0173] ​​​​A specific example of this structure will be described with reference to FIGS. 8 and 9. FIG. 8 is a top view of pixel 101. FIG. 9(A) is a cross-sectional view taken between the dashed-dotted line A1 - A2 and the dashed-dotted line B1 - B2 in FIG. 8. It is.

[0174] In pixel 101 shown in FIGS. 8 and 9, the oxide semiconductor film 119 that functions as one electrode of the holding capacitor 145 is in direct contact with the capacitor line 115 and the opening 143. As in the holding capacitor 105 shown in FIGS. 4 and 5, the oxide semiconductor film 119 and the capacitor line 115 are in direct contact without the interposition of the conductive film 125, and since the conductive film 125 serving as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. This can be achieved by forming an opening that exposes the capacitor line 115 before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 4 and FIG. 5, the oxide semiconductor film 119 and the capacitor line 115 are in direct contact without the interposition of the conductive film 125, and since the conductive film 125 serving as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. This can be achieved by forming an opening that exposes the capacitor line 115 before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 5, the oxide semiconductor film 119 and the capacitor line 115 are in direct contact without the interposition of the conductive film 125, and since the conductive film 125 serving as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. This can be achieved by forming an opening that exposes the capacitor line 115 before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 5, the oxide semiconductor film 119 and the capacitor line 115 are in direct contact without the interposition of the conductive film 125, and since the conductive film 125 serving as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. This can be achieved by forming an opening that exposes the capacitor line 115 before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 5, the oxide semiconductor film 119 and the capacitor line 115 are in direct contact without the interposition of the conductive film 125, and since the conductive film 125 serving as a light-shielding film is not formed, the aperture ratio of the pixel can be further increased. This can be achieved by forming an opening that exposes the capacitor line 115 before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, an opening that exposes the capacitor line 115 is formed, and then the oxide semiconductor films 111 and 119 are formed. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, an opening that exposes the capacitor line 115 is formed, and then the oxide semiconductor films 111 and 119 are formed.

[0175] Also, in FIG. 9, the opening 143 is provided only on the capacitor line 115. However, as shown in FIG. 10, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and the oxide semiconductor film 119 is formed on the capacitor line 115 and the substrate 102, so that the area where the oxide semiconductor film 119 contacts the capacitor line 115 may be increased. This can be achieved by forming the gate insulating film 127 so that a part of each of the capacitor line 115 and the substrate 102 is exposed before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. As a result, the aperture ratio can be increased, the conductivity of the oxide semiconductor film 119 is increased, and the oxide semiconductor film 119 can be easily brought into a conductive state, so that the holding capacitor 146 can function easily. FIG. 10, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and the oxide semiconductor film 119 is formed on the capacitor line 115 and the substrate 102, so that the area where the oxide semiconductor film 119 contacts the capacitor line 115 may be increased. This can be achieved by forming the gate insulating film 127 so that a part of each of the capacitor line 115 and the substrate 102 is exposed before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 10, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and the oxide semiconductor film 119 is formed on the capacitor line 115 and the substrate 102, so that the area where the oxide semiconductor film 119 contacts the capacitor line 115 may be increased. This can be achieved by forming the gate insulating film 127 so that a part of each of the capacitor line 115 and the substrate 102 is exposed before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 10, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and the oxide semiconductor film 119 is formed on the capacitor line 115 and the substrate 102, so that the area where the oxide semiconductor film 119 contacts the capacitor line 115 may be increased. This can be achieved by forming the gate insulating film 127 so that a part of each of the capacitor line 115 and the substrate 102 is exposed before forming the oxide semiconductor films 111 and 119 in FIG. 6(A), and then forming the oxide semiconductor films 111 and 119. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and then the oxide semiconductor films 111 and 119 are formed. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and then the oxide semiconductor films 111 and 119 are formed. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and then the oxide semiconductor films 111 and 119 are formed. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and then the oxide semiconductor films 111 and 119 are formed. FIG. 6(A), before forming the oxide semiconductor films 111 and 119, the gate insulating film 127 is formed so that a part of each of the capacitor line 115 and the substrate 102 is exposed, and then the oxide semiconductor films 111 and 119 are formed.

[0176] <Modification Example 2> In the semiconductor device which is one aspect of the present invention, the connection between the oxide semiconductor film functioning as one of the electrodes constituting the holding capacitance and the capacitance line can be changed as appropriate. For example, in order to reduce the contact resistance between the semiconductor film and the conductive film, the conductive film can be provided in contact along the outer periphery of the semiconductor film. A specific example of this structure will be described with reference to FIGS. 11 and 12. Note that FIG. 11 shows a top view of the pixel 101 of this structure, FIG. 12(A) is a cross-sectional view between the dashed-dotted lines A1 - A2 and between the dashed-dotted lines B1 - B2 in FIG. 11, and FIG. 12(B) is a cross-sectional view between the dashed-dotted lines C1 - C2 in FIG. 11. In the pixel 101 shown in FIGS. 11 and 12, the conductive film 167 is in contact along the outer periphery of the oxide semiconductor film 119 and is provided in contact with the capacitance line 115 through the opening 123. Further, the conductive film 167 is provided so as to cover the end portion of the oxide semiconductor film 119. The conductive film 167 can be formed using the formation processes of the signal line 109, the conductive film 113, and the conductive film 125. Therefore, since the conductive film 167 may have light-shielding properties, it is preferably formed in a loop shape. Note that as the contact area between the conductive film 167 and the oxide semiconductor film 119 increases, the conductivity of the oxide semiconductor film 119 increases, and the oxide semiconductor film 119 can be easily brought into a conductive state, so that it can easily function as one of the electrodes of the holding capacitance 165. Moreover, in the pixel 101 shown in FIGS. 11 and 12, since the oxide semiconductor film 119 and the capacitance line 115 are in contact with the conductive film 167, the shape of the oxide semiconductor film 119 can be changed as appropriate. For the specific example of this structure, it will be described with reference to FIGS. 11 and 12. Note that FIG. 11 shows a top view of the pixel 101 of this structure, FIG. 12(A) is a cross-sectional view between the dashed-dotted lines A1 - A2 and between the dashed-dotted lines B1 - B2 in FIG. 11, and FIG. 12(B) is a cross-sectional view between the dashed-dotted lines C1 - C2 in FIG. 11. In the pixel 101 shown in FIGS. 11 and 12, the conductive film 167 is in contact along the outer periphery of the oxide semiconductor film 119 and is provided in contact with the capacitance line 115 through the opening 123. Moreover, the conductive film 167 is provided so as to cover the end portion of the oxide semiconductor film 119. The conductive film 167 can be formed using the formation processes of the signal line 109, the conductive film 113, and the conductive film 125.

[0177] In the pixel 101 shown in FIGS. 11 and 12, the conductive film 167 is in contact along the outer periphery of the oxide semiconductor film 119 and is provided in contact with the capacitance line 115 through the opening 123. Moreover, the conductive film 167 is provided so as to cover the end portion of the oxide semiconductor film 119. The conductive film 167 is provided in contact with the capacitance line 115 through the opening 123. Moreover, the conductive film 167 is provided so as to cover the end portion of the oxide semiconductor film 119. The conductive film 167 can be formed using the formation processes of the signal line 109, the conductive film 113, and the conductive film 125. Therefore, since the conductive film 167 may have light-shielding properties, it is preferably formed in a loop shape. Note that as the contact area between the conductive film 167 and the oxide semiconductor film 119 increases, the conductivity of the oxide semiconductor film 119 increases, and the oxide semiconductor film 119 can be easily brought into a conductive state. Therefore, it can easily function as one of the electrodes of the holding capacitance 165.

[0178] Moreover, in the pixel 101 shown in FIGS. 11 and 12, since the oxide semiconductor film 119 and the capacitance line 115 are in contact with the conductive film 167, the shape of the oxide semiconductor film 119 can be changed as appropriate. In order to make the oxide semiconductor film 119 and the capacitance line 115 contact the conductive film 167, the shape of the oxide semiconductor film 119 can be changed as appropriate.

[0179] Further, the conductive film 167 may be provided in contact with the oxide semiconductor film 119 in a state where a loop-shaped portion is separated. It may be provided in contact therewith.

[0180] <Modification 3> In the semiconductor device which is one aspect of the present invention, the connection between the oxide semiconductor film functioning as one electrode constituting the holding capacitance and the capacitance line can be appropriately changed. For example, like the pixel 101 shown in FIGS. 13 and 14, the capacitance line 1 75 can be formed by using the step of forming the signal line 109. It can be formed.

[0181] Note that FIG. 13 shows a top view of the pixel 101 of this structure, and FIG. 14 is a cross-sectional view between the dashed-dotted line A1- A2, between the dashed-dotted line B1-B2, and between the dashed-dotted line D1-D2 in FIG. 13.

[0182] The capacitance line 175 is provided so as to extend in a direction parallel to the signal line 109. Note that the signal line 1 09 and the capacitance line 175 are electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). They are connected.

[0183] In the pixel 101 shown in FIGS. 13 and 14, a region where the oxide semiconductor film 119 and the pixel electrode 121 overlap via the insulating film 129, the insulating film 131, and the insulating film 132 becomes the holding capacitance 174. It becomes the holding capacitance 174.

[0184] When the capacitance line is provided so as to extend in a direction parallel to the signal line 109 like the capacitance line 175, the shape of the pixel is preferably such that the side parallel to the scanning line 107 is longer than the side parallel to the signal line 109, as in the pixel 101 shown in FIG. 13. This is because when the shape of the pixel is such that the side parallel to the signal line 109 is longer than the side parallel to the scanning line 107, as compared with the side parallel to the scanning line 107, as in the pixel 101 shown in FIG. 13. it is preferable that the side parallel to the scanning line 107 is longer. This is because when the shape of the pixel is such that the side parallel to the signal line 109 is longer than the side parallel to the scanning line 107, in the case where the side parallel to the signal line 109 is longer than the side parallel to the scanning line 107, In comparison, it is possible to reduce the overlapping area between the pixel electrode 121 and the capacitor line 175, thereby improving the aperture ratio. This is because the aperture ratio can be improved.

[0185] <Modification Example 4> In a semiconductor device which is one aspect of the present invention, one electrode constituting the holding capacitor and the capacitor line can be made of a semiconductor film (specifically, an oxide semiconductor film). For a specific example, FIG. 1 5 will be used for explanation. Here, only the oxide semiconductor film 198, which is different from the oxide semiconductor films 119 and the capacitor line 115 described in FIGS. 4 and 5, will be described. FIG. 15 is a top view of the pixel 101 of this modification example. In the pixel 101 shown in FIG. 15, an oxide semiconductor film 198 that also serves as one electrode of the holding capacitor 197 and the capacitor line is provided. The oxide semiconductor film 198 has a region extending in a direction parallel to the signal line 109, and this region functions as the capacitor line. In the oxide semiconductor film 198, the region overlapping with the pixel electrode 121 functions as one electrode of the holding capacitor 197. Note that the oxide semiconductor film 198 can be formed by using the process of forming the oxide semiconductor film 111 included in the transistor 103 provided in the pixel 101 shown in FIG. 15.

[0186] The oxide semiconductor film 198 can be provided as one continuous oxide semiconductor film so as to overlap the scanning line 107 in each pixel 101. That is, the oxide semiconductor film 198 can be provided as one continuous oxide semiconductor film without gaps in all the pixels 101 in one row.

[0187] Also, the oxide semiconductor film 198 can be provided as one continuous oxide semiconductor film without gaps in all the pixels 101 in one row. When provided as an oxide semiconductor film, the oxide semiconductor film 198 overlaps with the scanning line 107, and may not function as one of the electrodes of the capacitance line and the holding capacitance 197 due to the potential change of the scanning line 107. Therefore, as shown in FIG. 15, the oxide semiconductor film 198 is provided separately in each pixel 101. Further, the separated oxide semiconductor film 198 is electrically connected using a conductive film 199 that can be formed by utilizing the formation processes of the signal line 1 09 and the conductive film 113. 09 and the conductive film 113. It is preferable to continue.

[0188] In FIG. 15, the region that functions as the capacitance line of the oxide semiconductor film 198 has a structure extending in a direction parallel to the signal line 109, but the region that functions as the capacitance line may have a structure extending in a direction parallel to the scanning line 107. Note that, in the case where the region that functions as the capacitance line of the oxide semiconductor film 198 extends in a direction parallel to the scanning line 107, in the transistor 103 and the holding capacitance 19 7, it is necessary to provide an insulating film between the oxide semiconductor film 111, the oxide semiconductor film 198, the signal line 109, and the conductive film 113 to electrically isolate them. 7, it is necessary to provide an insulating film between the oxide semiconductor film 111, the oxide semiconductor film 198, the signal line 109, and the conductive film 113 to electrically isolate them. By providing the oxide semiconductor film as one of the electrodes of the holding capacitance and the capacitance line provided in the pixel, as in the pixel 101 shown in FIG. 15, the aperture ratio of the pixel can be improved.

[0189] As described above, By providing the oxide semiconductor film as one of the electrodes of the holding capacitance and the capacitance line provided in the pixel, as in the pixel 101 shown in FIG. 15, the aperture ratio of the pixel can be improved.

[0190] <Modification Example 5> In addition, in the pixel 101 described as the above modification example, in order to reduce the parasitic capacitance generated between the pixel electrode 121 and the conductive film 113 or the parasitic capacitance generated between the pixel electrode 121 and the conductive film 167, an organic insulating film can be provided in the region where the parasitic capacitance is generated. In other words, In addition, in the pixel 101 described as the above modification example, in order to reduce the parasitic capacitance generated between the pixel electrode 121 and the conductive film 113 or the parasitic capacitance generated between the pixel electrode 121 and the conductive film 167, an organic insulating film can be provided in the region where the parasitic capacitance is generated. In other words, an organic insulating film can be provided in the region where the parasitic capacitance is generated. ​​Further, the organic insulating film can be partially provided in the pixel 101.

[0191] As the organic insulating film, photosensitive and non-photosensitive organic resins can be applied. For example, acrylic resin, benzocyclobutene-based resin, epoxy resin, or siloxane-based resin can be used. Also, polyamide can be used as the organic insulating film.

[0192] After forming an insulating film using the materials listed above to partially provide the organic insulating film, processing of the insulating film may be required. The method for forming the organic insulating film is not particularly limited and can be appropriately selected according to the material used. For example, spin coating, dipping, spray coating, liquid droplet ejection method (inkjet method), screen printing, offset printing, etc. can be applied. Also, by using a photosensitive organic resin as the organic insulating film, a resist mask becomes unnecessary when forming the organic insulating film, and the process can be simplified.

[0193] <Modification Example 6> In addition, in the semiconductor device which is one aspect of the present invention, the configuration of the capacitance line can be appropriately changed. This structure will be described with reference to FIG. 16. Here, compared with the capacitance line 115 described with reference to FIG. 4, the position where the capacitance line is located is different between two adjacent pixels.

[0194] FIG. 16 is a top view of pixels 401_1 and 401_2 adjacent in the extending direction of the signal line 409.

[0195] The scanning lines 407_1 and 407_2 are parallel to each other and extend in a direction substantially perpendicular to the signal line 109. Between the scanning lines 407_1 and 407_2 ​ A capacitance line 415 is provided in parallel with the scanning lines 407_1 and 407_2. The capacitance line 415 is connected to a holding capacitance 405_1 provided in the pixel 401_1 and a holding capacitance 405_2 provided in the pixel 401_2. The upper surface shapes and the arrangement positions of the components of the pixels 401_1 and 401_2 are symmetric with respect to the capacitance line 415.

[0196] In the pixel 401_1, a transistor 403_1, a pixel electrode 421_1 connected to the transistor 403_1, and a holding capacitance 405_1 are provided.

[0197] The transistor 403_1 is provided in a region where the scanning line 407_1 and the signal line 409 intersect. The transistor 403_1 includes at least an oxide semiconductor film 411_1 having a channel formation region, a gate electrode, a gate insulating film (not shown in FIG. 16), a source electrode, and a drain electrode. In the scanning line 407_1, the region overlapping with the oxide semiconductor film 411_1 functions as the gate electrode of the transistor 403_1. In the signal line 409, the region overlapping with the oxide semiconductor film 411_1 functions as the source electrode of the transistor 403_1. In the conductive film 413_1, the region overlapping with the oxide semiconductor film 411_1 functions as the drain electrode of the transistor 403_1. The conductive film 413_1 and the pixel electrode 421_1 are connected at the opening 417_1.

[0198] The holding capacitance 405_1 is electrically connected to the capacitance line 415 through a conductive film 425 provided in the opening 423. The holding capacitance 405_1 is formed of a light-transmissive oxide semiconductor. The oxide semiconductor film 419_1, the pixel electrode 421_1 having translucency, and a dielectric film are included in the transistor 403_1 and are configured with an insulating film having translucency (not shown in FIG. 16). That is, the holding capacitor 405_1 has translucency.

[0199] The pixel 401_2 is provided with a transistor 403_2 and a holding capacitor 405_2 connected to the transistor 403_2.

[0200] The transistor 403_2 is provided in a region where the scanning line 407_2 and the signal line 409 intersect. The transistor 403_2 includes at least an oxide semiconductor film 411_2 having a channel formation region, a gate electrode, a gate insulating film (not shown in FIG. 16), a source electrode, and a drain electrode. Note that in the scanning line 407_2, a region overlapping with the oxide semiconductor film 411_2 functions as the gate electrode of the transistor 403_2. In the signal line 409, a region overlapping with the oxide semiconductor film 411_2 functions as the source electrode of the transistor 403_2. In the conductive film 413_2, a region overlapping with the oxide semiconductor film 411_2 functions as the drain electrode of the transistor 403_2. The conductive film 413_2 and the pixel electrode 421_2 are connected at the opening 417_2.

[0201] Similar to the holding capacitor 405_1, the holding capacitor 405_2 is electrically connected to the capacitance line 415 through a conductive film 425 provided in the opening 423. The holding capacitor 405_2 is composed of an oxide semiconductor film 419_2 formed of an oxide semiconductor, a pixel electrode 421_2, and an insulating film (not shown in FIG. 16) included in the transistor 403_2. ​​​​​​​​​​​The oxide semiconductor film 419_2, the pixel electrode 421_2, and the dielectric film each have translucency. Therefore, the holding capacitor 405_2 has translucency.

[0202] Note that the cross-sectional structures of the transistor 403_1 and the transistor 403_2, and the holding capacitors 405_ 1 and the holding capacitor 405_2 are the same as those of the transistor 103 and the holding capacitor 105 shown in FIG. 5, respectively, and thus are omitted here. Also, the transistor 403_1 and the transistor 403_2, and the holding capacitors 405_1 and the holding capacitor 405_2 can appropriately refer to the reference numerals attached for explaining the transistor 103 and the holding capacitor 105.

[0203] In the top surface shape, a capacitance line is provided between two adjacent pixels, and by connecting the holding capacitor included in each pixel and the capacitance line, it is possible to reduce the number of capacitance lines. As a result, it is possible to further increase the aperture ratio of the pixel as compared with the structure in which a capacitance line is provided for each pixel.

[0204] <Modification Example 7> In the semiconductor device which is one aspect of the present invention, the shape of the transistor provided in the pixel is not limited to the shape of the transistor shown in the above modification example and can be appropriately changed. For example, in the transistor, the source electrode included in the signal line 109 is U-shaped (C-shaped, co-shaped, or horseshoe-shaped), and the transistor may be of a shape surrounding the conductive film including the drain electrode. By adopting such a shape, even if the area of the transistor is small, it is possible to secure a sufficient channel width, and it is possible to increase the amount of drain current (also referred to as on-current) flowing when the transistor is conducting.

[0205] <Modification Example 8> In the pixel 101, pixel 401_1, and pixel 401_2 described as the above modification example, the oxide semiconductor film 111 is located between the gate insulating film 127 and the conductive film 113 including the region functioning as the source electrode and including the region functioning as the drain electrode in the signal line 109, and a transistor is used. Instead, a transistor in which the oxide semiconductor film 111 is located between the signal line 109 including the region functioning as the source electrode and the conductive film 113 including the region functioning as the drain electrode and the insulating film 129 can be used.

[0206] <Modification Example 9> In the pixel 101, pixel 401_1, and pixel 401_2 described as the above modification example, although the transistor 103 is shown as a channel etch type transistor, instead, a channel protection type transistor can be used. By providing a channel protection film, the surface of the oxide semiconductor film 111 is not exposed to the etchant or etching gas used in the formation process of the signal line 109 and the conductive film 113, and impurities between the oxide semiconductor film 111 and the channel protection film can be reduced. As a result, it is possible to reduce the leakage current flowing between the source electrode and the drain electrode of the transistor 103.

[0207] <Modification Example 10> In the pixel 101, pixel 401_1, and pixel 401_2 described as the above modification example, although the transistor 103 is shown as a transistor having one gate electrode, instead, a transistor having two gate electrodes facing each other through the oxide semiconductor film 111 (dual gate transistor) can be used.

[0208] ​​​​​​​​​​​The dual-gate transistor has a conductive film (which can also be referred to as a back gate electrode) on the insulating film of the transistor 103 described in this embodiment. The conductive film overlaps at least with the channel formation region of the oxide semiconductor film 111. For example, the conductive film has a shape shorter than the width between the signal line 10 9 that functions as the source electrode of the transistor and the conductive film 113 that functions as the drain electrode in the width direction of the channel length. By providing the conductive film at a position overlapping the channel formation region of the oxide semiconductor film 111, the potential of the conductive film is preferably set to the lowest potential of the video signal input to the signal line 109. As a result, it is possible to control the current flowing between the source electrode and the drain electrode on the surface of the oxide semiconductor film 111 facing the conductive film, and variations in the electrical characteristics of the transistor can be reduced. Also, by providing the conductive film, the influence of changes in the surrounding electric field on the oxide semiconductor film 111 can be reduced, and the reliability of the transistor 103 can be improved.

[0209] The conductive film can be formed by the same materials and methods as the scanning line 107, the signal line 109, the pixel electrode 121, etc. Also, the conductive film can be formed using the process of forming the pixel electrode 121. From the above, by using a semiconductor film formed in the same formation process as the oxide semiconductor included in the transistor as one electrode of the holding capacitor, it is possible to manufacture a semiconductor device having a holding capacitor with an increased aperture ratio and a large charge capacity while increasing the aperture ratio. Also, by increasing the aperture ratio, a semiconductor device with excellent display quality can be obtained.

[0210] ​​Further, the transistor within the pixel is a transistor using an oxide semiconductor, and the oxide semiconductor film included in the transistor is made into an oxide semiconductor film with reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, thereby obtaining a semiconductor device having good electrical characteristics. The oxide semiconductor film included in the transistor is made into an oxide semiconductor film with reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen. By doing so, a semiconductor device having good electrical characteristics can be obtained.

[0211] Note that the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

[0212] (Embodiment 2) In this embodiment, one aspect applicable to the oxide semiconductor film, which is a semiconductor film, in the transistor and the storage capacitor included in the semiconductor device described in the above embodiment will be described.

[0213] In addition to an amorphous oxide semiconductor, a single crystal oxide semiconductor, and a polycrystalline oxide semiconductor, the oxide semiconductor film is preferably composed of a crystalline oxide semiconductor (C Axis Aligned Crystalline Oxide Semiconductor: CAAC-OS) having a crystalline portion. The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal portions, and most of the crystal portions have a size that can be accommodated within a cube having a side length of less than 100 nm. Therefore, the crystal portions included in the CAAC-OS film also include cases where the side length is less than 10 nm, less than 5 nm, or less than 3 nm and can be accommodated within a cube. The CAAC-OS film is characterized by having a lower defect level density than a microcrystalline oxide semiconductor film. Hereinafter, the CAAC-OS film will be described in detail. The oxide semiconductor film is preferably composed of a crystalline oxide semiconductor (C Axis Aligned Crystalline Oxide Semiconductor: CAAC-OS) having a crystalline portion.

[0214] The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal portions, and most of the crystal portions have a size that can be accommodated within a cube having a side length of less than 100 nm. Therefore, the crystal portions included in the CAAC-OS film also include cases where the side length is less than 10 nm, less than 5 nm, or less than 3 nm and can be accommodated within a cube. The CAAC-OS film is characterized by having a lower defect level density than a microcrystalline oxide semiconductor film. Hereinafter, the CAAC-OS film will be described in detail. The CAAC-OS film is characterized by having a lower defect level density than a microcrystalline oxide semiconductor film. Hereinafter, a detailed description of the CAAC-OS film will be given.

[0215] ​​​​​​When the CAAC-OS film is observed by a transmission electron microscope (TEM), clear boundaries between crystal parts, that is, grain boundaries (also called grain boundaries) cannot be confirmed. Therefore, it can be said that in the CAAC-OS film, a decrease in electron mobility due to grain boundaries is unlikely to occur.

[0216] When the CAAC-OS film is observed by TEM from a direction approximately parallel to the sample surface (cross-sectional TEM observation), it can be confirmed that metal atoms are arranged in layers in the crystal part. Each layer of metal atoms has a shape that reflects the unevenness of the surface (also called the formed surface) or the upper surface of the CAAC-OS film, and is arranged parallel to the formed surface or the upper surface of the CAAC-OS film.

[0217] On the other hand, when the CAAC-OS film is observed by TEM from a direction approximately perpendicular to the sample surface (planar TEM observation), it can be confirmed that metal atoms are arranged in a triangular or hexagonal shape in the crystal part. However, no regularity is observed in the arrangement of metal atoms between different crystal parts.

[0218] From the cross-sectional TEM observation and the planar TEM observation, it can be seen that the crystal part of the CAAC-OS film has orientation.

[0219] When structural analysis is performed on the CAAC-OS film using an X-ray diffraction (XRD) device, for example, in the analysis of the CAAC-OS film having InGaZnO4 crystals by the out-of-plane method, a peak may appear at a diffraction angle (2θ) near 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, it can be confirmed that the crystals of the CAAC-OS film have c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface. It can be confirmed that the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface.

[0220] On the other hand, in the in-plane analysis by the X-ray incidence method on the CAAC-OS film from a direction substantially perpendicular to the c-axis, a peak may appear at around 2θ = 56°. This peak is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a single crystal oxide semiconductor film of InGaZnO4, when the analysis (φ scan) is performed while rotating the sample with the normal vector of the sample surface as the axis (φ axis) fixing 2θ in the vicinity of 56°, six peaks attributed to crystal planes equivalent to the (110) plane are observed. In contrast, in the case of the CAAC-OS film, no distinct peak appears even when the φ scan is performed with 2θ fixed in the vicinity of 56°. fixing 2θ in the vicinity of 56°, six peaks attributed to crystal planes equivalent to the (110) plane are observed. In contrast, in the case of the CAAC-OS film, no distinct peak appears even when the φ scan is performed with 2θ fixed in the vicinity of 56°. fixing 2θ in the vicinity of 56°, six peaks attributed to crystal planes equivalent to the (110) plane are observed. In contrast, in the case of the CAAC-OS film, no distinct peak appears even when the φ scan is performed with 2θ fixed in the vicinity of 56°. fixing 2θ in the vicinity of 56°, six peaks attributed to crystal planes equivalent to the (110) plane are observed. In contrast, in the case of the CAAC-OS film, no distinct peak appears even when the φ scan is performed with 2θ fixed in the vicinity of 56°. fixing 2θ in the vicinity of 56°, six peaks attributed to crystal planes equivalent to the (110) plane are observed. In contrast, in the case of the CAAC-OS film, no distinct peak appears even when the φ scan is performed with 2θ fixed in the vicinity of 56°.

[0221] From the above, in the CAAC-OS film, the orientations of the a-axis and b-axis are irregular between different crystal parts, but it has c-axis orientation, and the c-axis is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface. Therefore, each layer of the metal atoms arranged in a layered manner confirmed by the cross-sectional TEM observation described above is a plane parallel to the ab plane of the crystal. From the above, in the CAAC-OS film, the orientations of the a-axis and b-axis are irregular between different crystal parts, but it has c-axis orientation, and the c-axis is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface. Therefore, each layer of the metal atoms arranged in a layered manner confirmed by the cross-sectional TEM observation described above is a plane parallel to the ab plane of the crystal. From the above, in the CAAC-OS film, the orientations of the a-axis and b-axis are irregular between different crystal parts, but it has c-axis orientation, and the c-axis is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface. Therefore, each layer of the metal atoms arranged in a layered manner confirmed by the cross-sectional TEM observation described above is a plane parallel to the ab plane of the crystal. From the above, in the CAAC-OS film, the orientations of the a-axis and b-axis are irregular between different crystal parts, but it has c-axis orientation, and the c-axis is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface. Therefore, each layer of the metal atoms arranged in a layered manner confirmed by the cross-sectional TEM observation described above is a plane parallel to the ab plane of the crystal.

[0222] The crystal parts are formed when the CAAC-OS film is formed or when a crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when a crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when a crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when a crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. The crystal parts are formed when the CAAC-OS film is formed or when a crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the surface to be formed or the upper surface of the CAAC-OS film.

[0223] Also, the crystallinity in the CAAC-OS film does not have to be uniform. For example, when the crystal part of the CAAC-OS film is formed by crystal growth from near the upper surface of the CAAC-OS film, the region near the upper surface may have a higher crystallinity than the region near the surface to be formed. Also, when impurities are added to the CA AC-OS film, the crystallinity of the region where the impurities are added changes, and regions with different crystallinities may be formed partially.

[0224] In addition, in the out-of-plane analysis of the CAAC-OS film having InGaZnO4 crystals, in addition to the peak with 2θ near 31°, a peak may also appear at 2θ near 36° . The peak with 2θ near 36° indicates that a part of the CAAC-OS film contains crystals having no c-axis orientation . The CAAC-OS film preferably shows a peak at 2θ near 31° and does not show a peak at 2θ near 36° .

[0225] There are three methods for forming CAAC-OS.

[0226] The first method is to form an oxide semiconductor film with a film formation temperature of 100°C or higher and 450°C or lower, so that the c-axis of the crystal part contained in the oxide semiconductor film forms crystal parts aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface .

[0227] The second method is to form an oxide semiconductor film with a thin thickness and then perform a heat treatment at 200°C or higher and 700°C or lower, so that the c-axis of the crystal part contained in the oxide semiconductor film forms crystal parts aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface .

[0228] The third method is to form the first-layer oxide semiconductor film with a thin thickness, then perform a heat treatment at 200°C or higher and 700 °C or lower, and further form the second-layer oxide semiconductor film, so that the c-axis of the crystal part contained in the oxide semi conductor film forms crystal parts aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface. This is a method of forming crystal parts aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

[0229] A transistor applying CAAC-OS to an oxide semiconductor film has small fluctuations in electrical characteristics due to irradiation with visible light or ultraviolet light. Therefore, a transistor applying CAAC-OS to an oxide semiconductor film has good reliability. This is a method of forming crystal parts aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

[0230] In addition, CAAC-OS is preferably formed by sputtering using an oxide semiconductor sputtering target that is polycrystalline. When ions collide with the sputtering target, the crystal region contained in the sputtering target may split from the a-b plane and peel off as flat plate-shaped or pellet-shaped sputtering particles having a plane parallel to the a-b plane. In this case, CAAC-OS can be formed by the flat plate-shaped or pellet-shaped sputtering particles reaching the film-forming surface while maintaining the crystal state. When ions collide with the sputtering target, the crystal region contained in the sputtering target may split from the a-b plane and peel off as flat plate-shaped or pellet-shaped sputtering particles having a plane parallel to the a-b plane. In this case, CAAC-OS can be formed by the flat plate-shaped or pellet-shaped sputtering particles reaching the film-forming surface while maintaining the crystal state. In this case, CAAC-OS can be formed by the flat plate-shaped or pellet-shaped sputtering particles reaching the film-forming surface while maintaining the crystal state. In this case, CAAC-OS can be formed by the flat plate-shaped or pellet-shaped sputtering particles reaching the film-forming surface while maintaining the crystal state. In this case, CAAC-OS can be formed by the flat plate-shaped or pellet-shaped sputtering particles reaching the film-forming surface while maintaining the crystal state.

[0231] In addition, in order to form CAAC-OS, it is preferable to apply the following conditions.

[0232] By reducing the incorporation of impurities during film formation, it is possible to suppress the crystal state from being disrupted by impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film-forming chamber may be reduced. In addition, the impurity concentration in the film-forming gas may be reduced. Specifically, the dew point should be reduced. A film-forming gas having a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0233] Also, by increasing the heating temperature of the film-forming surface during film formation (for example, the substrate heating temperature), migration of sputtering particles occurs after reaching the film-forming surface. Specifically, film formation is carried out with the temperature of the film-forming surface being 100°C or higher and 740°C or lower, preferably 150°C or higher and 500°C or lower. When flat or pellet-shaped sputtering particles reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface. By increasing the temperature of the film-forming surface during film formation, when flat or pellet-shaped sputtering particles reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface.

[0234] Also, it is preferable to reduce plasma damage during film formation by increasing the oxygen ratio in the film-forming gas and optimizing the power. The oxygen ratio in the film-forming gas is 30% by volume or higher, preferably 100% by volume.

[0235] As an example of the sputtering target, an In-Ga-Zn-O compound target is shown below.

[0236] InO X powder, GaO Y powder and ZnO Z powder are mixed in a predetermined number of moles, and after pressure treatment, heat treatment is carried out at a temperature of 1000°C or higher and 1500°C or lower to obtain a polycrystalline In-Ga-Zn-based metal oxide target. The pressure treatment may be carried out while cooling (or allowing to cool), or may be carried out while heating. Here, X, Y, and Z are arbitrary positive numbers. X powder, GaO Y powder and ZnO Z powder is 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 or 3:1:2 Note that the type of powder and the molar ratio of mixing may be appropriately changed according to the sputtering target to be produced.

[0237] Also, the oxide semiconductor film may have a structure in which a plurality of oxide semiconductor films are stacked. For example, the oxide semiconductor film may be a stack of a first oxide semiconductor film and a second oxide semiconductor film, and metal oxides having different atomic ratios may be used for the first oxide semiconductor film and the second oxide semiconductor film. For example, one of an oxide containing two types of metals, an oxide containing three types of metals, and an oxide containing four types of metals may be used for the first oxide semiconductor film, and a second oxide semiconductor film may be used for the second oxide semiconductor film. An oxide containing two types of metals different from those of the first oxide semiconductor film, an oxide containing three types of metals, or an oxide containing four types of metals may be used.

[0238] The oxide semiconductor film may have a two-layer structure, and the constituent elements of the first oxide semiconductor film and the second oxide semiconductor film may be the same, and the atomic ratios of both may be different. For example, the atomic ratio of the first oxide semiconductor film may be In:Ga:Zn = 3:1:2, and the atomic ratio of the second oxide semiconductor film may be In :Ga:Zn = 1:1:1. Also, the atomic ratio of the first oxide semiconductor film may be In :Ga:Zn = 2:1:3, and the atomic ratio of the second oxide semiconductor film may be In:Ga:Zn = 1:3:2. Note that the atomic ratio of each oxide semiconductor film includes a variation of plus or minus 20% of the above atomic ratio as an error.

[0239] At this time, of the first oxide semiconductor film and the second oxide semiconductor film, the atomic ratio of In and Ga in the oxide semiconductor film closer to the gate electrode ( channel side) may be In ≧ Ga. Also​ The atomic ratio of In to Ga in the oxide semiconductor film on the side far from the gate electrode (back channel side) is preferably In < Ga. With these stacked structures, a transistor with high field-effect mobility can be fabricated. On the other hand, the atomic ratio of In to Ga in the oxide semiconductor film on the side close to the gate electrode (channel side) is In < Ga, and by setting the atomic ratio of In to Ga in the oxide semiconductor film on the back channel side to In ≧ Ga, the variation in the threshold voltage due to the change over time of the transistor and the reliability test can be reduced.

[0240] The first oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 can be formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:2. It can be formed with the substrate temperature at room temperature using argon or a mixed gas of argon and oxygen as the sputtering gas. The second oxide semiconductor film with an atomic ratio of In:Ga:Zn = 3:1:2 can be formed in the same manner as the first oxide semiconductor film using an oxide target with an atomic ratio of In:Ga:Zn = 3:1:2.

[0241] Also, the oxide semiconductor film may have a three-layer structure, with the constituent elements of the first to third oxide semiconductor films being the same and the atomic ratios of each being different. The configuration with the oxide semiconductor film having a three-layer structure will be described with reference to FIG. 17.

[0242] The transistor 297 shown in FIG. 17 has a first oxide semiconductor film 299a, a second oxide semiconductor film 299b, and a third oxide semiconductor film 299c stacked in order from the gate insulating film 127 side. The first oxide semiconductor film 299a and the third oxide semiconductor film 299c are configured The material to be used is InM1 x Zn y O z (x ≧ 1, y > 1, z > 0, M1 = Ga, Hf, etc.) The material represented by the above formula is used. However, when Ga is included in the material constituting the first oxide semiconductor film 299a and the third oxide semiconductor film 299c, if the proportion of Ga included is large, specifically when the material represented by InM1 Zn X O Y has X exceeding 10, powder may be generated during film formation, which is unsuitable. In the transistor 297, the configuration other than the first oxide semiconductor film Z 299a, the second oxide semiconductor film 299b, and the third oxide semiconductor film 299c is the same as the transistor described in the above embodiment (for example, the transistor 103 described in Embodiment 1).

[0243]

[0244] Also, the material constituting the second oxide semiconductor film 299b is InM2 x Zn y O z (x ≧ 1, y ≧ x, z > 0, M2 = Ga, Sn, etc.) and the material represented by the above formula is used.

[0244] The materials of the first, second, and third oxide semiconductor films are appropriately selected so that the conduction band of the second oxide semiconductor film 299b is the deepest from the vacuum level compared to the conduction bands of the first oxide semiconductor film 299a and the third oxide semiconductor film 299c, forming a well-type structure.

[0245] As described in Embodiment 1, in the oxide semiconductor film, silicon or carbon, which is one of the Group 14 elements, generates electrons as carriers and increases the carrier density. Therefore, when silicon or carbon is included in the oxide semiconductor film, the oxide semiconductor film will be n-type. ​​​. Therefore, the silicon concentration and carbon concentration contained in each oxide semiconductor film are 3×10 18 / c m 3 or less, preferably 3×10 17 / cm 3 or less. In particular, so that the 14th group element is not mixed into the second oxide semiconductor film 2 99b, the first oxide semiconductor film 299a and the third oxide semiconductor film 299c sandwich, or surround the second oxide semiconductor film 299b that serves as a carrier path. That is, the first oxide semiconductor film 299a and the third oxide semiconductor film 299c can also be called barrier films that prevent the 14th group elements such as silicon and carbon from being mixed into the second oxide semiconductor film 299b.

[0246] For example, the atomic ratio of the first oxide semiconductor film 299a can be In:Ga:Zn = 1:3:2 , the atomic ratio of the second oxide semiconductor film 299b can be In:Ga:Zn = 3:1:2, and the atomic ratio of the third oxide semiconductor film 299c can be In:Ga:Zn = 1:1:1. Note that the third oxide semiconductor film 299c can be formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:1:1.

[0247] Alternatively, the first oxide semiconductor film 299a can be an oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 , the second oxide semiconductor film 299b can be an oxide semiconductor film with an atomic ratio of In:Ga: Zn = 1:1:1 or In:Ga:Zn = 1:3:2, and the third oxide semiconductor film 299c can be an oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2, resulting in a three-layer structure.

[0248] The constituent elements of the first oxide semiconductor film 299a to the third oxide semiconductor film 299c are the same, so the second oxide semiconductor film 299b has fewer defect levels (trap levels) at the interface with the first oxide semiconductor film 299a. Specifically, the defect levels (trap levels) are fewer than those at the interface between the gate insulating film 127 and the first oxide semiconductor film 299a. Therefore, due to the stacking of the oxide semiconductor films as described above, the change over time of the transistor and the amount of variation in the threshold voltage due to the reliability test can be reduced.

[0249] Also, by appropriately selecting the materials of the first oxide semiconductor film 299a, the second oxide semiconductor film 299b, and the third oxide semiconductor film 299c so that the conduction band of the second oxide semiconductor film 299b is the deepest from the vacuum level compared to the conduction bands of the first oxide semiconductor film 299a and the third oxide semiconductor film 299c, it is possible to increase the field-effect mobility of the transistor and reduce the amount of variation in the threshold voltage due to the change over time of the transistor and the reliability test.

[0250] In addition, different oxide semiconductors with different crystallinities may be applied to the first oxide semiconductor film 299a to the third oxide semiconductor film 299c. That is, a configuration in which a single-crystalline oxide semiconductor, a polycrystalline oxide semiconductor, an amorphous oxide semiconductor, and CAAC-OS are appropriately combined may be used. Also, if an amorphous oxide semiconductor is applied to any one of the first oxide semiconductor film 299a to the third oxide semiconductor film 299c, the internal stress and external stress of the oxide semiconductor film are relaxed, the variation in the electrical characteristics of the transistor is reduced, and the amount of variation in the threshold voltage due to the change over time of the transistor and the reliability test can be reduced.

[0251] ​​ Further, the second oxide semiconductor film 299b that can be at least a channel formation region is preferably CAA C-OS. Also, the oxide semiconductor film on the back channel side, in this embodiment form, the third oxide semiconductor film 299c is preferably an amorphous oxide semiconductor or CAAC-OS . By adopting such a structure, it is possible to reduce the amount of change over time of the transistor and the fluctuation amount of the threshold voltage due to reliability tests .

[0252] Also, in the semiconductor device which is one aspect of the present invention, when the transistor 297 shown in FIG. 17 is applied to the transistor 103 , the oxide semiconductor film 119 that functions as one electrode of the holding capacitor 105 also has a three-layer structure of the first oxide semiconductor film 299a to the third oxide semiconductor film 299c .

[0253] In this case, it can be said that the channel formation region of the transistor 297 which is the switching element of the pixel is the second oxide semiconductor film 299b . And in the holding capacitor 105, it can be said that the first oxide semiconductor film 299a to the third oxide semiconductor film 299c function as one electrode of the holding capacitor 105 .

[0254] That is, in the case of this configuration, the channel formation region of the transistor which is the switching element of the pixel is provided on a surface different from the surface on which the oxide semiconductor film that functions as one electrode of the holding capacitor is provided .

[0255] Note that the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments .

[0256] (Embodiment 3) ​​​A display device (also referred to as a display apparatus) having a display function can be fabricated using the transistor and storage capacitance shown as an example in the above embodiment. Also, part or all of a driving circuit including the transistor can be integrally formed on the same substrate as the pixel portion to form a system-on-panel. In the present embodiment, an example of a display device using the transistor shown as an example in the above embodiment will be described with reference to the drawings. In FIG. 18(A), a sealing material 905 is provided so as to surround a pixel portion 902 provided on a first substrate 901, and is sealed by a second substrate 906. In FIG. 18(A), a signal line driving circuit 903 formed of a single-crystalline semiconductor or a polycrystalline semiconductor and a scanning line driving circuit 904 are mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. Also, various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from FPC (Flexible printed circuit) 918a and FPC 918b. In FIGS. 18(B) and 18(C), a sealing material 905 is provided so as to surround the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901. Also, a second substrate 906 is provided on the pixel portion 902 and the scanning line driving circuit 904. Accordingly, the pixel portion 902 and the scanning line driving circuit 904 are sealed together with the display element by the first substrate 901, the sealing material 905, and the second substrate 906. In FIGS. 18(B) and 18(C), in a region different from the region surrounded by the sealing material 905 on the first substrate 901 using the transistor shown as an example in the above embodiment. For the example of the display device will be described with reference to the drawings.

[0257] In FIG. 18(A), a sealing material 905 is provided so as to surround the pixel portion 902 provided on the first substrate 901, and is sealed by the second substrate 906. In FIG. 18(A ) the region surrounded by the sealing material 905 on the first substrate 901 is different from the region, a signal line driving circuit 903 formed of a single-crystalline semiconductor or a polycrystalline semiconductor and a scanning line driving circuit 904 are mounted on a separately prepared substrate. Also, various signals and potentials supplied to the signal line driving circuit 90 3, the scanning line driving circuit 904, or the pixel portion 902 are supplied from FPC (Flexible printed circuit) 918a, FPC 918b from are supplied.

[0258] In FIGS. 18(B) and 18(C), a sealing material 905 is provided so as to surround the pixel portion 90 2 and the scanning line driving circuit 904 provided on the first substrate 901. Also a second substrate 906 is provided on the pixel portion 902 and the scanning line driving circuit 904. Accordingly the pixel portion 902 and the scanning line driving circuit 904 are sealed together with the display element by the first substrate 901, the sealing material 905 and the second substrate 906. In FIGS. 18(B) and FIG. 1 8(C), in a region different from the region surrounded by the sealing material 905 on the first substrate 901​ In different regions, a signal line driving circuit 903 formed of a single-crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate. In FIGS. 18(B) and 18(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918.

[0259] In FIGS. 18(B) and 18(C), an example in which the signal line driving circuit 903 is separately formed and mounted on the first substrate 901 is shown, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted.

[0260] Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (C hip On Glass) method, a wire bonding method, or a TAB (Tape Automated Bonding) method or the like can be used. FIG. 18(A) is an example in which the signal line driving circuit 903 and the scanning line driving circuit 904 are mounted by the COG method, FIG. 18(B) is an example in which the signal line driving circuit 903 is mounted by the COG method, and FIG. 18( C) is an example in which the signal line driving circuit 903 is mounted by the TAB method.

[0261] In addition, the display device includes a panel in a state where the display element is sealed, and a module in a state where an IC including a controller is mounted on the panel.

[0262] Note that the display device in this specification refers to an image display device or a display device. In addition, it can function as a light source (including a lighting device) instead of the display device. Also , connectors, for example, modules with an FPC or TCP attached, or modules with a printed circuit board provided at the end of the TCP, or modules with an IC (integrated circuit) directly mounted on a display element by the COG method are all included in the display device. The pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 each have a plurality of transistors, and the transistors shown in the above embodiments can be applied. As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element), a light emitting element (also referred to as a light emitting display element) can be used. The light emitting element includes elements whose luminance is controlled by current or voltage in its category. Specifically, it includes an organic EL (Electro Luminescence) element, an inorganic EL element, etc. Also, electronic ink, etc., and display media whose contrast changes by an electrical action can also be applied. FIG. 19 shows an example of a liquid crystal display device using a liquid crystal element as the display element.

[0263] Moreover, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 have a plurality of transistors, and the transistors shown in the above embodiment can be applied. As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element), a light emitting element (also referred to as a light emitting display element) can be used. The light emitting element includes elements whose luminance is controlled by current or voltage in its category. Specifically, it includes an organic EL (Electro Luminescence) element, an inorganic EL element, etc. Also, electronic ink, etc., and display media whose contrast changes by an electrical action can also be applied. FIG. 19 shows an example of a liquid crystal display device using a liquid crystal element as the display element. FIGS. 19 and 20 are cross-sectional views between the dashed-dotted line X1 - X2 in FIG. 18(B). Note that in FIGS. 19 and 20, only a part of the structure of the pixel portion is described.

[0264] As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element), a light emitting element (also referred to as a light emitting display element) can be used. The light emitting element includes elements whose luminance is controlled by current or voltage in its category. Specifically, it includes an organic EL (Electro Luminescence) element, an inorganic EL element, etc. Also, electronic ink, etc., and display media whose contrast changes by an electrical action can also be applied. FIG. 19 shows an example of a liquid crystal display device using a liquid crystal element as the display element. Moreover, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 have a plurality of transistors, and the transistors shown in the above embodiment can be applied. As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element), a light emitting element (also referred to as a light emitting display element) can be used. The light emitting element includes elements whose luminance is controlled by current or voltage in its category. Specifically, it includes an organic EL (Electro Luminescence) element, an inorganic EL element, etc. Also, electronic ink, etc., and display media whose contrast changes by an electrical action can also be applied. FIG. 19 shows an example of a liquid crystal display device using a liquid crystal element as the display element. Moreover, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 have a plurality of transistors, and the transistors shown in the above embodiment can be applied. Moreover, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 have a plurality of transistors, and the transistors shown in the above embodiment can be applied. Moreover, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 have a plurality of transistors, and the transistors shown in the above embodiment can be applied.

[0265] FIGS. 19 and 20 are cross-sectional views between the dashed-dotted line X1 - X2 in FIG. 18(B). Note that in FIGS. 19 and 20, only a part of the structure of the pixel portion is described. Moreover, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 have a plurality of transistors, and the transistors shown in the above embodiment can be applied.

[0266] The display device shown in FIGS. 19 and 20 is a vertical electric field type liquid crystal display device. The liquid crystal display device has connection terminal electrodes 915 and terminal electrodes 916, and the connection terminal electrodes 915 and the terminal electrodes 916 are electrically connected through an anisotropic conductive agent 919 to the terminals of the FPC 918. The liquid crystal display device has connection terminal electrodes 915 and terminal electrodes 916, and the connection terminal electrodes 915 and the terminal electrodes 916 are electrically connected through an anisotropic conductive agent 919 to the terminals of the FPC 918. The liquid crystal display device has connection terminal electrodes 915 and terminal electrodes 916, and the connection terminal electrodes 915 and the terminal electrodes 916 are electrically connected through an anisotropic conductive agent 919 to the terminals of the FPC 918. The liquid crystal display device has connection terminal electrodes 915 and terminal electrodes 916, and the connection terminal electrodes 915 and the terminal electrodes 916 are electrically connected through an anisotropic conductive agent 919 to the terminals of the FPC 918.

[0267] The connection terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 is formed from the same conductive film as the source and drain electrodes of the transistors 910 and 911 are.

[0268] Also, the pixel portion 902 and the scanning line driving circuit 904 provided on the first substrate 901 each have a plurality of transistors. Illustrated are the transistor 910 included in the pixel portion 902 and the transistor 911 included in the scanning line driving circuit 904. An insulating film 924 corresponding to the insulating film 129, the insulating film 131, and the insulating film 132 shown in Embodiment 1 is provided on the oxide semiconductor film included in the transistors 910 and transistor 911. Note that the insulating film 9 23 is an insulating film that functions as an underlayer film.

[0269] In this embodiment, any of the transistors shown in the above embodiment can be applied as the transistors 910 and 911. Also, a holding capacitor 926 is configured using the oxide semiconductor film 92 7, the insulating film 924, and the first electrode 930. Note that the oxide semiconductor film 927 is electrically connected to the capacitance line 929 via an electrode 928 formed in an opening formed in the gate insulating film 922. The capacitance line 929 is formed from the same conductive film as a scanning line including a region that functions as a gate electrode of the transistors 910 and transistor 911. Here, the configuration of the holding capacitor shown in Embodiment 1 is illustrated as the holding capacitor 926, but a holding capacitor having a configuration shown in another embodiment can be used as appropriate

[0270] Also, in the transistor 911 included in the scanning line driving circuit 904, in FIG. 19(A) ​​​​​​​is on the insulating film 924 and has a conductive film at a position overlapping with the channel formation region of the oxide semiconductor film. FIG. 19(B) shows a structure in which an insulating film 951 is provided on the insulating film 924, and a conductive film 917 is provided on the insulating film 951 at a position overlapping with the channel formation region of the oxide semiconductor film.

[0271] The conductive film 917 can supply a potential and functions as the gate electrode of the transistor 911. That is, the transistor 911 is a dual-gate transistor. Note that the conductive film 917 can be formed of the same conductive film as the first electrode 930. Also, the conductive film 917 can have a shape shorter than the width between the source electrode and the drain electrode of the transistor 911 in the width direction of the channel length.

[0272] In the transistor 911 included in the scanning line driving circuit 904, since the conductive film 917 is provided, it is possible to reduce the variation in the gate voltage (turn-on gate voltage) at which the on-current starts to flow at different drain voltages. Also, in the transistor 911, since the conductive film 917 is provided, it is possible to control the current flowing between the source electrode and the drain electrode of the transistor 911 in the region of the oxide semiconductor film on the conductive film 917 side. Therefore, it is possible to reduce the variation in electrical characteristics among the plurality of transistors included in the scanning line driving circuit 904. And in the transistor 911, by setting the potential of the conductive film 917 to the lowest potential of the scanning line driving circuit 904 or a potential equivalent to the lowest potential, it is possible to reduce the variation in the threshold voltage of the transistor 911, thereby improving the reliability. ​​​​​It can be increased. Note that the lowest potential of the scanning line driving circuit 904 refers to the lowest potential among the potentials supplied when operating the scanning line driving circuit 90 4. For example, when the potential supplied when operating the scanning line driving circuit 104 is taken as the reference of the source electrode potential of the transistor 911, it is the potential (Vss) of the source electrode.

[0273] In the transistor 911 included in the scanning line driving circuit 904, if the thickness of the insulating film 924 is thin, the electrical characteristics of the transistor 911 may vary due to the influence of the electric field from the conductive film 917 applied to the oxide semiconductor film. Therefore, as shown in FIG. 19(B), by providing the insulating film 95 1, the influence of the electric field can be controlled, and the electrical characteristics of the transistor 911 can be improved.

[0274] The insulating film 951 can be provided with a material applicable to the insulating film 924. Also, as the insulating film 951, an organic insulating film can be used. Examples of the organic insulating film include photosensitive and non- photosensitive organic resins. For example, acrylic resin, benzocyclobutene-based resin, epoxy resin, or siloxane-based resin can be used. Also, as the organic insulating film polyamide can be used. Note that the formation method of the organic insulating film is not particularly limited and can be appropriately selected according to the material used. For example, spin coating, dipping, spray coating, droplet discharge method (inkjet method), screen printing, offset printing, etc. can be applied.

[0275] Also, the conductive film 917 also has a function of shielding an external electric field. That is, an external electric field is internal (Circuit section including transistors) also has a function (particularly an electrostatic shielding function) that prevents it from being affected. Due to the shielding function of the conductive film 917, the transistor 911 can suppress fluctuations in the electrical characteristics of the transistor caused by external electric fields such as static electricity, and can improve reliability. In FIG. 19, although the transistors included in the scanning line driving circuit are illustrated, the transistors included in the signal line driving circuit can also be dual-gate transistors similar to the transistor 911. By making the transistors included in the signal line driving circuit dual-gate transistors, the transistors exhibit the same effects as the transistor 911.

[0276] line driving circuit can also be dual-gate transistors similar to the transistor 911. By making the transistors included in the signal line driving circuit dual-gate transistors, the transistors exhibit the same effects as the transistor 911. line driving circuit can also be dual-gate transistors similar to the transistor 911. By making the transistors included in the signal line driving circuit dual-gate transistors, the transistors exhibit the same effects as the transistor 911. line driving circuit can also be dual-gate transistors similar to the transistor 911. By making the transistors included in the signal line driving circuit dual-gate transistors, the transistors exhibit the same effects as the transistor 911. line driving circuit can also be dual-gate transistors similar to the transistor 911. By making the transistors included in the signal line driving circuit dual-gate transistors, the transistors exhibit the same effects as the transistor 911.

[0277] As described above, the semiconductor device (display device) according to one aspect of the present invention is a highly reliable semiconductor device.

[0278] Next, a structure different from the vertical electric field type liquid crystal display device shown in FIG. 19 will be described. Specifically, a horizontal electric field type liquid crystal display device will be described with reference to FIG. 20. FIG. 20 is a liquid crystal display device in the FFS (Fringe Field Switching) mode, which is an example of the horizontal electric field type. display device in the FFS (Fringe Field Switching) mode, which is an example of the horizontal electric field type. display device in the FFS (Fringe Field Switching) mode, which is an example of the horizontal electric field type.

[0279] In the liquid crystal display device shown in FIG. 20, the connection terminal electrode 915 is formed of the same material and in the same process as the first electrode 940, and the terminal electrode 916 is formed of the same material and in the same process as the source electrode and drain electrode of the transistors 910 and 911. electrode and drain electrode of the transistors 910 and 911.

[0280] Also, the liquid crystal element 943 includes a first electrode 940 formed on the insulating film 924, a second electrode It includes 941 and liquid crystal 908. Note that the liquid crystal element 943 can have the same structure as the holding capacitor 105 shown in Embodiment 1. The first electrode 940 can appropriately use the material shown for the first electrode 930 in FIG. 19. Also, the first electrode 940 has a planar shape that is comb-shaped, stepped, ladder-shaped, etc. The second electrode 941 functions as a common electrode and can be formed in the same manner as the oxide semiconductor film 119 shown in Embodiment 1. An insulating film 924 is provided between the first electrode 940 and the second electrode 941.

[0281] The second electrode 941 is connected to the common wiring 946 via the electrode 9 45. Note that the electrode 9 45 is formed from the same conductive film as the source and drain electrodes of the transistors 910 and 911. The common wiring 946 is formed from the same material and in the same process as the gate electrodes of the transistors 910 and 911. Here, the holding capacitor shown in Embodiment 1 is used as the liquid crystal element 943 for explanation, but the holding capacitors shown in other embodiments can be used as appropriate.

[0282] In the transistor 91 1 included in the scanning line drive circuit 904 of the liquid crystal display device shown in FIG. 20, an insulating film 951 can be provided between the conductive film 917 and the insulating film 924 in the same manner as in FIG. 19(B).

[0283] Here, in the transistor included in the semiconductor device (display device) which is one aspect of the present invention, for example, in a plurality of transistors included in the scanning line drive circuit 904, a wiring including a gate electrode and a wiring including a source electrode or a drain electrode are electrically connected by a conductive film, and the structure will be described. FIG. 21(A) shows a top view of the structure, and FIG. 21(B) shows a cross-sectional view of FIG. ​ Fig. 21(A) shows a cross-sectional view between the dashed-dotted lines Y1 - Y2 and between the dashed-dotted lines Z1 - Z2.

[0284] As shown in Fig. 21(A), a wiring 950 including the gate electrode of the transistor 911 and a wiring 952 including the source electrode of the transistor 911 are in contact with a conductive film 958 provided in the openings 954 and 956.

[0285] As shown in Fig. 21(B), an insulating film 923 is provided on the substrate 901, a wiring 950 is provided on the insulating film 923, a gate insulating film 922 is provided on the wiring 950 and the insulating film 923, a wiring 952 is provided on the gate insulating film 922, and an insulating film 924 is provided on the gate insulating film 922 and the wiring 952. And in the region of the dashed-dotted line Y1 - Y2, an opening 954 reaching the wiring 950 is provided in the gate insulating film 922 and the insulating film 924, and in the region of the dashed-dotted line Z1 - Z2, an opening 956 reaching the wiring 952 is provided in the insulating film 924. And a conductive film 958 is provided on the insulating film 924, in the opening 954, and in the opening 956.

[0286] From the above, the wiring 950 including the gate electrode and the wiring 952 including the source electrode or the drain electrode are electrically connected by the conductive film 958.

[0287] The conductive film 958 can be formed by using the forming process of the conductive film 917 of the transistor 911. In addition, in a plurality of transistors included in the scanning line driving circuit 904, when the wiring including the gate electrode and the wiring including the source electrode or the drain electrode are electrically connected by a conductive film, the conductive film is arranged at a position overlapping with the channel formation region of the transistor. ​​​​​​​​​​​​​ It is preferably configured not to provide.

[0288] The openings 954 and 956 can be formed collectively. Details are as follows . An insulating film to be processed into the gate insulating film 922 is formed on the wiring 950, and wiring 952 is formed, and an insulating film to be processed into the insulating film 924 is formed on the wiring 952. Then, a mask is formed on the insulating film 924, and by processing using the mask, the opening 954 and the opening 956 can be formed. As the mask, a resist mask can be used . As the processing, dry etching can be used. By forming the wiring 95 0 with a metal material or the like, the etching selection ratio in the wiring 950 and the gate insulating film 922 can be increased, so that the openings 954 and the opening 956 can be formed collectively by the dry etching.

[0289] The transistor 910 provided in the pixel portion 902 is electrically connected to the display element.

[0290] The liquid crystal element 913, which is a display element, includes a first electrode 930, a second electrode 931, and liquid crystal 9 08. Note that alignment films 932 and 933 are provided so as to sandwich the liquid crystal 908 . Further, the second electrode 931 is provided on the second substrate 906 side, and the first electrode 930 and the second electrode 931 are configured to overlap via the liquid crystal 908. The liquid crystal element 913 can refer to the liquid crystal element 108 described in Embodiment 1. The first electrode 930 corresponds to the pixel electrode 121 described in Embodiment 1, the second electrode 931 corresponds to the counter electrode 154 described in Embodiment 1, the liquid crystal 908 corresponds to the liquid crystal 160 described in Embodiment 1, and the arrangement can refer to the liquid crystal element 108 described in Embodiment 1. The first electrode 930 corresponds to the pixel electrode 121 described in Embodiment 1, the second electrode 931 corresponds to the counter electrode 154 described in Embodiment 1, the liquid crystal 908 corresponds to the liquid crystal 160 described in Embodiment 1, and the arrangement can refer to the liquid crystal element 108 described in Embodiment 1. The first electrode 930 corresponds to the pixel electrode 121 described in Embodiment 1, the second electrode 931 corresponds to the counter electrode 154 described in Embodiment 1, the liquid crystal 908 corresponds to the liquid crystal 160 described in Embodiment 1, and the counter electrode 154, the liquid crystal 908 corresponds to the liquid crystal 160 described in Embodiment 1, and the The alignment film 932 corresponds to the alignment film 158 described in Embodiment 1, and the alignment film 933 corresponds to the alignment film 156 described in Embodiment 1.

[0291] In the first electrode 930 and the second electrode 931 (also referred to as a pixel electrode, a common electrode, a counter electrode, etc.) to which a voltage is applied to the display element, the light-transmitting property or the reflectivity may be selected depending on the direction of the light to be extracted, the location where the electrode is provided, and the pattern structure of the electrode.

[0292] The first electrode 930 and the second electrode 931 can appropriately use the same materials as the pixel electrode 121 and the counter electrode 154 shown in Embodiment 1.

[0293] Also, the spacer 935 is a columnar spacer obtained by selectively etching an insulating film, and is provided to control the interval (cell gap) between the first electrode 930 and the second electrode 931. Note that a spherical spacer may be used.

[0294] The first substrate 901 and the second substrate 906 are fixed by a sealing material 905. The sealing material 905 can use an organic resin such as a thermosetting resin or a photocuring resin. Also, the sealing material 905 is in contact with the insulating film 924.

[0295] Also, in a semiconductor device (display device) which is one aspect of the present invention, optical members (optical substrates) such as a light-shielding film (black matrix), a polarizing member, a retardation member, an antireflection member, etc. are appropriately provided. For example, circular polarization by a polarizing substrate and a retardation substrate may be used. Also, as the light source, a backlight, a side light, etc. may be used.

[0296] In addition, since transistors are easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured using a non-linear element. The protection circuit is preferably configured using a non-linear element.

[0297] FIG. 22 shows an example of forming a common connection portion (pad portion) on the substrate 901 for electrically connecting to the second electrode 931 provided on the substrate 906 in the display device shown in FIGS. 18 and 19. The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931. The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931.

[0298] The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931. The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931. The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931. The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931. The common connection portion is disposed at a position overlapping the sealing material 925 for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material 925. Alternatively, a common connection portion may be provided at a position not overlapping the sealing material 925 (excluding the pixel portion), and a paste containing conductive particles may be separately provided so as to overlap the common connection portion and electrically connected to the second electrode 931.

[0299] FIG. 22(A) is a cross-sectional view of the common connection portion, corresponding to I-J in the top view shown in FIG. 22(B). FIG. 22(A) is a cross-sectional view of the common connection portion, corresponding to I-J in the top view shown in FIG. 22(B).

[0300] The common potential line 975 is provided on the gate insulating film 922 and is formed of the same material and in the same process as the source electrode 971 or the drain electrode 973 of the transistor 910 shown in FIG. 22. The common potential line 975 is provided on the gate insulating film 922 and is formed of the same material and in the same process as the source electrode 971 or the drain electrode 973 of the transistor 910 shown in FIG. 22.

[0301] Further, the common potential line 975 is covered with an insulating film 924, and the insulating film 924 has a plurality of openings at positions overlapping the common potential line 975. These openings are formed in the same process as the contact hole that connects one of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930. Further, the common potential line 975 is covered with an insulating film 924, and the insulating film 924 has a plurality of openings at positions overlapping the common potential line 975. These openings are formed in the same process as the contact hole that connects one of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930. Further, the common potential line 975 is covered with an insulating film 924, and the insulating film 924 has a plurality of openings at positions overlapping the common potential line 975. These openings are formed in the same process as the contact hole that connects one of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930. Further, the common potential line 975 is covered with an insulating film 924, and the insulating film 924 has a plurality of openings at positions overlapping the common potential line 975. These openings are formed in the same process as the contact hole that connects one of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930.

[0302] Further, the common potential line 975 and the common electrode 977 are connected at the opening. The common electrode 977 is provided on the insulating film 924 and is made of the same material and in the same process as the connection terminal electrode 915 and the first electrode 930 of the pixel portion.

[0303] In this way, the common connection portion can be fabricated in common with the fabrication process of the switching element of the pixel portion 902.

[0304] The common electrode 977 is an electrode that contacts the conductive particles contained in the sealing material and is electrically connected to the second electrode 931 of the substrate 906.

[0305] Further, as shown in FIG. 22(C), the common potential line 985 may be formed of the same material and in the same process as the gate electrode of the transistor 910.

[0306] In the common connection portion shown in FIG. 22(C), the common potential line 985 is provided under the gate insulating film 922 and the insulating film 924, and the gate insulating film 922 and the insulating film 924 have a plurality of openings at positions overlapping the common potential line 985. The openings are formed by etching the insulating film 924 in the same process as the contact hole that connects one of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930, and then selectively etching the gate insulating film 922.

[0307] Further, the common potential line 985 and the common electrode 987 are connected at the opening. The common electrode 987 is provided on the insulating film 924 and is made of the same material and in the same process as the connection terminal electrode 915 and the first electrode 930 of the pixel portion.

[0308] ​​​​​​​​​​As described above, by using an oxide semiconductor film formed in the same formation process as the oxide semiconductor film included in the transistor as one of the electrodes of the holding capacitance, it is possible to manufacture a semiconductor device having a large holding capacitance while increasing the aperture ratio. For example, even in the semiconductor device according to the present embodiment, when the pixel density is 300 ppi or more, the aperture ratio of the pixel can be 50% or more, further 55% or more, and further 60% or

[0309] more. In addition, by increasing the aperture ratio, a semiconductor device with excellent display quality can be obtained. Moreover, since the oxide semiconductor film included in the transistor has

[0310] reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, the semiconductor device according to one aspect of the present invention is a

[0311] (Embodiment 4) A semiconductor device according to one aspect of the present invention can be applied to various electronic devices (including gaming machines). Examples of the electronic devices include a television device (also referred to as a TV or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, a

[0312] gaming machine (such as a pachinko machine or a slot machine), and a game A display unit 9003 is incorporated in the housing 9001, and the display unit 9003 can display images. It is shown that the housing 9001 is supported by four legs 9002. Also, the housing 9001 has a power cord 9005 for power supply.

[0313] The semiconductor device shown in any of the above embodiments can be used for the display unit 9003. Therefore, the display quality of the display unit 9003 can be improved.

[0314] The display unit 9003 has a touch input function. By touching the display button 9004 displayed on the display unit 9003 of the table 9000 with a finger or the like, screen operations and information input can be performed. Also, by enabling communication or control with other home appliances, it can be used as a control device for controlling other home appliances by screen operations. For example, if a semiconductor device having an image sensor function is used, the display unit 9003 can be provided with a touch input function. Also, by means of a hinge provided on the housing 9001, the screen of the display unit 9003 can be set vertically with respect to the floor and can also be used as a television device. In a narrow room, installing a large-screen television device will narrow the free space, but if the display unit is built into the table, the space of the room can be effectively utilized.

[0315]

[0316] Figure 23(B) shows a television device 9100. The television device 9100 has a display unit 9103 incorporated in the housing 9101, and the display unit 9103 displays images. It is possible to show. Here, the housing 9101 is supported by the stand 9105 and the configuration is shown.

[0317] The operation of the television apparatus 9100 can be performed by an operation switch provided in the housing 9101 or by a separate remote control operation unit 9110. With the operation keys 9109 provided in the remote control operation unit 9110, operations such as channel and volume can be performed, and the video displayed on the display unit 9103 can be operated. Further, the remote control operation unit 9110 may be configured to include a display unit 9107 for displaying information output from the remote control operation unit 9110.

[0318] The television apparatus 9100 shown in FIG. 23(B) includes a receiver, a modem, and the like. The television apparatus 9100 can receive general television broadcasts by a receiver, and can further be connected to a wired or wireless communication network via a modem, thereby enabling one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers) information communication.

[0319] The semiconductor device shown in any of the above embodiments can be used for the display units 9103 and 9107. Therefore, the display quality of the television apparatus can be improved.

[0320] FIG. 23(C) shows a computer 9200, which includes a main body 9201, a housing 9202, a display unit 9 203, a keyboard 9204, an external connection port 9205, a pointing device 920 6, and the like.

[0321] The semiconductor device shown in any of the above embodiments can be used for the display unit 9203. ​​​Yes. Therefore, the display quality of the computer 9200 can be improved.

[0322] The display unit 9003 has a touch input function, and by touching the display button displayed on the display unit 9003 of the table 9000 with a finger or the like, it is possible to perform screen operations and input information, and it is also possible to communicate with other home appliances or control them, and it may also be used as a control device for controlling other home appliances through screen operations. For example, if a semiconductor device having an image sensor function is used, the display unit 9003 can be provided with a touch input function. Also, by means of the hinge provided on the housing 9001, the screen of the display unit 9003 can be set perpendicular to the floor, and it can also be used as a television device. In a narrow room,

[0323] installing a large-screen television device will narrow the free space, but if the display unit is built into the table, the space of the room can be effectively utilized. Figures 24(A) and 24(B) show a two-foldable tablet terminal. Figure 24(A

[0324] ) shows the open state, and the tablet terminal includes a housing 9630, display units 9631a, display units 9631b, a display mode switch 9034, a power switch 9035, a power saving mode switch 9036, a fastener 9033, and an operation switch 9038.

[0325]

[0326] The semiconductor device shown in any of the above embodiments can be used for the display units 9631a and 9631b. Therefore, the display quality of the tablet terminal can be improved.

[0326] The display unit 9631a can have a part as the touch panel area 9632a, and data can be input by touching the displayed operation keys 9638. In the display unit 9631a, as an example, a configuration where half of the area has only a display function and the other half has a touch panel function is shown, but it is not limited to this configuration. It can also be a configuration where all areas of the display unit 9631a have a touch panel function. For example, the entire surface of the display unit 9631a can be made to display keyboard buttons to serve as a touch panel, and the display unit 9631b can be used as a display screen. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b. In the display unit 9631a, as an example, a configuration where half of the area has only a display function and the other half has a touch panel function is shown, but it is not limited to this configuration. It can also be a configuration where all areas of the display unit 9631a have a touch panel function. For example, the entire surface of the display unit 9631a can be made to display keyboard buttons to serve as a touch panel, and the display unit 9631b can be used as a display screen. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b. In the display unit 9631a, as an example, a configuration where half of the area has only a display function and the other half has a touch panel function is shown, but it is not limited to this configuration. It can also be a configuration where all areas of the display unit 9631a have a touch panel function. For example, the entire surface of the display unit 9631a can be made to display keyboard buttons to serve as a touch panel, and the display unit 9631b can be used as a display screen. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b.

[0327] Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b. Moreover, in the display unit 9631b as well, similar to the display unit 9631a, a part of the display unit 9631b can be made the touch panel area 9632b. Also, by touching the position where the keyboard display switching button 9639 of the touch panel is displayed with a finger or a stylus, etc., the keyboard buttons can be displayed on the display unit 9631b.

[0328] Moreover, touch input can also be performed simultaneously on the touch panel area 9632a and the touch panel area 9632b. Moreover, touch input can also be performed simultaneously on the touch panel area 9632a and the touch panel area 9632b.

[0329] Also, the display mode switching switch 9034 can select to switch the display orientation such as vertical display or horizontal display, or to switch between black - and - white display and color display. The power - saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet - type terminal during use. The tablet - type terminal can also incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor. Also, the display mode switching switch 9034 can select to switch the display orientation such as vertical display or horizontal display, or to switch between black - and - white display and color display. The power - saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet - type terminal during use. The tablet - type terminal can also incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor. Also, the display mode switching switch 9034 can select to switch the display orientation such as vertical display or horizontal display, or to switch between black - and - white display and color display. The power - saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet - type terminal during use. The tablet - type terminal can also incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor. Also, the display mode switching switch 9034 can select to switch the display orientation such as vertical display or horizontal display, or to switch between black - and - white display and color display. The power - saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet - type terminal during use. The tablet - type terminal can also incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor. Also, the display mode switching switch 9034 can select to switch the display orientation such as vertical display or horizontal display, or to switch between black - and - white display and color display. The power - saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet - type terminal during use. The tablet - type terminal can also incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor. Also, the display mode switching switch 9034 can select to switch the display orientation such as vertical display or horizontal display, or to switch between black - and - white display and color display. The power - saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet - type terminal during use. The tablet - type terminal can also incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor.

[0330] In addition, FIG. 24(A) shows an example where the display areas of display unit 9631b and display unit 9631a are the same, but it is not particularly limited, and the size of one may be different from that of the other, and the display quality may also be different. For example, one may be a display panel that can perform a higher-definition display than the other.

[0331] FIG. 24(B) shows a closed state, and the tablet terminal includes a housing 9630, a solar cell 9 633, and a charge / discharge control circuit 9634. Note that in FIG. 24(B), a configuration having a battery 9635 and a DCDC converter 9636 is shown as an example of the charge / discharge control circuit 96 34.

[0332] Since the tablet terminal can be folded in two, the housing 9630 can be closed when not in use. Therefore, the display units 9631a and 9631b can be protected, and a tablet terminal with excellent durability and reliability from the viewpoint of long-term use can be provided.

[0333] In addition, the tablet terminal shown in FIGS. 24(A) and 24(B) can also have functions such as displaying various information (still images, moving images, text images, etc.), a calendar, a date or a time, displaying on the display unit, a touch input function for touch input operation or editing of the information displayed on the display unit, a function of controlling processing by various software (programs), etc.

[0334] Power can be supplied to the touch panel, the display unit, or the video signal processing unit, etc. by the solar cell 9633 mounted on the surface of the tablet terminal. Note that the solar cell 9633 ​​​​​​It can be provided on one side or both sides of the housing 9630, and is suitable because it can be configured to efficiently charge the battery 9635. Note that as the battery 9635, using a lithium-ion battery has advantages such as enabling miniaturization.

[0335] Also, regarding the configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 24(B), a block diagram is shown and explained in FIG. 24( C). FIG. 24(C) shows a solar cell 9633, a battery 9 635, a DCDC converter 9636, a converter 9637, switches SW1 to SW3 , and a display unit 9631. The battery 9635, the DCDC converter 963 6, the converter 9637, and the switches SW1 to SW3 correspond to the locations in the charge / discharge control circuit 9634 shown in FIG. 24(B).

[0336] First, an example of the operation when power is generated by the solar cell 9633 due to external light will be described. The power generated by the solar cell is stepped up or down by the D CDC converter 9636 to become a voltage for charging the battery 9635. When the power from the solar cell 9633 is used for the operation of the display unit 9631, the switch SW1 is turned on, and the converter 9637 steps up or down the voltage required for the display unit 9631. Also, when the display on the display unit 9631 is not performed, SW1 can be turned off and SW2 can be turned on to charge the battery 9635.

[0337] Note that the solar cell 9633 was shown as an example of a power generation means, but it is not particularly limited, and other power generation means such as piezoelectric elements (piezo elements) and thermoelectric conversion elements (Peltier elements) can be used. It may be configured to charge the battery 9635. For example, it may be configured to charge by wireless (non-contact) power transmission and reception using a contactless power transmission module or in combination with other charging means. It may also be configured to perform the charging by combining other charging means. It may be configured in this way.

[0338] Note that the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. It can be used.

Claims

1. a first conductive layer and a second conductive layer; a first insulating layer having a region above the first conductive layer and a region above the second conductive layer; a first metal oxide layer having a region above the first insulating layer; a second metal oxide layer having a region above the first insulating layer; a third conductive layer having a region in contact with the first metal oxide layer; a fourth conductive layer having a region in contact with the first metal oxide layer; a fifth conductive layer having a region in contact with the second metal oxide layer; a second insulating layer having a region above the third conductive layer, a region above the fourth conductive layer, and a region above the fifth conductive layer; a sixth conductive layer having translucency; and the first conductive layer has a region that functions as a gate electrode of a transistor included in a pixel; the second conductive layer has a function of supplying a potential to the second metal oxide layer; the first insulating layer has a region that functions as a gate insulating layer of the transistor; the first metal oxide layer has a region that functions as a channel formation region of the transistor; the third conductive layer has a function of supplying a potential corresponding to a video signal to one of a source or a drain of the transistor; the fourth conductive layer has a function of electrically connecting the other of the source or the drain of the transistor and the sixth conductive layer; the fifth conductive layer has a function of electrically connecting the second conductive layer and the second metal oxide layer; the sixth conductive layer has a region that functions as a pixel electrode of a liquid crystal element; a region of the sixth conductive layer that overlaps the second metal oxide layer via the second insulating layer forms a capacitance; in a plan view of the pixel, the first conductive layer is arranged to extend in a first direction; in a plan view of the pixel, the second conductive layer is arranged to extend in the first direction; in a plan view of the pixel, the first conductive layer has a first region including a region protruding in a second direction intersecting the first direction, and a second region having a narrower width in the second direction than the first region; in a plan view of the pixel, the entire first metal oxide layer is arranged to overlap the first region; in a plan view of the pixel, a region where the fourth conductive layer and the sixth conductive layer are in contact is arranged in a region sandwiched between the second region and the second conductive layer, a liquid crystal display device.

2. In claim 1, A liquid crystal display device in which, in a plan view of the pixel, a region where the second metal oxide layer and the sixth conductive layer overlap has a width in the second direction that is larger than the width in the first direction.

3. In claim 1, in a plan view of the pixel, a region where the sixth conductive layer and the second metal oxide layer overlap has a width in the second direction that is larger than the width in the first direction, in a plan view of the pixel, a distance between the first conductive layer and the second conductive layer in the second direction is smaller than a width of a region where the sixth conductive layer and the second metal oxide layer overlap in the second direction, a liquid crystal display device.

4. In any one of claims 1 to 3, the fifth conductive layer is electrically connected to the second conductive layer through a contact hole provided in the first insulating layer, a liquid crystal display device.

5. In any one of claims 1 to 4, the first metal oxide layer and the second metal oxide layer contain indium, a liquid crystal display device.

Images