Chip component and method for manufacturing the same
The chip component design with a recessed substrate, insulating layer, and magnetic member improves magnetic coupling and inductance, addressing performance limitations in existing coil-based components.
Patent Information
- Application Number
- JP2023219978
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-26
- Publication Date
- 2025-07-08
AI Technical Summary
Existing chip components with coils in insulating layers face challenges in achieving high inductance and efficient magnetic coupling between coils, which limits their performance and miniaturization.
A chip component design featuring a substrate with a recessed structure, an insulating layer straddling the recess, coils embedded in annular portions of the insulating layer, and a magnetic member filled in the recess and openings, forming a closed magnetic path to enhance magnetic coupling and inductance.
The design improves magnetic coupling between coils, increases inductance, allows for miniaturization, and enhances signal transmission efficiency while maintaining a thinner profile.
Smart Images

Figure 2025102499000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a chip component and a method for manufacturing the chip component.
Background Art
[0002] A configuration in which a coil is included in an insulating layer is known. For example, Patent Document 1 discloses a chip component including a substrate, an insulating layer laminated structure including a plurality of insulating layers laminated in order from the substrate side, an upper coil and a lower coil formed in the insulating layer laminated structure.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
[0004] [Summary] In a chip component including a coil, it is desirable to be able to achieve a high inductance.
[0005] A chip component according to an aspect of the present disclosure includes a substrate including a first substrate surface, a second substrate surface opposite to the first substrate surface, and a recess recessed from the first substrate surface toward the second substrate surface, an insulating layer formed on the first substrate surface so as to straddle the recess, a coil provided in the insulating layer, a resin member, and a magnetic member including a magnetic material mixed in the resin member. The insulating layer is formed in an annular shape having an opening when viewed from the thickness direction, and includes an annular portion in which the coil is embedded. The opening is provided at a position overlapping the recess when viewed from the thickness direction. The magnetic member fills the recess and the opening and includes a portion surrounded by the coil.
Brief Description of the Drawings
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[0007] [Detailed Description] Hereinafter, embodiments of the chip component in the present disclosure will be described with reference to the accompanying drawings. Note that, for the sake of simplicity and clarity of the description, the components shown in the drawings are not necessarily drawn to a certain scale. Also, for ease of understanding, the hatching lines may be omitted. The accompanying drawings are merely illustrative of the embodiments of the present disclosure and should not be regarded as limiting the present disclosure. Terms such as "first", "second", "third", etc. in the present disclosure are merely used to distinguish objects and do not rank the objects.
[0008] The following detailed description includes apparatuses, systems, and methods that embody exemplary embodiments of the present disclosure. This detailed description is merely for explanatory purposes and is not intended to limit the embodiments of the present disclosure or the application and use of such embodiments.
[0009] As used herein, the expression "at least one" means "one or more" of the desired options. As an example, as used herein, the expression "at least one" means "only one option" or "both of the two options" if the number of options is two. As another example, as used herein, the expression "at least one" means "only one option" or "any combination of two or more options" if the number of options is three or more.
[0010] As used herein, the term "in plan view" refers to viewing the chip component 40 or the components of the chip component 40 in the Z-axis direction of the XYZ axes orthogonal to each other in FIG. 2. As used herein, "the length (dimension) of A is equal to the length (dimension) of B" or "the length (dimension) of A and the length (dimension) of B are equal to each other" includes a relationship in which the difference between the length (dimension) of A and the length (dimension) of B is within 10% of the length (dimension) of A, for example.
[0011] <Embodiment> Referring to FIG. 1, a signal transmission device 10 including a chip component 40 according to an embodiment shown in FIGS. 2 to 5 will be described. FIG. 1 schematically shows the circuit configuration of the signal transmission device 10. In the circuit configuration shown in FIG. 1, the chip component 40 of one embodiment is shown as a transformer 15 constituted by a first coil 16A and a second coil 16B included in the chip component 40.
[0012] [Circuit Configuration of Signal Transmission Device] As shown in FIG. 1, the signal transmission device 10 is a device that transmits a pulse signal while electrically insulating between the primary side terminal 11 and the secondary side terminal 12. The signal transmission device 10 is, for example, a digital isolator. The signal transmission device 10 includes a primary side circuit 13 electrically connected to the primary side terminal 11, a secondary side circuit 14 electrically connected to the secondary side terminal 12, and a transformer 15 that electrically insulates the primary side circuit 13 and the secondary side circuit 14.
[0013] The primary circuit 13 is configured to operate when a first voltage V1 is applied. The primary circuit 13 is electrically connected to, for example, an external control device (not shown). The primary circuit 13 includes a transmission circuit 13T. The secondary circuit 14 is configured to operate when a second voltage V2 different from the first voltage V1 is applied. The second voltage V2 is higher than the first voltage V1, for example. The first voltage V1 and the second voltage V2 are DC voltages. The secondary circuit 14 is electrically connected to, for example, a drive circuit that is a control target of the control device. An example of the drive circuit is a switching circuit. The secondary circuit 14 includes a reception circuit 14R. The grounds of the primary circuit 13 and the secondary circuit 14 are provided independently of each other.
[0014] The transformer 15 is connected between the transmission circuit 13T and the reception circuit 14R. The transformer 15 includes a first coil 16A on the primary side and a second coil 16B on the secondary side. The first coil 16A is electrically connected to the transmission circuit 13T, and the second coil 16B is electrically connected to the reception circuit 14R.
[0015] For example, a control signal from the control device is input to the transmission circuit 13T of the primary circuit 13 through the primary terminal 11. The control signal is received by the reception circuit 14R of the secondary circuit 14 from the transmission circuit 13T of the primary circuit 13 via the transformer 15. The signal transmitted to the secondary circuit 14 is output from the secondary circuit 14 to the drive circuit through the secondary terminal 12.
[0016] As described above, in the signal transmission device 10, the primary circuit 13 and the secondary circuit 14 are electrically insulated by the transformer 15. More specifically, while the transmission of a DC voltage between the primary circuit 13 and the secondary circuit 14 is regulated by the transformer 15, the transmission of a pulse signal is possible.
[0017] That is, the state where the primary circuit 13 and the secondary circuit 14 are insulated means that the transmission of DC voltage is blocked between the primary circuit 13 and the secondary circuit 14, and the transmission of a pulse signal from the primary circuit 13 to the secondary circuit 14 is allowed. Thus, the secondary circuit 14 is configured to receive signals from the primary circuit 13.
[0018] The withstand voltage of the signal transmission device 10 is, for example, 2500 Vrms or more and 7500 Vrms or less. The withstand voltage of the signal transmission device 10 of the first embodiment is about 5700 Vrms. However, the specific numerical value of the withstand voltage of the signal transmission device 10 is not limited to this and is arbitrary.
[0019] [Configuration of Chip Component] With reference to FIGS. 2 to 5, the structure of a chip component 40 according to an embodiment will be described. FIG. 2 shows a schematic perspective structure of a chip component 40 according to an embodiment. FIG. 3 shows a schematic perspective structure inside the chip component 40 shown in FIG. 2. FIG. 4 shows a schematic planar structure inside the chip component 40 shown in FIG. 2. FIG. 5 shows a schematic end face structure obtained by cutting the chip component 40 along the line F5-F5 in FIG. 4. In FIG. 3, a magnetic member 50 to be described later is shown by a two-dot chain line. Also, in FIG. 4, the magnetic member 50 is omitted to show the internal structure of the chip component 40.
[0020] As shown in FIG. 3, the chip component 40 of this embodiment is a transformer chip including a first coil 16A and a second coil 16B. The first coil 16A and the second coil 16B are electrically insulated from each other.
[0021] As shown in FIG. 2, the chip component 40 includes a chip main surface 41 and a chip back surface 42 facing the side opposite to the chip main surface 41. Further, the chip component 40 includes four chip side surfaces 43, 44, 45, 46 orthogonal to both the chip main surface 41 and the chip back surface 42. The chip side surfaces 43, 44 constitute both end faces of the chip component 40 in the X-axis direction. The chip side surfaces 45, 46 constitute both end faces of the chip component 40 in the Y-axis direction.
[0022] The chip component 40 includes a substrate 20. As shown in FIG. 5, the substrate 20 is formed in a rectangular flat plate shape with the Z-axis direction as the thickness direction. The substrate 20 has a first substrate surface 21 and a second substrate surface 22 facing opposite sides in the Z-axis direction. The second substrate surface 22 constitutes the chip back surface 42. The substrate 20 includes a recess 23 that is recessed from the first substrate surface 21 toward the second substrate surface 22. The recess 23 is formed substantially at the center in the X-axis direction and the Y-axis direction on the first substrate surface 21. In one example, the recess 23 is formed in a rectangular shape in plan view. In the example shown in the figure, the recess 23 is formed in a cuboid shape. Note that the shape of the recess 23 is not limited to this. In one example, the inner surface of the recess 23 may be formed as a surface where the bottom surface 23A and the side surface 23B are curved. Further, the recess 23 may be formed in a shape in which the distance between the side surfaces 23B in the X-axis direction and the Y-axis direction gradually increases from the bottom surface 23A toward the first substrate surface 21.
[0023] The substrate 20 is constituted by, for example, a semiconductor substrate. The substrate 20 is constituted by a material containing Si (silicon) in this embodiment. In one example, an Si substrate is used for the substrate 20. Examples of the Si substrate include a semiconductor substrate constituted by a single-crystalline intrinsic semiconductor material, a p-type semiconductor substrate containing acceptor-type impurities, an n-type semiconductor substrate containing donor-type impurities, and the like. Note that a wide-bandgap semiconductor or a compound semiconductor may be used as the semiconductor substrate for the substrate 20. Further, instead of the semiconductor substrate, an insulating substrate formed of a material containing glass may be used for the substrate 20.
[0024] The chip component 40 includes an insulating layer 30 formed so as to straddle the recess 23 on the first substrate surface 21. The insulating layer 30 includes a first insulating layer 30A and a second insulating layer 30B formed so as to cover the first insulating layer 30A. In one example, the thickness T11 of the first insulating layer 30A is equal to the thickness T12 of the second insulating layer 30B. The thickness T11 of the first insulating layer 30A may be smaller than the thickness T12 of the second insulating layer 30B, or may be larger than the thickness T12.
[0025] The insulating layer 30 is provided with a first coil 16A and a second coil 16B. In this embodiment, the insulating layer 30 includes a first annular portion 32A having a first opening 31A and a second annular portion 32B having a second opening 31B. The first annular portion 32A and the second annular portion 32B are formed adjacent to each other in the X-axis direction. The first opening 31A and the second opening 31B open in the thickness direction (Z-axis direction) of the substrate 20. In the example shown in FIG. 3, the first annular portion 32A is formed closer to the chip side surface 43 than the second annular portion 32B. In one example, the insulating layer 30 is formed of an organic insulating material.
[0026] The first coil 16A is embedded in the first annular portion 32A. The second coil 16B is embedded in the second annular portion 32B. The first opening 31A and the second opening 31B are provided at positions overlapping the recess 23 in plan view. The first coil 16A and the second coil 16B are provided in the insulating layer 30 so as to be exposed from the upper surface 30D of the insulating layer 30. The insulating layer 30 includes a first insulating layer 30A and a second insulating layer 30B that covers the first insulating layer 30A. In one example, the first coil 16A and the second coil 16B are provided on the first insulating layer 30A. It can be said that the first coil 16A and the second coil 16B are formed in the second insulating layer 30B. It can be said that the first coil 16A and the second coil 16B are formed so as to penetrate the second insulating layer 30B. Also, it can be said that the first coil 16A and the second coil 16B are embedded in the second insulating layer 30B.
[0027] As shown in FIG. 4, the first annular portion 32A includes first to fourth portions 33A to 33D. Each of the first portion 33A and the second portion 33B extends in the Y-axis direction. The first portion 33A is disposed closer to the chip side surface 43 in the first annular portion 32A. The second portion 33B is disposed spaced apart closer to the second annular portion 32B than the first portion 33A.
[0028] Each of the third part 33C and the fourth part 33D extends in the X-axis direction. The third part 33C and the fourth part 33D form the first opening 31A by connecting the first part 33A and the second part 33B. The third part 33C is arranged near the chip side surface 45. The fourth part 33D is arranged at a distance near the chip side surface 46 with respect to the third part 33C.
[0029] The first coil 16A is provided over the first to fourth parts 33A to 33D of the first annular part 32A. Therefore, the first inner region 18A, which is the region located inside the first coil 16A in plan view, includes the first opening 31A formed by the first annular part 32A.
[0030] The second coil 16B is embedded in the first annular part 32A. The second coil 16B is embedded in the second annular part 32B. The first opening 31A and the second opening 31B are provided at positions overlapping the concave part 23 in plan view.
[0031] As shown in FIG. 4, the second annular part 32B includes fifth to eighth parts 33E to 33H. Each of the fifth part 33E and the sixth part 33F extends in the Y-axis direction. The fifth part 33E is arranged near the chip side surface 44 in the second annular part 32B. The sixth part 33F is arranged at a distance near the first annular part 32A with respect to the fifth part 33E.
[0032] Each of the seventh part 33G and the eighth part 33H extends in the X-axis direction. The seventh part 33G and the eighth part 33H form the second opening 31B by connecting the fifth part 33E and the sixth part 33F. The seventh part 33G is arranged near the chip side surface 45. The eighth part 33H is arranged at a distance near the chip side surface 46 with respect to the seventh part 33G. In one example, the second part 33B and the sixth part 33F are integrated.
[0033] The second coil 16B is provided over the fifth to eighth portions 33E to 33H of the second annular portion 32B. Therefore, a second inner region 18B, which is a region located inside the second coil 16B in a plan view, includes a second opening 31B formed by the second annular portion 32B.
[0034] The chip component 40 includes a magnetic member 50 provided on the first substrate surface 21 of the substrate 20. In one example, the magnetic member 50 is formed so as to cover the entire first substrate surface 21. The magnetic member 50 includes a resin member and a magnetic material mixed in the resin member. The resin member of the magnetic member 50 is made of a material having electrical insulation properties. In one example, epoxy resin is used as the material of the resin member. As the material of the magnetic material, for example, magnetic powder containing at least one of Fe (iron) and Ni (nickel) is used.
[0035] The magnetic member 50 includes a concave portion 23 and a portion filled in the first opening 31A and the second opening 31B and surrounded by the first coil 16A and the second coil 16B. The magnetic member 50 covers at least a part of the first annular portion 32A and the second annular portion 32B of the insulating layer 30. The portion covered by the magnetic member 50 may include a portion of the insulating layer 30 that overlaps the concave portion 23 in a plan view. The portion covered by the magnetic member 50 may include the second portion 33B of the first annular portion 32A. The portion covered by the magnetic member 50 may include the sixth portion 33F of the second annular portion 32B. In this embodiment, the magnetic member 50 seals the entire first coil 16A and the second coil 16B. The magnetic member 50 seals the entire insulating layer 30.
[0036] More specifically, as shown in FIG. 5, the magnetic member 50 is filled in the recess 23, the first opening 31A, and the second opening 31B, and includes a central cover portion 52 that covers the first opening 31A, the second opening 31B, and the portion therebetween of both the first coil 16A and the second coil 16B and the insulating layer 30 from above. The second portion 33B of the first annular portion 32A and the sixth portion 33F of the second annular portion 32B extend in the Y-axis direction. When viewed from the Y-axis direction, the central cover portion 52 covers the second portion 33B of the first annular portion 32A and the sixth portion 33F of the second annular portion 32B. That is, the central cover portion 52 is formed in an annular shape surrounding the second portion 33B and the sixth portion 33F. And the central cover portion 52 passes through the first inner region 18A of the first coil 16A and the second inner region 18B of the second coil 16B. Therefore, the central cover portion 52 constitutes a closed magnetic path between the first coil 16A and the second coil 16B. For this reason, the first coil 16A and the second coil 16B are magnetically coupled by the magnetic flux passing through the closed magnetic path formed by the magnetic member 50. It can be said that the first coil 16A and the second coil 16B are magnetically coupled by the closed magnetic path formed by the magnetic member 50.
[0037] Also, as shown in FIG. 3, the magnetic member 50 includes an outer peripheral cover portion 51 that surrounds the insulating layer 30 in a plan view. The outer peripheral cover portion 51 is formed so as to surround the central cover portion 52. That is, the outer peripheral cover portion 51 covers the portion outside the first opening 31A and the second opening 31B of both the first coil 16A and the second coil 16B and the insulating layer 30. In other words, the outer peripheral cover portion 51 covers the first portion 33A, the third portion 33C, and the fourth portion 33D of the first annular portion 32A. Also, the outer peripheral cover portion 51 covers the fifth portion 33E, the seventh portion 33G, and the eighth portion 33H of the second annular portion 32B. In one example, the outer peripheral cover portion 51 and the central cover portion 52 are integrated. The magnetic member 50 is formed so as to cover the entire first substrate surface 21. For this reason, the upper surface of the magnetic member 50 constitutes the chip main surface 41.
[0038] As shown in FIG. 5, the thickness T1 of the portion of the magnetic member 50 filled in the recess 23 is greater than the thickness T2 of the portion of the magnetic member 50 covering the insulating layer 30. Here, the thickness T1 of the portion of the magnetic member 50 filled in the recess 23 can be defined by the distance in the Z-axis direction between the bottom surface 23A of the recess 23 and the lower surface 30C of the insulating layer 30. Also, the thickness T2 of the portion of the magnetic member 50 covering the insulating layer 30 can be defined by the distance in the Z-axis direction between the upper surface 30D of the insulating layer 30 and the chip main surface 41 which is the upper surface of the magnetic member 50.
[0039] As shown in FIG. 3, the chip component 40 includes two first external electrodes 61A provided on both sides of the first coil 16A in the Y-axis direction, and two first wiring portions 70A provided on both sides of the first coil 16A in the Y-axis direction. Both ends 17A of the first coil 16A and the two first external electrodes 61A are individually electrically connected via the two first wiring portions 70A. The first wiring portion 70A is made of a material containing at least one of, for example, Ti (titanium), Au (gold), Cu, and Al (aluminum).
[0040] The two first wiring portions 70A have two vias 72 individually connected to both ends 17A of the first coil 16A, and two first connection electrodes 71A individually connected to the two vias 72. The first connection electrode 71A is formed on the first substrate surface 21 of the substrate 20 so as to be adjacent to the recess 23 in the X-axis and Y-axis directions. The first connection electrodes 71A are arranged side by side in the Y-axis direction closer to the chip side surface 43 with respect to the recess 23. A part of the first connection electrode 71A is covered by the insulating layer 30. In one example, the first connection electrode 71A is formed in a rectangular shape. The first connection electrode 71A has an overhanging portion 73 exposed from the insulating layer 30 in the Z-axis direction. The overhanging portion 73 protrudes from the insulating layer 30 toward the chip side surface 43 in a plan view.
[0041] The two vias 72 extend in the Z-axis direction so as to individually connect both ends 17A of the first coil 16A and the first connection electrode 71A. The chip component 40 is formed with two second external electrodes 61B provided on both sides of the second coil 16B in the X-axis direction and two second wiring portions 70B provided on both sides of the second coil 16B in the Y-axis direction. Both ends 17B of the second coil 16B and the two second external electrodes 61B are individually electrically connected via the second wiring portions 70B. The second wiring portion 70B is composed of a material containing at least one of, for example, Ti, Au, Cu, and Al.
[0042] The second wiring portion 70B includes a via 72 and a second connection electrode 71B. The structure of the second wiring portion 70B is the same as that of the first wiring portion 70A. Therefore, the detailed description of the structure of the second wiring portion 70B will be omitted.
[0043] The first external electrode 61A and the second external electrode 61B penetrate the magnetic member 50 in the Z-axis direction. The first external electrode 61A and the second external electrode 61B are, in one example, metal pillars extending in the Z-axis direction. Each of the first external electrode 61A and the second external electrode 61B has at least a part exposed from a portion corresponding to the outer peripheral cover portion 51 of the magnetic member 50 on the chip main surface 41. In one example, each of the first external electrode 61A and the second external electrode 61B includes a pillar portion 62 and a plating layer 63. In one example, the pillar portion 62 is formed such that the end on the chip main surface 41 side of the end in the Z-axis direction is flush with the chip main surface 41. The plating layer 63 is entirely exposed in the Z-axis direction from the upper surface of the outer peripheral cover portion 51. In one example, the pillar portion 62 contains Cu. The plating layer 63 is formed, for example, by plating. The plating layer 63 contains at least one of, for example, Au, Sn (tin), Ni, and Pd (palladium).
[0044] [Manufacturing Method of Chip Component] With reference to FIGS. 6 to 15, an example of the manufacturing method of the chip component 40 will be described. As shown in FIGS. 6 and 7, a substrate 20 is prepared. The substrate 20 includes a first substrate surface 21 and a second substrate surface 22 on the side opposite to the first substrate surface 21. A recess 23 is formed in the substrate 20 so as to be recessed from the first substrate surface 21 toward the second substrate surface 22. The recess 23 is formed, for example, by etching. In one example, the recess 23 is formed by dry etching. Note that the recess 23 may be formed by wet etching. The inner surface of the recess 23 has a shape corresponding to the etching. The inner surface of the recess 23 may be formed as a surface that is curved between a bottom surface 23A and a side surface 23B. Further, the recess 23 may be formed in a shape in which the distance between the side surfaces 23B in the X-axis direction and the Y-axis direction gradually increases from the bottom surface 23A toward the first substrate surface 21. Forming the recess 23 in the first substrate surface 21 of the substrate 20 may be included in "preparing the substrate".
[0045] As shown in FIG. 8, two first connection electrodes 71A and two second connection electrodes 71B are formed. The two first connection electrodes 71A and the two second connection electrodes 71B are provided around the recess 23 in a plan view. The two first connection electrodes 71A are spaced apart from each other in the X-axis direction. The two first connection electrodes 71A are spaced apart from each other in the Y-axis direction. The two second connection electrodes 71B are spaced apart from each other in the Y-axis direction. Note that the recess 23 may be formed after the first connection electrodes 71A and the second connection electrodes 71B are arranged.
[0046] As shown in FIGS. 9 to 12, an insulating layer 30 is formed on the first substrate surface 21. As shown in FIG. 5, the insulating layer 30 includes a first insulating layer 30A on the first substrate surface 21 and a second insulating layer 30B on the first insulating layer 30A.
[0047] As shown in FIGS. 9 and 10, a first insulating layer 30A is formed on the first substrate surface 21 so as to straddle the recess 23. The first insulating layer 30A is formed so as to cover a part of each of the first connection electrode 71A and the second connection electrode 71B. In the first insulating layer 30A, a first annular portion 32A and a second annular portion 32B are formed. The first annular portion 32A is formed in an annular shape having a first opening 31A in plan view. The second annular portion 32B is formed in an annular shape having a second opening 31B in plan view. The second annular portion 32B is formed so as to be aligned with the first annular portion 32A in the X-axis direction. The first insulating layer 30A is formed so that both the first opening 31A and the second opening 31B overlap the recess 23 in plan view.
[0048] The first insulating layer 30A is formed by photolithography using a dry film resist. The dry film resist may be composed of a photosensitive organic insulating material. In one example, the dry film resist may be referred to as a dry film permanent resist. Specifically, first, the dry film resist is attached onto the first substrate surface 21 of the substrate 20 so as to cover the entire recess 23. Next, by exposing and developing the dry film resist, the first opening 31A and the second opening 31B of the first insulating layer 30A are formed. Also, by photolithography, via holes for forming vias 72 are formed in the first insulating layer 30A.
[0049] Subsequently, vias 72 are formed in the first insulating layer 30A to connect to each of the two first connection electrodes 71A and the two second connection electrodes 71B. The vias 72 are formed so as to penetrate the first insulating layer 30A in the Z-axis direction. In one example, the vias 72 are formed by embedding Cu in the via holes formed in the first insulating layer 30A.
[0050] As shown in FIGS. 11 and 12, a second insulating layer 30B is laminated on the first insulating layer 30A. In one example, the second insulating layer 30B is formed in the same shape as the first insulating layer 30A in a plan view. The second insulating layer 30B is formed by photolithography using a dry film resist. More specifically, first, the dry film resist is attached onto the first insulating layer 30A. Next, by exposing and developing the dry film resist, a first opening 31A and a second opening 31B of the second insulating layer 30B are formed.
[0051] The first opening 31A of the second insulating layer 30B is formed in the same shape as the first opening 31A of the first insulating layer 30A. The second opening 31B of the second insulating layer 30B is formed in the same shape as the second opening 31B of the first insulating layer 30A. Forming the first insulating layer 30A and the second insulating layer 30B including the first opening 31A and the second opening 31B may be included in "forming an insulating layer so as to straddle a recess".
[0052] Also, by photolithography using a dry film resist, a first groove 161A and a second groove 161B for forming the first coil 16A and the second coil 16B are formed in the second insulating layer 30B. The first groove 161A and the second groove 161B may be formed simultaneously with the first opening 31A and the second opening 31B of the second insulating layer 30B. The first groove 161A and the second groove 161B may be formed at different timings from the first opening 31A and the second opening 31B of the second insulating layer 30B.
[0053] More specifically, a first groove 161A corresponding to the first coil 16A is formed in the first annular portion 32A of the second insulating layer 30B. A second groove 161B corresponding to the second coil 16B is formed in the second annular portion 32B. Both the first groove 161A and the second groove 161B are formed so as to penetrate the second insulating layer 30B in the Z-axis direction. In this case, two of the four vias 72 are exposed from the first groove 161A, and the remaining two vias 72 are exposed from the second groove 161B.
[0054] As shown in FIGS. 13 and 14, each of the first groove 161A and the second groove 161B is filled with a conductive member 800. The conductive member 800 may be formed by a plating method. Thereby, the first coil 16A and the second coil 16B are formed so as to be embedded in the insulating layer 30. The first coil 16A is embedded in the first annular portion 32A, and the second coil 16B is embedded in the second annular portion 32B. In one example, the conductive member 800 is composed of a material containing Cu. Note that the conductive member 800 may be formed of other conductive materials such as Al (aluminum). Forming the first groove 161A in the first annular portion 32A, forming the second groove 161B in the second annular portion 32B, and forming the conductive member 800 in the first groove 161A and the second groove 161B may be included in "forming the coils (the first coil and the second coil)".
[0055] As shown in FIG. 15, two first external electrodes 61A and two second external electrodes 61B are provided at a distance from the insulating layer 30 in the X-axis direction. The first external electrode 61A is provided on the first connection electrode 71A. The second external electrode 61B is provided on the second connection electrode 71B. A barrier layer may be provided between the first connection electrode 71A and the first external electrode 61A. In one example, the barrier layer is provided over the entire region where the first external electrode 61A is formed in plan view. In one example, the barrier layer has the same shape as the first external electrode 61A in plan view. In one example, the barrier layer is formed of a metal such as Ni or Au. Similarly, a barrier layer is formed in the second connection electrode 71B, and the second external electrode 61B is formed on the barrier layer.
[0056] As shown in FIG. 16, a magnetic member 50 is formed so as to cover at least a part of the first annular portion 32A and the second annular portion 32B of the insulating layer 30. The magnetic member 50 includes a resin member and a magnetic material mixed with the resin member. The magnetic member 50 is filled in the recess 23 of the substrate 20. Further, the magnetic member 50 is filled in the first opening 31A and the second opening 31B of the insulating layer 30. Therefore, it can be said that the magnetic member 50 is surrounded by the first coil 16A and the second coil 16B. The first coil 16A and the second coil 16B are magnetically coupled by a closed magnetic path formed by the magnetic member 50. In this embodiment, the magnetic member 50 is formed so as to cover the entire first substrate surface 21. Therefore, it can be said that the insulating layer 30, the first external electrodes 61A and 61B, and the first connection electrodes 71A and 71B are sealed by the magnetic member 50. Both the first external electrode 61A and the second external electrode 61B are exposed from the magnetic member 50 in the Z-axis direction.
[0057] Next, a plating layer 63 is formed on the first external electrode 61A and the second external electrode 61B. In one example, the plating layer 63 is formed so as to be entirely exposed from the outer peripheral cover portion 51 in the Z-axis direction. In one example, the plating layer 63 is formed by electroplating. Note that the method of forming the plating layer 63 can be arbitrarily changed. Through the above steps, the chip component 40 is manufactured.
[0058] [Operation of the Embodiment] The operation of the chip component 40 of this embodiment will be described. In the chip component 40, when current is supplied to one of the annular first coil 16A and second coil 16B provided in the insulating layer 30, magnetic flux is generated so as to pass through both the first inner region 18A of the first coil 16A and the second inner region 18B of the second coil 16B. More specifically, the magnetic flux forms a path passing through the first inner region 18A, above the first coil 16A and the second coil 16B, the second inner region 18B, and below the first coil 16A and the second coil 16B.
[0059] The chip component 40 includes a magnetic member 50 that constitutes a path of magnetic flux. More specifically, the magnetic member 50 is filled in the first annular portion 32A of the insulating layer 30 that constitutes the first inner region 18A, the second annular portion 32B of the insulating layer 30 that constitutes the second inner region 18B, above the insulating layer 30, and below the insulating layer 30 in the recess 23 of the substrate 20. In this way, the magnetic flux generated from the first coil 16A or the second coil 16B passes through the magnetic member 50 to form the above path, so that the degree of magnetic coupling between the first coil 16A and the second coil 16B is increased. In other words, the coupling coefficient between the first coil 16A and the second coil 16B becomes larger. Therefore, an increase in the mutual inductance of the first coil 16A and the second coil 16B can be achieved as compared with a configuration in which a non-magnetic member is used instead of the magnetic member 50.
[0060] [Advantages of the Embodiment] According to the chip component 40 of this embodiment, the following advantages can be obtained. (1) The chip component 40 has a substrate 20 including a first substrate surface 21, a second substrate surface 22 opposite to the first substrate surface 21, and a recess 23 recessed from the first substrate surface 21 toward the second substrate surface 22. The chip component 40 includes an insulating layer 30 formed to straddle the recess 23 on the first substrate surface 21, a first coil 16A and a second coil 16B provided in the insulating layer 30, a resin member, and a magnetic member 50 including a magnetic material mixed with the resin member. The insulating layer 30 is formed in an annular shape having a first opening 31A when viewed from the thickness direction (Z-axis direction) of the substrate 20, and includes a first annular portion 32A in which the first coil 16A is embedded, and is formed in an annular shape having a second opening 31B when viewed from the thickness direction (Z-axis direction) of the substrate 20, and includes a second annular portion 32B in which the second coil 16B is embedded. The first opening 31A and the second opening 31B are provided at positions overlapping the recess 23 when viewed from the thickness direction (Z-axis direction). The magnetic member 50 is filled in the recess 23, the first opening 31A, and the second opening 31B, covers at least a part of both the first annular portion 32A and the second annular portion 32B, and is surrounded by the first coil 16A and the second coil 16B. The magnetic member 50 covers at least a part of both the first annular portion 32A and the second annular portion 32B. The first coil 16A and the second coil 16B are magnetically coupled by a closed magnetic path formed by the magnetic member 50.
[0061] According to this configuration, the first coil 16A and the second coil 16B are magnetically coupled by a closed magnetic path formed by the magnetic member 50. Therefore, compared with a configuration in which the first coil 16A and the second coil 16B are covered with a non-magnetic member, the magnetic coupling between the first coil 16A and the second coil 16B is improved. Thereby, the inductance in the first coil 16A and the second coil 16B can be increased. Also, the first coil 16A and the second coil 16B can be miniaturized.
[0062] (2) The thickness T1 of the portion of the magnetic member 50 filled in the recess 23 is thicker than the thickness T2 of the portion of the magnetic member 50 covering the insulating layer 30. According to this configuration, it becomes easier to fill the recess 23 with the magnetic member 50. That is, the magnetic member 50 can be filled in the recess 23 without any gaps. Further, by reducing the thickness T2 of the portion of the magnetic member 50 that covers the insulating layer 30, the chip component 40 can be made thinner.
[0063] (3) The first coil 16A and the second coil 16B are magnetically coupled by a closed magnetic circuit formed by the magnetic member 50. Therefore, a signal can be efficiently transmitted from the first coil 16A to the second coil 16B.
[0064] <Modified Example> The above embodiment can be implemented with the following modifications. Also, the following modified examples can be implemented in combination with each other within a technically non - conflicting range.
[0065] · The chip component 40 is not limited to a trans - chip, and may be any chip component including a coil. In one example, as shown in FIGS. 17 and 18, the chip component 40 may be a chip inductor including one coil 16. The chip component 40 has a substrate 20 including a first substrate surface 21, a second substrate surface 22 opposite to the first substrate surface 21, and a recess 23 recessed from the first substrate surface 21 toward the second substrate surface 22. The chip component 40 includes an insulating layer 30 formed so as to straddle the recess 23 on the first substrate surface 21, a coil 16 provided in the insulating layer 30, a resin member, and a magnetic member 50 including a magnetic material mixed in the resin member.
[0066] In the example shown in FIG. 17, the dimension of the insulating layer 30 in the Y direction is larger than the dimension of the recess 23 in the Y direction. The insulating layer 30 is arranged so as to straddle the recess 23 on both sides in the Y direction. The portion of the insulating layer 30 straddling the recess 23 is arranged so as to overlap the recess 23 when viewed from the thickness direction (Z-axis direction) of the substrate 20. Both end portions of the insulating layer 30 in the Y direction are arranged at positions different from the recess 23 in the Y direction when viewed from the thickness direction (Z-axis direction) of the substrate 20. The dimension of the insulating layer 30 in the X direction is smaller than the dimension of the insulating layer 30 in the Y direction. The dimension of the insulating layer 30 in the X direction is smaller than the dimension of the recess 23 in the X direction. For this reason, when viewed from the thickness direction (Z-axis direction) of the substrate 20, the recess 23 includes portions protruding from both sides in the X direction of the insulating layer 30.
[0067] The insulating layer 30 includes an annular portion 32 formed in an annular shape having an opening 31 when viewed from the thickness direction (Z-axis direction) of the substrate 20. The coil 16 is embedded in the annular portion 32. The opening 31 is provided at a position overlapping the recess 23 when viewed from the thickness direction (Z-axis direction). In the example shown in FIG. 17, the dimension of the opening 31 in the Y direction is equal to the dimension of the recess 23 in the Y direction.
[0068] The annular portion 32 includes a first portion 33P, a second portion 33Q, a third portion 33R, and a fourth portion 33S. Each of the first portion 33P and the second portion 33Q extends in the second direction (Y-axis direction). Each of the first portion 33P and the second portion 33Q extends so as to straddle the recess 23. The first portion 33P and the second portion 33Q are arranged apart from each other in the first direction (X-axis direction). Each of the third portion 33R and the fourth portion 33S extends in the first direction (X-axis direction). The third portion 33R and the fourth portion 33S are arranged apart from each other in the second direction (Y-axis direction). The opening 31 is formed by connecting the third portion 33R and the fourth portion 33S to the first portion 33P and the second portion 33Q. The third portion 33R and the fourth portion 33S are arranged at positions adjacent to the recess 23 in the Y direction when viewed from the thickness direction (Z-axis direction) of the substrate 20.
[0069] The coil 16 is provided so as to surround the opening 31 of the annular portion 32 when viewed from the thickness direction (Z-axis direction) of the substrate 20. The coil 16 is provided over the first to fourth portions 33P to 33R. That is, the coil 16 is arranged so as to straddle both sides in the Y direction of the recess 23.
[0070] As shown in FIG. 18, the magnetic member 50 is filled in the recess 23 and the opening 31 and includes the portion surrounded by the coil 16. The magnetic member 50 is filled in the portion of the recess 23 that protrudes in the X direction from the insulating layer 30. The magnetic member 50 covers the lower surfaces of the first portion 33P and the second portion 33Q of the annular portion 32 of the insulating layer 30. The magnetic member 50 covers the insulating layer 30 and the coil 16.
[0071] As shown in FIG. 17, the chip component 40 includes two external electrodes 61 electrically connected to both ends 17 of one coil 16. The configurations of the coil 16, the wiring portion 70, and the external electrodes 61 of the chip component 40 may be the same as those of the first coil 16A (second coil 16B), the first wiring portion 70A (second wiring portion 70B), and the first external electrode 61A (second external electrode 61B) of the chip component 40 in the embodiment. However, in the example shown in FIG. 17, along with the change in the positional relationship between the two external electrodes 61 and the coil 16, as shown in FIG. 18, both ends 17 of the coil 16 and the wiring portion 70 are arranged at positions overlapping the two external electrodes 61 when viewed from the Y direction. Note that the relationship between the dimension in the Y direction of the opening 31 and the dimension in the Y direction of the recess 23 can be arbitrarily changed. In one example, the dimension in the Y direction of the opening 31 may be smaller than the dimension in the Y direction of the recess 23. In one example, the dimension in the Y direction of the opening 31 may be larger than the dimension in the Y direction of the recess 23.
[0072] According to the chip component 40 shown in FIGS. 17 and 18, the magnetic member 50 is filled in the recess 23 and the opening 31 and includes the portion surrounded by the coil 16. Thereby, the inductance in the coil 16 increases as compared with a configuration in which a non-magnetic member is filled in the opening 31 of the coil 16.
[0073] · An insulating member may be interposed between the magnetic member 50 and the first external electrode 61A and the second external electrode 61B. In one example, the insulating member may be configured to cover the side surface of the external electrode 61.
[0074] · An insulating member may be interposed between the magnetic member 50 and the first connection electrode 71A and the second connection electrode 71B. In one example, the insulating member may be configured to cover the side surface of the first connection electrode 71A and a portion of the upper surface of the protruding portion 73 that is different from the first external electrode 61A. In one example, the insulating member may be configured to cover the side surface of the second connection electrode 71B and a portion of the upper surface of the protruding portion 73 that is different from the second external electrode 61B.
[0075] · The range sealed by the magnetic member 50 can be arbitrarily changed. The magnetic member 50 may be formed to cover the second portion 33B and the sixth portion 33F of the insulating layer 30. In one example, as shown in FIGS. 19 and 20, the magnetic member 50 may be formed to cover the second portion 33B, the third portion 33C, the fourth portion 33D, the sixth portion 33F, the seventh portion 33G, and the eighth portion 33H (see FIG. 4). In this case, the magnetic member 50 may be formed to have the same size as the recess 23 in the X-axis direction and the same size as the substrate 20 in the Y-axis direction. The portion of the insulating layer 30 that is exposed from the magnetic member 50 may be covered by a sealing member 53 different from the magnetic member 50. In one example, the sealing member 53 seals the entire portion of the first substrate surface 21 that is exposed from the magnetic member 50. The sealing member 53 is made of a material having electrical insulation properties. In one example, an epoxy resin is used as the material of the sealing member.
[0076] · As shown in FIG. 21, the chip component 40 may include a first coil 16A and a second coil 16B as two coils connected in series. The first coil 16A is embedded in the first annular portion 32A of the insulating layer 30. The second coil 16B is embedded in the second annular portion 32B of the insulating layer 30. In the example shown in FIG. 21, the winding direction of the first coil 16A and the winding direction of the second coil 16B are opposite to each other. Although not shown, the magnetic member 50 is filled in the recess 23, the first opening 31A, and the second opening 31B, and covers both the first annular portion 32A and the second annular portion 32B in the same manner as in the above-described embodiment shown in FIG. 5. The portion covered by the magnetic member 50 may include a portion of the insulating layer 30 that overlaps the recess 23 in a plan view. The portion covered by the magnetic member 50 may include the second portion 33B of the first annular portion 32A. The portion covered by the magnetic member 50 may include the sixth portion 33F of the second annular portion 32B. In the modified example shown in FIG. 21, the magnetic member 50 may seal the entire first coil 16A and the second coil 16B. The magnetic member 50 may seal the entire insulating layer 30.
[0077] · Another insulating layer may be formed so as to cover the first coil 16A and the second coil 16B exposed from the insulating layer 30. By this insulating layer, the first coil 16A and the second coil 16B are separated from the magnetic member 50.
[0078] · The insulating layer 30 may have a configuration in which a first insulating portion including the first annular portion 32A and a second insulating portion including the second annular portion 32B are provided separately. In this case, the first insulating portion and the second insulating portion may be arranged separately from each other in the X direction. The magnetic member 50 may be interposed between the first insulating portion and the second insulating portion in the X direction.
[0079] · As shown in FIG. 22, the chip component 40 may include a device region 80. The device region 80 may include at least one device. The device may include at least one of a resistor, a transistor, a capacitor, and a diode. In one example, devices such as resistors, transistors, capacitors, and diodes may be provided on the substrate 20 or mounted on the substrate 20. The devices included in the device region 80 may or may not be electrically connected to the transformer 15. In one example, the device region 80 may include all or some of the elements of the primary circuit 13 shown in FIG. 1. Also, the device region 80 may include all or some of the elements of the secondary circuit 14 shown in FIG. 1.
[0080] · The chip component 40 may be used as a common mode filter. · As shown in FIG. 23, the substrate 20 may include an insulating film 24. The insulating film 24 may be formed on the first substrate surface 21. Also, the insulating film 24 may be formed on the bottom surface 23A and the side surface 23B of the recess 23. The insulating film 24 may be composed of a material containing Si. In one example, the insulating film 24 is a SiO2 (silicon oxide) film. The insulating film 24 may be formed on the second substrate surface 22 and the side surface of the substrate 20.
[0081] · The relationship between the Y-direction dimensions of the first opening 31A of the first coil 16A and the second opening 31B of the second coil 16B and the Y-direction dimension of the recess 23 of the substrate 20 can be arbitrarily changed. In one example, the Y-direction dimensions of the first opening 31A and the second opening 31B may be smaller than the Y-direction dimension of the recess 23. In one example, the Y-direction dimensions of the first opening 31A and the second opening 31B may be larger than the Y-direction dimension of the recess 23. Also, the Y-direction dimension of the first opening 31A and the Y-direction dimension of the second opening 31B may be different from each other.
[0082] One or more of the various examples described in this specification can be combined within a technically non - conflicting range. As used in this disclosure, the term "on" includes the meanings of "on" and "above", unless the context clearly indicates otherwise. Thus, for example, the expression "the first element is disposed on the second element" is intended that in some embodiments, the first element may be disposed directly on the second element in contact with the second element, while in other embodiments, the first element may be disposed above the second element without contacting the second element. That is, the term "on" does not exclude a structure in which other elements are formed between the first element and the second element.
[0083] The Z-axis direction used in this disclosure does not necessarily have to be the vertical direction and does not have to be completely coincident with the vertical direction. Thus, various structures according to this disclosure are not limited to the "up" and "down" in the Z-axis direction described herein being the "up" and "down" in the vertical direction. For example, the X-axis direction may be the vertical direction, or the Y-axis direction may be the vertical direction.
[0084] <Addendum> The technical ideas that can be grasped from this disclosure are described below. Note that, for the purpose of assisting understanding rather than limiting, the components described in the addendum are assigned the reference numerals of the corresponding components in the above embodiments. The reference numerals are shown as examples for assisting understanding, and the components described in each addendum should not be limited to the components indicated by the reference numerals.
[0085] [Addendum 1] A substrate (20) including a first substrate surface (21), a second substrate surface (22) opposite to the first substrate surface (21), and a recess (23) recessed from the first substrate surface (21) toward the second substrate surface (22); An insulating layer (30) formed so as to straddle the recess (23) on the first substrate surface (21); A coil (16) provided in the insulating layer (30); A magnetic member (50) including a resin member and a magnetic material mixed with the resin member; including; The insulating layer (30) is formed in an annular shape having an opening (31) when viewed from the thickness direction (Z) of the substrate (20), and includes an annular portion (32) in which the coil (16) is embedded. The opening (31) is provided at a position overlapping the recess (23) when viewed from the thickness direction (Z). The magnetic member (50) is filled in the recess (23) and the opening (31), and includes a portion surrounded by the coil (16). Chip component (40).
[0086] [Appendix 2] The magnetic member (50) is provided on the first substrate surface (21) and includes an outer peripheral cover portion (51) surrounding the insulating layer (30) when viewed from the thickness direction (Z). The chip component according to Appendix 1.
[0087] [Appendix 3] It includes two external electrodes (61) individually and electrically connected to both ends (17) of the coil (16). The two external electrodes (61) are exposed from the upper surface of the outer peripheral cover portion (51). The chip component according to Appendix 2.
[0088] [Appendix 4] Both ends (17) of the coil (16) and the two external electrodes (61) are individually and electrically connected. The chip component according to Appendix 3.
[0089] [Appendix 5] The two external electrodes (61) penetrate the magnetic member (50) in the thickness direction (Z). The chip component according to Appendix 3 or 4.
[0090] [Appendix 6] The chip component is a transchip. including a first coil (16A) and a second coil (16B) of the coil (16) provided in the insulating layer (30) and spaced apart from each other in a first direction (X) orthogonal to the thickness direction (Z); the insulating layer (30) is a first annular portion (32A) formed in an annular shape having a first opening (31A) as viewed from the thickness direction (Z), a second annular portion (32B) provided side by side with the first annular portion (32A) in the first direction (X) and formed in an annular shape having a second opening (31B) as viewed from the thickness direction (Z); and includes both the first opening (31A) and the second opening (31B) are provided at positions overlapping the recess (23) as viewed from the thickness direction (Z), the first coil (16A) is embedded in the first annular portion (32A), the second coil (16B) is embedded in the second annular portion (32B), the magnetic member (50) is filled in the recess (23), the first opening (31A), and the second opening (31B), and covers at least a part of both the first annular portion (32A) and the second annular portion (32B), the first coil (16A) and the second coil (16B) are magnetically coupled by a closed magnetic path formed by the magnetic member (50). The chip component according to any one of Appendices 1 to 5.
[0091] [Appendix 7] Taking a direction orthogonal to both the first direction (X) and the thickness direction (Z) as a second direction (Y), the first annular portion (32A) is a first portion (33A) extending in the second direction (Y), a second portion (33B) extending in the second direction (Y) and spaced apart from the first portion (33A) closer to the second annular portion (32B), A third portion (33C) and a fourth portion (33D) that extend in the first direction (X) and form the first opening (31A) by connecting the first portion (33A) and the second portion (33B), including the second annular portion (32B) a fifth portion (33E) that extends in the second direction (Y), a sixth portion (33F) that extends in the second direction (Y) and is disposed spaced apart closer to the first annular portion (32A) than the fifth portion (33E), a seventh portion (33G) and an eighth portion (33H) that extend in the first direction (X) and form the second opening (31B) by connecting the fifth portion (33E) and the sixth portion (33F), including the second portion (33B) and the sixth portion (33F) are integrated The chip component according to Supplementary Note 6.
[0092] [Supplementary Note 8] The magnetic member (50) is provided on the first substrate surface (21) and includes an outer peripheral cover portion (51) that covers the first portion (33A), the third portion (33C), the fourth portion (33D), the fifth portion (33E), the seventh portion (33G), and the eighth portion (33H). The chip component according to Supplementary Note 7.
[0093] [Supplementary Note 9] Two first external electrodes (61A) individually and electrically connected to both ends (17A) of the first coil (16A), Two second external electrodes (61B) individually and electrically connected to both ends (17B) of the second coil (16B), including The two first external electrodes (61A) and the two second external electrodes (61B) are exposed from the upper surface of the outer peripheral cover portion (51). The chip component according to Supplementary Note 8.
[0094] [Supplementary Note 10] Each of the two first external electrodes (61A) and the two second external electrodes (61B) penetrates the magnetic member (50) in the thickness direction (Z). The chip component according to appended note 9.
[0095] [Appended note 11] The distance (T2) between the upper surface of the magnetic member (50) and the insulating layer (30) in the thickness direction (Z) is smaller than the distance (T1) between the bottom surface (23A) of the recess (23) and the insulating layer (30) in the thickness direction (Z). The chip component according to any one of appended notes 1 to 10.
[0096] [Appended note 12] The insulating layer (30) is composed of an organic insulating material. The chip component according to any one of appended notes 1 to 11.
[0097] [Appended note 13] The resin member contains an epoxy resin. The magnetic material contains at least one of iron and nickel. The chip component according to any one of appended notes 1 to 12.
[0098] [Appended note 14] The substrate (20) is a semiconductor substrate. The chip component according to any one of appended notes 1 to 13.
[0099] [Appended note 15] It includes a device region (80) in which at least one device is formed. The device includes at least one of a resistor, a transistor, a capacitor, and a diode. The chip component according to any one of appended notes 1 to 14.
[0100] [Appended note 16] The insulating layer (30) includes a first insulating layer (30A) disposed on the first substrate surface (21) of the substrate (20) and a second insulating layer (30B) formed so as to cover the first insulating layer (30A). The coil (16A, 16B) is formed in the second insulating layer (30B). The chip component according to any one of Appendices 1 to 16.
[0101] [Appendix 17] Preparing a substrate (20) including a first substrate surface (21), a second substrate surface (22) opposite to the first substrate surface (21), and a recess (23) recessed from the first substrate surface (21) toward the second substrate surface (22). Forming an insulating layer (30) so as to straddle the recess (23) on the first substrate surface (21). Forming a coil (16 / 16A, 16B) in the insulating layer (30). Forming a magnetic member (50) that fills the recess (23) and covers the insulating layer (30). Including The magnetic member (50) includes a resin member and a magnetic material mixed in the resin member. By forming the insulating layer (30), an annular portion (32) formed in an annular shape having an opening when viewed from the thickness direction (Z) of the substrate (20) is included, and the insulating layer (30) is formed such that the opening overlaps the recess (23) when viewed from the thickness direction (Z). By forming the coil (16 / 16A, 16B), the coil (16 / 16A, 16B) is embedded in the annular portion (32). By forming the magnetic member (50), the magnetic member (50) is formed so as to fill the recess (23) and the opening and cover at least a part of the annular portion (32). The magnetic member (50) includes a portion surrounded by the coil (16 / 16A, 16B). Method for manufacturing a chip component.
[0102] [Appendix 18] Forming the coils (16 / 16A, 16B) includes filling conductive members (800) into grooves (161A, 161B) corresponding to the coils (16 / 16A, 16B) in the annular portion (32). The method for manufacturing a chip component according to appended note 17.
[0103] [Appended note 19] Forming the coils (16A, 16B) includes forming a first coil (16A) and a second coil (16B) spaced apart from each other in a first direction (X) orthogonal to the thickness direction (Z) in the insulating layer (30). Forming the insulating layer (30), a first annular portion (32A) formed in an annular shape having a first opening (31A) as viewed from the thickness direction (Z), a second annular portion (32B) provided side by side with the first annular portion (32A) in the first direction (X) and formed in an annular shape having a second opening (31B) as viewed from the thickness direction (Z), and the insulating layer (30) is formed such that both the first opening (31A) and the second opening (31B) overlap the recess (23) as viewed from the thickness direction (Z). Forming the coils (16A, 16B) includes embedding the first coil (16A) in the first annular portion (32A) and embedding the second coil (16B) in the second annular portion (32B). Forming the magnetic member (50) includes filling the recess (23), the first opening (31A), and the second opening (31B), and is formed to cover at least a part of both the first annular portion (32A) and the second annular portion (32B). The first coil (16A) and the second coil (16B) are magnetically coupled by a closed magnetic path formed by the magnetic member (50). The method for manufacturing a chip component according to appended note 17 or 18.
[0104] [Appended note 20] By forming the coils (16A, 16B), it includes filling each of a first groove (161A) corresponding to the first coil (16A) in the first annular portion (32A) and a second groove (161B) corresponding to the second coil (16B) in the second annular portion (32B) with a conductive member (800). The method for manufacturing a chip component according to Supplementary Note 19.
[0105] The above description is merely illustrative. Those skilled in the art can recognize that there are more possible combinations and substitutions other than the components and methods (manufacturing processes) listed for the purpose of explaining the technology of the present disclosure. The present disclosure is intended to include all alternatives, modifications, and changes within the scope of the present disclosure, including the scope of the claims.
Description of Reference Numerals
[0106] 10…Signal transmission device 11…Primary side terminal 12…Secondary side terminal 13…Primary side circuit 13T…Transmission circuit 14…Secondary side circuit 14R…Receiving circuit 15…Transformer 16…Coil 16A…First coil 16B…Second coil 17…End portion 17A…End portion 17B…End portion 18A…First inner region 18B…Second inner region 20…Substrate 21…First substrate surface 22…Second substrate surface 23…Recess 23A…Bottom surface 23B…Side surface 24…Insulating film 30…Insulating layer 30A…First insulating layer 30B…Second insulating layer 30C…Lower surface of the insulating layer 30D…Upper surface of the insulating layer 31…Opening 31A…First Opening 31B…Second Opening 32…Annular Portion 32A…First Annular Portion 32B…Second Annular Portion 33A~33H…First to Eighth Parts 33P~33R…First to Fourth Parts 40…Chip Component 41…Chip Main Surface 42…Chip Back Surface 43~46…Chip Side Surfaces 50…Magnetic Member 51…Outer Peripheral Cover Portion 52…Central Cover Portion 53…Sealing Member 61…External Electrode 61A…First External Electrode 61B…Second External Electrode 62…Pillar Portion 63…Plating Layer 70…Wiring Portion 70A…First Wiring Portion 70B…Second Wiring Portion 71…Connection Electrode 71A…First Connection Electrode 71B…Second Connection Electrode 72…Via 73…Overhang Portion 80…Device Region 161A…First Groove 161B…Second Groove 800…Conductive Member T1…Thickness of the portion of the magnetic member filled in the concave portion T2…Thickness of the portion of the magnetic member covering the insulating layer T11…Thickness of the first insulating layer T12…Thickness of the second insulating layer V1…First Voltage V2…Second Voltage
Claims
1. A substrate including a first substrate surface, a second substrate surface opposite to the first substrate surface, and a recess recessed from the first substrate surface toward the second substrate surface; An insulating layer formed on the first substrate surface so as to straddle the recess; A coil provided in the insulating layer; A magnetic member including a resin member and a magnetic material mixed with the resin member; Comprising; The insulating layer is formed in an annular shape having an opening when viewed from the thickness direction of the substrate, and includes an annular portion in which the coil is embedded; The opening is provided at a position overlapping the recess when viewed from the thickness direction; The magnetic member is filled in the recess and the opening, and includes a portion surrounded by the coil Chip component.
2. The magnetic member is provided on the first substrate surface and includes an outer peripheral cover portion surrounding the insulating layer when viewed from the thickness direction The chip component according to claim 1.
3. Including two external electrodes individually electrically connected to both ends of the coil, The two external electrodes are exposed from the upper surface of the outer peripheral cover portion The chip component according to claim 2.
4. Both ends of the coil and the two external electrodes are individually electrically connected The chip component according to claim 3.
5. The two external electrodes penetrate the magnetic member in the thickness direction The chip component according to claim 3.
6. The chip component is a transchip, Including a first coil and a second coil as the coils provided in the insulating layer and spaced apart from each other in a first direction orthogonal to the thickness direction, The insulating layer is A first annular portion formed in an annular shape having a first opening when viewed from the thickness direction; A second annular portion provided side by side with the first annular portion in the first direction and formed in an annular shape having a second opening when viewed from the thickness direction; Including; Both the first opening and the second opening are provided at positions overlapping the recess when viewed from the thickness direction; The first coil is embedded in the first annular portion; The second coil is embedded in the second annular portion; The magnetic member is filled in the recess, the first opening, and the second opening, and covers at least a part of both the first annular portion and the second annular portion; The first coil and the second coil are magnetically coupled by a closed magnetic path formed by the magnetic member The chip component according to claim 1.
7. Taking the direction orthogonal to both the first direction and the thickness direction as the second direction, the first annular part has a first portion extending in the second direction, a second portion extending in the second direction and spaced apart closer to the second annular part than the first portion, and third and fourth portions extending in the first direction and connecting the first portion and the second portion to form the first opening, and includes the second annular part has a fifth portion extending in the second direction, a sixth portion extending in the second direction and spaced apart closer to the first annular part than the fifth portion, and seventh and eighth portions extending in the first direction and connecting the fifth portion and the sixth portion to form the second opening, and includes the second portion and the sixth portion are integrated. The chip component according to claim 6.
8. The magnetic member is provided on the first substrate surface and includes an outer peripheral cover portion covering the first portion, the third portion, the fourth portion, the fifth portion, the seventh portion, and the eighth portion. The chip component according to claim 7.
9. Two first external electrodes individually electrically connected to both ends of the first coil, and two second external electrodes individually electrically connected to both ends of the second coil, and includes the two first external electrodes and the two second external electrodes are exposed from the upper surface of the outer peripheral cover portion. The chip component according to claim 8.
10. Each of the two first external electrodes and the two second external electrodes penetrates the magnetic member in the thickness direction. The chip component according to claim 9.
11. The distance between the upper surface of the magnetic member and the insulating layer in the thickness direction is smaller than the distance between the bottom surface of the recess and the insulating layer in the thickness direction. The chip component according to claim 1.
12. The insulating layer is made of an organic insulating material. The chip component according to claim 1.
13. The resin member includes an epoxy resin, and the magnetic material includes at least one of iron and nickel. The chip component according to claim 1.
14. The substrate is a semiconductor substrate. The chip component according to claim 1.
15. including a device region in which at least one device is formed, and the device includes at least one of a resistor, a transistor, a capacitor, and a diode. The chip component according to claim 1.
16. The insulating layer includes a first insulating layer disposed on the first substrate surface of the substrate and a second insulating layer formed so as to cover the first insulating layer, and the coil is formed in the second insulating layer. The chip component according to claim 1.
17. Preparing a substrate including a first substrate surface, a second substrate surface opposite to the first substrate surface, and a recess recessed from the first substrate surface toward the second substrate surface; Forming an insulating layer so as to straddle the recess on the first substrate surface; Forming a coil in the insulating layer; Forming a magnetic member so as to fill the recess and cover the insulating layer; including the magnetic member includes a resin member and a magnetic material mixed with the resin member, By forming the insulating layer, an annular portion formed in an annular shape having an opening as viewed from the thickness direction of the substrate is included, and the insulating layer is formed such that the opening overlaps the recess as viewed from the thickness direction. By forming the coil, the coil is embedded in the annular portion. By forming the magnetic member, the magnetic member is formed so as to fill the recess and the opening and cover at least a part of the annular portion. The magnetic member includes a portion surrounded by the coil. A method for manufacturing a chip component.
18. By forming the coil, forming a first coil and a second coil spaced apart from each other in a first direction orthogonal to the thickness direction in the insulating layer is included. By forming the insulating layer, a first annular portion formed in an annular shape having a first opening as viewed from the thickness direction; a second annular portion provided side by side with the first annular portion in the first direction and formed in an annular shape having a second opening as viewed from the thickness direction; including, and the insulating layer is formed such that both the first opening and the second opening overlap the recess as viewed from the thickness direction. By forming the coil, the first coil is embedded in the first annular portion and the second coil is embedded in the second annular portion. By forming the magnetic member, the magnetic member is formed so as to fill the recess, the first opening, and the second opening and cover at least a part of both the first annular portion and the second annular portion. The first coil and the second coil are magnetically coupled by a closed magnetic circuit formed by the magnetic member. The method for manufacturing a chip component according to claim 17.
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Electronic component
JP2018078169A