Chip inductor

Abstract

To provide a chip inductor adaptable to a required inductance.SOLUTION: A chip inductor 10 includes an inductor circuit 40 that is disposed between a first electrode 31 and a second electrode 32 in an X direction and electrically connected to the first electrode 31 and the second electrode 32. The inductor circuit 40 includes a plurality of inductor elements 50, a plurality of types of inductor units formed by electrically connecting one or more of the inductor elements 50, and a plurality of fuses FS that are provided to individually correspond to the inductor units and connected to the inductor circuit 40 to be electrically separable from each other. The inductor element 50 includes a topological insulator 51 and a magnetic insulator 52 provided in the topological insulator 51.SELECTED DRAWING: Figure 8

Description

Technical Field

[0001] The present disclosure relates to a chip inductor.

Background Art

[0002] Patent Document 1 discloses a chip inductor including a coil conductor and a sealing body that seals the coil conductor.

Prior Art Document

Patent Document

[0003]

Patent Document 1

[0004] [Summary] There may be a case where a chip inductor corresponding to a required inductance is required.

[0005] The chip inductor according to one aspect of the present disclosure includes a first electrode and a second electrode that are spaced apart from each other in a first direction, and an inductor circuit disposed between the first electrode and the second electrode in the first direction and electrically connected to the first electrode and the second electrode. The inductor circuit includes a plurality of inductor elements, a plurality of types of inductor unit bodies configured by electrically connecting one or more of the inductor elements, and a plurality of fuses provided corresponding to the inductor unit bodies individually and electrically separably connecting the inductor unit bodies to the inductor circuit. The inductor element includes a topological insulator and a magnetic insulator provided on the topological insulator.

Brief Description of the Drawings

[0006]

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[0007] [Detailed Description] Hereinafter, some embodiments of the chip inductor in the present disclosure will be described with reference to the accompanying drawings. Note that, for the sake of simplicity and clarity of the description, the components shown in the drawings are not necessarily drawn at a constant scale. Also, for ease of understanding, the hatching lines may be omitted in the cross-sectional views. The accompanying drawings are merely illustrative of the embodiments of the present disclosure and should not be regarded as limiting the present disclosure.

[0008] The following detailed description includes devices, systems, and methods that embody exemplary embodiments of the present disclosure. This detailed description is for illustrative purposes only and is not intended to limit the embodiments of the present disclosure or the application and use of such embodiments.

[0009] As used herein, the expression "at least one" means "one or more" of the desired options. As an example, as used herein, the expression "at least one" means "only one option" or "both of the two options" if the number of options is two. As another example, as used herein, the expression "at least one" means "only one option" or "any combination of two or more options" if the number of options is three or more.

[0010] As used herein, the phrase "the dimension (depth, width, length) of A is equal to the dimension (depth, width, length) of B" or "the dimension (depth, width, length) of A and the dimension (depth, width, length) of B are equal to each other" includes a relationship in which the difference between the dimension (depth, width, length) of A and the dimension (depth, width, length) of B is within 10% of the dimension (depth, width, length) of A, for example.

[0011] <First Embodiment> Referring to FIGS. 1 to 11, the chip inductor 10 of the first embodiment will be described. Referring to FIGS. 1 to 3, the overall configuration of the chip inductor 10 will be described. FIG. 1 schematically shows the perspective structure of the chip inductor 10 of the first embodiment. FIG. 2 schematically shows the planar structure of the chip inductor 10 of FIG. 1. FIG. 3 shows the cross-sectional structure of the chip inductor 10 cut along the line F3-F3 of FIG. 2. In FIG. 3, the inductor circuit 40, which will be described later, of the chip inductor 10 is shown in a simplified state. Note that the term "planar view" used in the present disclosure means viewing the chip inductor 10 or the components of the chip inductor 10 in the Z-axis direction of the XYZ axes orthogonal to each other in FIG. 1.

[0012] As shown in FIG. 1, the chip inductor 10 is a rectangular parallelepiped chip component. The chip inductor 10 is formed in a rectangular shape in which the X-axis direction is the longitudinal direction and the Y-axis direction is the short-side direction in a planar view. The chip inductor 10 includes a substrate 20, a first electrode 31 and a second electrode 32 formed on the substrate 20, and an inductor circuit 40 electrically connected to the first electrode 31 and the second electrode 32. The first electrode 31 and the second electrode 32 are arranged to be spaced apart from each other in the X-axis direction. Therefore, the X-axis direction is an example of the "first direction".

[0013] The substrate 20 is formed in a rectangular parallelepiped shape with the Z-axis direction as the thickness direction. The substrate 20 supports the first electrode 31, the second electrode 32, and the inductor circuit 40. For the substrate 20, for example, a semiconductor substrate is used. The semiconductor substrate is composed of, for example, a material containing silicon (Si). In the first embodiment, an Si substrate is used as the semiconductor substrate. Note that other types of substrates such as insulating substrates may be used for the substrate 20.

[0014] The substrate 20 includes a first substrate surface 21 and a second substrate surface 22 facing opposite sides in the Z-axis direction, and first to fourth substrate side surfaces 23 to 26 as four substrate side surfaces orthogonal to both the first substrate surface 21 and the second substrate surface 22. On the first substrate surface 21, the first electrode 31, the second electrode 32, and the inductor circuit 40 are formed. The first electrode 31 and the second electrode 32 constitute external terminals that are electrically connected to a circuit board when the chip inductor 10 is mounted on the circuit board, for example. Therefore, it can be said that the first substrate surface 21 is the mounting surface of the chip inductor 10. The first substrate side surface 23 and the second substrate side surface 24 constitute both end faces of the substrate 20 in the X-axis direction, and the third substrate side surface 25 and the fourth substrate side surface 26 constitute both end faces of the substrate 20 in the Y-axis direction.

[0015] As shown in FIG. 3, an insulating layer 27 is provided on the substrate 20. The insulating layer 27 is composed of, for example, a silicon oxide film (SiO2). Note that the insulating layer 27 may contain, for example, a silicon nitride film (SiN). In one example, the insulating layer 27 covers the entire first substrate surface 21 of the substrate 20. Each of the first electrode 31, the second electrode 32, and the inductor circuit 40 is formed on the insulating layer 27 covering the first substrate surface 21. The thickness of the insulating layer 27 is, for example, about 10000 Å. Note that the thickness of the insulating layer 27 can be arbitrarily changed.

[0016] As shown in FIG. 2, the first electrode 31 and the second electrode 32 are arranged to be spaced apart from each other in the X-axis direction. The first electrode 31 and the second electrode 32 are dispersedly arranged at both ends of the first substrate surface 21 in the X-axis direction. The first electrode 31 is arranged at the end of the first substrate surface 21 closer to the first substrate side surface 23. The second electrode 32 is arranged at the end of the first substrate surface 21 closer to the second substrate side surface 24.

[0017] The first electrode 31 and the second electrode 32 function as external electrodes when the chip inductor 10 is mounted on the circuit board. Both the first electrode 31 and the second electrode 32 are formed in a rectangular shape in which the Y-axis direction is the longitudinal direction and the X-axis direction is the short side direction in plan view.

[0018] As shown in FIG. 3, the first electrode 31 and the second electrode 32 are constituted by, for example, a laminated structure of a first wiring film 33, a second wiring film 34, and an electrode portion 35. The first wiring film 33 is laminated on the insulating layer 27. The first wiring film 33 is in contact with the insulating layer 27. The second wiring film 34 is laminated on the first wiring film 33. The first wiring film 33 and the second wiring film 34 are constituted by a material containing at least one of, for example, aluminum (Al) and copper (Cu). The first wiring film 33 and the second wiring film 34 may be constituted by the same material as each other, or may be constituted by different materials from each other. The electrode portion 35 is laminated on the second wiring film 34. The electrode portion 35 is constituted by, for example, a plating layer. The electrode portion 35 is constituted by a material containing, for example, gold (Au). In one example, the electrode portion 35 is constituted by laminating nickel (Ni), palladium (Pd), and Au in this order from the second wiring film 34.

[0019] In one example, the thickness (film thickness) of the first wiring film 33 and the second wiring film 34 is thinner than the thickness of the insulating layer 27. In one example, the thickness of the first wiring film 33 is thinner than the thickness of the second wiring film 34. In one example, the thickness of the first wiring film 33 is about 2000 Å. In one example, the thickness of the second wiring film 34 is about 8000 Å. Note that the thickness of each of the first wiring film 33 and the second wiring film 34 can be arbitrarily changed. Also, the configurations of the first electrode 31 and the second electrode 32 can be arbitrarily changed. In one example, the second wiring film 34 may be omitted from the first electrode 31 and the second electrode 32.

[0020] As shown in FIG. 2, the inductor circuit 40 is disposed between the first electrode 31 and the second electrode 32 in the X-axis direction. The inductor circuit 40 is electrically connected to the first electrode 31 and the second electrode 32. The inductor circuit 40 is configured as a circuit network including a large number of inductor elements 50 arranged in a matrix in a plan view. In one example, in the inductor circuit 40, a maximum of eight inductor elements 50 are arranged along the row direction (X-axis direction), and a maximum of 34 inductor elements 50 are arranged along the column direction (Y-axis direction). Then, by electrically connecting one to 64 of these large number of inductor elements 50, a plurality of types of inductor units are configured. The plurality of types of inductor units are connected in a predetermined manner by the connection wiring CW. In addition, the inductor circuit 40 includes a plurality of fuses FS in which the plurality of types of inductor units are electrically and separably connected to the inductor circuit 40. Note that the detailed configuration of the inductor circuit 40 will be described later.

[0021] As shown in FIG. 3, the chip inductor 10 includes a protective layer 28 and a resin layer 29. The protective layer 28 is configured to protect the chip inductor 10. The protective layer 28 is formed over the entire surfaces of the insulating layer 27 and the first to fourth substrate side surfaces 23 to 26 (see FIG. 1) of the substrate 20. The protective layer 28 covers the first wiring film 33 and the second wiring film 34 of each of the first electrode 31 and the second electrode 32, and the inductor circuit 40. The protective layer 28 is constituted by, for example, a silicon nitride film.

[0022] The resin layer 29 is configured to protect the chip inductor 10 together with the protective layer 28. The resin layer 29 covers a portion of the protective layer 28 that covers the insulating layer 27. The resin layer 29 is made of a resin material containing, for example, polyimide (PI).

[0023] As shown in FIG. 3, each electrode portion 35 of the first electrode 31 and the second electrode 32 penetrates the resin layer 29 and the protective layer 28 in the Z-axis direction and is in contact with the second wiring film 34. A part of the electrode portion 35 protrudes from the resin layer 29 in the Z-axis direction.

[0024] [Configuration of the circuit network of the inductor circuit] Next, with reference to FIGS. 4 to 7, the detailed configuration of the inductor circuit 40 will be described. FIG. 4 shows an enlarged view of a part of the inductor circuit 40 in FIG. 2. FIG. 5 schematically shows a cross-sectional structure obtained by cutting the chip inductor 10 along the line F5-F5 in FIG. 4. FIG. 6 schematically shows a cross-sectional structure obtained by cutting the chip inductor 10 along the line F6-F6 in FIG. 4. FIG. 7 schematically shows a perspective structure of one inductor element 50.

[0025] As shown in FIGS. 5 to 7, the inductor element 50 is an inductor element using the spin dynamics effect. It can also be said that the inductor element 50 is an inductor using spintronics technology. In the first embodiment, the inductor element 50 is an insulator inductor. More specifically, the inductor element 50 includes a topological insulator 51 and a magnetic insulator 52 provided on the topological insulator 51.

[0026] The topological insulator 51 is provided on the insulating layer 27. The topological insulator 51 is composed of a thin film. The topological insulator 51 is a substance whose interior is an insulator and whose surface is a conductor. That is, electricity flows on the surface of the topological insulator 51. The topological insulator 51 contains at least one of bismuth (Bi), antimony (Sb), selenium (Se), and tellurium (Te). Note that the constituent material of the topological insulator 51 is not limited to the above materials and can be arbitrarily changed.

[0027] The magnetic insulator 52 is composed of a thin film laminated on the topological insulator 51. The magnetic insulator 52 is an insulator having magnetism. The magnetic insulator 52 is configured to generate magnetic vibrations when a magnetic field is applied from the outside. The magnetic insulator 52 contains an iron garnet (R3Fe5O 12 ) containing rare earth elements. Examples of rare earth elements include yttrium (Y), terbium (Tb), and the like. Note that the constituent material of the magnetic insulator 52 is not limited to the above materials and can be arbitrarily changed.

[0028] In the inductor element 50 having such a configuration, when an alternating current flows on the surface of the topological insulator 51, magnetic vibrations are generated in the magnetic insulator 52 due to topological electromagnetic response, which is the mutual conversion of electricity and magnetism. By converting this magnetic vibration into an alternating voltage, the inductor element 50 operates as an inductor.

[0029] As shown in FIG. 7, the thickness TA of the topological insulator 51 is, for example, 10 nm or less. The thickness TB of the magnetic insulator 52 is, for example, 10 nm or less. In one example, the thickness TB of the magnetic insulator 52 is thinner than the thickness TA of the topological insulator 51. In one example, the sum (TA + TB) of the thickness TA of the topological insulator 51 and the thickness TB of the magnetic insulator 52, that is, the thickness of the inductor element 50, is about 10 nm. Thus, the thickness of the inductor element 50 is thinner than the thickness of the insulating layer 27. The thickness of the inductor element 50 is thinner than the thickness of the first wiring film 33 of the first electrode 31 and the second electrode 32.

[0030] Note that the relationship between the thickness TB of the magnetic insulator 52 and the thickness TA of the topological insulator 51 can be arbitrarily changed. In one example, the thickness TB of the magnetic insulator 52 may be equal to the thickness TA of the topological insulator 51. In one example, the thickness TB of the magnetic insulator 52 may be greater than the thickness TA of the topological insulator 51.

[0031] As shown in FIG. 4, the topological insulator 51 includes a plurality of straight portions 53 formed in a strip shape extending in the X-axis direction. The plurality of straight portions 53 are arranged at intervals in the Y-axis direction. At least one magnetic insulator 52 is disposed on the straight portion 53. The straight portion 53 includes a disposition portion 53A where the magnetic insulator 52 is disposed and an element connection portion 53B extending in the X-axis direction from the magnetic insulator 52 in a plan view. When a plurality of magnetic insulators 52 are stacked on the straight portion 53, the plurality of magnetic insulators 52 are arranged at intervals in the X-axis direction. For this reason, a plurality of disposition portions 53A are provided at intervals in the X-axis direction on the straight portion 53. Thus, it can be said that the inductor element 50 is constituted by the disposition portion 53A of the topological insulator 51 and the magnetic insulator 52 stacked on the disposition portion 53A. The element connection portion 53B can be said to be a wiring that connects adjacent inductor elements 50 in the X direction. That is, the topological insulator 51 also serves as a wiring electrically connected to the inductor element 50. Note that the arrangement pitch of the plurality of magnetic insulators 52 can be arbitrarily changed.

[0032] The topological insulator 51 includes a connection portion 54 that connects the straight portions 53 adjacent to each other in the Y-axis direction. The connection portion 54 connects the X-axis direction ends of the straight portions 53 adjacent to each other in the Y-axis direction. In one example, the X-direction end of the straight portion 53 is constituted by the element connection portion 53B. The connection portion 54 is formed in a strip shape extending in the Y-axis direction in a plan view. In one example, the dimension (width dimension) in the X-axis direction of the straight portion 53 is equal to the dimension (width dimension) in the Y-axis direction of the connection portion 54. Note that each of the width dimension of the straight portion 53 and the width dimension of the connection portion 54 can be arbitrarily changed.

[0033] A plurality of magnetic insulators 52 are provided at intervals in the direction in which the straight portions 53 extend (X-axis direction). As a result, a plurality of inductor elements 50 are formed. A plurality of types of inductor unit bodies are formed by a predetermined number of inductor elements 50. Since the plurality of magnetic insulators 52 are arranged at intervals in the direction in which the straight portions 53 extend in the common topological insulator 51, it can be said that the plurality of inductor elements 50 are connected in series.

[0034] As shown in FIG. 4, the plurality of straight portions 53 include a plurality of types of straight portions 53 having different lengths in the X-axis direction. Also, the length of the inductor unit body, in other words, the length in the X-axis direction of the straight portion 53 constituting the inductor unit body, the number of straight portions 53, and the number of connection portions 54 are set according to the number of inductor elements 50, that is, the type of inductor unit body.

[0035] The lengths of the plurality of magnetic insulators 52 in the X-axis direction are equal to each other. The lengths (width dimensions) of the plurality of magnetic insulators 52 in the Y-axis direction are equal to each other. The width dimension of the magnetic insulator 52 is equal to, for example, the length (width dimension) of the topological insulator 51 in the Y-axis direction. Also, the arrangement pitches of the plurality of magnetic insulators 52 are equal to each other. For this reason, it can be said that the inductors of the plurality of inductor elements 50 in the inductor circuit 40 are equal to each other.

[0036] In this way, since the topological insulator 51 is commonly provided for the inductor unit body, it can be said that the plurality of inductor elements 50 in the inductor unit body are arranged on the same plane. Also, since each of the plurality of types of inductor unit bodies is provided on the insulating layer 27, it can be said that the plurality of types of inductor unit bodies are arranged on the same plane.

[0037] As shown in FIGS. 5 and 6, the protective layer 28 covers the inductor circuit 40. As shown in FIG. 5, it covers the portion between the magnetic insulators 52 adjacent to each other in the X-axis direction among the topological insulators 51. It can also be said that the protective layer 28 penetrates into the portion between the magnetic insulators 52 adjacent to each other in the X-axis direction. As shown in FIG. 6, the protective layer 28 covers the portion between the topological insulators 51 adjacent to each other in the Y-axis direction. It can also be said that the protective layer 28 penetrates into the portion between the topological insulators 51 adjacent to each other in the Y-axis direction. It can also be said that the protective layer 28 covers the insulating layer 27 exposed from the topological insulator 51.

[0038] [Configuration of Connection Wiring and Fuses] Next, with reference to FIGS. 8 and 9, the detailed configuration of the connection wiring CW and the fuse FS will be described. FIG. 8 shows an enlarged view of the connection wiring CW, the fuse FS, and their surroundings in the inductor circuit 40 of FIG. 2. FIG. 9 schematically shows a cross-sectional structure obtained by cutting the chip inductor 10 along the line F9-F9 in FIG. 8.

[0039] As shown in FIG. 8, both the connection wiring CW and the fuse FS are provided at positions adjacent to the second electrode 32 in the X-axis direction. The chip inductor 10 includes a plurality of connection wirings CW and a plurality of fuses FS. These connection wirings CW and fuses FS are arranged at intervals from each other in the Y-axis direction.

[0040] The connection wiring CW and the fuse FS connect a plurality of types of inductor unit bodies in the inductor circuit 40. More specifically, the connection wiring CW and the fuse FS are connected to the ends of the topological insulators 51 that constitute a plurality of types of inductor unit bodies.

[0041] As shown in FIG. 9, the fuse FS is composed of a thin film formed on the insulating layer 27. In one example, the fuse FS is formed at the same position as the first wiring film 33 of the first electrode 31 and the second electrode 32 in the Z-axis direction. The fuse FS is composed of a material containing at least one of, for example, aluminum (Al) and copper (Cu). In one example, the fuse FS is composed of the same material as the first wiring film 33, for example. The fuse FS is covered by the protective layer 28.

[0042] The connection wiring CW is laminated on the insulating layer 27 in the same manner as the fuse FS. The connection wiring CW is formed at the same position as the fuse FS in the Z-axis direction. Therefore, it can be said that the fuse FS and the connection wiring CW are arranged on the same plane. Also, it can be said that a plurality of types of inductor units, the connection wiring CW, and the fuse FS are arranged on the same plane. The connection wiring CW is composed of a material containing at least one of, for example, aluminum (Al) and copper (Cu). In one example, the connection wiring CW is composed of the same material as the fuse FS. The connection wiring CW is covered by the protective layer 28. In one example, the connection wiring CW and the fuse FS are integrated.

[0043] The thickness (film thickness) of the fuse FS is equal to the thickness (film thickness) of the first wiring film 33. Therefore, the thickness of the inductor element 50 is thinner than the thickness of the fuse FS. The thickness of the inductor element 50 is thinner than the thickness of the connection wiring CW.

[0044] [Circuit Configuration of Inductor Circuit] Next, with reference to FIGS. 10 and 11, the circuit configuration of the inductor circuit 40 of the first embodiment will be described. FIG. 10 schematically shows the connection configuration of a plurality of types of inductor units, a plurality of fuses FS, and a plurality of connection wirings CW. FIG. 11 schematically shows the circuit diagram of the chip inductor 10.

[0045] As shown in FIG. 10, in the first embodiment, a total of 22 fuse elements FS and connection wirings CW are provided. In FIG. 10, for the sake of convenience, the plurality of fuse elements FS are shown as constricted quadrangles, and the plurality of connection wirings CW are shown as quadrangles. Then, numbers from 1 to 22 are sequentially assigned from the side surface 25 of the third substrate toward the side surface 26 of the fourth substrate. For the sake of convenience, the plurality of fuse elements FS corresponding to these numbers are referred to as "fuse elements F1, F3, F4, F6, F7, F10, F11, F13, F14, F16, F17, F19, F20". Also, for the sake of convenience, the plurality of connection wirings CW corresponding to the above numbers are referred to as "connection wirings C2, C5, C8, C9, C11, C12, C15, C18, C21, C22".

[0046] As shown in FIG. 10, among the plurality of fuse elements FS and the plurality of connection wirings CW, adjacent fuse elements FS and connection wirings CW, adjacent connection wirings CW to each other, and adjacent fuse elements FS to each other are electrically connected to each other. And, the connection wirings C21 and C22 are electrically connected to the second electrode 32. Thus, it can be said that the plurality of fuse elements FS and the plurality of connection wirings CW are electrically connected to the second electrode 32 when the plurality of fuse elements FS are not cut. When each fuse element FS is cut, the electrical connection between the connection wiring CW connected adjacent to the fuse element FS is separated.

[0047] As shown in FIG. 10, the inductor circuit 40 includes, as a plurality of types of inductor unit bodies, two inductor unit bodies L8, an inductor unit body L64, two inductor unit bodies L32, an inductor unit body L4, an inductor unit body L2, and an inductor unit body L1. These inductor unit bodies L8, L64, L32, L4, and L2 are configured by connecting a plurality of inductor elements 50 in series.

[0048] In addition, the inductor circuit 40 includes, as a plurality of types of inductor units, an inductor unit L / 2, an inductor unit L / 4, an inductor unit L / 8, an inductor unit L / 16, and an inductor unit L / 32. These inductor units L / 2, L / 4, L / 8, L / 16, L / 32 are constituted by connecting a plurality of inductor elements 50 in parallel.

[0049] One of the two inductor units L8 is connected to the first electrode 31 and the fuse F1. In the first embodiment, the first end of the topological insulator 51 constituting the inductor unit L8 is connected to the first electrode 31. And the second end of the topological insulator 51 is connected to the fuse F1. The inductor unit L8 is constituted by connecting 8 inductor elements 50 in series. In the first embodiment, the inductor unit L8 is constituted by one topological insulator 51 and 8 magnetic insulators 52 arranged separately from each other on the topological insulator 51. Here, the inductor unit L8 connected to the first electrode 31 is an example of the "first inductor unit". Also, the fuse F1 is an example of the "first fuse".

[0050] An inductor unit L64 is connected to the fuse F1 and the connection wiring C2. More specifically, the first end of the topological insulator 51 constituting the inductor unit L64 is connected to the fuse F1, and the second end of the topological insulator 51 constituting the inductor unit L64 is connected to the connection wiring C2. The inductor unit L64 is constituted by connecting 64 inductor elements 50 in series. In the first embodiment, the inductor unit L64 is constituted by one topological insulator 51 and 64 magnetic insulators 52 arranged separately from each other on the topological insulator 51.

[0051] One of the two inductor units L32 is connected to the connection wiring C2 and the fuse F4. More specifically, the first end of the topological insulator 51 constituting the inductor unit L32 is connected to the connection wiring C2, and the second end of the topological insulator 51 constituting the inductor unit L32 is connected to the fuse F4. The inductor unit L32 is composed of a series connection of 32 inductor elements 50. In the first embodiment, the inductor unit L32 is composed of one topological insulator 51 and 32 magnetic insulators 52 arranged separately from each other on the topological insulator 51.

[0052] The remaining one of the two inductor units L32 is connected to the fuse F4 and the connection wiring C5. More specifically, the first end of the topological insulator 51 constituting the inductor unit L32 is connected to the fuse F4, and the second end of the topological insulator 51 constituting the inductor unit L32 is connected to the connection wiring C5. The configuration of this inductor unit L32 is the same as that of the inductor unit L32 connected to the connection wiring C2 and the fuse F4. On the other hand, the shape of the topological insulator 51 of the inductor unit L32 connected to the fuse F4 and the connection wiring C5 is different from the shape of the topological insulator 51 of the inductor unit L32 connected to the connection wiring C2 and the fuse F4.

[0053] The inductor unit L16 is connected to the connection wiring C5 and the fuse F6. More specifically, the first end of the topological insulator 51 constituting the inductor unit L16 is connected to the connection wiring C5, and the second end of the topological insulator 51 constituting the inductor unit L16 is connected to the fuse F6. In the first embodiment, the inductor unit L16 is composed of one topological insulator 51 and 16 magnetic insulators 52 arranged separately from each other on the topological insulator 51.

[0054] One of the remaining two inductor units L8 is connected to fuse F7 adjacent to fuse F6 and connection wiring C9. More specifically, the first end of topological insulator 51 that constitutes inductor unit L8 is connected to fuse F6, and the second end of topological insulator 51 that constitutes inductor unit L8 is connected to connection wiring C9. The configuration of this inductor unit L8 is the same as that of inductor unit L8 connected to first electrode 31 and fuse F1. On the other hand, the shape of topological insulator 51 of inductor unit L32 connected to fuse F7 and connection wiring C9 is different from the shape of topological insulator 51 of inductor unit L8 connected to first electrode 31 and fuse F1.

[0055] Inductor unit L4 is connected to connection wiring C9 and fuse F10. More specifically, the first end of topological insulator 51 that constitutes inductor unit L4 is connected to connection wiring C9, and the second end of topological insulator 51 that constitutes inductor unit L4 is connected to fuse F10. In the first embodiment, inductor unit L4 is composed of one topological insulator 51 and four magnetic insulators 52 that are arranged spaced apart from each other on topological insulator 51.

[0056] Inductor unit L2 is connected to fuse F11 adjacent to fuse F10 and connection wiring C12. More specifically, the first end of topological insulator 51 that constitutes inductor unit L2 is connected to fuse F11, and the second end of topological insulator 51 that constitutes inductor unit L2 is connected to connection wiring C12. In the first embodiment, inductor unit L2 is composed of one topological insulator 51 and two magnetic insulators 52 that are arranged spaced apart from each other on topological insulator 51.

[0057] An inductor unit body L1 is connected to the connection wiring C12 and the fuse F13. More specifically, the first end of the topological insulator 51 constituting the inductor unit body L1 is connected to the connection wiring C12, and the second end of the topological insulator 51 constituting the inductor unit body L1 is connected to the fuse F13. In the first embodiment, the inductor unit body L1 is composed of one topological insulator 51 and one magnetic insulator 52 disposed on the topological insulator 51.

[0058] An inductor unit body L / 2 is connected to the fuse F13 and the connection wiring C15. More specifically, the first end of the topological insulator 51 constituting the inductor unit body L / 2 is connected to a portion of the topological insulator 51 constituting the inductor unit body L1 between the magnetic insulator 52 and the fuse F13. Thereby, the inductor unit body L / 2 is connected to the fuse F13 via the inductor unit body L1. The second end of the topological insulator 51 constituting the inductor unit body L / 2 is connected to the connection wiring C15. In the first embodiment, the inductor unit body L / 2 includes one topological insulator 51 and two magnetic insulators 52 disposed on the topological insulator 51. The two magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the two magnetic insulators 52 are connected in parallel.

[0059] An inductor unit body L / 4 is connected to the connection wiring C15 and the fuse F16. An inductor unit body L / 8 is connected to the fuse F16 and the connection wiring C18. An inductor unit body L / 16 is connected to the connection wiring C18 and the fuse F19. An inductor unit body L / 32 is connected to the fuse F19 and the connection wirings C21, C22.

[0060] More specifically, the first end of the topological insulator 51 constituting the inductor unit L / 8 is connected to the fuse F16, and the second end of the topological insulator 51 constituting the inductor unit L / 8 is connected to the connection wiring C18. The first end of the topological insulator 51 constituting the inductor unit L / 4 is connected to the topological insulator 51 constituting the inductor unit L / 2 and the topological insulator 51 constituting the inductor unit L / 8. The second end of the topological insulator 51 constituting the inductor unit L4 is connected to a portion between the magnetic insulator 52 and the connection wiring C15 of the topological insulator 51 constituting the inductor unit L / 2. Further, the topological insulator 51 constituting the inductor unit L4 is connected to a portion between the magnetic insulator 52 and the fuse F16 of the topological insulator 51 constituting the inductor unit L / 8. The first end of the topological insulator 51 constituting the inductor unit L / 16 is connected to a portion between the magnetic insulator 52 and the connection wiring C18 of the topological insulator 51 constituting the inductor unit L / 8. The second end of the topological insulator 51 constituting the inductor unit L / 16 is connected to the fuse F19. The first end of the topological insulator 51 constituting the inductor unit L / 32 is connected to a portion between the magnetic insulator 52 and the fuse F19 of the topological insulator 51 constituting the inductor unit L / 16. The second end of the topological insulator 51 constituting the inductor unit L / 32 branches and is connected to the connection wirings C21 and C22.

[0061] In the first embodiment, the inductor unit L / 4 includes one topological insulator 51 and four magnetic insulators 52 arranged on the topological insulator 51. The four magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the four magnetic insulators 52 are connected in parallel. The inductor unit L / 8 includes one topological insulator 51 and eight magnetic insulators 52 arranged on the topological insulator 51. The eight magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the eight magnetic insulators 52 are connected in parallel. The inductor unit L / 16 includes one topological insulator 51 and sixteen magnetic insulators 52 arranged on the topological insulator 51. The sixteen magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the sixteen magnetic insulators 52 are connected in parallel. The inductor unit L / 32 includes one topological insulator 51 and thirty-two magnetic insulators 52 arranged on the topological insulator 51. The thirty-two magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the thirty-two magnetic insulators 52 are connected in parallel.

[0062] Note that any one of the inductor units L64, L32, L16, L8, L4, L2, L1, L / 2, L / 4, L / 8, L / 16, L / 32 is an example of the "second inductor unit". Also, among the fuses F3, F4, F6, F7, F10, F11, F13, F14, F16, F17, F19, F20, the fuse corresponding to the "second inductor unit" is an example of the "second fuse".

[0063] The connection configuration of the above inductance unit, fuse FS, and connection wiring CW forms the circuit configuration of the inductor circuit 40 shown in FIG. 11. The inductor circuit 40 includes a configuration in which a plurality of types of inductance units are connected in series. The inductor circuit 40 includes a configuration in which a fuse FS is connected in parallel to each of all the inductance units except the inductance unit connected to the first electrode 31. Specifically, in the initial state where all the fuses FS are not blown, the inductor circuit 40 has a configuration including only the inductor unit L8 provided between the first electrode 31 and the second electrode 32, that is, the inductor unit L8 connected to the first electrode 31.

[0064] And a fuse FS is connected in parallel to each of the plurality of types of inductance units other than the inductance unit L8 connected to the first electrode 31. These fuses FS short-circuit the plurality of types of inductance units. That is, 13 inductance units of 12 types are connected in series to the inductance unit L8 connected to the first electrode 31. On the other hand, since each inductance unit is short-circuited by the fuses FS connected in parallel thereto, it can be said that each inductance unit is electrically separated from the inductor circuit 40.

[0065] In such a chip inductor 10, the fuse FS is selectively blown, for example, by laser light according to the required inductance value. As a result, the inductance unit in which the fuse FS is blown is incorporated into the circuit network of the inductor circuit 40. Therefore, the overall inductance value of the inductor circuit 40 can be set to a circuit network having an inductance value in which the inductance units corresponding to the blown fuses FS are connected in series and incorporated.

[0066] The chip inductor 10 can incorporate a plurality of types of inductor units into the circuit network of the inductor circuit 40 by selectively fusing the fuses FS provided corresponding to the plurality of types of inductor units. In one example, when the fuses F1, F4, and F13 are fused, the inductor units L64, L32, and L1 can be incorporated into the circuit network of the inductor circuit 40 in a series-connected state. And each of the plurality of types of inductor units has an inductance value corresponding to the inductor element 50 included therein. Therefore, the inductance value of the inductor circuit 40 can be adjusted to a predetermined inductance value according to the number of inductor elements 50 included in the inductor circuit 40.

[0067] In addition, the plurality of types of inductor units include series inductor units in which the number of inductor elements 50 increases in a geometric progression such as 2, 4, 8, 16, 32, and 64 in which inductor elements 50 having equal inductance values are connected in series, and 2, 4, 8, 16, and 32 in which inductor elements 50 having equal inductance values are connected in parallel. Parallel inductor units in which the number of inductor elements 50 increases in a geometric progression. These series inductor units and parallel inductor units are connected in series in a state short-circuited by the fuse FS. Therefore, by selectively fusing the fuse FS, the overall inductance value of the circuit network of the inductor circuit 40 can be set to an arbitrary inductance value within a wide range from a small inductance value to a large inductance value.

[0068] [Operation of the First Embodiment] The operation of the chip inductor 10 of the first embodiment will be described. Generally, as a chip inductor, a configuration including a coil conductor is known. However, in a chip inductor in which a plurality of coil conductors are arranged, it is difficult to create a combined inductance based on series connection and parallel connection of the coil conductors due to the influence of mutual inductance between the coil conductors. Therefore, it is difficult to adjust the inductance with high precision.

[0069] In addition, as an inductor, an inductor using a thin film such as a ferromagnetic body, such as a spin Hall insulator or an insulator inductor, has been proposed. These inductors are formed between two electrodes and include a single thin film composed of a magnetic insulator. The inductor using a magnetic insulator has an inductance value that depends on the film thickness of the magnetic insulator. Therefore, it is conceivable to obtain an inductor having a desired inductance value by adjusting the film thickness of the magnetic insulator. However, if the film thickness cannot be controlled with high precision, variations will occur in the inductance value.

[0070] On the other hand, the inductor element 50 in the chip inductor 10 of the first embodiment includes a topological insulator 51 and a magnetic insulator 52 formed on the topological insulator 51. That is, the inductor element 50 is an inductor element using the spin dynamics effect. As a result, the inductor element 50 is less affected by the electromagnetic field around it, so mutual inductance does not occur between adjacent inductor elements 50. Thus, a synthetic inductance based on series connection and parallel connection of the inductor elements 50 can be created. That is, various synthetic inductances can be created by connecting a plurality of types of inductor units in series and in parallel. And by fusing the fuse FS provided in the inductor circuit 40, the synthetic inductance can be adjusted. Thereby, high-precision adjustment of the inductance can be performed.

[0071] Note that variations in the inductance value due to variations in the film thickness of the magnetic insulator may also occur in the chip inductor 10 of the first embodiment. That is, variations will occur in the inductance value of the manufactured inductor element 50 with respect to the inductance value of the inductor element 50 in the design. As a result, even if a plurality of types of inductor units are combined based on the inductance value of the inductor element 50 in the design, the inductance value of the inductor circuit 40 will vary with respect to the desired inductance value.

[0072] On the other hand, for example, the inductance value between the first electrode 31 and the second electrode 32 is measured in a state where the fuse FS is not blown. Then, based on the measurement result, the inductance value of the inductor circuit 40 is adjusted by changing the type of the inductor unit body to be combined by selectively blowing the fuse FS. Thereby, even if the film thickness of the magnetic insulator 52 varies due to, for example, the manufacturing process, the inductance value of the inductor circuit 40 can be easily adjusted to a desired inductance value.

[0073] [Effects of the First Embodiment] According to the chip inductor 10 of the first embodiment, the following effects can be obtained. (1-1) The chip inductor 10 includes a first electrode 31 and a second electrode 32 that are spaced apart from each other in the X direction, and an inductor circuit 40 that is disposed between the first electrode 31 and the second electrode 32 in the X direction and is electrically connected to the first electrode 31 and the second electrode 32. The inductor circuit 40 includes a plurality of inductor elements 50, a plurality of types of inductor unit bodies formed by electrically connecting one or more of the inductor elements 50, and a plurality of fuses FS provided corresponding to the inductor unit bodies individually and electrically separably connecting the inductor unit bodies to the inductor circuit 40. The inductor element 50 includes a topological insulator 51 and a magnetic insulator 52 provided on the topological insulator 51.

[0074] According to this configuration, since the inductor element 50 is an inductor element using the spin dynamics effect, mutual inductance does not occur between the inductor elements 50. Thereby, the inductance can be adjusted with high precision. Therefore, a chip inductor corresponding to the required inductance can be provided.

[0075] (1-2) The topological insulator 51 is formed of a thin film. The magnetic insulator 52 is formed of a thin film laminated on the topological insulator 51. According to this configuration, it is possible to reduce the height of the chip inductor as compared with a chip inductor including a coil conductor.

[0076] (1-3) The thickness TB of the magnetic insulator 52 is thinner than the thickness TA of the topological insulator 51. According to this configuration, the inductance of the inductor element 50 can be increased.

[0077] (1-4) A plurality of magnetic insulators 52 are formed on the topological insulator 51 while being separated from each other. According to this configuration, a common topological insulator 51 is provided for the plurality of inductor elements 50 in the inductor unit. Therefore, it is possible to reduce the number of components of the inductor unit.

[0078] (1-5) A plurality of types of inductor units are arranged on the same plane. According to this configuration, it is possible to reduce the height of the chip inductor 10 as compared with a configuration in which a plurality of types of inductor units are arranged at different positions in the Z direction.

[0079] (1-6) The topological insulator 51 and the fuse FS of the inductor element 50 are arranged on the same plane. According to this configuration, it is possible to reduce the height of the chip inductor 10 as compared with a configuration in which the topological insulator 51 and the fuse FS are arranged at different positions in the Z direction.

[0080] <Second Embodiment> With reference to FIGS. 12 to 14, the chip inductor 10 of the second embodiment will be described. In the chip inductor 10 of the second embodiment, the circuit configuration of the inductor circuit 40 is mainly different from that of the chip inductor 10 of the first embodiment. Hereinafter, differences from the chip inductor 10 of the first embodiment will be described in detail, and the same reference numerals will be given to the components common to the chip inductor 10 of the first embodiment, and the description thereof will be omitted.

[0081] FIG. 12 schematically shows the planar structure of the chip inductor 10 of the second embodiment. FIG. 13 schematically shows the connection configuration of a plurality of types of inductor units, a plurality of fuses FS, and a plurality of connection wirings CW. FIG. 14 schematically shows the circuit diagram of the chip inductor 10.

[0082] In the first embodiment, the inductor circuit 40 includes a configuration in which a plurality of types of inductor units are connected in series. On the other hand, in the second embodiment, the inductor circuit 40 includes a configuration in which a plurality of types of inductor units are connected in parallel.

[0083] As shown in FIG. 12, the connection mode of the inductor element 50 in the inductor circuit 40 of the second embodiment is different from that of the first embodiment. More specifically, the inductor circuit 40 of the chip inductor 10 includes a large number of inductor elements 50 arranged in a matrix on the substrate 20. In the large number of inductor elements 50, a maximum of eight inductor elements 50 are arranged along the row direction (X-axis direction). A maximum of 41 inductor elements 50 are arranged along the column direction (Y-axis direction). Then, by electrically connecting one to 128 of these large number of inductor elements 50, a plurality of types of inductor units are formed. The plurality of types of inductor units are connected in parallel by the connection wiring CW and the fuse FS. The inductor circuit 40 is configured such that when the fuse FS is cut, the inductor unit connected to the fuse FS is electrically separated from the circuit network. Note that the configurations of the large number of inductor elements 50, the connection wiring CW, and the fuse FS that constitute the inductor circuit 40 are the same as those in the first embodiment, and thus the description thereof is omitted.

[0084] On the other hand, in the second embodiment, the number and arrangement pattern of the connection wirings CW and the fuses FS are different from those in the first embodiment. More specifically, a plurality (22 in the second embodiment) of fuses FS are arranged at positions adjacent to the second electrode 32 in the X-axis direction and spaced apart from each other in the Y-axis direction. Each of the plurality of fuses FS is individually electrically connected to the first electrode 31. The connection wiring CW is arranged closer to the side surface 25 of the third substrate in the Y-axis direction. The connection wiring CW constitutes a common connection wiring for a plurality of types of inductor unit bodies.

[0085] As shown in FIG. 13, the inductor circuit 40 includes, as a plurality of types of inductor unit bodies, an inductor unit body L128, an inductor unit body L64, an inductor unit body L32, an inductor unit body L16, an inductor unit body L8, an inductor unit body L4, an inductor unit body L2, and an inductor unit body L1. These inductor unit bodies L128, L64, L32, L16, L8, L4, L2 are constituted by connecting a plurality of inductor elements 50 in series.

[0086] Further, the inductor circuit 40 includes, as a plurality of types of inductor unit bodies, an inductor unit body L / 2, an inductor unit body L / 4, an inductor unit body L / 8, and two inductor unit bodies L / 16. These inductor unit bodies L / 2, L / 4, L / 8, L / 16 are constituted by connecting a plurality of inductor elements 50 in parallel.

[0087] Next, the connection structure of the plurality of types of inductor unit bodies will be described. For convenience, the 22 fuses FS shown in FIG. 13 are referred to as F1 to F22 in order from the side surface 25 of the third substrate toward the side surface 26 of the fourth substrate.

[0088] The inductor unit L128 is connected to the fuse F1 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L128 is connected to the fuse F1. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L128 is constituted by the series connection of 128 inductor elements 50. In the second embodiment, the inductor unit L128 is constituted by one topological insulator 51 and 128 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51.

[0089] The inductor unit L64 is connected to the fuse F5 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L64 is connected to the fuse F5. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L64 is constituted by the series connection of 64 inductor elements 50. In the second embodiment, the inductor unit L64 is constituted by one topological insulator 51 and 64 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51.

[0090] The inductor unit L32 is connected to the fuse F6 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L32 is connected to the fuse F6. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L32 is constituted by the series connection of 32 inductor elements 50. In the second embodiment, the inductor unit L32 is constituted by one topological insulator 51 and 32 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51.

[0091] The inductor unit L16 is connected to the fuse F7 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L16 is connected to the fuse F7. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L16 is constituted by the series connection of 16 inductor elements 50. In the second embodiment, the inductor unit L16 is constituted by one topological insulator 51 and 16 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51.

[0092] The inductor unit L8 is connected to the fuse F8 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L8 is connected to the fuse F8. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L8 is constituted by the series connection of 8 inductor elements 50. In the second embodiment, the inductor unit L8 is constituted by one topological insulator 51 and 8 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51.

[0093] The inductor unit L4 is connected to the fuse F9 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L8 is connected to the fuse F9. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L4 is constituted by the series connection of 4 inductor elements 50. In the second embodiment, the inductor unit L4 is constituted by one topological insulator 51 and 4 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51.

[0094] The inductor unit L2 is connected to the fuse F10 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L2 is connected to the fuse F10. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L2 is constituted by the series connection of two inductor elements 50. In the second embodiment, the inductor unit L2 is constituted by one topological insulator 51 and two magnetic insulators 52 arranged apart from each other on the topological insulator 51.

[0095] The inductor unit L1 is connected to the fuse F11 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L1 is connected to the fuse F11. And the second end of the topological insulator 51 is connected to the connection wiring CW.

[0096] The inductor unit L / 2 is connected to the fuse F12 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 constituting the inductor unit L / 2 is connected to the fuse F12. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L / 2 is constituted by the parallel connection of two inductor elements 50. In the second embodiment, the inductor unit L / 2 is constituted by one topological insulator 51 and two magnetic insulators 52 arranged apart from each other on the topological insulator 51. The two magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the two magnetic insulators 52 are connected in parallel.

[0097] The inductor unit L / 4 is connected to the fuse F13 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 that constitutes the inductor unit L / 4 is connected to the fuse F12. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L / 4 is composed of a parallel connection of four inductor elements 50. In the second embodiment, the inductor unit L / 4 is composed of one topological insulator 51 and four magnetic insulators 52 that are arranged separately from each other on the topological insulator 51. The four magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the four magnetic insulators 52 are connected in parallel.

[0098] The inductor unit L / 8 is connected to the fuses F15, F16 and the connection wiring CW. In the second embodiment, the first end of the topological insulator 51 that constitutes the inductor unit L / 8 branches and is connected to the fuses F15, F16. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L / 8 is composed of a parallel connection of eight inductor elements 50. In the second embodiment, the inductor unit L / 8 is composed of one topological insulator 51 and eight magnetic insulators 52 that are arranged separately from each other on the topological insulator 51. The eight magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches so that the eight magnetic insulators 52 are connected in parallel. Here, as shown in FIG. 13, the fuses F14 to F16 are electrically connected to each other.

[0099] One of the two inductor units L / 16 is connected to fuses F21, F22 and connection wiring CW. In the second embodiment, the first end of the topological insulator 51 that constitutes the inductor unit L / 16 branches off and is connected to fuses F21, F22. And the second end of the topological insulator 51 is connected to the connection wiring CW. The inductor unit L / 16 is constituted by parallel connection of 16 inductor elements 50. In the second embodiment, the inductor unit L / 16 is constituted by one topological insulator 51 and 16 magnetic insulators 52 that are arranged separately from each other on the topological insulator 51. The 16 magnetic insulators 52 are connected in parallel. That is, the topological insulator 51 branches off so that the 16 magnetic insulators 52 are connected in parallel. Here, as shown in FIG. 13, fuses F17 to F22 are electrically connected to each other.

[0100] The remaining one of the two inductor units L / 16 is connected to the connection wiring CW and the first electrode 31. In the second embodiment, the first end of the topological insulator 51 that constitutes the inductor unit L / 16 is connected to the connection wiring CW. And the second end of the topological insulator 51 is connected to the first electrode 31. The configuration of this inductor unit L / 16 is the same as that of the inductor unit L / 16 connected to fuses F21, F22 and the connection wiring CW.

[0101] Note that two of the inductor units L128, L64, L32, L16, L8, L4, L2, L1, L / 2, L / 4, L / 8, and the inductor unit L / 16 connected to fuses F21, F22 are examples of the "first inductor unit" and the "second inductor unit", respectively. And, among fuses F1 to F22, the fuses FS corresponding to the "first inductor unit" and the "second inductor unit" are examples of the "first fuse" and the "second fuse", respectively.

[0102] The connection configuration of the above inductance unit, fuse FS, and connection wiring CW forms the circuit configuration of the inductor circuit 40 shown in FIG. 14. That is, in the inductor circuit 40, when all the fuses FS are not blown, it constitutes a series circuit of an inductor unit L / 16 connected to the first electrode 31 and a parallel circuit of 12 types of inductor units L / 16, L / 8, L / 4, L / 2, L1, L2, L4, L8, L16, L32, L64, L128.

[0103] And to each of the 12 types of inductor units other than the inductor unit L / 16 connected to the first electrode 31, a fuse FS is connected in series. As a result, in the chip inductor 10, according to the required inductance value, for example, the fuse FS is selectively blown by a laser beam. The inductor unit corresponding to the blown fuse FS, that is, the inductor unit connected in series to the blown fuse FS, is electrically separated from the inductor circuit 40. As a result, the inductance value of the chip inductor 10 is adjusted.

[0104] In this way, in the second embodiment, the chip inductor 10 can electrically separate a plurality of types of inductor units from the inductor circuit 40 by selectively blowing the fuses FS connected in series to the plurality of types of inductor units. And for each of the plurality of types of inductor units, the inductance value is determined according to the number of inductor elements 50 included therein. Therefore, the inductance value of the inductor circuit 40 can be adjusted to a predetermined inductance value according to the number of inductor elements 50 included in the inductor circuit 40.

[0105] In addition, the plurality of types of inductor units include series inductor units in which the number of inductor elements 50 having the same inductance value increases geometrically, such as 2, 4, 8, 16, 32, 64, and 128 inductor elements 50 connected in series, and parallel inductor units in which the number of inductor elements 50 having the same inductance value increases geometrically, such as 2, 4, 8, and 16 inductor elements 50 connected in parallel. These series inductor units and parallel inductor units are connected in parallel by the fuse FS. Therefore, by selectively blowing the fuse FS, the overall inductance value of the circuit network of the inductor circuit 40 can be set to an arbitrary inductance value with high precision. Note that according to the chip inductor 10 of the second embodiment, the same effects as those of the first embodiment can be obtained.

[0106] <Third Embodiment> Referring to FIGS. 15 to 18, the chip inductor 10 of the third embodiment will be described. In the chip inductor 10 of the third embodiment, the configuration of the inductor element is mainly different from that of the chip inductor 10 of the first embodiment. Hereinafter, the differences from the chip inductor 10 of the first embodiment will be described in detail, and the same reference numerals will be given to the components common to the chip inductor 10 of the first embodiment, and the description thereof will be omitted.

[0107] FIG. 15 shows an enlarged plan structure of a part of the inductor circuit 40 in the chip inductor 10 of the third embodiment. FIG. 16 schematically shows a cross-sectional structure obtained by cutting the chip inductor 10 along the line F16-F16 in FIG. 15. FIG. 17 shows an enlarged plan structure of a part of the first electrode 31, a part of the second electrode 32, a part of the inductor circuit 40, the fuse FS, the connection wiring CW, and the periphery thereof. FIG. 18 schematically shows a cross-sectional structure obtained by cutting the chip inductor 10 along the line F18-F18 in FIG. 17.

[0108] As shown in FIG. 15, the chip inductor 10 of the third embodiment includes a plurality of inductor elements 60 instead of a plurality of inductor elements 50 (see FIG. 2). The arrangement pattern of the plurality of inductor elements 60 is the same as the arrangement pattern of the plurality of inductor elements 50 of the first embodiment.

[0109] The plurality of types of inductor units include wirings 70 that connect the inductor elements 60. In one example, the wiring 70 connects the inductor elements 60 adjacent to each other in the X-axis direction. In the example shown in FIG. 15, at the end of the inductor unit in the X-axis direction, the wiring 70 connects the inductor elements 60 adjacent to each other in the Y-axis direction. Thereby, the inductor unit shown in FIG. 15 has a configuration in which a plurality of inductor elements 60 are connected in series by the wiring 70.

[0110] The inductor element 60 is an inductor using the spin dynamics effect. It can also be said that the inductor element 50 is an inductor using spintronics technology. In the third embodiment, the inductor element 60 is a self-exciting inductor. That is, the inductor element 60 is an element that exhibits an inductor function using a non-collinear magnetic structure such as a helical magnetic structure or a transverse conical magnetic structure.

[0111] The inductor element 60 includes a metal magnetic body 61. As the material constituting the metal magnetic body 61, for example, at least one or a plurality of gadolinium (Gd), ruthenium (Ru), Al, yttrium (Y), manganese (Mn), and tin (Sn) are appropriately selected. In one example, the material constituting the metal magnetic body 61 is Gd3Ru4Al 12 or YMn6Sn6 may be used. Note that the constituent material of the metal magnetic body 61 can be arbitrarily changed.

[0112] As shown in FIGS. 15 and 16, the metal magnetic body 61 is formed in a rectangular shape in a plan view, with the X-axis direction being the longitudinal direction and the Y-axis direction being the short side direction. The metal magnetic body 61 is composed of a thin film. The metal magnetic body 61 is formed on the insulating layer 27.

[0113] As shown in FIG. 16, the wiring 70 is disposed between adjacent metal magnetic bodies 61 in the X-axis direction. The wiring 70 is formed on the insulating layer 27. That is, the wiring 70 is disposed at the same position as the metal magnetic body 61 in the Z-axis direction. Therefore, it can be said that the wiring 70 and the inductor element 60 are disposed on the same plane. And it can be said that a plurality of types of inductor unit bodies constituted by the wiring 70 and the plurality of inductor elements 60 are disposed on the same plane.

[0114] The wiring 70 is connected to the metal magnetic body 61. In one example, the wiring 70 covers the end portion of the metal magnetic body 61 in the X-axis direction. The wiring 70 is constituted by a thin film. The wiring 70 is constituted by a material containing at least one of, for example, Al and Cu.

[0115] The protective layer 28 covers both the inductor element 60 (metal magnetic body 61) and the wiring 70. The protective layer 28 includes a portion covering the insulating layer 27 in a region where neither the inductor element 60 nor the wiring 70 is formed.

[0116] The thickness (film thickness) of the metal magnetic body 61 may be equal to or less than the thickness (film thickness) of the wiring 70. In one example, the thickness of the metal magnetic body 61 is thinner than the thickness of the wiring 70. The thickness of the metal magnetic body 61 may be equal to or less than the thickness of the first wiring film 33 (see FIG. 3) of the first electrode 31 and the second electrode 32. In one example, the thickness of the metal magnetic body 61 is thinner than the thickness of the first wiring film 33 of the first electrode 31 and the second electrode 32. The thickness of the wiring 70 may be equal to the thickness of the first wiring film 33. In one example, the thickness of the metal magnetic body 61 is about 10 nm.

[0117] As shown in FIG. 17, in a plan view, the connection structure between the fuse FS and the connection wiring CW and the plurality of types of inductor unit bodies is the same as that of the first embodiment shown in FIG. 10. On the other hand, in the second embodiment, both the fuse FS and the connection wiring CW are connected to the metal magnetic body 61.

[0118] As shown in FIG. 18, the fuse FS is composed of a thin film. The fuse FS is formed on the insulating layer 27. That is, the fuse FS is arranged at the same position as the wiring 70 in the Z-axis direction. In other words, the fuse FS and the wiring 70 are arranged on the same plane. Both the fuse FS and the connection wiring CW are covered by the protective layer 28.

[0119] [Effect of the Third Embodiment] According to the chip inductor 10 of the third embodiment, the following effects can be obtained. (3-1) The chip inductor 10 includes a first electrode 31 and a second electrode 32 arranged apart from each other in the X direction, and an inductor circuit 40 arranged between the first electrode 31 and the second electrode 32 in the X direction and electrically connected to the first electrode 31 and the second electrode 32. The inductor circuit 40 includes a plurality of inductor elements 60, a plurality of types of inductor unit bodies formed by electrically connecting one or more of the inductor elements 60, and a plurality of fuses FS provided corresponding to the inductor unit bodies individually and electrically separably connecting the inductor unit bodies to the inductor circuit 40. The inductor element 60 includes a metal magnetic body 61.

[0120] According to this configuration, since the inductor element 60 is an inductor element using the spin dynamics effect, mutual inductance does not occur between the inductor elements 60. Thereby, the inductance can be adjusted with high precision. Therefore, high-precision inductance in the chip inductor can be realized.

[0121] (3-2) The metal magnetic body 61 of the inductor element 60 is composed of a thin film. According to this configuration, the chip inductor 10 can be made thinner compared to a chip inductor including a coil conductor.

[0122] (3-3) The inductor element 60 and the wiring 70 are arranged on the same plane. According to this configuration, the chip inductor 10 can be made thinner compared to a configuration in which the inductor element 60 and the wiring 70 are arranged at different positions in the Z direction.

[0123] <Modification example> Each of the above embodiments can be implemented with the following modifications. Also, the following modification examples can be implemented in combination with each other within a range where there is no technical contradiction.

[0124] ·In the first and second embodiments, the plurality of inductor elements 50 constituting the inductor unit body had a common topological insulator 51, but the configuration of the inductor unit body is not limited to this. In one example, as shown in FIG. 19, the inductor unit body may be configured such that a plurality of inductor elements 50 are connected by wiring 80. More specifically, the topological insulators 51 of the respective inductor elements 50 are arranged separately from each other on the insulating layer 27. The wiring 80 is configured to connect adjacent topological insulators 51. The wiring 80 is arranged on the insulating layer 27. That is, it can be said that the inductor unit body and the wiring 80 are arranged on the same plane. Although not shown, since the fuse FS is also arranged on the insulating layer 27, it can be said that the wiring 80 and the fuse FS are arranged on the same plane.

[0125] In the example shown in FIG. 19, the length of the magnetic insulator 52 laminated on the topological insulator 51 in the X-axis direction is shorter than the length of the topological insulator 51 in the X-axis direction. The magnetic insulator 52 is arranged at the center of the topological insulator 51 in the X-axis direction. For this reason, both ends of the topological insulator 51 in the X-axis direction are exposed from the magnetic insulator 52. The wiring 80 is connected to both ends of the topological insulator 51 in the X-axis direction. In one example, the wiring 80 covers both ends of the topological insulator 51 in the X-axis direction.

[0126] · In the first and second embodiments, the inductor element 50 has a laminated structure of a topological insulator 51 and a magnetic insulator 52, but is not limited thereto. In one example, in the inductor element 50, a magnetic insulator may be formed by adding a magnetic element to the topological insulator 51. That is, instead of the topological insulator 51 and the magnetic insulator 52 being formed separately, a layer of the magnetic insulator 52 may be formed within the topological insulator 51.

[0127] · In the third embodiment, a plurality of types of inductor unit bodies may be connected in parallel as in the inductor circuit 40 of the second embodiment. · In the third embodiment, the inductor element 60 is not limited to a generative inductor and can be arbitrarily changed. In one example, the inductor element 60 is configured to exhibit an inductor by utilizing a combination of spin-orbit torque (SOT) and its reverse process (spin electromotive force process). In one example, as shown in FIG. 20, the metal magnetic body 61 of the inductor element 60 includes a magnetic body layer 62 and a non-magnetic body layer 63 laminated on the magnetic body layer 62.

[0128] The magnetic body layer 62 is formed of a thin film formed on the insulating layer 27. The magnetic body layer 62 is formed of any one of a ferromagnetic material, a ferrimagnetic material, and an antiferromagnetic material. The magnetic body layer 62 is formed of a material containing at least one of, for example, iron (Fe), cobalt (Co), nickel (Ni), boron (B), and Mn. In one example, the magnetic body layer 62 may be formed of a Ni-Fe alloy, a Co-Fe-B alloy, or the like. The magnetic body layer 62 may be formed of a laminated structure of a plurality of magnetic body films. The magnetic body film may contain at least one of Fe, Co, Ni, B, Mn, Pd, platinum (Pt), tantalum (Ta), and chromium (Cr). Note that the constituent material of the magnetic body layer 62 is not limited to the above materials and can be arbitrarily changed.

[0129] The non-magnetic layer 63 contains a heavy metal selected from W, Ta, Pd, Pt, and iridium (Ir). Note that, instead of the non-magnetic layer 63, an antiferromagnetic material may be used for the inductor element 60. The antiferromagnetic layer is an alloy containing a first element including at least one of Cr, Mn, Fe, Co, and Ni, and a second element including at least one of Ru, rhodium (Rh), silver (Ag), osmium (Os), Ir, Pt, and gold (Au). Note that the constituent material of the non-magnetic layer 63 is not limited to the above materials and can be arbitrarily changed. Also, the constituent material of the antiferromagnetic layer is not limited to the above materials and can be arbitrarily changed.

[0130] · In each embodiment, a plurality of types of inductor unit bodies may not be arranged on the same plane. That is, a plurality of types of inductor unit bodies may be arranged at different positions in the Z-axis direction.

[0131] · In each embodiment, a plurality of types of inductor unit bodies and the fuse FS may not be arranged on the same plane. That is, a plurality of types of inductor unit bodies and the fuse FS may be arranged at different positions in the Z-axis direction. Specifically, in the first and second embodiments, the topological insulator 51 and the fuse FS may not be arranged on the same plane. In the third embodiment, the ferromagnetic metal 61, the wiring 70, and the fuse FS may not be arranged on the same plane.

[0132] · In each embodiment, the connection wiring CW and the fuse FS may not be arranged on the same plane. That is, the connection wiring CW and the fuse FS may be formed in different arrangements in the Z-axis direction.

[0133] One or more of the various examples described in this specification can be combined within a technically consistent range. As used herein, the term "on" includes the meanings of "on" and "above" unless the context clearly indicates otherwise. Thus, for example, the expression "a first element is disposed on a second element" is intended that in some embodiments the first element may be in direct contact with the second element and disposed directly on the second element, while in other embodiments the first element may be disposed above the second element without contacting the second element. That is, the term "on" does not exclude a structure in which other elements are formed between the first element and the second element.

[0134] The Z-axis direction used in the present disclosure does not necessarily have to be the vertical direction and does not have to be completely coincident with the vertical direction. Accordingly, various structures according to the present disclosure are not limited to the "upper" and "lower" in the Z-axis direction described herein being the "upper" and "lower" in the vertical direction. For example, the X-axis direction may be the vertical direction, or the Y-axis direction may be the vertical direction.

[0135] <Supplementary Note> The technical ideas understandable from the present disclosure are described below. For the purpose of assisting understanding rather than limiting, the constituent elements described in the supplementary note are attached with the reference numerals of the corresponding constituent elements in the above embodiments. The reference numerals are shown as examples for assisting understanding, and the constituent elements described in each supplementary note should not be limited to the constituent elements indicated by the reference numerals.

[0136] [Supplementary Note 1] A first electrode (31) and a second electrode (32) disposed apart from each other in a first direction (X), An inductor circuit (40) disposed between the first electrode (31) and the second electrode (32) in the first direction (X) and electrically connected to the first electrode (31) and the second electrode (32), comprising, The inductor circuit (40) is a plurality of inductor elements (50), a plurality of types of inductor unit bodies formed by electrically connecting one or more of the inductor elements (50), A plurality of fuses (FS) provided corresponding to each of the inductor units and electrically separably connecting the inductor units to the inductor circuit (40); including The inductor element (50) a topological insulator (51); a magnetic insulator (52) provided on the topological insulator (51); including a chip inductor (10).

[0137] [Appendix 2] The topological insulator (51) is formed of a thin film, The magnetic insulator (52) is formed of a thin film laminated on the topological insulator (51). The chip inductor according to Appendix 1.

[0138] [Appendix 3] The thickness (TB) of the magnetic insulator (52) is thinner than the thickness (TA) of the topological insulator (51). The chip inductor according to Appendix 1 or 2.

[0139] [Appendix 4] The topological insulator (51) contains at least one of bismuth, antimony, selenium, and tellurium. The chip inductor according to any one of Appendices 1 to 3.

[0140] [Appendix 5] The magnetic insulator (52) contains an iron garnet containing a rare earth element. The chip inductor according to any one of Appendices 1 to 4.

[0141] [Appendix 6] The magnetic insulator (52) is formed by adding a magnetic element to the topological insulator (52). The chip inductor according to any one of Appendices 1 to 3.

[0142] [Appendix 7] The inductor unit includes a wiring (80) electrically connected to the inductor element (50). The wiring (80) is connected to the topological insulator (51) in a state separated from the magnetic insulator (52) in the inductor element (50). The chip inductor according to any one of Appendices 1 to 6.

[0143] [Appendix 8] The topological insulator (51) also serves as the wiring (80). The chip inductor according to Appendix 7.

[0144] [Appendix 9] A first electrode (31) and a second electrode (32) arranged separately from each other in the first direction (X), An inductor circuit (40) arranged between the first electrode (31) and the second electrode (32) in the first direction (X) and electrically connected to the first electrode (31) and the second electrode (32), including The inductor circuit (40) includes A plurality of inductor elements (60), A plurality of types of inductor units formed by electrically connecting one or more of the inductor elements (60), A plurality of fuses (FS) provided corresponding to each of the inductor units and electrically separably connecting the inductor units to the inductor circuit (40), including The inductor element (60) includes a ferromagnetic metal (61). Chip inductor (10).

[0145] [Appendix 10] The inductor unit includes a wiring (70) electrically connected to the inductor element (60). The wiring (70) is connected to the ferromagnetic metal (61) in the inductor element (60). The chip inductor described in Supplementary Note 9.

[0146] [Supplementary Note 11] The metal magnetic body (61) a magnetic body layer (62), a non-magnetic body layer (63) or an antiferromagnetic body layer laminated on the magnetic body layer (62), and includes The chip inductor described in Supplementary Note 9 or 10.

[0147] [Supplementary Note 12] The non-magnetic body layer (63) contains a heavy metal selected from tungsten, tantalum, palladium, platinum, and iridium The chip inductor described in Supplementary Note 11.

[0148] [Supplementary Note 13] The antiferromagnetic body layer a first element containing at least one of chromium, manganese, iron, cobalt, and nickel, a second element containing at least one of ruthenium, rhodium, silver, osmium, iridium, platinum, and gold, and is an alloy containing The chip inductor described in Supplementary Note 11.

[0149] [Supplementary Note 14] The inductor circuit (40) includes a configuration in which the plurality of types of inductor unit bodies are connected in series with each other. The chip inductor described in any one of Supplementary Notes 1 to 13.

[0150] [Supplementary Note 15] The plurality of types of inductor unit bodies a first inductor unit body connected to the first electrode (31), a second inductor unit body connected in series to the first inductor unit body and electrically connected to the second electrode (32), and includes The plurality of fuses (FS) A first fuse connected in parallel with the first inductor unit and electrically connected to the second electrode (32), A second fuse connected in parallel with the second inductor unit and electrically connected to the second electrode (32), including The chip inductor according to Supplementary Note 14.

[0151] [Supplementary Note 16] The inductor circuit (40) includes a configuration in which the plurality of types of inductor units are connected in parallel with each other. The chip inductor according to any one of Supplementary Notes 1 to 13.

[0152] [Supplementary Note 17] The plurality of types of inductor units include a first inductor unit and a second inductor unit connected in parallel with each other. The plurality of fuses (FS) A first fuse provided between the first inductor unit and the second electrode (32) and electrically connected to the first inductor unit and the second electrode (32), A second fuse provided between the second inductor unit and the second electrode (32) and electrically connected to the second inductor unit and the second electrode (32), including The chip inductor according to Supplementary Note 16.

[0153] [Supplementary Note 18] The plurality of types of inductor units are arranged on the same plane. The chip inductor according to any one of Supplementary Notes 1 to 17.

[0154] [Supplementary Note 19] The wiring (70 / 80) and the fuse (FS) are arranged on the same plane. The chip inductor according to Supplementary Note 7 or 8.

[0155] [Supplementary Note 20] including a substrate (20) that supports the first electrode (31), the second electrode (32), and the inductor circuit (40) The chip inductor according to any one of Appendices 1 to 19.

[0156] [Appendix 21] a first electrode (31) and a second electrode (32) arranged to be spaced apart from each other in a first direction (X); an inductor circuit (40) disposed between the first electrode (31) and the second electrode (32) in the first direction (X) and electrically connected to the first electrode (31) and the second electrode (32); including the inductor circuit (40) includes a plurality of inductor elements (50 / 60); a plurality of types of inductor unit bodies formed by electrically connecting one or more of the inductor elements (50 / 60); a plurality of fuses (FS) provided corresponding to the inductor unit bodies individually and electrically separably connecting the inductor unit bodies to the inductor circuit; including the inductor element (50 / 60) is an inductor element using the spin dynamics effect Chip inductor (10).

[0157] The above description is merely illustrative. Those skilled in the art can recognize that there are more possible combinations and substitutions other than the components and methods (manufacturing processes) listed for the purpose of explaining the technology of the present disclosure. The present disclosure is intended to include all alternatives, modifications, and changes within the scope of the present disclosure including the claims.

Explanation of Reference Numerals

[0158] 10... Chip inductor 20... Substrate 21... First substrate surface 22... Second substrate surface 23 to 26... First to fourth substrate side surfaces 27…Insulating layer 28…Protective layer 29…Resin layer 31…First electrode 32…Second electrode 33…First wiring film 34…Second wiring film 35…Electrode part 40…Inductor circuit 50…Inductor element 51…Topological insulator 52…Magnetic insulator 53…Straight part 53A…Arrangement part 53B…Element connection part 54…Connection part 60…Inductor element 61…Metamagnetic 62…Magnetic layer 63…Non-magnetic layer 70…Wiring 80…Wiring L128,L64,L32,L16,L8,L4,L2,L1…Inductor unit L / 2,L / 4,L / 8,L / 16,L / 32,L / 64…Inductor unit FS…Fuse CW…Connection wiring TA…Thickness of topological insulator TB…Thickness of magnetic insulator

Claims

1. A first electrode and a second electrode disposed apart from each other in a first direction, An inductor circuit disposed between the first electrode and the second electrode in the first direction and electrically connected to the first electrode and the second electrode, comprising: The inductor circuit includes: A plurality of inductor elements, A plurality of types of inductor units formed by electrically connecting one or more of the inductor elements, A plurality of fuses provided corresponding to the inductor units individually and electrically and separably connecting the inductor units to the inductor circuit, comprising: The inductor element includes: A topological insulator, A magnetic insulator provided on the topological insulator, including: A chip inductor.

2. The topological insulator is formed of a thin film, The magnetic insulator is formed of a thin film laminated on the topological insulator The chip inductor according to claim 1.

3. The thickness of the magnetic insulator is thinner than the thickness of the topological insulator The chip inductor according to claim 1.

4. The magnetic insulator is formed by adding a magnetic element to the topological insulator The chip inductor according to claim 1.

5. The inductor unit includes a wiring electrically connected to the inductor element, The wiring is connected to the topological insulator in a state separated from the magnetic insulator in the inductor element The chip inductor according to claim 1.

6. The topological insulator also serves as the wiring The chip inductor according to claim 5.

7. A first electrode and a second electrode disposed apart from each other in a first direction, An inductor circuit disposed between the first electrode and the second electrode in the first direction and electrically connected to the first electrode and the second electrode, comprising: The inductor circuit includes: A plurality of inductor elements, A plurality of types of inductor units formed by electrically connecting one or more of the inductor elements, A plurality of fuses provided corresponding to the inductor units individually and electrically and separably connecting the inductor units to the inductor circuit, comprising: The inductor element includes a metal magnetic material A chip inductor.

8. The inductor unit includes a wiring electrically connected to the inductor element, The wiring is connected to the metal magnetic body in the inductor element. The chip inductor according to claim 7.

9. The metal magnetic body is a magnetic layer, a non-magnetic layer or an antiferromagnetic layer laminated on the magnetic layer, and includes The chip inductor according to claim 7.

10. The inductor circuit includes a configuration in which the plurality of types of inductor unit bodies are connected in series with each other. The chip inductor according to claim 1.

11. The plurality of types of inductor unit bodies are a first inductor unit body connected to the first electrode, a second inductor unit body connected in series to the first inductor unit body and electrically connected to the second electrode, and includes The plurality of fuses are a first fuse connected in parallel to the first inductor unit body and electrically connected to the second electrode, a second fuse connected in parallel to the second inductor unit body and electrically connected to the second electrode, and includes The chip inductor according to claim 10.

12. The inductor circuit includes a configuration in which the plurality of types of inductor unit bodies are connected in parallel with each other. The chip inductor according to claim 1.

13. The plurality of types of inductor unit bodies include a first inductor unit body and a second inductor unit body connected in parallel to each other, The plurality of fuses are a first fuse provided between the first inductor unit body and the second electrode and electrically connected to the first inductor unit body and the second electrode, a second fuse provided between the second inductor unit body and the second electrode and electrically connected to the second inductor unit body and the second electrode, and includes The chip inductor according to claim 12.

14. The plurality of types of inductor unit bodies are arranged on the same plane. The chip inductor according to claim 1.

15. The wiring and the fuses are arranged on the same plane. The chip inductor according to claim 5.

16. including the first electrode, the second electrode, and a substrate that supports the inductor circuit The chip inductor according to any one of claims 1 to 15.

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