Method of manufacturing semiconductor device

The method addresses the complexity and cost issues in semiconductor device manufacturing by ensuring solder film thickness and connection reliability through a simplified manufacturing process that does not require inverting members, using upper wire piece bonding and reflow techniques.

JP2025103508APending Publication Date: 2025-07-09MINEBEA POWER SEMICON DEVICE INC
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Patent Information

Application Number
JP2023220945
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-27
Publication Date
2025-07-09

AI Technical Summary

Technical Problem

Existing semiconductor device manufacturing processes face complications and increased costs due to the need for complex equipment when arranging wire pieces in both upper and lower solder joints, particularly when inverting members, which is not feasible with simple and inexpensive equipment.

Method used

A method involving upper wire piece bonding, upper solder sheet mounting, lead frame mounting, and reflow processes to ensure solder film thickness and connection reliability without requiring equipment that inverts members.

Benefits of technology

Ensures appropriate solder film thickness and connection reliability at the solder connection portion using relatively simple and inexpensive manufacturing equipment, even when dealing with warped semiconductor elements.

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Abstract

To provide a method of manufacturing a semiconductor device that can secure connection reliability at a solder connection part by disposing a wire piece in the solder connection part above a semiconductor element to secure an appropriate solder film thickness, even in the case of using a manufacturing facility that is relatively simple and inexpensive without a function of reversing a member up side down.SOLUTION: A method of manufacturing a semiconductor device performs: an upper wire piece bonding step of bonding a wire piece to an upper surface of an upper solder sheet; an upper solder sheet mounting step of mounting a bonding upper solder sheet to the upper surface of a semiconductor element; a lead frame mounting step of mounting a lead frame to the bonding upper solder sheet; and a reflow step of heating and fusing the bonding upper solder sheet and electrically connecting the semiconductor element with the lead frame.SELECTED DRAWING: Figure 9
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Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device in which a wire piece is disposed in solder of a solder joint.

Background Art

[0002] As a semiconductor device in which a wire piece is disposed in solder of a solder joint, the semiconductor device of Patent Document 1 is known. In this semiconductor device, in paragraph 0067 of the same document, "the semiconductor element 30 has an emitter electrode 31 on the surface and a collector electrode 32 on the back surface, and the areas of the emitter electrode 31 and the collector electrode 32 are different. In such a configuration, warpage may occur in different directions depending on the product type due to the film thickness, film formation method, chip size, electrode area, etc. For example, in one product type, warpage convex toward the heat sink 40 side, that is, convex downward occurs, and in another product type, warpage convex toward the side opposite to the heat sink 40, that is, convex upward occurs. Even with the same element size (chip size), for example, due to different film formation methods (film configurations), the direction of warpage may be different. Furthermore, due to variations in manufacturing conditions, the direction of warpage may be different even in the same product type." Considering the warpage of the semiconductor element described above, in paragraph 0068 of the same document, "In the present embodiment, a plurality of wire pieces 90 are provided at the solder joint between the collector electrode 32 of the semiconductor element 30 and the heat sink 40. The wire pieces 90 are fixed to the mounting surface 40a of the heat sink 40 which is the first opposing surface, and protrude toward the back surface side of the semiconductor element 30 which is the second opposing surface." With such a configuration, in paragraph 0069 of the same document, "As shown in FIG. 10, when the semiconductor element 30 has downward convex warpage, the minimum film thickness of the solder 80 can be ensured by the wire pieces 90a arranged so as to surround the element center 30c. For example, the semiconductor element 30 can be supported by three or more wire pieces 90a arranged so as to surround the element center 30c. Thereby, the inclination of the semiconductor element 30 can be suppressed, and the minimum film thickness can be ensured over the entire surface." Such effects as described above and various effects described in paragraphs 0070 to 0072 and the like are obtained.

[0003] Also, regarding the wire piece, Paragraph 0051 of the same document states that "the wire piece 90 has a predetermined height to ensure the minimum film thickness of the solder. Even when a plurality of wire pieces 90 are in contact with the second opposing surface, the height of the wire piece 90 is set so that the shortest distance between the first opposing surface and the second opposing surface is equal to or greater than the minimum film thickness. The minimum film thickness is the minimum thickness required to ensure the desired connection reliability. The height of the wire piece 90 is, for example, a value obtained by adding a margin to the minimum film thickness."

[0004] Thus, in the semiconductor device of Patent Document 1, by providing a wire piece with a predetermined height in the solder of the solder connection portion, even when the semiconductor element is warped, the minimum film thickness of the solder is ensured, and the connection reliability at the solder connection portion is ensured.

Prior Art Document

Patent Document

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] Here, when manufacturing a semiconductor device in which a wire piece is disposed in the lower solder on the heat sink side as shown in FIG. 9 of Patent Document 1, as shown in FIG. 10 of the same document, it is necessary to mount the semiconductor element on a heat sink having a wire piece fixed to the upper surface. Therefore, when manufacturing this semiconductor device, the steps of (1) mounting the heat sink on the heat sink jig on the mounter device, (2) mounting and fixing the wire piece to the heat sink, and (3) mounting the semiconductor element to the heat sink may be sequentially performed. Therefore, the semiconductor device of FIG. 9 of the same document could be manufactured using relatively simple and inexpensive manufacturing equipment having a function of sequentially mounting an upper object on a lower object.

[0007] On the other hand, when manufacturing a semiconductor device in which a wire piece is also arranged inside the upper solder on the terminal side as shown in FIG. 22 of Patent Document 1, in addition to the above steps (1) to (3), (4) a step of mounting a terminal on a terminal jig, (5) a step of mounting and fixing a wire piece to the terminal, (6) a step of removing the terminal from the terminal jig and inverting its top and bottom, and (7) a step of mounting the terminal on a semiconductor element need to be added. In this case, since it is necessary to add at least a device for performing the step (6), problems such as complication and high cost of manufacturing equipment occur.

[0008] Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can arrange a wire piece in the solder joint above the semiconductor element to appropriately ensure the solder film thickness and ensure the connection reliability at the solder connection part even when using relatively simple and inexpensive manufacturing equipment that does not have a function of inverting the top and bottom of a member.

Means for Solving the Problems

[0009] To solve the above problems, a method for manufacturing a semiconductor device according to the present invention includes an upper wire piece bonding step of bonding a wire piece to the upper surface of an upper solder sheet, an upper solder sheet mounting step of mounting a bonding upper solder sheet on the upper surface of a semiconductor element, a lead frame mounting step of mounting a lead frame on the bonding upper solder sheet, and a reflow step of heating and melting the bonding upper solder sheet to electrically connect the lead frame and the semiconductor element.

Effects of the Invention

[0010] According to the method for manufacturing a semiconductor device of the present invention, even when using relatively simple and inexpensive manufacturing equipment that does not have a function of inverting the top and bottom of a member, a wire piece can be arranged in the solder joint above the semiconductor element to appropriately ensure the solder film thickness and ensure the connection reliability at the solder connection part.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6A

Figure 6B

Figure 6C

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Mode for Carrying Out the Invention

[0012] Hereinafter, with reference to the drawings, embodiments of the method for manufacturing a semiconductor device of the present invention will be described.

Embodiment

[0013] First, with reference to FIGS. 1 to 9, a method for manufacturing a semiconductor device according to Embodiment 1 of the present invention will be described.

[0014] FIG. 1 is an external perspective view of a semiconductor device 100 manufactured by the manufacturing method of this embodiment, and FIG. 2 is an exploded perspective view of the semiconductor device 100 of this embodiment. As shown in these figures, the semiconductor device 100 has a lead frame 1, a wire piece 2, an upper solder sheet 3, a chip 4, a lower solder sheet 5, and an insulating substrate 6. Each will be sequentially described below.

[0015] The chip 4 is a semiconductor element corresponding to the function of the semiconductor device 100. For example, if the semiconductor device 100 is a semiconductor power module, it is a chip with built-in IGBT, a chip with built-in diode, etc. Note that this chip 4 has an upward or downward convex warp due to the circumstances described in paragraph 0067 of Patent Document 1 and the like.

[0016] The insulating substrate 6 is a rigid body in which metal wiring portions 6b of a desired number and shape are arranged on the upper surface (front surface) of an insulating board 6a made of ceramics or the like.

[0017] The lead frame 1 is a rigid body made of copper or the like for passing a large current, and includes a plurality of terminals 1a protruding laterally for electrically connecting to the metal wiring portion 6b on the upper surface of the insulating substrate 6, and a convex portion 1b protruding downward for electrically connecting to the upper surface of the chip 4.

[0018] The upper solder sheet 3 is a solder alloy sheet for joining the lower surface of the convex portion 1b of the lead frame 1 and the upper surface of the chip 4. The solder alloy used here is, for example, Sn-Cu solder.

[0019] The wire piece 2 is a spacer for ensuring an appropriate solder film thickness on the entire surface of the convex portion 1b of the lead frame 1 and the opposing portion of the chip 4. Before reflow, as shown in FIG. 2, the wire piece 2 is in a state of being bonded to the upper surface of the upper solder sheet 3. During reflow, it sinks into the molten upper solder and supports the lead frame 1. After reflow, it is fixed within the solidified upper solder. Therefore, after the completion of the semiconductor device 100, a solder film thickness greater than or equal to the height of the wire piece 2 can be ensured between the convex portion 1b of the lead frame 1 and the chip 4, and the connection reliability between the lead frame 1 and the chip 4 can be ensured. The diameter of the wire piece 2 may be appropriately selected according to the solder film thickness required for the solder joint. For example, it is 400 μm.

[0020] The lower solder sheet 5 is a solder alloy sheet for joining the lower surface of the chip 4 and the upper surface of the metal wiring portion 6b, and the lower surface of the terminal 1a of the lead frame 1 and the upper surface of the metal wiring portion 6b. The solder alloy used here is, for example, Sn-Cu-Sb solder.

[0021] <Flowchart showing the manufacturing procedure> FIG. 3 is a flowchart showing the procedure of the manufacturing method of this embodiment. In each step described later, well-known manufacturing equipment such as a bonding device, a cutter device, a mounter device, and a reflow device may be appropriately used.

[0022] <<Step S1>> In step S1, a first intermediate product 10 composed of the wire piece 2 and the upper solder sheet 3 is manufactured using a bonding device, a cutter device, etc.

[0023] Figure 4 is a flowchart showing the details of step S1. First, in step S11, the tip of the wire drawn from the wire reel is bonded to the upper surface of the upper solder sheet 3 using a method such as ultrasonic bonding. Then, in step S12, the bonded wire tip is cut and separated from the wire on the wire reel side. By repeating these processes, the first intermediate product 10 with the desired number of wire pieces 2 bonded to the desired positions on the upper surface of the upper solder sheet 3 can be manufactured.

[0024] Figure 5 is a cross-sectional view showing an overview of the manufacturing process of the first intermediate product 10. Here, an example of the process of bonding two wire pieces 2 to the upper surface of the upper solder sheet 3 is illustrated. The reason why the shape of the wire cross-section changes from circular to substantially triangular before and after bonding is that as a result of ultrasonic bonding the wire to the upper solder sheet 3 while pressing with a V-shaped groove provided in the tool of the bonding apparatus, the wire cross-section shape is deformed following the tool shape.

[0025] Figures 6A to 6C are examples of a top view and a cross-sectional view of the first intermediate product 10 manufactured in step S1. Figure 6A is a top view of the upper solder sheet 3 showing an arrangement example of the wire pieces 2 when using a chip 4 having a downward convex warp, and shows a state where the wire pieces 2 are bonded near each corner of the rectangular upper solder sheet 3.

[0026] Also, Figure 6B is a cross-sectional view at cross-section X of Figure 6A, and Figure 6C is a cross-sectional view at cross-section Y of Figure 6A. In step S12 described above, since the wire is separated into a bonding side and a wire reel side on the upper solder sheet 3, one end side of the wire piece 2 is in the state at the time of wire cutting, that is, it is bent upward in the wire reel direction as shown in Figure 6B. Further, as shown in Figure 6C, the cross-sectional shape of the wire piece 2 in cross-section Y is substantially triangular as a result of ultrasonic bonding.

[0027] <<Step S2>> In step S2, a second intermediate product 20 composed of a chip 4, a lower solder sheet 5, and an insulating substrate 6 is manufactured using a mounter device, a reflow device, or the like.

[0028] Figure 7 is a flowchart showing the details of step S2. As shown here, in step S21, the lower solder sheet 5 is mounted on the metal wiring portion 6b of the insulating substrate 6. Then, in step S22, the chip 4 is mounted on the upper surface of the lower solder sheet 5. Further, in step S23, the lower solder sheet 5 is melted by reflow processing to integrate the three components.

[0029] Figure 8 is a side view showing an overview of the manufacturing process of the second intermediate product 20. Here, the process of mounting four lower solder sheets 5 on the upper surfaces of the four metal wiring portions 6b of the insulating substrate 6 (step S21) and the process of mounting two chips 4 on the upper surfaces of two lower solder sheets 5 (step S22) are illustrated together.

[0030] <<Step S3>> In step S3, the first intermediate product 10 is mounted on the second intermediate product 20 using a mounter device or the like. Figure 9(a) is a cross-sectional view corresponding to the process of this step.

[0031] <<Step S4>> In step S4, the lead frame 1 is mounted on the first intermediate product 10 using a mounter device or the like. Figure 9(b) is a cross-sectional view corresponding to the process of this step.

[0032] <<Step S5>> In step S5, the product of step S4 is heated using a reflow device. Figure 9(c) shows a cross-sectional view before reflow, and Figure 9(d) shows a cross-sectional view after reflow.

[0033] As is obvious from FIG. 9(c), before reflow, since the lead frame 1 is supported by the wire pieces 2 on the upper solder sheet 3, the terminal 1a of the lead frame 1 and the lower solder sheet 5 below it are not in contact, and the convex portion 1b of the lead frame 1 and the upper solder sheet 3 below it are also not in contact.

[0034] During reflow, since the upper solder sheet 3 melts, the wire pieces 2 that receive the load of the lead frame 1 move downward within the melted upper solder and stop in a state of contacting the chip 4. That is, the distance between the convex portion 1b of the lead frame 1 and the chip 4 during reflow is maintained at a predetermined value or more by a plurality of wire pieces 2 sandwiched between the two, and the distance between the terminal 1a of the lead frame 1 and the metal wiring portion 6b is also maintained at a predetermined value or more by the wire pieces 2. And the space between the convex portion 1b of the lead frame 1 and the chip 4 is filled with the melted upper solder, and the space between the terminal 1a of the lead frame 1 and the metal wiring portion 6b is filled with the melted lower solder.

[0035] After reflow, an upper solder layer having a film thickness of at least the diameter of the wire piece 2 or more is disposed between the convex portion 1b of the lead frame 1 and the chip 4. For example, even if the chip 4 has a downward convex warp, by using the upper solder sheet 3 on which the wire pieces 2 are arranged as shown in FIG. 6A, an upper solder layer having a film thickness greater than desired can also be disposed on the upper parts of the four corners of the chip 4 warped upward. Thereby, in the completed semiconductor device 100, the connection reliability at the solder connection portion between the convex portion 1b of the lead frame 1 and the chip 4 can be appropriately ensured.

[0036] <Effects of this Example> By the manufacturing method of the semiconductor device of this example described above, even when using a relatively simple and inexpensive manufacturing facility that does not have the function of inverting the upper and lower parts of the members, wire pieces are arranged in the upper solder joint of the semiconductor element to appropriately ensure the solder film thickness, and the connection reliability at the solder connection portion can be ensured.

Example

[0037] Next, with reference to FIGS. 10 and 11, a method for manufacturing a semiconductor device according to Embodiment 2 of the present invention will be described. Note that duplicate descriptions of the common points with Embodiment 1 will be omitted.

[0038] In Embodiment 1, the wire piece 2 was not bonded to the upper surface of the lower solder sheet 5, but in this embodiment, the wire piece 2 is also bonded to the upper surface of the lower solder sheet 5. Therefore, instead of the step S2 of Embodiment 1 illustrated in FIG. 7, in this embodiment, a step S2 as shown in FIG. 10 is performed.

[0039] That is, first, in step S20a of FIG. 10, a wire is bonded to the upper surface of the lower solder sheet 5. Next, in step S20b, the bonded wire is cut and separated. Note that since steps S20a and S20b correspond to the process in which the upper solder sheet 3 in the descriptions of steps S11 and S12 in FIG. 4 is read as the lower solder sheet 5, the details of steps S20a and S20b will be omitted.

[0040] Thereafter, by performing steps S21 to S23 equivalent to those in FIG. 7 of Embodiment 1, a semiconductor device 100 having a cross-sectional structure as illustrated in FIG. 11 can be manufactured. As a result, the solder film thickness between the terminal 1a of the lead frame 1 and the metal wiring portion 6b of the insulating substrate 6, and the solder film thickness between the chip 4 and the metal wiring portion 6b of the insulating substrate 6 can also be appropriately set, and the connection reliability of each solder connection portion can be ensured.

Embodiment

[0041] Next, with reference to FIGS. 12 and 13, a method for manufacturing a semiconductor device according to Embodiment 3 of the present invention will be described. Note that duplicate descriptions of the common points with the above embodiments will be omitted.

[0042] In the reflow process (step S5) of FIG. 3 of Example 1, the wire piece 2 was submerged in the molten solder using the load of the lead frame 1. However, in the reflow process of this example, the total load of the lead frame 1 and the weight 7 is used to submerge the wire piece 2 in the molten solder and correct the deformation of the wire piece 2 that occurred when separating the wire piece 2 from the wire reel.

[0043] As illustrated in FIG. 6B, one end of the wire piece 2 immediately after bonding may be lifted. In that case, a gap equal to or larger than the diameter of the wire piece 2 (for example, 400 μm) is formed between the convex portion 1b of the lead frame 1 and the chip 4. When bonding a plurality of wire pieces 2 onto the upper solder sheet 3, there is variation in the amount of lift of one end of each wire piece 2. If reflow is performed while leaving this variation uncorrected, the lead frame 1 after reflow may be inclined.

[0044] Therefore, in this example, instead of the flowchart of FIG. 3 of Example 1, a semiconductor device is manufactured according to the flowchart of FIG. 12. That is, a step S4a of mounting the weight 7 on the lead frame 1 is provided between step S4 and step S5. As a result, in step S5, reflow is performed with the total load of the lead frame 1 and the weight 7 applied to the wire piece 2, so the following benefits can be obtained.

[0045] That is, as shown in FIG. 13(a), even if one end of the wire piece 2 on the upper solder sheet 3 is lifted when the first intermediate product 10 is manufactured, as shown in FIG. 13(b), due to the total load of the lead frame 1 and the weight 7 applied to the wire piece 2 during reflow, the wire piece 2 is corrected to be flat, so the inclination of the lead frame 1 after reflow can be suppressed.

[0046] Needless to say, after reflow in step S5, the weight 7 may be removed from above the lead frame 1. Also, the weight of the weight 7 may be appropriately set according to the diameter and number of the wire pieces 2. For example, when the diameter of the wire piece 2 is 400 μm, the number of wire pieces on the upper solder sheet 3 is 4, and the weight of the lead frame is 5 g, the weight of the weight 7 is 10 g or more (for example, 20 g).

Explanation of Reference Numerals

[0047] 100 Semiconductor device 1 Lead frame 1a Terminal 1b Protrusion 2 Wire piece 3 Upper solder sheet 4 Chip 5 Lower solder sheet 6 Insulating substrate 6a Insulating board 6b Metal wiring portion 7 Weight 10 First intermediate product 20 Second intermediate product

Claims

1. A method for manufacturing a semiconductor device, comprising: an upper wire piece bonding step of bonding a wire piece to the upper surface of an upper solder sheet; an upper solder sheet mounting step of mounting a bonding upper solder sheet on the upper surface of a semiconductor element; a lead frame mounting step of mounting a lead frame on the bonding upper solder sheet; a reflow step of heating and melting the bonding upper solder sheet to electrically connect the lead frame and the semiconductor element; A method for manufacturing a semiconductor device, characterized by performing the above steps.

2. In the method for manufacturing a semiconductor device according to Claim 1, the upper wire piece bonding step includes: an ultrasonic bonding step of ultrasonically bonding the tip of a wire drawn from a wire reel to the upper surface of the upper solder sheet; a wire piece separation step of separating the tip of the wire from the wire on the wire reel side; A method for manufacturing a semiconductor device, characterized by comprising the above steps.

3. In the method for manufacturing a semiconductor device according to Claim 1, in the reflow step, the wire piece receiving the load of the lead frame moves downward within the molten upper solder, and stops in contact with the semiconductor element, so that the distance between the lead frame and the semiconductor element is maintained at a predetermined value or more, and the space between the lead frame and the semiconductor element is filled with the molten upper solder; After the reflow step, an upper solder layer having a thickness equal to or greater than the diameter of the wire piece is disposed between the lead frame and the semiconductor element. A method for manufacturing a semiconductor device, characterized by this.

4. In the method for manufacturing a semiconductor device according to Claim 1, prior to the upper solder sheet mounting step, a lower wire piece bonding step of bonding a wire piece to the upper surface of a lower solder sheet; a lower solder sheet mounting step of mounting a bonding lower solder sheet on the upper surface of an insulating substrate; a semiconductor element mounting step of mounting the semiconductor element on the upper surface of the bonding lower solder sheet, and in the reflow step, the bonding lower solder sheet is heated and melted to electrically connect the semiconductor element and the insulating substrate. A method for manufacturing a semiconductor device, characterized by this.

5. In the method for manufacturing a semiconductor device according to Claim 4, In the reflow process, the wire piece that has received the load of the lead frame and the chip moves downward within the melted solder, and stops while being in contact with the insulating substrate, so that the distance between the semiconductor element and the insulating substrate is maintained at a predetermined value or more, and the space sandwiched between the semiconductor element and the insulating substrate is filled with the melted solder. After the reflow process, a solder layer having a film thickness equal to or greater than the diameter of the wire piece is disposed between the semiconductor element and the insulating substrate. A method of manufacturing a semiconductor device is characterized by this.

6. In the method of manufacturing a semiconductor device according to claim 1, Between the lead frame mounting process and the reflow process, there is a weight mounting process of mounting a weight on the lead frame. In the reflow process, the wire piece is flattened and corrected by the total load of the lead frame and the weight. A method of manufacturing a semiconductor device is characterized by this.

Citation Information

Patent Citations

  • Semiconductor device

    JP2021061393A