Manufacturing method of semiconductor device and semiconductor device

Abstract

To provide a semiconductor device manufacturing method capable of manufacturing a small semiconductor device.SOLUTION: A semiconductor device manufacturing method includes a covering material preparation step 10 of preparing a covering material AS for covering a semiconductor body WF, an identification member preparation step 20 of preparing an identification member WK having an identifier ID formed thereon, and a lamination step 50 of laminating the identification member WK onto the semiconductor body WF via the covering material AS to form a semiconductor device SD. In the covering material preparation step 10, a covering material AS capable of adhering to both the semiconductor body WF and the identification member WK is prepared, and in the lamination step 50, the identification member WK is laminated onto the semiconductor body WF with the identification member WK in direct contact with the covering material AS.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device.

Background Art

[0002] A method for manufacturing a semiconductor device having an identifier and a semiconductor device having an identifier are known (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When laminating the small piece 11 (identifying member) on the IC chip 20 (semiconductor body) in the semiconductor package (semiconductor device) manufactured by the manufacturing method described in Patent Document 1, an adhesive 13 is required between the sealing resin (coating material) covering the semiconductor body and the identifying member. On the other hand, since such a semiconductor device is required to be miniaturized in units of μm (micrometer) or nm (nanometer), the semiconductor device manufactured by the manufacturing method described in Patent Document 1 has disadvantages in terms of miniaturization.

[0005] An object of the present invention is to provide a method for manufacturing a semiconductor device capable of manufacturing a small semiconductor device. Another object of the present invention is to provide a small semiconductor device.

Means for Solving the Problems

[0006] The present invention employs the configuration described in the claims.

Effects of the Invention

[0007] According to the present invention, a coating material that can adhere to both the semiconductor body and the identification member is used, and the identification member is laminated on the semiconductor body in a state where the identification member is in direct contact with the coating material. Therefore, there is no need for an adhesive between the identification member and the coating material, and a small semiconductor device can be manufactured. Further, according to the present invention, since the identification member is laminated on the semiconductor body in a state where the identification member is in direct contact with the coating material, there is no adhesive between the identification member and the coating material, so that a small semiconductor device can be obtained.

Brief Description of the Drawings

[0008]

Figure 1

Embodiments for Carrying Out the Invention

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In addition, the X-axis, Y-axis, and Z-axis in the present embodiment are in a perpendicular relationship with each other. The X-axis and Y-axis are axes in a predetermined plane, and the Z-axis is an axis perpendicular to the predetermined plane. Further, in the present embodiment, based on the case viewed from the front direction in FIG. 1(A), when the direction is indicated without specifying the figure, "up" is the arrow direction of the Z-axis, "down" is the reverse direction, "left" is the arrow direction of the X-axis, "right" is the reverse direction, "front" is the arrow direction of the Y-axis, and "rear" is the reverse direction.

[0010] As shown in FIGS. 1(A) to 1(F), the method for manufacturing a semiconductor device according to the present invention includes a coating material preparation step 10 (see FIG. 1(A)) of preparing an adhesive sheet AS as a coating material for covering a semiconductor wafer WF as a semiconductor body (hereinafter also simply referred to as "wafer"), an identifier member preparation step 20 (see FIG. 1(B)) of preparing an identifier member WK on which an identifier ID such as a character or a symbol is formed, a thinning step 30 (see FIG. 1(C)) of thinning the thickness in a direction intersecting one surface WK1 of the identifier member WK, a narrowing step 40 (see FIG. 1(D)) of narrowing the width in the direction of one surface WK1 of the identifier member WK, a lamination step 50 (see FIG. 1(E)) of laminating the identifier member WK on the wafer WF via the adhesive sheet AS to form a semiconductor device SD, and an energy application step 60 (see FIG. 1(F)) of applying heat HA as predetermined energy to the adhesive sheet AS. Note that the wafer WF in the present embodiment is composed of a silicon semiconductor.

[0011] In the coating material preparation step 10, an adhesive sheet AS that can adhere to both the wafer WF and the identifier member WK is prepared. Note that the adhesive sheet AS in the present embodiment has a property of causing curing as a change peculiar to the heat HA by the application of the heat HA.

[0012] As shown in FIG. 1(B), in the identifier member preparation step 20, the main body of the identifier member WK is engraved by a laser irradiation device LD as an identifier former, and the identifier member WK having the identifier ID formed on one surface WK1 is prepared (see FIG. 1(G)). Note that the main body constituting the identifier member WK in the present embodiment is composed of the same material as the wafer WF.

[0013] In the thinning step 30, as shown in FIG. 1(C), the other surface WK2 of the identifier member WK is ground by a grinder WS as a grinding machine to thin the thickness of the identifier member WK. Note that in the thinning step 30 of the present embodiment, the thickness of the identifier member WK is thinned so that the thickness of the identifier member WK becomes 30 μm.

[0014] In the narrowing process 40, as shown in FIG. 1(D), the identification member WK is cut along the cutting planned line CL1 (see FIGS. 1(C) and (G)) by the rotary cutter RC as a cutting member, so that the width of the identification member WK is narrowed. In the narrowing process 30 of the present embodiment, the width of the identification member WK is narrowed so that the widths in the left - right direction and the front - rear direction become 100 μm.

[0015] In the lamination process 50, as shown in FIG. 1(E), the identification member WK is laminated on the wafer WF in a state where the identification member WK is in direct contact with the adhesive sheet AS by interposing the adhesive sheet AS between one surface WF1 of the wafer WF and one surface WK1 of the identification member WK and bonding them (see FIGS. 1(H) and (I)). In the lamination process 40 of the present embodiment, the identification member WK is laminated on the adhesive sheet AS such that the surface on which the identifier ID is formed faces the adhesive sheet AS side.

[0016] In the energy application process 60, as shown in FIG. 1(F), heat HA is applied to the adhesive sheet AS by the hot air blower HF, so that the adhesive sheet AS is cured.

[0017] In the semiconductor device SD formed by the above processes, the identifier ID is seen through from the other surface WK2 side of the identification member WK or the other surface WF2 side of the wafer WF. Thus, for example, operations such as forgery detection and authenticity determination of the semiconductor device SD are performed, or various processes to be performed on the semiconductor device SD are determined.

[0018] According to the above - described embodiment, since an adhesive sheet AS that can adhere to both the wafer WF and the identification member WK is used, and the identification member WK is laminated on the wafer WF in a state where the identification member WK is in direct contact with the adhesive sheet AS, it becomes unnecessary to provide an adhesive between the identification member WK and the adhesive sheet AS, and a small - sized semiconductor device SD can be manufactured.

[0019] The means and steps in the present invention are not limited in any way as long as they can perform the operations, functions, or steps described for those means and steps. Moreover, they are not limited to the components and steps of merely one embodiment shown in the above-described embodiment. For example, the step of preparing the identification member may be any step as long as it is a step of preparing an identification member on which an identifier is formed, and it is not limited as long as it is within the technical scope in light of the common general knowledge in the art at the time of filing (the same applies to other means and steps).

[0020] Note that the semiconductor device SD of the present invention is, as shown in FIGS. 1(H) to (L), an identification member WK on which an identifier ID is formed is laminated on a wafer WF or a semiconductor chip (hereinafter, also simply referred to as a "chip") CP as a semiconductor body via an adhesive sheet AS as a covering material, and the identification member WK is laminated on the wafer WF or the chip CP in a state of being in direct contact with the adhesive sheet AS, and it may be formed through the above-described embodiment and various steps exemplified below. According to such a semiconductor device SD, since the identification member WK is laminated on the wafer WF or the chip CP in a state of being in direct contact with the adhesive sheet AS, the semiconductor device SD can be made small because there is nothing to bond the identification member WK and the adhesive sheet AS to each other.

[0021] In the step 10 of preparing the covering material, an adhesive sheet AS as a covering material for covering the chip CP as a semiconductor body may be prepared, or as the covering material, for example, an adhesive sheet, an adhesive tape, a pressure-sensitive adhesive tape, an adhesive, a pressure-sensitive adhesive, a resin material, a rubber material, a metal material, solder, wax, varnish, etc., may be prepared as long as it can adhere to both the semiconductor body and the identification member WK. A solid substance may be prepared, a liquid substance may be prepared, a gel-like substance may be prepared, a covering material larger than the semiconductor body may be prepared, a covering material smaller than the semiconductor body may be prepared, or a covering material having the same size as the semiconductor body may be prepared. The covering material preparation step 10 may be carried out between the identification member preparation step 20 and the thinning step 30, or between the thinning step 30 and the narrowing step 40, or between the narrowing step 40 and the lamination step 50. In the process of manufacturing the semiconductor device SD in which the identification member WK is laminated on the semiconductor body in a state where the identification member WK is in direct contact with the covering material, it may be carried out at any stage as long as it is possible to prepare the covering material at the timing.

[0022] In the identification member preparation step 20, for example, a cutting member such as a cutter blade or high-pressure water may be used, a grinding member such as an end mill or grindstone may be used, an etching technique such as wet etching or dry etching may be used to form an identifier ID on the main body constituting the identification member WK. Or, as an identifier former, an inkjet printer, a relief printing press, an intaglio printing press, a lithographic printing press, silk printing, screen printing, a thermal printer, a thermal transfer printer, a dot impact printer, an exposure device, a engraving machine, an etching device, a coloring device, etc., may be adopted. Or, an identifier ID may be formed on the main body constituting the identification member WK by printing, printing, printing, transfer, exposure, engraving, etching, corrosion, coloring, discoloration, etc. For example, any identifier ID such as letters, numbers, symbols, figures, pictures, patterns, scratches, holes, etc. may be formed. An identifier ID that can be identified by a combination of letters and symbols may be formed. An identifier ID that can be identified by the arrangement or font of letters and symbols may be formed. An identifier ID that can be identified by encrypted letters or encrypted symbols may be formed. For example, as shown in FIG. 1(M), an identifier ID may be formed by a combination of the letter EL by engraving and the letter IL by inkjet printing. For example, an identifier ID may be formed by appropriately combining a symbol by engraving, a figure by printing, a number by inkjet printing, a pattern by end mill processing, etc. For example, an identifier ID may be formed only by a picture by engraving, only by letters by printing, only by symbols by inkjet printing, only by numbers by end mill processing, etc. For example, as shown in the enlarged view of FIG. 1(M), an identifier ID that can be identified by the degree of wear of the irregular contour in the letter EL, etc. by engraving may be formed. For example, as shown in the enlarged view of FIG. 1(M), an identifier ID that can be identified by the degree of bleeding of the irregular ink in the letter IL, etc. by inkjet printing may be formed. For example, as shown in the enlarged view of FIG. 1(M), an identifier ID that can be identified by irregular scattered marks SM, etc. caused by the scattering of ink by inkjet printing may be formed. The identifier ID may be formed only on one surface WK1 of the identification member WK, or may be formed only on the other surface WK2 of the identification member WK.The identifier ID may be formed on both the one surface WK1 and the other surface WK2 of the identification member WK, or one identifier ID may be formed on one identification member WK, or a plurality of identifier IDs may be formed on one identification member WK. The identification member preparation step 20 may be carried out before the coating material preparation step 10, or may be carried out between the thinning step 30 and the narrowing step 40, or may be carried out between the narrowing step 40 and the lamination step 50, or may be carried out between the lamination step 50 and the energy application step 60, or may be carried out after the energy application step 60. As long as it is possible to prepare the identification member WK at the timing during the process of manufacturing the semiconductor device SD in which the identification member WK is laminated on the semiconductor body in a state of being in direct contact with the coating material, it may be carried out at any stage. In the identification member preparation step 20, an identification member WK with the identifier ID formed in advance as described above may be prepared without forming the identifier ID on a predetermined member, or an identification member WK with some identifier ID formed in advance may be used, and the identifier ID as described above may be further formed on the identification member WK by an identifier forming machine to prepare the identification member WK.

[0023] In the thinning step 30, as a grinding machine, an electric file, a sander, a slicing device, an electric cutter, a shearing device, a press, a polishing device, an etching device, etc. may be adopted, and the thickness of the identification member WK may be reduced by cutting, slicing, punching, polishing, dissolving, or etching. The thickness of the identification member WK may be reduced from one surface WK1 side of the identification member WK, or from the other surface WK2 side of the identification member WK, or from both the one surface WK1 side and the other surface WK2 side of the identification member WK. The thickness of the identification member WK may be reduced so that it becomes smaller than 30 μm, such as 300 nm or 10 μm, or may be reduced so that it becomes larger than 30 μm, such as 100 μm or 1 mm. The size and shape are not limited. The thinning process 30 may be carried out before the coating material preparation process 10, may be carried out between the coating material preparation process 10 and the identification member preparation process 20, may be carried out between the narrowing process 40 and the lamination process 50, may be carried out between the lamination process 50 and the energy application process 60, or may be carried out after the energy application process 60. In the process of manufacturing the semiconductor device SD in which the identification member WK is laminated on the semiconductor body in a state where the identification member WK is in direct contact with the coating material, it may be carried out at any stage as long as it is possible to thin the thickness of the identification member WK, may be carried out by the manufacturing method of the present invention, or may not be carried out.

[0024] In the narrowing process 40, as the cutting member, an electric file, a sander, a slicing device, an electric cutter, a shearing device, a press, a polishing device, an etching device, etc. may be adopted, and the width of the identification member WK may be narrowed by shaving, cutting, punching, polishing, melting, or etching. Alternatively, the width of the identification member WK may be narrowed from one surface WK1 side of the identification member WK, or from the other surface WK2 side of the identification member WK, or from both the one surface WK1 side and the other surface WK2 side of the identification member WK. A bottomed groove may be formed along the cutting planned line CL1 before the thinning process 30 is carried out, and when the thinning process 30 is carried out, the width in the direction of one surface WK1 of the identification member WK may be narrowed by thinning until reaching the groove. A fragile layer may be formed along the cutting planned line CL1 before the thinning process 30 is carried out, and cracks may be introduced into the fragile layer by vibration during the implementation of the thinning process 30, so that the width in the direction of one surface WK1 of the identification member WK may be narrowed. The width of the identification member WK may be narrowed so that the width in the left-right direction and the front-back direction becomes smaller than 100 μm, such as 0.5 μm or 50 μm, or the width of the identification member WK may be narrowed so that it becomes larger than 100 μm, such as 500 μm or 3 mm. The width of the identification member WK may be narrowed so that the width in the left-right direction is the same as the width in the front-back direction, or the width of the identification member WK may be narrowed so that the width in the left-right direction is different from the width in the front-back direction. The width of the identification member WK may be narrowed into any shape, such as a circular, elliptical, triangular, pentagonal, or other polygonal shape, or any other arbitrary shape, and the size and shape are not limited. The narrowing process 40 may be carried out before the coating material preparation process 10, may be carried out between the coating material preparation process 10 and the identification member preparation process 20, may be carried out between the identification member preparation process 20 and the thinning process 30, may be carried out between the lamination process 50 and the energy application process 60, or may be carried out after the energy application process 60. In the process of manufacturing the semiconductor device SD in which the identification member WK is laminated on the semiconductor body in a state where the identification member WK is in direct contact with the coating material, it may be carried out at any stage as long as it is possible to narrow the width of the identification member WK, and it may or may not be carried out by the manufacturing method of the present invention.

[0025] In the lamination step 50, as shown by the two-dot chain line in FIG. 1(E), the identification member WK may be laminated on the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS with the adhesive sheet AS interposed between one surface CP1 of the chip CP and one surface WK1 of the identification member WK. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS with the adhesive sheet AS interposed between one surface WF1, CP1 of the wafer WF or the chip CP and the other surface WK2 of the identification member WK. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS with the adhesive sheet AS interposed between the other surface WF2, CP2 of the wafer WF or the chip CP and one surface WK1 of the identification member WK. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS with the adhesive sheet AS interposed between the other surface WF2, CP2 of the wafer WF or the chip CP and the other surface WK2 of the identification member WK. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS that covers all or part of one surface WF1, CP1 of the wafer WF or the chip CP. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS that covers all or part of the other surface WF2, CP2 of the wafer WF or the chip CP. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS that covers all or part of one surface WF1, CP1 and all or part of the other surface WF2, CP2 of the wafer WF or the chip CP. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS that covers all or part of one surface WF1, CP1 and all or part of the side surface of the wafer WF or the chip CP. Alternatively, the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS that covers all or part of the other surface WF2, CP2 and all or part of the side surface of the wafer WF or the chip CP.The identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact, or the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with an adhesive sheet AS covering all of one surface WF1, all of the other surface WF2, and all of the side surfaces of the wafer WF, or the identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with an adhesive sheet AS covering all of one surface CP1, all of the other surface CP2, and all of the side surfaces of the chip CP. The identification member WK may be laminated on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the adhesive sheet AS covering any surface of the wafer WF or the chip CP. After covering the wafer WF or the chip CP with the adhesive sheet AS, the identification member WK may be directly adhered to the adhesive sheet AS and then laminated on the wafer WF or the chip CP. After directly adhering the identification member WK to the adhesive sheet AS, the wafer WF or the chip CP may be covered with the adhesive sheet AS and the identification member WK may be laminated on the wafer WF or the chip CP. At the same time as covering the wafer WF or the chip CP with the adhesive sheet AS, the identification member WK may be directly adhered to the adhesive sheet AS and then laminated on the wafer WF or the chip CP., In the stacking process 50, as the coating material, for example, a liquid adhesive, a liquid adhesive agent, or a liquid resin material is adopted, and they are sprayed or sprayed onto the wafer WF, the chip CP, or the identification member WK, and the identification member WK may be stacked on the wafer WF or the chip CP in a state where the identification member WK is in direct contact with the coating material. Alternatively, as shown in FIGS. 1(H) and (J), the identification member WK may be stacked on the wafer WF or the chip CP in a state where one identification member WK is in direct contact with one adhesive sheet AS. Alternatively, as shown in the upper part of FIG. 1(I) and FIG. 1(K), a plurality of identification members WK may be stacked on the wafer WF or the chip CP in a state where the plurality of identification members WK are in direct contact with one adhesive sheet AS. Alternatively, as shown in the lower part of FIG. 1(I) and FIG. 1(L), a plurality of identification members WK may be stacked on the wafer WF or the chip CP in a state where the plurality of identification members WK are in direct contact with a plurality of adhesive sheets AS respectively. Alternatively, the identification member WK may be stacked only on one side or the other side of the wafer WF or the chip CP in a state where one or more identification members WK are in direct contact with one or more adhesive sheets AS. Alternatively, the identification member WK may be stacked on both one side and the other side of the wafer WF or the chip CP in a state where one or more identification members WK are in direct contact with one or more adhesive sheets AS. The stacking process 50 may be carried out between the coating material preparation process 10 and the identification member preparation process 20, or between the identification member preparation process 20 and the thinning process 30, or between the thinning process 30 and the narrowing process 40, or may be carried out in the latter stage of the energy application process 60. In the process of manufacturing the semiconductor device SD in which the identification member WK is stacked on the semiconductor body in a state where the identification member WK is in direct contact with the coating material, it may be carried out at any stage as long as it is possible to stack the identification member WK on the semiconductor body through the coating material. In the lamination step 50, when the identification member WK is laminated on the wafer WF via the adhesive sheet AS, as shown in FIGS. 1(E) and 1(F), the adhesive sheet AS may enter entirely inside the printed identifier ID, or may enter partially inside the printed identifier ID, or may not enter at all inside the printed identifier ID. As shown in FIGS. 1(E) and 1(F), a part of the identification member WK may be buried in the adhesive sheet AS, or the entire identification member WK may be buried in the adhesive sheet AS, or the identification member WK may not be buried in the adhesive sheet AS. The identification member WK on the adhesive sheet AS may be covered with a cover member such as a material equivalent to the coating material, a sheet different from the coating material, an adhesive, or the like.

[0026] In the energy application step 60, as the predetermined energy, any energy such as electromagnetic waves such as ultraviolet rays, infrared rays, visible light, sound waves, X-rays or gamma rays may be applied, a heating medium such as hot water or hot air may be applied, or a cooling medium such as cold water or cold air may be applied. As long as the energy-specific change can be caused in the coating material in consideration of the characteristics, properties, nature, material, composition and configuration of the coating material, any energy may be applied to the coating material. The energy application step 60 may be carried out between the coating material preparation step 10 and the identification member preparation step 20, or between the identification member preparation step 20 and the thinning step 30, or between the thinning step 30 and the narrowing step 40, or between the narrowing step 40 and the lamination step 50. In the process of manufacturing the semiconductor device SD in which the identification member WK is laminated on the semiconductor body in a state where the identification member WK is in direct contact with the coating material, it may be carried out at any stage as long as it is possible to apply the predetermined energy to the adhesive sheet AS, and it may or may not be carried out by the manufacturing method of the present invention.

[0027] The main body constituting the identification member WK may be made of the same material as that constituting the semiconductor main body, or may be made of a material different from that constituting the semiconductor main body. In addition to materials such as silicon semiconductors and compound semiconductors, it may be made of any material such as metal, glass, pottery, wood, resin, etc. The coating material may be any material that can adhere to both the semiconductor main body and the identification member WK, such as an adhesive sheet, an adhesive tape, a pressure-sensitive adhesive tape, an adhesive, a pressure-sensitive adhesive, a resin material, a rubber material, a metal material, solder, wax, varnish, etc. It may be a solid substance, a liquid substance, or a gel-like substance. It may be larger than the semiconductor main body, smaller than the semiconductor main body, or the same size as the semiconductor main body. It may have a shape other than a circular shape, such as a polygon such as a triangle or a pentagon, or an ellipse, etc. It may also be a material that does not cause a change specific to the given energy when the given energy is applied. The change specific to the given energy caused by the coating material may be any change, such as curing, softening, shrinking, expanding, vaporizing, liquefying, solidifying, discoloring, oxidizing, permeating, fixing, decreasing adhesive force or increasing adhesive force, etc. The wafer WF may have an orientation flat or a V-notch indicating the orientation formed on the outer edge, or may not have an orientation flat or a V-notch formed on the outer edge. The circuit may be formed on one surface WF1, or may be formed on the other surface WF2, or may be formed on both one surface WF1 and the other surface WF2, or may not have a circuit formed on both one surface WF1 and the other surface WF2. The chip CP may be one obtained by cutting the wafer WF along the cut line CL2, or may not be one obtained by cutting along the cut line CL2. The circuit may be formed on one surface CP1, or may be formed on the other surface CP2, or may be formed on both one surface CP1 and the other surface CP2, or may not have a circuit formed on both one surface WF1 and the other surface WF2. The semiconductor body may be thinned from a thickness such as 1 mm or 750 μm to a thickness such as 100 μm or 10 μm and employed in the stacking process 50, or a semiconductor body having a thickness such as 2 mm or 500 μm may be employed in the stacking process 50 and thinned to a thickness such as 150 μm or 20 μm by performing a semiconductor thinning process in the subsequent stage of the stacking process 50. Various processes for the semiconductor device SD may include an installation process of installing the semiconductor device SD on another object, an affixing process of printing or marking on the semiconductor device SD, a conveyance process of conveying the semiconductor device SD, a cutting process or a grinding process of the semiconductor device SD, an inspection or cleaning of the semiconductor device SD, or any other process.

[0028] The semiconductor device SD as shown in FIG. 1(H) may be a semiconductor device SD with an adhesive sheet AS attached to the chip CP by being cut along the cut line CL2, or it may not be cut. The semiconductor device SD as shown in the upper part of FIG. 1(I) may be a semiconductor device SD as shown in FIG. 1(J) by being cut along the cut line CL2, or it may not be cut. The semiconductor device SD as shown in the lower part of FIG. 1(I) may or may not be cut along the cut line CL2.

[0029] In the present invention, the material, type, shape, etc. of the identification member WK, the coating material, and the semiconductor body are not particularly limited. For example, the identification member WK, the coating material, and the semiconductor body may have various shapes such as circular, elliptical, polygonal shapes like triangular or quadrangular, or other shapes. The coating material may have an adhesive form such as pressure-sensitive adhesiveness or heat-sensitive adhesiveness. When a heat-sensitive adhesive coating material is employed, it may be adhered by an appropriate method such as providing heating means like an appropriate coil heater or the heating side of a heat pipe for heating the coating material. Further, such an adhesive sheet as the coating material may be, for example, a single-layer one consisting only of an adhesive layer, a two-layer one with a base material and an adhesive layer laminated, a three-layer or more-layer one with one or more intermediate layers laminated between the base material and the adhesive layer, a three-layer or more-layer one with one or more cover layers laminated on the upper surface of the base material, one in which the base material, intermediate layer, or cover layer is detachably provided, a single-layer double-sided adhesive sheet consisting only of an adhesive layer, a double-sided adhesive sheet with adhesive layers laminated on both outermost surfaces of one or more intermediate layers, or any other type. Note that the coating material may be any arbitrary sheet, film, tape, etc., such as an information description label, a decorative label, a protective sheet, a dicing tape, a die attach film, a die bonding tape, a resin sheet for forming a recording layer, etc. Also, the semiconductor body may be any semiconductor such as a silicon semiconductor, a compound semiconductor, a diamond semiconductor, etc.

Explanation of Reference Numerals

[0030] 10... Coating Material Preparation Step 20... Identification Member Preparation Step 30... Thinning Step 40... Narrowing Step 50... Laminating Step 60... Energy Application Step AS... Adhesive Sheet (Coating Material) CP... Semiconductor Chip (Semiconductor Body) HA... Heat (Predetermined Energy) ID... Identifier SD... Semiconductor Device WF... Semiconductor Wafer (Semiconductor Body) WK... Identification Member WK1... One Side

Claims

1. A coating material preparation step of preparing a coating material for coating a semiconductor body, An identification member preparation step of preparing an identification member on which an identifier is formed, A lamination step of laminating the identification member on the semiconductor body via the coating material to form a semiconductor device, and In the coating material preparation step, a coating material that can adhere to both the semiconductor body and the identification member is prepared, In the lamination step, the identification member is laminated on the semiconductor body in a state where the identification member is in direct contact with the coating material. A method for manufacturing a semiconductor device, characterized by this.

2. In the lamination step, the identification member is laminated on the coating material so that the identifier is on the coating material side. The method for manufacturing a semiconductor device according to Claim 1, characterized by this.

3. A thinning step of thinning the thickness in a direction intersecting one surface of the identification member is performed. The method for manufacturing a semiconductor device according to Claim 1 or Claim 2, characterized by this.

4. A narrowing step of narrowing the width in one surface direction of the identification member is performed. The method for manufacturing a semiconductor device according to Claim 1 or Claim 2, characterized by this.

5. The coating material has a property of causing a change specific to the predetermined energy by applying the predetermined energy, An energy application step of applying the predetermined energy to the coating material is performed. The method for manufacturing a semiconductor device according to Claim 1 or Claim 2, characterized by this.

6. In a semiconductor device in which an identification member on which an identifier is formed is laminated on a semiconductor body via a coating material, The semiconductor device, characterized in that the identification member is laminated on the semiconductor body in a state where the identification member is in direct contact with the coating material.

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