Random number generation device

Abstract

To provide a random number generation device with which it is possible to generate random numbers while not increasing a circuit area and suppressing power consumption.SOLUTION: A random number generation device 100 comprises: a variable reference voltage generation unit 120 for generating a variable reference voltage; a voltage controlled oscillation unit 130 for oscillating based on the variable reference voltage; and an output unit 140 for latching the output of the voltage controlled oscillation unit 130 and generating a random number. The voltage controlled oscillation unit 130 includes a single ring oscillator 132, and the ring oscillator 132 changes its oscillation frequency in accordance with a change in the variable reference voltage.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a random number generator, and more particularly to a random number generator that generates random numbers using a single ring oscillator.

Background Art

[0002] True random numbers are required in the fields of information processing, communication, cryptography, and security. For this reason, various proposals have been made as random number generators. Regarding the generation of this type of random number, random number generators are proposed in Patent Documents 1 and 2 below.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Documents 1 and 2 above, in order to generate a random number with excellent randomness, a plurality of ring oscillators with different oscillation frequencies are used, and the exclusive logical sum of the outputs of the plurality of ring oscillators is taken.

[0005] However, using a plurality of ring oscillators causes a new problem of an increase in circuit area and power consumption.

[0006] For this reason, it has been desired to generate a random number with excellent randomness while suppressing the circuit area and power consumption.

[0007] An object of the present invention is to provide a random number generator capable of generating random numbers while suppressing the circuit area and power consumption.

Means for Solving the Problem

[0008] The random number generation device according to the present invention includes a variable reference voltage generation unit that generates a variable reference voltage, a voltage-controlled oscillation unit that oscillates based on the variable reference voltage, and an output unit that latches the output of the voltage-controlled oscillation unit to generate a random number. The voltage-controlled oscillation unit has a single ring oscillator, and the ring oscillator changes the oscillation frequency in response to a change in the variable reference voltage.

[0009] The random number generation device according to the present invention further includes a clock generation unit that generates a clock pulse. The variable reference voltage generation unit includes a counter and a DA converter. The counter counts the clock pulses to generate a count output, and the DA converter generates a variable reference voltage according to the count output. The output unit latches the output of the voltage-controlled oscillation unit based on the timing of the clock pulses.

[0010] In the random number generation device according to the present invention, the counter alternately repeats counting up and counting down the clock pulses to generate a count output.

[0011] In the random number generation device according to the present invention, the variable reference voltage generation unit includes a relaxation oscillation circuit, and the relaxation oscillation circuit generates a variable reference voltage by relaxation oscillation.

[0012] The random number generation device according to the present invention includes a first random number generation device and a second random number generation device. The first random number generation device includes a variable reference voltage generation unit that generates a variable reference voltage by relaxation oscillation of a relaxation oscillation circuit, a voltage-controlled oscillation unit that changes an oscillation frequency according to a change in the variable reference voltage by a single ring oscillator, and an output unit that latches the output of the voltage-controlled oscillation unit to generate a random number and supplies it to the second random number generation device. The second random number generation device includes a variable reference voltage generation unit that generates a variable reference voltage based on the random number supplied from the first random number generation device, a voltage-controlled oscillation unit that changes an oscillation frequency according to a change in the variable reference voltage by a single ring oscillator, and an output unit that latches the output of the voltage-controlled oscillation unit to generate a random number.

Effect of the Invention

[0013] In the random number generation device according to the present invention, since the voltage-controlled oscillation unit changes the oscillation frequency by a single ring oscillator according to the changing variable reference voltage from the variable reference voltage generation unit, compared with a conventional random number generation device using a plurality of ring oscillators, it is possible to generate random numbers while reducing the circuit area and suppressing power consumption.

Brief Description of the Drawings

[0014]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Best Mode for Carrying Out the Invention

[0015] Hereinafter, an embodiment of the random number generator 100 of the present invention will be described with reference to the drawings. In each figure, the same parts are denoted by the same reference numerals.

[0016] Embodiment 1. First, the random number generator 100 in Embodiment 1 will be described with reference to FIGS. 1 to 4. FIG. 1 is a configuration diagram showing the configuration of the random number generator 100 according to Embodiment 1. FIG. 2 is a waveform diagram showing the signal waveforms of each part of the random number generator 100 according to Embodiment 1. FIG. 3 is a waveform diagram showing the signal waveforms of each part of the random number generator 100 according to Embodiment 1. FIG. 4 is a waveform diagram showing the counting state of the counter in the random number generator 100 according to Embodiment 1.

[0017] [Configuration of Random Number Generator 100] The random number generator 100 mainly includes a clock generation unit 110, a variable reference voltage generation unit 120, a voltage-controlled oscillator unit 130, and an output unit 140.

[0018] The clock generation unit 110 generates the necessary clock pulses for each part. The clock generation unit 110 supplies the generated clock pulses to the variable reference voltage generation unit 120 and the output unit 140. The variable reference voltage generation unit 120 mainly includes a counter 121, a DA converter 122, an FET 123, an FET 124, and a resistor R. The FET (Field Effect Transistor) 123 is a diode-connected P-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The FET 124 is an N-type MOSFET connected to the FET 123 and acts as a current source together with the resistor R.

[0019] The voltage-controlled oscillator section 130 includes an FET 131 and a ring oscillator 132. The FET 131 is a P-type MOSFET and acts as a bias generation section that generates a bias by voltage-current conversion. The ring oscillator 132 is configured as a single ring oscillator as an oscillator. The ring oscillator 132 is composed of odd-numbered NOT gates, and shows a configuration composed of five NOT gates as an example.

[0020] The output section 140 includes a waveform shaping section 141, a frequency division section 142, and an N-bit latch section 143. The waveform shaping section 141 shapes a waveform such as a sine wave into a rectangular wave. The frequency division section 142 divides an input signal and outputs it. The N-bit latch section 143 latches at the timing of a clock pulse and determines the logic. All of the above clock generation section 110, variable reference voltage generation section 120, voltage-controlled oscillator section 130, and output section 140 can be manufactured by semiconductor technology.

[0021] [Operation of the random number generator 100] The clock generation section 110 supplies a clock pulse (in FIG. 2(a)) with a predetermined clock frequency (for example, 10 MHz) to the counter 121. The counter 121 counts the clock pulses supplied from the clock generation section 110 and supplies the count value to the DA converter 122. If the counter 121 is an 8-bit counter, it supplies a 256-step count value to the DA converter 122.

[0022] The DA converter 122 outputs a voltage corresponding to the count value from the counter 121. If the count value from the counter 121 is 8-bit 256 steps, the DA converter 122 outputs a 256-step variable voltage (in FIG. 2(b)) of, for example, 0.8 V to 1.4 V as a variable reference voltage. A current corresponding to this variable reference voltage flows through the FET 124, and a voltage corresponding to the current is output from the drain of the FET 123.

[0023] The variable reference voltage from the variable reference voltage generation unit 120 is supplied to the FET 131 of the voltage-controlled oscillator unit 130. The FET 131 is a bias generation unit, which converts the variable reference voltage into a variable current (Fig. 2(c)) and supplies it as a bias to the ring oscillator 132. The ring oscillator 132 oscillates at a frequency corresponding to the bias of the variable current. That is, the ring oscillator 132 changes the oscillation frequency according to the variable reference voltage generated by the DA converter 122 and generates a variable frequency signal (Fig. 2(d)). The ring oscillator 132 supplies the variable frequency signal to the output unit 140.

[0024] In the output unit 140, the waveform shaping unit 141 shapes the waveform of the variable frequency signal from the voltage-controlled oscillator unit 130 into a rectangular wave (Fig. 2(e)). Further, the frequency division unit 142 divides the frequency by 2 so that the duty of the variable frequency signal that has become a rectangular wave is 50% (Fig. 2(f)). The N-bit latch unit 143 latches the frequency-divided variable frequency signal at the timing of the clock pulse to determine the logic (Fig. 2(g)).

[0025] In Fig. 2, a part of the waveforms of each unit is enlarged and shown, so Fig. 3 shows the waveforms of each unit for several cycles of the change in the variable reference voltage. Fig. 3(a) corresponds to Fig. 2(b) and shows four cycles of the change in the variable reference voltage from the variable reference voltage generation unit 120. Fig. 3(b) corresponds to Fig. 2(e) and shows the state where the variable frequency signal from the voltage-controlled oscillator unit 130 is a rectangular wave. The frequency of the variable frequency signal changes according to the change in the variable reference voltage. Fig. 3(c) is the clock pulse from the clock generation unit 110 corresponding to Fig. 2(a), which is supplied to the N-bit latch unit 143 and used as a latch signal. Fig. 3(d) corresponds to Fig. 2(g) and represents the latch output in the N-bit latch unit 143.

[0026] In the above process, since the oscillation frequency of the ring oscillator 132 changes according to the variable reference voltage generated by the variable reference voltage generation unit 120, it is impossible to predict whether the state will be L or H based on the operation timing in the N-bit latch unit 143, and a random number with excellent randomness can be generated. That is, compared with the conventional random number generation device that uses a plurality of ring oscillators with different oscillation frequencies, it is possible to generate a random number while reducing the circuit area and suppressing the power consumption.

[0027] As shown in FIG. 4(a), it is common for the counting in the counter 121 to be a repeated count-up. FIG. 4(a) corresponds to the waveforms of FIGS. 2 and 3. On the other hand, as shown in FIG. 4(b), the counter 121 includes a first counter unit 121a that counts up the clock pulse and a second counter unit 121b that counts down the clock pulse, and may alternately repeat the count-up and count-down to generate a count output. In the case of the count shown in FIG. 4(b), since the period of the voltage change is extended compared to the count in FIG. 4(a), it is possible to use a low-speed DA converter 122. Thereby, the cost of the DA converter 122 can be reduced.

[0028] [Effect Obtained by Embodiment 1] The random number generation device 100 according to Embodiment 1 includes a variable reference voltage generation unit 120 that generates a variable reference voltage (hereinafter referred to as "variable reference voltage"), a voltage-controlled oscillation unit 130 that oscillates based on the variable reference voltage, and an output unit 140 that latches the output of the voltage-controlled oscillation unit 130 to generate a random number. Here, the voltage-controlled oscillation unit 130 has a single ring oscillator 132. The ring oscillator 132 changes its oscillation frequency according to the change in the variable reference voltage. Therefore, compared with the conventional random number generation device that uses a plurality of ring oscillators, it is possible to generate a random number while reducing the circuit area and suppressing the power consumption.

[0029] In the random number generator 100 according to Embodiment 1, a clock generation unit 110 that generates a clock pulse is further provided, and the variable reference voltage generation unit 120 includes a counter 121 and a DA converter 122. The counter 121 counts the clock pulses to generate a count output. The DA converter 122 generates a variable reference voltage according to the count output. The output unit 140 latches the output of the voltage controlled oscillator 130 based on the timing of the clock pulses. Here, the DA converter 122 generates a variable reference voltage based on the count output obtained by counting the clock pulses. For this reason, the ring oscillator 132 changes the oscillation frequency in a stable state according to the change in the variable reference voltage. As a result, even when a single ring oscillator 132 is used, the random number generator 100 can stably generate a random number with excellent randomness.

[0030] In the random number generator 100 according to Embodiment 1, the counter 121 alternately repeats counting up the clock and counting down the clock pulses to generate a count output. As a result, since the period of the voltage change of the variable reference voltage is extended, it becomes possible to use a slower DA converter 122. Thereby, the cost of the DA converter 122 can be reduced.

[0031] Embodiment 2. The random number generator 100 in Embodiment 2 will be described with reference to FIGS. 5 and 6. FIG. 5 is a configuration diagram showing the configuration of the random number generator 100 according to Embodiment 2. FIG. 6 is a configuration diagram showing the configuration of the main part of the random number generator 100 according to Embodiment 2. In FIG. 5, the same components as those in FIG. 1 are denoted by the same reference numerals, and redundant descriptions are omitted, and the description will be centered on the parts different from FIG. 1.

[0032] The variable reference voltage generation unit 120 includes a relaxation oscillation circuit 125 instead of the counter 121 and the DA converter 122. The clock generation unit 110 supplies clock pulses having a predetermined clock frequency to the N-bit latch unit 143. The relaxation oscillator 125 includes a hysteresis comparator 1251, a charge / discharge circuit 1252, and a capacitor 1253. The relaxation oscillator 125 oscillates by repeatedly charging and discharging the capacitor 1253 by means of the hysteresis comparator 1251 and the charge / discharge circuit 1252, and generates a triangular wave or a sawtooth wave with a small circuit configuration. Compared with the case of using the DA converter 122, the circuit area can be further reduced. Also, similar to the first embodiment, all of the above clock generation unit 110, variable reference voltage generation unit 120, voltage-controlled oscillation unit 130, and output unit 140 can be manufactured by semiconductor technology.

[0033] [Effects Obtained by Embodiment 2] In the random number generator 100 according to the first embodiment, the variable reference voltage generation unit 120 includes a relaxation oscillator 125 instead of the counter 121 and the DA converter 122. The relaxation oscillator 125 performs relaxation oscillation by repeatedly charging and discharging the capacitor 1253, and generates a triangular wave or a sawtooth wave with a small circuit configuration. Therefore, compared with the first embodiment using the DA converter 122, the circuit area can be further reduced.

[0034] Embodiment 3. The random number generator 100 in Embodiment 3 will be described with reference to FIG. 7. FIG. 7 is a configuration diagram showing the configuration of the random number generator 100 according to Embodiment 3. The random number generator 100 mainly includes a first random number generator 100A, a second random number generator 100B, and a connection line 150.

[0035] The first random number generator 100A is the one described in Embodiment 2, and uses the relaxation oscillator 125 in the variable reference voltage generation unit 120. The first random number generator 100A supplies the generated random number to the DA converter 122 of the second random number generator 100B. The second random number generation device 100B is similar to the random number generation device 100 described in the first embodiment, and has a DA converter 122 in the variable reference voltage generation unit 120. In the second random number generation device 100B, the DA converter 122 receives the supply of random number data generated by the first random number generation device 100A via the connection line 150, rather than the count value of the counter 121. That is, in the second random number generation device 100B, the DA converter 122 outputs a voltage corresponding to the random number data generated by the first random number generation device 100A. With such a configuration in which the first random number generation device 100A and the second random number generation device 100B are connected in series, since the variable reference voltage in Fig. 2(b) becomes a random value, random numbers with better randomness can be generated. Similar to the first and second embodiments, all of the first random number generation device 100A and the second random number generation device 100B can be manufactured using semiconductor technology.

[0036] [Effects Obtained by the Third Embodiment] The random number generation device 100 according to the first embodiment includes a first random number generation device 100A that uses the relaxation oscillation circuit 125 described in the second embodiment and a second random number generation device 100B that uses a DA converter 122 similar to the random number generation device 100 described in the first embodiment, which are connected in series. Here, in the second random number generation device 100B, the DA converter 122 receives the supply of random number data generated by the first random number generation device 100A. Therefore, in the second random number generation device 100B, the DA converter 122 outputs a voltage corresponding to the random number data generated by the first random number generation device 100A. As a result, random numbers with better randomness can be generated.

[0037] 100 Random number generator, 100A First random number generator, 100B Second random number generator, 110 Clock generation unit, 120 Variable reference voltage generation unit, 121 Counter, 122 DA converter, 123, 124 FET, 125 Relaxation oscillation circuit, 130 Voltage-controlled oscillation unit, 131 FET, 132 Ring oscillator, 140 Output unit, 141 Waveform shaping unit, 142 Frequency division unit, 143 N-bit latch unit, 150 Connection line, 1251 Hysteresis comparator, 1252 Charge and discharge circuit, 1253 Capacitor, R Resistor.

Claims

1. A variable reference voltage generation unit that generates a variable reference voltage; A voltage-controlled oscillation unit that oscillates based on the variable reference voltage; An output unit that latches the output of the voltage-controlled oscillation unit to generate a random number; Comprising: The voltage-controlled oscillation unit has a single ring oscillator, The ring oscillator changes the oscillation frequency according to the change of the variable reference voltage, A random number generation device.

2. Further comprising a clock generation unit that generates a clock pulse, The variable reference voltage generation unit comprises a counter and a DA converter, The counter counts the clock pulses to generate a count output, The DA converter generates the variable reference voltage according to the count output, The output unit latches the output of the voltage-controlled oscillation unit based on the timing of the clock pulse, The random number generation device according to claim 1.

3. The counter alternately repeats the count-up and count-down of the clock pulses to generate the count output, The random number generation device according to claim 2.

4. The variable reference voltage generation unit comprises a relaxation oscillation circuit, The relaxation oscillation circuit generates the variable reference voltage by relaxation oscillation, The random number generation device according to claim 1.

5. A random number generation device having a first random number generation device and a second random number generation device, The first random number generation device, A variable reference voltage generation unit that generates a variable reference voltage by relaxation oscillation of a relaxation oscillation circuit; A voltage-controlled oscillation unit that changes the oscillation frequency according to the change of the variable reference voltage by a single ring oscillator; An output unit that latches the output of the voltage-controlled oscillation unit to generate a random number and supplies it to the second random number generation device; Comprising: The second random number generation device, A variable reference voltage generation unit that generates a variable reference voltage based on the random number supplied from the first random number generation device; A voltage-controlled oscillation unit that changes the oscillation frequency according to the change of the variable reference voltage by a single ring oscillator; An output unit that latches the output of the voltage-controlled oscillation unit to generate a random number; Comprising: A random number generation device.

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