Quantum homomorphic encryption system and method thereof

Abstract

To provide a quantum homomorphic encryption system and method thereof configured to allow quantum error correction and quantum homomorphic encryption to be completed simultaneously by performing quantum error correction encoding.SOLUTION: A quantum homomorphic encryption method performed by a computing device may comprise: Step S100 of creating a first qubit state that includes ancilla qubits, by performing quantum error correction encoding on data; Step S200 of creating a second qubit state that includes the first qubit state, by grouping the first qubit state; and Step S300 of encrypting the second qubit state by performing a random permutation on the second qubit state.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to a quantum homomorphic encryption method and its system.

Background Art

[0002] Unlike existing cryptography, homomorphic encryption is a technique for performing calculations on encrypted data without decrypting it. Since there is no need to decrypt the data encrypted using the secret key, there is no risk of the secret key or the original data being exposed.

[0003] Quantum homomorphic encryption can be configured using quantum error correction codes. Quantum error correction codes are techniques for reducing the error rate of basic operations performed by quantum computers and adjusting the overall operation error rate.

[0004] Conventional quantum homomorphic encryption techniques perform encoding for quantum homomorphic encryption and encoding for quantum error correction separately. Since conventional quantum homomorphic encryption techniques perform encoding twice, they actually have the same structure as existing concatenated encoding. Therefore, the amount of resources required for operations is high, and the resources for error correction and the resources for encryption are separated, resulting in the disadvantage that the error correction ability and security are separate.

[0005] Therefore, there is a need for a technique that can perform quantum homomorphic encryption simultaneously with quantum error correction by performing quantum error correction encoding on data once.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] The technical problem to be solved by some embodiments of the present disclosure is to provide a quantum homomorphic encryption method and its system that can perform quantum homomorphic encryption simultaneously with quantum error correction by performing quantum error correction coding.

[0008] The technical problems of the present disclosure are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those of ordinary skill in the technical field of the present disclosure from the following description.

Means for Solving the Problem

[0009] The quantum homomorphic encryption method according to some embodiments of the present disclosure for solving the above-mentioned technical problems is a method performed by a computing device. By performing quantum error correction coding on data, it includes a step of generating a first qubit state including auxiliary qubits, a step of generating a second qubit state including the first qubit state by grouping the first qubit state, and a step of encrypting the second qubit state by performing a random permutation on the second qubit state.

[0010] In one embodiment, the auxiliary qubits include MMS (Maximally Mixed State) qubits and zero qubits. The step of generating the first qubit state may include a step of generating first data by padding the MMS qubits to the data, a step of generating second data by concatenating the zero qubits to the first data, and a step of encoding the second data.

[0011] In one embodiment, the step of encoding the second data may include a step of encoding the second data using a CSS (Calderbank-Shor-Steane) code.

[0012] In one embodiment, the step of encoding the second data may include encoding the second data using a Doubly-Even CSS code.

[0013] In one embodiment, the step of generating the second qubit state may include generating the auxiliary qubits in a number corresponding to the number of qubits included in the first qubit state, grouping each qubit included in the first qubit state and the auxiliary qubits to generate a plurality of third qubit states, and concatenating the plurality of third qubit states.

[0014] In one embodiment, the step of generating the auxiliary qubits in a number corresponding to the number of qubits included in the first qubit state may include generating the auxiliary qubits in a number corresponding to Equation 1 below when the number of qubits included in the first qubit state is n.

[0015] n×(m-1) …(Equation 1) In one embodiment, the step of grouping each qubit included in the first qubit state and the auxiliary qubits to generate a plurality of third qubit states may include grouping one qubit included in the first qubit state and (m-1) qubits included in the auxiliary qubits when the number of qubits included in the first qubit state is n and the number of auxiliary qubits corresponds to Equation 2 below.

[0016] n×(m-1) …(Equation 2) In one embodiment, the step of encrypting the second qubit state may include performing the random array on each of the plurality of third qubit states.

[0017] According to some embodiments of the present disclosure for solving the above-described technical problems, a quantum homomorphic encryption system includes one or more processors and a memory storing a computer program executed by the one or more processors. The computer program may include instructions for performing operations of generating a first qubit state including auxiliary qubits by performing quantum error correction encoding on data, generating a second qubit state including the first qubit state by grouping the first qubit states, and encrypting the second qubit state by performing a random permutation on the second qubit state.

Advantages of the Invention

[0018] According to some embodiments of the present disclosure, quantum error correction and quantum homomorphic encryption can be completed simultaneously by performing quantum error correction encoding.

[0019] According to some embodiments of the present disclosure, computing resources can be utilized efficiently compared to conventional quantum homomorphic encryption techniques based on quantum error correction code encoding.

[0020] The effects according to the technical idea of the present disclosure are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those of ordinary skill in the art from the following description.

Brief Description of the Drawings

[0021]

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Embodiments for Carrying Out the Invention

[0022] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The advantages and features of the present disclosure, and the methods for achieving them, will become clear by referring to the embodiments described in detail later together with the accompanying drawings. However, the technical idea of the present disclosure is not limited to the following embodiments, and can be realized in various different forms. The following embodiments are merely provided to complete the technical idea of the present disclosure and to fully inform those with ordinary knowledge in the technical field to which the present disclosure belongs of the scope of the present disclosure. The technical idea of the present disclosure is defined only by the scope of the claims.

[0023] When explaining various embodiments of the present disclosure, if it is determined that a detailed description of a related known configuration or function will obscure the gist of the present disclosure, the detailed description thereof will be omitted.

[0024] Unless otherwise defined, the terms (including technical and scientific terms) used in the following embodiments are used in a meaning commonly understood by those of ordinary skill in the art to which this disclosure pertains, but this can change depending on the intention or precedent of those skilled in the relevant field, the emergence of new technologies, etc. The terms used in this disclosure are for the purpose of explaining the embodiments and are not intended to limit the scope of this disclosure.

[0025] The singular expressions used in the following embodiments include plural concepts unless specifically identified as singular in the context. Also, plural expressions include singular concepts unless specifically identified as plural in the context.

[0026] Also, terms such as first, second, A, B, (a), (b), etc. used in the following embodiments are only used to distinguish one component from another, and the essence, order, or sequence of the corresponding components is not limited by those terms.

[0027] Hereinafter, the operation of the conventional quantum homomorphic encryption technology will be described with reference to FIG. 1. FIG. 1 is an exemplary diagram for explaining the operation of the conventional quantum homomorphic encryption technology.

[0028] Referring to FIG. 1, the processes (a) to (d) illustrate the process in which the conventional quantum homomorphic encryption technology performs quantum homomorphic encryption based on quantum error correction coding. FIG. 1 shows the process in which a single data qubit is encoded into a 4 - qubit code row - by - row, mapped to a random quantum code, and finally encrypted with a permutation key.

[0029] When following step (a), the data qubits are present in the first row and column. When following step (b), error correction encoding for quantum error correction is applied to the first column containing the data qubits. When following step (c), the first half of each row is encoded with a random code encoding for quantum homomorphic encryption and is similarly encoded into a quantum code. When following step (d), the columns are arranged by a permutation key. Steps (a) to (c) are steps for performing encoding, and step (d) is a step for performing encryption.

[0030] Referring to FIG. 1, the conventional quantum homomorphic encryption technology performs a total of two encodings for quantum homomorphic encryption by performing steps (b) and (c). As a result, since the conventional quantum homomorphic encryption technology performs two encodings, the amount of resources required for the operation is high, the resources required for error correction and the resources required for encryption are separated, and there is a disadvantage that the error correction ability and the security are separate.

[0031] Focusing on the above problems, the quantum homomorphic encryption method according to the present disclosure discloses a method of performing quantum error correction encoding once to perform quantum error correction and quantum homomorphic encryption simultaneously.

[0032] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the drawings below FIG. 2.

[0033] Referring to FIG. 2, the configuration and operation of a homomorphic encryption system according to some embodiments of the present disclosure will be described. FIG. 2 is an exemplary configuration diagram showing a homomorphic encryption system according to some embodiments of the present disclosure.

[0034] Referring to FIG. 2, a homomorphic encryption system 10 according to some embodiments of the present disclosure is a computing device / system having a function capable of performing quantum error correction and quantum homomorphic encryption. For example, the homomorphic encryption system 10 can perform encoding for quantum error correction and perform homomorphic encryption based on the performed encoding.

[0035] As shown in the figure, the homomorphic encryption system 10 can be configured to include an encoding module 11 and an encryption module 12. However, the scope of the present disclosure is not limited thereto. In some cases, the homomorphic encryption system 10 can also be configured to further include modules / devices / systems not shown in FIG. 2. Alternatively, the homomorphic encryption system can be configured in a form in which at least a part of the components (11 and 12) shown in FIG. 2 is excluded.

[0036] The encoding module 11 can perform quantum error correction encoding on data. For example, the encoding module 11 can perform quantum error correction encoding by generating a first qubit state including data and auxiliary qubits.

[0037] The encryption module 12 can group the first qubit state generated by the encoding module 11 to generate a second qubit state including the first qubit state. The encryption module 12 can perform quantum homomorphic encryption by performing a random permutation on the second qubit state.

[0038] As a result of applying the homomorphic encryption method according to the present disclosure, the homomorphic encryption system 10 can perform quantum error correction encoding once to perform quantum error correction and quantum homomorphic encryption simultaneously.

[0039] Each of the components (11 and 12) of the homomorphic encryption system 10 described above can be realized as at least one computing device. For example, all functions of the homomorphic encryption system 10 can be realized by one computing device, the first function of the homomorphic encryption system 10 can be realized by the first computing device, and the second function can be realized by the second computing device. Alternatively, specific functions of the homomorphic encryption system 10 can also be realized by a plurality of computing devices.

[0040] A computing device can include any device equipped with computing functions. For an example illustration of such a device, refer to FIG. 10. Since a computing device is an assembly in which various components (e.g., memory, processor, etc.) interact, it can also be named a "computing system" in some cases. Of course, the term "computing system" can also include the concept of an assembly in which multiple computing devices interact.

[0041] So far, the configuration and operation of the threat simulation system according to some embodiments of the present disclosure have been described with reference to FIG. 2. Hereinafter, various methods that can be performed by the above-described homomorphic encryption system 10 will be described with reference to the drawings below FIG. 3.

[0042] Hereinafter, for ease of understanding, it is assumed that all steps / operations of the methods described below are performed by the above-described homomorphic encryption system 10, and the description will continue. Therefore, if the subject of a specific step / operation is omitted, it can be understood that it is performed by the homomorphic encryption system 10. However, in an actual environment, some steps / operations of the methods described below can also be performed by other computing devices.

[0043] Hereinafter, the operation of the quantum homomorphic encryption method according to an embodiment of the present disclosure will be described with reference to FIG. 3. FIG. 3 is a flowchart showing the operation of the quantum homomorphic encryption method according to an embodiment of the present disclosure.

[0044] Referring to FIG. 3, the homomorphic encryption system 10 can generate a first qubit state including auxiliary qubits by performing quantum error correction encoding on data (S100). The data can be data containing specific information as quantum information. In this disclosure, it is assumed that the data means data with a one-qubit capacity. The auxiliary qubits can include MMS qubits and zero qubits. An MMS qubit means a qubit in which the quantum mechanical states 0 or 1 appear with a probability of 1 / 2 each. A zero qubit means a qubit in which the state 0 appears.

[0045] The process of generating the first qubit state by performing quantum error correction encoding will be described later with reference to FIGS. 4 to 6.

[0046] Referring back to FIG. 3 for explanation.

[0047] The homomorphic encryption system 10 may generate a second qubit state including the first qubit state by grouping the first qubit states (S200). The method by which the homomorphic encryption system 10 generates the second qubit state will be described later with reference to FIGS. 7 and 8.

[0048] Thereafter, the homomorphic encryption system 10 may encrypt the second qubit state by performing a random permutation on the second qubit state (S300). The method by which the homomorphic encryption system 10 encrypts the second qubit state will be described later with reference to FIG. 9.

[0049] According to this embodiment, the homomorphic encryption system 10 can perform quantum error correction and quantum homomorphic encryption simultaneously by performing quantum error correction encoding once. Therefore, according to this embodiment, there is an advantage that the computing resources can be utilized efficiently by reducing the amount of computation compared to the conventional quantum homomorphic encryption technology based on quantum error correction code encoding.

[0050] Hereinafter, a method for performing quantum error correction encoding on data will be described with reference to FIG. 4. FIG. 4 is a flowchart showing the detailed operation of the quantum homomorphic encryption method described with reference to FIG. 3.

[0051] Referring to FIG. 4, the homomorphic encryption system 10 can generate first data by padding the data with MMS qubits (S110). Padding means adding data to the beginning, middle, or end of the data before encryption.

[0052] Thereafter, the homomorphic encryption system 10 can generate second data by concatenating zero qubits to the generated first data (S120). Different from the conventional quantum homomorphic encryption technology, the homomorphic encryption system 10 can concatenate a plurality of zero qubits to the end of the first data.

[0053] Hereinafter, the first data and the second data will be described with reference to FIG. 5.

[0054] Referring to FIG. 5, the first data 52 and the second data 55 are shown. The homomorphic encryption system 10 can generate the first data 52 by padding the data 50 with a plurality of MMS qubits 51. As a result, since the data 50 and the MMS qubits 51 are mixed, the homomorphic encryption system 10 can enhance the security of the data 50. The more the number of added MMS qubits increases, the more difficult it is to search for the data 50 in the first data 52, so the security of the data 50 can be further enhanced.

[0055] Thereafter, the homomorphic encryption system 10 randomly permutes the data 50 and the MMS data 51 included in the first data to rearrange the first data 53.

[0056] Thereafter, the homomorphic encryption system 10 generates the second data 55 by concatenating a plurality of zero qubits 54 to the first data 53. The second data 55 is used for performing quantum error correction encoding.

[0057] Refer to FIG. 4 again for description.

[0058] The homomorphic encryption system 10 can encode the generated second data (S130). Referring to FIG. 6, the step S130 will be described. FIG. 6 is an exemplary diagram showing the process to which the quantum homomorphic encryption method according to another embodiment of the present disclosure is applied.

[0059] Referring to FIG. 6, the homomorphic encryption system 10 can perform encoding for quantum error correction code (QECC) on the second data 60. As a result of encoding the second data 60, a first qubit state 61 including auxiliary qubits can be generated.

[0060] In this case, the homomorphic encryption system 10 can encode the second data 60 using a CSS (Calderbank-Shor-Steane) code. Thereby, the homomorphic encryption system 10 can extract an encrypted syndrome, and thus has the advantage of being able to perform error correction. Since those skilled in the art to which the present invention pertains are already familiar with the CSS code, detailed description thereof will be omitted.

[0061] In other embodiments, the homomorphic encryption system 10 can encode the second data 60 using a Doubly-Even CSS code. Thereby, the homomorphic encryption system 10 has the advantage of being able to perform a transversal S gate operation. Since those skilled in the art to which the present invention pertains are already familiar with the transversal S gate operation, detailed description thereof will be omitted.

[0062] Hereinafter, with reference to FIG. 7, a method for the homomorphic encryption system 10 to generate a second qubit state will be described. FIG. 7 is a flowchart showing detailed operations of the quantum homomorphic encryption method described with reference to FIG. 3.

[0063] Referring to FIG. 7, the homomorphic encryption system 10 can generate auxiliary qubits in an amount corresponding to the number of qubits included in the first qubit state (S210). The auxiliary qubits may mean MMS qubits. However, the present disclosure is not limited thereto.

[0064] When the number of qubits included in the first qubit state is n, the homomorphic encryption system 10 can generate {n×(m - 1)} auxiliary qubits.

[0065] Thereafter, the homomorphic encryption system 10 can group each qubit included in the first qubit state and the auxiliary qubits to generate a plurality of third qubit states (S220). When the number of qubits included in the first qubit state is n and the number of auxiliary qubits is {n×(m - 1)}, the homomorphic encryption system 10 can group one qubit included in the first qubit state and (m - 1) qubits included in the auxiliary qubits.

[0066] Thereafter, the homomorphic encryption system 10 can generate a second qubit state including the first qubit state by concatenating the plurality of third qubit states generated in step S230 (S230).

[0067] Referring to FIG. 8, steps S210 to S230 will be described. FIG. 8 is an exemplary diagram showing a process to which a quantum homomorphic encryption method according to still another embodiment of the present disclosure is applied.

[0068] Referring to FIG. 8, n first qubit states 80 and {n×(m - 1)} auxiliary qubits generated by the homomorphic encryption system 10 are shown. The homomorphic encryption system 10 can group one qubit included in the first qubit state 80 and (m - 1) qubits included in the auxiliary qubits 81 to generate a plurality of third qubit states 82. Thereafter, the homomorphic encryption system 10 can concatenate the plurality of third qubit states 82 to generate a second qubit state 83.

[0069] In this case, the isomorphic encryption system 10 can encrypt the second qubit state by performing a random array for each of a plurality of third qubit states. Referring to FIG. 9, the process of encrypting the second qubit state will be described. FIG. 9 is an exemplary diagram showing the process to which the quantum isomorphic encryption method according to another embodiment of the present disclosure is applied.

[0070] Referring to FIG. 9, the isomorphic encryption system 10 can perform a random array for each of a plurality of third qubit states (90a, 90b, 90c). Thereby, the isomorphic encryption system 10 can perform encryption on the second qubit state 91.

[0071] So far, the quantum isomorphic encryption method according to some embodiments of the present disclosure has been described with reference to FIGS. 1 to 9. Hereinafter, the hardware configuration of the isomorphic encryption system will be described with reference to FIG. 10.

[0072] FIG. 10 is an exemplary hardware configuration diagram of a computing system 1000 according to some embodiments of the present disclosure. The computing system 1000 corresponds to the navigation device described above.

[0073] As shown in FIG. 10, the computing system 1000 may include one or more processors 1100, a bus 1600, a communication interface 1200, a memory 1400 for loading a computer program executed by the processor 1100, and a storage 1300 for storing the computer program 1500.

[0074] However, FIG. 10 shows only the components related to the embodiments of the present disclosure. Therefore, it can be understood that a person of ordinary skill in the technical field to which the present disclosure belongs may further include other general-purpose components other than the components shown in FIG. 10. That is, the computing system 1000 may further include various components other than the components shown in FIG. 10. In some cases, the computing system 1000 can also be configured in a form in which some of the components shown in FIG. 10 are omitted. Hereinafter, each component of the computing system 1000 will be described.

[0075] The processor 1100 can control the overall operation of each configuration of the computing system 1000. The processor 1100 can be configured to include at least one of a CPU (Central Processing Unit), an MPU (Micro Processor Unit), an MCU (Micro Controller Unit), a GPU (Graphic Processing Unit), an NPU (Neural Processing Unit), or any form of processor well-known in the technical field of the present disclosure. Also, the processor 1100 can perform calculations on at least one application or program for executing the operations / methods according to the embodiments of the present disclosure. The computing system 1000 can include one or more processors.

[0076] Next, the memory 1400 can store various data, instructions, and / or information. The memory 1400 can load the computer program 1500 from the storage 1300 to execute the operations / methods according to the embodiments of the present disclosure. The memory 1400 can be realized as a volatile memory such as RAM, but the technical scope of the present disclosure is not limited thereto.

[0077] Next, bus 1600 may provide a communication function between components of computing system 1000. Bus 1600 can be implemented as various forms of buses such as an address bus, a data bus, and a control bus.

[0078] Next, communication interface 1200 may assist with wired and wireless Internet communication of computing system 1000. Also, communication interface 1200 can support various communication methods other than Internet communication. For this reason, communication interface 1200 can be configured to include a communication module well-known in the technical field of the present disclosure.

[0079] Next, storage 1300 may non-temporarily store one or more computing systems 1000. Storage 1300 can be configured to include non-volatile memory such as ROM (Read Only Memory), EPROM (Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable ROM), flash memory, a hard disk, a removable disk, or any form of computer-readable recording medium well-known in the technical field to which the present disclosure pertains.

[0080] Next, computer program 1500 may include one or more instructions that cause processor 1100 to perform operations / methods according to various embodiments of the present disclosure when loaded into memory 1400. That is, processor 1100 can perform operations / methods according to various embodiments of the present disclosure by executing the one or more instructions.

[0081] For example, the computer program 1500 may include instructions for performing operations such as generating a first qubit state including auxiliary qubits by performing quantum error correction encoding on data, generating a second qubit state including the first qubit state by grouping the first qubit states, and encrypting the second qubit state by performing a random permutation on the second qubit state.

[0082] So far, the hardware configuration of the computing system 1000 according to some embodiments of the present disclosure has been described with reference to FIG. 10.

[0083] So far, various embodiments of the present disclosure and the effects thereof have been referred to with reference to FIGS. 1 to 10. The effects according to the technical idea of the present disclosure are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

[0084] In addition, although a plurality of components have been described as being combined into one and operating in combination in the above embodiments, the technical idea of the present disclosure is not necessarily limited to such embodiments. That is, within the scope of the object of the technical idea of the present disclosure, all of its components can also operate by one or more selective combinations.

[0085] The technical idea of the present disclosure described so far can be realized as computer-readable code on a computer-readable medium. The computer program recorded on the computer-readable recording medium can be transmitted to other computing devices via a network such as the Internet and installed in the other computing devices, and thus can be used in the other computing devices.

Claims

1. In a method performed by a computing device, generating a first qubit state including auxiliary qubits by performing quantum error correction encoding on data; generating a second qubit state including the first qubit state by grouping the first qubit states; and encrypting the second qubit state by performing a random permutation on the second qubit state, the quantum homomorphic encryption method.

2. The auxiliary qubits include MMS (Maximally Mixed State) qubits and zero (Zero) qubits, The step of generating the first qubit state generating first data by padding the MMS qubits to the data; generating second data by concatenating the zero qubits to the first data; and encoding the second data, the quantum homomorphic encryption method according to claim 1.

3. The step of encoding the second data includes encoding the second data using a CSS (Calderbank-Shor-Steane) code, the quantum homomorphic encryption method according to claim 2.

4. The step of encoding the second data includes encoding the second data using a doubly-even CSS code, the quantum homomorphic encryption method according to claim 2.

5. The step of generating the second qubit state generating the auxiliary qubits by a number corresponding to the number of qubits included in the first qubit state; grouping each qubit included in the first qubit state and the auxiliary qubits to generate a plurality of third qubit states; and concatenating the plurality of third qubit states, the quantum homomorphic encryption method according to claim 1.

6. The step of generating the auxiliary qubits by a number corresponding to the number of qubits included in the first qubit state is The quantum isomorphism encryption method according to claim 5, when the number of qubits included in the first qubit state is n, includes the step of generating the auxiliary qubits by the number corresponding to the following mathematical formula 1. n × (m - 1) … (Mathematical formula 1)

7. The step of generating a plurality of third qubit states by grouping each qubit included in the first qubit state and the auxiliary qubits includes: The quantum isomorphism encryption method according to claim 5, when the number of qubits included in the first qubit state is n and the number of the auxiliary qubits corresponds to the following mathematical formula 2, includes the step of grouping one qubit included in the first qubit state and (m - 1) qubits included in the auxiliary qubits. n × (m - 1) … (Mathematical formula 2)

8. The step of encrypting the second qubit state includes: The quantum isomorphism encryption method according to claim 5, including the step of performing the random array on each of the plurality of third qubit states.

9. One or more processors; and A memory storing a computer program executed by the one or more processors, The computer program includes: An operation of generating a first qubit state including auxiliary qubits by performing quantum error correction encoding on data; An operation of generating a second qubit state including the first qubit state by grouping the first qubit state; and An instruction for performing an operation of encrypting the second qubit state by performing a random permutation on the second qubit state, a quantum isomorphism encryption system.

10. A computer program recorded on a computer-readable recording medium, on which a computer program is recorded to execute the steps of the method according to claims 1 to 8.

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