Laminated capacitor

Abstract

To provide a laminated capacitor that can improve withstanding voltage characteristics to achieve high capacity.SOLUTION: A laminated capacitor according to the present disclosure includes a dielectric layer including an aluminum nitride (AlN) compound, and the aluminum nitride compound includes AlN, or an AlN compound in which Aln is doped with Ni, Co, Mn, Cr, V, Zn, Re, Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or a combination thereof. The crystal orientation of the aluminum nitride compound is a c-axis crystal orientation.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a multilayer capacitor.

Background Art

[0002] Recently, as the multifunctionalization and miniaturization of electronic devices have advanced rapidly, the miniaturization and performance improvement of electronic components have also advanced rapidly. In addition, the requirements for high reliability of electrical devices used in automobiles or network equipment, etc., and electronic components for industrial use have increased significantly.

[0003] In order to meet such market requirements, the competition in the technological development of manual components such as inductors, capacitors, or resistors has accelerated. In particular, in the development of various products of multilayer ceramic capacitors (MLCCs), which are manual components with continuously increasing applications and usage amounts, many efforts are required to occupy the market first.

[0004] In addition, a multilayer capacitor is a capacitor manufactured in a form in which dielectric layers and internal electrodes are stacked, and is used in various electronic devices such as mobile phones, notebook computers, and LCD TVs.

[0005] Recently, with the development of technology, multilayer capacitors have been required to improve their performance such as high capacitance, improved capacitance density, and improved withstand voltage.

[0006] Recently, thin film capacitors that are not of the existing multilayer ceramic capacitor (MLCC) type have been developed. In the case of the thin film capacitors, it is possible to maximize the area of the capacitor and minimize the thickness of the dielectric layer to achieve high capacitance.

[0007] In fact, in order to realize thin film capacitors, it is necessary to develop dielectric materials and electrode materials that can improve high capacitance and withstand voltage characteristics.

Summary of the Invention

Problems to be Solved by the Invention

[0008] One aspect of the embodiment provides a multilayer capacitor that can improve the breakdown voltage characteristics and achieve high capacitance.

[0009] However, the problems to be solved by the embodiment are not limited to the above problems, and can be variously extended within the scope of the technical idea included in the embodiment.

Means for Solving the Problems

[0010] A multilayer capacitor according to an embodiment includes a dielectric layer containing an aluminum nitride (AlN)-based compound, and the aluminum nitride-based compound includes AlN, or an AlN compound doped with Ni, Co, Mn, Cr, V, Zn, Re, Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or a combination thereof. The dielectric layer includes a plurality of dielectric crystallites, and the crystal orientation of the dielectric crystallites is a c-axis crystal orientation.

[0011] The aluminum nitride-based compound may include AlN, or an AlN compound doped with Sc, Er, Y, La, or a combination thereof.

[0012] In the doped AlN compound, the content (at%) of the doped element may be 1 at% or more and less than 30 at%.

[0013] The aluminum nitride-based compound contained in the dielectric layer may have a hexagonal system (HCP) crystal structure and have a (0002) crystal plane. The average thickness of the dielectric layer may be 20 nm to 400 nm.

[0014] The laminated capacitor may include a substrate; a base layer disposed on the substrate; internal electrodes and dielectric layers alternately disposed on the base layer; and an external electrode located on the base layer and disposed outside the internal electrodes and the dielectric layers.

[0015] The internal electrodes include a first internal electrode and a second internal electrode, and the first internal electrode and the second internal electrode include a conductive metal containing Mo, W, Ru, Ti, Pt, Al, or a combination thereof, and the types of the conductive metals included in the first internal electrode and the second internal electrode may be different.

[0016] The internal electrodes can include a conductive metal having a BCC crystal structure and a (110) crystal plane, a conductive metal having an HCP crystal structure and a (0002) crystal plane, a conductive metal having an FCC crystal structure and a (111) crystal plane, or a combination thereof.

[0017] The laminated capacitor can further include an internal electrode laminate disposed between the base layer and the dielectric layer.

[0018] The average thickness of the internal electrodes may be 20 nm to 400 nm. The laminated capacitor can further include a seed layer located between the base layer and the internal electrodes.

[0019] A multilayer capacitor according to another embodiment includes a substrate; a base layer disposed on the substrate; internal electrodes and dielectric layers alternately disposed on the base layer; and an external electrode disposed on the base layer and outside the internal electrodes and the dielectric layers. The dielectric layer includes aluminum nitride (AlN)-based compounds including AlN or AlN doped with Ni, Co, Mn, Cr, V, Zn, Re, Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or combinations thereof. The dielectric layer includes a plurality of dielectric crystallites, and the crystal orientation of the dielectric crystallites is a c-axis crystal orientation. The internal electrodes include a first internal electrode and a second internal electrode, and the first internal electrode and the second internal electrode include a conductive metal including Mo, W, Ru, Ti, Pt, Al, or combinations thereof, and the types of the conductive metals included in the first internal electrode and the second internal electrode are different.

[0020] The aluminum nitride-based compound can include AlN or an AlN compound doped with Sc, Er, Y, La, or combinations thereof.

[0021] In the doped AlN compound, the content (at%) of the doped element may be 1 at% or more and less than 30 at%.

[0022] The aluminum nitride-based compound included in the dielectric layer can have a hexagonal system (HCP) crystal structure and have a (0002) crystal plane. The average thickness of the dielectric layer may be 20 nm to 400 nm.

[0023] The internal electrodes can include a conductive metal having a BCC crystal structure and having a (110) crystal plane, a conductive metal having an HCP crystal structure and having a (0002) crystal plane, a conductive metal having an FCC crystal structure and having a (111) crystal plane, or combinations thereof.

[0024] The multilayer capacitor can further include an internal electrode laminate disposed between the base layer and the dielectric layer. The average thickness of the internal electrode may be 20 nm to 400 nm.

[0025] The multilayer capacitor may further include a seed layer positioned between the base layer and the internal electrode.

Advantages of the Invention

[0026] According to the multilayer capacitor according to the embodiment, there is an advantage that the breakdown voltage characteristics can be improved and a high capacitance can be realized.

[0027] However, the various and beneficial advantages and effects of the present invention are not limited to the above-described content, and should be more easily understood in the process of describing the specific embodiments of the present invention.

Brief Description of the Drawings

[0028]

Figure 1

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Figure 9

Embodiments for Carrying Out the Invention

[0029] Hereinafter, embodiments of the present invention will be described in detail so that those having ordinary knowledge in the technical field to which the present invention pertains can easily implement it with reference to the accompanying drawings. In order to clearly explain the present invention in the drawings, parts unnecessary for the explanation are omitted, and the same reference numerals are given to the same or similar components throughout the specification. Further, the attached drawings are only for facilitating the understanding of the embodiments disclosed in this specification, and the technical idea disclosed in this specification is not limited by the attached drawings, and it should be understood to include all modifications, equivalents, and alternatives included in the idea and technical scope of the present invention.

[0030] Terms including ordinal numbers such as first, second, etc. can be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

[0031] When it is mentioned that a certain component is "connected to" or "coupled to" another component, it should be understood that it may be directly connected to, coupled to, or opposed to the other component, but there may also be other components in between. On the contrary, when it is mentioned that a certain component is "directly connected to" or "directly coupled to" another component, it should be understood that there are no other components in between.

[0032] Throughout the specification, terms such as "comprising" or "having" are intended to specify the presence of the features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and should not be construed as precluding the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof. Therefore, when a part "comprises" a certain component, this means that, unless otherwise stated to the contrary, it can further include other components rather than excluding other components.

[0033] Throughout the specification, the "lamination direction" is the direction in which components are sequentially laminated, which can be the "thickness direction" perpendicular to the wide surface (main surface) of a sheet-like component, but corresponds to the T-axis direction in the drawings. And the "side" is the direction extending parallel to the wide surface (main surface) from the edge of a sheet-like component, which can be the "plane direction", but corresponds to the L-axis direction in the drawings. And the W-axis direction in the drawings can be the "width direction".

[0034] Throughout the specification, for the multilayer capacitor 100, the two surfaces facing each other in the thickness direction (T-axis direction) can be defined as the first surface and the second surface, the two surfaces connected to the first surface and the second surface and facing each other in the length direction (L-axis direction) can be defined as the third surface and the fourth surface, and the two surfaces connected to the first surface and the second surface and connected to the third surface and the fourth surface and facing each other in the width direction (W-axis direction) can be defined as the fifth surface and the sixth surface.

[0035] As an example, the first surface, which is the lower surface, can be the surface facing the mounting direction. Also, the first surface to the sixth surface may be flat, but the present embodiment is not limited thereto. For example, the first surface to the sixth surface may be a convex curved surface at the center, and the corners at the boundaries of each surface may be rounded.

[0036] The shape, dimensions, and the number of dielectric layers 130 of the multilayer capacitor 100 are not limited to those shown in the drawings of the present embodiment. Also, the multilayer capacitor 100 can include an active region and a cover region.

[0037] The active region is a portion that contributes to the capacitance formation of the multilayer capacitor 100. As an example, the active region may be a region where the first internal electrode 141 or the second internal electrode 142 laminated along the thickness direction (T-axis direction) overlaps.

[0038] The cover region is a margin portion in the thickness direction and can be disposed on the first surface and the second surface sides of the active region in the thickness direction (T-axis direction), respectively. Further, the multilayer capacitor 100 can further include a side cover region. The side cover region is a margin portion in the width direction and can be disposed on the fifth surface and the sixth surface sides of the active region in the width direction (W-axis direction), respectively.

[0039] As an example, the cover region may be a single dielectric layer 130 or two or more dielectric layers 130 laminated on the upper surface and the lower surface of the active region, respectively. As an example, the cover region can include an insulating material such as silicon dioxide (SiO2), silicon nitride (SiN, Si3N4), aluminum nitride (AlN), or aluminum oxide (Al2O3).

[0040] The cover region and the side cover region serve to prevent damage to the first internal electrode 141 and the second internal electrode 142 due to physical or chemical stress.

[0041] Hereinafter, various embodiments and modifications will be described in detail with reference to the drawings. FIGS. 1 to 4 are cross-sectional views schematically showing a multilayer capacitor 100 according to an embodiment.

[0042] Referring to FIGS. 1 to 4, a multilayer capacitor 100 according to an embodiment can include a substrate 110; a base layer 120 disposed on the substrate 110; a capacitor body including internal electrodes 141, 142 and dielectric layers 130 disposed alternately on the base layer 120; and external electrodes 161, 162 located on the base layer 120 and disposed outside the capacitor body.

[0043] Referring to FIGS. 2 and 3, the multilayer capacitor 100 may further include an internal electrode laminate 143 disposed between the base layer 120 and the dielectric layer 130.

[0044] Referring to FIG. 4, the multilayer capacitor 100 may further include a seed layer 170 disposed between the base layer 120 and the capacitor body.

[0045] The substrate 110 may include a silicon substrate, and for example, may include a silicon wafer, an SOI (Silicon On Insulator) type substrate, etc.

[0046] The base layer 120 can serve as a buffer layer so that when etching the electrode-dielectric layer described later by a dry etching process after depositing the dielectric layer 130 and the internal electrodes 141 and 142, it is not etched down to the substrate 110. The base layer 120 may include silicon dioxide (SiO2), silicon nitride (SiN, Si3N4), aluminum nitride (AlN), aluminum oxide (Al2O3), or a combination thereof.

[0047] Dielectric layer The multilayer capacitor 100 according to an embodiment includes a dielectric layer 130 containing an aluminum nitride (AlN)-based compound. The aluminum nitride-based compound includes AlN, or an AlN compound doped with Ni, Co, Mn, Cr, V, Zn, Re, Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or a combination thereof. The dielectric layer includes a plurality of dielectric crystallites, and the crystal orientation of the dielectric crystallites is a c-axis crystal orientation.

[0048] For example, the AlN-based compound contained in the dielectric layer 130 may have a hexagonal (HCP) crystal structure and may have a (0002) crystal plane that is perpendicular to the c-axis.

[0049] As an example, the aluminum nitride (AlN)-based compound can include AlN, or an AlN compound doped with Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or a combination thereof in the AlN.

[0050] As a specific example, the aluminum nitride (AlN)-based compound can include AlN, or an AlN compound doped with Sc, Er, Y, La, or a combination thereof in the AlN.

[0051] The aluminum nitride (AlN)-based compound can include an AlN compound doped with other elements at the Al site in order to realize a high-capacity dielectric.

[0052] As an example, the compound doped in the AlN is substituted at the Al site of the AlN, and by increasing the dielectric constant of the doped compound, a high-capacity dielectric can be realized.

[0053] As an example, when the atomic size of the atom doped in the AlN is larger than that of the Al atom, distortion of the unit lattice occurs in the doped compound, and the Net polarity increases more than that of AlN, so that the dielectric constant can be increased.

[0054] As an example, an element having an atomic radius larger than that of the Al atom can be doped in the AlN. As an example, an element having an atomic radius larger than 1.43 Å can be doped in the AlN. As a specific example, an element having an atomic radius of 1.60 Å or more can be doped in the AlN.

[0055] In one embodiment, in the doped AlN compound, the content (atomic %, at%) of the doped element may be 1 at% or more, 5 at% or more, or 10 at% or more, and may also be less than 30 at%, 25 at% or less, or 20 at% or less.

[0056] In the doped AlN compound, when the content of the doped element is less than 1 at%, it may be difficult to realize a high-capacity dielectric by doping. When it is 30 at% or more, a brittle crystal phase may be formed, making it difficult to manufacture a dielectric for sputtering, and there may be a lot of abnormal grain growth in the dielectric layer 130.

[0057] As an example, the dielectric layer 130 includes a plurality of dielectric crystallites, and the dielectric crystallites can include the aforementioned aluminum nitride-based compound.

[0058] In one embodiment, the crystal orientation of the dielectric crystallites is a c-axis crystal orientation.

[0059] In order to deposit the dielectric layer 130 including the aluminum nitride-based compound on the substrate 110 by semi-epitaxy, the crystal orientation of the grains in the dielectric layer 130 can be aligned in the c-axis crystal orientation.

[0060] When the crystal orientation of the aluminum nitride-based compound is aligned in the c-axis crystal orientation, the defect sites in the dielectric layer 130 are reduced and the breakdown voltage characteristics can be improved.

[0061] As an example, the crystal orientation of the dielectric layer 130 can be confirmed through high-resolution XRD or HR-TEM analysis.

[0062] As an example, after performing High resolution XRD Rocking curve analysis on the dielectric layer 130, the full width at half maximum (FWHM) of the main peak and the intensity of the main peak can be measured from the XRD graph.

[0063] As an example, the higher the c-axis crystal orientation of the aluminum nitride-based compound contained in the dielectric layer 130, the smaller the FWHM value.

[0064] As an example, the higher the c-axis crystal orientation of the aluminum nitride-based compound contained in the dielectric layer 130, the smaller the value of FWHM / Intensity, which is the value obtained by normalizing FWHM with Intensity.

[0065] As an example, the average thickness of the dielectric layer 130 may be 20 nm or more, 50 nm or more, 100 nm or more, or 200 nm or more, and may also be 400 nm or less, or 300 nm or less.

[0066] If the average thickness of the dielectric layer 130 is less than 20 nm, the risk of short circuit between internal electrodes is high, and when it exceeds 400 nm, it may be difficult to realize a high-capacitance thin-film capacitor.

[0067] The method for measuring the average thickness of the dielectric layer 130 is as follows. First, after putting the multilayer capacitor 100 into an epoxy mixture and curing it, polish the side surfaces of the multilayer capacitor 100 in the L-axis direction and the T-axis direction to the midpoint in the W-axis direction, maintain it in a vacuum atmosphere chamber after fixing, and prepare a cross-sectional sample (hereinafter referred to as "cross-sectional sample") cut from the center of the multilayer capacitor 100 in the W-axis direction in the L-axis direction and the T-axis direction.

[0068] Prepare an SEM or TEM image obtained by observing the cross-sectional sample with a Scanning Electron Microscope (SEM) or a Transmission Electron Microscope (TEM).

[0069] In the SEM or TEM image of the cross-sectional sample, the arithmetic mean value of the thickness of the dielectric layer 130 at 10 points separated from the reference point by a predetermined interval with the central point in the length direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 130 as the reference point may be used.

[0070] The interval between the 10 points can be adjusted according to the scale of the Scanning Electron Microscope (SEM) image. At this time, all 10 points must be located within the dielectric layer 130. If all 10 points are not located within the dielectric layer 130, the position of the reference point can be changed, or the interval between the 10 points can be adjusted.

[0071] Internal electrode The internal electrodes include a first internal electrode 141 and a second internal electrode 142, which are electrodes having different polarities from each other, and are alternately arranged so as to face each other along the T-axis direction with the dielectric layer 130 interposed therebetween, and one end of each is exposed through the third surface and the fourth surface of the multilayer capacitor 100, respectively.

[0072] The first internal electrode 141 and the second internal electrode 142 are electrically insulated from each other by the dielectric layer 130 disposed in the middle.

[0073] The ends of the first internal electrode 141 and the second internal electrode 142 alternately exposed through the third surface and the fourth surface of the multilayer capacitor 100 are respectively connected to the first external electrode 161 and the second external electrode 162 and can be electrically connected.

[0074] In one embodiment, the internal electrodes 141 and 142 can include an electrode material capable of minimizing the lattice mismatch percentage with the crystal unit cell of the aluminum nitride (AlN)-based compound contained in the dielectric layer 130.

[0075] The AlN-based compound contained in the dielectric layer 130 has a hexagonal (HCP) crystal structure, has a (0002) crystal plane perpendicular to the c-axis, and can grow on the internal electrodes 141 and 142.

[0076] At this time, for the internal electrodes 141 and 142, a material capable of minimizing the lattice mismatch with the crystal unit cell of the AlN-based compound having a hexagonal (HCP) crystal structure and a (0002) crystal plane can be used. When such a material is used as the internal electrode material, the crystal orientation of the dielectric layer 130 can be improved, and the leakage current of the capacitor can be reduced.

[0077] FIG. 5 is a schematic diagram schematically showing the crystal structure and crystal plane of an internal electrode material according to one embodiment.

[0078] Referring to FIGS. 5(a) to 5(c), in relation to the AlN-based dielectric material having an HCP (0002) crystal structure, when the internal electrode material has a body-centered cubic (BCC) crystal structure, it can be confirmed that a prefer crystal orientation having a (110) crystal plane is formed.

[0079] Also, when the internal electrode material has a hexagonal (HCP) crystal structure, it can be confirmed that a prefer crystal orientation having a (0002) crystal plane is formed.

[0080] Also, when the internal electrode material has a face-centered cubic (FCC) crystal structure, it is possible to confirm that a preferred crystal orientation is formed when it has a (111) crystal plane.

[0081] When the preferred crystal orientation is formed, the lattice mismatch rate with the dielectric layer material can be within 20%, and the dielectric layer 130 can be grown by semi-epitaxy.

[0082] In one embodiment, the first internal electrode 141 and the second internal electrode 142 can include a conductive metal, and the conductive metal can include Mo, W, Ru, Ti, Pt, Al, or a combination thereof. As an example, the types of the conductive metal included in the first internal electrode 141 and the second internal electrode 142 may be different.

[0083] As an example, the first internal electrode 141 and the second internal electrode 142 can include a conductive metal having a BCC crystal structure and a (110) crystal plane, a conductive metal having an HCP crystal structure and a (0002) crystal plane, a conductive metal having an FCC crystal structure and a (111) crystal plane, or a combination thereof.

[0084] As a specific example, the conductive metal having a BCC crystal structure and a (110) crystal plane can include Mo or W.

[0085] As a specific example, the conductive metal having an HCP crystal structure and a (0002) crystal plane can include Ru or Ti.

[0086] As a specific example, the conductive metal having an FCC crystal structure and a (111) crystal plane can include Pt or Al.

[0087] Referring to FIGS. 2 and 3, the multilayer capacitor 100 can further include an internal electrode laminate 143 disposed between the base layer 120 and the dielectric layer 130.

[0088] As an example, the internal electrode laminate 143 may be an internal electrode located at the lowermost stage of the capacitor body.

[0089] As an example, the internal electrode laminate 143 can be disposed between the dielectric layer 130 located at the lowermost stage of the capacitor body and the base layer 120.

[0090] The internal electrode laminate 143 may be formed by directly laminating the first internal electrode 141 and the second internal electrode 142 in contact with each other. At this time, the types of the conductive metals included in the first internal electrode 141 and the second internal electrode 142 may be different.

[0091] The internal electrode laminate 143 has a structure in which electrodes containing two different materials are laminated in a crossed manner. The internal electrode disposed at the lower stage of the internal electrode laminate 143 can improve the crystal orientation of the internal electrode disposed at the upper stage. When the dielectric layer 130 is disposed on the upper stage of such an electrode laminate, the crystal orientation of the disposed dielectric layer 130 can be further improved.

[0092] As an example, the internal electrodes 141 and 142 constituting the internal electrode laminate 143 can include Mo, W, Ru, Ti, Pt, Al, or a combination thereof, and the types of the conductive metals included in the first internal electrode 141 and the second internal electrode 142 may be different.

[0093] As a specific example, the internal electrode laminate 143 can include a Mo (lower stage) / Ti (upper stage) or Ti (lower stage) / Mo (upper stage) laminate. The internal electrode and the internal electrode laminate according to one embodiment have an advantage that by including a non-magnetic electrode material instead of a Ni electrode having magnetism, the magnetic flux density can be lowered and the ESL (Equivalent Series Inductance) of the capacitor can be reduced.

[0094] As an example, the average thickness of the internal electrodes 141 and 142 may be 20 nm or more, 50 nm or more, 100 nm or more, or 150 nm or more, and may also be 400 nm or less, or 300 nm or less.

[0095] As an example, the average thickness of the internal electrode laminate 143 may be 50 nm or more, 100 nm or more, or 150 nm or more, and may also be 500 nm or less, 400 nm or less, or 300 nm or less.

[0096] The average thickness of the internal electrodes 141 and 142 or the internal electrode laminate 143 can be measured by the following method.

[0097] Using the SEM or TEM image of the cross-sectional sample, with the central point in the length direction (L-axis direction) or width direction (W-axis direction) of the internal electrodes 141 and 142 or the internal electrode laminate 143 as the reference point, the arithmetic mean value of the thickness of the internal electrodes 141 and 142 or the internal electrode laminate 143 at 10 points separated by a predetermined interval from the reference point is obtained to determine the average thickness.

[0098] The interval between the 10 points can be adjusted according to the scale of the scanning electron microscope (SEM) image. At this time, all 10 points must be located within the internal electrodes 141 and 142 or the internal electrode laminate 143. If they are not located within the internal electrodes 141 and 142 or the internal electrode laminate 143, the position of the reference point can be changed, or the interval between the 10 points can be adjusted.

[0099] Seed layer Referring to FIG. 4, the multilayer capacitor 100 according to an embodiment may further include a seed layer 170 located between the base layer 120 and the capacitor body.

[0100] The multilayer capacitor 100 according to another embodiment may further include a seed layer 170 located between the base layer 120 and the internal electrode laminate 143.

[0101] The seed layer 170 is disposed below the internal electrodes 141, 142 or the internal electrode 143, and can function as a seed for forming the internal electrodes.

[0102] When further including the seed layer 170, the crystal orientation of the internal electrodes 141, 142 disposed on the seed layer 170 is improved. When the dielectric layer 130 is disposed on the internal electrodes 141, 142 with improved crystal orientation, the crystal orientation of the dielectric layer 130 can be further improved.

[0103] As an example, the seed layer 170 can include the same compound as the aforementioned dielectric layer 130. The seed layer 170 includes a dielectric of an aluminum nitride (AlN)-based compound. The aluminum nitride (AlN)-based compound can include AlN; a compound in which Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, Ni, Co, Mn, Cr, V, Zn, Re, or a combination thereof is doped into the AlN; or a combination thereof.

[0104] The average thickness of the seed layer 170 may be 10 nm or more, 20 nm or more, or 40 nm or more, and may be 100 nm or less, 80 nm or less, or 60 nm or less.

[0105] The method for measuring the average thickness of the seed layer 170 can be the same as the method for measuring the average thickness with the aforementioned dielectric layer 130 or the internal electrodes 141, 142.

[0106] External electrode The first external electrode 161 and the second external electrode 162 are provided with voltages of different polarities, and are respectively connected to the exposed portions of the first internal electrode 141 and the second internal electrode 142 and can be electrically connected.

[0107] With the above configuration, when a predetermined voltage is applied to the first external electrode 161 and the second external electrode 162, charges are accumulated between the first internal electrode 141 and the second internal electrode 142 facing each other. At this time, the capacitance of the multilayer capacitor 100 becomes proportional to the overlapping area of the first internal electrode 141 and the second internal electrode 142 that overlap each other along the T-axis direction in the active region.

[0108] As an example, each of the first external electrode 161 and the second external electrode 162 can include a sintered metal layer, a conductive resin layer disposed so as to cover the sintered metal layer, and a plating layer disposed so as to cover the conductive resin layer.

[0109] The sintered metal layer can include a conductive metal and glass. As an example, the sintered metal layer can include copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), alloys thereof, or combinations thereof as the conductive metal. For example, copper (Cu) can include a copper (Cu) alloy. When the conductive metal includes copper, the metal other than copper may be included in an amount of 5 mol or less per 100 mol of copper.

[0110] As an example, the sintered metal layer can include a composition in which an oxide is mixed as glass, and may be one or more selected from the group consisting of silicon oxide, boron oxide, aluminum oxide, transition metal oxide, alkali metal oxide, and alkaline earth metal oxide. The transition metal is selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni), the alkali metal is selected from the group consisting of lithium (Li), sodium (Na), and potassium (K), and the alkaline earth metal may be one or more selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0111] Optionally, the conductive resin layer is formed on the sintered metal layer, and can be formed, for example, in a form that completely covers the sintered metal layer. On the other hand, the first external electrode 161 and the second external electrode 162 may not contain the sintered metal layer.

[0112] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the multilayer capacitor 100, and the length of the region (i.e., the band portion) where the conductive resin layer extends and is disposed on the first and second surfaces or the fifth and sixth surfaces of the multilayer capacitor 100 may be longer than the length of the region (i.e., the band portion) where the sintered metal layer extends and is disposed on the first and second surfaces or the fifth and sixth surfaces of the multilayer capacitor 100. That is, the conductive resin layer is formed on the sintered metal layer and can be formed in a form that completely covers the sintered metal layer.

[0113] The conductive resin layer contains a resin and a conductive metal. The resin contained in the conductive resin layer has bonding properties and shock absorption properties, and is not particularly limited as long as it can be mixed with the conductive metal powder to form a paste, and can include, for example, a phenolic resin, an acrylic resin, a silicone resin, an epoxy resin, or a polyimide resin.

[0114] The conductive metal contained in the conductive resin layer serves to be electrically connected to the first internal electrode 141 and the second internal electrode 142 or the sintered metal layer.

[0115] The conductive metal contained in the conductive resin layer can have a spherical shape, a flake shape, or a combination thereof. That is, the conductive metal may consist only of a flake shape, may consist only of a spherical shape, or may be a form in which a flake shape and a spherical shape are mixed.

[0116] Here, the spherical shape can include a form that is not a perfect sphere, and can include, for example, a form in which the length ratio of the major axis to the minor axis (major axis / minor axis) is 1.45 or less. The flake-shaped powder means a powder having a flat and elongated shape, and is not particularly limited, but may have, for example, a length ratio of the major axis to the minor axis (major axis / minor axis) of 1.95 or more.

[0117] The first external electrode 161 and the second external electrode 162 can further include a plating layer disposed outside the conductive resin layer.

[0118] The plating layer can include a single one of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), or an alloy thereof. As an example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, may be in a form in which a nickel (Ni) plating layer and a tin (Sn) plating layer are sequentially laminated, or may be in a form in which a tin (Sn) plating layer, a nickel (Ni) plating layer, and a tin (Sn) plating layer are sequentially laminated. Also, the plating layer can include a plurality of nickel (Ni) plating layers and / or a plurality of tin (Sn) plating layers.

[0119] The plating layer can improve the mountability with the substrate of the multilayer capacitor 100, the structural reliability, the durability against the outside, the heat resistance, and the equivalent series resistance (ESR).

[0120] Manufacturing method of a multilayer capacitor A manufacturing method of a multilayer capacitor according to an embodiment includes: (1) a step of depositing a base layer on a substrate; (2) a step of depositing an electrode-dielectric laminate in which a first internal electrode, a dielectric layer, and a second internal electrode are alternately deposited on the base layer; (3) a step of grooving the electrode-dielectric laminate through a dry slope etching process; (4) a step of wet etching the second internal electrode and wet etching the first internal electrode; (5) a step of depositing a side cover region in a cavity formed in the step of wet etching; (6) a step of manufacturing a capacitor laminate by patterning a cover region on the upper stage of the electrode-dielectric layer laminate; and (7) a step of forming an external electrode outside the capacitor laminate.

[0121] As an example, after depositing the base layer on the substrate, a seed layer can be further deposited before depositing the electrode-dielectric laminate.

[0122] FIG. 8 is a schematic diagram schematically showing a multilayer capacitor manufactured by a method for manufacturing a multilayer capacitor according to an embodiment. FIG. 9 is a schematic diagram schematically showing a multilayer capacitor manufactured by a method for manufacturing a multilayer capacitor according to another embodiment.

[0123] Hereinafter, each manufacturing method will be described with reference to FIGS. 8 and 9. First, in the step of depositing the base layer on the substrate, a sputtering (RF Magnetron Sputtering) process, a chemical vapor deposition process, an atomic layer deposition (ALD) process, an evaporation process, or the like can be used.

[0124] As the sputtering process, magnetron sputtering, RF magnetron sputtering, laser sputtering, or DC sputtering can be used.

[0125] Next, the step of depositing an electrode-dielectric laminate in which a first internal electrode, a dielectric layer, and a second internal electrode are alternately deposited on the base layer will be described.

[0126] As an example, the electrode-dielectric laminate can be formed by depositing a first internal electrode, a dielectric layer, a second internal electrode, and a dielectric layer in this order a plurality of times on the base layer. As an example, an internal electrode can be disposed directly above the base layer. As an example, a dielectric layer can be disposed at the uppermost stage of the electrode-dielectric laminate.

[0127] The method of depositing the internal electrode and the dielectric layer can be the same as the method of depositing the base layer, but mainly the sputtering process can be used.

[0128] The step of grooving the electrode-dielectric laminate through a dry slope etching process may be a step of etching the electrode-dielectric laminate excluding the substrate. At this time, the base layer can play a role of protecting the substrate from dry slope etching.

[0129] Referring to FIG. 9, the form of the electrode-dielectric laminate after being grooved through a dry slope etching process may be a trapezoidal form that becomes wider from the top to the bottom when viewed in a cross-section obtained by cutting the multilayer capacitor from the center in the W-axis direction to the L-axis direction and the T-axis direction. As an example, the angle of the lower inclined surface of the trapezoidal electrode-dielectric laminate may be 80° or less, for example, 70° or less, 60° or less, or 50° or less, and as a specific example, it may be 45°. When including a trapezoidal electrode-dielectric laminate, connection with an external electrode may be easy.

[0130] The step of wet etching the second internal electrode and wet etching the first internal electrode may be a step of wet etching the side surface of the internal electrode to form a cavity. In a subsequent step, the cavity can be filled with an insulating material to form a side cover region.

[0131] As an example, when wet etching the first internal electrode, the second internal electrode must not be etched, and when wet etching the second internal electrode, the first internal electrode may not be etched. For this reason, the types of the conductive metals included in the first internal electrode and the second internal electrode may be different. Thereby, the multilayer capacitor according to one embodiment has an advantage that selective etching of the internal electrode is possible, while the electrical conductivity of the internal electrode material is high and the cost is relatively low.

[0132] The step of depositing a side cover region on the cavity formed in the wet etching step may be a step of filling the cavity with an insulating material.

[0133] As a method of filling the cavity with the insulating material, for example, an Atomic Layer Deposition (ALD) process can be used.

[0134] As the insulating material, silicon dioxide (SiO2), silicon nitride (SiN, Si3N4), aluminum nitride (AlN), aluminum oxide (Al2O3), or a combination thereof can be used. Existing laminated capacitors had the disadvantage that the thickness of the cover region was thick and the current path increased. However, in the case of the thin film capacitor according to the present disclosure, the insulating material is deposited as a thin film on the active region to form the cover region, so the thickness of the cover region can be reduced and the current path can be lowered to reduce the ESL.

[0135] The step of manufacturing the capacitor laminate by patterning the cover region on the upper stage of the electrode-dielectric layer laminate may be a step of patterning the insulating material on a part of the upper stage of the electrode-dielectric layer laminate.

[0136] The insulating material can be patterned on a part of the upper stage of the electrode-dielectric layer laminate using a lift-off process.

[0137] As the insulating material, silicon dioxide (SiO2), silicon nitride (SiN, Si3N4), aluminum nitride (AlN), aluminum oxide (Al2O3), or a combination thereof can be used.

[0138] The step of forming an external electrode outside the capacitor laminate may be a step of depositing a conductive metal outside the capacitor laminate.

[0139] Referring to FIGS. 8 and 9, the vapor-deposited external electrode can be connected to the side surface of the upper cover region, can be formed along the outside of the capacitor body, and can be formed on the upper stage of the base layer. The type of the conductive metal is the same as that described for the external electrode.

[0140] As a method of vapor-depositing the conductive metal on the outside of the capacitor laminate, a sputtering (RF Magnetron Sputtering) process, a chemical vapor deposition process, an atomic layer deposition (Atomic Layer Deposition, ALD) process, an evaporation (Evaporation) process, or the like can be used.

[0141] As the sputtering process, magnetron sputtering, RF magnetron sputtering, laser sputtering, or DC sputtering can be used.

[0142] Specific embodiments of the invention are presented below. However, the embodiments described below are merely for specifically exemplifying or explaining the invention, and the scope of the invention should not be limited thereby.

Example

[0143] (Reference Example) Reference Example 1: Evaluation of elements dopable in AlN Table 1 below shows whether or not it is substituted for the Al site of AlN for each element to be doped and the atomic radius of the doping element.

[0144]

Table 1

[0145] Referring to Table 1, it can be confirmed that Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, and La, which have atomic radii larger than that of Al (1.43 Å), can substitute for Al sites in AlN, and among them, Sc, Er, Y, and La with atomic radii of 1.60 Å or more can substitute for Al sites. Reference Example 2: Evaluation of dielectric constant based on dopant element content For the AlScN compound obtained by doping Sc element into AlN, the dielectric constant values of the AlScN compound according to the content of Sc (at%) are measured and shown in Table 2 and Figure 6 below.

Table 2

[0146] Referring to Table 2 and Figure 6, it can be confirmed that the dielectric constant of the AlN-based compound increases as the Sc doping amount increases.

[0147] Reference Example 3: Evaluation of internal electrode material Table 3 below shows the crystal characteristics of the internal electrode material that can be used together with the AlN dielectric having an HCP crystal structure and a (0002) crystal plane, and the lattice mismatch rate (%) with the AlN dielectric.

[0148]

Table 3

[0149] Referring to Table 2, it can be confirmed that when Mo and W with a BCC crystal structure ((110) crystal plane), Ru and Ti with an HCP crystal structure ((0002) crystal plane), or Pt and Al with an FCC crystal structure ((111) crystal plane) are used as the internal electrode material, the lattice mismatch rate with the AlN dielectric is very low, 20% or less.

[0150] (Examples) Example 1-1 A base layer containing SiO2 is deposited by sputtering on a silicon wafer substrate. A seed layer (50 nm) containing AlN is deposited by sputtering on the base layer.

[0151] Mo (200 nm, second internal electrode) / AlN (400 nm, dielectric layer) / Ti (200 nm, first internal electrode) are deposited multiple times in sequence on the seed layer, and the layer deposited last is made of AlN, and an electrode-dielectric layer laminate is deposited by sputtering.

[0152] Thereafter, the electrode-dielectric layer laminate is grooved through a dry slope etching process.

[0153] Thereafter, Mo and Ti are wet-etched sequentially, and Al2O3 is filled into the cavity formed by the wet etching using an ALD process. Also, SiN is patterned on the upper stage of the electrode-dielectric layer laminate through a lift-off process.

[0154] Thereafter, Cu is deposited on the outside by sputtering to form an external electrode, thereby manufacturing a multilayer capacitor according to Example 1-1.

[0155] Example 1-2 A multilayer capacitor according to Example 1-2 is manufactured in the same manner as Example 1-1, except that Mo (200 nm) / Ti (50 nm), which is an internal electrode laminate, is deposited instead of the second internal electrode formed directly above the seed layer.

[0156] Example 1-3 A multilayer capacitor according to Example 1-3 is manufactured in the same manner as Example 1-1, except that no seed layer is introduced on the base layer, and Ti (50 nm) / Mo (200 nm), which is an internal electrode laminate, is deposited instead of the second internal electrode formed directly above the base layer.

[0157] Example 1-4 A laminated capacitor according to Example 1-4 is manufactured in the same manner as in Examples 1-3, except that a seed layer (50 nm) containing AlN is further deposited directly below the internal electrode laminate, directly above the base layer.

[0158] (Evaluation Example) Evaluation Example 1: Analysis of crystal orientation by internal electrode The FWHM of the dielectric layer included in the laminated capacitors according to Examples 1-1 to 1-4 is measured and shown in Table 4 below.

[0159]

Table 4

[0160] Referring to Table 4, it can be confirmed that the FWHM value of the dielectric layer is lower in Examples 1-2 and 1-4 to which the internal electrode laminate is applied than in Example 1-1 to which a single internal electrode is applied, and the c-axis crystal orientation is relatively more excellent.

[0161] Also, it can be confirmed that in Example 1-4 including the seed layer, the FWHM value of the dielectric layer is lower than that in Example 1-3 not including the seed layer, and the c-axis crystal orientation is relatively more excellent.

[0162] Also, in Table 5 below and FIG. 7, the FWHM of the dielectric layer included in the laminated capacitors according to Example 2-1 (without seed layer) and Example 2-2 (with seed layer) which differ only in the presence or absence of the AlN seed layer is measured and shown.

[0163]

Table 5

[0164] Referring to Table 5 and FIG. 7, it can be confirmed that in the laminated capacitor of Example 2-2 including the AlN seed layer, the FWHM value of the dielectric layer is low, and the c-axis crystal orientation is relatively more excellent than that of the laminated capacitor according to Example 2-1.

[0165] Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications can be made and implemented within the scope of the claims, the detailed description of the invention, and the accompanying drawings, and it is natural that these also belong to the scope of the present invention.

Description of Reference Numerals

[0166] 100: Multilayer capacitor 110: Substrate 120: Base layer 130: Dielectric layer 141: First internal electrode 142: Second internal electrode 143: Internal electrode laminate 161: First external electrode 162: Second external electrode 170: Seed layer

Claims

1. A multilayer capacitor including a dielectric layer containing an aluminum nitride (AlN)-based compound, wherein the aluminum nitride-based compound includes AlN or an AlN compound doped with Ni, Co, Mn, Cr, V, Zn, Re, Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or a combination thereof, the dielectric layer includes a plurality of dielectric crystallites, and the crystal orientation of the dielectric crystallites is a c-axis crystal orientation.

2. The multilayer capacitor according to claim 1, wherein the aluminum nitride-based compound includes AlN or an AlN compound doped with Sc, Er, Y, La, or a combination thereof.

3. The multilayer capacitor according to claim 1, wherein in the doped AlN compound, the content (at%) of the doped element is 1 at% or more and less than 30 at%.

4. The multilayer capacitor according to claim 1, wherein the aluminum nitride-based compound contained in the dielectric layer has a hexagonal (HCP) crystal structure and has a (0002) crystal plane.

5. The multilayer capacitor according to claim 1, wherein the average thickness of the dielectric layer is 20 nm to 400 nm.

6. The multilayer capacitor includes: a substrate; a base layer disposed on the substrate; a capacitor body including internal electrodes and dielectric layers disposed alternately on the base layer; and an external electrode located on the base layer and disposed outside the capacitor body.

7. The internal electrodes include a first internal electrode and a second internal electrode, the first internal electrode and the second internal electrode include a conductive metal including Mo, W, Ru, Ti, Pt, Al, or a combination thereof, and the types of the conductive metals included in the first internal electrode and the second internal electrode are different.

8. The multilayer capacitor according to claim 6, wherein the internal electrodes include a conductive metal having a body-centered cubic (BCC) crystal structure and a (110) crystal plane, a conductive metal having a hexagonal close-packed (HCP) crystal structure and a (0002) crystal plane, a conductive metal having a face-centered cubic (FCC) crystal structure and a (111) crystal plane, or a combination thereof.

9. The multilayer capacitor according to claim 6, further including an internal electrode laminate disposed between the base layer and the dielectric layer.

10. The laminated capacitor according to claim 6, wherein an average thickness of the internal electrode is 20 nm to 400 nm.

11. The laminated capacitor according to claim 6, further comprising a seed layer located between the base layer and the capacitor body.

12. A substrate; a base layer disposed on the substrate; a capacitor body including internal electrodes and dielectric layers disposed alternately on the base layer; and an external electrode located on the base layer and disposed outside the capacitor body, The dielectric layer includes aluminum nitride (AlN) or an aluminum nitride (AlN)-based compound in which AlN is doped with Ni, Co, Mn, Cr, V, Zn, Re, Ta, Nb, Ti, Zr, Mg, Sc, Er, Y, La, or a combination thereof. The dielectric layer includes a plurality of dielectric crystallites, and a crystal orientation of the dielectric crystallites is a c-axis crystal orientation. The internal electrode includes a first internal electrode and a second internal electrode. The first internal electrode and the second internal electrode include a conductive metal including Mo, W, Ru, Ti, Pt, Al, or a combination thereof. The laminated capacitor, wherein types of the conductive metal included in the first internal electrode and the second internal electrode are different.

13. The laminated capacitor according to claim 12, wherein the aluminum nitride-based compound includes AlN or an AlN compound doped with Sc, Er, Y, La, or a combination thereof.

14. The laminated capacitor according to claim 12, wherein, in the doped AlN compound, a content (at%) of a doped element is 1 at% or more and less than 30 at%.

15. The laminated capacitor according to claim 12, wherein the aluminum nitride-based compound included in the dielectric layer has a hexagonal system (HCP) crystal structure and has a (0002) crystal plane.

16. The laminated capacitor according to claim 12, wherein an average thickness of the dielectric layer is 20 nm to 400 nm.

17. The laminated capacitor according to claim 12, wherein the internal electrode includes a conductive metal having a BCC crystal structure and having a (110) crystal plane, a conductive metal having an HCP crystal structure and having a (0002) crystal plane, a conductive metal having an FCC crystal structure and having a (111) crystal plane, or a combination thereof.

18. The multilayer capacitor according to claim 12, further comprising an internal electrode laminate disposed between the base layer and the dielectric layer.

19. The multilayer capacitor according to claim 12, wherein an average thickness of the internal electrode is 20 nm to 400 nm.

20. The multilayer capacitor according to claim 12, further comprising a seed layer positioned between the base layer and the capacitor body.

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