Power converter
The GND common type dual inverter configuration with shared negative power supply lines and zero-phase voltage control effectively addresses the challenges of component count and ripple excitation in dual-inverter systems, enhancing motor control and reducing costs in applications with fluctuating power supplies.
Patent Information
- Application Number
- JP2024001635
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-10
- Publication Date
- 2025-07-23
AI Technical Summary
Conventional dual-inverter type power conversion devices for motors with open-end windings suffer from large component counts, difficulty in reducing cost and size, and excitation of zero-phase current ripples, particularly in applications with fluctuating power supplies.
A power conversion device utilizing a GND common type dual inverter configuration with shared negative power supply lines and a control mechanism to minimize zero-phase voltage fluctuations by applying differential voltage between primary and secondary inverters, connected to a DC power supply and a capacitor, respectively.
This configuration expands the drivable region with respect to input voltage changes, reduces component mounting area, and minimizes switching ripple excitation, leading to cost reduction and effective motor control.
Smart Images

Figure 2025108035000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a power conversion device that applies an AC output to a motor having a winding with an open-end structure where both ends are open, using two inverters, a primary-side inverter and a secondary-side inverter.
Background Art
[0002] For example, when driving an electric compressor used in an air conditioning device of an electric vehicle such as an electric vehicle or a hybrid vehicle, a three-phase permanent magnet synchronous motor is used. However, in a motor control method of three-phase modulation using an inverter, vector control for controlling the d-axis current i d and the q-axis current i q is common.
[0003] Here, when the input voltage of a motor driven by an inverter decreases, the drivable rotational speed decreases, or the output torque that can be output at a high rotational speed decreases. Therefore, the drivable range at high speeds tends to become narrow. In the above-described in-vehicle electric compressor that drives a compression mechanism with a motor housed in a housing, the required range of the input voltage was not wide in the past, but in recent years, the requirements for the drivable region with respect to changes in the input voltage have become stricter even for electric compressors.
[0004] However, in an in-vehicle electric compressor, since the battery of the electric vehicle is used as a DC power source, the input voltage may decrease. When the input voltage decreases, the output torque that can be output in a high rotational speed region becomes low.
[0005] Therefore, as a method of increasing the output voltage to the motor with respect to the input voltage, a so-called open-end winding structure motor having a plurality of stator windings with both ends open (a motor with the neutral point of the motor led out to the outside without being connected) is sandwiched between two inverters on the primary side and the secondary side, and a dual-inverter type power conversion device that applies the differential voltage between the primary-side inverter and the secondary-side inverter to the motor and drives it has been variously proposed (see, for example, Patent Document 1 and Patent Document 2).
Prior Art Documents
Patent Documents
[0006]
Patent Document 1
Patent Document 2
Summary of the Invention
Problems to be Solved by the Invention
[0007] In a dual-inverter type power conversion device that drives a motor with an open-end winding structure, since there are two inverters on the primary side and the secondary side, there is a degree of freedom in how to distribute the voltage command value to the two inverters.
[0008] And the conventional dual-inverter type power conversion device can be roughly classified into three types shown in FIGS. 19 to 21. FIG. 19 is a power conversion device of a general power supply common type dual inverter. In FIG. 19, M is a motor having a winding with the above open-end structure, INV1 is a primary side inverter, INV2 is a secondary side inverter, and the stator winding of the motor M is sandwiched between these.
[0009] The power supply common type dual inverter is the simplest method, and the power supplies on the primary side and the secondary side are made common. Since there is one power supply, the withstand voltages of all semiconductor elements and passive elements (such as capacitors) on the primary side and the secondary side need to be set according to the power supply voltage. Also, since there is a path through which zero-phase current flows, it is necessary to take measures against zero-phase current, but both the primary side and the secondary side can output active power P and reactive power Q.
[0010] In addition, in the case of this method, since a common power supply is used on the primary side and the secondary side, 1 / 2 of the voltage command value is output by each inverter INV1 and INV2.
[0011] Next, FIG. 20 shows a power conversion device of an insulated power supply type dual inverter. Also in FIG. 20, M is a motor having a winding with an open end structure, INV1 is a primary side inverter, and INV2 is a secondary side inverter. These sandwich the stator winding of the motor M. In this method, two insulated power supplies are arranged on the primary side and the secondary side respectively. Since it is necessary to prepare two insulated power supplies, there is a concern about the increase in size. However, there are advantages that no zero-phase current flows and both the primary side and the secondary side can output active power P and reactive power Q.
[0012] In addition, in this method, since the primary side and the secondary side are driven by separate power supplies (voltages), the output will be according to the ratio of the voltages. For example, if the voltage V dc1 of the primary side power supply is half of the voltage V dc2 of the secondary side power supply, the primary side inverter INV1 will output 1 / 3 of the voltage command value, and the secondary side inverter INV2 will output 2 / 3 of the voltage command value.
[0013] Next, FIG. 21 shows a power conversion device of a floating capacitor type dual inverter. Also in FIG. 21, M is a motor having a winding with an open end structure, INV1 is a primary side inverter, and INV2 is a secondary side inverter. These sandwich the stator winding of the motor M. In this method, a floating capacitor C is arranged in the secondary side inverter, and the secondary side voltage is controlled by charging and discharging the capacitor from the motor side.
[0014] The floating capacitor method is characterized in that the secondary side voltage can be controlled and no zero-phase current flows. On the other hand, in order to drive the switching elements of the secondary side inverter, it is necessary to separately prepare an additional power supply for driving.
[0015] Also, since the power supply of the secondary side inverter is a capacitor, it can only supply reactive power Q. Therefore, the primary side inverter INV1 outputs the effective voltage V real of the voltage command value, and the secondary side inverter INV2 outputs the reactive voltage V imagis output. Also, the invalid voltage V that cannot be output by the secondary inverter INV2 imag will also be borne by the primary inverter INV1.
[0016] In the power conversion device of the floating capacitor type dual inverter shown in Fig. 21, since the primary inverter INV1 can output active power P and reactive power Q, and the secondary inverter INV2 can only output reactive power Q, the voltage command values of the primary inverter INV1 and the secondary inverter INV2 are distributed by the following mathematical formulas (I) and (II) under the control as shown in the block diagram of Fig. 22 to drive the motor M.
[0017] [Number]
[0018] In addition, in Fig. 22, mathematical formulas (I) and (II), v d ref is the d-axis voltage command value, v q ref is the q-axis voltage command value, i d is the d-axis current, i q is the q-axis current, θ Im is the motor current phase, V real is the effective voltage, V imag is the invalid voltage, v d1 ref is the d-axis voltage command value of the primary inverter INV1, v q1 ref is the q-axis voltage command value of the primary inverter INV1, v d2 ref is the d-axis voltage command value of the secondary inverter INV2, v q2 ref is the q-axis voltage command value of the secondary inverter INV2.
[0019] Furthermore, in the power conversion device of the floating capacitor type dual inverter, in addition to driving the motor M, it is necessary to control the DC link voltage of the secondary inverter INV2, that is, the secondary voltage Vdc2, and the components of the voltage vector required for charging the capacitor C will be added.
[0020] In this case, in the power conversion device of the floating capacitor type dual inverter, since no zero-phase current flows, the motor current I m and the voltage vector are used to control the secondary-side voltage V dc2 That is, as shown in FIG. 23, by controlling the phase difference of the voltage vector between the primary-side inverter INV1 and the secondary-side inverter INV2, etc., the charging mode and the discharging mode of the secondary-side voltage V dc2 are controlled.
[0021] Specifically, the output voltage vector V2 of the secondary-side inverter INV2 is advanced by 90 degrees with respect to the current phase and brought closer to the current phase (+β) for the charging mode, and further advanced in phase (-β) for the discharging mode. In addition to this method, there are various ways of setting the phase difference and vector distribution methods. In such a power conversion device of a floating capacitor type dual inverter, since the capacitor C provided in the secondary-side inverter INV2 can drive the motor M while boosting the voltage, there is an advantage that the voltage that can be applied to the motor M can be made higher than that of the power supply common type.
[0022] However, all of the conventional dual inverter type power conversion devices described above have a large number of components, and it is difficult to reduce the cost and size. In particular, in the power conversion device of the floating capacitor type dual inverter, since the secondary-side inverter INV2 has a floating potential, in addition to the gate drive power supply of the switching element of the primary-side inverter INV1, a gate drive power supply (insulated power supply) for the switching element of the secondary-side inverter INV2 with a different reference potential needs to be created. In devices with limited board area, such as in-vehicle electric compressors, it has been difficult to adopt them in terms of component mounting area and cost.
[0023] Therefore, the applicant previously proposed a power conversion device as shown in FIG. 1. In this method, the positive-side power supply line of the power supply common type shown in FIG. 19 is separated by the primary-side inverter INV1 and the secondary-side inverter INV2, and only the negative-side power supply line is made common, and a capacitor is arranged on the secondary side like the floating capacitor type shown in FIG. 21. Hereinafter, this type of power conversion device is referred to as a GND common type dual inverter. In this method, the secondary-side voltage can be controlled in the same manner as the control of the power conversion device of the floating capacitor type dual inverter described with reference to FIGS. 22 and 23. And since the secondary-side voltage can be stepped up and down, the operating range can be expanded by stepping up the secondary-side voltage.
[0024] Also, in the power conversion device of the GND common type dual inverter, it is possible to make the power supply of the drive circuit of the secondary-side inverter INV2 common in the same manner as the power supply common type. And it is possible to configure the primary-side inverter INV1 on the power supply side with high withstand voltage components and the controllable secondary-side inverter INV2 with low withstand voltage components, and the GND common type in which the power supply of the drive circuit of the secondary-side inverter INV2 can be made common with the primary-side inverter INV1 has great advantages in applications where the power supply voltage fluctuates greatly.
[0025] However, in such a power conversion device of the GND common type dual inverter, there is a problem that a zero-phase current flows. In particular, when the secondary-side voltage is boosted and driven, the instantaneous potential difference due to PWM of the primary-side inverter INV1 and the secondary-side inverter INV2 tends to increase, so a zero-phase current ripple is excited. Since the impedance of this zero phase is small compared to the impedance of the three phases (UVW phases), a large current ripple is excited by the instantaneous zero-phase voltage fluctuation caused by the switching of the primary-side inverter INV1 and the secondary-side inverter INV2, and there is a concern about an increase in loss and conduction noise. In addition, since the current amplitude increases due to the ripple, it is necessary to increase the maximum rated current.
[0026] The present invention has been made to solve such conventional technical problems, and provides a power conversion device capable of minimizing the excitation of switching ripples in the above GND common type dual inverter.
Means for Solving the Problems
[0027] The power conversion device of the present invention includes a primary side inverter connected to one end of a winding having an open end structure of a motor, and a secondary side inverter connected to the other end of the winding, and applies a differential voltage between the primary side inverter and the secondary side inverter to the motor. The primary side inverter is connected to a DC power supply, the secondary side inverter is connected to a capacitor, the negative power supply lines of the primary side inverter and the secondary side inverter are shared, and the zero-phase voltage v z1 of the primary side inverter and the zero-phase voltage v z2 of the secondary side inverter, and is characterized by including a control device for eliminating or suppressing fluctuations in the zero-phase voltage v z which is the potential difference.
[0028] The power conversion device of the invention according to claim 2, in the above invention, the primary side inverter and the secondary side inverter are each composed of a plurality of switching elements. The positive input terminal of the primary side inverter is connected to the positive power supply line of the DC power supply, the negative input terminal of the primary side inverter is connected to the negative power supply line of the DC power supply, the output terminal of the primary side inverter is connected to one end of the winding, the output terminal of the secondary side inverter is connected to the other end of the winding, a capacitor is connected between the positive input terminal and the negative input terminal of the secondary side inverter, the positive input terminal of the secondary side inverter is not connected to the positive power supply line of the DC power supply, the negative input terminal of the secondary side inverter is connected to the negative power supply line of the DC power supply, and by switching each switching element by a control device, it is characterized by generating an AC output from the DC power supply.
[0029] The power conversion device of the invention according to claim 3, in the invention according to claim 1, the control device is based on the secondary side voltage command value v dc2 ref to obtain a zero-phase current command value i zref A secondary-side voltage control unit that generates z ref a zero-phase voltage command value v based on the zero-phase current command value i z ref A z-axis current control unit that generates dq ref a primary-side output voltage vector command value and a secondary-side output voltage vector command value from the dq-axis voltage command value v uvw1 ref a primary-side output voltage command value v for switching the primary-side inverter from the primary-side output voltage vector command value uvw2 ref An output voltage command generation unit that generates a secondary-side output voltage command value v for switching the secondary-side inverter from the secondary-side output voltage vector command value, and is characterized by having.
[0030] In the power conversion device according to the invention of claim 4, in the above invention, the output voltage command generation unit decomposes the dq-axis voltage command value v dq ref into an active voltage V real and a reactive voltage V imag uses the active voltage V real as the primary-side output voltage vector command value, and uses the reactive voltage V imag as the secondary-side output voltage vector command value, and is characterized by this.
[0031] In the power conversion device according to the invention of claim 5, in the invention of claim 3, the control device includes a primary-side modulation unit that generates a switching signal for the primary-side inverter from the primary-side output voltage command value v uvw1 ref and a secondary-side modulation unit that generates a switching signal for the secondary-side inverter from the secondary-side output voltage command value v uvw2 ref and is characterized by having.
[0032] In the power conversion device of the invention according to claim 6, in the above invention, the secondary side modulation unit performs pulse width modulation that outputs only odd voltage vectors during one control period, or pulse width modulation that outputs only even voltage vectors during one control period, or pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors during one control period and pulse width modulation that outputs only even voltage vectors during one control period according to the voltage vector command value, and generates a switching signal, thereby eliminating or suppressing fluctuations in the zero-phase voltage.
[0033] In the power conversion device of the invention according to claim 7, in the above invention, the primary side modulation unit performs pulse width modulation that aligns the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase to generate a switching signal, thereby eliminating or suppressing fluctuations in the zero-phase voltage.
[0034] In the power conversion device of the invention according to claim 8, in the invention according to claim 6 or claim 7, the output voltage command generation unit adds the sum of the zero-phase voltage command value v z ref and the zero-phase voltage v z2 of the secondary side inverter to the primary side output voltage vector command value.
[0035] In the power conversion device of the invention according to claim 9, in the invention according to claim 5, the primary side modulation unit and the secondary side modulation unit perform pulse width modulation that aligns the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase to generate a switching signal, thereby eliminating or suppressing fluctuations in the zero-phase voltage.
[0036] In the power conversion device of the invention according to claim 10, in the above invention, the output voltage command generation unit distributes and adds the zero-phase voltage command value v z ref to the primary side output voltage vector command value and the secondary side output voltage vector command value.
[0037] The power conversion device according to the invention of claim 11 is characterized in that, in the above invention, the output voltage command generation unit has a case where the gain M1 distributed to the primary side output voltage vector command value is 1 and the gain M2 distributed to the secondary side output voltage vector command value is 0.
[0038] The power conversion device according to the invention of claim 12 is characterized in that, in the invention of claim 10, the output voltage command generation unit has a case where the gain M1 distributed to the primary side output voltage vector command value is 0 and the gain M2 distributed to the secondary side output voltage vector command value is 1.
[0039] The power conversion device according to the invention of claim 13 is characterized in that, in the invention of claim 5, the primary side modulation unit performs any one of pulse width modulation that outputs only odd voltage vectors during one control period, or pulse width modulation that outputs only even voltage vectors during one control period, or pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors during one control period according to the voltage vector command value and pulse width modulation that outputs only even voltage vectors during one control period, to generate a switching signal, thereby eliminating or suppressing the fluctuation of the zero-phase voltage.
[0040] The power conversion device according to the invention of claim 14 is characterized in that, in the above invention, the secondary side modulation unit performs pulse width modulation that matches the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase to generate a switching signal, thereby eliminating or suppressing the fluctuation of the zero-phase voltage.
[0041] The power conversion device according to the invention of claim 15 is characterized in that, in the invention of claim 13 or claim 14, the output voltage command generation unit adds the sum of the zero-phase voltage command value v z ref and the zero-phase voltage v z1 of the primary side inverter to the secondary side output voltage vector command value.
Advantages of the Invention
[0042] According to the present invention, in a power conversion device that includes a primary-side inverter connected to one end of a winding having an open-end structure of a motor and a secondary-side inverter connected to the other end of the winding, and applies a differential voltage between the primary-side inverter and the secondary-side inverter to the motor, the primary-side inverter is connected to a DC power supply, the secondary-side inverter is connected to a capacitor, and the negative power supply lines of the primary-side inverter and the secondary-side inverter are commoned. By using the GND common type dual inverter described above, the capacitor is charged by the secondary-side inverter via the motor from the DC power supply, and an AC output is applied to the motor using the voltage charged in the capacitor by the secondary-side inverter. Thus, it becomes possible to expand the drivable region with respect to changes in the input voltage.
[0043] Further, in the power conversion device of the GND common type dual inverter, as in the invention of claim 2, the positive input terminal of the secondary-side inverter is not connected to the positive power supply line of the DC power supply, and the negative input terminal of the secondary-side inverter is connected to the negative power supply line of the DC power supply. Therefore, the secondary-side inverter does not have a floating potential, and the reference voltages of the primary-side inverter and the secondary-side inverter become the same.
[0044] As a result, it becomes unnecessary to create a gate drive power supply (isolated power supply) for the switching element of the secondary-side inverter separately from the gate drive power supply (isolated power supply) for the switching element of the primary-side inverter. The switching element of the primary-side inverter and the switching element of the secondary-side inverter can be switched by a common gate drive power supply. Thus, it becomes possible to expand the drivable region with respect to changes in the input voltage without using a separate boost converter or the like.
[0045] In addition, since it becomes unnecessary to create a gate drive power supply for each inverter, an increase in the component mounting area can be suppressed, and miniaturization and cost reduction can be achieved. Therefore, in devices such as in-vehicle electric compressors where the input voltage changes greatly, the requirement for cost reduction is strong, and the substrate area is limited and miniaturization of the power conversion device is required, it is extremely effective.
[0046] In particular, in the present invention, the control device uses the zero-phase voltage v of the primary-side inverter z1 and the zero-phase voltage v of the secondary-side inverter z2 to cancel or suppress the variation of the zero-phase voltage v, which is the potential difference therebetween z . Therefore, especially when the secondary-side voltage is driven in a boost state, the excitation of the switching ripple can be minimized to reduce the current amplitude, preventing an increase in loss and conduction noise and eliminating the need to increase the maximum rated current.
[0047] Also, as in the invention of claim 3, the control device includes a secondary-side voltage control unit that generates a zero-phase current command value i dc2 ref based on the secondary-side voltage command value v z ref , a z-axis current control unit that generates a zero-phase voltage command value v z ref based on the zero-phase current command value i z ref , and an output voltage command generation unit that generates a primary-side output voltage vector command value and a secondary-side output voltage vector command value from the dq-axis voltage command values v dq ref , generates a primary-side output voltage command value v uvw1 ref for switching the primary-side inverter from the primary-side output voltage vector command value, and generates a secondary-side output voltage command value v uvw2 ref for switching the secondary-side inverter from the secondary-side output voltage vector command value. With such a configuration, stable secondary-side voltage control and motor drive control can be performed.
[0048] In this case, for example, as in the invention of claim 4, the output voltage command generation unit decomposes the dq-axis voltage command values v dq ref into an active voltage V real and a reactive voltage V imag , uses the active voltage V real as the primary-side output voltage vector command value, and uses the reactive voltage V imag as the secondary-side output voltage vector command value.
[0049] Furthermore, like the invention of claim 5, the control device generates a switching signal of the primary-side inverter from the primary-side output voltage command value v uvw1 ref and has a primary-side modulation unit that generates a switching signal of the primary-side inverter from the primary-side output voltage command value v, and a secondary-side modulation unit that generates a switching signal of the secondary-side inverter from the secondary-side output voltage command value v uvw2 ref and is configured to have a secondary-side modulation unit that generates a switching signal of the secondary-side inverter from the secondary-side output voltage command value v
[0050] Then, for example, like the invention of claim 6, the secondary-side modulation unit outputs only odd voltage vectors during one control period, or outputs only even voltage vectors during one control period, or outputs only odd voltage vectors during one control period according to the voltage vector command value and outputs only even voltage vectors during one control period. By executing any of the pulse width modulations that switch between them to generate a switching signal, the fluctuation of the zero-phase voltage is eliminated or suppressed, so that the excitation of the switching ripple can be effectively suppressed
[0051] Furthermore, in addition to that, like the invention of claim 7, the primary-side modulation unit executes pulse width modulation that matches the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase to generate a switching signal, so that the fluctuation of the zero-phase voltage is eliminated or suppressed, so that the excitation of the switching ripple can be more effectively suppressed
[0052] In that case, like the invention of claim 8, the output voltage command generation unit adds the sum of the zero-phase voltage command value v z ref and the zero-phase voltage v z2 of the secondary-side inverter to the primary-side output voltage vector command value
[0053] Also, like the invention of claim 9, by executing pulse width modulation in which the primary modulation unit and the secondary modulation unit match the timings of the fall and rise of the phase voltage of another phase with the rise and fall of the phase voltage of a specific phase to generate a switching signal, it becomes possible to effectively suppress the excitation of switching ripple even if the fluctuation of the zero-phase voltage is eliminated or suppressed.
[0054] In that case, like the invention of claim 10, the output voltage command generation unit distributes and adds the zero-phase voltage command value v z ref to the primary-side output voltage vector command value and the secondary-side output voltage vector command value, and like the invention of claim 11, there is a case where the gain M1 distributed to the primary-side output voltage vector command value is 1 and the gain M2 distributed to the secondary-side output voltage vector command value is 0, and like the invention of claim 12, there is a case where the gain M1 distributed to the primary-side output voltage vector command value is 0 and the gain M2 distributed to the secondary-side output voltage vector command value is 1. By doing so, the degree of freedom of control increases, but if the gain distributed to the inverter with a high DC link voltage is 1 and the gain distributed to the inverter with a low DC link voltage is 0, the zero-phase voltage command value v z ref is borne by the inverter with the higher voltage, and there is an effect that the operation range can be ensured.
[0055] Also, like the invention of claim 13, by executing any one of pulse width modulation in which the primary modulation unit outputs only odd voltage vectors during one control period, or pulse width modulation in which only even voltage vectors are output during one control period, or pulse width modulation that switches between pulse width modulation in which only odd voltage vectors are output during one control period and pulse width modulation in which only even voltage vectors are output during one control period according to the voltage vector command value, to generate a switching signal, it becomes possible to effectively suppress the excitation of switching ripple even if the fluctuation of the zero-phase voltage is eliminated or suppressed.
[0056] In addition, like the invention of claim 14, the secondary side modulation unit executes pulse width modulation that aligns the rising and falling timing of the phase voltage of another phase with the rising and falling of the phase voltage of a specific phase to generate a switching signal, thereby eliminating or suppressing fluctuations in the zero-phase voltage, and further effectively suppressing the excitation of switching ripple.
[0057] In that case, like the invention of claim 15, the output voltage command generation unit adds the sum of the zero-phase voltage command value v z ref and the zero-phase voltage v z1 of the primary side inverter to the secondary side output voltage vector command value.
Brief Description of the Drawings
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Embodiments for Carrying Out the Invention
[0059] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. (1) Power conversion device 1 FIG. 1 is an electrical circuit diagram of a power conversion device 1 of a GND common type dual inverter to which the present invention is applied. The power conversion device 1 of the embodiment converts the DC voltage V of a DC power supply (for example, a high-voltage battery of an electric vehicle) 2 dc (for example, DC500V) into a three-phase AC voltage (AC output) and supplies it to the motor M. The motor M of the embodiment includes a stator with windings and a rotor with a built-in magnet that rotates inside the stator, and is a three-phase permanent magnet synchronous motor (Interior Permanent Magnet Synchronous Motor) that drives an electric compressor used in an air conditioning device of an electric vehicle such as an electric vehicle or a hybrid vehicle. Note that the DC voltage V of the DC power supply 2 dc is the primary side voltage V dc1 described later.
[0060] In the case of the embodiment, the power conversion device 1 includes a three-phase primary side inverter INV1 composed of upper and lower arm switching elements 3A to 3F, a three-phase secondary side inverter INV2 composed of upper and lower arm switching elements 4A to 4F, a control device 6 (FIG. 2), and the like. Note that each of the switching elements 3A to 3F and 4A to 4F is composed of an insulated gate bipolar transistor (IGBT) incorporating an MOS structure in the gate portion in the embodiment.
[0061] In the present invention, the primary side inverter INV1 and the secondary side inverter INV2 convert the DC voltage V of the DC power supply 2 dc into a three-phase AC voltage (AC output), and apply the differential voltage between the inverters INV1 and INV2 to the windings (stator windings) 7U, 7V, and 7W of the motor M. Here, the windings 7U, 7V, and 7W of the motor M have an open-end structure that is not bundled at the neutral point.
[0062] (2) Primary side inverter INV1 The primary-side inverter INV1 has a half-bridge circuit 9U for the U phase, a half-bridge circuit 9V for the V phase, and a half-bridge circuit 9W for the W phase. Each half-bridge circuit 9U-9W of each phase individually has the upper-arm switching elements 3A-3C and the lower-arm switching elements 3D-3F described above. Further, each of the switching elements 3A-3F incorporates a freewheeling diode connected in antiparallel.
[0063] And the collector electrodes of the upper-arm switching elements 3A-3C, which are the positive input terminals of the primary-side inverter INV1, are connected to the positive power line 11 (HV+) of the DC power supply 2. On the other hand, the emitter electrodes of the lower-arm switching elements 3D-3F, which are the negative input terminals of the primary-side inverter INV1, are connected to the negative power line 12 (HV-) of the DC power supply 2. Note that 13 in the figure is a capacitor connected between the positive power line 11 and the negative power line 12, which constitutes a noise filter.
[0064] For the primary-side inverter INV1, the emitter electrode of the upper-arm switching element 3A of the half-bridge circuit 9U for the U phase and the collector electrode of the lower-arm switching element 3D are connected, and the connection point (arm midpoint: the output terminal of the primary-side inverter INV1) is connected to one end of the winding 7U of the U phase of the motor M.
[0065] Also, the emitter electrode of the upper-arm switching element 3B of the half-bridge circuit 9V for the V phase and the collector electrode of the lower-arm switching element 3E are connected, and the connection point (arm midpoint: the output terminal of the primary-side inverter INV1) is connected to one end of the stator winding 7V of the V phase of the motor M.
[0066] Furthermore, the emitter electrode of the upper-arm switching element 3C of the half-bridge circuit 9W for the W phase and the collector electrode of the lower-arm switching element 3F are connected, and the connection point (arm midpoint: the output terminal of the primary-side inverter INV1) is connected to one end of the stator winding 7W of the W phase of the motor M.
[0067] (3) Secondary-side inverter INV2 The secondary-side inverter INV2 also includes three half-bridge circuits 16U, 16V, and 16W corresponding to each phase of UVW. And the neutral points of each phase of the motor M are not bundled, and the half-bridge circuits 9U to 9W of the primary-side inverter INV1 and the half-bridge circuits 16U to 16W of the secondary-side inverter INV2 are configured to sandwich the windings 7U to 7W of the motor M.
[0068] The half-bridge circuits 16U to 16W of the secondary-side inverter INV2 also individually have upper-arm switching elements 4A to 4C and lower-arm switching elements 4D to 4F. Also, each of the switching elements 4A to 4F incorporates a freewheeling diode connected in antiparallel.
[0069] And a capacitor C (capacitor) is connected between the collector electrodes of the upper-arm switching elements 4A to 4C, which are the positive input terminals of the secondary-side inverter INV2, and the emitter electrodes of the lower-arm switching elements 4D to 4F, which are the negative input terminals of the secondary-side inverter INV2.
[0070] However, the collector electrodes of the upper-arm switching elements 4A to 4C, which are the positive input terminals of the secondary-side inverter INV2, are not connected to the positive power line 11 of the DC power supply 2 and are disconnected. On the other hand, in the present invention, the emitter electrodes H of the lower-arm switching elements 4D to 4F, which are the negative input terminals of the secondary-side inverter INV2, are connected to the negative power line 12 of the DC power supply 2.
[0071] And the emitter electrode of the upper-arm switching element 4A and the collector electrode of the lower-arm switching element 4D of the U-phase half-bridge circuit 16U are connected, and their connection point (arm midpoint: output terminal of the secondary-side inverter INV2) is connected to the other end of the U-phase winding 7U of the motor M.
[0072] Also, the emitter electrode of the upper arm switching element 4B of the V-phase half-bridge circuit 16V is connected to the collector electrode of the lower arm switching element 4E, and the connection point thereof (arm midpoint: output end of the secondary inverter INV2) is connected to the other end of the stator winding 7V of the V-phase of the motor M.
[0073] Furthermore, the emitter electrode of the upper arm switching element 4C of the W-phase half-bridge circuit 16W is connected to the collector electrode of the lower arm switching element 4F, and the connection point thereof (arm midpoint: output end of the secondary inverter INV2) is connected to the other end of the stator winding 7W of the W-phase of the motor M. That is, the power conversion device 1 of the present invention has the configuration of the GND common type dual inverter method described above.
[0074] (4) Control device 6 Next, FIG. 2 shows a block diagram of the control device 6. The control device 6 of the embodiment is composed of a microcomputer having a processor, and receives a speed command value ω rm ref and a secondary voltage command value v dc2 ref from the ECU of the electric vehicle, and inputs the phase current of the motor M from a current sensor (not shown), and based on these, controls the ON / OFF states of the switching elements 3A to 3F and 4A to 4F of the primary inverter INV1 and the secondary inverter INV2 (switching).
[0075] Specifically, the gate voltage applied to the gates of the switching elements 3A to 3F and 4A to 4F is controlled. Further, the control device 6 of the embodiment has a configuration including a speed control unit 21, a dqz-axis current control unit 22 as the z-axis current control unit in the present invention, an output voltage command generation unit 23, a primary modulation unit 24, a secondary modulation unit 26, a secondary voltage control unit 27, and the like.
[0076] The speed control unit 21 calculates and outputs a q-axis current command value i q by using the PI operation and the relational expression between the q-axis current i q ref and torque. Also, the secondary voltage control unit 27 has a secondary voltage command value vdc2 ref Based on this, a zero-phase current command value i z ref is generated.
[0077] The dqz-axis current control unit 22 calculates and outputs a d-axis voltage command value v d ref and a q-axis voltage command value v q ref by means of PI calculation and non-interference control. In this case, in the dqz-axis current control unit 22, basically, the d-axis current command value i d ref and the d-axis current i d (estimated value), the q-axis current command value i q ref and the q-axis current i q (estimated value) are used to eliminate the deviation in the direction of the d-axis voltage command value v d ref and the q-axis voltage command value v q ref are calculated.
[0078] Also, the dqz-axis current control unit 22 as the z-axis current control unit in the present invention generates and outputs a zero-phase voltage command value v dc2 for flowing a secondary-side DC link current (in the present invention, the zero-phase current i dc2 ref is adopted as an index indicating the secondary-side DC link current) necessary to control the secondary-side voltage V z to the secondary-side voltage command value V z ref .
[0079] Then, the output voltage command generation unit 23 uses the d-axis current i d (estimated value) and the q-axis current i q (estimated value), the d-axis voltage command value v d ref and the q-axis voltage command value v q ref output by the dqz-axis current control unit 22, and the above zero-phase voltage command value v z ref to switch each switching element 3A to 3F of the primary-side inverter INV1, and generates a primary-side output voltage command value v u1 ref and v v1ref , v w1 ref and a secondary-side output voltage command value v for switching each of the switching elements 4A to 4F of the secondary-side inverter INV2. u2 ref , v v2 ref , v w2 ref The operations of the secondary side voltage control unit 27, the dqz axes current control unit 22, and the output voltage command generating unit 23 will be described in detail later.
[0080] The primary side modulator 24 outputs a primary side output voltage command value v u1 ref , v v1 ref , v w1 ref The secondary side modulator 26 generates and outputs a primary side inverter switching signal (PWM signal) for switching (PWM control) each of the switching elements 3A to 3F of the primary side inverter INV1. u2 ref , v v2 ref , v w2 ref The primary side modulator 24 generates and outputs a secondary side inverter switching signal (PWM signal) for switching (PWM control) each of the switching elements 4A to 4F of the secondary side inverter INV2. The operations of the primary side modulator 24 and the secondary side modulator 26 will also be described in detail later. EXAMPLES
[0081] (5) Configurations and operations of the dqz-axis current control unit 22, the output voltage command generation unit 23, the primary side modulation unit 24, and the secondary side modulation unit 25 Next, the operations of the dqz-axis current control unit 22, the output voltage command generating unit 23, the primary side modulation unit 24, and the secondary side modulation unit 25 of this embodiment will be described with reference to Fig. 3 to Fig. 9. Here, the equivalent circuit of the zero-phase component of the power conversion device 1 of Fig. 1 is shown in the lower part of Fig. 3. This equivalent circuit in the lower part of Fig. 3 can be regarded as a chopper circuit of a step-down chopper and a step-up chopper.
[0082] Also, in the figure, V dc1 is the primary side voltage described above, which is the DC voltage of the DC power supply 2. Also, C dc2 is the capacitance of the capacitor C, and L z is the self-inductance of the z-axis of the motor M, and R a is the internal resistance.
[0083] From this equivalent circuit, the zero-phase voltage v z1 of the primary side inverter INV1 and the zero-phase voltage v z2 of the secondary side inverter INV2, the zero-phase voltage v z (=v z1 -v z2 ) controls the zero-phase current i z to control the secondary side voltage v dc2 It can be seen that it is possible. Therefore, the control device 6 in the present invention adopts the zero-phase current i z as an index indicating the secondary side DC link current. This is based on the fact that the zero-phase current i z substantially coincides with the secondary side DC link current.
[0084] Assuming that the zero-phase component (z-axis) of the power conversion device 1 can be equivalently represented as a chopper circuit as described above, when the controller (controller) and the control object (plant model) of the power conversion device 1 in FIG. 1 are modeled, it becomes as shown in FIG. 4. In this case, the plant model of the control object assumes an LR load for the dq axis for the model from the voltage (the following v z -e z ) to the current (zero-phase current i z ), and the model from the zero-phase current i z to the secondary side voltage V dc2 is modeled as a simple capacitor. Also, ω re is the electrical angular velocity, and θ re is the rotor position (rotor position).
[0085] Also, for the control system, the voltage PI control system 33 that performs secondary side voltage control outputs the zero-phase current command value i z ref and the zero-phase current i zThe current PI control system 34 that controls z ref outputs. Then, the induced voltage component e excited on the z-axis by the rotation of the motor M z The decoupling voltage command value e that compensates z est is added to the zero-phase voltage command value v z ref and output as the zero-phase voltage v z . Thus, as described above, the controller can be designed for the power conversion device 1 in FIG. 1.
[0086] In addition, the control of the secondary-side voltage V by the z-axis control system as described above dc2 depends on the controllability of the zero-phase current i z . In the model of FIG. 4, since PI control is applied, it has sufficient performance to control the DC component (direct current component) of the secondary-side voltage V dc2 . However, due to parameter errors etc. of the decoupling voltage command value e z est , if a ripple occurs in the zero-phase current zero-phase current i z , a ripple will also be excited in the secondary-side voltage V dc2 . Therefore, from the viewpoint of voltage quality, by adopting a controller that suppresses the AC component (periodic disturbance component), such as periodic disturbance suppression control, sine wave tracking control, repetitive control, etc., advanced current control can be performed.
[0087] The block diagram of the output voltage command generation unit 23 designed by the above modeling is shown in FIG. 5. In addition, the voltage PI control system 33 in FIG. 4 constitutes the secondary-side voltage control unit 27 in FIG. 2, and this secondary-side voltage control unit 27 outputs the zero-phase current command value i z ref (the secondary-side DC link current command value required to control the secondary-side voltage V dc2 ). Also, the current PI control system 34 in FIG. 4 constitutes a part of the dqz-axis current control unit 22 in FIG. 2, and this dqz-axis current control unit 22 controls the zero-phase current i z (the secondary-side DC link current) to the zero-phase current command value i z ref (the secondary-side DC link current command value), and the zero-phase voltage command value v zref Output it.
[0088] In the case of the embodiment, in the current PI control system 34 that constitutes the dqz-axis current control unit 22, the zero-phase current command value i z ref from the zero-phase current i z is fed back and the subtracted value is input. Then, the current PI control system 34 of the dqz-axis current control unit 22 is the zero-phase current command value i z ref and the zero-phase current i z and calculates a zero-phase voltage command value v z ref in the direction of eliminating the difference between them, and controls the zero-phase current i z to the zero-phase current command value i z ref .
[0089] And the block shown on the left side of FIG. 5 is the output voltage command generation unit 22 of FIG. 2. The basic control block of this output voltage command generation unit 22 is the same as that of the floating capacitor type dual inverter power conversion device shown in FIG. 22. That is, the output voltage command generation unit 22 of this embodiment has an active / inactive decomposition unit 36, and this active / inactive decomposition unit 36 decomposes the d-axis voltage command value v d ref and the q-axis voltage command value v q ref into the active voltage V real and the reactive voltage V imag by the above-mentioned mathematical formula (I). This active voltage V real is an example of the primary-side output voltage vector command value in the present invention, and the reactive voltage V imag is an example of the secondary-side output voltage vector command value in the present invention.
[0090] The output voltage command generation unit 22 uses the above-mentioned mathematical formula (II) to set the active voltage V real decomposed as described above as the d-axis voltage command value v d1 ref of the primary-side inverter INV1, and the q-axis voltage command value v q1 refis set to 0. Also, the d-axis voltage command value v of the secondary inverter INV2 d2 ref is set to 0, and the reactive voltage V imag is used as the q-axis voltage command value v of the secondary inverter INV2 q2 ref .
[0091] Next, the dq-uvw conversion unit 37 included in the output voltage command generation unit 22 converts the d-axis voltage command value v d1 ref of the primary inverter INV1 and the q-axis voltage command value v q1 ref of the primary inverter INV1 into the output voltage command values of each phase of uvw of the primary inverter INV1. Also, the dq-uvw conversion unit 38 converts the d-axis voltage command value v d2 ref of the secondary inverter INV2 and the q-axis voltage command value v q2 ref of the secondary inverter INV2 into the secondary output voltage command values v u2 ref , v v2 ref , v w2 ref and outputs them.
[0092] Also, the output voltage command generation unit 22 sums the zero-phase voltage command value v z ref output by the dqz-axis current control unit 22 in the addition unit 42 and the zero-phase voltage v z2 of the secondary inverter INV2 from the secondary conversion unit 26, and adds this sum value in the addition unit 41 to the output voltage command values of each phase of uvw of the primary inverter INV1 output by the dq-uvw conversion unit 37, and outputs them as the primary output voltage command values v u1 ref , v v1 ref , v w1 ref .
[0093] That is, the reactive voltage V real as the primary output voltage vector command value (actually, the value obtained by converting it into the output voltage command values of each phase of uvw) is added with the zero-phase voltage command value v zref and the zero-phase voltage v of the secondary inverter INV2 z2 By adding the total value obtained by summing them, the primary-side output voltage command value v u1 ref 、v v1 ref 、v w1 ref is generated and output.
[0094] In this way, the output voltage command generation unit 22 uses the d-axis voltage command value v d ref and the q-axis voltage command value v q ref to generate the effective voltage V as the primary-side output voltage vector command value real and the reactive voltage V as the secondary-side output voltage vector command value imag The total value described above is added to the effective voltage V real to generate the primary-side output voltage command values v for switching the primary inverter INV1 u1 ref 、v v1 ref 、v w1 ref and generate the secondary-side output voltage command values v for switching the secondary inverter INV2 from the reactive voltage V imag 、v u2 ref 、v v2 ref 、v w2 ref and output them.
[0095] The primary modulation unit 24 of this embodiment uses the primary-side output voltage command values v output by the output voltage command generation unit 22 u1 ref 、v v1 ref 、v w1 ref to perform general three-phase modulation (hereinafter referred to as CPWM) to generate the primary inverter switching signals (PWM signals) S for switching each switching element 3A to 3F of the primary inverter INV1 u1 、S v1 、S w1 and output them.
[0096] (5-1) RSPWM with Odd Voltage Vectors On the other hand, the secondary side modulation unit 26 of this embodiment uses the RSPWM (Remote State PWM) with odd voltage vectors to switch (PWM control) each switching element 4A to 4F of the secondary side inverter INV2 based on the secondary side output voltage command value v u2 ref , v v2 ref , v w2 ref output by the output voltage command generation unit 22. The secondary side inverter switching signal (PWM signal) S u2 , S v2 , S w2 is generated and output.
[0097] The RSPWM with odd voltage vectors is a pulse width modulation that outputs only the odd voltage vectors V1, V3, and V5 shown in Fig. 6 among the eight voltage vectors (output basic vectors) of V0 to V7 in one control cycle. Note that in Fig. 6, v u is the U-phase voltage of the motor M, v v is the V-phase voltage, v w is the W-phase voltage, and v z is the zero-phase voltage (in this embodiment, since RSPWM is performed by the secondary side modulation unit 26, the actual zero-phase voltage v z2 ) of the secondary side inverter INV2.
[0098] (5-2) RSPWM with Even Voltage Vectors Note that not only the RSPWM with odd voltage vectors as described above, but also the secondary side modulation unit 26 uses the RSPWM with even voltage vectors to switch (PWM control) each switching element 4A to 4F of the secondary side inverter INV2 based on the secondary side output voltage command value v u2 ref , v v2 ref , v w2 ref output by the output voltage command generation unit 22. The secondary side inverter switching signal (PWM signal) S u2 , S v2, S w2 may be generated and output.
[0099] RSPWM with even voltage vectors is pulse width modulation that outputs only the even voltage vectors V2, V4, and V6 shown in Fig. 7 among the eight voltage vectors V0 to V7 during one control period. In addition to the above-mentioned RSPWM with even voltage vectors and the RSPWM with odd voltage vectors, RSPWM with all voltage vectors that switches between the RSPWM with odd voltage vectors and the RSPWM with even voltage vectors according to the voltage vector command value may be executed.
[0100] According to the above-mentioned RSPWM, as shown in Figs. 6 and 7, the fluctuation of the zero-phase voltage v z can be eliminated, but due to the modulation method, the zero-phase voltage v z (in the case of this embodiment, the zero-phase voltage v z2 ) becomes a fixed value. Therefore, as described above, the sum of the zero-phase voltage v z2 of the secondary inverter INV2 and the zero-phase voltage command value v z ref is output as the zero-phase voltage v z1 of the primary inverter INV1, and added to the output voltage command values of each phase of uvw of the primary inverter INV1 output by the dq-uvw conversion unit 37 in the addition unit 41, and the primary-side output voltage command values v u1 ref , v v1 ref , v w1 ref are obtained.
[0101] The uppermost row in Fig. 8 shows the zero-phase voltage v z1 of the primary inverter INV1 in the case of this embodiment, the second row from the top shows the zero-phase voltage v z2 of the secondary inverter INV2, the third row from the top shows the zero-phase voltage v z1 - the zero-phase voltage v z2 derived zero-phase voltage v z , and the lowermost row shows the zero-phase current i z . The zero-phase voltage v z1 of the primary inverter INV1 fluctuates six times due to CPWM, but the zero-phase voltage v of the secondary inverter INV2z2 is completely suppressed by the effect of RSPWM and has become a constant value. As a result, the zero-phase voltage v of the primary inverter INV1 driven by CPWM z1 only due to the variation of z the switching ripple of is excited.
[0102] Fig. 9 shows the amplitude of the zero-phase current i in the case of this embodiment. Here, when CPWM is executed in both the primary modulation unit 24 and the secondary modulation unit 26, the values corresponding to the respective values shown in Fig. 8 are as shown in Fig. 17, and the amplitude of the zero-phase current i z is as shown in Fig. 18. In this case, the zero-phase voltage v of the primary inverter INV1 z and the zero-phase voltage v of the secondary inverter INV2 z1 vary six times each due to CPWM, and since a four-level variation amplitude is excited, the switching ripple of the zero-phase current i z2 is greatly excited. If the amplitude in Fig. 18 is taken as 100%, the amplitude in the case of Fig. 9 is suppressed to 83.6%. z
[0103] As described above, since the power conversion device 1 of the present invention is a GND common type dual inverter, the capacitor C is charged by the secondary inverter INV2 from the DC power supply 2 via the motor M, and an AC output is applied to the motor M using the voltage charged in the capacitor C by the secondary inverter INV2, so that the drivable region can be expanded with respect to changes in the input voltage.
[0104] Also, since the positive input terminal of the secondary inverter INV2 is not connected to the positive power supply line 11 of the DC power supply 2 and the negative input terminal of the secondary inverter INV2 is connected to the negative power supply line 12 of the DC power supply 2, the secondary inverter INV2 does not have a floating potential, and the reference voltages of the primary inverter INV1 and the secondary inverter INV2 will be the same.
[0105] As a result, it becomes unnecessary to create a gate drive power supply for the switching elements 4A to 4F of the secondary-side inverter INV2 separately from the gate drive power supply for the switching elements 3A to 3F of the primary-side inverter INV1. The switching elements 3A to 3F of the primary-side inverter INV1 and the switching elements 4A to 4F of the secondary-side inverter INV2 can be switched by a common gate drive power supply. Thus, it becomes possible to expand the drivable region with respect to changes in the input voltage without using a separate boost converter or the like.
[0106] In addition, since there is no need to create a gate drive power supply for each inverter, an increase in the component mounting area can be suppressed, enabling miniaturization and cost reduction. Therefore, in devices such as in-vehicle electric compressors where the input voltage changes significantly, cost reduction is strongly required, and the substrate area is limited and miniaturization of the power conversion device is required, this is extremely effective.
[0107] In particular, in the present invention, the control device 6 eliminates or suppresses the variation in the zero-phase voltage v z1 which is the potential difference between the zero-phase voltage v z2 of the primary-side inverter INV1 and the zero-phase voltage v z of the secondary-side inverter INV2. Therefore, especially when driving the secondary-side voltage V dc2 in a boost state, the excitation of the switching ripple can be minimized to reduce the current amplitude, preventing an increase in loss and conduction noise, and eliminating the need to expand the maximum rated current.
[0108] Also, the control device 6 includes a secondary-side voltage control unit 27 that generates a zero-phase current command value i dc2 ref based on the secondary-side voltage command value v z ref , a dqz-axis current control unit 22 that generates a zero-phase voltage command value v z ref based on the zero-phase current command value i z ref , and dq-axis voltage command values v d ref , vq ref to the effective voltage V real (primary side output voltage vector command value) and the reactive voltage V imag (secondary side output voltage vector command value) are generated, and from the effective voltage V real the primary side output voltage command value v for switching the primary side inverter INV1 u1 ref 、v v1 ref 、v w1 ref is generated, and from the reactive voltage V imag the secondary side output voltage command value v for switching the secondary side inverter INV2 u2 ref 、v v2 ref 、v w2 ref is generated, and an output voltage command generation unit 23 is provided, so that stable control of the secondary side voltage V dc2 and drive control of the motor M can be performed.
[0109] And in this embodiment, the secondary side modulation unit 26 outputs only odd voltage vectors during one control period for pulse width modulation (RSPWM), outputs only even voltage vectors during one control period for pulse width modulation (RSPWM), and according to the voltage vector command value, outputs only odd voltage vectors during one control period for pulse width modulation and outputs only even voltage vectors during one control period for pulse width modulation. Any one of the switching pulse width modulation (full vector RSPWM) is executed to generate the switching signals S u2 、S v2 、S w2 so that the variation of the zero-phase voltage v z is suppressed, and the excitation of the switching ripple can be effectively suppressed.
Embodiment
[0110] (6) Configuration and operation of the output voltage command generation unit 23, the primary side modulation unit 24, and the secondary side modulation unit 25 (other embodiments) Next, the power conversion device 1 according to another embodiment of the present invention will be described with reference to FIGS. 10 to 13. In this embodiment, the primary modulation unit 24 of the embodiment of FIG. 5 described above executes ZFCPWM as shown in FIG. 10, instead of the general three-phase modulation (CPWM) described above. Other configurations in FIG. 10 are the same as those in FIG. 5.
[0111] (6-1) ZFCPWM That is, the primary modulation unit 24 of this embodiment uses the secondary output voltage command value v u2 ref , v v2 ref , v w2 ref output from the output voltage command generation unit 22 to generate and output the primary inverter switching signals (PWM signals) S u1 , S v1 , S w1 for switching (PWM control) each switching element 3A to 3F of the primary inverter INV1 by ZFCPWM (Zero voltage Fluctuation Cancel PWM).
[0112] This ZFCPWM is a pulse width modulation that synchronizes the rising and falling timings of the phase voltages of other phases with the rising and falling timings of the phase voltage of a specific phase. That is, the switching timings are synchronized in opposite phases twice during one carrier period. For example, as shown in FIG. 11, the falling timing of the V-phase voltage v u is synchronized with the rising timing of the U-phase voltage v v , and the rising timing of the W-phase voltage v u is synchronized with the falling timing of the U-phase voltage v w .
[0113] In ZFCPWM, instead of allowing the fluctuation of the zero-phase voltage v z (v z1 in this embodiment) up to twice during one carrier period, the average zero-phase voltage v z can be arbitrarily specified. Therefore, depending on the output freedom of PWM, the modulation possible region becomes all of the hexagon (vector).
[0114] The uppermost part of FIG. 12 shows the zero-phase voltage v of the primary-side inverter INV1 in this embodiment z1 The second row from the top shows the zero-phase voltage v of the secondary-side inverter INV2 z2 The third row from the top shows the zero-phase voltage v z1 - the zero-phase voltage v derived from zero-phase voltage v z2 The lowermost part shows the zero-phase current i z shown. The zero-phase voltage v of the primary-side inverter INV1 z has the number of fluctuations (two fluctuations) and the fluctuation level significantly suppressed compared to CPWM in the case of FIG. 5 by ZFCPWM. z1
[0115] And also in this embodiment, the zero-phase voltage v of the secondary-side inverter INV2 z2 is completely suppressed from fluctuating due to the effect of RSPWM and becomes a constant value. Thereby, only due to the fluctuation of the zero-phase voltage v of the primary-side inverter INV1 driven by ZFCPWM, the switching ripple of the zero-phase current i z1 is excited. z
[0116] FIG. 13 shows the amplitude of the zero-phase current i in the case of this embodiment z In this embodiment, the excitation of the switching ripple of the zero-phase current i z is excited only by ZFCPWM of the primary-side inverter INV1, but since the fluctuation level and the number of fluctuations are small, when the amplitude of the method shown in FIG. 18 is set to 100%, the amplitude in the case of FIG. 13 is greatly suppressed to 14.7% and it can be seen that it is improved.
Embodiment
[0117] (7) Configuration and operation of the output voltage command generation unit 23, the primary-side modulation unit 24, and the secondary-side modulation unit 25 (another embodiment) Next, with reference to FIGS. 14 to 16, a power conversion device 1 according to another embodiment of the present invention will be described. In this embodiment, the secondary side modulation unit 26 of the embodiment shown in FIG. 10 described above executes the ZFCPWM shown in FIG. 14 instead of the RSPWM described above. In FIG. 14, components denoted by the same reference numerals as those in FIG. 10 have the same or similar functions.
[0118] That is, both the primary side modulation unit 24 and the secondary side modulation unit 26 execute ZFCPWM. In the case of this embodiment, since both the primary side modulation unit 24 and the secondary side modulation unit 26 can arbitrarily output the zero-phase voltage v z they have freedom with respect to the output of the zero-phase voltage v z Therefore, the zero-phase voltage command value v z ref is distributed to the primary side inverter INV1 and the secondary side inverter INV2 as follows.
[0119] (7-1) Zero-phase voltage distribution unit 39 That is, in the power conversion device 1 of this embodiment, the output voltage command generation unit 23 has a zero-phase voltage distribution unit 39 (FIG. 14). This zero-phase voltage distribution unit 39 distributes the zero-phase voltage command value v z ref output by the dqz-axis current control unit 22 to each of the inverters INV1 and INV2 with a gain M1 for distribution to the primary side inverter INV1 and a gain M2 for distribution to the secondary side inverter INV2.
[0120] Then, the addition unit 41 adds the zero-phase voltage command value v z ref multiplied by the gain M1 to the output voltage command value of each of the uvw phases of the primary side inverter INV1 output by the dq-uvw conversion unit 37, and outputs it as the primary side output voltage command values v u1 ref 、v v1 ref 、v w1 ref At the same time, the addition unit 42 adds the zero-phase voltage command value v zref is added, and the secondary-side output voltage command value v u2 ref , v v2 ref , v w2 ref is output as such.
[0121] That is, the active voltage V as the primary-side output voltage vector command value real and the reactive voltage V as the secondary-side output voltage vector command value imag (actually, the values obtained by converting them into the output voltage command values of each uvw phase) and the zero-phase voltage command value v z ref are distributed and added, so that the primary-side output voltage command values v u1 ref , v v1 ref , v w1 ref and the secondary-side output voltage command values v u2 ref , v v2 ref , v w2 ref are generated and output.
[0122] Here, gain M1 + gain M2 = 1. Also, the zero-phase voltage distribution unit 39 has the cases where gain M1 = 1 and gain M2 = 0, and where gain M1 = 0 and gain M2 = 1. Therefore, the zero-phase voltage command value v z ref may be added to the output voltage command values of each uvw phase of one of the inverters INV1 and INV2, and not added to the other.
[0123] Basically, the zero-phase voltage command value v z ref may be added to the output voltage command values of each uvw phase of each of the inverters INV1 and INV2 output by the dq-uvw converters 37 and 38. However, considering the operating range and the like in order to add the zero-phase voltage, it is better for the inverter on the side with a higher voltage to bear the burden. When the voltage of the primary-side inverter INV1 is high, the zero-phase voltage distribution unit 39 sets gain M1 = 1 and gain M2 = 0, so that the zero-phase voltage command value v is added only to the primary-side inverter INV1.z ref to bear the burden.
[0124] Furthermore, the zero-phase voltage command value v multiplied by the gain M2 added in the adder 42 z ref is set to - for its sign (i.e., subtracted) because it is necessary to create a potential difference of the zero-phase voltage v between the primary-side inverter INV1 and the secondary-side inverter INV2. The adder 42 actually serves as a subtractor, and adds the value obtained by making the zero-phase voltage command value v multiplied by the gain M2 negative to the output voltage command values of each of the uvw phases. z That is, the output voltage command generation unit 22 of this embodiment generates the effective voltage V as the primary-side output voltage vector command value and the reactive voltage V as the secondary-side output voltage vector command value from the d-axis voltage command value v z ref and the q-axis voltage command value v
[0125] and, by distributing and adding the zero-phase voltage command value v to the effective voltage V d ref and the reactive voltage V q ref generates the primary-side output voltage command values v real for switching the primary-side inverter INV1 and the secondary-side output voltage command values v imag for switching the secondary-side inverter INV2, and outputs them. real and the reactive voltage V imag to the effective voltage V z ref and the reactive voltage V u1 ref v v1 ref v w1 ref and the secondary-side output voltage command values v u2 ref v v2 ref v w2 ref for switching the secondary-side inverter INV2, and outputs them.
[0126] The primary-side modulation unit 24 uses the primary-side output voltage command values v u1 ref v v1 ref v w1ref From this, the primary inverter switching signal (PWM signal) S for switching (PWM control) each switching element 3A to 3F of the primary inverter INV1 by ZFCPWM u1 , S v1 , S w1 is generated and output. Also, the secondary modulation unit 26 also uses the secondary output voltage command value v output by the output voltage command generation unit 29 u2 ref , v v2 ref , v w2 ref to generate and output the secondary inverter switching signal (PWM signal) S for switching (PWM control) each switching element 4A to 4F of the secondary inverter INV2 u2 , S v2 , S w2 .
[0127] The uppermost row in Fig. 15 shows the zero-phase voltage v of the primary inverter INV1 in this embodiment z1 , the second row from the top shows the zero-phase voltage v of the secondary inverter INV2 z2 , the third row from the top shows the zero-phase voltage v z1 - the zero-phase voltage v z2 from which the derived zero-phase voltage v z , and the lowermost row shows the zero-phase current i z . The zero-phase voltage v of the primary inverter INV1 z1 and the zero-phase voltage v of the secondary inverter INV2 z2 each have fluctuations (two fluctuations) due to ZFCPWM. However, since the number of fluctuations and the amplitude are small, they are small as switching ripples
[0128] Fig. 16 shows the amplitude of the zero-phase current i in this embodiment z . In this embodiment, the excitation of the switching ripple of the zero-phase current i z occurs in both the primary inverter INV1 and the secondary inverter INV2 by ZFCPWM. However, since the number of fluctuations and the amplitude are small, when the amplitude of the method shown in Fig. 18 is set to 100%, the amplitude in the case of Fig. 16 is greatly suppressed to 10.2%, indicating that it has been improved
Example
[0129] Here, in the aforementioned Example 1, the primary-side modulation unit 24 executes CPWM and the secondary-side modulation unit 26 executes RSPWM. However, it is not limited thereto, and the primary-side modulation unit 24 may execute RSPWM and the secondary-side modulation unit 26 may execute CPWM.
[0130] However, in that case, contrary to the case of Example 1, the sum of the zero-phase voltage v z1 of the primary-side inverter INV1 and the zero-phase voltage command value v z ref is output as the zero-phase voltage v z2 of the secondary-side inverter INV2, and is added to the output voltage command values of each of the uvw phases of the secondary-side inverter INV2 output by the dq-uvw conversion unit 38, and the secondary-side output voltage command values v u2 ref , v v2 ref , v w2 ref are obtained.
Example
[0131] Also, in the aforementioned Example 2, the primary-side modulation unit 24 executes ZFCPWM and the secondary-side modulation unit 26 executes RSPWM. However, it is not limited thereto, and the primary-side modulation unit 24 may execute RSPWM and the secondary-side modulation unit 26 may execute ZFCPWM.
[0132] However, also in that case, contrary to the case of Example 2, the sum of the zero-phase voltage v z1 of the primary-side inverter INV1 and the zero-phase voltage command value v z ref is output as the zero-phase voltage v z2 of the secondary-side inverter INV2, and is added to the output voltage command values of each of the uvw phases of the secondary-side inverter INV2 output by the dq-uvw conversion unit 38, and the secondary-side output voltage command values v u2 ref , v v2 ref , v w2 ref are obtained.
[0133] Also, in each embodiment, by executing RSPWM or ZFCPWM, the zero-phase voltage v z fluctuations were suppressed. However, depending on specific conditions such as the allowable operating range, it goes without saying that it is also possible to eliminate the fluctuations of the zero-phase voltage v z using these modulation methods.
[0134] In addition, in the embodiment, the output voltage command generation unit 23 generates the effective voltage V real and the reactive voltage V imag as the primary-side output voltage vector command value and the secondary-side output voltage vector command value. However, in the inventions of claims 1 to 3, it is not limited thereto, and various methods for determining the primary-side output voltage vector command value and the secondary-side output voltage vector command value can be changed. That is, as one of the methods for determining the primary-side output voltage vector command value and the secondary-side output voltage vector command value before adding the zero-phase voltage command value v z ref there is a method of dividing them into the effective voltage V real and the reactive voltage V imag .
[0135] Furthermore, in the embodiment, the switching element is described as an IGBT, but a MOSFET may also be used. In particular, the specific configurations and numerical values shown in the embodiment are not limited thereto and can be changed without departing from the spirit of the present invention.
Description of Reference Numerals
[0136] 1 Power conversion device 2 DC power supply 3A~3F, 4A~4F Switching elements 6 Control device 7U, 7V, 7W Windings 11 Positive power supply line 12 Negative power supply line 21 Speed control unit 22 dqz-axis current control unit (z-axis current control unit) 23 Output voltage command generation unit 24 Primary-side modulation unit 26 Secondary-side modulation section 27 Secondary-side voltage control section 36 Active-inactive decomposition section 39 Zero-phase voltage distribution section C capacitor INV1 Primary-side inverter INV2 Secondary-side inverter M motor
Claims
1. A power conversion device comprising a primary-side inverter connected to one end of a winding having an open-end structure of a motor, and a secondary-side inverter connected to the other end of the winding, the power conversion device applying a differential voltage between the primary-side inverter and the secondary-side inverter to the motor, wherein the primary-side inverter is connected to a DC power supply, the secondary-side inverter is connected to a capacitor, negative power supply lines of the primary-side inverter and the secondary-side inverter are shared, and a control device is provided to eliminate or suppress fluctuations in the zero-phase voltage, which is the potential difference between the zero-phase voltage of the primary-side inverter and the zero-phase voltage of the secondary-side inverter.
2. The primary-side inverter and the secondary-side inverter are each composed of a plurality of switching elements, a positive input terminal of the primary-side inverter is connected to a positive power supply line of the DC power supply, a negative input terminal of the primary-side inverter is connected to the negative power supply line of the DC power supply, and an output terminal of the primary-side inverter is connected to one end of the winding, an output terminal of the secondary-side inverter is connected to the other end of the winding, the capacitor is connected between a positive input terminal and a negative input terminal of the secondary-side inverter, the positive input terminal of the secondary-side inverter is not connected to the positive power supply line of the DC power supply, the negative input terminal of the secondary-side inverter is connected to the negative power supply line of the DC power supply, and by switching each of the switching elements by the control device, an AC output is generated from the DC power supply. The power conversion device according to claim 1, characterized in that.
3. The control device includes: a secondary-side voltage control unit that generates a zero-phase current command value based on a secondary-side voltage command value; a z-axis current control unit that generates a zero-phase voltage command value based on the zero-phase current command value; an output voltage command generation unit that generates a primary-side output voltage vector command value and a secondary-side output voltage vector command value from dq-axis voltage command values, generates a primary-side output voltage command value for switching the primary-side inverter from the primary-side output voltage vector command value, and generates a secondary-side output voltage command value for switching the secondary-side inverter from the secondary-side output voltage vector command value; The power conversion device according to claim 1, characterized in that it has.
4. The output voltage command generation unit includes: The power conversion device according to claim 3, wherein the dq-axis voltage command value is decomposed into an active voltage and a reactive voltage, the active voltage is used as the primary-side output voltage vector command value, and the reactive voltage is used as the secondary-side output voltage vector command value.
5. The control device a primary-side modulation unit that generates a switching signal of the primary-side inverter from the primary-side output voltage command value, a secondary-side modulation unit that generates a switching signal of the secondary-side inverter from the secondary-side output voltage command value, The power conversion device according to claim 3, characterized by comprising
6. The secondary-side modulation unit performs pulse width modulation that outputs only odd voltage vectors during one control period, or pulse width modulation that outputs only even voltage vectors during one control period, or pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors during one control period according to the voltage vector command value and pulse width modulation that outputs only even voltage vectors during one control period to generate the switching signal, thereby eliminating or suppressing fluctuations in the zero-phase voltage. The power conversion device according to claim 5.
7. The primary-side modulation unit generates the switching signal by performing pulse width modulation that matches the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase, thereby eliminating or suppressing fluctuations in the zero-phase voltage. The power conversion device according to claim 6.
8. The output voltage command generation unit adds the sum of the zero-phase voltage command value and the zero-phase voltage of the secondary-side inverter to the primary-side output voltage vector command value. The power conversion device according to claim 6 or claim 7.
9. The primary-side modulation unit and the secondary-side modulation unit generate the switching signal by performing pulse width modulation that matches the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase, thereby eliminating or suppressing fluctuations in the zero-phase voltage. The power conversion device according to claim 5.
10. The output voltage command generation unit distributes and adds the zero-phase voltage command value to the primary-side output voltage vector command value and the secondary-side output voltage vector command value. The power conversion device according to claim 9.
11. The power conversion device according to claim 10, wherein the output voltage command generation unit has a case where the gain allocated to the primary side output voltage vector command value is 1 and the gain allocated to the secondary side output voltage vector command value is 0.
12. The power conversion device according to claim 10, wherein the output voltage command generation unit has a case where the gain allocated to the primary side output voltage vector command value is 0 and the gain allocated to the secondary side output voltage vector command value is 1.
13. The primary side modulation unit performs any one of pulse width modulation that outputs only odd voltage vectors during one control period, or pulse width modulation that outputs only even voltage vectors during one control period, or pulse width modulation that switches between pulse width modulation that outputs only odd voltage vectors during one control period according to the voltage vector command value and pulse width modulation that outputs only even voltage vectors during one control period to generate the switching signal, thereby eliminating or suppressing the fluctuation of the zero-phase voltage. The power conversion device according to claim 5.
14. The secondary side modulation unit performs pulse width modulation that matches the rising and falling timings of the phase voltages of other phases with the rising and falling of the phase voltage of a specific phase to generate the switching signal, thereby eliminating or suppressing the fluctuation of the zero-phase voltage. The power conversion device according to claim 13.
15. The output voltage command generation unit adds the total value of the zero-phase voltage command value and the zero-phase voltage of the primary side inverter to the secondary side output voltage vector command value. The power conversion device according to claim 13 or claim 14.
Citation Information
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