Display device

Abstract

To provide a liquid crystal display device having a high aperture ratio, and to provide a liquid crystal display device having low power consumption.SOLUTION: A display device has a liquid crystal element, a transistor, a scanning line, and a signal line. The liquid crystal element has a pixel electrode, a liquid crystal layer, and a common electrode. The scanning line and the signal line are electrically connected to the transistor each. The scanning line and the signal line have a metal layer each. The transistor is electrically connected to the pixel electrode. In a semiconductor layer of the transistor, a first metal oxide layer and a second metal oxide layer are laminated. The first metal oxide layer has a region having lower crystallinity than the second metal oxide layer. The transistor has a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. The visible light penetrates through the first region and the liquid crystal element and is emitted to the outside of the display device.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] One aspect of the present invention relates to a liquid crystal display device, a display module, and an electronic device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. As for the technical field of one aspect of the present invention semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices (for example, touch sensors, etc.), input / output devices (for example, touch panels, etc.), and their driving methods, or their manufacturing methods can be cited as an example.

Background Art

[0003] Many flat panel displays such as liquid crystal display devices and light-emitting display devices use transistors composed of silicon semiconductors such as amorphous silicon, single crystal silicon, or polycrystalline silicon formed on a glass substrate. Further, transistors using such silicon semiconductors are also used in integrated circuits (ICs) and the like.

[0004] In recent years, a technology using a metal oxide exhibiting semiconductor characteristics for transistors instead of silicon semiconductors has attracted attention. In this specification, a metal oxide exhibiting semiconductor characteristics will be referred to as an oxide semiconductor. For example, Patent Document 1 and Patent Document 2 disclose a technique for manufacturing a transistor using zinc oxide or an In-Ga-Zn-based oxide as an oxide semiconductor, and using the transistor as a switching element of a pixel of a display device or the like.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] One aspect of the present invention aims to provide a liquid crystal display device with a high aperture ratio. Or One aspect of the present invention aims to provide a liquid crystal display device with low power consumption. Also One aspect of the present invention aims to provide a high-definition liquid crystal display device. Also One aspect of the present invention aims to provide a highly reliable liquid crystal display device.

[0007] Note that the description of these problems does not prevent the existence of other problems. One aspect of the present invention does not necessarily need to solve all of these problems. It is possible to extract other problems from the description of the specification, drawings, and claims .

Means for Solving the Problems

[0008] One aspect of the present invention is a display device having a liquid crystal element, a transistor, a scanning line, and a signal line . The liquid crystal element has a pixel electrode, a liquid crystal layer, and a common electrode. The scanning line and the signal line are each electrically connected to the transistor. The scanning line and the signal line each have a metal layer . The transistor is electrically connected to the pixel electrode. The semiconductor layer of the transistor has a first metal oxide layer and a second metal oxide layer laminated thereon. The first metal oxide layer has a region with lower crystallinity than the second metal oxide layer. The transistor is connected to the pixel electrode . . It has a first region. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. Visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

[0009] One aspect of the present invention is a display device having a liquid crystal element, a transistor, a scanning line, and a signal line. The liquid crystal element has a pixel electrode, a liquid crystal layer, and a common electrode. The scanning line and the signal line are each electrically connected to the transistor. The scanning line and the signal line each have a metal layer. The transistor is electrically connected to the pixel electrode. The transistor has a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a pair of electrodes on the semiconductor layer. The semiconductor layer has a first metal oxide layer and a second metal oxide layer on the first metal oxide layer. The first metal oxide layer has a region with lower crystallinity than the second metal oxide layer. The transistor has a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. Visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

[0010] The first metal oxide layer and the second metal oxide layer each independently have indium, metal M (M is aluminum, gallium, yttrium, or tin), and zinc. It is preferable. For example, when the atomic ratio of indium, metal M, and zinc is In:M:Zn = 4 :x:y, x is 1.5 or more and 2.5 or less, and y is 2 or more and 4 or less. For example, when the atomic ratio of indium, metal M, and zinc is In:M:Zn = 5:x:y, x is 0.5 or more and 1.5 or less, and y is 5 or more and 7 or less. ​​​​​

[0011] The second metal oxide layer preferably has a crystalline portion having c-axis orientation.

[0012] The display device having the above configuration may further include a touch sensor. The touch sensor is located on the display surface side of the liquid crystal element and the transistor.

[0013] The scanning line preferably has a portion overlapping with the semiconductor layer.

[0014] Visible light may be transmitted through the first region and the liquid crystal element in this order and emitted to the outside of the display device. Or, visible light may be transmitted through the liquid crystal element and the first region in this order and emitted to the outside of the display device. as well.

[0015] The direction in which the scanning line extends preferably intersects the direction in which the signal line extends. The direction in which a plurality of pixels presenting the same color are arranged preferably intersects the direction in which the signal line extends. .

[0016] One aspect of the present invention is a display module having a display device with any of the above configurations, to which a flexible printed circuit board (hereinafter referred to as FPC) or a connector such as a TCP (Tape Carrier Package) is attached, or a display module in which an IC is mounted by a method such as COG (Chip On Glass) or COF ( Chip On Film). module.

[0017] One aspect of the present invention is an electronic device having the above display module and at least one of an antenna, a battery, a housing, a camera, a speaker, a microphone, or an operation button.

Advantages of the Invention

[0018] According to one aspect of the present invention, a liquid crystal display device with a high aperture ratio can be provided. Or, according to one aspect of the present invention, a liquid crystal display device with low power consumption can be provided. Or, according to one aspect of the present invention, a high-definition liquid crystal display device can be provided. Or, according to one aspect of the present invention a highly reliable liquid crystal display device can be provided.

[0019] Note that the description of these effects does not prevent the existence of other effects. One aspect of the present invention does not necessarily have to have all of these effects. It is possible to extract other effects from the descriptions in the specification, drawings, and claims.

Brief Description of the Drawings

[0020]

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Mode for Carrying Out the Invention

[0021] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below. without departing from the spirit and scope of the present invention. It is easily understood by those skilled in the art. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below. description.

[0022] In the configuration of the invention described below, the same parts or parts having the same functions are commonly used with the same reference numerals among different drawings, and the repeated description thereof is omitted. Also, when referring to the same function, the hatch pattern may be the same, and there may be cases where no reference numeral is particularly assigned. among different drawings, and the repeated description thereof is omitted. Also, when referring to the same function, the hatch pattern may be the same, and there may be cases where no reference numeral is particularly assigned. functions, the hatch pattern may be the same, and there may be cases where no reference numeral is particularly assigned.

[0023] In addition, the positions, sizes, ranges, etc. of the respective configurations shown in the drawings are, for the sake of easy understanding, actually It may not represent the position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0024] In addition, the term "film" and the term "layer" may be interchangeable depending on the case or the situation. For example, the term "conductive layer" can be changed to the term "conductive film". Or, for example, the term "insulating film" can be changed to the term "insulating layer".

[0025] In this specification, etc., metal oxide refers to an oxide of a metal in a broad sense. Metal oxides include oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS). They are classified into these categories. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when described as an OS FET, it can be paraphrased as a transistor having a metal oxide or an oxide semiconductor.

[0026] Also, in this specification, etc., metal oxides having nitrogen may also be collectively referred to as metal oxides (metal oxi de). Also, metal oxides having nitrogen may be referred to as metal oxynitrides (met al oxynitride).

[0027] (Embodiment 1) In this embodiment, a display device according to one aspect of the present invention will be described with reference to FIGS. 1 to 11.

[0028] <1. Configuration Example 1 of Display Device> First, the display device according to the present embodiment will be described with reference to FIGS. 1 to 5.

[0029] The display device according to the present embodiment includes a liquid crystal element and a transistor. The liquid crystal element includes a pixel electrode , a liquid crystal layer, and a common electrode. The transistor is electrically connected to the pixel electrode. The semiconductor layer of the transistor includes a first metal oxide layer and a second metal oxide layer laminated thereon. The first metal oxide layer has a region with lower crystallinity than the second metal oxide layer. The transistor has a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. The visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

[0030] Alternatively, the display device according to the present embodiment includes a liquid crystal element and a transistor. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. The transistor is electrically connected to the pixel electrode. The transistor includes a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a pair of electrodes on the semiconductor layer. The semiconductor layer includes a first metal oxide layer and a second metal oxide layer on the first metal oxide layer. The first metal oxide layer has a region with lower crystallinity than the second metal oxide layer. The transistor has a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region have a function of transmitting visible light. The visible light passes through the first region and the liquid crystal element and is emitted to the outside of the display device.

[0031] In the display device according to the present embodiment, since the contact portion between the transistor and the pixel electrode transmits visible light, the contact portion can be provided in the display area. As a result, the aperture of the pixel The rate can be increased. The higher the aperture ratio, the higher the light extraction efficiency can be. The light extraction efficiency can be increased, and the luminance of the backlight unit can be reduced. Therefore, the power consumption of the display device can be reduced. In addition, high definition of the display device can be achieved.

[0032] The display device of the present embodiment further includes a scanning line and a signal line. The scanning line and the signal line are each electrically connected to a transistor. The scanning line and the signal line each have a metal layer. By using the metal layer for the scanning line and the signal line, the resistance values of the scanning line and the signal line can be reduced.

[0033] In addition, it is preferable that the scanning line has a portion overlapping with the channel region of the transistor. Depending on the material used for the channel region of the transistor, the characteristics of the transistor may change when irradiated with light. By having the scanning line have a portion overlapping with the channel region of the transistor, irradiation of external light or light from the backlight to the channel region can be suppressed. Thereby, the reliability of the transistor can be enhanced. Also, one conductive film may have both the function as a scanning line and the function as a gate (or back gate).

[0034] In one aspect of the present invention, the following translucent semiconductor materials and conductive materials can be used for transistors, wirings, capacitive elements, etc.

[0035] The semiconductor film included in the transistor can be formed using a translucent semiconductor material. As the translucent semiconductor material, metal oxide or oxide semiconductor (Oxid Examples include e Semiconductor). The oxide semiconductor preferably contains at least indium (In). In particular, it is preferably composed of indium (In) and zinc (Zn). In addition to these, one or more selected from aluminum (Al), gallium (G), yttrium (Y), tin (Sn), copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium may also be included.

[0036] The conductive film of the transistor can be formed using a conductive material having translucency. The conductive material having translucency preferably contains one or more selected from indium, zinc, and tin. Specifically, In oxide, In-Sn oxide (also referred to as ITO: Indium Tin Oxide), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Sn-Ti oxide, In-Sn-Si oxide, Zn oxide, Ga-Zn oxide, etc. can be mentioned.

[0037] Alternatively, an oxide semiconductor with reduced resistance by containing impurity elements in the conductive film of the transistor may be used. The oxide semiconductor with reduced resistance can be referred to as an oxide conductor (OC: Oxide Conductor).

[0038] For example, in the oxide conductor, oxygen deficiency is formed in the oxide semiconductor, and hydrogen is added to the oxygen deficiency. As a result, donor levels are formed near the conduction band. When donor levels are formed in the oxide semiconductor, By doing so, the oxide semiconductor becomes highly conductive and turns into a conductor.

[0039] Note that since the oxide semiconductor has a large energy gap (for example, the energy gap is 2 .5 eV or more), it has translucency to visible light. Also, as described above, the oxide conductor is an oxide semiconductor having a donor level near the conduction band. Therefore, the oxide conductor is less affected by absorption due to the donor level and has translucency to visible light similar to that of the oxide semiconductor.

[0040] Also, it is preferable that the oxide conductor has one or more kinds of metal elements contained in the semiconductor film of the transistor. By using an oxide semiconductor having the same metal element in two or more of the layers constituting the transistor, it becomes possible to commonly use a manufacturing apparatus (for example, a film forming apparatus, a processing apparatus, etc.) in two or more processes, so that the manufacturing cost can be suppressed.

[0041] FIG. 1 is a perspective view of the display device 100A. In FIG. 1, for clarity, components such as the polarizing plate 130 are shown omitting them. In FIG. 1, the substrate 61 is shown by a broken line. FIGS. 2(A) and FIG. 3(A) are cross-sectional views of the display device 100A. FIG. 2(B) is an enlarged view of the transistor 201 included in the display device 100A, and FIG. 2(C) is an enlarged view of the transistor 206 included in the display device 100A. FIG. 3(B) is a modified example of the transistor 206 included in the display device 100A.

[0042] The display device 100A has a display unit 62 and a drive circuit unit 64. An FPC 72 and an IC 73 are mounted on the display device 100A.

[0043] The display unit 62 has a plurality of pixels and has a function of displaying an image.

[0044] A pixel has a plurality of sub-pixels. For example, one pixel is composed of a sub-pixel that exhibits red, a sub-pixel that exhibits green, and a sub-pixel that exhibits blue, so that the display unit 62 can perform full-color display. Note that the colors exhibited by the sub-pixels are not limited to red, green, and blue . For example, sub-pixels that exhibit colors such as white, yellow, magenta, or cyan may be used for the pixel . Note that in this specification and the like, sub-pixels may sometimes be simply referred to as pixels.

[0045] The display device 100A may have one or both of a scanning line driving circuit and a signal line driving circuit . Or, it may not have both a scanning line driving circuit and a signal line driving circuit . When the display device 100A has a sensor such as a touch sensor, the display device 100A may have a sensor driving circuit. In the present embodiment, as the driving circuit unit 64, an example of having a scanning line driving circuit is shown. The scanning line driving circuit has a function of outputting a scanning signal to the scanning lines that the display unit 62 has .

[0046] In the display device 100A, the IC 73 is mounted on the substrate 51 by a mounting method such as the COG method . The IC 73 has, for example, one or more of a signal line driving circuit, a scanning line driving circuit, and a sensor driving circuit .

[0047] An FPC 72 is electrically connected to the display device 100A. Through the FPC 72, signals and power are supplied to the IC 73 and the driving circuit unit 64 from the outside. Also, signals can be output from the IC 73 to the outside through the FPC 72 .

[0048] An IC may be mounted on the FPC 72. For example, on the FPC 72, an IC having one or more of a signal line driving circuit, a scanning line driving circuit, and a sensor driving circuit may be mounted.

[0049] The display unit 62 and the drive circuit unit 64 are supplied with signals and power from the wiring 65. The signals and power are input to the wiring 65 from the IC 73 or from the outside via the FPC 72.

[0050] FIGS. 2(A) and 3(A) are cross-sectional views including the display unit 62, the drive circuit unit 64, and the wiring 65. In the cross-sectional views of the display device shown after FIG. 2(A), as the display unit 62, the display area 68 of one sub-pixel and the non-display area 66 located around it are shown.

[0051] In FIG. 2(A), an example is shown in which the polarizing plate 130 is located on the substrate 61 side and the backlight unit (not shown) is located on the substrate 51 side. The light 45 from the backlight unit first enters the substrate 51, passes through the contact portion of the transistor 206 and the pixel electrode 111, the liquid crystal element 40, the coloring layer 131, the substrate 61, and the polarizing plate 130 in this order, and is taken out to the outside of the display device 100A.

[0052] In FIG. 3(A), an example is shown in which the polarizing plate 130 is located on the substrate 51 side and the backlight unit (not shown) is located on the substrate 61 side. The light 45 from the backlight unit first enters the substrate 61, passes through the coloring layer 131, the liquid crystal element 40, the contact portion of the transistor 206 and the pixel electrode 111, the substrate 51, and the polarizing plate 130 in this order, and is taken out to the outside of the display device 100A.

[0053] Thus, without changing the configuration between the substrate 51 and the substrate 61, either the substrate 51 side or the substrate 61 side can be the display surface side. Which side to make the display surface side can be appropriately determined according to the arrangement of the backlight unit, polarizing plate, touch sensor, etc.

[0054] Hereinafter, taking Fig. 2(A) as an example for explanation, the same applies to Fig. 3(A).

[0055] The display device 100A is an example of a transmissive liquid crystal display device using a horizontal electric field type liquid crystal element.

[0056] As shown in Fig. 2(A), the display device 100A includes a substrate 51, transistors 201, transistors 206, a liquid crystal element 40, alignment films 133a, 133b, a connection portion 204, an adhesive layer 141, a coloring layer 131, a light shielding layer 132, an overcoat 121, a substrate 61, and a polarizing plate 1 30, etc.

[0057] The transistor 206 is provided in the non-display area 66. An enlarged view of the transistor 206 is shown in Fig. 2(C).

[0058] The transistor 206 includes a gate 221, an insulating layer 213, conductive layers 222a, 222c , and a semiconductor layer 231.

[0059] The gate 221 overlaps the semiconductor layer 231 via the insulating layer 213. The insulating layer 213 functions as a gate insulating layer. The conductive layers 222a and 222c are each connected to the semiconductor layer 2 31.

[0060] In Fig. 2(A), the pixel electrode 111 of the liquid crystal element 40 is connected via the conductive layer 222c ​​is electrically connected to the semiconductor layer 231.

[0061] The conductive layer 222c is formed using a material that transmits visible light. As a result, the contact portion between the pixel electrode 1 11 and the transistor can be provided in the display area 68. Therefore , the aperture ratio of the sub-pixel can be increased. Also, the power consumption of the display device can be reduced .

[0062] As shown in FIG. 2(C), the semiconductor layer 231 has a first metal oxide layer 231a and a second metal oxide layer 231b on the first metal oxide layer 231a.

[0063] The first metal oxide layer 231a and the second metal oxide layer 231b preferably each have In, M (M is Ga, Al, Y, or Sn), and Zn.

[0064] When the first metal oxide layer 231a and the second metal oxide layer 231b each have a region where the atomic ratio of In is larger than the atomic ratio of M, the field-effect mobility of the transistor can be increased, which is preferable. As an example, the atomic ratio of In, M, and Zn in the first metal oxide layer 231a and the second metal oxide layer 23 1b is preferably In:M:Zn = 4:2:3 or in the vicinity thereof, or In:M:Zn = 5:1:7 or in the vicinity thereof. Here , the vicinity means that when In is 4, M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less, and when In is 5, M is 0.5 or more and 1.5 or less, and Zn is 5 or more and 7 or less. Thus, by making the first metal oxide layer 231a and the second metal oxide layer 231b have substantially the same composition, they can be formed using the same sputtering target, so the manufacturing cost can be suppressed. ​

[0065] The first metal oxide layer 231a and the second metal oxide layer 231b are made of metals having different compositions. Although a film formed using a target having the same composition may be used, it is particularly preferable to use a target having the same composition and a large It is preferable to use a laminated film that is deposited in succession without exposure to air. In addition, the first metal oxide layer 231a and the second metal oxide layer 23 This can prevent impurities from remaining between 1b.

[0066] The second metal oxide layer 231b is a region having a higher crystallinity than the first metal oxide layer 231a. It is preferable that the second metal oxide layer 231b contains the first metal oxide. Therefore, the conductive layer 2 can be a film having higher etching resistance than the conductive layer 231a. When processing the conductive layer 222a and the conductive layer 222c, the second metal oxide layer 231b is etched. Therefore, as shown in Fig. 2(A) and (B), It is possible to realize a transistor having a channel etch structure. The second metal oxide layer 231b located on the back channel side is made of a highly crystalline film. Therefore, impurities that may diffuse into the first metal oxide layer 231a on the gate 221 side can be reduced. This makes it possible to realize a highly reliable transistor.

[0067] In addition, the first metal oxide layer 231a has a lower crystallinity than the second metal oxide layer 231b. By using a film including the region, oxygen is easily diffused into the first metal oxide layer 231a. In particular, the ratio of oxygen vacancies in the first metal oxide layer 231a can be reduced. The first metal oxide layer 231a is located on the side close to the gate 221, and is mainly used for forming a channel. Since it is an easily formed layer, a highly reliable transistor can be realized by using such a film. It can be done.

[0068] The first metal oxide layer 231a and the second metal oxide layer 231b can be formed separately, for example, by varying the film formation conditions. For example, the flow rate of oxygen gas in the film formation gas can be varied between the first metal oxide layer 231a and the second metal oxide layer 231b. At this time, as the film formation conditions of the first metal oxide layer 231a, the ratio (also referred to as the oxygen flow rate ratio) of the oxygen gas flow rate to the total gas flow rate is set to 0% or more and 30% or less, preferably 5% or more and 15% or less.

[0069] By setting the above oxygen flow rate ratio, the crystallinity of the first metal oxide layer 231a can be lowered. On the other hand, as the film formation conditions of the second metal oxide layer 231b, the oxygen flow rate ratio is set to more than 30% and 100% or less, preferably 50% or more and 100% or less, more preferably 70% or more and 100% or less. By setting the above oxygen flow rate ratio, the crystallinity of the second metal oxide layer 231b can be increased. It can be done.

[0070] As for the substrate temperature during the formation of the first metal oxide layer 231a and the second metal oxide layer 231b, it is preferably room temperature (25 °C) or higher and 200 °C or lower, more preferably room temperature or higher and 130 °C or lower. By setting the substrate temperature within the above range, when using a large-area glass substrate, the bending or distortion of the substrate can be suppressed. Here, if the substrate temperature during film formation is the same for the first metal oxide layer 231a and the second metal oxide layer 231b, the productivity can be increased. It can be done.

[0071] As for the substrate temperature during the formation of the first metal oxide layer 231a and the second metal oxide layer 231b, it is preferably room temperature (25 °C) or higher and 200 °C or lower, more preferably room temperature or higher and 130 °C or lower. By setting the substrate temperature within the above range, when using a large-area glass substrate, the bending or distortion of the substrate can be suppressed. Here, if the substrate temperature during film formation is the same for the first metal oxide layer 231a and the second metal oxide layer 231b, the productivity can be increased. At this time, by making the substrate temperature during film formation the same for the first metal oxide layer 231a and the second metal oxide layer 231b, the productivity can be increased. When the substrate temperature during film formation is the same for the first metal oxide layer 231a and the second metal oxide layer 231b, the productivity can be increased. In addition, for example, when the substrate temperature during film formation is made different between the first metal oxide layer 231a and the second metal oxide layer 231b, the substrate temperature during film formation of the second metal oxide layer 231b is increased. Then, the crystallinity of the second metal oxide layer 231b can be further enhanced.

[0072] For example, it is preferable to use a CAC-OS (Cloud-Aligned Composite oxide semiconductor) film for the first metal oxide layer 231a and a CAAC-OS (c-axis-aligned crystal line oxide semiconductor) film for the second metal oxide layer 231b.

[0073] The conductive layer used for the gate 221 may have a function as a scanning line. That is, one conductive layer may have a function as a scanning line and a function as the gate 221. Also, the conductive layer used for the conductive layer 222a may have a function as a signal line. That is, one conductive layer may have a function as a signal line and a function as the conductive layer 222a. It is preferable that the resistance of the conductive layer functioning as a scanning line or a signal line is sufficiently low. Therefore, the conductive layer functioning as a scanning line or a signal line is preferably formed using a metal, an alloy, or the like. The conductive layer functioning as a scanning line or a signal line may use a material having a function of blocking visible light.

[0074] Specifically, a conductive material that transmits visible light may have a larger resistivity compared to a conductive material that blocks visible light, such as copper or aluminum. Therefore, bus lines such as scanning lines and signal lines use a conductive material (metal material) that blocks visible light and has a small resistivity in order to prevent signal delay. ​​​​​​​​​​​​​It is preferably formed. However, depending on the pixel size, the width of the bus line, the thickness of the bus line, etc., a conductive material that transmits visible light can be used for the bus line. By using a conductive layer that blocks visible light for the gate 221, it is possible to suppress the light of the backlight from irradiating the semiconductor layer 231.

[0075] By using a conductive layer that blocks visible light for the gate 221, it is possible to suppress the light of the backlight from irradiating the semiconductor layer 231. In this way, when the semiconductor layer 231 is overlapped with a conductive layer that blocks visible light, characteristic variations of the transistor due to light can be suppressed. Thereby, the reliability of the transistor can be enhanced. By using a conductive layer that blocks visible light for the gate 221, it is possible to suppress the light of the backlight from irradiating the semiconductor layer 231. In this way, when the semiconductor layer 231 is overlapped with a conductive layer that blocks visible light, characteristic variations of the transistor due to light can be suppressed. Thereby, the reliability of the transistor can be enhanced.

[0076] A light-shielding layer 132 is provided on the substrate 61 side of the semiconductor layer 231, and a gate 221 that blocks visible light is provided on the substrate 51 side of the semiconductor layer 231, so that external light and the light of the backlight can be prevented from irradiating the semiconductor layer 231. A light-shielding layer 132 is provided on the substrate 61 side of the semiconductor layer 231, and a gate 221 that blocks visible light is provided on the substrate 51 side of the semiconductor layer 231, so that external light and the light of the backlight can be prevented from irradiating the semiconductor layer 231. In this way, it is possible to suppress the light of the backlight from irradiating the semiconductor layer 231.

[0077] Here, FIG. 3(B) shows a modified example of the transistor 206. In FIG. 3(B), an example is shown in which a part of the semiconductor layer 231 of the transistor 206 is located in the display area 68. When silicon, typically amorphous silicon, or low-temperature polysilicon, etc. is used for the semiconductor layer of the transistor, since the semiconductor layer absorbs a part of visible light, it is difficult to extract light by transmitting the semiconductor layer. When silicon, typically amorphous silicon, or low-temperature polysilicon, etc. is used for the semiconductor layer of the transistor, since the semiconductor layer absorbs a part of visible light, it is difficult to extract light by transmitting the semiconductor layer. When silicon, typically amorphous silicon, or low-temperature polysilicon, etc. is used for the semiconductor layer of the transistor, since the semiconductor layer absorbs a part of visible light, it is difficult to extract light by transmitting the semiconductor layer. In addition, when impurities such as phosphorus and boron are contained in silicon, the light transmittance may further decrease. Therefore, it may be more difficult to extract light by transmitting through the low-resistance region formed in silicon. However, in one aspect of the present invention, since both the oxide semiconductor (OS) and the oxide conductor (OC) have light transmittance with respect to visible light, the aperture ratio of the pixel or the sub-pixel can be improved. However, in one aspect of the present invention, since both the oxide semiconductor (OS) and the oxide conductor (OC) have light transmittance with respect to visible light, the aperture ratio of the pixel or the sub-pixel can be improved. However, in one aspect of the present invention, since both the oxide semiconductor (OS) and the oxide conductor (OC) have light transmittance with respect to visible light, the aperture ratio of the pixel or the sub-pixel can be improved.

[0078] Transistor 206 is covered by insulating layer 212, insulating layer 214, and insulating layer 215. Note that insulating layer 212 and insulating layer 214 can be regarded as components of transistor 206. The transistor is preferably covered with an insulating layer that has the effect of suppressing the diffusion of impurities into the semiconductor that constitutes the transistor. Insulating layer 215 can function as a planarization layer.

[0079] Insulating layer 212 and insulating layer 213 preferably each have an excess oxygen region. Since insulating layer 212 and insulating layer 213 have an excess oxygen region, excess oxygen can be supplied into semiconductor layer 231. Oxygen deficiencies that can form in semiconductor layer 231 can be compensated for with excess oxygen, thus enabling the provision of a highly reliable transistor.

[0080] As insulating layer 212, it is preferable to use an oxide insulating film such as a silicon oxide film or a silicon oxynitride film formed in an oxygen-containing atmosphere. Furthermore, as insulating layer 214 on the silicon oxide film or silicon oxynitride film, it is preferable to form an insulating film such as a silicon nitride film that is difficult for oxygen to diffuse through or permeate. An oxide insulating film formed in an oxygen-containing atmosphere can be made into an insulating film that easily releases a large amount of oxygen upon heating. By performing a heat treatment in a state where such an oxygen-releasing oxide insulating film and an insulating film that is difficult for oxygen to diffuse through or permeate are laminated, oxygen can be supplied to semiconductor layer 231. As a result, oxygen deficiencies in semiconductor layer 231 and defects at the interface between semiconductor layer 231 and insulating layer 212 can be repaired, and the density of defect levels can be reduced. Thereby, a display device with extremely high reliability can be realized.

[0081] ​​The display area 68 is provided with a liquid crystal element 40. The liquid crystal element 40 is a FFS (Frin This is a liquid crystal element to which the GE Field Switching (GE Field Switching) mode is applied.

[0082] The liquid crystal element 40 includes a pixel electrode 111, a common electrode 112, and a liquid crystal layer 113. The alignment of the liquid crystal layer 113 is controlled by the electric field generated between the electrode 111 and the common electrode 112. The liquid crystal layer 113 is located between an alignment film 133a and an alignment film 133b.

[0083] The common electrode 112 has a comb-like upper surface shape (also called a planar shape) or has slits. In FIG. 2(A) and FIG. 3(A), the display area of one sub-pixel is In this example, one opening of the common electrode 112 is provided in the region 68. As the resolution of display devices increases, the number of subpixels per subpixel increases. Therefore, the number of openings provided in the common electrode 112 is limited to a plurality of openings. In other words, in a high-definition display device, the number of pixels (sub-pixels) can be reduced to one. Since the area of the common electrode 112 is small, even if there is only one opening in the common electrode 112, the entire display area of the sub-pixels is covered. A sufficient electric field can be generated across the body to orient the liquid crystals.

[0084] An insulating layer 220 is provided between the pixel electrode 111 and the common electrode 112. The pixel electrode 11 has a portion overlapping with the common electrode 112 via the insulating layer 220. In the region where the pixel electrode 111 and the colored layer 131 overlap, a common electrode 112 is disposed on the pixel electrode 111. It has some parts that are not included.

[0085] It is preferable to provide an alignment film in contact with the liquid crystal layer 113. The alignment film can control the alignment of the liquid crystal layer 113. In the display device 100A, an alignment film 133a is located between the common electrode 112 and the insulating layer 220 and the liquid crystal layer 113, and an alignment film 133b is located between the overcoat 121 and the liquid crystal layer 113. In the liquid crystal material, there are positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and an optimal liquid crystal material can be used according to the applied mode and design. In one aspect of the present invention, it is preferable to use a negative liquid crystal material. In a negative liquid crystal, the influence of the flexoelectric effect can be suppressed, and there is almost no difference in transmittance due to the polarity of the voltage applied to the liquid crystal layer. Therefore, flickering can be suppressed from being visually recognized by the user of the display device. The flexoelectric effect is a phenomenon mainly caused by the molecular shape and polarization occurs due to alignment distortion. Negative liquid crystal materials are less likely to cause alignment distortion such as spreading deformation and bending deformation. Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F

[0086] It is preferable to provide an alignment film in contact with the liquid crystal layer 113. The alignment film can control the alignment of the liquid crystal layer 113. In the display device 100A, an alignment film 133a is located between the common electrode 112 and the insulating layer 220 and the liquid crystal layer 113, and an alignment film 133b is located between the overcoat 121 and the liquid crystal layer 113. In the liquid crystal material, there are positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and an optimal liquid crystal material can be used according to the applied mode and design. Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F

[0087] In one aspect of the present invention, it is preferable to use a negative liquid crystal material. In a negative liquid crystal, the influence of the flexoelectric effect can be suppressed, and there is almost no difference in transmittance due to the polarity of the voltage applied to the liquid crystal layer. Therefore, flickering can be suppressed from being visually recognized by the user of the display device. The flexoelectric effect is a phenomenon mainly caused by the molecular shape and polarization occurs due to alignment distortion. Negative liquid crystal materials are less likely to cause alignment distortion such as spreading deformation and bending deformation. In the liquid crystal material, there are positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and an optimal liquid crystal material can be used according to the applied mode and design. Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F In one aspect of the present invention, it is preferable to use a negative liquid crystal material. In a negative liquid crystal, the influence of the flexoelectric effect can be suppressed, and there is almost no difference in transmittance due to the polarity of the voltage applied to the liquid crystal layer. Therefore, flickering can be suppressed from being visually recognized by the user of the display device. The flexoelectric effect is a phenomenon mainly caused by the molecular shape and polarization occurs due to alignment distortion. Negative liquid crystal materials are less likely to cause alignment distortion such as spreading deformation and bending deformation. In the liquid crystal material, there are positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and an optimal liquid crystal material can be used according to the applied mode and design. Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F

[0088] Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F It is preferable to provide an alignment film in contact with the liquid crystal layer 113. The alignment film can control the alignment of the liquid crystal layer 113. In the display device 100A, an alignment film 133a is located between the common electrode 112 and the insulating layer 220 and the liquid crystal layer 113, and an alignment film 133b is located between the overcoat 121 and the liquid crystal layer 113. In the liquid crystal material, there are positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and an optimal liquid crystal material can be used according to the applied mode and design. Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F In the liquid crystal material, there are positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and an optimal liquid crystal material can be used according to the applied mode and design. Note that here, an element to which the FFS mode is applied is used as the liquid crystal element 40, but the present invention is not limited to this, and liquid crystal elements to which various modes are applied can be used. For example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, F LC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, EC B (Electrically Controlled Birefringence) mode, VA - IPS mode, guest - host mode, etc. can be applied to use a liquid crystal element can be achieved.

[0089] Also, a normally - black type liquid crystal display device, for example, a transmissive liquid crystal display device adopting a vertical alignment (VA ) mode may be applied to the display device 100A. As the vertical alignment mode, MVA (Multi - Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, ASV (Advanced Super View) mode, etc. can be used.

[0090] Note that the liquid crystal element is an element that controls the transmission or non - transmission of light by the optical modulation action of liquid crystal. The optical modulation action of liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field). As the liquid crystal used for the liquid crystal element, thermotropic liquid crystal, low - molecular liquid crystal, high - molecular liquid crystal, polymer - dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials show a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. Dispersed Liquid Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials show a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. crystal, etc. can be used. These liquid crystal materials show a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. crystal, etc. can be used. These liquid crystal materials show a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0091] Also, when adopting the horizontal electric field method, a liquid crystal showing a blue phase without using an alignment film may be used. 。The blue phase is one of the liquid crystal phases. When the cholesteric liquid crystal is heated, it appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only within a narrow temperature range, a liquid crystal composition mixed with 5 wt% or more of a chiral agent is used for the liquid crystal layer 113 to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting the blue phase and a chiral agent has a short response time and exhibits optical isotropy. Also, a liquid crystal composition containing a liquid crystal exhibiting the blue phase and a chiral agent does not require alignment treatment and has a small viewing angle dependence. Moreover, since an alignment film does not need to be provided, rubbing treatment is also unnecessary, so electrostatic breakdown caused by the rubbing treatment can be prevented, and defects or damage of the liquid crystal display device during the manufacturing process can be reduced. The display device 100A is a transmissive liquid crystal display device, so a conductive material that transmits visible light is used for both the pixel electrode 111 and the common electrode 112. Also, a conductive material that transmits visible light is used for one or more of the conductive layers of the transistor 206. Thereby, at least a part of the transistor 206 can be provided in the display region 68. In FIGS. 2(A) and (B), the case where a semiconductor material that transmits visible light is used for the conductive layer 222c will be described as an example. As the conductive material that transmits visible light, for example, a material containing one or more selected from indium (In), zinc (Zn), and tin (Sn) may be used. Specifically, indium oxide, indium tin oxide (ITO), indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, etc.

[0092] Since the display device 100A is a transmissive liquid crystal display device, a conductive material that transmits visible light is used for both the pixel electrode 111 and the common electrode 112. Also, a conductive material that transmits visible light is used for one or more of the conductive layers of the transistor 206. Thereby, at least a part of the transistor 206 can be provided in the display region 68. In FIGS. 2(A), (B), the case where a semiconductor material that transmits visible light is used for the conductive layer 222c will be described as an example.

[0093] As the conductive material that transmits visible light, for example, a material containing one or more selected from indium (In), zinc (Zn), and tin (Sn) may be used. Specifically, indium oxide, indium tin oxide (ITO), indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, etc. Indium oxide, indium tin oxide containing titanium oxide, indium containing silicon oxide Examples include tin oxide (ITSO) containing zinc oxide, zinc oxide containing gallium, etc. Note that a film containing graphene can also be used. The film containing graphene can be formed, for example, by reducing a film containing graphene oxide

[0094] Among the conductive layer 222c, the pixel electrode 111, and the common electrode 112, it is preferable to use an oxide conductive layer for one or more of them. The oxide conductive layer preferably has one or more metal elements contained in the semiconductor layer 231 of the transistor 206. For example, the conductive layer 222c preferably contains indium, and more preferably is an oxide film containing In, M (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn or Hf), and Zn. Similarly, the pixel electrode 111 and the common electrode 112 preferably each contain indium, and more preferably are oxide films containing In, M (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn or Hf), and Zn

[0095] Among the conductive layer 222c, the pixel electrode 111, and the common electrode 112, one or more of them may be formed using an oxide semiconductor. By using an oxide semiconductor having the same metal element in two or more of the layers constituting the display device, it becomes possible to commonly use manufacturing equipment (for example, a film forming apparatus, a processing apparatus, etc.) in two or more processes, so that the manufacturing cost can be suppressed

[0096] The oxide semiconductor is a semiconductor material whose resistance can be controlled by at least one of oxygen deficiency in the film and the concentration of impurities such as hydrogen and water in the film. Therefore, the oxide semiconductor ​​​​​​​​​​​​​​ Performing a process in which at least one of oxygen deficiency and impurity concentration increases in a layer, or selecting a process in which at least one of oxygen deficiency and impurity concentration decreases, the resistivity of the oxide conductive layer can be controlled.

[0097] Note that the oxide conductive layer formed using the oxide semiconductor layer as described above can also be referred to as an oxide semiconductor layer with a high carrier density and low resistance, an oxide semiconductor layer having conductivity, or an oxide semiconductor layer with high conductivity.

[0098] In addition, by forming the oxide semiconductor layer and the oxide conductive layer with the same metal element, the manufacturing cost can be reduced. For example, using a metal oxide target with the same metal composition can reduce the manufacturing cost. Also, by using a metal oxide target with the same metal composition, the etching gas or etching solution used when processing the oxide semiconductor layer can be commonly used. However, even if the oxide semiconductor layer and the oxide conductive layer have the same metal element, their compositions may be different. For example, during the manufacturing process of a display device, metal elements in the film may desorb, resulting in different metal compositions.

[0099] For example, when a silicon nitride film containing hydrogen is used for the insulating layer 212 and an oxide semiconductor is used for the conductive layer 222c, the conductivity of the oxide semiconductor can be increased by hydrogen supplied from the insulating layer 212. For example, when a silicon nitride film containing hydrogen is used for the insulating layer 220 and an oxide semiconductor is used for the pixel electrode 111, the conductivity of the oxide semiconductor can be increased by hydrogen supplied from the insulating layer 220.

[0100] ​​​​​​​​​​​​​​On the side of the substrate 61 of the display device 100A relative to the liquid crystal layer 113, a colored layer 131 and a light-shielding layer 13 2 are provided. The colored layer 131 is located at least in a portion overlapping with the display region 68 of the sub-pixel. A light-shielding layer 132 is provided in the non-display region 66 of the pixel (sub-pixel). The light-shielding layer 132 overlaps at least a part of the transistor 206.

[0101] It is preferable to provide an overcoat 121 between the colored layer 131 and the light-shielding layer 132 and the liquid crystal layer 113. The overcoat 121 can suppress the diffusion of impurities contained in the colored layer 131 and the light-shielding layer 132 and the like into the liquid crystal layer 113. The substrate 51 and the substrate 61 are bonded together by an adhesive layer 141. The liquid crystal layer 113 is sealed in the region surrounded by the substrate 51, the substrate 6 1, and the adhesive layer 141.

[0102] When the display device 100A functions as a transmissive liquid crystal display device, two polarizing plates are arranged so as to sandwich the display unit 6 2. In FIG. 2(A), the polarizing plate 130 on the substrate 61 side is illustrated.

[0103] Light 45 from a backlight disposed outside the polarizing plate provided on the substrate 51 side enters through the polarizing plate. At this time, the voltage applied between the pixel electrode 111 and the common electrode 112 can control the alignment of the liquid crystal layer 113 and control the optical modulation of light. That is, the intensity of the light emitted through the polarizing plate 130 can be controlled. Further, since the incident light is absorbed by the colored layer 131 for light outside a specific wavelength region, the emitted light becomes light exhibiting, for example, red color, blue color, or green color. In addition to the polarizing plate, for example, a circular polarizing plate can be used. As the circular polarizing plate, for example, the alignment of the liquid crystal layer 113 is controlled by the voltage applied between the pixel electrode 111 and the common electrode 112, and the optical modulation of light can be controlled. That is, the intensity of the light emitted through the polarizing plate 130 can be controlled. Also, since the incident light is absorbed by the colored layer 131 for light outside a specific wavelength region, the emitted light becomes light exhibiting, for example, red color, blue color, or green color. color, blue color, or green color.

[0104] In addition to the polarizing plate, for example, a circular polarizing plate can be used. As the circular polarizing plate, for example, A linearly polarized light plate and a quarter-wave retardation plate laminated thereon can be used. By using a circularly polarized light plate, the viewing angle dependence of the display of the display device can be reduced.

[0105] The drive circuit section 64 has a transistor 201. FIG. 2(B) shows an enlarged view of the transistor 201.

[0106] The transistor 201 has a gate 221, an insulating layer 213, a semiconductor layer 231, a conductive layer 222a, and a conductive layer 222b. Of the conductive layer 222a and the conductive layer 222b, one functions as a source, and the other functions as a drain. The conductive layer 222a and the conductive layer 222b are each electrically connected to the semiconductor layer 231.

[0107] As shown in FIG. 2(B), the semiconductor layer 231 has a first metal oxide layer 231a and a second metal oxide layer 231b on the first metal oxide layer 231a. Details of the semiconductor layer 231 can be referred to the description of the transistor 206.

[0108] The transistor provided in the drive circuit section 64 does not have to have a function of transmitting visible light. Therefore, the conductive layer 222a and the conductive layer 222b can be formed in the same process using the same material (preferably a material having a low resistivity such as a metal).

[0109] In the connection section 204, the wiring 65 and the conductive layer 251 are connected to each other, and the conductive layer 251 and the connector 242 are connected to each other. That is, in the connection section 204, the wiring 65 is electrically connected to the FPC 72 via the conductive layer 251 and the connector 242. With such a configuration, signals and power can be supplied from the FPC 72 to the wiring 65.

[0110] The wiring 65 can be formed of the same material and in the same process as the conductive layers 222a and 222b of the transistor 201 and the conductive layer 222a of the transistor 206. The conductive layer 251 can be formed of the same material and in the same process as the pixel electrode 111 of the liquid crystal element 40. Thus, if the conductive layer constituting the connection portion 204 is manufactured of the same material and in the same process as the conductive layer used for the display portion 62 and the drive circuit portion 64, it is possible to prevent an increase in the number of processes, which is preferable.

[0111] The transistors 201 and 206 may have the same structure or different structures. That is, the transistors of the drive circuit portion 64 and the transistors of the display portion 62 may have the same structure or different structures. Also, the drive circuit portion 64 may have transistors of a plurality of structures, or the display portion 62 may have transistors of a plurality of structures. For example, it is preferable to use transistors having a configuration in which two gates are electrically connected to one or more of the shift register circuit, buffer circuit, and protection circuit of the scanning line drive circuit.

[0112] [Configuration Example of Sub-Pixel] FIG. 4 is a top view of a sub-pixel to which one aspect of the present invention is applied. FIG. 5 is a top view of a comparative sub-pixel.

[0113] Although there are also repetitive parts, first, the features of the pixel (sub-pixel) in one aspect of the present invention will be described.

[0114] Pixels are composed of transistors, capacitors, scanning lines, signal lines, and the like. These components ​​​​​It is often formed using a metal film with a low resistivity. Since the metal film does not transmit light, the portion formed using the metal film is excluded from the display area. As a result, the aperture ratio of the pixel becomes small. In particular, with the increase in image definition, the decrease in the aperture ratio becomes significant. In the case of a liquid crystal display device, when the aperture ratio decreases, it is necessary to increase the amount of light of the backlight in order to increase the brightness and contrast, which leads to an increase in the power consumption of the backlight.

[0115] Therefore, in one aspect of the present invention, one or more of the transistor, capacitor, wiring, and contact portion provided in the pixel adopt a configuration that transmits visible light. Specifically, these components are formed using a material that transmits visible light, such as an oxide semiconductor or an oxide conductor. Since the components provided in the pixel transmit visible light, it is possible to improve the aperture ratio and reduce the power consumption of the backlight. For the scanning line, signal line, power supply line, and peripheral circuit, a metal material is used for low resistance. In this way, it is preferable to select materials according to the function and fabricate different conductive films.

[0116] By using a material that transmits visible light, such as an oxide semiconductor or an oxide conductor, transistors with various structures can be fabricated. Unlike silicon, the oxide semiconductor has the characteristic that even when doped with impurities to reduce the resistance, it has light transmittance for visible light.

[0117] Figs. 4 and 5 show top views of a sub-pixel having a vertical electric field mode liquid crystal element such as a TN mode or a VA mode. Fig. 4 is a top view of a sub-pixel to which one aspect of the present invention is applied. Fig. 5 is a top view of a comparative sub-pixel.

[0118] FIG. 4(A) and FIG. 5(A) are top views of the stack from gate 223 to pixel electrode 111 among the sub-pixels, as viewed from the side of the pixel electrode 111. In FIGS. 4(A) and 5(A), the display area 68 of the sub-pixel is indicated by a thick dotted line frame. FIGS. 4(B) and 5(B) are top views of the stack structure of FIG. 4(A) or FIG. 5(A) excluding the pixel electrode 111, respectively. The transistors shown in FIGS. 4 and 5 have gates provided above and below the channel. Gate 221 and gate 223 are electrically connected. A transistor configured such that two gates are electrically connected can increase the field effect mobility and increase the on-current compared to other transistors. As a result, a circuit capable of high-speed operation can be fabricated. Furthermore, it is possible to reduce the occupied area of the circuit section. By applying a transistor with a large on-current, even if the display device is enlarged or the resolution is increased and the number of wirings increases, it is possible to reduce the signal delay in each wiring and suppress display unevenness. Also, by applying such a configuration, a highly reliable transistor can be realized. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like.

[0119] The transistors shown in FIGS. 4 and 5 have gates provided above and below the channel.

[0120] Gate 221 and gate 223 are electrically connected. A transistor configured such that two gates are electrically connected can increase the field effect mobility and increase the on-current compared to other transistors. As a result, a circuit capable of high-speed operation can be fabricated. Furthermore, it is possible to reduce the occupied area of the circuit section. By applying a transistor with a large on-current, even if the display device is enlarged or the resolution is increased and the number of wirings increases, it is possible to reduce the signal delay in each wiring and suppress display unevenness. Also, by applying such a configuration, a highly reliable transistor can be realized. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like.

[0121] In FIGS. 4 and 5, it can be said that one conductive layer has the function of the scanning line 228 and the function of the gate 223. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. Among gate 221 and gate 223, the one with lower resistance is preferably the conductive layer that also functions as the scanning line. It is preferable that the resistance of the conductive layer functioning as the scanning line 228 is sufficiently low. Therefore, the conductive layer functioning as the scanning line 228 is preferably formed using a metal, an alloy, or the like. The conductive layer functioning as the scanning line 228 A material having a function of blocking visible light may be used.

[0122] In FIGS. 4 and 5, one conductive layer can be said to have a function as a signal line 229 and a function as a conductive layer 222a. The resistance of the conductive layer functioning as the signal line 229 is preferably sufficiently low. Therefore, the conductive layer functioning as the signal line 229 is preferably formed using a metal, an alloy, or the like. A material having a function of blocking visible light may be used for the conductive layer functioning as the signal line 229.

[0123] For the gates 221 and 223, either a metal material or an oxide conductor can be used alone or both can be laminated and used. For example, among the gates 221 and 223, an oxide conductor can be used for one and a metal material can be used for the other.

[0124] The transistor can be configured to use an oxide semiconductor layer as the semiconductor layer and use an oxide conductive layer for at least one of the gates 221 and 223. At this time, it is preferable to form the oxide semiconductor layer and the oxide conductive layer using an oxide semiconductor.

[0125] In FIGS. 4 and 5, an example is shown in which a capacitance line 244 is provided in a sub-pixel. The capacitance line 244 is electrically connected to a conductive layer formed of the same material and in the same process as a conductive layer (for example, the gate 221) of the transistor. In FIG. 4, a conductive layer 222c that transmits visible light is provided so as to overlap the capacitance line 244. In FIG. 5, a conductive layer 222b that blocks visible light is provided so as to overlap the capacitance line 244. In FIG. 4, the conductive layer 222c is connected to the pixel electrode 111. In FIG. 5, the conductive layer 222b is connected to the pixel electrode 111. ​

[0126] The configuration shown in FIG. 4 can provide a contact portion between at least a part of the capacitive element, the conductive layer 222c, and the pixel electrode 111 in the display area 68. Therefore, compared with the configuration shown in FIG. 5, the configuration shown in FIG. 4 can increase the aperture ratio of the sub-pixels. Also, the power consumption of the display device can be reduced.

[0127] In one aspect of the present invention, by providing the contact portion between the pixel electrode 111 and the transistor and the capacitive element in the display area 68, the aperture ratio can be increased by 10% or more, and further by 20% or more. As a result, the power consumption of the backlight can be reduced by 10% or more, and further by 20% or more.

[0128] Estimating how much the aperture ratio and the power consumption of the backlight change by changing the configuration of FIG. 5 to that of FIG. 4 gives the following results.

[0129] Here, assuming a display for a large-sized TV, the sub-pixel layouts of FIGS. 4 and 5 are applied to a TN-mode liquid crystal display device with a fineness of 136 ppi, a diagonal dimension of the display area of 65 inches, and a resolution of 8K. will be described.

[0130] The size of the sub-pixel is 62.5 μm × 187.5 μm. The liquid crystal element is in the vertical electric field mode, and the holding capacitance can be formed between the gate wiring and the source wiring or the drain wiring. Also, since 120 Hz driving is assumed, two signal lines are arranged for one sub-pixel. The transistor has a BGTC-type channel etch structure.

[0131] ​​​The aperture ratio of the pixel layout in Fig. 5(A) is 37.3%. The aperture ratio of the pixel layout in Fig. 4(A) is 47.1%. By configuring the holding capacitance and the contact portion between the transistor and the pixel electrode to be transmissive to visible light, the aperture ratio can be increased by 1.26 times, and it is expected that the power consumption of the backlight can be reduced by about 21%.

[0132] [Regarding Materials] Next, details of materials and the like that can be used for each component of the display device of the present embodiment will be described. Note that the description of components that have already been described may be omitted. Also for the display devices, touch panels, and their components shown hereinafter, the following materials can be appropriately used.

[0133] ≪Substrates 51 and 61≫ There are no major restrictions on the material of the substrate included in the display device according to one aspect of the present invention, and various substrates can be used. For example, a glass substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate, a ceramic substrate, a metal substrate, or a plastic substrate can be used.

[0134] By using a thin substrate, the display device can be made lighter and thinner. Furthermore by using a substrate with a thickness that has flexibility, a flexible display device can be realized .

[0135] A display device according to one aspect of the present invention is manufactured by forming transistors and the like on a manufacturing substrate and then transferring the transistors and the like to another substrate. By using the manufacturing substrate, transistors with good characteristics can be formed, transistors with low power consumption can be formed, and a display device that is difficult to break can be obtained. It is possible to achieve manufacturing, imparting heat resistance to a display device, reducing the weight of a display device, or making a display device thinner. The substrate on which the transistor is inverted is not limited to a substrate on which a transistor can be formed, and paper substrates, cellophane substrates, stone substrates, wood substrates, cloth substrates (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester), etc.), leather substrates, or rubber substrates can be used. The transistor included in the display device according to one aspect of the present invention may have any structure of a top gate type or a bottom gate type. Alternatively, gate electrodes may be provided above and below the channel. The semiconductor material used for the transistor is not particularly limited, and examples include oxide semiconductors, silicon, germanium, etc. There is no particular limitation on the crystallinity of the semiconductor material used for the transistor, and any of amorphous semiconductors, semiconductors having crystallinity (microcrystalline semiconductors, polycrystalline semiconductors, single crystal semiconductors, or semiconductors having a crystal region in part) may be used. Using a semiconductor having crystallinity is preferable because it can suppress deterioration of transistor characteristics. For example, an element of Group 14, a compound semiconductor, or an oxide semiconductor can be used for the semiconductor layer. Typically, a semiconductor containing silicon, a semiconductor containing gallium arsenide, or an oxide semiconductor containing indium can be applied to the semiconductor layer. It is preferable to apply an oxide semiconductor to the semiconductor in which the channel of the transistor is formed.

[0136] ≪Transistors 201, 206≫ The transistors included in the display device according to one aspect of the present invention may have any structure of a top gate type or a bottom gate type. Alternatively, gate electrodes may be provided above and below the channel. The semiconductor material used for the transistor is not particularly limited, and examples include oxide semiconductors, silicon, germanium, etc. There is no particular limitation on the crystallinity of the semiconductor material used for the transistor, and any of amorphous semiconductors, semiconductors having crystallinity (microcrystalline semiconductors, polycrystalline semiconductors, single crystal semiconductors, or semiconductors having a crystal region in part) may be used. Using a semiconductor having crystallinity is preferable because it can suppress deterioration of transistor characteristics.

[0137] There is no particular limitation on the crystallinity of the semiconductor material used for the transistor, and any of amorphous semiconductors, semiconductors having crystallinity (microcrystalline semiconductors, polycrystalline semiconductors, single crystal semiconductors, or semiconductors having a crystal region in part) may be used. Using a semiconductor having crystallinity is preferable because it can suppress deterioration of transistor characteristics. For example, an element of Group 14, a compound semiconductor, or an oxide semiconductor can be used for the semiconductor layer. Typically, a semiconductor containing silicon, a semiconductor containing gallium arsenide, or an oxide semiconductor containing indium can be applied to the semiconductor layer.

[0138] For example, an element of Group 14, a compound semiconductor, or an oxide semiconductor can be used for the semiconductor layer. Typically, a semiconductor containing silicon, a semiconductor containing gallium arsenide, or an oxide semiconductor containing indium can be applied to the semiconductor layer.

[0139] It is preferable to apply an oxide semiconductor to the semiconductor in which the channel of the transistor is formed.​​​​​​​ In particular, it is preferable to apply an oxide semiconductor having a larger band gap than silicon. When using a semiconductor material having a wider band gap and a lower carrier density than silicon , it is preferable because the current in the off state of the transistor (off current) can be reduced.

[0140] Regarding the oxide semiconductor, reference can be made to the above description and Embodiment 4 etc.

[0141] By using an oxide semiconductor, fluctuations in electrical characteristics are suppressed, and a highly reliable transistor can be realized.

[0142] Also, due to its low off current, the charge accumulated in the capacitor via the transistor can be held for a long period of time. By applying such a transistor to a pixel, it is possible to maintain the gradation of the displayed image while also stopping the drive circuit. As a result, a display device with extremely low power consumption can be realized.

[0143] Transistors 201 and 206 preferably have an oxide semiconductor layer with high purity and suppression of the formation of oxygen vacancies. Thereby, the off current of the transistor can be made low. . Therefore, the holding time of an electrical signal such as an image signal can be lengthened, and in the power-on state, the writing interval can also be set long. Therefore, the frequency of the refresh operation can be reduced , resulting in an effect of suppressing power consumption.

[0144] Also, since transistors 201 and 206 can obtain a relatively high field-effect mobility, they can be driven at high speed. By using such a transistor capable of high-speed driving in a display device, it is possible to form the transistors in the display section and the transistors in the drive circuit section on the same substrate. ​ is used. That is, as a drive circuit, a semiconductor device separately formed by a silicon wafer or the like is not required, so the number of components of the display device can be reduced. Also, in the display unit as well, by using a transistor capable of high-speed driving, a high-quality image can be provided .

[0145] ≪Insulating layer≫ As the insulating material that can be used for each insulating layer, overcoat, spacer, etc. of the display device , an organic insulating material or an inorganic insulating material can be used. As the organic insulating material , for example, acrylic resin, epoxy resin, polyimide resin, polyamide resin, polyamide imide resin, siloxane resin, benzocyclobutene-based resin, and phenol resin, etc. can be cited . As the inorganic insulating layer, silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum titanum film, cerium oxide film, and neodymium oxide film, etc. can be cited

[0146] ≪Conductive layer≫ In addition to the gate, source, and drain of the transistor, for the conductive layers of various wirings and electrodes of the display device , metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium ium, molybdenum, silver, tantalum, or tungsten, or an alloy having this as a main component can be used as a single-layer structure or a laminated structure. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a molybdenum film, and on an alloy film containing molybdenum and tungsten A two-layer structure with a copper film laminated on top of a copper-magnesium-aluminum alloy film. A layer structure, a titanium film or a titanium nitride film, and an alumina layer on the titanium film or the titanium nitride film. An aluminum film or a copper film is laminated, and then a titanium film or a titanium nitride film is formed on the aluminum film or a copper film. A three-layer structure consisting of a molybdenum film or molybdenum nitride film and a molybdenum film or molybdenum nitride film. An aluminum or copper film is layered on top of the molybdenum film, and then a molybdenum film or For example, when the conductive layer has a three-layer structure, In this case, the first and third layers are titanium, titanium nitride, molybdenum, tungsten, molybdenum, alloys containing tungsten and tungsten, alloys containing molybdenum and zirconium, or molybdenum nitride The first layer is made of copper, aluminum, gold or silver, or copper and manganese. It is preferable to form a film made of a low resistance material such as an alloy of tungsten. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide Alternatively, a conductive material having light transmitting properties, such as an oxide or ITSO, may be used.

[0147] Note that the oxide conductive layer may be formed by controlling the resistivity of the oxide semiconductor.

[0148] ≪Adhesive layer 141≫ The adhesive layer 141 may be made of a thermosetting resin, a photocurable resin, or a two-liquid mixed curable resin. Curable resins can be used, such as acrylic resins, urethane resins, and epoxy resins. Alternatively, a siloxane resin or the like can be used.

[0149] <Connector 242> As the connector 242, for example, an anisotropic conductive film (ACF: Anisotropic Conductive Film), or an anisotropic conductive paste (ACP: Aniso tropic Conductive Paste) can be used.

[0150] ≪Coloring layer 131≫ The coloring layer 131 is a colored layer that transmits light in a specific wavelength range. Materials that can be used for the coloring layer 131 include metal materials, resin materials, and resin materials containing pigments or dyes. etc.

[0151] ≪Light-shielding layer 132≫ The light-shielding layer 132 is provided, for example, between adjacent coloring layers 131 of different colors. For example, a black matrix formed using a metal material or a resin material containing a pigment or dye can be used as the light-shielding layer 132. Note that if the light-shielding layer 132 is also provided in an area other than the display unit 62, such as the drive circuit unit 64 light leakage due to guided light or the like can be suppressed, which is preferable.

[0152] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the display device can be formed by sputtering method, chemical vapor deposition (CVD: Chemical Vapor Deposition) method , vacuum evaporation method, pulsed laser deposition (PLD: Pulsed Laser Deposi tion) method, atomic layer deposition (ALD: Atomic Layer Deposition ) method, etc. Examples of the CVD method include plasma chemical vapor deposition (P ECVD) method and thermal CVD method. Examples of the thermal CVD method include metal organic chemical vapor deposition (MOCVD: Metal Organic CVD) method.

[0153] The thin films (insulating films, semiconductor films, conductive films, etc.) that make up the display device can be formed by methods such as spin coating, dipping, spray coating, inkjet printing, dispensing, screen printing, offset printing, doctor blade, slit coating, roll coating, curtain coating, knife co ating, etc.

[0154] The thin films that make up the display device can be processed using photolithography or other methods. Also, island-shaped thin films may be formed by a film formation method using a masking mask. Or, the thin films may be processed by nanoimprinting, sandblasting, or lift-off methods. As photolithography methods, there are methods of forming a resist mask on the thin film to be processed, processing the thin film by etching or the like, and then removing the resist mask, and methods of forming a photosensitive thin film and then performing exposure and development to process the thin film into a desired shape. There are. After forming a film of a thin film having photosensitivity, exposure and development are performed to process the thin film into a desired shape. There are.

[0155] In photolithography, as the light used for exposure, for example, i-line (wavelength 365 nm ), g-line (wavelength 436 nm), h-line (wavelength 405 nm), and light obtained by mixing these are cited. In addition, ultraviolet light, KrF laser light, or ArF laser light can also be used. In addition, exposure may be performed by immersion lithography technology. As the light used for exposure, extreme ultraviolet light (EUV: Extreme Ultra-violet) and X-rays are cited. . In addition to the light used for exposure, an electron beam can also be used. Extreme ultraviolet light, X-rays or an electron beam is preferably used because extremely fine processing becomes possible. Note that electrons When performing exposure by scanning a beam such as a beam, a photomask is not required. It is.

[0156] For the etching of the thin film, a dry etching method, a wet etching method, a sandblasting method and the like can be used.

[0157] <2. Configuration Example 2 of Display Device> Examples of display devices are shown in FIGS. 6 to 8. FIG. 6 is a cross-sectional view of the display device 100B. FIG. 7 is a cross-sectional view of the display device 100C. FIG. 8(A) is a cross-sectional view of the display device 100D. Note that the perspective views of the display device 100B, the display device 100C, and the display device 100D are the same as the display device 100A shown in FIG. 1, and thus the description here is omitted.

[0158] The display device 100B shown in FIG. 6 has a different transistor structure from the previously shown display device 100A. Specifically, in the display device 100A, an example in which the transistor has one gate was shown, but

[0159] the transistors 201 and 206 of the display device 100B have two gates. As described above, it is preferable that the two gates are electrically connected. Thereby the field-effect mobility of the transistor can be increased.

[0160] Since the other configurations are the same as those of the display device 100A, detailed description is omitted.

[0161] The display device 100C shown in FIG. 7 is an example of a transmissive liquid crystal display device using a vertical electric field type liquid crystal element. It is an example.

[0162] As shown in FIG. 7, the display device 100C includes a substrate 51, a transistor 201, a transistor 206, liquid crystal element 40, capacitive element 219, alignment film 133a, alignment film 133b, connection part 20 4, adhesive layer 141, colored layer 131, light-shielding layer 132, overcoat 121, substrate 61, and a polarizing plate 130, etc. are included.

[0163] The display part 62 has a transistor 206, a liquid crystal element 40, and a capacitive element 219.

[0164] The transistor 206 has a gate 221, an insulating layer 213, a conductive layer 222a, a conductive layer 222c , and a semiconductor layer 231.

[0165] The conductive layer 222a and the conductive layer 222c are each connected to the semiconductor layer 231.

[0166] The liquid crystal element 40 is a liquid crystal element to which the VA mode is applied. The liquid crystal element 40 has a pixel electrode 1 11, a common electrode 112, and a liquid crystal layer 113. The liquid crystal layer 113 is located between the pixel electrode 111 and the common electrode 112.

[0167] The pixel electrode 111 is electrically connected to the semiconductor layer 23 1 included in the transistor 206 via the conductive layer 222c.

[0168] The capacitive element 219 has a conductive layer 217 and a conductive layer 218. The conductive layer 217 and the conductive layer 21 8 overlap via the insulating layer 213.

[0169] Here, for the semiconductor layer 231, the conductive layer 222c, the conductive layer 217, and the conductive layer 218, a conductive material that transmits visible light is used. The conductive layer 218 and the conductive layer 222c can be formed in the same process and with the same material. Thereby, the pixel electrode 111 and the co of the transistor 206 The contact portion and the capacitive element 219 can be arranged in the display area 68. Therefore the aperture ratio can be increased.

[0170] When the overcoat 121 has a planarization function, the common electrode 112 can be formed flat This can suppress the variation in the thickness of the liquid crystal layer 113.

[0171] An example of the materials of each layer of the transistor 206 shown in FIG. 7 and an example of the forming method will be described .

[0172] First, as one electrode (conductive layer 217) of the capacitive element, a conductive film that transmits visible light is formed, and then, using a sputtering method, as the gate 221, a metal film such as a Cu film is formed. The metal film also functions as a scanning line. Also, using the metal film, in the same process the gate wiring in the transistors of the peripheral circuit can also be formed.

[0173] Next, as the insulating layer 213 which is a gate insulating layer, a silicon nitride film and a silicon oxynitride film are laminated and formed. Next, as the semiconductor layer 231, using a sputtering method, CAC -OS film and CAAC-OS film are laminated and formed. By forming a CAAC-OS film having high chemical resistance and plasma resistance on the CAC-OS film, during the transistor manufacturing process, the semiconductor layer 231 is less likely to be damaged. Next, as the conductive layer 222c which is a source electrode or a drain electrode, an indium zinc oxide film is formed using a sputtering method. The semiconductor layer 231 and the conductive layer 222c can each be formed by wet etching . When forming the conductive layer 222c, the semiconductor layer 231 is not etched ​To increase the selection ratio, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. Also, using the indium zinc oxide film, the other electrode (conductive layer 218) of the capacitor element can be formed in the same process.

[0174] Next, using the sputtering method, a metal film such as a Cu film is formed as the signal line and the conductive layer 222a. Also, using the metal film, the source wiring and the drain wiring in the transistors of the peripheral circuit can be formed in the same process.

[0175] Next, as the passivation films, the insulating layer 212 and the insulating layer 214, a silicon oxynitride film and a silicon nitride film are laminated using a PECVD apparatus. After that, as the insulating layer 215 having a planarizing function, an acrylic resin is applied and an opening (contact opening) is formed. Then, an ITO film is formed as the pixel electrode 111.

[0176] Note that for the gate electrode of the transistor included in the pixel, it is preferable to use a metal film such as a Cu film formed as a scanning line. Thereby, it is possible to suppress light from the backlight from irradiating the channel formation region. In FIG. 7, the contact portion between the transistor 206 and the pixel electrode 111, and the capacitor element 219 are configured to be transmissive to visible light.

[0177] The display device 100D shown in FIG. 8(A) is different from the display device 100C shown above in the arrangement and shape of the pixel electrode 111 and the common electrode 112.

[0178] Both the pixel electrode 111 and the common electrode 112 may have a comb-shaped upper surface shape (also referred to as a planar shape), or an upper surface shape provided with slits.

[0179] In the display device 100D shown in Fig. 8(A), the pixel electrode 111 and the common electrode 112 are on the same flat plane.

[0180] Or, when viewed from above, the end of the slit of one electrode and the end of the slit of the other electrode may be aligned. A cross-sectional view in this case is shown in Fig. 8(B).

[0181] Or, when viewed from above, the pixel electrode 111 and the common electrode 112 may have a portion that overlaps with each other and. A cross-sectional view in this case is shown in Fig. 8(C).

[0182] Or, the display unit 62 may have a portion where neither the pixel electrode 111 nor the common electrode 112 is provided when viewed from above and. A cross-sectional view in this case is shown in Fig. 8(D).

[0183] As described above, various shapes of transistors and liquid crystal elements can be applied to the display device according to one aspect of the present invention and.

[0184] <3. Pixel arrangement example> Examples of pixel arrangements are shown in Figs. 9(A) and (B). In Figs. 9(A) and (B), an example in which one pixel is composed of a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B is shown. In Figs. 9( A), (B), a plurality of scanning lines 81 extend in the x direction, and a plurality of signal lines 82 extend in the y direction, and the scanning lines 81 and the signal lines 82 intersect.

[0185] As shown within the dashed double-dotted line frame in Fig. 9(A), the sub-pixel has a transistor 206, a capacitor element 3 4, and a liquid crystal element 40. The gate of the transistor 206 is electrically connected to the scanning line 81 is connected. Of the source and drain of the transistor 206, one is electrically connected to the signal line 82, and the other is electrically connected to one electrode of the capacitive element 34 and one electrode of the liquid crystal element 40. To the other electrode of the capacitive element 34 and the other electrode of the liquid crystal element 40, a fixed potential is applied respectively.

[0186] In FIGS. 9(A) and (B), an example of applying source line inversion driving is shown. Signal A1 and signal A 2 are signals with the same polarity. Signal B1 and signal B2 are signals with the same polarity. Signal A1 and signal B1 are signals with different polarities from each other. Signal A2 and signal B2 are signals with different polarities from each other.

[0187] As the display device becomes more high-definition, the distance between sub-pixels becomes narrower. Therefore, for example, as shown within the dashed line frame in FIG. 9(A), in the sub-pixel where signal A1 is input, in the vicinity of the signal line 82 where signal B1 is input, the liquid crystal is liable to be affected by the potentials of both signal A1 and signal B1. As a result, alignment defects of the liquid crystal are likely to occur.

[0188] In FIG. 9(A), the direction in which a plurality of sub-pixels presenting the same color are arranged is the y direction, and is substantially parallel to the direction in which the signal line 82 extends. As shown within the dashed line frame in FIG. 9(A), sub-pixels presenting different colors are adjacent to the long side of the sub-pixel.

[0189] In FIG. 9(B), the direction in which a plurality of sub-pixels presenting the same color are arranged is the x direction, and intersects the direction in which the signal line 82 extends. As shown within the dashed line frame in FIG. 9(B), sub-pixels presenting the same color are adjacent to the short side of the sub-pixel.

[0190] As shown in FIG. 9(B), when the side of the sub-pixel that is substantially parallel to the extending direction of the signal line 82 is a short side, the alignment defect of the liquid crystal is more likely to occur than when it is a long side (FIG. 9(A)). The region where the alignment defect of the liquid crystal is likely to occur can be narrowed. As shown in FIG. 9(B), when the region where the alignment defect of the liquid crystal is likely to occur is located between sub-pixels presenting the same color, it is less likely for the user of the display device to visually recognize a display defect than when it is located between sub-pixels presenting different colors (FIG. 9(A)). In one aspect of the present invention, the direction in which a plurality of sub-pixels presenting the same color are arranged preferably intersects the direction in which the signal line 82 extends. (FIG. 9(A)).

[0191] <4. Configuration Example 3 of Display Device> One aspect of the present invention can be applied to a display device (also referred to as an input / output device or a touch panel) equipped with a touch sensor. The configuration of each of the above-described display devices can be applied to a touch panel. In the present embodiment, an example of mounting a touch sensor on the display device 100A will be mainly described.

[0192] There is no limitation on the detection element (also referred to as a sensor element) included in the touch panel according to one aspect of the present invention. Various sensors capable of detecting the proximity or contact of a detected object such as a finger or a stylus can be applied as the detection element.

[0193] As the sensor method, for example, various methods such as a capacitance method, a resistive film method, a surface acoustic wave method, an infrared method, an optical method, and a pressure-sensitive method can be used.

[0194] In the present embodiment, a touch panel having a capacitance-type detection element will be described as an example.

[0195] The capacitive touch sensor includes a surface capacitive touch sensor and a projected capacitive touch sensor. The electrostatic capacitance type includes the self-capacitance type and the mutual capacitance type. This is preferable because it enables simultaneous multi-point detection.

[0196] The touch panel according to one embodiment of the present invention is formed by bonding a display device and a sensing element that are separately manufactured. A structure in which a substrate supporting a display element and / or an opposing substrate are provided with electrodes constituting a sensing element. Various configurations can be applied, such as a configuration in which a pole or the like is provided.

[0197] An example of a touch panel is shown in FIG. 10. FIG. 10(A) is a perspective view of a touch panel 350A. FIG. 10(B) is a perspective schematic view of FIG. 10(A). In FIG. 10B, the substrate 61 and the substrate 162 are shown. Only the outline is indicated by a dashed line.

[0198] The touch panel 350A is constructed by bonding a display device and a sensing element that are separately manufactured. be.

[0199] The touch panel 350A has an input device 375 and a display device 370, which are overlapped. It is provided.

[0200] The input device 375 includes a substrate 162, an electrode 127, an electrode 128, a plurality of wirings 137, and a plurality of The FPC 72b has the plurality of wirings 137 and the plurality of wirings 138. The FPC 72b is electrically connected to the IC 73b.

[0201] The display device 370 has a substrate 51 and a substrate 61 disposed opposite each other. It has a display unit 62 and a drive circuit unit 64. Wiring 65 and the like are provided on the substrate 51 and are present. The FPC 72a is electrically connected to the wiring 65. An IC 73a is provided on the FPC 72a.

[0202] Signals and power are supplied from the wiring 65 to the display unit 62 and the drive circuit unit 64. The said signals and power are input from the outside or the IC 73a to the wiring 65 via the FPC 72a .

[0203] The display device 370 shown in FIG. 10 can apply the display device 100A shown in FIG. 2(A). It can be done.

[0204] <5. Configuration Example of Display Device 4> FIG. 11 shows an example of a touch panel. FIG. 11(A) is a perspective view of the touch panel 350B. FIG. 11(B) is a perspective schematic view of FIG. 11(A) unfolded. For clarity, only typical components are shown. In FIG. 11(B), the substrate 61 is outlined only by a dashed line for clarity.

[0205] The touch panel 350B is an in-cell type touch panel having a function of displaying an image and a function as a touch sensor. It is.

[0206] The touch panel 350B has a configuration in which electrodes and the like constituting detection elements are provided only on the counter substrate. Such a configuration can reduce the thickness or weight of the touch panel compared to a configuration in which a separately manufactured display device and detection elements are bonded together, or can reduce the number of parts of the touch panel. It can be.

[0207] In FIGS. 11(A) and (B), the input device 376 is provided on the substrate 61. Also, The wirings 137, 138, etc. of the input device 376 are electrically connected to the FPC7 provided on the display device 379. For example, at the connection part 63, one of the wirings 137 (or 138) is electrically connected to the conductive layer provided on the substrate 51 side via a connector. With such a configuration, the FPC connected to the touch panel 350B can be arranged only on one substrate side (here, the substrate 51 side). Also, although it may be configured to attach two or more FPCs to the touch panel 350B, as shown in FIGS. 11(A) and (B), one FPC72 is provided on the touch panel 350B, and a configuration in which signals are supplied to both the display device 379 and the input device 376 from the FPC72 is preferable because the configuration can be further simplified.

[0208] Compared with the case of connecting FPCs to both the substrate 51 side and the substrate 61 side, it is easier to incorporate into an electronic device and the number of components can be reduced. The IC73 may have a function of driving the input device 376. An IC for driving the input device 376 may be further provided on the FPC72. Alternatively, an IC for driving the input device 376 may be mounted on the substrate 51.

[0209]

[0210]

[0210] Among the conductive layers of the input device, a material that transmits visible light is used for the conductive layer overlapping the display area 68. Note that the conductive layer of the input device may be arranged only in the non-display area 66. By configuring the conductive layer of the input device not to overlap the display area 68, the visible light transmittance of the material of the conductive layer of the input device is not limited. A material with a low resistivity such as metal can be used for the conductive layer of the input device. For example, as the wiring and electrodes of the touch sensor, metal For the conductive layer of the input device, a material that transmits visible light is used for the conductive layer overlapping the display area 68. Note that the conductive layer of the input device may be arranged only in the non-display area 66. By configuring the conductive layer of the input device not to overlap the display area 68, the visible light transmittance of the material of the conductive layer of the input device is not limited. A material with a low resistivity such as metal can be used for the conductive layer of the input device. For example, as the wiring and electrodes of the touch sensor, metal Among the conductive layers of the input device, a material that transmits visible light is used for the conductive layer overlapping the display area 68. Note that the conductive layer of the input device may be arranged only in the non-display area 66. By configuring the conductive layer of the input device not to overlap the display area 68, the visible light transmittance of the material of the conductive layer of the input device is not limited. A material with a low resistivity such as metal can be used for the conductive layer of the input device. For example, as the wiring and electrodes of the touch sensor, metal Among the conductive layers of the input device, a material that transmits visible light is used for the conductive layer overlapping the display area 68. Note that the conductive layer of the input device may be arranged only in the non-display area 66. By configuring the conductive layer of the input device not to overlap the display area 68, the visible light transmittance of the material of the conductive layer of the input device is not limited. A material with a low resistivity such as metal can be used for the conductive layer of the input device. For example, as the wiring and electrodes of the touch sensor, metal Among the conductive layers of the input device, a material that transmits visible light is used for the conductive layer overlapping the display area 68. Note that the conductive layer of the input device may be arranged only in the non-display area 66. By configuring the conductive layer of the input device not to overlap the display area 68, the visible light transmittance of the material of the conductive layer of the input device is not limited. A material with a low resistivity such as metal can be used for the conductive layer of the input device. For example, as the wiring and electrodes of the touch sensor, metal It is preferable to use a mesh. Thereby, the resistance of the wiring and electrodes of the touch sensor can be reduced. Further, it is suitable as a touch sensor for a large display device. Note that generally, metal is a material with a large reflectivity, but it can be made dark by performing oxidation treatment or the like. Therefore, even when viewed from the display surface side, it is possible to suppress a decrease in visibility due to external light reflection.

[0211] Further, the wiring and the electrodes may be formed by laminating a metal layer and a layer with a low reflectivity (also referred to as a "dark layer"). Examples of the dark layer include a layer containing copper oxide, a layer containing copper chloride or tellurium chloride, etc. Further, the dark layer may be formed using metal fine particles such as Ag particles, Ag fibers, Cu particles, etc., nano-carbon particles such as carbon nanotubes (CNT), graphene, and conductive polymers such as PEDOT, polyaniline, polypyrrole, etc.

[0212] Since the display device of the present embodiment has a region where the transistor transmits visible light, the aperture ratio of the pixel can be increased. Thereby, the power consumption of the display device can be reduced.

[0213] The present embodiment can be appropriately combined with other embodiments. Further, in this specification, when a plurality of configuration examples are shown in one embodiment, the configuration examples can be appropriately combined.

[0214] (Embodiment 2) In this embodiment, the operation mode that can be performed by the display device of one aspect of the present invention will be described with reference to FIG. 12.

[0215] ​​​​​​​​​​Incidentally, in the following, it operates at a normal frame frequency (typically 60 Hz or more and 240 Hz or less). The normal operation mode (Normal mode) that operates at a low frame frequency will be exemplified and described below. The idling stop (IDS) drive mode that operates at a low frame frequency will be exemplified and described below.

[0216] Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced. Incidentally, the IDS drive mode refers to a drive method in which, after executing the writing process of image data, the writing of the image data is stopped. Once the image data is written, by extending the interval until the next image data is written, the power consumption required for the writing of the image data during that period can be reduced. The IDS drive mode can have a frame frequency of, for example, about 1 / 100 to 1 / 10 of the normal operation mode. For a still image, the video signal is the same between consecutive frames. Therefore, the IDS drive mode is particularly effective when displaying a still image. By using IDS drive to display an image, the power consumption is reduced, the flicker of the screen is suppressed, and eye fatigue can also be reduced.

[0217] Figures 12(A) to 12(C) are timing charts for explaining a pixel circuit, a normal drive mode, and an IDS drive mode. In Figure 12(A), a first display element 501 (here, a reflective liquid crystal element) and a pixel circuit 506 electrically connected to the first display element 501 are shown. In the pixel circuit 506 shown in Figure 12(A), a signal line SL, a gate line GL, a transistor M1 connected to the signal line SL and the gate line GL, and a capacitor element Cs connected to the transistor M1 are shown. connected to the transistor M1 are shown. In the pixel circuit 506 shown in Figure 12(A), a signal line SL, a gate line GL, a transistor M1 connected to the signal line SL and the gate line GL, and a capacitor element Cs connected to the transistor M1 are shown. connected to the transistor M1 are shown. LC connected to the transistor M1 are shown.

[0218] Transistor M1 can form a leakage path for data D1. Therefore, the lower the off-current of transistor M1, the more preferable. As transistor M1, it is preferable to use a transistor having a metal oxide in the semiconductor layer in which a channel is formed. When the metal oxide has at least one of an amplification action, a rectification action, and a switching action, the metal oxide can be referred to as a metal oxide semiconductor or an oxide semiconductor, abbreviated as OS. Hereinafter, as a representative example of a transistor, a transistor using an oxide semiconductor in the semiconductor layer in which a channel is formed (also referred to as an "OS transistor") will be used for explanation. The OS transistor has a feature that the leakage current (off-current) in the non-conducting state is extremely lower than that of a transistor using polycrystalline silicon or the like. By using the OS transistor for transistor M1, the charge supplied to node ND1 can be held for a long time. In the circuit diagram shown in FIG. 12(A), the liquid crystal element LC becomes a leakage path for data D1. Therefore, in order to appropriately perform IDS driving, the resistivity of the liquid crystal element LC is preferably 1.0×10 Ω·cm or more.

[0219] In the channel region of the OS transistor, for example, oxides containing In, Ga, and Zn, oxides containing In and Zn, etc. can be preferably used. Further, as the oxide containing In, Ga, and Zn, a composition in the vicinity of In:Ga:Zn = 4:2:4.1 1 4 [atomic ratio] can be preferably used.

[0220] [atomic ratio] can be preferably used.

[0221] ​​​​ Figure 12(B) is a timing chart showing the signals applied to the signal line SL and the gate line GL in the normal driving mode. In the normal driving mode, it operates at a normal frame frequency (for example, 60 Hz). Periods from T1 to T3 are shown in Figure 12(B). A scanning signal is applied to the gate line GL during each frame period, and an operation of writing data D1 from the signal line SL to the node ND1 is performed. This operation is the same whether the same data D1 is written or different data is written during the periods from T1 to T3.

[0222] On the other hand, Figure 12(C) is a timing chart showing the waveforms of the signals applied to the signal line SL and the gate line GL in the IDS driving mode. In IDS driving, it operates at a low frame frequency (for example, 1 Hz). One frame period is represented by period T1, and within it, the data writing period is represented by period T and the data holding period is represented by period T W RET . The IDS driving mode performs an operation of applying a scanning signal to the gate line GL during period T W , writing the data D1 of the signal line SL, fixing the gate line GL at a low-level voltage during period T RET to make the transistor M1 non-conductive, and holding the once-written data D1. Note that as the low frame frequency, for example, it may be 0.1 Hz or more and less than 60 Hz.

[0223] This embodiment can be appropriately combined with other embodiments.

[0224] (Embodiment 3) In this embodiment, an example of a driving method of a touch sensor will be described with reference to the drawings.

[0225] <Example of sensor detection method> Figure 13(A) is a block diagram showing the configuration of a mutual capacitance type touch sensor. In Figure 13( A), a pulse voltage output circuit 551 and a current detection circuit 552 are shown. In Figure 13( A), the electrodes 521 to which a pulse voltage is applied and the electrodes 522 for detecting a change in current are each shown as six wirings of X1 to X6 and Y1 to Y6, respectively. Further, Figure 13 (A) shows a capacitance 553 formed by the superposition of the electrode 521 and the electrode 522. Note that the functions of the electrode 521 and the electrode 522 may be mutually replaced. (A) shows the capacitance 553 formed by the superposition of the electrode 521 and the electrode 522. Note that the functions of the electrode 521 and the electrode 522 may be mutually replaced.

[0226] The pulse voltage output circuit 551 is a circuit for sequentially applying a pulse voltage to the wirings of X1 to X6. When a pulse voltage is applied to the wirings of X1 to X6, an electric field is generated between the electrode 521 and the electrode 522 that form the capacitance 553. By utilizing the fact that the electric field generated between these electrodes causes a change in the mutual capacitance of the capacitance 553 due to shielding or the like, the proximity or contact of the object to be detected can be detected. When a pulse voltage is applied to the wirings of X1 to X6, an electric field is generated between the electrode 521 and the electrode 522 that form the capacitance 553. This electric field generated between the electrodes causes a change in the mutual capacitance of the capacitance 553 due to shielding or the like, and by utilizing this, the proximity or contact of the object to be detected can be detected. This electric field generated between the electrodes causes a change in the mutual capacitance of the capacitance 553 due to shielding or the like, and by utilizing this, the proximity or contact of the object to be detected can be detected. This electric field generated between the electrodes causes a change in the mutual capacitance of the capacitance 553 due to shielding or the like, and by utilizing this, the proximity or contact of the object to be detected can be detected.

[0227] The current detection circuit 552 is a circuit for detecting a change in current in the wirings of Y1 to Y6 due to a change in the mutual capacitance in the capacitance 553. In the wirings of Y1 to Y6, the detected current value does not change when there is no proximity or contact of the object to be detected, but when the mutual capacitance decreases due to the proximity or contact of the object to be detected, a change in which the current value decreases is detected. Note that the detection of the current may be performed using an integration circuit or the like. The current detection circuit 552 is a circuit for detecting a change in current in the wirings of Y1 to Y6 due to a change in the mutual capacitance in the capacitance 553. In the wirings of Y1 to Y6, the detected current value does not change when there is no proximity or contact of the object to be detected, but when the mutual capacitance decreases due to the proximity or contact of the object to be detected, a change in which the current value decreases is detected. In the wirings of Y1 to Y6, the detected current value does not change when there is no proximity or contact of the object to be detected, but when the mutual capacitance decreases due to the proximity or contact of the object to be detected, a change in which the current value decreases is detected. Note that the detection of the current may be performed using an integration circuit or the like.

[0228] Note that one or both of the pulse voltage output circuit 551 and the current detection circuit 552 may be formed on the substrate 51 or the substrate 61 shown in FIG. 1 or the like. For example, the display unit 62 or the drive circuit unit 6 Note that one or both of the pulse voltage output circuit 551 and the current detection circuit 552 may be formed on the substrate 51 or the substrate 61 shown in FIG. 1 or the like. For example, the display unit 62 or the drive circuit unit 6 When formed simultaneously with 4 etc., in addition to simplifying the process, it is preferable because the number of components used for driving the touch sensor can be reduced. Further, one or both of the pulse voltage output circuit 551 and the current detection circuit 552 may be mounted on the IC 73. In particular, when crystalline silicon such as polycrystalline silicon or single crystal silicon is used for the semiconductor layer in which the channel is formed as the transistor formed on the substrate 51, the driving ability of circuits such as the pulse voltage output circuit 551 and the current detection circuit 552 is improved, and the sensitivity of the touch sensor can be improved. When formed simultaneously with 4 etc., in addition to simplifying the process, it is preferable because the number of components used for driving the touch sensor can be reduced. Further, one or both of the pulse voltage output circuit 551 and the current detection circuit 552 may be mounted on the IC 73.

[0229] In particular, when crystalline silicon such as polycrystalline silicon or single crystal silicon is used for the semiconductor layer in which the channel is formed as the transistor formed on the substrate 51, the driving ability of circuits such as the pulse voltage output circuit 551 and the current detection circuit 552 is improved, and the sensitivity of the touch sensor can be improved. In particular, when crystalline silicon such as polycrystalline silicon or single crystal silicon is used for the semiconductor layer in which the channel is formed as the transistor formed on the substrate 51, the driving ability of circuits such as the pulse voltage output circuit 551 and the current detection circuit 552 is improved, and the sensitivity of the touch sensor can be improved. In particular, when crystalline silicon such as polycrystalline silicon or single crystal silicon is used for the semiconductor layer in which the channel is formed as the transistor formed on the substrate 51, the driving ability of circuits such as the pulse voltage output circuit 551 and the current detection circuit 552 is improved, and the sensitivity of the touch sensor can be improved. In particular, when crystalline silicon such as polycrystalline silicon or single crystal silicon is used for the semiconductor layer in which the channel is formed as the transistor formed on the substrate 51, the driving ability of circuits such as the pulse voltage output circuit 551 and the current detection circuit 552 is improved, and the sensitivity of the touch sensor can be improved.

[0230] Fig. 13(B) shows the timing chart of the input / output waveforms in the mutual capacitance type touch sensor shown in Fig. 13(A). In Fig. 13(B), it is assumed that the detection of the object to be detected in each matrix is performed in one frame period. Further, Fig. 13(B) shows two cases: when the object to be detected is not detected (non-touch) and when the object to be detected is detected (touch). For the wirings of Y1 to Y6, waveforms corresponding to the current values to be detected are shown. Fig. 13(B) shows the timing chart of the input / output waveforms in the mutual capacitance type touch sensor shown in Fig. 13(A). In Fig. 13(B), it is assumed that the detection of the object to be detected in each matrix is performed in one frame period. Further, Fig. 13(B) shows two cases: when the object to be detected is not detected (non-touch) and when the object to be detected is detected (touch). For the wirings of Y1 to Y6, waveforms corresponding to the current values to be detected are shown. Fig. 13(B) shows the timing chart of the input / output waveforms in the mutual capacitance type touch sensor shown in Fig. 13(A). In Fig. 13(B), it is assumed that the detection of the object to be detected in each matrix is performed in one frame period. Further, Fig. 13(B) shows two cases: when the object to be detected is not detected (non-touch) and when the object to be detected is detected (touch). For the wirings of Y1 to Y6, waveforms corresponding to the current values to be detected are shown. Fig. 13(B) shows the timing chart of the input / output waveforms in the mutual capacitance type touch sensor shown in Fig. 13(A). In Fig. 13(B), it is assumed that the detection of the object to be detected in each matrix is performed in one frame period. Further, Fig. 13(B) shows two cases: when the object to be detected is not detected (non-touch) and when the object to be detected is detected (touch). For the wirings of Y1 to Y6, waveforms corresponding to the current values to be detected are shown. Fig. 13(B) shows the timing chart of the input / output waveforms in the mutual capacitance type touch sensor shown in Fig. 13(A). In Fig. 13(B), it is assumed that the detection of the object to be detected in each matrix is performed in one frame period. Further, Fig. 13(B) shows two cases: when the object to be detected is not detected (non-touch) and when the object to be detected is detected (touch). For the wirings of Y1 to Y6, waveforms corresponding to the current values to be detected are shown.

[0231] Pulse voltages are sequentially applied to the wirings of X1 - X6, and the waveforms on the wirings of Y1 to Y6 change according to the pulse voltages. When there is no proximity or contact of the object to be detected, the waveforms of Y1 to Y6 change uniformly according to the voltage changes on the wirings of X1 to X6. On the other hand, at the location where the object to be detected is in proximity or contact, since the current value decreases, the waveform of the corresponding voltage value also changes. Pulse voltages are sequentially applied to the wirings of X1 - X6, and the waveforms on the wirings of Y1 to Y6 change according to the pulse voltages. When there is no proximity or contact of the object to be detected, the waveforms of Y1 to Y6 change uniformly according to the voltage changes on the wirings of X1 to X6. On the other hand, at the location where the object to be detected is in proximity or contact, since the current value decreases, the waveform of the corresponding voltage value also changes. Pulse voltages are sequentially applied to the wirings of X1 - X6, and the waveforms on the wirings of Y1 to Y6 change according to the pulse voltages. When there is no proximity or contact of the object to be detected, the waveforms of Y1 to Y6 change uniformly according to the voltage changes on the wirings of X1 to X6. On the other hand, at the location where the object to be detected is in proximity or contact, since the current value decreases, the waveform of the corresponding voltage value also changes. Pulse voltages are sequentially applied to the wirings of X1 - X6, and the waveforms on the wirings of Y1 to Y6 change according to the pulse voltages. When there is no proximity or contact of the object to be detected, the waveforms of Y1 to Y6 change uniformly according to the voltage changes on the wirings of X1 to X6. On the other hand, at the location where the object to be detected is in proximity or contact, since the current value decreases, the waveform of the corresponding voltage value also changes. Pulse voltages are sequentially applied to the wirings of X1 - X6, and the waveforms on the wirings of Y1 to Y6 change according to the pulse voltages. When there is no proximity or contact of the object to be detected, the waveforms of Y1 to Y6 change uniformly according to the voltage changes on the wirings of X1 to X6. On the other hand, at the location where the object to be detected is in proximity or contact, since the current value decreases, the waveform of the corresponding voltage value also changes.

[0232] In this way, by detecting the change in mutual capacitance, the proximity or contact of the object to be detected can be detected. In this way, by detecting the change in mutual capacitance, the proximity or contact of the object to be detected can be detected.

[0233] <Example of driving method for display device> FIG. 14(A) is a block diagram showing a configuration example of a display device. In FIG. 14(A), a gate drive circuit GD (scanning line drive circuit), a source drive circuit SD (signal line drive circuit), and a plurality of pixels p ix are shown. In FIG. 14(A), gate lines x_1 to x_m (m is a natural number) electrically connected to the gate drive circuit GD, and source lines y_1 to y_n (n is a natural number) electrically connected to the source drive circuit SD are shown. Corresponding to these, the pixels pix are respectively assigned signs of (1,1) to (n,m).

[0234] FIG. 14(B) is a timing chart of signals applied to the gate lines and source lines in the display device shown in FIG. 14(A). In FIG. 14(B), it is shown separately for the case where the data signal is rewritten every one frame period and the case where the data signal is not rewritten. Note that in FIG. 1 4(B), periods such as the retrace period are not considered.

[0235] When the data signal is rewritten every one frame period, scanning signals are sequentially applied to the gate lines x_1 to x_m. During the horizontal scanning period 1H which is the period when the scanning signal is at the H level, the data signal D is applied to the source lines y_1 to y_n of each column.

[0236] When the data signal is not rewritten every one frame period, the scanning signals applied to the gate lines x_1 to x_m are stopped. Also, during the horizontal scanning period 1H, the data signals applied to the source lines y_1 to y_n of each column are stopped.

[0237] The driving method in which the data signal is not rewritten every one frame period is particularly for the pixels pix having Effective when an oxide semiconductor is applied to a semiconductor layer in which a channel is formed as a transistor is. A transistor to which an oxide semiconductor is applied can make the off-current extremely small compared to a transistor to which a semiconductor such as silicon is applied. Therefore, it is possible to hold the data signal written in the previous period without rewriting the data signal every frame period, and for example, it is possible to hold the gradation of the pixel for 1 second or more, preferably 5 seconds or more.

[0238] Also, when applying polycrystalline silicon or the like to a semiconductor layer in which a channel is formed as a transistor included in pixel pix, it is preferable to increase the size of the holding capacitance of the pixel in advance. The larger the holding capacitance, the longer the gradation of the pixel can be held. The size of the holding capacitance may be set according to the leakage current of the transistor or display element electrically connected to the holding capacitance. For example, if the holding capacitance per pixel is 5 fF or more and 5 pF or less, preferably 10 fF or more and 5 pF or less, more preferably 20 fF or more and 1 pF or less, the data signal written in the previous period can be held without rewriting the data signal every frame period, and for example, it is possible to hold the gradation of the pixel over a period of several frames or several tens of frames.

[0239] <Example of driving method for display unit and touch sensor> Figs. 15(A) to (D) are diagrams for explaining the operation of consecutive frame periods when, as an example, the touch sensor described in Figs. 13(A) and (B) and the display unit described in Figs. 14(A) and (B) are driven for 1 sec. (1 second). In Fig. 15(A), 1 of the display unit ​​​​​​​​​​​​​​The frame period is 16.7 ms (frame frequency: 60 Hz), and one frame of the touch sensor is shown for the case where the period is 16.7 ms (frame frequency: 60 Hz).

[0240] In a display device according to an aspect of the present invention, the operation of the display unit and the operation of the touch sensor are independent of each other , and a touch detection period can be provided in parallel with the display period. Therefore, as shown in FIG. 15(A) , the frame periods of both the display unit and the touch sensor can be set to 16.7 ms (frame frequency: 60 Hz). Further, the frame frequencies of the touch sensor and the display unit may be different. For example, as shown in FIG. 15(B), the frame period of the display unit is set to 8. 3 ms (frame frequency: 120 Hz), and the frame period of the touch sensor can be set to 16 .7 ms (frame frequency: 60 Hz). Also, although not shown, the frame frequency of the display unit may be 33.3 ms (frame frequency: 30 Hz).

[0241] Further, a configuration is provided such that the frame frequency of the display unit can be switched. When displaying a moving image, the frame frequency is increased (for example, 60 Hz or more or 120 Hz or more), and when displaying a still image , the frame frequency is decreased (for example, 60 Hz or less, 30 Hz or less, or 1 Hz or less) to reduce the power consumption of the display device. Also, a configuration is provided such that the frame frequency of the touch sensor can be switched, and the frame frequency is different between the standby state and when a touch is detected .

[0242] Further, in a display device according to an aspect of the present invention, without rewriting the data signal in the display unit, by holding the data signal rewritten in the previous period, the frame period of the display unit is 16.7 m It can be set to a period longer than s. Therefore, as shown in Fig. 15(C), in the display unit The 1-frame period is set to 1 sec. (frame frequency: 1 Hz), and the 1-frame period of the touch sensor can also be set to 16.7 ms (frame frequency: 60 Hz).

[0243] Note that for the configuration in which the data signal rewritten in the previous period is held without rewriting the data signal in the display unit, the IDS drive mode described above can be referred to. Note that for the IDS drive mode, it may be a partial IDS drive mode in which the data signal in the display unit is rewritten only in a specific area. The partial IDS drive mode is a configuration in which the data signal in the display unit is rewritten only in a specific area, and in other areas, the data signal rewritten in the previous period is held. Also, according to the touch sensor driving method disclosed in this embodiment, when performing the driving shown in Fig. 15(C), the touch sensor can be continuously driven. Therefore, as shown in Fig. 15(D ), the data signal of the display unit can be rewritten at the timing when the proximity or contact of the detected object in the touch sensor is detected. Here, if the data signal of the display unit is rewritten during the sensing period of the touch sensor, the noise generated during the rewriting of the data signal may be transmitted to the touch sensor, which may reduce the sensitivity of the touch sensor. Therefore, it is preferable to drive so as to shift the rewriting period of the data signal of the display unit and the sensing period of the touch sensor.

[0244] Also, according to the touch sensor driving method disclosed in this embodiment, when performing the driving shown in Fig. 15(C), the touch sensor can be continuously driven. Therefore, as shown in Fig. 15(D ), the data signal of the display unit can be rewritten at the timing when the proximity or contact of the detected object in the touch sensor is detected.

[0245] Here, if the data signal of the display unit is rewritten during the sensing period of the touch sensor, the noise generated during the rewriting of the data signal may be transmitted to the touch sensor, which may reduce the sensitivity of the touch sensor. Therefore, it is preferable to drive so as to shift the rewriting period of the data signal of the display unit and the sensing period of the touch sensor.

[0246] In Fig. 16(A), the rewriting of the data signal of the display unit and the sensing of the touch sensor are interleaved​​​​​​ An example of performing mutually is shown. Also, in FIG. 16(B), the rewriting operation of the data signal of the display unit shows an example in which the sensing of the touch sensor is performed once every time the rewriting operation is performed twice. Note that this is not limited, and a configuration in which the sensing of the touch sensor is performed once every time the rewriting operation is performed three or more times may also be used.

[0247] In addition, when an oxide semiconductor is used for the semiconductor layer in which the channel is formed in the transistor applied to the pixel pix Since it is possible to extremely reduce the off-current, it is possible to sufficiently reduce the frequency of rewriting the data signal . Specifically, after the data signal is rewritten , it is possible to provide a sufficiently long pause period until the next data signal is rewritten . The pause period can be, for example, 0.5 seconds or more, 1 second or more, or 5 seconds or more. The upper limit of the pause period is limited by the leakage current of the capacitor connected to the transistor, the display element, etc., but can be, for example, 1 minute or less, 10 minutes or less, 1 hour or less, or 1 day or less .

[0248] FIG. 16(C) shows an example in which the data signal of the display unit is rewritten at a frequency of once every 5 seconds . In FIG. 16(C), after the display unit rewrites the data signal, a pause period for stopping the rewriting operation is provided during the period until the next data signal is rewritten . During the pause period , the touch sensor can be driven at a frame frequency of i Hz (i is equal to or higher than the frame frequency of the display device, here 0.2 Hz or higher). Also, as shown in FIG. 16(C), the sensing of the touch sensor is performed during the pause period and not during the rewriting period of the data signal of the display unit . Then, it is preferable because the sensitivity of the touch sensor can be improved. Also, FIG. 16(D ​As shown in Fig. 1, the data signal of the display unit is rewritten and the touch sensor is sensed at the same time. This allows the driving signals to be simplified.

[0249] In addition, during the pause period when the data signal of the display unit is not rewritten, the data signal to the display unit is In addition to stopping the supply of the signal, either one of the gate driver GD and the source driver SD is In addition, the gate driver GD and the source driver SD may both be stopped. You can also stop the power supply to one or both of them. This will reduce noise. This reduces the power consumption of the display device and improves the sensitivity of the touch sensor. Power consumption can be further reduced.

[0250] The display device according to one embodiment of the present invention has a structure in which a display unit and a touch sensor are sandwiched between two substrates. Therefore, the distance between the display unit and the touch sensor can be made extremely short. Noise generated when the display is in operation is easily transmitted to the touch sensor, reducing the sensitivity of the touch sensor. By applying the driving method exemplified in this embodiment, it is possible to achieve a thin and high It is therefore possible to realize a display device having a touch sensor that achieves both high detection sensitivity and high image quality.

[0251] This embodiment mode can be combined with other embodiment modes as appropriate.

[0252] (Embodiment 4) In this embodiment, the present invention can be used for a semiconductor layer of a transistor disclosed in one embodiment of the present invention. In addition, a metal oxide is used for the semiconductor layer of a transistor. In this case, the metal oxide may be interpreted as an oxide semiconductor.

[0253] Oxide semiconductors can be divided into single-crystalline oxide semiconductors and non-single-crystalline oxide semiconductors. Non-single Examples of crystalline oxide semiconductors include CAAC-OS (c-axis-aligned crys talline oxide semiconductor), polycrystalline oxide semiconductors, n c-OS (nanocrystalline oxide semiconductor ), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like o xide semiconductor), and amorphous oxide semiconductors.

[0254] In addition, CAC-OS (Clo ud-Aligned Composite oxide semiconductor ) may be used for the semiconductor layer of the transistor disclosed in one aspect of the present invention.

[0255] Note that the semiconductor layer of the transistor disclosed in one aspect of the present invention can preferably use the above-mentioned non-single-crystalline oxide semiconductor or CAC-OS. Also, as the non-single-crystalline oxide semiconductor nc-OS or CAAC-OS can be preferably used.

[0256] In one aspect of the present invention, it is preferable to use CAC-OS as the semiconductor layer of the transistor. By using CAC-OS, high electrical characteristics or high reliability can be given to the transistor.

[0257] Hereinafter, the details of CAC-OS will be described.

[0258] CAC-OS or CAC-metal oxide has a conductive function in part of the material and an insulating function in part of the material, and has a semiconductor function as a whole for the material. ​In addition, when using CAC-OS or CAC-metal oxide in the channel formation region of a transistor, the conductive function is the function of allowing carriers, i.e., electrons (or holes), to flow, and the insulating function is the function of not allowing electrons serving as carriers to flow. By causing the conductive function and the insulating function to act complementarily, respectively, a switching function (on / off function) can be imparted to CAC-OS or CAC-metal oxide. In CAC-OS or CAC-metal oxide, by separating their respective functions, both functions can be maximally enhanced. Also, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-described conductive function, and the insulating region has the above-described insulating function. Also, in the material, the conductive region and the insulating region may be separated at the nanoparticle level. Also, the conductive region and the insulating region may be unevenly distributed in the material. Also, the conductive region may be observed with a blurred periphery and connected in a cloud shape. Moreover, in CAC-OS or CAC-metal oxide, the conductive region and the insulating region may be dispersed in the material with sizes of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less, respectively. In addition, CAC-OS or CAC-metal oxide is composed of components having different bandgaps. For example, CAC-OS or CAC-metal oxi

[0259]

[0260]

[0261] ​​​​​​​​​​​​​​de is composed of a component having a wide bandgap due to an insulating region and a component having a narrow bandgap due to a conductive region. In this configuration, when carriers flow, carriers mainly flow in the component having a narrow bandgap. Also, the component having a narrow bandgap acts complementarily to the component having a wide bandgap, and carriers also flow in the component having a wide bandgap in conjunction with the component having a narrow bandgap. Therefore, when the above C AC-OS or CAC-metal oxide is used in the channel formation region of a transistor, a high current driving force, that is, a large on-current, and a high field-effect mobility can be obtained in the on-state of the transistor. That is, CAC-OS or CAC-metal oxide can also be referred to as a matrix composite (matrix composite) or a metal matrix composite (metal m atrix composite). CAC-OS is, for example, a configuration of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less or in the vicinity thereof. In the following, in the metal oxide, one or more metal elements are unevenly distributed,

[0262] and the state in which the regions having the metal elements are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 n (matrix composite) or a metal matrix composite (metal m atrix composite) is also referred to as a mosaic state or a patch state.

[0263] It should be noted that the metal oxide preferably contains at least indium. In particular, it is preferable to contain indium and zinc. In addition to these, aluminum, gallium, yttrium m or less or in the vicinity thereof is also referred to as a mosaic state or a patch state.

[0264] In addition, it is preferably composed of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less or in the vicinity thereof. In the following, in the metal oxide, one or more metal elements are unevenly distributed, and the state in which the regions having the metal elements are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 n One or more selected from um, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium nium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum tungsten, or magnesium may be included There may be.

[0265] For example, in In-Ga-Zn oxide, CAC-OS (among CAC-OS, In-G a-Zn oxide may be particularly referred to as CAC-IGZO.) refers to indium oxide (hereinafter, InO X1 (X1 is a real number greater than 0).), or indium zinc oxide (hereinafter, In X2 Zn Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) and gallium oxide (hereinafter, GaO X3 (X3 is a real number greater than 0). ), or gallium zinc oxide (hereinafter, Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 are real numbers greater than 0).) and the like, and the material separates into a mosaic shape The mosaic InO X1 , or In X2 Zn Y2 O Z2 has a structure uniformly distributed in the film (hereinafter also referred to as cloud-like).

[0266] That is, CAC-OS is a composite metal oxide having a structure in which a region mainly composed of GaO X3 and a region mainly composed of In X2 Zn Y2 O Z2 , or InO X1 are mixed There is. In this specification, for example, when the atomic number ratio of In to the element M in the first region is greater than the atomic number ratio of In to the element M in the second region, the first region is considered to have a higher concentration of In compared to the second region.

[0267] Note that IGZO is a common name and refers to a compound composed of In, Ga, Zn, and O in some cases There is. As a representative example, InGaO3(ZnO) m1 (m1 is a natural number), or In (1 +x0) Ga (1-x0) O3(ZnO) m0 (-1 ≦ x0 ≦ 1, m0 is an arbitrary number) represents a crystalline compound. Examples include crystalline compounds.

[0268] The above crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC (c-axis aligned crystal) structure. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without orientation in the a-b plane. That is, it is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without orientation in the a-b plane.

[0269] On the other hand, CAC-OS relates to the material composition of metal oxides. CAC-OS refers to a structure in which in a material composition containing In, Ga, Zn, and O, regions observed as nanoparticle-like regions with Ga as a main component in part and regions observed as nanoparticle-like regions with In as a main component in part are randomly dispersed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element. Note that CAC-OS does not include a laminated structure of two or more types of films with different compositions.

[0270] For example, a structure composed of two layers, a film with In as a main component and a film with Ga as a main component, is not included. For example, a structure composed of two layers, a film with In as a main component and a film with Ga as a main component, is not included. That is, it is not included.

[0271] Note that, for the region where GaO X3 is the main component, and the region where In X2 Zn Y2 O Z2 , or InO X1 is the main component, a clear boundary may not be observable in some cases.

[0272] Note that when one or more selected from aluminum, yttrium, copper, vanadium, beryllium , boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium ium are included instead of gallium, CAC-OS is observed in part as a region in the form of nanoparticles with the metal element as the main component, and in part as a region in the form of nanoparticles with In as the main component, and they are randomly dispersed mosaically in this configuration.

[0273] CAC-OS can be formed by, for example, a sputtering method under conditions where the substrate is not intentionally heated. Also, when forming CAC-OS by the sputtering method, as the film-forming gas , one or more selected from inert gases (typically argon), oxygen gas, and nitrogen gas can be used. Also, the lower the flow rate ratio of oxygen gas to the total flow rate of the film-forming gas during film formation, the more preferable it is. For example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0274] CAC-OS was measured using the θ / 2θ scan by the Out-of-plane method, which is a type of X-ray diffraction (XRD) measurement method.​ 、It has the characteristic that no distinct peak is observed. That is, from X-ray diffraction, it can be seen that there is no orientation in the a-b plane direction and the c-axis direction of the measurement region.

[0275] Also, in the electron diffraction pattern obtained by irradiating CAC-OS with an electron beam having a probe diameter of 1 nm (also referred to as a nano-beam electron beam), regions with high brightness are observed in a ring shape, and a plurality of bright spots are observed in the ring region. Therefore, from the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure without orientation in the plane direction and the cross-sectional direction.

[0276] Also, for example, in CAC-OS in In-Ga-Zn oxide, from the EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX), regions where GaO is the main component and regions where In X3 X2 Zn Y2 O Z2 or InO X1 is the main component are unevenly distributed and mixed It can be confirmed that it has a structure.

[0277] CAC-OS has a structure different from that of an IGZO compound in which metal elements are uniformly distributed, and has properties different from those of an IG ZO compound. That is, CAC-OS has regions where GaO X3 etc. are the main components and regions where In X2 Zn Y2 O Z2 or InO X1 are the main components, and they are phase-separated from each other and have a structure in which regions with each element as the main component are mosaic-like.

[0278] Here, In X2 Zn Y2 O Z2 , or InO X1 is a region where the main component is GaO X3 etc. is a region with higher conductivity compared to the region where the main component is. That is, In X2 Zn Y 2O Z2 , or InO X1 is the main component. When carriers flow through this region, the conductivity as an oxide semiconductor is manifested. Therefore, In Zn X2 Zn Y2 O Z2 , or InO X 1 is the main component. When this region is distributed in a cloud-like manner in the oxide semiconductor, a high field-effect mobility (μ) can be achieved.

[0279] On the other hand, the region where the main component is GaO X3 etc. is a region with higher insulation compared to the region where In X2 Zn Y2 O Z2 , or InO X 1 is the main component. That is, when the region where GaO X3 etc. is the main component is distributed in the oxide semiconductor, the leakage current can be suppressed, and a good switching operation can be achieved.

[0280] Therefore, when CAC-OS is used in a semiconductor device, the insulation caused by GaO X3 etc. and the In X2 Zn Y2 O Z2 , or InO X1 resulting conductivity act complementarily. As a result, a high on-current (I on ), and a high field-effect mobility (μ) can be achieved.

[0281] In addition, a semiconductor device using CAC-OS has high reliability. Therefore, CAC-OS is optimal for various semiconductor devices including displays.

[0282] This embodiment can be appropriately combined with other embodiments.

[0283] (Embodiment 5) In this embodiment, an electronic device according to an aspect of the present invention will be described.

[0284] Examples of the electronic device include a television device, a desktop or notebook personal computer, a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio playback device, and a large game machine such as a pachinko machine.

[0285] FIGS. 17(A) to (C) show a portable information terminal. The portable information terminal of this embodiment has one or more functions selected from, for example, a telephone, a notebook, or an information browsing device. Specifically, it can be used as a smartphone or a smartwatch. The portable information terminal of this embodiment can execute various applications such as, for example, mobile phone, email, text browsing and creation, music playback, video playback, Internet communication, and games. The portable information terminal shown in FIGS. 17(A) to (C) can have various functions. For example, a function of displaying various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, a date, or a time, a function of controlling processing by various software (programs), a wireless communication function, and various operations using the wireless communication function (program).​ A function of connecting to a computer network, transmitting various data using a wireless communication function Or a function of receiving, reading out a program or data recorded on a recording medium A function of displaying on a display unit, etc. can be provided. Note that the functions of the portable information terminals shown in FIGS. 17(A) to (C) are not limited to these, and may have other functions.

[0286] The portable information terminals shown in FIGS. 17(A) to (C) can execute various applications such as mobile phones, e-mails, text viewing and creation, music playback, Internet communication, computer games, etc. Also, the portable information terminals shown in FIGS. 17(A) to (C) can execute a communication standard-compliant short-range wireless communication. For example, the wristwatch-type portable information terminal 820 shown in FIG. 17(C) can communicate hands-free by mutually communicating with a wireless communication-capable headset.

[0287] The portable information terminal 800 shown in FIG. 17(A) includes a housing 811, a display unit 812, operation buttons 81 3, an external connection port 814, a speaker 815, a microphone 816, etc. The display unit 8 12 of the portable information terminal 800 has a flat surface.

[0288] The portable information terminal 810 shown in FIG. 17(B) includes a housing 811, a display unit 812, operation buttons 81 3, an external connection port 814, a speaker 815, a microphone 816, a camera 817, etc. The display unit 812 of the portable information terminal 810 has a curved surface.

[0289] FIG. 17(C) shows a wristwatch-type portable information terminal 820. The portable information terminal 820 includes a housing 8 11, a display unit 812, a speaker 815, operation keys 818 (power switch or operation switch It has (including chi), etc. The outer shape of the display unit 812 of the portable information terminal 820 is circular. The portable The display unit 812 of the information terminal 820 has a flat surface.

[0290] The display device according to one aspect of the present invention can be used for the display unit 812. Thereby, a portable information terminal having a display unit with a high aperture ratio can be manufactured.

[0291] The portable information terminal of the present embodiment includes a touch sensor in the display unit 812. Any operation such as making a call or inputting characters can be performed by touching the display unit 812 with a finger or a stylus.

[0292] Also, by operating the operation button 813, the power can be turned on and off, and the type of the image displayed on the display unit 812 can be switched. For example, it can be switched from the mail creation screen to the main menu screen.

[0293] Further, by providing a detection device such as a gyro sensor or an acceleration sensor inside the portable information terminal, the orientation (vertical or horizontal) of the portable information terminal can be determined, and the screen display orientation of the display unit 812 can be automatically switched. Also, the switching of the screen display orientation can be performed by touching the display unit 812, operating the operation button 813, or voice input using the microphone 816.

[0294] The television device 7100 shown in FIG. 18(A) has a display unit 7102 incorporated in a housing 7101. The display unit 7102 can display video. The display device according to one aspect of the present invention can be used for the display unit 7102. Thereby, a display unit with a high aperture ratio can be obtained. A television apparatus having the same can be manufactured. Here, a configuration in which the housing 7101 is supported by the stand 7103 is shown. is shown.

[0295] The operation of the television apparatus 7100 can be performed by operation switches provided in the housing 7101 or a separate remote control unit 7111. The operation keys provided in the remote control unit 7111 can be used to operate channels and volume, and the video displayed on the display unit 7102 can be operated. Further, the remote control unit 7111 may be configured to include a display unit for displaying information output from the remote control unit 7111 .

[0296] Note that the television apparatus 7100 has a configuration including a receiver, a modem, etc. The receiver can receive general television broadcasts, and further, by connecting to a wired or wireless communication network via a modem, one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication can also be performed.

[0297] The computer 7200 shown in FIG. 18(B) includes a main body 7201, a housing 7202, a display unit 72 03, a keyboard 7204, an external connection port 7205, a pointing device 7206 , etc. Note that the computer is manufactured by using the display device according to one aspect of the present invention as its display unit 7203 . Thereby, a computer having a display unit with a high aperture ratio can be manufactured.

[0298] The camera 7300 shown in FIG. 18(C) has a housing 7301, a display unit 7302, operation buttons 73 03, a shutter button 7304, etc. The camera 7300 also has a detachable lens The lens 7306 is attached.

[0299] The display device according to one aspect of the present invention can be used for the display unit 7302. As a result, a camera having a display unit with a high aperture ratio can be manufactured.

[0300] Here, the camera 7300 is configured such that the lens 7306 can be removed from the housing 7301 and replaced, but the lens 7306 and the housing 7301 may be integrated.

[0301] The camera 7300 can capture a still image or a moving image by pressing the shutter button 7304. Further, the display unit 7302 has a function as a touch panel, and it is also possible to capture an image by touching the display unit 7302.

[0302] Note that the camera 7300 can be separately equipped with a strobe device, a viewfinder, etc. Alternatively, these may be incorporated in the housing 7301.

[0303] This embodiment can be appropriately combined with other embodiments.

Example

[0304] In this example, the cross-sectional structures of the display unit and the scanning line drive circuit unit of the display device according to one aspect of the present invention are examined, and the results of evaluating the light transmittance of the contact portion between the transistor and the pixel electrode arranged in the display region are explained.

[0305] FIG. 19 shows the cross-sectional structures of the display unit and the scanning line drive circuit unit of the display device of this example.

[0306] The display device shown in FIG. 19 is an example of a transmissive liquid crystal display device using a vertical electric field type liquid crystal element. ​​​​​​​​

[0307] As shown in FIG. 19, the display device includes a substrate 51, a transistor 201, and a transistor 206 , a liquid crystal element 40, a capacitor element 219, an alignment film 133a, an alignment film 133b, a connection portion 204, a contact layer 141, a coloring layer 131, a light-shielding layer 132, an overcoat 121, a substrate 61, and a polarizing plate 130, etc.

[0308] The display unit 62 includes a transistor 206, a liquid crystal element 40, and a capacitor element 219.

[0309] The transistor 206 includes a gate 221, an insulating layer 213, a conductive layer 222a, a conductive layer 222c , and a semiconductor layer 231.

[0310] The conductive layer 222a and the conductive layer 222c are each connected to the semiconductor layer 231.

[0311] The liquid crystal element 40 is a liquid crystal element to which a VA mode is applied. The liquid crystal element 40 includes a pixel electrode 1 11, a common electrode 112, and a liquid crystal layer 113. The liquid crystal layer 113 is located between the pixel electrode 111 and the common electrode 112.

[0312] The pixel electrode 111 is electrically connected to the semiconductor layer 23 1 included in the transistor 206 via the conductive layer 222c.

[0313] The conductive layer 222c functions as one of a pair of electrodes included in the capacitor element 219. The conductive layer 2 17a functions as the other of a pair of electrodes included in the capacitor element 219. The conductive layer 222c and the conductive layer 217a overlap via the insulating layer 213. The conductive layer 217b and the conductive layer 218 are connected.

[0314] Here, for the semiconductor layer 231, the conductive layer 222c, the conductive layers 217a and 217b, and the conductive layer 218, a conductive material that transmits visible light is used. The conductive layers 217a and 217b can be formed by the same process and using the same material. The conductive layer 218 and the conductive layer 222c can be formed by the same process and using the same material. As a result, the contact portion between the pixel electrode 111 and the transistor 206, the contact portion between the conductive layer 217b and the conductive layer 218, and the capacitor element 219 can be arranged in the display region 68. Therefore, the aperture ratio can be increased.

[0315] An example of the materials of each layer of the transistor 206 shown in FIG. 19 and an example of the formation method will be described.

[0316] First, as the conductive layers 217a and 217b, a conductive film that transmits visible light (for example, I TSO) is formed, and subsequently, as the gate 221, a metal film such as a Cu film is formed using a sputtering method. The metal film also functions as a scanning line. Also, using the metal film, in the same process, the gate wiring in the transistors of the peripheral circuit can also be formed.

[0317] Next, as the insulating layer 213 which is a gate insulating layer, a silicon nitride film and a silicon oxynitride film are laminated and formed. Next, as the semiconductor layer 231, a CAC -OS film and a CAAC-OS film are laminated and formed using a sputtering method. By forming a CAAC-OS film with high chemical resistance and plasma resistance on the CAC-OS film, during the transistor manufacturing process, the semiconductor layer 231 is less likely to be damaged. Next, as the conductive layer 222c which is a source electrode or a drain electrode, an indium zinc oxide film is formed using a sputtering method.​​ The semiconductor layer 231 and the conductive layer 222c are each formed by wet etching. In order to prevent the semiconductor layer 231 from being etched when the conductive layer 222c is formed, In order to increase the selection ratio, a material different from that used for forming the semiconductor layer 231 is used in the etching solution. It is preferable to use the indium zinc oxide film in the same process. A layer 218 may also be formed.

[0318] Next, a metal film such as a Cu film is formed as the signal line and the conductive layer 222a by sputtering. In addition, the metal film is used to form a transistor in a peripheral circuit in the same process. Source and drain wiring may also be formed.

[0319] Next, the insulating layer 212 and the insulating layer 214, which are passivation films, are deposited by a PECVD apparatus. A silicon oxynitride film and a silicon nitride film are laminated using a silicon nitride film. As the functional insulating layer 215, acrylic resin is applied and an opening (contact opening) is formed. Then, an ITO film is formed as the pixel electrode 111.

[0320] The gate electrode of the transistor in the pixel is made of the Cu film formed as the scan line. This allows the light from the backlight to be irradiated onto the channel forming region. In FIG. 7, the contact between the transistor 206 and the pixel electrode 111 The portion and the capacitive element 219 are configured to be able to transmit visible light.

[0321] A laminated structure that can be used for the region 139 in FIG. 19 is fabricated, and the light transmittance is measured. The results are shown in FIG. 20. Note that FIG. 20 also shows the light transmittance of glass (substrate 51). is also shown. The transmittance was measured using a spectrophotometer U-4100 (manufactured by Hitachi High-Technologies Corporation).

[0322] As shown in FIG. 20, in one aspect of the present invention, it was confirmed that the laminated structure formed to increase the aperture ratio transmits visible light. Thereby, it was suggested that the contact portion between the transistor 206 and the pixel electrode 111, the capacitor element 219, etc. can be formed using a material that transmits visible light, thereby reducing the power consumption of the backlight. 11, and the capacitor element 219, etc. can be formed using a material that transmits visible light, thereby reducing the power consumption of the backlight.

Example

[0323] In this example, the cross-sectional structure of the display unit and the scanning line driving circuit unit of the display device according to one aspect of the present invention will be examined, and the results of evaluating the light transmittance of the transistors arranged in the display area will be described.

[0324] Using FIGS. 21(A1), (B1), (C1) and FIGS. 22(A1), (B1), (C1), (D1 ), the manufacturing method of the transistors included in the display unit of the display device of this example will be described. Using FIGS. 21(A2), (B2), (C2) and FIGS. 22(A2), (B2), (C2), (D2 ), the manufacturing method of the transistors included in the scanning line driving circuit unit of the display device of this example will be described.

[0325] First, a conductive layer 217s is formed on the substrate 51, and a conductive layer 224s is formed on the conductive layer 217s (FIGS. 21(A1), (A2)). The conductive layer 217s is formed using a conductive material that transmits visible light ( for example, ITSO). The conductive layer 224s is preferably formed using a conductive material having a lower resistance than the conductive layer 217s, such as a metal. For example, the conductive layer 224s and ​​​​​​​Then, a metal film such as a Cu film is formed using a sputtering method.

[0326] Next, the conductive layer 217s and the conductive layer 224s are processed to form a gate (FIG. 21(B1) , (B2)). An island-shaped conductive layer 217 is formed in the display portion (FIG. 21(B1)), and the scanning line drive In the circuit portion, a stacked structure of the island-shaped conductive layer 217 and the island-shaped conductive layer 224 is formed (FIG. 2 1(B2)). For forming the gate, it is preferable to use a multi-tone mask (halftone mask, graytone mask etc.). When using a multi-tone mask, without increasing the number of masks a gate that transmits visible light is formed in the display portion, and a gate and gate wiring with low resistance can be formed in the scanning line drive circuit portion.

[0327] Next, an insulating layer 213 that functions as a gate insulating layer is formed, and a semiconductor layer 2 31 is formed on the insulating layer 213 (FIG. 21(C1), (C2)). In this embodiment, as the insulating layer 213, a silicon nitride film and a silicon oxynitride film are laminated and formed. In this embodiment, as the semiconductor layer 23 1, a CAC-OS film and a CAAC-OS film are laminated and formed using a sputtering method. By forming a CAAC-OS film with high chemical resistance and plasma resistance on the CAC-OS film the semiconductor layer 231 is less likely to be damaged during the transistor manufacturing process. By using an oxide semiconductor, a semiconductor layer 231 that transmits visible light can be formed.

[0328] Next, a conductive layer 222s is formed, and a conductive layer 222t is formed on the conductive layer 222s (FIG. 22 (A1), (A2)). The conductive layer 222s is formed using a conductive material that transmits visible light. In this embodiment, an indium zinc oxide film is formed as the conductive layer 222s. The conductive layer 222t is preferably formed using a conductive material with a lower resistance than that of the conductive layer 222s, such as a metal. This is preferable.

[0329] Next, the conductive layer 222s and the conductive layer 222t are processed to form a source and a drain (FIG. 22(B1), (B2)). Island-shaped conductive layers 222b and 222c that are connected to a part of the semiconductor layer 231 are formed in the display portion and the scanning line driving circuit portion, respectively (FIG. 22 (B1), (B2)). In the display portion, the remaining portion of the conductive layer 222t is only the island-shaped conductive layer 222a that is connected to a part of the island-shaped conductive layer 222b, and most parts of the transistor are configured to transmit visible light (FIG. 22(B1)). On the other hand, in the scanning line driving circuit portion , island-shaped conductive layers 222a and 222d formed by processing the conductive layer 222t are provided on the island-shaped conductive layer 222b and the island-shaped conductive layer 222c (FIG. 22 (B2)). For the formation of the source and the drain, it is preferable to use a multi-tone mask in the same manner as for the formation of the gate. By using a multi-tone mask, sources and drains that transmit visible light can be formed in the display portion without increasing the number of masks, and low-resistance sources, drains, source wirings, and drain wirings can be formed in the driving circuit portion. The semiconductor layer 231, the source, and the drain can each be formed by wet etching. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. This is preferable. Next, an insulating layer 212 that functions as a gate insulating layer is formed, and a gate 22 is formed on the insulating layer 212 . Island-shaped conductive layers 222a and 222d formed by processing the conductive layer 222t are provided on the island-shaped conductive layer 222b and the island-shaped conductive layer 222c (FIG. 22 (B2)). For the formation of the source and the drain, it is preferable to use a multi-tone mask in the same manner as for the formation of the gate. By using a multi-tone mask, sources and drains that transmit visible light can be formed in the display portion without increasing the number of masks, and low-resistance sources, drains, source wirings, and drain wirings can be formed in the driving circuit portion. The semiconductor layer 231, the source, and the drain can each be formed by wet etching. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. This is preferable. When using a multi-tone mask, sources and drains that transmit visible light can be formed in the display portion without increasing the number of masks, and low-resistance sources, drains, source wirings, and drain wirings can be formed in the driving circuit portion. The semiconductor layer 231, the source, and the drain can each be formed by wet etching. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. Visible light-transmitting sources and drains can be formed in the display portion without increasing the number of masks, and low-resistance sources, drains, source wirings, and drain wirings can be formed in the driving circuit portion. The semiconductor layer 231, the source, and the drain can each be formed by wet etching. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. The semiconductor layer 231, the source, and the drain can each be formed by wet etching. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. The semiconductor layer 231, the source, and the drain can each be formed by wet etching. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. When forming the source and the drain, in order to increase the selectivity so that the semiconductor layer 231 is not etched, it is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution. It is preferable to use a material different from that used when forming the semiconductor layer 231 in the etching solution.

[0330] Next, an insulating layer 212 that functions as a gate insulating layer is formed, and a gate 22 is formed on the insulating layer 212 Form 3. The gate 223 is formed using a conductive material that transmits visible light. In this embodiment example, as the insulating layer 212, a silicon oxynitride film and a silicon nitride film are laminated using a PECVD apparatus. As shown in FIGS. 22(C1) and (C2), the gate 223 may be provided only in the scanning line drive circuit section. Also, as shown in FIGS. 22(D1) and (D2) , the gate 223 may be provided in both the display section and the scanning line drive circuit section.

[0331] As described above, the transistor included in the display device of this embodiment can be manufactured.

[0332] A laminated structure that can be used for the region 140 in FIG. 22(C1) is manufactured, and the light transmission rate measurement results are shown in FIG. 23. Note that FIG. 23 also shows the light transmission rate of the glass (substrate 51). The transmission rate was measured using a spectrophotometer U-4100 (manufactured by Hitachi High-Technologies Corporation).

[0333] As shown in FIG. 23, in one aspect of the present invention, it was confirmed that the laminated structure formed to increase the aperture ratio transmits visible light. Thus, by forming many parts of the transistors in the display section using a material that transmits visible light, it was suggested that the power consumption of the backlight can be reduced.

Explanation of Reference Numerals

[0334] 34 Capacitor element 40 Liquid crystal element 45 Light 51 Substrate 61 Substrate 62 Display section 63 Connection section 64 Drive circuit section 65 Wiring 66 Non-display region ​​68 Display area 72 FPC 72a FPC 72b FPC 73 IC 73a IC 73b IC 81 Scanning line 82 Signal line 100A Display device 100B Display device 100C Display device 100D Display device 111 Pixel electrode 112 Common electrode 113 Liquid crystal layer 121 Overcoat 127 Electrode 128 Electrode 130 Polarizer 131 Coloring layer 132 Light shielding layer 133a Alignment film 133b Alignment film 137 Wiring 138 Wiring 139 Area 140 Area 141 Adhesive layer 162 Substrate 201 Transistor 204 Connection part 206 Transistor 212 Insulating layer 213 Insulating layer 214 Insulating layer 215 Insulating layer 217 Conductive layer 217a Conductive layer 217b Conductive layer 217s Conductive layer 218 Conductive layer 219 Capacitor element 220 Insulating layer 221 Gate 222a Conductive layer 222b Conductive layer 222c Conductive layer 222d Conductive layer 222s conductive layer 222t conductive layer 223 gate 224 conductive layer 224s conductive layer 228 scanning line 229 signal line 231 semiconductor layer 231a first metal oxide layer 231b second metal oxide layer 242 connector 244 capacitance line 251 conductive layer 350A touch panel 350B touch panel 370 display device 375 input device 376 input device 379 display device 501 display element 506 pixel circuit 521 electrode 522 electrode 551 pulse voltage output circuit 552 current detection circuit 553 capacitor 800 portable information terminal 810 portable information terminal 811 housing 812 display unit 813 operation button 814 external connection port 815 speaker 816 microphone 817 camera 818 operation key 820 portable information terminal 7100 television device 7101 housing 7102 display unit 7103 stand 7111 remote control operation unit 7200 computer 7201 main body 7202 housing 7203 display unit 7204 Keyboard 7205 External Connection Port 7206 Pointing Device 7300 Camera 7301 Housing 7302 Display Unit 7303 Operation Button 7304 Shutter Button 7306 Lens

Claims

1. A transistor and a pixel electrode electrically connected to the transistor, wherein the semiconductor layer in which the channel of the transistor is formed has an oxide semiconductor layer, wherein one of the source electrode and the drain electrode of the transistor has a conductive layer having a function of transmitting visible light, wherein the conductive layer having a function of transmitting visible light has a region in contact with the pixel electrode, wherein the conductive film having a function of transmitting visible light is a display device containing hydrogen.

2. The display device according to claim 1, wherein the oxide semiconductor layer contains one or more of indium, aluminum, gallium, yttrium, tin, and zinc.

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