Semiconductor device

Abstract

To provide a small semiconductor device. To provide a semiconductor device with low power consumption. To provide a semiconductor device with a high degree of integration.SOLUTION: A semiconductor device comprises a first transistor, an insulating layer on the first transistor, a conductive layer, and a gate driver. A part of the conductive layer is provided to be embedded in the insulating layer, and the gate driver includes a second transistor and a third transistor. The second transistor and the third transistor are provided while being laminated on the first transistor, and each of the second transistor and the third transistor includes a metal oxide in a channel formation region. One of a source and a drain of the second transistor and one of a source and a drain of the third transistor are electrically connected to a gate of the first transistor via the conductive layer, a first potential and a second potential are supplied to the gate driver, and the gate driver has a function of selecting the first potential or the second potential and supplying the selected potential to the gate of the first transistor.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device. In particular, it relates to a semiconductor device that functions as a drive circuit for driving a power device for power supply. One aspect of the present invention also relates to an amplifier. One aspect of the present invention also relates to an electronic component. One aspect of the present invention also relates to an electronic device. One aspect of the present invention also relates to a method for manufacturing a semiconductor device, an amplifier, an electronic component, and an electronic device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an article, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one aspect of the present invention disclosed in this specification include a display device, a light-emitting device, a power storage device, an imaging device, a storage device, a vehicle, a moving body, a driving method thereof, or a manufacturing method thereof.

Background Art

[0003] High-power transistors are used for driving high-load devices such as motors, and there are high demands for high-speed switching characteristics, low power consumption, high reliability, a wide operating temperature range, etc. An example of a drive circuit for a high-power transistor is described in Patent Document 1.

[0004] In addition, the power transistor may be driven by PWM (Pulse Width Modulation) control. The PWM control is performed by a PWM signal output from a microcomputer or the like. The PWM signal has a low voltage for directly driving a power transistor with a large gate capacitance. Therefore, the PWM signal needs to be converted into a high-voltage signal and applied to the power transistor. A drive circuit for converting the PWM signal into a high-voltage signal is composed of transistors using silicon. For example, Patent Document 2 discloses a configuration of a semiconductor device in which an n-channel transistor and a p-channel transistor are provided on a silicon substrate to control the on or off of a power transistor.

[0005] Transistors having a metal oxide in a channel formation region (hereinafter sometimes referred to as "oxide semiconductor transistors" or "OS transistors") are known. Various semiconductor devices have been fabricated by a hybrid CMOS process of OS transistors and Si transistors (Non-Patent Document 1). As shown in Non-Patent Document 1, OS transistors can be provided laminated on Si transistors. In addition, it is possible to provide a first gate electrode (also referred to as a gate or a front gate) and a second gate electrode (also referred to as a back gate) on the OS transistor.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0007]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] One aspect of the present invention aims to provide a small semiconductor device, amplifier, electronic device, etc. Or, one aspect of the present invention aims to provide a semiconductor device, amplifier, electronic device, etc. with low power consumption. Or, one aspect of the present invention aims to provide a semiconductor device, amplifier, electronic device, etc. with high integration. Or, one aspect of the present invention aims to prevent malfunction of a semiconductor device. Or, one aspect of the present invention aims to suppress an increase in manufacturing cost. Or, one aspect of the present invention aims to provide a novel semiconductor device, amplifier, electronic component, electronic device, vehicle, moving body, etc.

[0009] Note that the problems of one aspect of the present invention are not limited to the problems listed above. The problems listed above do not prevent the existence of other problems. Other problems are those not mentioned in this item as described below. Problems not mentioned in this item can be derived by those skilled in the art from the descriptions in the specification, drawings, etc., and can be appropriately extracted from these descriptions. Note that one aspect of the present invention solves at least one of the problems listed above and / or other problems.

Means for Solving the Problems

[0010] One aspect of the present invention includes a first transistor, a second transistor, a gate driver, a first comparison circuit, a second comparison circuit, and a first terminal. The gate driver includes a third transistor and a fourth transistor. One of the source and drain of the first transistor and one of the source and drain of the second transistor are electrically connected to the first terminal. The third transistor and the fourth transistor are stacked on the first transistor. One of the source and drain of the third transistor and one of the source and drain of the fourth transistor are electrically connected to the gate of the first transistor. The first comparison circuit is provided with an analog signal and a first potential, and the first comparison circuit has a function of outputting a signal corresponding to the comparison result of the analog signal and the first potential as a first output signal. The second comparison circuit is provided with the first output signal and a carrier wave, and the second comparison circuit has a function of outputting a signal corresponding to the comparison result of the first output signal and the carrier wave as a second output signal. The gate driver is a semiconductor device having a function of outputting a signal corresponding to the second output signal to the first terminal by applying a desired potential to the gates of the first transistor and the second transistor respectively.

[0011] Also, in the above configuration, the first transistor preferably has one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in the channel formation region.

[0012] Also, in the above configuration, each of the third transistor and the fourth transistor has a metal oxide in the channel formation region, and the metal oxide is a semiconductor device having indium and zinc.

[0013] Also, in the above configuration, the carrier wave is preferably a triangular wave.

[0014] Alternatively, one aspect of the present invention has a first transistor, a second transistor, a gate driver, a power control circuit, an inductor, a capacitive element, a first terminal, a second terminal, and a third terminal. The gate driver has a third transistor and a fourth transistor. The third transistor and the fourth transistor are respectively provided laminated on the first transistor. One of the source and drain of the first transistor and one of the source and drain of the second transistor are electrically connected to the first terminal. One of the source and drain of the third transistor and one of the source and drain of the fourth transistor are electrically connected to the gate of the first transistor. The power control circuit is electrically connected to the gate driver and the second terminal. One terminal of the inductor is electrically connected to the first terminal. The other terminal of the inductor is electrically connected to the third terminal and one terminal of the capacitive element. The power control circuit has a function of generating a signal based on an analog signal given from the second terminal and supplying the signal to the gate driver, and has a function of an amplifier that outputs an amplified signal of the analog signal from the third terminal.

[0015] Also, in the above configuration, the power control circuit has a first comparison circuit and a second comparison circuit. The first comparison circuit has a function of outputting, as a first output signal, a signal according to a comparison result between the analog signal and a first potential. The second comparison circuit has a function of outputting, as a second output signal, a signal according to a comparison result between the first output signal and a carrier wave. The gate driver preferably has a function of outputting, to the first terminal, a signal according to the second output signal by applying a desired potential to the gate of the first transistor and the gate of the second transistor, respectively.

[0016] Also, in the above configuration, it is preferable that the first terminal or the third terminal is electrically connected to the second terminal.

[0017] Alternatively, one aspect of the present invention is an electronic device having the amplifier described above and a speaker.

[0018] Alternatively, one aspect of the present invention includes a first transistor, an insulating layer on the first transistor, a conductive layer, and a gate driver. A part of the conductive layer is provided to be embedded in the insulating layer. The gate driver includes a second transistor and a third transistor. The second transistor and the third transistor are provided stacked on the first transistor. The second transistor and the third transistor each have a metal oxide in a channel formation region. The metal oxide includes indium and zinc. One of the source and drain of the second transistor and one of the source and drain of the third transistor are electrically connected to the gate of the first transistor via the conductive layer. The gate driver is supplied with a first potential and a second potential, and the gate driver has a function of selecting the first potential or the second potential and applying it to the gate of the first transistor.

[0019] Also, in the above configuration, it is preferable that the gate driver has a level shift circuit, and the level shift circuit has a function of generating a potential to be applied to each of the gate of the second transistor and the gate of the third transistor.

[0020] Also, in the above configuration, the first transistor preferably has one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in a channel formation region.

[0021] Also, in the above configuration, the metal oxide preferably has one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium.

[0022] In the above configuration, it preferably has a drain electrode, a first diffusion layer on the drain electrode, a semiconductor region and a second diffusion layer on the first diffusion layer, a gate electrode on the semiconductor region, and a source electrode on the second diffusion layer. The first diffusion layer has a region that functions as the drain of the first transistor, the semiconductor region has a region that functions as the channel formation region of the first transistor, and the second diffusion layer has a region that functions as the source of the first transistor.

[0023] In the above configuration, it preferably has a second semiconductor region joined to the semiconductor region. The polarities of the second diffusion layer and the second semiconductor region are different from each other, and the first diffusion layer, the second semiconductor region, and the second diffusion layer each have a region that functions as a part of a diode element.

[0024] In the above configuration, the second semiconductor region is preferably a region joined to the second diffusion layer.

[0025] In the above configuration, the second semiconductor region and the second diffusion layer preferably form a pn junction.

Advantages of the Invention

[0026] According to one aspect of the present invention, it is possible to provide a small semiconductor device, amplifier, electronic device, etc. Also, according to one aspect of the present invention, it is possible to provide a semiconductor device, amplifier, electronic device, etc. with low power consumption. Also, according to one aspect of the present invention, it is possible to provide a semiconductor device, amplifier, electronic device, etc. with high integration. Also, according to one aspect of the present invention, it is possible to prevent malfunction of the semiconductor device. Also, according to one aspect of the present invention, it is possible to suppress an increase in manufacturing cost. Also, according to one aspect of the present invention, it is possible to provide a novel semiconductor device, amplifier, electronic component, electronic device, vehicle, moving body, etc.

[0027] Note that the effects of one aspect of the present invention are not limited to the effects listed above. The effects listed above do not prevent the existence of other effects. Other effects are the effects not mentioned in this item as described below. Effects not mentioned in this item can be derived by those skilled in the art from the descriptions in the specification, drawings, etc., and can be appropriately extracted from these descriptions. Note that one aspect of the present invention has at least one of the effects listed above and / or other effects. Therefore, one aspect of the present invention may not have the effects listed above in some cases.

Brief Description of Drawings

[0028]

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DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, embodiments will be described with reference to the drawings. However, it should be easily understood by those skilled in the art that the embodiments can be implemented in many different ways, and the forms and details can be variously changed without departing from the spirit and scope thereof. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0030] In this specification and the like, ordinal numbers such as "first", "second", and "third" are attached to avoid confusion of components. Therefore, they do not limit the number of components. Also, they do not limit the order of components. For example, in one of the embodiments of this specification and the like, a component referred to as "first" may be a component referred to as "second" in other embodiments or in the claims. For another example, in one of the embodiments of this specification and the like, a component referred to as "first" may be omitted in other embodiments or in the claims.

[0031] In the drawings, the same reference numerals may be given to the same elements, elements having the same or similar functions, elements of the same material, or elements formed simultaneously, and repeated descriptions thereof may be omitted.

[0032] Also, the position, size, range, etc. of each configuration shown in the drawings and the like may not represent the actual position, size, range, etc. for the sake of facilitating understanding of the invention. For this reason, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings and the like. For example, in an actual manufacturing process, a resist mask or the like may be unintentionally reduced in size due to a process such as etching, but this may not be reflected in the drawing for the sake of easy understanding.

[0033] Also, in a top view (also referred to as a "plan view") or a perspective view, etc., for the sake of making the drawing easy to understand, the description of some components may be omitted.

[0034] Also, in this specification and the like, the terms "electrode" and "wiring" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring", and vice versa. Furthermore, the terms "electrode" and "wiring" also include cases where a plurality of "electrodes" and "wirings" are integrally formed.

[0035] In addition, in this specification and the like, the term "terminal" may refer to, for example, a wiring or an electrode connected to the wiring. Further, in this specification and the like, a part of the "wiring" may be referred to as a "terminal".

[0036] Note that in this specification and the like, the terms "above" and "below" do not limit the positional relationship of the components to be directly above or below and in direct contact. For example, in the expression "electrode B above insulating layer A", it is not necessary for electrode B to be formed in direct contact on insulating layer A, and those including other components between insulating layer A and electrode B are not excluded.

[0037] In addition, since the functions of the source and drain are interchanged depending on operating conditions such as when transistors of different polarities are employed or when the direction of current changes in circuit operation, it is difficult to limit which is the source or the drain. For this reason, in this specification, the terms source and drain can be used interchangeably.

[0038] In addition, in this specification and the like, "electrically connected" includes both the case of direct connection and the case of connection via "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. Therefore, even when expressed as "electrically connect", in an actual circuit, there may be a case where there is no physical connection part and only the wiring extends.

[0039] In addition, in this specification and the like, "parallel" means, for example, a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Further, "perpendicular" and "orthogonal" mean, for example, a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included.

[0040] In addition, in this specification and the like, when referring to "identical", "the same", "equal", or "uniform" with respect to numerical values and measured values, unless otherwise specified, it shall include an error of plus or minus 20%.

[0041] Also, in this specification, when an etching process is performed after forming a resist mask, unless otherwise specified, the resist mask shall be removed after the etching process is completed.

[0042] Also, voltage often indicates the potential difference between a certain potential and a reference potential (such as ground potential or source potential). Therefore, voltage and potential can often be used interchangeably.

[0043] Note that even when denoted as "semiconductor", for example, when the conductivity is sufficiently low, it has the characteristics of an "insulator". Therefore, it is also possible to use "semiconductor" by replacing it with "insulator". In this case, the boundary between "semiconductor" and "insulator" is ambiguous, and it is difficult to strictly distinguish between the two. Therefore, the "semiconductor" and "insulator" described in this specification may be able to be read as each other in some cases.

[0044] Also, even when denoted as "semiconductor", for example, when the conductivity is sufficiently high, it has the characteristics of a "conductor". Therefore, it is also possible to use "semiconductor" by replacing it with "conductor". In this case, the boundary between "semiconductor" and "conductor" is ambiguous, and it is difficult to strictly distinguish between the two. Therefore, the "semiconductor" and "conductor" described in this specification may be able to be read as each other in some cases.

[0045] Note that in this specification and the like, the "on state" of a transistor refers to a state in which the source and drain of the transistor can be regarded as being electrically short-circuited (also referred to as the "conducting state"). Also, the "off state" of a transistor refers to a state in which the source and drain of the transistor can be regarded as being electrically disconnected (also referred to as the "non-conducting state").

[0046] In addition, in this specification and the like, the "on-current" may refer to the current flowing between the source and the drain when the transistor is in the on state. Also, the "off-current" may refer to the current flowing between the source and the drain when the transistor is in the off state.

[0047] In addition, in this specification and the like, the high power supply potential VDD (hereinafter, also simply referred to as "VDD" or "H potential") indicates a power supply potential having a potential higher than the low power supply potential VSS. Also, the low power supply potential VSS (hereinafter, also simply referred to as "VSS" or "L potential") indicates a power supply potential having a potential lower than the high power supply potential VDD. Also, the ground potential can be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential, and when VSS is the ground potential, VDD is a potential higher than the ground potential.

[0048] In addition, in this specification and the like, the gate refers to a part or all of the gate electrode and the gate wiring. The gate wiring refers to the wiring for electrically connecting the gate electrode of at least one transistor to another electrode or another wiring.

[0049] In addition, in this specification and the like, the source refers to a part or all of the source region, the source electrode, and the source wiring. The source region refers to a region in the semiconductor layer having a resistivity equal to or less than a certain value. The source electrode refers to the conductive layer connected to the source region. The source wiring refers to the wiring for electrically connecting the source electrode of at least one transistor to another electrode or another wiring.

[0050] In addition, in this specification and the like, the drain refers to a part or all of the drain region, the drain electrode, and the drain wiring. The drain region refers to a region in the semiconductor layer having a resistivity equal to or less than a certain value. The drain electrode refers to the conductive layer connected to the drain region. The drain wiring refers to the wiring for electrically connecting the drain electrode of at least one transistor to another electrode or another wiring.

[0051] Note that a semiconductor device refers to a circuit including semiconductor elements (such as transistors and diodes), and a device having such a circuit. It also refers to all devices that can function by utilizing semiconductor characteristics. For example, integrated circuits, chips equipped with integrated circuits, display devices, light-emitting devices, lighting devices, and electronic devices are all semiconductor devices.

[0052] (Embodiment 1) In this embodiment, an amplifier according to one aspect of the present invention will be described.

[0053] An amplifier according to one aspect of the present invention is shown in FIGS. 1A, 1B, 2A, and 3.

[0054] The amplifier 750 shown in FIG. 1A includes a semiconductor device 751, an inductor 752, a capacitive element 753, and a terminal 793. The inductor 752 may be called a coil. The amplifier 750 can process an input signal applied to the terminal 792 and output it from the terminal 793. Note that the amplifier 750 may be called an amplifier.

[0055] The input signal applied to the terminal 792 is, for example, an analog signal. When the input signal is a digital signal, for example, the digital signal may be converted into an analog signal by a digital-to-analog conversion circuit and then applied to the terminal 792.

[0056] The semiconductor device 751 includes a gate driver 760, a power supply control circuit 761, a transistor 762, a transistor 763, a terminal 791, a terminal 792, a terminal 794, and a terminal 795. The gate driver 760 has terminals G1 and G2. The power supply control circuit 761 has a comparator 771. Terminals V1 and V2 are connected to the gate driver 760. A terminal REF is connected to the power supply control circuit 761. The comparator may be called a comparison circuit.

[0057] One terminal of the inductor 752 is electrically connected to the terminal 791, and the other terminal is electrically connected to one electrode of the capacitive element 753 and the terminal 793. A ground potential is applied to the other terminal of the capacitive element 753.

[0058] The semiconductor device 751 has a function of amplifying, converting, etc. an input signal applied to the terminal 792 and outputting it from the terminal 791. The inductor 752 and the capacitive element 753 can function as a low-pass filter. The low-pass filter has a function of attenuating specific frequency components of the output signal from the terminal 791 and outputting it from the terminal 793.

[0059] The output from the terminal 793 is fed back to the terminal 792. In FIG. 1A, an example is shown in which the terminal 793 is electrically connected to the terminal 792 and fed back, but the terminal 791 may be electrically connected to the terminal 792 and fed back.

[0060] In the semiconductor device 751, the terminal 792 is electrically connected to one of the non-inverting input terminal and the inverting input terminal of the comparator 771, and the terminal REF is electrically connected to the other. A reference potential Vr is applied to the terminal REF. The output terminal of the comparator 771 is electrically connected to the gate driver 760.

[0061] The terminal G1 of the gate driver 760 is electrically connected to the gate of the transistor 762, and the terminal G2 is electrically connected to the gate of the transistor 763. One of the source and drain of the transistor 762 and one of the source and drain of the transistor 763 are electrically connected to the terminal 791. The other of the source and drain of the transistor 762 is electrically connected to the terminal 794, and the other of the source and drain of the transistor 763 is electrically connected to the terminal 795.

[0062] As an example, a high potential VH is applied to terminal 794, and a low potential VL is applied to terminal 795. The ground potential may be used as the low potential VL. When transistor 763 is in the on state and transistor 762 is in the off state, terminal 791 is electrically connected to terminal 795, and the low potential VL is applied to terminal 791. When transistor 763 is in the off state and transistor 762 is in the on state, terminal 791 is electrically connected to terminal 794, and the high potential VH is applied to terminal 791.

[0063] Comparator 771 has a function of outputting the comparison result between the signal applied to terminal 792 and the reference potential Vr to gate driver 760.

[0064] Based on the output from comparator 771, gate driver 760 can output a signal with an amplitude difference between the high potential VH and the low potential VL from terminal 791 by controlling the gates of transistor 762 and transistor 763.

[0065] As shown in FIG. 1B, the signal applied to terminal 792 may be resistively divided and applied to the non-inverting input terminal or the inverting input terminal of comparator 771. FIG. 1B shows an example of resistive division by providing resistor element 774 and resistor element 775 between terminal 792 and terminal 795.

[0066] The amplifier 750 shown in FIG. 2A has a different configuration of the power supply control circuit 761 compared to FIG. 1B. The power supply control circuit 761 included in the amplifier 750 shown in FIG. 2A includes a comparator 771, a comparator 772, a carrier generation circuit 773, a resistor element 774, a resistor element 775, and a terminal REF. The signal applied to terminal 792 is resistance-divided by the resistor element 774 and the resistor element 775 and applied to one of the non-inverting input terminal and the inverting input terminal of the comparator 772. The terminal REF is electrically connected to the other of the non-inverting input terminal and the inverting input terminal of the comparator 772. One of the non-inverting input terminal and the inverting input terminal of the comparator 771 is electrically connected to the output terminal of the comparator 772, and the other is electrically connected to the carrier generation circuit 773. The output terminal of the comparator 771 is electrically connected to the gate driver 760.

[0067] The carrier generation circuit 773 has a function of generating and outputting a carrier wave. Various waveforms can be used as the carrier wave, for example, a triangular wave and the like.

[0068] The comparator 772 has a function of outputting a signal A obtained as a comparison result between the input signal from terminal 792 and the reference potential Vr to the comparator 771. The comparator 771 has a function of outputting a signal B obtained as a comparison result between the signal A and the carrier wave given from the carrier generation circuit 773 to the gate driver 760.

[0069] The control method of the power supply control circuit 761 shown in FIGS. 1A and 1B may be called a hysteresis control method, and the control method of the power supply control circuit 761 shown in FIG. 2A may be called a PWM (Pulse Width Modulation) control method, respectively.

[0070] Transistors 762 and 763 may be power MOSFETs, or may sometimes be called power transistors. Transistors 762 and 763 may have parasitic diodes. The parasitic diodes have functions such as reverse current prevention and rectification. The parasitic diodes also have a function of alleviating electric field concentration and the like when a high voltage is applied between the source and the drain, and suppressing the breakdown or deterioration of the transistor. Note that a diode element may be separately provided instead of or in combination with the parasitic diode and connected in parallel to the transistor.

[0071] A configuration example of the gate driver 760 is shown in FIG. 2B. The details of the configuration of the gate driver 760 will be described later.

[0072] The gate driver 760 shown in FIG. 2B has a terminal G1, a terminal G2, and two driver circuits 760a. Of the two driver circuits 760a, one is connected to the terminal G1 and the other is connected to the terminal G2. The driver circuit 760a has a buffer circuit 104 connected to the terminal G1 or the terminal G2, a buffer circuit 103 connected to the buffer circuit 104, a level shift circuit 102 connected to the buffer circuit 103, and a buffer circuit 101 connected to the level shift circuit 102. The buffer circuit 104 has transistors 121 and 122. One of the source and the drain of the transistor 121 is electrically connected to the terminal V1, and the other is electrically connected to one of the source and the drain of the transistor 122. The terminal V2 is electrically connected to the other of the source and the drain of the transistor 122.

[0073] As the transistors 121 and 122, it is preferable to use a transistor (also referred to as an "OS transistor" or "OS-FET") that includes an oxide semiconductor (Oxide Semiconductor: OS), which is a type of metal oxide, in a semiconductor layer where a channel is formed. The OS transistor can be formed using a thin film formation method such as a sputtering method, a CVD method, an ALD method, or the like. By using an OS transistor as the transistors 121 and 122 and using a transistor having one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in the channel formation region for at least one of the transistors 762 and 763, after providing at least one of the transistors 762 and 763, the OS transistor can be provided by laminating it using the thin film formation method or the like. Therefore, the circuit area, chip area, etc. of the amplifier 750 can be reduced. In addition, the integration degree of the amplifier 750 can be improved. Further, since the transistors 762, 763, etc. and the OS transistor can be provided in a laminated manner, the routing of the wiring can be reduced, and the characteristics, reliability, etc. of the amplifier 750 may be improved.

[0074] The amplifier 750 shown in FIG. 3 has a different configuration from that of FIG. 2 and the power supply control circuit 761, and includes a capacitor element 776, a resistor element 777, a resistor element 778, and a capacitor element 779. Also, instead of the output from the terminal 793, the output from the terminal 791 is fed back via the resistor element 778 to one of the non-inverting input terminal and the inverting input terminal of the comparator 772 (hereinafter referred to as the terminal Ci1).

[0075] In FIG. 3, a capacitance element 776 and a resistance element 777 are provided between terminal Ci1 and terminal 792. One electrode of the capacitance element 776 is electrically connected to terminal 792, and the other electrode is electrically connected to one terminal of the resistance element 777. The other terminal of the resistance element 777 is electrically connected to terminal Ci1, one terminal of the resistance element 778, and one electrode of the capacitance element 779. The other terminal of the resistance element 778 is electrically connected to terminal 791. The other electrode of the capacitance element 779 is electrically connected to the output terminal of the comparator 772.

[0076] The comparator 772 and the capacitance element 779 function as an integrating circuit.

[0077] By applying the feedback from terminal 791 to terminal Ci1, for example, it is possible to reduce distortion, noise, etc. of the output signal obtained at terminal 793.

[0078] The amplifier 750 shown in FIG. 3 can be suitably used, for example, for amplifying an acoustic signal.

[0079] This embodiment can be appropriately combined with the descriptions of other embodiments.

[0080] (Embodiment 2) In this embodiment, a configuration and operation of a driver circuit applicable to a semiconductor device of one aspect of the present invention, and an example of a configuration of a semiconductor device using the driver circuit will be described.

[0081] FIG. 4 is a circuit diagram showing an example of a driver circuit 760a included in the gate driver 760 of the previous embodiment. The driver circuit 760a shown in FIG. 4 includes a buffer circuit 101, a level shift circuit 102, a buffer circuit 103, and a buffer circuit 104.

[0082] The driver circuit 760a described in this embodiment is composed of the buffer circuit 101, the buffer circuit 103, the buffer circuit 104, and the level shift circuit 102 using transistors of the same polarity. Therefore, the transistors provided in the driver circuit 760a can be composed of unipolar transistors.

[0083] Furthermore, in the driver circuit 760a, a capacitive element is provided in the level shift circuit 102, a signal for boosting is applied through the capacitive element, and the signal is boosted using capacitive coupling in the capacitive element. In this configuration, the voltage applied between the source and drain of the transistor in the level shift circuit 102 can be made smaller than the voltage applied to the capacitive element in the level shift circuit 102, and breakdown of the transistor can be suppressed.

[0084] Next, each circuit included in the driver circuit 760a will be described.

[0085] The buffer circuit 101 is a circuit having a function of converting a PWM signal output from a microcomputer or the like into a signal with boosted voltage and / or enhanced charge supply ability to a signal capable of operating the level shift circuit 102 and outputting it. The PWM signal output from a microcomputer or the like is input to the buffer circuit 101 via the terminal IN_H and the terminal IN_L. The signal output from the buffer circuit 101 is the signal input to the level shift circuit 102.

[0086] In FIG. 4, the PWM signal output from a microcomputer or the like is regarded as the first signal (denoted as 1st signal in the figure). Also, in FIG. 4, the signal output from the buffer circuit 101 and input to the level shift circuit 102 is regarded as the second signal (denoted as 2nd signal in the figure). Note that the PWM signal is boosted through the buffer circuit 101, the level shift circuit 102, and the buffer circuit 103. The boosted PWM signal is a signal for alternately turning on the transistors 121 and 122 included in the buffer circuit 104.

[0087] In FIG. 4, as an example of the PWM signal, two signals input from terminal IN_H and terminal IN_L are shown, but it is not limited thereto. For example, a configuration in which three or more PMW signals are input to the buffer circuit 101 may be used. Note that the two signals input from terminal IN_H and terminal IN_L are preferably signals inverted from each other.

[0088] The level shift circuit 102 includes a transistor 111, a transistor 112, a capacitor element 113, and a capacitor element 114. One electrode of the capacitor element 113 and one electrode of the capacitor element 114 are supplied with the output from the buffer circuit 101. One of the source and drain of the transistor 111 is electrically connected to the terminal V2, and the other is electrically connected to the gate of the transistor 112 and the other electrode of the capacitor element 113, respectively. One of the source and drain of the transistor 112 is electrically connected to the terminal V2, and the other is electrically connected to the gate of the transistor 111 and the other electrode of the capacitor element 114, respectively.

[0089] The level shift circuit 102 is a circuit having a function of boosting and outputting the voltage of the PWM signal output from a microcomputer or the like based on the second signal output from the buffer circuit 101. The signal input to the level shift circuit 102 is the signal output from the buffer circuit 101 applied to the capacitor element 113 and the capacitor element 114. Also, the signal output from the buffer circuit 101 is the signal input to the level shift circuit 102.

[0090] The second signal applied to the level shift circuit 102 is boosted by capacitive coupling in the capacitor element 113 and the capacitor element 114. The second signal boosted by capacitive coupling is further boosted by the voltage applied to the terminal V2 (hereinafter, voltage v2a) and output to the buffer circuit 103. In FIG. 4, the signal output from the level shift circuit 102 and input to the buffer circuit 103 is referred to as a third signal (denoted as 3rd signal in the figure). Note that the second signal and the third signal were originally the signals applied to the terminals IN_H and IN_L.

[0091] Transistors 111 and 112 are transistors that function as switches. Further, transistors 111 and 112 are transistors having the same polarity. As an example, FIG. 4 shows an example in which n-channel transistors are used as transistors 111 and 112.

[0092] Regarding the operations of transistors 111 and 112, at the timing when one of the second signals input to capacitor elements 113 and 114 becomes the H level, the transistor whose gate is connected to the capacitor element set to the H level is turned on. Conversely, at the timing when the other of the second signals input to capacitor elements 113 and 114 becomes the L level, the transistor whose gate is connected to the capacitor element set to the L level is turned off. For example, when the second signal input to capacitor element 113 is at the H level, transistor 112 is turned on, and when the second signal input to capacitor element 114 is at the L level, transistor 111 is turned off. Also, when the second signal input to capacitor element 113 is at the L level, transistor 112 is turned off, and when the second signal input to capacitor element 114 is at the H level, transistor 111 is turned on.

[0093] During the period when transistor 111 is turned on, a current flows from terminal V2 to node N1 to which capacitor element 113 connected to one of the source and drain of transistor 111 and the gate of transistor 112 in the off state are connected to each other, and the node is charged (first operation).

[0094] On the other hand, transistor 112 operates in the opposite manner to transistor 111. That is, during the period when transistor 112 is turned on, a current flows from terminal V2 to node N2 to which capacitor element 114 connected to one of the source and drain of transistor 112 and the gate of transistor 111 in the off state are connected to each other, and the node is charged (first operation).

[0095] Next, during the period when transistor 111 is in the non-conducting state, a node where a capacitive element 113 connected to one of the source and drain of transistor 111 and the gate of transistor 112 are connected to each other becomes electrically floating. At this time, an H level is applied to capacitive element 113. Then, the potential of the electrically floating node further rises due to capacitive coupling. The signal boosted by this capacitive coupling is output to buffer circuit 103 as the third signal (second operation).

[0096] On the other hand, during the period when transistor 112 is in the non-conducting state, a node where a capacitive element 114 connected to one of the source and drain of transistor 112 and the gate of transistor 111 are connected to each other becomes electrically floating. At this time, an H level is applied to capacitive element 114. Then, the potential of the electrically floating node further rises due to capacitive coupling. The signal boosted by this capacitive coupling is output to buffer circuit 103 as the third signal (second operation).

[0097] By repeating the first operation and the second operation described above, level shift circuit 102 can output a third signal obtained by boosting the second signal.

[0098] Note that it is desirable that capacitive elements 113 and 114 are elements that are not broken down by high voltage. The capacitance of capacitive elements 113 and 114 is preferably 5 times or more, preferably 10 times or more, the gate capacitance of buffer circuit 103. When increasing the capacitance of capacitive elements 113 and 114, it is preferable that the second signal is set as a signal with enhanced charge supply ability by buffer circuit 101.

[0099] Note that capacitive elements 113 and 114 may be provided on a substrate different from the substrate on which the transistors of the semiconductor device are formed in order to increase the capacitance.

[0100] The capacitances of the capacitance elements 113 and 114 may be the same or different.

[0101] In the configuration of the level shift circuit 102 shown in FIG. 4, it has a configuration in which a second signal is applied to the capacitance elements 113 and 114 using capacitive coupling. With this configuration, a high voltage is no longer directly applied between the source and drain of the transistors 111 and 112, and dielectric breakdown of the transistors can be eliminated. Therefore, the drive circuit for driving the power transistor can be operated in a normal state, and malfunction can be prevented. Also, the through current flowing through the level shift circuit 102 can be eliminated, and power consumption can be reduced.

[0102] The buffer circuit 103 is a circuit having a function of converting the third signal output from the level shift circuit 102 into a signal that can operate the buffer circuit 104 and / or a signal with enhanced charge supply ability and then outputting it. The signal input to the buffer circuit 103 is the signal applied to the gate of the transistor included in the buffer circuit 103. Also, the signal output from the buffer circuit 103 is the signal input to the buffer circuit 104.

[0103] In FIG. 4, the signal applied to the gate of the transistor included in the buffer circuit 103 is regarded as the third signal. Also, in FIG. 4, the signal output from the buffer circuit 103 and input to the buffer circuit 104 is regarded as the fourth signal (denoted as 4th signal in the figure). Note that the fourth signal was originally the signal applied to the terminals IN_H and IN_L.

[0104] Note that in FIG. 4, a configuration is shown in which the buffer circuit 103 is provided between the level shift circuit 102 and the buffer circuit 104, but a configuration in which a plurality of buffer circuits are provided may also be used. Alternatively, a configuration in which a delay circuit such as a flip-flop is provided between the level shift circuit 102 and the buffer circuit 104 may also be used.

[0105] The buffer circuit 104 has transistors 121 and 122. The signal output by the buffer circuit 104 is supplied to a power MOSFET provided externally via the output terminal OUT.

[0106] Note that the voltage applied to terminal V1 (hereinafter, voltage v1a) is a voltage for switching the power MOSFET connected to the output terminal OUT to the conductive state. Also, voltage v2a is a voltage for switching the power transistor connected to the output terminal OUT to the non-conductive state. The buffer circuit 104 switches and outputs the voltage output from the output terminal OUT with the voltage from terminal V1 or the voltage from terminal V2 in order to control the switching of the power MOSFET connected to the output terminal OUT. Note that voltage v1a may also be referred to as the first voltage. Also, voltage v2a may also be referred to as the second voltage. Note that it is preferable that voltage v1a and voltage v2a are voltages generated by boosting using a bootstrap circuit based on the high power supply potential VDD. Also, voltage v1a and voltage v2a may be voltages generated by stepping down the high power supply potential VDD when the high power supply potential VDD is a higher voltage. Note that voltage v1a and voltage v2a may be voltages directly supplied from the outside. Note that voltage v1a is a voltage greater than voltage v2a.

[0107] The buffer circuit 104 is a circuit that has a function of outputting a voltage for switching between conduction and non-conduction of the power transistor based on the fourth signal output from the buffer circuit 103. The signal input to the buffer circuit 104 is the signal applied to the gate of the transistor 121 or the transistor 122 that the buffer circuit 104 has. Also, the signal output from the buffer circuit 104 is output via the output terminal OUT and is a signal for switching between conduction and non-conduction of the power transistor provided outside. Note that the fourth signal applied to the gates of the transistor 121 and the transistor 122 was originally the signal applied to the terminal IN_H and the terminal IN_L as described above. The fourth signal alternately turns on the transistor 121 and the transistor 122. Therefore, the signal output from the output terminal OUT becomes a signal in which the voltage v1a and the voltage v2a are switched and output.

[0108] In the driver circuit 760a described above, it has a configuration in which a signal is applied to the capacitive elements 113 and 114 in the level shift circuit 102 using capacitive coupling. With this configuration, a high voltage is no longer directly applied between the source and the drain of the transistors 111 and 112, and dielectric breakdown of the transistors can be eliminated. Therefore, the drive circuit for driving the power device can be operated in a normal state, and malfunction can be prevented. Also, the through current flowing in the level shift circuit 102 can be eliminated, and power consumption can be reduced. Thus, the reliability of the amplifier 750 can be enhanced. Also, the power consumption of the amplifier circuit can be reduced. Also, the noise of the signal output from the amplifier 750 may be reduced.

[0109] Next, the specific circuit configuration and operation of the driver circuit 760a shown in FIG. 4 will be described with reference to FIGS. 5 to 9.

[0110] FIG. 5 is a diagram showing a specific example of the circuit configuration of the driver circuit shown in FIG. 4.

[0111] The buffer circuit 101 shown in FIG. 5 has an inverter circuit 131 and an inverter circuit 132. The inverter circuit 131 and the inverter circuit 132 are each supplied with a potential from a terminal V3 and a terminal GND. The terminal GND is supplied with a ground potential. Also, the inverter circuit 131 and the inverter circuit 132 have transistors of the same polarity as the transistors 111 and 112 included in the level shift circuit 102.

[0112] Here, FIG. 6A shows an example of the circuit configuration of the inverter circuit 131 and the inverter circuit 132 each having an n-channel type transistor as a transistor of the same polarity.

[0113] The inverter circuit 131 (or the inverter circuit 132) shown in FIG. 6A has transistors 151, 152, 153, 154, and a capacitive element 155. The transistors 151, 152, 153, and 154 are illustrated as n-channel type transistors, similar to the transistors 111 and 112 in FIGS. 4 and 5.

[0114] Note that a voltage for boosting the level shift circuit 102 is applied to the terminal V3 by charging and discharging the charges in the capacitive elements 113 and 114. The wiring connected to the terminal V3 preferably has a high charge supply ability so that the charges in the capacitive elements 113 and 114 can be charged and discharged at high speed. The voltage applied to the terminal V3 (hereinafter, voltage v3a) may also be referred to as a third voltage. The voltage v3a is preferably a voltage generated by boosting using a bootstrap circuit based on the high power supply potential VDD. Also, when the high power supply potential VDD is a higher voltage, the voltage v3a may be a voltage generated by stepping down the high power supply potential VDD internally. The voltage v3a may be a voltage directly applied from the outside. The voltage v3a is a voltage smaller than the voltage v1a and the voltage v2a.

[0115] One terminal of the source and drain of transistors 151 and 152 is connected to terminal V3. One terminal of the source and drain of transistors 153 and 154 is connected to terminal GND. The capacitive element 155 is provided between the gate of transistor 152 and the other terminal of the source and drain. The inverter circuit 131 (or inverter circuit 132) shown in FIG. 6A is a circuit that can output, as a second signal, a signal obtained by inverting the logic of the first signal.

[0116] Note that the inverter circuit 131 (or inverter circuit 132) shown in FIG. 6A may be a circuit that is electrically arranged in series as shown in FIG. 6B and can output, as a second signal, a signal obtained by inverting the logic of the first signal back to its original logic.

[0117] Also, the level shift circuit 102 shown in FIG. 5 has the same configuration as the level shift circuit 102 described in FIG. 4. In FIG. 5, as in FIG. 4, transistors 111 and 112 included in the level shift circuit 102 are illustrated as n-channel type transistors.

[0118] The buffer circuit 103 shown in FIG. 5 includes transistors 141, 142, 143, and 144. The buffer circuit 103 is connected to terminal V4 and terminal V2. The buffer circuit 103 outputs, as a fourth signal, a signal obtained by switching, based on the third signal, the signal applied to the gates of transistors 121 and 122 of the buffer circuit 104 between the voltage applied to terminal V4 (hereinafter, voltage v4a) and voltage v2a. Note that transistors 141, 142, 143, and 144 are illustrated as n-channel type transistors, similar to transistors 111 and 112 in FIGS. 4 and 5.

[0119] Note that the voltage v4a is a voltage for further boosting a third signal in order to surely turn on the transistors 121 and 122. This boosting is, for example, for preventing the transistors 121 and 122 from not being turned on when the third signal output via the transistors 111 and 112 becomes a signal of a voltage decreased by the threshold voltage of the transistors. Note that the voltage v4a is sometimes referred to as the fourth voltage. Note that the voltage v4a is preferably a voltage generated by boosting using a bootstrap circuit based on the high power supply potential VDD. Also, the voltage v4a may be a voltage generated by stepping down the high power supply potential VDD internally when the high power supply potential VDD is a higher voltage. Note that the voltage v4a may be a voltage directly supplied from the outside. Note that the voltage v4a is the same as or greater than the voltage v1a.

[0120] FIG. 7 is a timing chart showing the operation of the circuit according to one aspect of the present invention. Let the PWM signal applied to the terminal IN_H shown in FIG. 5 be the PWM signal S_H, and the PWM signal applied to the terminal IN_L be the PWM signal S_L. Also, let the output signal applied to the output terminal OUT be the output signal S_OUT. The PWM signal S_H, the PWM signal S_L, and the output signal S_OUT can be represented as in the timing chart shown in FIG. 7. Although the voltage scales of the PWM signal S_H, the PWM signal S_L, and the output signal S_OUT are shown with the same amplitude voltage, actually the amplitude voltage of the output signal S_OUT is smaller than the amplitude voltages of the PWM signal S_H and the PWM signal S_L. The potentials at which the PWM signal S_H and the PWM signal S_L oscillate are voltages that boost the above-described buffer circuit 101, level shift circuit 102, and buffer circuit 103, and become voltages for controlling the conduction state or non-conduction state of the transistors 121 and 122 included in the buffer circuit 104. Then, in the driver circuit 760a, an output signal S_OUT that outputs either the voltage V1 or the voltage V2 can be output according to the boosted PWM signal S_H and PWM signal S_L.

[0121] Also, in the configuration of the driver circuit 760a shown in FIG. 5, the voltage of the wiring that supplies the low power supply potential of the buffer circuit 101 and the voltage of the wiring that supplies the low power supply potential of the buffer circuits 103 and 104 can be set to different voltages. Specifically, the voltage of the wiring that supplies the low power supply potential of the buffer circuit 101 can be set to the ground potential, and the voltage of the wiring that supplies the low power supply potential of the buffer circuits 103 and 104 can be set to the voltage of the terminal V2. Therefore, when a current due to the reactance component accumulated in the wiring flows through the driver circuit 760a, malfunction that occurs due to the current flowing through the terminals IN_H and IN_L that supply the PWM signal can be reduced.

[0122] The transistors 111 and 112, the transistors 121 and 122, the transistors 141 to 144, and the transistors 151 to 154 described with reference to FIGS. 5, 6A, and 6B are all n-channel transistors. That is, the buffer circuit 101, the buffer circuit 103, the buffer circuit 104, and the level shift circuit 102 included in the semiconductor device can be configured with unipolar transistors.

[0123] By configuring the semiconductor device with unipolar transistors, the number of photomasks for differentiating between n-channel transistors and p-channel transistors can be reduced compared to the case of configuring the drive circuit with complementary transistors. Therefore, by adopting the configuration of the present invention, the manufacturing cost can be reduced.

[0124] If the transistors constituting the semiconductor device are simply replaced with unipolar transistors, when configuring a semiconductor device that converts a PWM signal into a high-voltage signal, since a high voltage is used for signal conversion, there is a risk of dielectric breakdown of the transistors. On the other hand, the semiconductor device configured in the present embodiment has a configuration in which a signal is applied to the capacitor elements 113 and 114 in the level shift circuit 102 using capacitive coupling. With this configuration, a high voltage is no longer directly applied between the source and drain of the transistors 111 and 112, and dielectric breakdown of the transistors can be eliminated. Therefore, the drive circuit for driving the power device can operate in a normal state, and malfunction can be prevented.

[0125] Furthermore, in the semiconductor device configured in the present embodiment, by configuring the semiconductor device with unipolar transistors, transistors can be configured using a semiconductor material other than silicon for the semiconductor layer. As an example, transistors can be configured using an oxide semiconductor for the semiconductor layer.

[0126] The oxide semiconductor has a larger energy gap compared to silicon, and the oxide semiconductor can extremely reduce the generation of carriers by thermal excitation. Therefore, transistors using an oxide semiconductor for the semiconductor layer do not deteriorate in characteristics even in a high-temperature environment and can keep the variation in electrical characteristics small.

[0127] Also, the oxide semiconductor is preferably a purified oxide semiconductor (purified OS) in which impurities such as moisture or hydrogen serving as electron donors (donors) are reduced and oxygen deficiency is reduced. The purified oxide semiconductor is of the i-type (intrinsic semiconductor) or extremely close to the i-type. Therefore, a transistor having a channel formation region in the purified oxide semiconductor layer has an extremely small off-current and high reliability in a high-temperature environment. A transistor using an oxide semiconductor having such characteristics is suitable as the transistor used in the semiconductor device of the present embodiment.

[0128] The driver circuit 760a described above is configured with unipolar transistors. With this configuration, the transistors constituting the driver circuit 760a can be composed of transistors using an oxide semiconductor. With this configuration, the transistors constituting the driver circuit 760a can be transistors with extremely small off-current and enhanced reliability in a high-temperature environment. Therefore, it is possible to prevent the transistors constituting the driver circuit 760a from malfunctioning due to temperature changes. Furthermore, there are no layout restrictions such as providing cooling means by separating the power transistor and the driver circuit in advance so that the driver circuit 760a does not enter a high-temperature state.

[0129] In the configuration of the driver circuit 760a shown in FIG. 5, as shown in FIG. 8A, the output terminal OUT can be separated into two output terminals OUT_H and OUT_L. By separating the output terminal into two output terminals OUT_H and OUT_L as shown in FIG. 8A, the through-current flowing between the terminal V1 and the terminal V2 can be reduced.

[0130] Also, when the driver circuit 760a shown in FIG. 8A is simplified and shown in a block diagram, it can be represented as shown in FIG. 8B.

[0131] Next, an application example of a semiconductor device as a low-side driver for driving a power transistor is shown in FIG. 9 using the block diagram of FIG. 8B.

[0132] FIG. 9 shows, as an example of the gate driver 760, a low-side driver using the driver circuit 760a of FIG. 8A. Also shown in FIG. 9 are the transistors 762 and 763, which are power MOSFETs to which the output from the gate driver 760 is applied. Also shown is the control circuit 211 that supplies signals and the like to the gate driver 760.

[0133] The gate driver 760 shown in FIG. 9 has two driver circuits 760a (hereinafter referred to as driver circuit 760a1 and driver circuit 760a2). Also, in the configuration shown in FIG. 9, it has a control circuit 211, photocouplers 212 and 213, reference voltage generation circuits 214 to 216, diodes Di1 to Di3, capacitive elements Cap1 to Cap4, transistor 762, and transistor 763. In the circuit diagram shown in FIG. 9, the resistance elements provided on the wiring are elements provided for converting the flowing current into a voltage. In the circuit diagram shown in FIG. 9, the voltages PHV and PGND are voltages for applying to a load (not shown) connected to transistor 762 and transistor 763.

[0134] As the control circuit 211, for example, the power supply control circuit 761 shown in FIG. 2 can be used.

[0135] The PWM signals output from the control circuit 211 are supplied to the driver circuit 760a1 and the driver circuit 760a2 via the photocoupler 212 and the photocoupler 213, or via the wiring. Also, voltages from the reference voltage generation circuits 214 to 216 are respectively supplied to the terminals V1, V2, and V3 of the driver circuit 760a1. Note that the voltage v4a is supplied to the driver circuit 760a1 with the voltages output from the reference voltage generation circuits 214, 215, and 216 boosted using the diodes Di1 and Di2, and the capacitive elements Cap1 and Cap2.

[0136] In the configuration of the low-side driver shown in FIG. 9, a diode Di3 is provided between the terminal GND and the terminal V2 of the driver circuit 760a1 so that the direction of the current is bidirectional. This diode Di3 is an element provided to short-circuit the terminals so that a large potential difference does not occur between the terminals to prevent malfunction when the difference in the voltages applied to the terminal GND and the terminal V2 changes greatly, and it may be provided as necessary.

[0137] The driver circuit shown in this embodiment is configured with a buffer circuit and a level shift circuit using transistors of the same polarity. Therefore, the transistors provided in the driver circuit can be configured with unipolar transistors.

[0138] Furthermore, in the driver circuit, a capacitor element is provided in the level shift circuit, a signal for boosting is applied through the capacitor element, and the boosting of the signal is performed using the capacitive coupling in the capacitor element. In this configuration, the voltage applied between the source and drain of the transistor in the level shift circuit can be made smaller than the voltage applied to the capacitor element in the level shift circuit, and breakdown of the transistor can be suppressed.

[0139] This embodiment can be implemented in appropriate combination with other embodiments.

[0140] (Embodiment 3) This embodiment shows a configuration example of a comparator according to one aspect of the present invention.

[0141] FIG. 10 shows an example of the configuration of a comparator 50 applicable to the comparator included in the amplifier described in the previous embodiment. The comparator 50 includes transistors 21 to 25. The comparator 50 also has a wiring VBM_IN to which a first potential is supplied, a wiring VBP_IN to which a second potential is supplied, a wiring VB3_IN to which a predetermined potential VB3 is supplied, an input terminal CP1_IN, an input terminal CM1_IN, an output terminal CP1_OUT, and an output terminal CM1_OUT.

[0142] Here, the predetermined potential VB3 is a potential higher than the second potential. Also, in the comparator 50, the second potential is the high power supply potential, and the first potential is the low power supply potential.

[0143] In the comparator 50, one of the source or drain of the transistor 21 is electrically connected to the wiring VBM_IN, the other of the source or drain of the transistor 21 is electrically connected to one of the source or drain of the transistor 22 and one of the source or drain of the transistor 24, and the gate of the transistor 21 is electrically connected to the wiring VB3_IN.

[0144] The other of the source or drain of the transistor 22 is electrically connected to one of the source or drain of the transistor 23 and the output terminal CM1_OUT, the other of the source or drain of the transistor 23 and the gate of the transistor 23 are electrically connected to the wiring VBP_IN, and the gate of the transistor 22 is electrically connected to the input terminal CP1_IN.

[0145] The other of the source or drain of the transistor 24 is electrically connected to one of the source or drain of the transistor 25 and the output terminal CP1_OUT, the other of the source or drain of the transistor 25 and the gate of the transistor 25 are electrically connected to the wiring VBP_IN, and the gate of the transistor 24 is electrically connected to the input terminal CM1_IN.

[0146] Also, a plurality of circuits shown in FIG. 10 may be connected in parallel and used as the comparator 50. That is, the output of the comparator shown in FIG. 10 may be input to the comparator 50 of the next stage, and a plurality of comparators may be connected and used.

[0147] This embodiment can be appropriately combined with the descriptions of other embodiments.

[0148] (Embodiment 4) A configuration example of a semiconductor device applicable to the amplifier described in the above embodiment will be described.

[0149] The semiconductor device shown in FIG. 11 has a transistor 300, a transistor 500, and a capacitor element 600. In the example shown in FIG. 11, the semiconductor device has a plurality of transistors 300.

[0150] FIG. 14A is a cross-sectional view of the transistor 500 in the channel length direction, and FIG. 14B is a cross-sectional view of the transistor 500 in the channel width direction.

[0151] The transistor 500 is an OS transistor. Since the transistor 500 has a small off-current, by using it for the transistors included in the semiconductor device, it is possible to hold data written over a long period of time in the semiconductor device.

[0152] The transistor 500 is, for example, an n-channel transistor.

[0153] Here, in the semiconductor device 751 included in the amplifier 750 described in the previous embodiment, the gate driver 760 and the power control circuit 761 can be configured using the transistors shown as the transistor 500. Further, at least one of the transistor 762 and the transistor 763 can use the transistors shown as the transistor 300.

[0154] As shown in FIG. 11, the transistor 500 and the transistor 300 can be stacked. Thus, for example, when the transistor 300 in FIG. 11 is used as the transistor 762 (or the transistor 763), components of the semiconductor device 751, such as the gate driver 760, the power control circuit 761, etc., can be configured using the transistor 500 and stacked and provided on the transistor 762 (or the transistor 763). Note that only a part of these circuits may be stacked and provided on the transistor 300.

[0155] The semiconductor device described in this embodiment has a transistor 300, a transistor 500, and a capacitor element 600, as shown in FIG. 11. The transistor 500 is provided above the transistor 300, and the capacitor element 600 is provided above the transistor 300 and the transistor 500. The layer 385 is the layer in which the transistor 300 is provided. In FIG. 11, for example, the layer 385 has a substrate 311 and layers sandwiched between the substrate 311 and an insulator 322. The layer 585 is the layer in which the transistor 500 is provided. In FIG. 11, for example, the layer 585 has layers sandwiched between an insulator 514 and an insulator 574. The substrate 311, the insulator 322, the insulator 514, and the insulator 574 will be described later.

[0156] As the capacitor element included in the amplifier 750 described in the previous embodiment, the capacitor element 600 shown in FIG. 11 can be used. For example, the capacitor element 600 can be used as the capacitor element included in the gate driver 760 or the power supply control circuit 761.

[0157] The transistor 300 is provided on the substrate 311 and has a conductor 316, an insulator 315, a semiconductor region 313 formed of a part of the substrate 311, a diffusion layer 314a that functions as a source region or a drain region, and a diffusion layer 314b. The conductor 316 can function as the gate of the transistor 300. The insulator 315 can function as the gate insulating film of the transistor 300. The diffusion layer 314a and the diffusion layer 314b are, for example, low-resistance regions.

[0158] Note that the transistor 300 can be used, for example, for the transistors 762 and 763 shown in the above embodiment.

[0159] FIG. 12 shows a different configuration of the transistor 300 compared to FIG. 11. The transistor 300 shown in FIG. 12 is provided such that a part of the region 319 is formed deeper. The region 319 will be described later.

[0160] The transistor 300 shown in FIGS. 11 and 12 is a transistor having a planar structure.

[0161] FIG. 13 also shows an example of a transistor 300 having a trench structure.

[0162] The transistor 300 illustrated in FIGS. 11, 12, and 13 can be suitably used as a power MOSFET, and is particularly preferably applied to the transistor 762 or the transistor 763. The transistor 300 shown in FIGS. 11, 12, and 13 may be called a D-MOS (Double Diffusion Metal Oxide Semiconductor) FET.

[0163] The transistor 300 shown in FIG. 11 is a transistor having a planar structure. By using one of the diffusion layers 314a and 314b and the other as a source region and a drain region, respectively, it can operate as a MOSFET. Here, however, both the diffusion layer 314a and the diffusion layer 314b function as sources, and a region 319 is formed outside the diffusion layer 314a and the diffusion layer 314b. A diffusion layer 317 that functions as a drain is provided in a region below the semiconductor region 313 of the silicon substrate in the cross section shown in FIG. 11, whereby the transistor 300 can function as a D-MOSFET.

[0164] Also, a back surface electrode 318 can be provided below the diffusion layer 317 to function as a drain electrode. Note that both the diffusion layer 314a and the diffusion layer 314b may function as drains, and the diffusion layer 317 may function as a source.

[0165] Region 319 is preferably a region having a polarity opposite to that of diffusion layers 314a and 314b. For example, when diffusion layers 314a and 314b are n-type regions, region 319 is preferably a p-type region. Alternatively, region 319 may be a high-resistance region. Region 319 may be an intrinsic region. By contacting diffusion layers 314a and 314b with region 319 having opposite polarities, a pn junction is formed. Such a pn junction region may be referred to as a parasitic diode in this specification and the like. The parasitic diode has functions such as reverse current prevention and rectification. Further, the parasitic diode has a function of protecting the transistor. When the parasitic diode is formed between diffusion layers 314a and 314b and diffusion layer 317, electric field concentration and the like when a high voltage is applied between the source and the drain are alleviated, and destruction or deterioration of the transistor can be suppressed.

[0166] It is preferable that a conductor 328b is provided on the upper surfaces of diffusion layer 314a and diffusion layer 314b. Also, a conductor 328b may be provided on the upper surface of region 319.

[0167] Note that diffusion layers 314a, 314b, and 317 may not be provided. Even if these diffusion layers are not provided, by connecting to the semiconductor region 313 of the substrate 311 and providing a conductor 328b, a back surface electrode 318, etc., these electrodes may function as a source electrode, a drain electrode, etc.

[0168] Here, before providing the back surface electrode, it is preferable to polish the substrate 311. For example, by polishing the substrate 311, a natural oxide film on the surface of the substrate 311 can be removed, and an increase in resistance can be suppressed. Also, it is preferable to polish the substrate 311 to reduce the thickness of the substrate 311. For example, the thickness of the substrate 311 is preferably 5 μm or more and 300 μm or less, and more preferably 10 μm or more and 150 μm or less. By reducing the thickness of the substrate 311, in the transistor 300, the distance between the source and the drain can be made closer, and the on-current of the transistor can be increased.

[0169] Here, when the substrate 311 is polished to make it thinner, it is preferable to provide a support substrate on the opposite side, specifically, for example, on the conductor 632 and the insulator 640. As the support substrate, for example, a resin substrate or the like can be used. Also, a substrate having an adhesive layer may be used as the support substrate. As the adhesive layer, a removable adhesive may be used. In such a case, when polishing the substrate 311, the first support substrate is adhered by the adhesive layer, and after polishing, the back electrode 318 is formed. A second support substrate is provided on the side opposite to the first support substrate so as to cover the back electrode 318. After removing the first support substrate, the conductor 632 is exposed. Then, the conductor 632 is connected using a bump, wire bonding, clip bonding using a conductive clip, or the like.

[0170] Note that the transistor 300 may be either a p-channel type or an n-channel type.

[0171] In the region where the channel of the semiconductor region 313 is formed, the region in the vicinity thereof, the diffusion layers 314a, 314b, 317, etc. that become the source region or the drain region, it is preferable to include a semiconductor such as a silicon-based semiconductor, and it is preferable to include single-crystalline silicon. Alternatively, it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), InP (indium phosphide), SiC (silicon carbide), ZnSe (zinc selenide), GaN (gallium nitride), GaOx (gallium oxide; x is a real number greater than 0), etc. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may also be used. Alternatively, by using GaAs and GaAlAs, etc., the transistor 300 may be a HEMT (High Electron Mobility Transistor).

[0172] The diffusion layers 314a, 314b, and 317 include, in addition to the semiconductor material applied to the semiconductor region 313, elements that impart n-type conductivity such as arsenic and phosphorus, or elements that impart p-type conductivity such as boron.

[0173] The conductor 316 that functions as a gate electrode can be made of a semiconductor material such as silicon containing an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron, a metal material, an alloy material, or a conductive material such as a metal oxide material.

[0174] Since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embedding properties, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten from the viewpoint of heat resistance.

[0175] Note that the transistor 300 shown in FIG. 11 is an example and is not limited to its structure, and an appropriate transistor may be used according to the circuit configuration and driving method. For example, when the semiconductor device is composed only of OS transistors, the configuration of the transistor 300 may be the same as that of the transistor 500 using an oxide semiconductor. Details of the transistor 500 will be described later.

[0176] Over the transistor 300, an insulator 320, an insulator 322, an insulator 324, and an insulator 326 are sequentially laminated and provided.

[0177] As the insulator 320, the insulator 322, the insulator 324, and the insulator 326, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, etc. may be used.

[0178] In this specification, silicon oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and silicon nitride oxide refers to a material having a higher nitrogen content than oxygen in its composition. Also, in this specification, aluminum oxynitride refers to a material having a higher oxygen content than nitrogen in its composition, and aluminum nitride oxide refers to a material having a higher nitrogen content than oxygen in its composition.

[0179] The insulator 322 may function as a planarization film that planarizes a step generated by a transistor 300 or the like provided below it. For example, the upper surface of the insulator 322 may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness.

[0180] Also, for the insulator 324, it is preferable to use a film having a barrier property such that hydrogen and impurities do not diffuse from the substrate 311 or the transistor 300 or the like into the region where the transistor 500 is provided.

[0181] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 300. Specifically, the film that suppresses the diffusion of hydrogen is a film having a small amount of hydrogen desorption.

[0182] The amount of hydrogen desorption can be analyzed, for example, using temperature-programmed desorption gas analysis (TDS). For example, the amount of hydrogen desorption of the insulator 324 is such that in TDS analysis, in the range where the surface temperature of the film is from 50°C to 500°C, the desorption amount converted to hydrogen atoms, when converted per unit area of the insulator 324, is 10×10 15 atoms / cm 2 or less, preferably 5×10 15 atoms / cm 2 or less.

[0183] In addition, the insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. Also, for example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, more preferably 0.6 times or less, of the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0184] In addition, a capacitor element 600, or conductors 328 and 330 connected to the transistor 500, etc. are embedded in the insulator 320, the insulator 322, the insulator 324, and the insulator 326. In the example shown in FIG. 11, the conductor 328 is provided so as to be embedded in the insulator 320 and the insulator 322, and the conductor 330 is provided so as to be embedded in the insulator 324 and the insulator 326. Note that the conductor 328 and the conductor 330 have functions as plugs or wirings. Also, conductors having functions as plugs or wirings may be given the same reference numeral in a lump for a plurality of structures. Also, in this specification etc., a wiring and a plug connected to the wiring may be an integral body. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

[0185] Here, when semiconductor elements are connected to each other, or a semiconductor element is connected to a conductor, or conductors are connected to each other via a plug or a wiring, for example, they are electrically connected.

[0186] As materials for each plug and wiring (conductors 328, 330, etc.), conductive materials such as metal materials, alloy materials, metal nitride materials, or metal oxide materials can be used singly or in a stacked manner. It is preferable to use high melting point materials such as tungsten and molybdenum that achieve both heat resistance and conductivity, and it is preferable to use tungsten. Or, it is preferable to form with a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0187] In the semiconductor device shown in FIG. 11, the conductor 328b is provided on the diffusion layers 314a, 314b, etc. Also, there may be regions where the insulator 315 is sandwiched between the diffusion layer 314a and the conductor 328b, and between the diffusion layer 314b and the conductor 328b. The conductor 328 is provided on the conductor 328b. The conductor 328b may have a region sandwiched between the diffusion layer 314a and the conductor 328, or a region sandwiched between the diffusion layer 314b and the conductor 328.

[0188] Also, as shown in FIG. 12, a part of the region 319 may be provided so as to be formed deeply.

[0189] Also, FIGS. 11 and 12 show an example of a D-MOSFET in which the transistor 300 has a planar structure, while FIG. 13 shows an example of a D-MOSFET in which the transistor 300 has a trench structure. In FIG. 13, the conductor 316 that functions as a gate is formed in a trench provided between the diffusion layer 314a and the diffusion layer 314b. An insulator 315 that functions as a gate insulator is formed between the diffusion layers 314a and 314b and the conductor 316.

[0190] Compared with the planar structure, in the trench structure, it is preferable that the area of the integrated circuit is reduced to 0.5 times or less, and more preferably reduced to 0.4 times or less.

[0191] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. 11, the insulators 350, 352, and 354 are laminated and provided in order. Also, a conductor 356 is formed in the insulators 350, 352, and 354. The conductor 356 functions as a plug connecting to the transistor 300 or as wiring. Note that the conductor 356 can be provided using the same material as the conductors 328 and 330.

[0192] Note that, for example, as with the insulator 324, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 350. Further, the conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 350 having a barrier property against hydrogen. With this configuration, the transistor 300 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0193] Note that, as the conductor having a barrier property against hydrogen, for example, tantalum nitride or the like may be used. Further, by laminating tantalum nitride and tungsten having high conductivity, diffusion of hydrogen from the transistor 300 can be suppressed while maintaining the conductivity as a wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen is in contact with the insulator 350 having a barrier property against hydrogen.

[0194] In the above, the wiring layer including the conductor 356 has been described, but the semiconductor device according to the present embodiment is not limited to this. A plurality of wiring layers similar to the wiring layer including the conductor 356 may be formed.

[0195] On the insulator 354, an insulator 510, an insulator 512, an insulator 514, and an insulator 516 are sequentially laminated and provided. Any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 preferably uses a material having a barrier property against oxygen or hydrogen.

[0196] For example, for the insulator 510 and the insulator 514, it is preferable to use a film having a barrier property such that hydrogen and impurities do not diffuse from the region where the substrate 311 or the transistor 300 is provided to the region where the transistor 500 is provided. Therefore, the same material as that of the insulator 324 can be used.

[0197] As an example of a film having a barrier property against hydrogen, silicon nitride formed by CVD can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between transistor 500 and transistor 300. Specifically, the film that suppresses the diffusion of hydrogen is a film with a small amount of hydrogen desorption.

[0198] Further, as a film having a barrier property against hydrogen, for example, for insulator 510 and insulator 514, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide.

[0199] In particular, aluminum oxide has a high blocking effect of not allowing the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent the mixing of impurities such as hydrogen and moisture into transistor 500 during and after the manufacturing process of the transistor. Also, it can suppress the release of oxygen from the oxide constituting transistor 500. Therefore, it is suitable for use as a protective film for transistor 500.

[0200] Further, for example, for insulator 512 and insulator 516, the same materials as those of insulator 320 can be used. Also, by applying a material with a relatively low dielectric constant to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, as insulator 512 and insulator 516, a silicon oxide film, a silicon oxynitride film, or the like can be used.

[0201] In addition, conductors such as conductor 518 and the conductors (for example, conductor 503) that make up transistor 500 are embedded in insulator 510, insulator 512, insulator 514, and insulator 516. Note that conductor 518 functions as a plug that connects to conductor 610b, transistor 300, or capacitor element 600, or as a wiring. Conductor 518 can be provided using the same material as conductor 328 and conductor 330.

[0202] In particular, conductor 518 in the region in contact with insulator 510 and insulator 514 is preferably a conductor having barrier properties against oxygen, hydrogen, and water. With this configuration, transistor 300 and transistor 500 can be separated by a layer having barrier properties against oxygen, hydrogen, and water, and diffusion of hydrogen from transistor 300 to transistor 500 can be suppressed.

[0203] A transistor 500 is provided above insulator 516.

[0204] As shown in FIGS. 14A and 14B, transistor 500 includes conductor 503 arranged to be embedded in insulator 514 and insulator 516, insulator 520 arranged on insulator 516 and conductor 503, insulator 522 arranged on insulator 520, insulator 524 arranged on insulator 522, oxide 530a arranged on insulator 524, oxide 530b arranged on oxide 530a, conductors 542a and 542b arranged separately from each other on oxide 530b, insulator 580 arranged on conductors 542a and 542b and having an opening formed by overlapping between conductor 542a and conductor 542b, oxide 530c arranged on the bottom surface and side surface of the opening, insulator 550 arranged on the formation surface of oxide 530c, and conductor 560 arranged on the formation surface of insulator 550.

[0205] Also, as shown in FIGS. 14A and 14B, it is preferable that an insulator 544 is disposed between the oxides 530a, 530b, the conductors 542a, 542b, and the insulator 580. Also, as shown in FIGS. 14A and 14B, the conductor 560 preferably includes a conductor 560a provided inside the insulator 550 and a conductor 560b provided so as to be embedded inside the conductor 560a. Also, as shown in FIGS. 14A and 14B, it is preferable that an insulator 574 is disposed on the insulator 580, the conductor 560, and the insulator 550.

[0206] In the following, the oxides 530a, 530b, and 530c may sometimes be collectively referred to as the oxide 530.

[0207] In the transistor 500, a configuration in which three layers of the oxides 530a, 530b, and 530c are laminated in a region where a channel is formed and in its vicinity is shown, but the present invention is not limited to this. For example, a single layer of the oxide 530b, a two-layer structure of the oxides 530b and 530a, a two-layer structure of the oxides 530b and 530c, or a laminated structure of four or more layers may be provided. Also, in the transistor 500, the conductor 560 is shown as a two-layer laminated structure, but the present invention is not limited to this. For example, the conductor 560 may have a single-layer structure or a laminated structure of three or more layers. Also, the transistor 500 shown in FIGS. 11 and 14A is an example, and is not limited to its structure, and an appropriate transistor may be used according to the circuit configuration and the driving method.

[0208] Here, the conductor 560 functions as the gate electrode of the transistor, and the conductors 542a and 542b function as the source electrode or the drain electrode, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductors 542a and 542b. The arrangement of the conductor 560, the conductor 542a, and the conductor 542b is self-alignedly selected with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be self-alignedly arranged between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing an alignment margin, so that the occupied area of the transistor 500 can be reduced. Thereby, miniaturization and high integration of the semiconductor device can be achieved.

[0209] Furthermore, since the conductor 560 is self-alignedly formed in the region between the conductors 542a and 542b, the conductor 560 does not have a region overlapping with the conductor 542a or the conductor 542b. Thereby, the parasitic capacitance formed between the conductor 560, the conductor 542a, and the conductor 542b can be reduced. Therefore, the switching speed of the transistor 500 can be improved, and high frequency characteristics can be achieved.

[0210] The conductor 560 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 503 may function as a second gate (also referred to as a bottom gate) electrode. In that case, the threshold voltage of the transistor 500 can be controlled by changing the potential applied to the conductor 503 independently without linking it to the potential applied to the conductor 560. In particular, by applying a negative potential to the conductor 503, the threshold voltage of the transistor 500 can be made greater than 0V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 503 can make the drain current smaller when the potential applied to the conductor 560 is 0V than when no potential is applied.

[0211] The conductor 503 is arranged to overlap with the oxide 530 and the conductor 560. Thus, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected and can cover the channel formation region formed in the oxide 530. In this specification and the like, the structure of the transistor that electrically surrounds the channel formation region by the electric fields of the first gate electrode and the second gate electrode is called a surrounded channel (S-channel) structure.

[0212] Also, the conductor 503 has the same configuration as the conductor 518. The conductor 503a is formed in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and the conductor 503b is further formed inside. Note that in the transistor 500, the configuration of laminating the conductor 503a and the conductor 503b is shown, but the present invention is not limited to this. For example, the conductor 503 may be provided in a single-layer or a laminated structure of three or more layers.

[0213] Here, it is preferable to use a conductive material for the conductor 503a that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the above impurities are difficult to permeate). Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate). Note that in this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.

[0214] For example, by having the function of suppressing the diffusion of oxygen in the conductor 503a, it is possible to suppress the oxidation of the conductor 503b and the decrease in conductivity.

[0215] Also, when the conductor 503 also serves as a wiring, it is preferable to use a highly conductive material mainly composed of tungsten, copper, or aluminum for the conductor 503b. In that case, the conductor 503a does not necessarily have to be provided. Although the conductor 503b is shown as a single layer, it may have a laminated structure. For example, it may be a laminate of titanium or titanium nitride and the above-described conductive material.

[0216] The insulators 520, 522, and 524 have a function as a second gate insulating film.

[0217] Here, it is preferable to use an insulator for the insulator 524 in contact with the oxide 530 that contains more oxygen than oxygen that satisfies the stoichiometric composition. That is, it is preferable that an excess oxygen region is formed in the insulator 524. By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen deficiency in the oxide 530 can be reduced, and the reliability of the transistor 500 can be improved.

[0218] Specifically, as the insulator having an excess oxygen region, it is preferable to use an oxide material in which some oxygen desorbs by heating. The oxide that desorbs oxygen by heating is an oxide film in which the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more in the TDS (Thermal Desorption Spectroscopy) analysis. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0219] Also, when the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate).

[0220] It is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen and impurities, so that the oxygen in the oxide 530 does not diffuse to the insulator 520 side. In addition, the conductor 503 can be prevented from reacting with the oxygen in the insulator 524 and the oxide 530.

[0221] The insulator 522 is preferably a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator functioning as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0222] In particular, it is advisable to use an insulator containing one or both of the oxides of aluminum and hafnium, which is an insulating material having a function of suppressing the diffusion of impurities and oxygen (the above oxygen is difficult to permeate). As the insulator containing one or both of the oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 and the incorporation of impurities such as hydrogen from the peripheral portion of the transistor 500 into the oxide 530.

[0223] Alternatively, these insulators may be added with, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide. Or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the above-mentioned insulators for use.

[0224] Also, the insulator 520 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Further, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride, an insulator 520 having a laminated structure that is thermally stable and has a high relative dielectric constant can be obtained.

[0225] In the transistors 500 of FIGS. 14A and 14B, the insulator 520, the insulator 522, and the insulator 524 are shown as a second gate insulating film having a three-layer laminated structure, but the second gate insulating film may have a single-layer, two-layer, or four-layer or more laminated structure. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used.

[0226] For the transistor 500, it is preferable to use a metal oxide that functions as an oxide semiconductor for the oxide 530 including the channel formation region. For example, as the oxide 530, a metal oxide such as an In-M-Zn oxide (element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be used.

[0227] Specifically, as the oxide 530a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. As the oxide 530b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 1:1:1 may be used. As the oxide 530c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Specific examples of the case where the oxide 530c has a stacked structure include a stacked structure of In:Ga:Zn = 4:2:3 and In:Ga:Zn = 1:3:4, a stacked structure of Ga:Zn = 2:1 and In:Ga:Zn = 4:2:3, a stacked structure of Ga:Zn = 2:5 and In:Ga:Zn = 4:2:3, a stacked structure of gallium oxide and In:Ga:Zn = 4:2:3, and the like.

[0228] Further, the oxide 530b may have crystallinity. For example, it is preferable to use CAAC-OS (c-axis aligned crystalline oxide semiconductor) described later. Oxides having crystallinity such as CAAC-OS have a dense structure with few impurities and defects (such as oxygen vacancies) and high crystallinity. Therefore, it is possible to suppress the extraction of oxygen from the oxide 530b by the source electrode or the drain electrode. In addition, even when heat treatment is performed, the extraction of oxygen from the oxide 530b can be reduced, so the transistor 500 is stable against a high temperature (so-called thermal budget) in the manufacturing process.

[0229] As the metal oxide that functions as the channel formation region in the oxide 530, it is preferable to use a metal oxide having a bandgap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide having a large bandgap in this way, the off-current of the transistor can be reduced.

[0230] By having the oxide 530a under the oxide 530b, the diffusion of impurities from the structure formed below the oxide 530a to the oxide 530b can be suppressed. Also, by having the oxide 530c on the oxide 530b, the diffusion of impurities from the structure formed above the oxide 530c to the oxide 530b can be suppressed.

[0231] Note that the oxide 530 preferably has a laminated structure of a plurality of oxide layers with different atomic ratios of each metal atom. Specifically, in the metal oxide used for the oxide 530a, the atomic ratio of the element M in the constituent elements is preferably larger than the atomic ratio of the element M in the constituent elements in the metal oxide used for the oxide 530b. Also, in the metal oxide used for the oxide 530a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 530b. Further, in the metal oxide used for the oxide 530b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 530a. Also, the oxide 530c can use a metal oxide that can be used for the oxide 530a or the oxide 530b.

[0232] Also, it is preferable that the energy of the lower end of the conduction band of the oxide 530a and the oxide 530c is higher than the energy of the lower end of the conduction band of the oxide 530b. In other words, it is preferable that the electron affinity of the oxide 530a and the oxide 530c is smaller than the electron affinity of the oxide 530b.

[0233] Here, at the junction of the oxide 530a, the oxide 530b, and the oxide 530c, the energy level of the lower end of the conduction band changes smoothly. In other words, it can also be said that the energy level of the lower end of the conduction band at the junction of the oxide 530a, the oxide 530b, and the oxide 530c changes continuously or is continuously joined. To achieve this, it is advisable to lower the density of defect levels in the mixed layer formed at the interface between the oxide 530a and the oxide 530b and at the interface between the oxide 530b and the oxide 530c.

[0234] Specifically, by having a common element other than oxygen (as the main component) in the oxide 530a and the oxide 530b, and the oxide 530b and the oxide 530c, a mixed layer with a low density of defect levels can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, as the oxide 530a and the oxide 530c, an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, etc. may be used.

[0235] At this time, the main path of carriers becomes the oxide 530b. By configuring the oxide 530a and the oxide 530c as described above, the density of defect levels at the interface between the oxide 530a and the oxide 530b and at the interface between the oxide 530b and the oxide 530c can be lowered. Therefore, the influence of interface scattering on carrier conduction becomes small, and the transistor 500 can obtain a high on-current.

[0236] On the oxide 530b, a conductor 542a and a conductor 542b that function as a source electrode and a drain electrode are provided. As the conductor 542a and the conductor 542b, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, or an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements, etc. are preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Furthermore, a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen.

[0237] Also, in FIG. 14A, the conductor 542a and the conductor 542b are shown as a single-layer structure, but they may also have a laminated structure of two or more layers. For example, a tantalum nitride film and a tungsten film may be laminated. Also, a titanium film and an aluminum film may be laminated. Also, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film may be used.

[0238] In addition, there are three-layer structures such as a titanium film or a titanium nitride film, an aluminum film or a copper film laminated on the titanium film or the titanium nitride film, and a titanium film or a titanium nitride film further formed thereon, a molybdenum film or a molybdenum nitride film, an aluminum film or a copper film laminated on the molybdenum film or the molybdenum nitride film, and a molybdenum film or a molybdenum nitride film further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0239] Also, as shown in FIG. 14A, regions 543a and 543b may be formed as low-resistance regions at the interface between the oxide 530 and the conductor 542a (conductor 542b) and in the vicinity thereof. At this time, region 543a functions as one of the source region or the drain region, and region 543b functions as the other of the source region or the drain region. A channel formation region is formed in the region sandwiched between region 543a and region 543b.

[0240] By providing the conductor 542a (conductor 542b) in contact with the oxide 530, the oxygen concentration in region 543a (region 543b) may be reduced. Also, a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and the components of the oxide 530 may be formed in region 543a (region 543b). In such a case, the carrier density in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0241] The insulator 544 is provided to cover the conductor 542a and the conductor 542b, and suppresses the oxidation of the conductor 542a and the conductor 542b. At this time, the insulator 544 may cover the side surface of the oxide 530 and be provided in contact with the insulator 524.

[0242] As the insulator 544, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. can be used. Further, as the insulator 544, silicon oxynitride, silicon nitride, etc. can also be used.

[0243] In particular, as the insulator 544, it is preferable to use aluminum oxide, hafnium oxide, aluminum, and an oxide containing hafnium (hafnium aluminate), etc., which are insulators containing one or both oxides of aluminum or hafnium. In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in the subsequent process. Note that when the conductor 542a and the conductor 542b are made of a material having oxidation resistance or the conductivity does not significantly decrease even when oxygen is absorbed, the insulator 544 is not an essential component. It may be appropriately designed according to the required transistor characteristics.

[0244] By having the insulator 544, it is possible to suppress impurities such as water and hydrogen contained in the insulator 580 from diffusing into the oxide 530b through the oxide 530c and the insulator 550. Further, oxidation of the conductor 560 can be suppressed by the excess oxygen of the insulator 580.

[0245] The insulator 550 functions as a first gate insulating film. The insulator 550 is preferably disposed in contact with the inner side (upper surface and side surface) of the oxide 530c. The insulator 550 is preferably formed using an insulator that contains an excessive amount of oxygen and releases oxygen by heating, similar to the above-described insulator 524.

[0246] Specifically, silicon oxide with excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, and silicon oxide with pores can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0247] By providing an insulator that releases oxygen upon heating as insulator 550 in contact with the upper surface of oxide 530c, oxygen can be effectively supplied from insulator 550, through oxide 530c, to the channel formation region of oxide 530b. Also, similar to that in insulator 524, it is preferable that the impurity concentration such as water or hydrogen in insulator 550 is reduced. The film thickness of insulator 550 is preferably 1 nm or more and 20 nm or less.

[0248] Further, in order to efficiently supply the excess oxygen possessed by insulator 550 to oxide 530, a metal oxide may be provided between insulator 550 and conductor 560. It is preferable that the metal oxide suppresses the diffusion of oxygen from insulator 550 to conductor 560. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from insulator 550 to conductor 560 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to oxide 530. Also, the oxidation of conductor 560 by excess oxygen can be suppressed. As the metal oxide, a material that can be used for insulator 544 may be used.

[0249] Note that insulator 550 may have a laminated structure, similar to the second gate insulating film. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by forming an insulator that functions as a gate insulating film into a laminated structure of a high-k material and a thermally stable material, it becomes possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a laminated structure that is thermally stable and has a high relative dielectric constant can be formed.

[0250] The conductor 560 that functions as the first gate electrode is shown as a two-layer structure in FIGS. 14A and 14B, but it may be a single-layer structure or a laminated structure of three or more layers.

[0251] For the conductor 560a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). Since the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 560b by the oxygen contained in the insulator 550 and the resulting decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use tantalum, tantalum nitride, ruthenium, or ruthenium oxide. Further, as the conductor 560a, an oxide semiconductor applicable to the oxide 530 can be used. In that case, by forming the conductor 560b by sputtering, the electrical resistance value of the conductor 560a can be decreased to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0252] Also, for the conductor 560b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Further, since the conductor 560b also functions as a wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. Also, the conductor 560b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0253] The insulator 580 is provided on the conductors 542a and 542b via the insulator 544. The insulator 580 preferably has an excess oxygen region. For example, as the insulator 580, it is preferable to have silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, or resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having pores are preferable because an excess oxygen region can be easily formed in a later process.

[0254] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580 that releases oxygen upon heating in contact with the oxide 530c, the oxygen in the insulator 580 can be efficiently supplied to the oxide 530 through the oxide 530c. Note that it is preferable that the concentration of impurities such as water or hydrogen in the insulator 580 is reduced.

[0255] The opening of the insulator 580 is formed to overlap the region between the conductors 542a and 542b. Thereby, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductors 542a and 542b.

[0256] When miniaturizing the semiconductor device, it is required to shorten the gate length, but it is necessary to prevent the conductivity of the conductor 560 from decreasing. Therefore, if the film thickness of the conductor 560 is increased, the conductor 560 may have a high aspect ratio shape. In the present embodiment, since the conductor 560 is provided so as to be embedded in the opening of the insulator 580, even if the conductor 560 has a high aspect ratio shape, it can be formed without collapsing the conductor 560 during the process.

[0257] The insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 550. By forming the insulator 574 by sputtering, an excess oxygen region can be provided in the insulator 550 and the insulator 580. Thereby, oxygen can be supplied from the excess oxygen region into the oxide 530.

[0258] For example, as the insulator 574, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used.

[0259] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in a thin film with a thickness of 0.5 nm or more and 3.0 nm or less. Therefore, aluminum oxide formed by sputtering can function as an oxygen supply source and also as a barrier film for impurities such as hydrogen.

[0260] Also, it is preferable to provide an insulator 581 that functions as an interlayer film on the insulator 574. Similar to the insulator 524 and the like, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

[0261] Also, the conductors 540a and 540b are arranged in the openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544. The conductors 540a and 540b are provided to face each other with the conductor 560 interposed therebetween. The conductors 540a and 540b have the same configuration as the conductors 546 and 548 described later.

[0262] An insulator 582 is provided on an insulator 581. It is preferable to use a material that is barrier - resistant to oxygen and hydrogen for the insulator 582. Therefore, the same material as that of the insulator 514 can be used for the insulator 582. For example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.

[0263] In particular, aluminum oxide has a high blocking effect of not allowing the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of transistors. Therefore, aluminum oxide can prevent the entry of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. Also, it can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, it is suitable for use as a protective film for the transistor 500.

[0264] Also, conductors 546, 548, etc. are embedded in the insulators 520, 522, 524, 544, 580, 574, 581, and 582. The conductors 546 and 548 have functions such as a plug connecting the conductor 610b and the transistor 300, or a wiring.

[0265] Conductors 546b, 548b, etc. are embedded in the insulators 580, 574, 581, and 582. The conductors 546b and 548b have functions such as a plug connecting to the conductors 542a, 542b, etc. of the transistor 500, or a wiring.

[0266] The conductors 546, 546b, 548, and 548b can be provided using the same materials as the conductors 328 and 330.

[0267] Subsequently, a conductor 610b is provided above the transistor 500. In the example shown in FIG. 1, the conductor 610b is provided on the insulator 582. In the example shown in FIG. 1, the conductor 610b is connected to the transistor 500 via the conductor 548b.

[0268] In addition to the conductor 610b, a conductor 610a may be provided on the insulator 582. The conductor 610a can be formed, for example, by processing from the same conductive film as the conductor 610b. By providing an insulator 630 on the conductors 610a and 610b and further providing a conductor 620 via the insulator 630 so as to overlap the conductor 610a, a capacitor element 600 composed of the conductor 610a, the conductor 620, and the insulator 630 can be provided on the insulator 582.

[0269] For the conductors 610a and 610b, a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above-described elements as components can be used. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide can also be applied.

[0270] In FIG. 11, the conductors 610a and 610b are shown in a single-layer structure, but the present invention is not limited to this configuration, and a laminated structure of two or more layers may be used. For example, a conductor having a barrier property, and a conductor having high conductivity and high adhesion to the conductor having high conductivity may be formed between the conductor having a barrier property and the conductor having high conductivity.

[0271] The conductor 620 can be made of a conductive material such as a metal material, an alloy material, or a metal oxide material. It is preferable to use a high melting point material such as tungsten or molybdenum that combines heat resistance and conductivity, and it is particularly preferable to use tungsten. Also, when forming simultaneously with other structures such as the conductor, Cu (copper), Al (aluminum), etc., which are low-resistance metal materials, can be used.

[0272] An insulator 640 is provided on the conductor 620 and the insulator 630. The insulator 640 can be provided using the same material as the insulator 320. Also, the insulator 640 may function as a planarization film that covers the uneven shape below it.

[0273] In the semiconductor device shown in FIG. 11, a conductor 631 is provided so as to be embedded in the insulator 640, and a conductor 632 is further provided on the conductor 631. The conductor 631 can function as a plug that is electrically connected to the transistor 300. Also, the conductor 632 is electrically connected to the transistor 300 via the conductor 631.

[0274] FIG. 11 shows an example of a semiconductor device configured on a substrate 311. The conductor 632 has a function as an electrode pad for connecting, for example, a circuit provided on a chip different from the configuration provided on the substrate 311, and a bump, wire bonding, clip bonding, etc.

[0275] FIG. 15 shows an example of arranging the semiconductor device shown in FIG. 11 on a printed circuit board (PCB) 638 via bumps 637. In FIG. 15, the surface of the semiconductor device shown in FIG. 11 where the conductor 632 is exposed and the printed circuit board 638 are arranged to face each other via the bumps 637. Also, in order to maintain strength, a resin layer 641 or the like may be provided on the back electrode 318.

[0276] FIG. 16 shows an example in which the semiconductor device shown in FIG. 11 is arranged on a printed circuit board 638 and conductors 632 and other chips are connected by wire bonding. In FIG. 16, in the semiconductor device shown in FIG. 11, the semiconductor device is arranged on the printed circuit board 638 with the surface on which the conductor 632 is exposed as the upper surface. The surface on which the back electrode 318 is provided and the printed circuit board 638 are arranged so as to face each other with a resin layer 639 interposed therebetween. A wire 642 is bonded to the conductor 632.

[0277] Here, by providing the conductor 632 so as to overlap with the conductor connected to the diffusion layer 314a or the diffusion layer 314b of the transistor 300, the routing of the conductor between the transistor 300 and the conductor 632 can be shortened, and the resistance between the transistor 300 and the conductor 632 can be reduced. More specifically, for example, as shown in FIG. 1, it is preferable to provide the conductor 632 so as to overlap with at least one of the conductor 328b and the conductor 328. Further, it is preferable that the conductors 356 and 518 are each provided so as to at least partially overlap with the conductor 632.

[0278] Since the resistance can be reduced by shortening the routing of the conductor between the transistor 300 and the conductor 632, for example, in the semiconductor device shown in FIG. 11, the thickness of each wiring, more specifically, for example, the conductors provided in the insulators 326, 354, 516, etc., and the conductor 632 can be made thinner. Therefore, in the semiconductor device shown in FIG. 11, miniaturization of the semiconductor element becomes possible.

[0279] In the power storage device according to one aspect of the present invention, a large-capacity battery pack may be connected. Further, in the battery pack connected to the power storage device according to one aspect of the present invention, rapid charging, rapid discharging, etc. may be performed. Therefore, a large current may flow through the transistor 300.

[0280] When a large current flows through the transistor 300, the heat generation amount of the transistor 300 may increase. In the OS transistor, fluctuations in characteristics with respect to temperature changes can be suppressed. Therefore, by using the OS transistor as the transistor 500, even when the heat generation amount of the transistor 300 increases, the semiconductor device can operate stably.

[0281] The configuration shown in FIG. 17 has, as a first structure, a layer 585 having a transistor 500 provided on a substrate 311b, a conductor 610b, a conductor 631, etc. provided on the layer 585, an insulator 901 and a conductor 632 provided so as to be embedded in the insulator 901 provided on the conductor 631, etc., and as a second structure, a configuration having a layer 385. Instead of the insulator 322 of the layer 385, a laminated structure of the insulator 322 and an insulator 902 on the insulator 322 is provided, and the first structure and the second structure are bonded together. An insulator 322b is provided on the substrate 311b, and a conductor 903 is provided so as to penetrate the substrate 311b and the insulator 322b. The conductor 903 is arranged to face the printed circuit board, and the conductor 903 and the wiring on the printed circuit board can be electrically connected using bumps.

[0282] Here, it is preferable that the main components of the conductor 328 and the conductor 632 are the same metal element. Also, it is preferable that the insulator 901 and the insulator 902 are composed of the same components.

[0283] For example, Cu, Al, Sn, Zn, W, Ag, Pt, or Au, etc. can be used for the conductor 328 and the conductor 632. From the viewpoint of ease of bonding, preferably Cu, Al, W, or Au is used. Also, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, titanium nitride, etc. can be used for the insulator 901 and the insulator 902.

[0284] That is, it is preferable to use the same metal material shown above for each of the conductor 328 and the conductor 632. Also, it is preferable to use the same insulating material shown above for each of the insulator 901 and the insulator 902. With such a configuration, the bonding can be performed with a high yield.

[0285] Note that the conductor 328 and the conductor 632 may have a multilayer structure of a plurality of layers. In that case, it is sufficient that the surface layer (bonding surface) is made of the same metal material. Also, the insulator 901 and the insulator 902 may have a multilayer structure of a plurality of layers. In that case, it is sufficient that the surface layer (bonding surface) is made of the same insulating material.

[0286] By such bonding, good electrical connection between the conductor 328 and the conductor 632 can be obtained. Also, a connection having sufficient mechanical strength of the insulator 901 and the insulator 902 can be obtained.

[0287] For bonding between metal layers, a surface activation bonding method can be used in which the oxide film on the surface and the adsorption layer of impurities are removed by sputtering or the like, and the cleaned and activated surfaces are brought into contact with each other for bonding. Alternatively, a diffusion bonding method in which the surfaces are bonded together using a combination of temperature and pressure can be used. Since bonding occurs at the atomic level in both cases, excellent bonding can be obtained not only electrically but also mechanically.

[0288] Also, for bonding between insulating layers, a hydrophilic bonding method can be used in which after obtaining high flatness by polishing or the like, the surfaces that have been subjected to hydrophilic treatment with oxygen plasma or the like are brought into contact with each other for temporary bonding, and permanent bonding is performed by dehydration by heat treatment. Since the hydrophilic bonding method also causes bonding at the atomic level, excellent mechanical bonding can be obtained.

[0289] Since an insulating layer and a metal layer are mixed on the bonding surface of the bonding, for example, a combination of a surface activation bonding method and a hydrophilic bonding method may be used.

[0290] For example, a method such as cleaning the surface after polishing, performing an antioxidant treatment on the surface of the metal layer, and then performing a hydrophilic treatment before bonding can be used. Also, the surface of the metal layer may be made of a metal with poor oxidation resistance such as Au, and a hydrophilic treatment may be performed. In addition, a bonding method other than the above-described method may be used.

[0291] By using this structure, in a semiconductor device using a transistor having an oxide semiconductor, fluctuations in electrical characteristics can be suppressed and reliability can be improved. Alternatively, in a battery control circuit using a transistor having an oxide semiconductor, miniaturization or high integration can be achieved.

[0292] This embodiment can be appropriately combined with the descriptions of other embodiments.

[0293] (Embodiment 5) In this embodiment, a metal oxide of one aspect of the present invention will be described.

[0294] <<Metal Oxide>> As the oxide 530, it is preferable to use a metal oxide that functions as an oxide semiconductor. Hereinafter, the metal oxide applicable to the oxide 530 according to the present invention will be described.

[0295] The metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to these, it is preferable that gallium, yttrium, tin, etc. are contained. Also, one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. may be contained.

[0296] Here, consider the case where the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. Note that element M is aluminum, gallium, yttrium, or tin. Applicable elements other than these are boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. However, there may be cases where a plurality of the aforementioned elements may be combined as element M.

[0297] Note that in this specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

[0298] [Structure of Metal Oxide] Oxide semiconductors (metal oxides) are divided into single-crystalline oxide semiconductors and other non-single-crystalline oxide semiconductors. Examples of non-single-crystalline oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductor), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0299] CAAC-OS has a c-axis orientation, and a plurality of nanocrystals are connected in the a-b plane direction, resulting in a crystal structure having strain. Note that the strain refers to a portion where the direction of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in a region where a plurality of nanocrystals are connected.

[0300] The nano-crystals are based on a hexagon, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the case of strain, there may be lattice arrays such as pentagons and heptagons. In CAAC-OS, it is difficult to confirm a clear grain boundary (also referred to as a grain boundary) even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice array. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal elements.

[0301] In addition, CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as an (M,Zn) layer) are laminated. Note that indium and element M are mutually substitutable, and when element M in the (M,Zn) layer is substituted with indium, it can also be expressed as an (In,M,Zn) layer. Also, when indium in the In layer is substituted with element M, it can also be expressed as an (In,M) layer.

[0302] CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm a clear grain boundary in CAAC-OS, it can be said that a decrease in electron mobility due to grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, it can be said that CAAC-OS is a metal oxide with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable.

[0303] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Further, nc-OS has no regularity in crystal orientation among different nanocrystals. Therefore, no orientation is observed in the whole film. Thus, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or an amorphous oxide semiconductor.

[0304] Note that In-Ga-Zn oxide (hereinafter, IGZO), which is a kind of metal oxide having indium, gallium, and zinc, may have a stable structure by using the above-described nanocrystals. In particular, since IGZO tends to be difficult to grow crystals in the air, it may be structurally more stable as a smaller crystal (here, a crystal of several mm or a crystal of several cm) than a larger crystal (for example, the above-described nanocrystal).

[0305] a-like OS is a metal oxide having a structure between nc-OS and an amorphous oxide semiconductor. a-like OS has a loose or low-density region. That is, a-like OS has lower crystallinity than nc-OS and CAAC-OS.

[0306] Oxide semiconductors (metal oxides) have various structures and each has different characteristics. The oxide semiconductor according to one embodiment of the present invention may have two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

[0307] [Impurities] Here, the influence of each impurity in the metal oxide will be described.

[0308] When an impurity is mixed into an oxide semiconductor, a defect level or oxygen deficiency may be formed. Therefore, when an impurity is mixed into the channel formation region of the oxide semiconductor, the electrical characteristics of a transistor using the oxide semiconductor are likely to vary and the reliability may decrease. Further, when the channel formation region contains oxygen deficiency, the transistor tends to have normally-on characteristics.

[0309] In addition, the defect levels may include trap levels. The charges trapped in the trap levels of the metal oxide may take a long time to disappear and may behave like fixed charges. Therefore, a transistor having a metal oxide with a high trap level density in the channel formation region may have unstable electrical characteristics.

[0310] In addition, when impurities are present in the channel formation region of the oxide semiconductor, the crystallinity of the channel formation region may be lowered, and the crystallinity of the oxide provided in contact with the channel formation region may also be lowered. When the crystallinity of the channel formation region is low, the stability or reliability of the transistor tends to decrease. In addition, when the crystallinity of the oxide provided in contact with the channel formation region is low, interface levels may be formed, and the stability or reliability of the transistor may decrease.

[0311] Therefore, in order to improve the stability or reliability of the transistor, it is effective to reduce the impurity concentration in the channel formation region of the oxide semiconductor and in its vicinity. Examples of the impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0312] Specifically, in the channel formation region of the oxide semiconductor and in its vicinity, the concentration of the above impurities obtained by secondary ion mass spectrometry (SIMS) is 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3Make it as follows. Alternatively, in the channel formation region of the oxide semiconductor and its vicinity, the concentration of the above-mentioned impurity obtained by elemental analysis using EDX is made 1.0 atomic% or less. When an oxide containing element M is used as the oxide semiconductor, in the channel formation region of the oxide semiconductor and its vicinity, the concentration ratio of the above-mentioned impurity to element M is made less than 0.10, preferably less than 0.05. Here, the concentration of element M used when calculating the above-mentioned concentration ratio may be the concentration in the same region as the region where the concentration of the above-mentioned impurity is calculated, or the concentration in the oxide semiconductor.

[0313] In addition, since a metal oxide with a reduced impurity concentration has a low density of defect levels, the trap level density may also be low.

[0314] In addition, when hydrogen enters the oxygen deficiency in the metal oxide, oxygen deficiency and hydrogen may combine to form V O H. V O H functions as a donor and electrons that are carriers may be generated. Also, part of the hydrogen may combine with the oxygen that binds to the metal atom to generate electrons that are carriers.

[0315] Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics. Also, since hydrogen in the oxide semiconductor is likely to move due to stress such as heat and an electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may decrease.

[0316] That is, it is preferable to reduce V O H in the metal oxide as much as possible and make it highly pure intrinsic or substantially highly pure intrinsic. In this way, in order to obtain an oxide semiconductor in which V O H is sufficiently reduced, it is important to remove impurities such as moisture and hydrogen in the oxide semiconductor (which may be described as dehydration and dehydrogenation treatment), and to supply oxygen to the oxide semiconductor to compensate for oxygen deficiency (which may be described as oxygen addition treatment). V OBy using an oxide semiconductor with sufficiently reduced impurities such as H in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0317] In addition, it is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. When reducing the carrier concentration of the oxide semiconductor, the impurity concentration in the oxide semiconductor may be reduced and the density of defect levels may be reduced. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as high-purity intrinsic or substantially high-purity intrinsic. Note that examples of impurities in the oxide semiconductor include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0318] In particular, hydrogen contained in the oxide semiconductor may react with oxygen bonded to metal atoms to form water, and thus oxygen vacancies may be formed in the oxide semiconductor. When the channel formation region in the oxide semiconductor contains oxygen vacancies, the transistor may exhibit normally-on characteristics. Furthermore, defects in which hydrogen enters oxygen vacancies may function as donors, and electrons serving as carriers may be generated. Also, a part of hydrogen may bond to oxygen bonded to metal atoms to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to exhibit normally-on characteristics.

[0319] Defects (V O H) in which hydrogen enters oxygen vacancies may function as donors in the oxide semiconductor. However, it is difficult to quantitatively evaluate such defects. Therefore, in the oxide semiconductor, it may be evaluated by the carrier concentration instead of the donor concentration. Thus, in this specification and the like, as a parameter of the oxide semiconductor, the carrier concentration assuming a state where no electric field is applied may be used instead of the donor concentration. That is, the "carrier concentration" described in this specification and the like may be paraphrased as the "donor concentration" in some cases.

[0320] Therefore, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is set to less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , still more preferably less than 1×10 18 atoms / cm 3 . By using an oxide semiconductor in which impurities such as hydrogen are sufficiently reduced in the channel formation region of the transistor, stable electrical characteristics can be imparted.

[0321] Further, the carrier concentration of the oxide semiconductor in the channel formation region is preferably 1×10 18 cm -3 or less, more preferably less than 1×10 17 cm -3 , still more preferably less than 1×10 16 cm -3 , still more preferably less than 1×10 13 cm -3 , still more preferably less than 1×10 12 cm -3 . Note that the lower limit value of the carrier concentration of the oxide semiconductor in the channel formation region is not particularly limited, and for example, it can be set to 1×10 -9 cm -3 .

[0322] According to one aspect of the present invention, a semiconductor device with good reliability can be provided. Further, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided. Further, according to one aspect of the present invention, a semiconductor device with a large on-current can be provided. Further, according to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. Further, one aspect of the present invention aims to provide a low-power consumption semiconductor device.

[0323] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 530 are not limited to the above-described metal oxides. As the oxide 530, a semiconductor material having a band gap (a semiconductor material that is not a zero-gap semiconductor) may be used. For example, it is preferable to use a single-element semiconductor such as silicon, a compound semiconductor such as gallium arsenide, or a layered material that functions as a semiconductor (also referred to as an atomic layer material, a two-dimensional material, etc.) as the semiconductor material. In particular, it is suitable to use a layered material that functions as a semiconductor as the semiconductor material.

[0324] Here, in this specification and the like, the layered material is a general term for a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via a bond weaker than covalent bonds or ionic bonds, such as van der Waals forces. The layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-current can be provided.

[0325] Examples of the layered material include graphene, silicene, and chalcogenides. A chalcogenide is a compound containing a chalcogen. Further, chalcogens are a general term for elements belonging to Group 16 and include oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides.

[0326] As the oxide 530, it is preferable to use, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of the transition metal chalcogenide applicable as the oxide 530 include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically ZrSe2), and the like.

[0327] This embodiment can be appropriately combined with the descriptions of other embodiments.

[0328] (Embodiment 6) In this embodiment, an example in which the amplifier described in the above embodiment is used as an electronic component will be described with reference to FIG. 18.

[0329] In this embodiment, an example of a chip 1200 on which the semiconductor device of the present invention is mounted will be shown with reference to FIG. 18. A plurality of circuits (systems) are mounted on the chip 1200. In this way, the technology of integrating a plurality of circuits (systems) on one chip is sometimes referred to as System on Chip (SoC).

[0330] FIG. 18 shows an example in which a plurality of chips are provided on a printed circuit board 1203. In FIG. 18, a chip 1201 is provided on the printed circuit board 1203. At least a part of the semiconductor device according to one aspect of the present invention is provided on the chip 1201. For example, the gate driver and the power control circuit included in the semiconductor device shown in the previous embodiment are provided. Further, at least one of the power MOSFETs included in the semiconductor device shown in the previous embodiment is provided on the chip 1201. A plurality of bumps 1202 are provided on the back surface of the chip 1201 and are connected to the printed circuit board 1203.

[0331] By using the configuration of the semiconductor device according to one aspect of the present invention, circuits such as a gate driver and a power control circuit can be stacked and provided on a power MOSFET within one chip, so that the number of chips can be reduced in electronic components.

[0332] By reducing the number of chips, the circuit operation can be stably performed even in a vibrating environment. Further, by making a mechanically strong connection between the chip and the connection electrode of the printed circuit board using bumps and surely making an electrical connection, a configuration that is more resistant to vibration can be achieved. Therefore, it is suitable for, for example, electronic components mounted on vehicles and mobile terminals.

[0333] Further, by using the configuration of the semiconductor device according to one aspect of the present invention, chip integration becomes possible and chip miniaturization becomes possible, so that miniaturization of electronic devices becomes possible. Also, chip miniaturization may reduce power consumption.

[0334] The printed circuit board 1203 shown in FIG. 18 has chips 1221, 1222, etc. in addition to the chip 1201. For example, an inductor 752 can be provided in the chip 1221, and a capacitive element 753 can be provided in the chip 1222. Note that the inductor 752, the capacitive element 753, etc. may not be different chips from the chip 1201 but may be provided in the chip 1201.

[0335] When the amplifier according to one aspect of the present invention has a plurality of power MOSFETs as in the example shown in FIG. 1, each power MOSFET can be provided in a different chip. For example, in the printed circuit board 1203 shown in FIG. 18, the first power MOSFET may be provided in the chip 1201, and the second power MOSFET may be provided in the chip 1225. By providing power MOSFETs in different chips, leakage between the MOSFETs can be reduced.

[0336] Alternatively, within a single chip, a plurality of power MOSFETs may be provided on the same substrate, and a gate driver, a power control circuit, etc. may be stacked and provided on the plurality of power MOSFETs. This enables circuit integration.

[0337] The printed circuit board 1203 is preferably provided with an integrated circuit 1223. The integrated circuit 1223 has a function of supplying a control signal, power, etc. to the chip 1201. The integrated circuit 1223 has, for example, a CPU, an arithmetic circuit, a conversion circuit, etc. The arithmetic circuit may have a function of performing, for example, image processing and sum-of-products calculation. Further, the conversion circuit may have one or both of, for example, an A / D (analog / digital) conversion circuit and a D / A (digital / analog) conversion circuit.

[0338] Also, as various chips provided on the printed circuit board 1203, storage devices such as DRAM and flash memory may be provided. Further, the printed circuit board 1203 may be provided with a chip having a function of performing wireless communication.

[0339] This embodiment can be appropriately combined with the descriptions of other embodiments.

[0340] (Embodiment 7) In this embodiment, an example of an electronic device according to one aspect of the present invention will be described.

[0341] An example of an electronic device provided with an amplifier according to one aspect of the present invention will be described with reference to FIG. 19.

[0342] An amplifier according to one aspect of the present invention can be used in an electronic device such as an audio reproduction device. An amplifier according to one aspect of the present invention can be used for a speaker or the like. Further, an amplifier according to one aspect of the present invention can be used in an electronic device having a speaker or the like. Further, examples of the audio reproduction device include a car audio, a digital audio player, etc. Further, an amplifier according to one aspect of the present invention can be used for headphones, earphones, etc.

[0343] The switching frequencies of transistor 762 and transistor 763 by the gate driver 760 shown in the above embodiment are preferably, for example, 10 times or more the frequency of the audio signal. The switching frequency is preferably, for example, 100 kHz or more and 5 MHz or less. It is preferable to adjust the inductance of the inductor and the capacitance of the capacitive element so that the cut-off frequency of the low-pass filter is higher than the audible frequency band.

[0344] The cleaning robot 7000 shown in FIG. 19A includes a secondary battery, an illuminance sensor, a microphone, a camera, a speaker, a display, various sensors (infrared sensor, ultrasonic sensor, acceleration sensor, piezo sensor, optical sensor, gyro sensor, etc.), and a moving mechanism. The cleaning robot 7000 is provided with tires, a suction port, etc. The cleaning robot 7000 can move automatically, detect dust, and suck dust from the suction port provided on the lower surface.

[0345] The microphone has a function of detecting acoustic signals such as the user's voice and environmental sound. Also, the speaker has a function of emitting audio signals such as voice and warning sounds. The cleaning robot 7000 can analyze the audio signal input via the microphone and emit the necessary audio signal from the speaker. In the cleaning robot 7000, it is possible to communicate with the user using the microphone and the speaker.

[0346] The amplifier according to one aspect of the present invention can be used for amplifying the audio signal input via the microphone and amplifying the audio signal emitted from the speaker.

[0347] The camera has a function of imaging the surroundings of the cleaning robot 7000. Also, the cleaning robot 7000 has a function of moving using the moving mechanism. The cleaning robot 7000 can use the camera to image the surrounding images and analyze the images to detect the presence or absence of obstacles when moving.

[0348] The smartphone 7210 shown in FIG. 19B is an example of a mobile information terminal. The smartphone 7210 has a microphone, a camera, a speaker, various sensors, and a display unit. The amplifier according to one aspect of the present invention can be used for amplifying an audio signal input via the microphone and for amplifying an audio signal emitted from the speaker.

[0349] The earphone 7400 shown in FIG. 19C has a main body 7401, a housing 7402, an earhook 7403, and a circuit board 7404 disposed in the housing 7402. As the circuit board 7404, a chip on which the amplifier according to one aspect of the present invention shown in the previous embodiment is mounted can be used. By using such a chip, a small-sized earphone can be provided. Also, a lightweight earphone can be provided.

[0350] Also, the earphone 7400 preferably has a wireless communication function. Further, the earphone 7400 preferably has a secondary battery in the housing 7402. By having a secondary battery, the earphone can be used without being wired to a power source.

[0351] Also, the earphone 7400 preferably has a wireless communication function. When performing wireless communication, as a communication protocol or communication technology, communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), W-CDMA (registered trademark), or specifications standardized by IEEE such as Wi-Fi (registered trademark), Bluetooth (registered trademark), ZigBee (registered trademark) can be used. By having a wireless communication function, the earphone can be used without being wired to a device that outputs an audio signal.

[0352] The television 7500 shown in FIG. 19D has a display unit 7501 and a speaker 7502. An amplifier according to an aspect of the present invention can be used to amplify an audio signal emitted from the speaker.

[0353] FIG. 19E shows the interior of a vehicle 8400. The vehicle 8400 has a display unit 8411, a speaker 8403, and a microphone 8404. An amplifier according to an aspect of the present invention can be used to amplify an audio signal input via the microphone and an audio signal emitted from the speaker.

[0354] This embodiment can be appropriately combined with the descriptions of other embodiments.

Description of Reference Numerals

[0355] :21: Transistor, 22: Transistor, 23: Transistor, 24: Transistor, 25: Transistor, 50: Comparator, 101: Buffer Circuit, 102: Level Shift Circuit, 103: Buffer Circuit, 104: Buffer Circuit, 111: Transistor, 112: Transistor, 113: Capacitor Element, 114: Capacitor Element, 121: Transistor, 122: Transistor, 131: Inverter Circuit, 132: Inverter Circuit, 141: Transistor, 142: Transistor, 143: Transistor, 144: Transistor, 151: Transistor, 152: Transistor, 153: Transistor, 154: Transistor, 155: Capacitor Element, 211: Control Circuit, 212: Photo Coupler, 213: Photo Coupler, 214: Reference Voltage Generation Circuit, 215: Reference Voltage Generation Circuit, 216: Reference Voltage Generation Circuit, 300: Transistor, 311: Substrate, 311b: Substrate, 313: Semiconductor Region, 314a: Diffusion Layer, 314b: Diffusion Layer, 315: Insulator, 316: Conductor, 317: Diffusion Layer, 318: Back Electrode, 319: Region, 320: Insulator, 322: Insulator, 322b: Insulator, 324: Insulator, 326: Insulator, 328: Conductor, 328b: Conductor, 330: Conductor, 350: Insulator, 352: Insulator, 354: Insulator, 356: Conductor, 385: Layer, 500: Transistor, 503: Conductor, 503a: Conductor, 503b: Conductor, 510: Insulator, 512: Insulator, 514: Insulator, 516: Insulator, 518: Conductor, 520: Insulator, 522: Insulator, 524: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 530c: Oxide, 540a: Conductor, 540b: Conductor, 542a: Conductor, 542b: Conductor, 543a: Region, 543b: Region, 544: Insulator, 546: Conductor, 546b: Conductor, 548: Conductor, 548b: Conductor, 550: Insulator, 560: Conductor, 560a: Conductor, 560b: Conductor, 574: Insulator, 580: Insulator, 581: Insulator, 582: Insulator, 585: Layer, 600: Capacitor Element, 610a: Conductor, 610b: Conductor, 620: Conductor, 630: Insulator, 631: Conductor, 632: Conductor, 637: Bump, 638: Printed Circuit Board, 639: Resin Layer, 640: Insulator, 641: Resin Layer, 642: Wire, 750: Amplifier, 751: Semiconductor Device, 752: Inductor,753: Capacitance element, 760: Gate driver, 760a: Driver circuit, 760a1: Driver circuit, 760a2: Driver circuit, 761: Power control circuit, 762: Transistor, 763: Transistor, 771: Comparator, 772: Comparator, 773: Carrier generation circuit, 774: Resistive element, 775: Resistive element, 776: Capacitance element, 777: Resistive element, 778: Resistive element, 779: Capacitance element, 791: Terminal, 792: Terminal, 793: Terminal, 794: Terminal, 795: Terminal, 901: Insulator, 902: Insulator, 903: Conductor, 1200: Chip, 1201: Chip, 1202: Bump, 1203: Printed circuit board, 1221: Chip, 1222: Chip, 1223: Integrated circuit, 1225: Chip, 7000: Cleaning robot, 7210: Smartphone, 7400: Earphone, 7401: Body, 7402: Housing, 7403: Earhook, 7404: Circuit board, 7500: Television, 7501: Display unit, 7502: Speaker, 8400: Vehicle, 8403: Speaker, 8404: Microphone, 8411: Display unit,

Claims

1. A semiconductor device having a first terminal, a second terminal, a third terminal, a fourth terminal, a first comparison circuit, a gate driver, a first transistor, and a second transistor, wherein the first terminal is directly connected to a first input terminal of the first comparison circuit; the first terminal is directly connected to the fourth terminal; an output terminal of the first comparison circuit is directly connected to an input terminal of the gate driver; a first output terminal of the gate driver is directly connected to a gate of the first transistor; a second output terminal of the gate driver is directly connected to a gate of the second transistor; one of a source and a drain of the first transistor is directly connected to the second terminal; the other of the source and the drain of the first transistor is directly connected to the third terminal; one of a source and a drain of the second transistor is directly connected to the second terminal; the other of the source and the drain of the second transistor is directly connected to the fourth terminal; an input signal is input to the first terminal; an output signal is output from the second terminal; a first potential is input to a second input terminal of the first comparison circuit; a second potential is input to the third terminal; a third potential is input to the fourth terminal; and a transistor included in the gate driver is provided laminated on the first transistor.

2. In Claim 1, the first transistor is a semiconductor device having one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in a channel formation region.

3. In Claim 1 or Claim 2, the transistor included in the gate driver has a metal oxide in a channel formation region, and the metal oxide is a semiconductor device having indium and zinc.

Images