Motor driver and semiconductor device

The motor driver accurately determines the state of power elements in an inverter circuit, reducing short-circuit currents and preventing thermal damage by lowering gate voltages in the active region.

JP2025110238APending Publication Date: 2025-07-28SANKEN ELECTRIC CO LTD
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Patent Information

Application Number
JP2024004059
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-15
Publication Date
2025-07-28

AI Technical Summary

Technical Problem

Existing motor drivers cannot accurately determine whether high-side or low-side power elements in an inverter circuit are in the saturation or active region, leading to potential thermal damage due to uncontrolled short-circuit currents during avalanche states.

Method used

A motor driver with short-circuit detection elements and switching circuits that monitor and lower the gate voltage of power elements in the active region, ensuring accurate determination of the power element's state and reducing short-circuit currents.

Benefits of technology

The solution extends the time before thermal damage occurs by suppressing short-circuit currents, allowing for timely protection operations.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a motor driver which determines whether each of power elements constituting an inverter circuit is in a saturation region or in an active region, thereby being capable of lowering a gate voltage of a power element that operates in the active region.SOLUTION: A motor driver 1 supplies, to an inverter circuit 2 including a plurality of power elements (high-side power elements QH1-QH3, low-side power elements QL1-QL3) connected in series to a motor power supply voltage VBB, a drive signal driving the power elements. The motor driver includes, in each of the power elements constituting the inverter circuit 2, a short circuit detection circuit detecting a short circuit when a voltage between main terminals detected using respective short circuit detection elements RSCH1-RSCH3, RSCL1-RSCL3 exceeds a short circuit threshold voltage, and a short circuit switching circuit lowering the voltage level of the drive signal when a short circuit is detected by the short circuit detection circuit while the power element is in an on-state.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] Embodiments of the present disclosure relate to a motor driver that drives an inverter circuit.

Background Art

[0002] In an inverter circuit equipped with a power element such as an IGBT, a high-side power element and a low-side power element are connected in series between power supplies. The high-side power element and the low-side power element are complementarily turned on and off by PWM operation. When an overvoltage of not less than the breakdown voltage of one element and less than the breakdown voltage between the upper and lower sides is applied to the series-connected high-side power element and low-side power element, if one of the power elements is in the on state, the other power element enters the avalanche state. The power element in the on state shifts from the saturation region to the active region, and a short-circuit current depending on the gate voltage of the power element in the on state flows through both power elements. In this case, since an avalanche current flows through the power element in the avalanche state, energy consumption increases and thermal breakdown is likely to occur.

[0003] Therefore, it has been proposed to reduce the short-circuit current and suppress the energy consumption of the power element in the avalanche state by lowering the gate voltage of the power element in the on state (see, for example, Patent Document 1). By suppressing the energy consumption of the power element in the avalanche state, the breakdown tolerance is improved, and it becomes possible to execute a protection operation before thermal breakdown occurs.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, in the prior art, by monitoring the output terminal voltage, when the low-side power element is in the active region (short-circuit state), the gate voltage of the low-side power element is reduced. Since the output terminal voltage is referenced to ground, it is not possible to determine whether the high-side power element is in the saturation region (normal state) or the active region. Therefore, when the high-side power element is in the active region (short-circuit state), the gate voltage cannot be lowered, and it is not possible to reduce the short-circuit current when the low-side power element is in the avalanche state or the short-circuit current in the case of a ground fault, and there has been a concern that the low-side power element may be thermally damaged before the protection operation.

[0006] The present disclosure provides a motor driver capable of determining whether each of the power elements constituting the inverter circuit is in the saturation region or the active region and lowering the gate voltage of the power element operating in the active region.

Means for Solving the Problem

[0007] The motor driver of the present disclosure is a motor driver that supplies a drive signal for driving a plurality of power elements connected in series to a motor power supply voltage to an inverter circuit including the power elements, and for each of the power elements constituting the inverter circuit, a short-circuit detection element connected between the main terminals of the power element, and a short-circuit detection circuit that detects a short circuit when the main terminal voltage detected using the short-circuit detection element exceeds a preset short-circuit threshold voltage, and a short-circuit switching circuit that lowers the voltage level of the drive signal when the power element is in the on state and a short circuit is detected by the short-circuit detection circuit.

Effect of the Invention

[0008] The motor driver of the present disclosure can determine whether each of the power elements constituting the inverter circuit is in the saturation region or the active region, lower the gate voltage of the power element operating in the active region, and suppress the short-circuit current, so that the time until the power element in the avalanche state is thermally damaged can be extended, and the time for the protection operation can be ensured.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Embodiments for Carrying Out the Invention

[0010] Hereinafter, preferred embodiments of the present invention will be described based on the accompanying drawings.

[0011] The motor driver 1 of the present embodiment is a motor driving device that drives the motor 20 based on a control signal from a controller 10 which is a control circuit. As shown in FIG. 1, the motor driver 1 includes an inverter circuit 2, a high-side driver 3 which is a driving circuit, and a low-side driver 4.

[0012] The motor driver 1 can be configured as a semiconductor device formed by encapsulating a semiconductor integrated circuit in a package made of resin. The high-side driver 3 and the low-side driver 4 may each be configured as a semiconductor device in an individual package.

[0013] The inverter circuit 2 is a three-phase inverter that outputs a U-phase output voltage, a V-phase output voltage, and a W-phase output voltage for driving the motor 20. The inverter circuit 2 is connected in series between the motor power supply voltage VBB (DC link voltage: DC-link) and the common line, and includes half-bridge circuits for the U-phase, V-phase, and W-phase. The capacitor C1 is a voltage smoothing capacitor connected between the motor power supply voltage VBB and the common line.

[0014] As the U-phase half-bridge circuit, the inverter circuit 2 includes a high-side power element QH1 and a low-side power element QL1 connected in series between the motor power supply voltage VBB and the common line. As the V-phase half-bridge circuit, the inverter circuit 2 includes a high-side power element QH2 and a low-side power element QL2 connected in series between the motor power supply voltage VBB and the common line. As the W-phase half-bridge circuit, the inverter circuit 2 includes a high-side power element QH3 and a low-side power element QL3 connected in series between the motor power supply voltage VBB and the common line.

[0015] The high-side power elements QH1 to QH3 and the low-side power elements QL1 to QL3 are composed of power semiconductors such as insulated gate bipolar transistors (IGBTs: Insulated Gate Bipolar Transistors) and metal oxide semiconductor field effect transistors (MOSFETs: metal-oxide-semiconductor field-effect transistors). In the following description, the high-side power elements QH1 to QH3 and the low-side power elements QL1 to QL3 are IGBTs.

[0016] The high-side driver 3 includes a control power input terminal Vcc1 for inputting the control power supply voltage Vcc and a control ground terminal COM1 connected to the common line. The capacitor C2 is an input capacitor connected between the control power supply voltage Vcc and the common line. The high-side driver 3 includes floating high-potential side power supply terminals VB1 to VB3 and floating low-potential side power supply terminals HS1 to HS3.

[0017] Between the floating high-potential side power supply terminals VB1 to VB3 and the floating low-potential side power supply terminals HS1 to HS3, capacitors C3 to C5 are respectively connected. The capacitors C3 to C5, together with the diodes Db1 to Db3 and the resistors Rb1 to Rb3 built in the motor driver 1, constitute a bootstrap circuit, and generate control voltages for the high-side power elements QH1 to QH3 respectively.

[0018] The high-side driver 3 includes control signal input terminals HIN1 to HIN3 and high-side drive signal output terminals HO1 to HO3. Based on the high-side control signals from the controller 10 input to the control signal input terminals HIN1 to HIN3, the high-side driver 3 generates high-side drive signals for turning on and off the high-side power elements QH1 to QH3 of the inverter circuit 2 respectively, and outputs them from the high-side drive signal output terminals HO1 to HO3.

[0019] The high-side driver 3 includes short-circuit detection terminals VSCH1 to VSCH3 to which the motor power supply voltage VBB is respectively input via the short-circuit detection resistors RSCH1 to RSCH3 built in the motor driver 1.

[0020] The high-side driver 3 includes an overvoltage detection terminal OVM to which the motor power supply voltage VBB is input via the overvoltage detection resistor ROV built in the motor driver 1, an overvoltage transmission signal output terminal OVOUT for outputting an overvoltage detection signal, and an error signal output terminal FO2.

[0021] The low-side driver 4 includes a control power supply input terminal Vcc2 for inputting the control power supply voltage Vcc and a control ground terminal COM2 connected to the common line.

[0022] The low-side driver 4 includes control signal input terminals LIN1 to LIN3 and low-side drive signal output terminals LO1 to LO3. The low-side driver 4 generates a low-side drive signal for turning on and off the low-side power elements QL1 to QL3 of the inverter circuit 2 based on the low-side control signals input to the control signal input terminals LIN1 to LIN3, and outputs the signal from the low-side drive signal output terminals LO1 to LO3.

[0023] The low-side driver 4 includes short-circuit detection terminals VSCL1 to VSCL3 to which the U-phase output voltage, V-phase output voltage, and W-phase output voltage are respectively input via short-circuit detection resistors RSCL1 to RSCL3 built in the motor driver 1.

[0024] The low-side driver 4 includes an overvoltage transfer signal input terminal OVIN for inputting the overvoltage transfer signal output from the overvoltage transfer signal output terminal OVOUT of the high-side driver 3, and an error signal output terminal FO1.

[0025] The error signal output terminal FO2 of the high-side driver 3 and the error signal output terminal FO1 of the low-side driver 4 are connected to a common line via a noise removal capacitor C6.

[0026] Figure 2 shows the internal configuration of the high-side driver 3. Note that Figure 2 shows only the configuration of the U-phase, and the configurations of the V-phase and W-phase are omitted because they are the same as that of the U-phase. Referring to Figure 2, the high-side driver 3 includes a high-side drive signal generation circuit 31, a high-side short-circuit detection circuit 32, a high-side short-circuit switching circuit 33, a high-side error signal generation circuit 34, a high-side overvoltage detection circuit 35, a high-side overvoltage switching circuit 36, and an overvoltage transfer signal generation circuit 37.

[0027] The high-side drive signal generation circuit 31 is a circuit that generates a high-side drive signal for driving the high-side power element QH1 based on the high-side control signal input from the control signal input terminal HIN1.

[0028] The high-side drive signal generation circuit 31 includes a pulse generation circuit 311, a level shift circuit 312, a filter circuit 313, and a flip-flop 314 as a circuit for level-shifting the high-side control signal. The high-side drive signal generation circuit 31 includes a P-type MOS transistor Q1 and an N-type MOS transistor Q2 as a CMOS circuit connected between a floating high-potential side power supply terminal VB1 and a floating low-potential side power supply terminal HS1.

[0029] The pulse generation circuit 311 generates a set signal for setting the flip-flop 314 from the rising edge of the high-side control signal input from the control signal input terminal HIN1, and a reset signal for resetting the flip-flop 314 from the falling edge. The set signal and the reset signal generated by the pulse generation circuit 311 are level-shifted to the high-voltage side by the level shift circuit 312, and the flip-flop 314 is set and reset via the filter circuit 313. Since the filter circuit 313 does not output a high-level signal to the flip-flop 314 until a predetermined time has elapsed, the delay time is set longer than the application time of the dv / dt transient signal. The output of the flip-flop 314, that is, the level-shifted high-side control signal, is input to the gates of the P-type MOS transistor Q1 and the N-type MOS transistor Q2 via a not circuit. A series circuit including a resistor R1 and a resistor R2 is connected between the drain of the P-type MOS transistor Q1 and the drain of the N-type MOS transistor Q2, and the voltage signal at the connection point between the resistor R1 and the resistor R2 is output as the high-side drive signal from the high-side drive signal output terminal HO1.

[0030] The high-side short-circuit detection circuit 32 is a circuit that monitors the collector-emitter voltage (hereinafter referred to as the CE voltage Vce) of the high-side power element QH1, and when the CE voltage Vce exceeds the short-circuit threshold voltage Vth0, detects the short-circuit and outputs a short-circuit detection signal that becomes high level. The CE voltage Vce is the voltage between the main terminals of the high-side power element QH1. When the high-side power element QH1 is composed of a MOSFET, the drain-source voltage becomes the voltage between the main terminals.

[0031] The high-side short-circuit detection circuit 32 includes resistors R3 to R6, a comparator 321, and a capacitor C10. Resistor R3 is connected between the short-circuit detection terminal VSCH1 and the floating low-potential side power supply terminal HS1. Resistor R3, together with the short-circuit detection resistor RSCH1, forms a voltage-dividing circuit for the motor power supply voltage VBB, and the voltage at the connection point between the short-circuit detection resistor RSCH1 and resistor R3 is input as the CE voltage Vce of the high-side power element QH1 to the non-inverting input terminal of the comparator 321. The short-circuit threshold voltage Vth0 generated by the regulator voltage Reg and the voltage-dividing circuit including resistors R4 and R5 is input to the inverting input terminal of the comparator 321. The comparator 321 has its output terminal connected to the gate of the N-type MOS transistor Q3 via a NOT circuit, compares the CE voltage Vce with the short-circuit threshold voltage Vth0, and outputs a high-level signal when the CE voltage Vce exceeds the short-circuit threshold voltage Vth0. The series circuit including resistor R6 and the N-type MOS transistor Q3 is connected between the regulator voltage Reg and the floating low-potential side power supply terminal HS1, and the capacitor C10 is connected in parallel with the N-type MOS transistor Q3. When a high-level signal is output from the comparator 321, the N-type MOS transistor Q3 is turned off, and the capacitor C10 is charged via the resistor R6. The voltage across both ends of the capacitor C10 becomes the short-circuit detection signal output from the high-side short-circuit detection circuit 32.

[0032] The high-side short-circuit switching circuit 33 is a circuit that reduces the voltage level of the high-side drive signal, that is, the gate potential of the high-side power element QH1, when the high-side power element QH1 with the high-side drive signal at a high level is in the on state and a short circuit is detected by the high-side short-circuit detection circuit 32 and the short-circuit detection signal becomes high level.

[0033] The high-side short-circuit switching circuit 33 includes a delay circuit 331, an AND circuit AND1, a P-type MOS transistor Q4, an N-type MOS transistor Q5, and resistors R7 and R8. The delay circuit 331 is a filter that masks the delay of the high-side drive signal due to gate resistance. One input terminal of the AND circuit AND1 is connected to the output of the flip-flop 314 via the delay circuit 331, and the other input terminal is connected to the short-circuit detection signal from the high-side short-circuit detection circuit 32. The output terminal of the AND circuit AND1 is connected to the gates of the P-type MOS transistor Q4 and the N-type MOS transistor Q5. Therefore, when the high-side drive signal is at a high level and the short-circuit detection signal is at a high level, the output of the AND circuit AND1 becomes high level, the P-type MOS transistor Q4 is turned off, and the N-type MOS transistor Q5 is turned on.

[0034] The P-type MOS transistor Q4 is connected between the floating high-potential side power supply terminal VB1 and the P-type MOS transistor Q1 of the high-side drive signal generation circuit 31. The resistor R7 is connected in parallel with the P-type MOS transistor Q4, and the series circuit including the resistor R8 and the N-type MOS transistor Q5 is connected in parallel with the P-type MOS transistor Q1 and the N-type MOS transistor Q2 of the high-side drive signal generation circuit 31. Therefore, when the P-type MOS transistor Q4 is turned off and the N-type MOS transistor Q5 is turned on, current starts to flow through the resistors R7 and R8, and the gate potential decreases according to the voltage division ratio between the resistors R7 and R8.

[0035] When the high-side power element QH1 with the high-side drive signal at a high level is in the on state, a short circuit is detected by the high-side short-circuit detection circuit 32, and the short-circuit detection signal becomes high level when the high-side power element QH1 is on, the high-side error signal generation circuit 34 generates an error signal obtained by level-shifting the short-circuit detection signal and outputs it from the error signal output terminal FO2.

[0036] The high-side error signal generation circuit 34 includes a pulse generation circuit 341, a level shift circuit 342, and a flip-flop 343 as a circuit for level-shifting the short-circuit detection signal. The pulse generation circuit 341 generates a set signal for setting the flip-flop 343 from the rising edge of the output of the flip-flop 314 and a reset signal for resetting the flip-flop 343 from the falling edge. The set signal and the reset signal generated by the pulse generation circuit 341 are level-shifted to the low-voltage side of the controller 10 by the level shift circuit 342 to set and reset the flip-flop 343. The output of the flip-flop 343 is output from the error signal output terminal FO2 via a not circuit and input to the controller 10 as an active-low error signal.

[0037] The high-side overvoltage detection circuit 35 monitors the overvoltage levels (the first overvoltage threshold voltage Vth1 and the second overvoltage threshold voltage Vth2) of the motor power supply voltage VBB, and outputs a first overvoltage detection signal that goes high when the motor power supply voltage VBB exceeds the first overvoltage threshold voltage Vth1, and a second overvoltage detection signal that goes high when the motor power supply voltage VBB exceeds the second overvoltage threshold voltage Vth2.

[0038] The high-side overvoltage detection circuit 35 includes a resistor R30, overvoltage comparison circuits 35a and 35b, and AND circuits AND31 and AND32. The resistor R30 is connected between the overvoltage detection terminal OVM and the common line. The resistor R30, together with the overvoltage detection resistor ROV, constitutes a voltage division circuit for the motor power supply voltage VBB, and the voltage at the connection point of the overvoltage detection resistor ROV and the resistor R30 is input to the overvoltage comparison circuits 35a and 35b as the VBB voltage.

[0039] The overvoltage comparison circuit 35a includes resistors R31 to R35, a comparator 351, an N-type MOS transistor Q30, a capacitor C30, a pulse generation circuit 352, a level shift circuit 353, a filter circuit 354, and a flip-flop 355. The comparator 351 has the VBB voltage input to the non-inverting input terminal, and the first overvoltage threshold voltage Vth1 generated by the regulator voltage Reg and a voltage dividing circuit including the resistors R31 and R32 is input to the inverting input terminal. The comparator 351 has its output terminal connected to the gate of the N-type MOS transistor Q30 via a NOT circuit, compares the VBB voltage with the first overvoltage threshold voltage Vth1, and outputs a high level when the VBB voltage exceeds the first overvoltage threshold voltage Vth1. A series circuit including the resistor R33 and the N-type MOS transistor Q30 is connected between the regulator voltage Reg and the common line, and the capacitor C30 is connected in parallel with the N-type MOS transistor Q30. When a high-level signal is output from the comparator 351, the N-type MOS transistor Q30 is turned off, and the capacitor Q30 is charged via the resistor R33. The voltage across both ends of the capacitor C30 becomes the first overvoltage detection signal.

[0040] The pulse generation circuit 352 generates a set signal for setting the flip-flop 355 from the rising edge of the first overvoltage detection signal and a reset signal for resetting the flip-flop 355 from the falling edge, respectively. The set signal and the reset signal generated by the pulse generation circuit 352 are level-shifted to the high-voltage side by the level shift circuit 353 to set and reset the flip-flop 355. The output of the flip-flop 355 is input as the level-shifted first overvoltage detection signal to one input terminal of the AND circuit AND31 via a buffer.

[0041] The output of the AND circuit AND1 of the high-side short-circuit switching circuit 33 is input to the other input terminal of the AND circuit AND31. Therefore, the high-side overvoltage detection circuit 35 outputs the first overvoltage detection signal to the high-side overvoltage switching circuit 36 when the high-side drive signal is at a high level and the short-circuit detection signal is at a high level.

[0042] The overvoltage comparison circuit 35b has the same configuration as the overvoltage comparison circuit 35a, except that a voltage dividing circuit including a resistor R34 and a resistor R35 generates a second overvoltage threshold voltage Vth2 that is higher than the first overvoltage threshold voltage Vth1. The overvoltage comparison circuit 35b compares the VBB voltage with the second overvoltage threshold voltage Vth2, and when the VBB voltage exceeds the second overvoltage threshold voltage Vth2, it outputs a level-shifted second overvoltage detection signal that goes high. The second overvoltage detection signal is input to one input terminal of the AND circuit AND32 via a buffer. The output of the AND circuit AND1 of the high-side short-circuit switching circuit 33 is input to the other input terminal of the AND circuit AND32. Therefore, the high-side overvoltage detection circuit 35 outputs the second overvoltage detection signal to the high-side overvoltage switching circuit 36 when the high-side drive signal is high, the short-circuit detection signal is high, and the second overvoltage detection signal is high.

[0043] The high-side overvoltage switching circuit 36 is a circuit that reduces the voltage level of the high-side drive signal, that is, the gate potential of the high-side power element QH1, when any of the high-side drive signal, the short-circuit detection signal, and the first overvoltage detection signal is high, and further reduces the voltage level of the high-side drive signal, that is, the gate potential of the high-side power element QH1, when any of the high-side drive signal, the short-circuit detection signal, and the second overvoltage detection signal is high.

[0044] The high-side overvoltage switching circuit 36 includes N-type MOS transistors Q9 and Q10, and resistors R15 and R16. The first overvoltage detection signal is input to the gate of the N-type MOS transistor Q9, and the second overvoltage detection signal is input to the gate of the N-type MOS transistor Q10.

[0045] The series circuit including the resistor R15 and the N-type MOS transistor Q9 is connected in parallel with the P-type MOS transistor Q1 and the N-type MOS transistor Q2 of the high-side drive signal generation circuit 31. Therefore, when the N-type MOS transistor Q9 is turned on by the first overvoltage detection signal with the P-type MOS transistor Q4 of the high-side short-circuit switching circuit 33 being off, the current flowing through the resistor R7 starts to flow through the resistor R15 as well, and the gate potential decreases according to the voltage division ratio between the resistor R7 and the resistors R8 and R15 connected in parallel.

[0046] The series circuit including the resistor R16 and the N-type MOS transistor Q10 is connected in parallel with the P-type MOS transistor Q1 and the N-type MOS transistor Q2 of the high-side drive signal generation circuit 31. Therefore, when the N-type MOS transistor Q10 is turned on by the second overvoltage detection signal with the P-type MOS transistor Q4 of the high-side short-circuit switching circuit 33 being off, the current flowing through the resistor R7 starts to flow through the resistor R16 as well, and the gate potential decreases according to the voltage division ratio between the resistor R7 and the resistors R8, R15, and R16 connected in parallel.

[0047] The overvoltage transmission signal generation circuit 37 is a circuit that generates an overvoltage transmission signal for transmitting the first overvoltage detection signal and the second overvoltage detection signal to the low-side driver 4. The overvoltage transmission signal generation circuit 37 includes the resistors R17 to R20, and the N-type MOS transistors Q11 and Q12. The resistor R17 is connected between the regulator voltage Reg and the overvoltage transmission signal output terminal OVOUT. The resistor R18, the resistor R19 and the N-type MOS transistor Q11, and the resistor R20 and the N-type MOS transistor Q12 are connected in parallel between the overvoltage transmission signal output terminal OVOUT and the common line. The first overvoltage detection signal is input to the gate of the N-type MOS transistor Q11, and the second overvoltage detection signal is input to the gate of the N-type MOS transistor Q12. Thereby, the overvoltage transmission signal output from the overvoltage transmission signal output terminal OVOUT is output as a different voltage according to the states of the first overvoltage detection signal and the second overvoltage detection signal.

[0048] Figure 3 shows the internal configuration of the low-side driver 4. Figure 3 shows only the configuration of the U-phase. Since the configurations of the V-phase and W-phase are the same as that of the U-phase, they are omitted. As shown in Figure 3, the low-side driver 4 includes a low-side drive signal generation circuit 41, a low-side short-circuit detection circuit 42, a low-side short-circuit switching circuit 43, a low-side error signal generation circuit 44, a low-side overvoltage detection circuit 45, and a low-side overvoltage switching circuit 46.

[0049] The low-side drive signal generation circuit 41 is a circuit that generates a low-side drive signal for driving the low-side power element QL1 based on the low-side control signal input from the control signal input terminal LIN1.

[0050] The low-side drive signal generation circuit 41 is the same as the high-side drive signal generation circuit 31 except that the circuit (level shift circuit 411) for level-shifting the low-side control signal is different. The low-side control signal is input to the gates of the P-type MOS transistor Q1 and the N-type MOS transistor Q2 via a NOT circuit. A series circuit including a resistor R1 and a resistor R2 is connected between the drain of the P-type MOS transistor Q1 and the drain of the N-type MOS transistor Q2, and the voltage signal at the connection point of the resistor R1 and the resistor R2 is output as the low-side drive signal from the low-side drive signal output terminal LO1.

[0051] The low-side short-circuit detection circuit 42 is a circuit that monitors the CE voltage Vce of the low-side power element QL1, and when the CE voltage Vce exceeds the short-circuit threshold voltage Vth0, detects the short circuit and outputs a short-circuit detection signal that becomes high level.

[0052] In the low-side short-circuit detection circuit 42, a resistor R3 is connected between the short-circuit detection terminal VSCL1 and the common line, and the voltage at the connection point of the short-circuit detection resistor RSCL1 and the resistor R3 is input to the non-inverting input terminal of the comparator 321 as the CE voltage Vce of the low-side power element QL1. The other configurations are the same as those of the high-side short-circuit detection circuit 32.

[0053] The low-side short-circuit switching circuit 43 is a circuit that reduces the voltage level of the low-side drive signal, i.e., the gate potential of the low-side power element QL1, when a short circuit is detected by the low-side short-circuit detection circuit 42 and the short-circuit detection signal becomes high level when the low-side power element QL1 is on. The low-side short-circuit switching circuit 43 has the same configuration as the high-side short-circuit switching circuit 33.

[0054] The low-side error signal generation circuit 44 has the same configuration as the high-side error signal generation circuit 34, except that the circuit (level shift circuit 441) for level-shifting the short-circuit detection signal is different.

[0055] The low-side overvoltage detection circuit 45 is a circuit that monitors the voltage level of the overvoltage transmission signal from the high-side driver 3 and outputs the first overvoltage detection signal and the second overvoltage detection signal detected by the high-side driver 3.

[0056] The low-side overvoltage detection circuit 45 includes a resistor R40, overvoltage comparison circuits 45a and 45b, and AND circuits AND41 and AND42. The resistor R40 is connected between the overvoltage transmission signal input terminal OVIN and the common line. The resistor R40 converts the overvoltage transmission signal into a VBB voltage, and the converted VBB voltage is input to the overvoltage comparison circuits 45a and 45b.

[0057] The overvoltage comparison circuit 45a includes resistors R41 to R45, a comparator 451, an N-type MOS transistor Q40, a capacitor C40, and a level shift circuit 453. The comparator 451 has the VBB voltage input to the non-inverting input terminal, and the first overvoltage threshold voltage Vth1 generated by the regulator voltage Reg and a voltage dividing circuit including the resistor R41 and the resistor R42 is input to the inverting input terminal. The comparator 451 has its output terminal connected to the gate of the N-type MOS transistor Q40 via a NOT circuit, compares the VBB voltage with the first overvoltage threshold voltage Vth1, and outputs a high level when the VBB voltage exceeds the first overvoltage threshold voltage Vth1. A series circuit including the resistor R43 and the N-type MOS transistor Q40 is connected between the regulator voltage Reg and the common line, and the capacitor C40 is connected in parallel with the N-type MOS transistor Q40. When a high-level signal is output from the comparator 451, the N-type MOS transistor Q40 is turned off, and the capacitor Q40 is charged via the resistor R43. The voltage across both ends of the capacitor C40 becomes the first overvoltage detection signal.

[0058] The first overvoltage detection signal is level-shifted by the level shift circuit 453 and input to one input terminal of the AND circuit AND41 via a buffer.

[0059] The output of the AND circuit AND1 of the low-side short-circuit switching circuit 43 is input to the other input terminal of the AND circuit AND41. Therefore, the low-side overvoltage detection circuit 45 outputs the first overvoltage detection signal to the low-side overvoltage switching circuit 46 when the low-side drive signal is at a high level and the short-circuit detection signal is at a high level.

[0060] The overvoltage comparison circuit 45b has the same configuration as the overvoltage comparison circuit 45a, except that a voltage dividing circuit including a resistor R44 and a resistor R45 generates a second overvoltage threshold voltage Vth2 that is higher than the first overvoltage threshold voltage Vth1. The overvoltage comparison circuit 45b compares the VBB voltage with the second overvoltage threshold voltage Vth2, and when the VBB voltage exceeds the second overvoltage threshold voltage Vth2, outputs a second overvoltage detection signal that becomes high level. The second overvoltage detection signal is input to one input terminal of the AND circuit AND42 via a buffer. The output of the AND circuit AND1 of the low-side short-circuit switching circuit 43 is input to the other input terminal of the AND circuit AND42. Therefore, the low-side overvoltage detection circuit 45 outputs the second overvoltage detection signal to the low-side overvoltage switching circuit 46 when the low-side drive signal is high level, the short-circuit detection signal is high level, and

[0061] The low-side overvoltage switching circuit 46 is a circuit that reduces the voltage level of the low-side drive signal, that is, the gate potential of the low-side power element QL1, when any of the low-side drive signal, the short-circuit detection signal, and the first overvoltage detection signal is high level, and further reduces the voltage level of the low-side drive signal, that is, the gate potential of the low-side power element QL1, when any of the low-side drive signal, the short-circuit detection signal, and the second overvoltage detection signal is high level. The low-side overvoltage switching circuit 46 has the same configuration as the high-side overvoltage switching circuit 36.

[0062] Figure 4 shows the operation sequence when the U phase of the high-side driver 3 is grounded. The same operation occurs when the V phase or W phase is grounded. In Figure 4, (a) shows the voltage waveform of the high-side control signal input from the control signal input terminal HIN1, (b) shows the voltage waveform of the high-side drive signal output from the high-side drive signal output terminal HO1, (c) shows the voltage waveforms of the motor power supply voltage VBB and the U-phase output respectively, (d) shows the current waveform of the collector current Ic flowing through the high-side power element QH1, and (e) shows the voltage waveform of the error signal output from the error signal output terminal FO2 in a simplified manner. In Figure 4, after time t0, the time range is extended for the purpose of explanation.

[0063] When the high-side control signal and the high-side drive signal shown in FIGS. 4(a) and 4(b) are at high level, the high-side power element QH1 is in the on state. When a ground fault occurs where the U-phase output becomes 0V at time t1 when the high-side power element QH1 is in the on state, as shown in FIG. 4(c), the CE voltage Vce exceeds the short-circuit threshold voltage Vth0. Therefore, the high-side short-circuit detection circuit 32 detects the short circuit and outputs a high-level short-circuit detection signal. The high-side power element QH1 operates in the saturation region before time t1 when the ground fault occurs, and operates in the active region after time t1 when the ground fault occurs.

[0064] Since the high-side drive signal is at high level (the high-side power element QH1 is in the on state) and the short-circuit detection signal is at high level, the high-side short-circuit switching circuit 33 lowers the voltage level (gate potential) of the high-side drive signal as shown in FIG. 4(b). By lowering the gate potential, as shown in FIG. 4(d), the increase in the collector current Ic due to the short-circuit current caused by the ground fault is suppressed. The dotted line shown in FIG. 4(d) is the collector current Ic when the gate potential is not lowered.

[0065] Also, since the short-circuit detection signal is at high level, the high-side error signal generation circuit 34 lowers the voltage level of the error signal as shown in FIG. 4(e) and notifies the controller 10 of the short-circuit detection.

[0066] When the error signal level falls, the controller 10 recognizes the notification of short - circuit detection and stops the operation of the inverter circuit 2 (high - side control signal and low - side control signal) at time t3. Thereby, by lowering the gate potential, the collector current Ic (short - circuit current) is suppressed, and since the energy applied to the low - side power element QL1 in the avalanche state is suppressed, the time until the low - side power element QL1 is thermally destroyed can be extended. Therefore, time can be secured until the controller 10 stops the inverter circuit 2, and the controller 10 can stop the operation of the inverter circuit 2 before thermal destruction occurs. The time from t1 to t2 is the period until the error signal level falls and the controller 10 is notified of short - circuit detection. The time from t2 to t3 is the reaction period until the controller 10 stops the high - side control signal upon notification of short - circuit detection.

[0067] As shown by the dotted line in Fig. 4(b), if the gate potential is not lowered at time t1, as shown by the dotted line in Fig. 4(d), since the collector current Ic is not suppressed, there is a concern that the inverter circuit 2 will reach thermal destruction before its operation stops at time t3.

[0068] Fig. 5 shows the operation sequence when the U - phase of the low - side driver 4 is short - circuited. The same operation occurs when the V - phase or W - phase is short - circuited. In Fig. 5, (a) shows the voltage waveform of the low - side control signal input from the control signal input terminal LIN1, (b) shows the voltage waveform of the low - side drive signal output from the low - side drive signal output terminal LO1, (c) shows the voltage waveforms of the motor power supply voltage VBB and the U - phase output respectively, (d) shows the current waveform of the collector current Ic flowing through the low - side power element QL1, and (e) shows the simplified voltage waveform of the error signal output from the error signal output terminal FO1. Note that in Fig. 5, after time t10, the time range is extended for the purpose of explanation.

[0069] When the low-side control signal and the low-side drive signal shown in FIGS. 5(a) and 5(b) are at high level, the low-side power element QL1 is in the on state. When a short circuit occurs where the U-phase output becomes VBB at time t11 when the low-side power element QL1 is in the on state, as shown in FIG. 5(c), the CE voltage Vce exceeds the short-circuit threshold voltage Vth0. Therefore, the low-side short-circuit detection circuit 42 detects the short circuit and outputs a high-level short-circuit detection signal. The low-side power element QL1 operates in the saturation region before time t11 when the short circuit occurs, and operates in the active region after time t11 when the short circuit occurs.

[0070] Since the low-side drive signal is at high level (the low-side power element QL1 is in the on state) and the short-circuit detection signal is at high level, the low-side short-circuit switching circuit 43 lowers the voltage level (gate potential) of the low-side drive signal as shown in FIG. 5(b). By lowering the gate potential, as shown in FIG. 5(d), the increase in the collector current Ic due to the short-circuit current caused by the short circuit is suppressed. The dotted line shown in FIG. 5(d) is the collector current Ic when the gate potential is not lowered.

[0071] Also, since the short-circuit detection signal is at high level, the low-side error signal generation circuit 44 lowers the voltage level of the error signal as shown in FIG. 5(e) and notifies the controller 10 of the short-circuit detection.

[0072] When the error signal level falls, the controller 10 recognizes the notification of short - circuit detection and stops the operation of the inverter circuit 2 (low - side control signal and high - side control signal) at time t13. By lowering the gate potential, the collector current Ic (short - circuit current) is suppressed, and since the energy applied to the high - side power element QH1 in the avalanche state is suppressed, the time until the high - side power element QH1 undergoes thermal breakdown can be extended. Therefore, time can be secured until the controller 10 stops the inverter circuit 2, and the controller 10 can stop the operation of the inverter circuit 2 before thermal breakdown occurs. The time period from t11 to t12 is the period until the error signal level falls and the controller 10 is notified of short - circuit detection. The time period from t12 to t13 is the reaction period until the controller 10 stops the low - side control signal upon receiving the notification of short - circuit detection.

[0073] As shown by the dotted line in Fig. 5(b), if the gate potential is not lowered at time t11, as shown by the dotted line in Fig. 5(d), since the collector current Ic is not suppressed, there is a concern that the inverter circuit 2 will reach thermal breakdown before its operation stops at time t13.

[0074] Fig. 6 shows the operation sequence when an over - voltage is applied to the high - side driver 3. Hereinafter, the example of the U - phase will be described, but the same operation applies to the V - phase and W - phases. In Fig. 6, (a) shows the voltage waveform of the high - side control signal input from the control signal input terminal HIN1, (b) shows the voltage waveform of the high - side drive signal output from the high - side drive signal output terminal HO1, (c) shows the voltage waveforms of the motor power supply voltage VBB and the U - phase output respectively, (d) shows the current waveform of the collector current Ic flowing through the high - side power element QH1, and (e) shows the simplified voltage waveform of the error signal output from the error signal output terminal FO2. Note that in Fig. 6, after time t20, the time range is extended for the purpose of explanation.

[0075] When the high-side control signal and the high-side drive signal shown in FIGS. 6(a) and 6(b) are at a high level, the high-side power element QH1 is in an on state. When an overvoltage is applied while the high-side power element QH1 is in the on state and the motor power supply voltage VBB exceeds the first overvoltage threshold voltage Vth1 and reaches the breakdown voltage Vpr of the low-side power element QL1 at time t22, the low-side power element QL1 enters an avalanche state. Since the low-side power element QL1 is in an avalanche state, the high-side power element QH1 switches from the operation in the saturation region to the operation in the active region, and as shown in FIG. 6(d), the collector current Ic increases due to the short-circuit current.

[0076] When the motor power supply voltage VBB further increases, since the U-phase output is maintained at the breakdown voltage Vpr, as shown in FIG. 6(c), the CE voltage Vce increases. When the CE voltage Vce exceeds the short-circuit threshold voltage Vth0 at time t23, the high-side short-circuit detection circuit 32 detects a short circuit and outputs a high-level short-circuit detection signal.

[0077] Since the high-side drive signal is at a high level (the high-side power element QH1 is in an on state) and the short-circuit detection signal is at a high level, the high-side short-circuit switching circuit 33 lowers the voltage level (gate potential) of the high-side drive signal. Also, since the motor power supply voltage VBB exceeds the first overvoltage threshold voltage Vth1, the first overvoltage detection signal output from the overvoltage comparison circuit 35a is at a high level. Therefore, since all of the high-side drive signal, the short-circuit detection signal, and the first overvoltage detection signal are at a high level, the high-side overvoltage switching circuit 36 also lowers the voltage level (gate potential). As a result, the gate potential decreases according to the voltage division ratio with the resistors R8 and R15 connected in parallel with the resistor R7, and as shown in FIG. 6(d), the collector current Ic (short-circuit current) is greatly suppressed. By suppressing the collector current Ic (short-circuit current), the energy applied to the low-side power element QL1 in the avalanche state can be suppressed, and the time until thermal breakdown can be extended.

[0078] Further, since the short-circuit detection signal becomes high level, as shown in FIG. 6(e), the high-side error signal generation circuit 34 lowers the voltage level of the error signal and notifies the controller 10 of the short circuit detection.

[0079] When the motor power supply voltage VBB further rises and exceeds the second overvoltage threshold voltage Vth2 at time t24, the second overvoltage detection signal output from the overvoltage comparison circuit 35b becomes high level. Therefore, since all of the high-side drive signal, the short-circuit detection signal, the first overvoltage detection signal, and the second overvoltage detection signal become high level, the high-side overvoltage switching circuit 36 further lowers the voltage level (gate potential). As a result, the gate potential decreases according to the voltage division ratio with the resistors R8, R15, and R16 connected in parallel with the resistor R7, and as shown in FIG. 6(d), the collector current Ic (short-circuit current) is further suppressed. By further suppressing the collector current Ic (short-circuit current), the energy applied to the low-side power element QL1 in the avalanche state is further suppressed, and the time until the low-side power element QL1 is thermally destroyed becomes longer.

[0080] The controller 10 recognizes the notification of the short circuit detection due to the fall of the error signal and stops the operation (high-side control signal and low-side control signal) of the inverter circuit 2 at time t26. Since the collector current Ic (short-circuit current) is gradually suppressed by the gradual lowering of the gate potential, the energy applied to the low-side power element QL1 in the avalanche state can be suppressed, and the time until the low-side power element QL1 is thermally destroyed can be extended. Therefore, time can be secured until the controller 10 stops the inverter circuit 2, and the controller 10 can stop the operation of the inverter circuit 2 before reaching thermal destruction. The time from t23 to t24 is the period until the error signal falls and the short circuit detection is notified to the controller 10. The time from t24 to t26 is the reaction period until the controller 10 stops the high-side control signal due to the notification of the short circuit detection.

[0081] As shown by the dotted line in FIG. 6(b), when the gate potential is not lowered at time t23, as shown by the dotted line in FIG. 6(d), since the collector current Ic is not suppressed, there is a concern that the inverter circuit 2 may reach thermal breakdown before the operation stops at time t26.

[0082] Since the first overvoltage threshold voltage Vth1 and the second overvoltage threshold voltage Vth2 are set, when the overvoltage level of the motor power supply voltage VBB increases, the gate voltage is lowered step by step. Therefore, since the suppression of the collector current Ic is also stepwise, the back electromotive voltage caused by the L component of the wiring is dispersed and superimposed at times t23, t24, and t26, and the superimposed portion of the back electromotive voltage to the overvoltage level can be reduced. If the gate voltage is not lowered step by step, the back electromotive voltage is superimposed all at once at time t26 when the controller 10 stops the operation of the inverter circuit 2, as shown by the dotted line in FIG. 6(c), leading to a further increase in the overvoltage level.

[0083] FIG. 7 shows the operation sequence when an overvoltage is applied to the low-side driver 4. Hereinafter, the example of the U phase will be described, but the same operation applies to the V phase and the W phase. In FIG. 7, (a) shows the voltage waveform of the low-side control signal input from the control signal input terminal LIN1, (b) shows the voltage waveform of the low-side drive signal output from the low-side drive signal output terminal LO1, (c) shows the voltage waveforms of the motor power supply voltage VBB and the U-phase output respectively, (d) shows the current waveform of the collector current Ic flowing through the low-side power element QL1, and (e) shows the voltage waveform of the error signal output from the error signal output terminal FO1 in a simplified manner. In FIG. 7, after time t30, the time range is extended for the purpose of explanation.

[0084] When the low-side control signal and the low-side drive signal shown in FIGS. 7(a) and 7(b) are at high level, the low-side power element QL1 is in the on state. When an overvoltage is applied at time t31 when the low-side power element QL1 is in the on state and the motor power supply voltage VBB exceeds the first overvoltage threshold voltage Vth1 and reaches the breakdown voltage Vpr of the high-side power element QH1 at time t32, the high-side power element QH1 enters the avalanche state. Since the high-side power element QH1 is in the avalanche state, the low-side power element QL1 switches from the operation in the saturation region to the operation in the active region, and as shown in FIG. 7(d), the collector current Ic increases due to the short-circuit current.

[0085] When the motor power supply voltage VBB further rises beyond the breakdown voltage Vpr and the CE voltage Vce exceeds the short-circuit threshold voltage Vth0 at time t33, the low-side short-circuit detection circuit 42 detects the short circuit and outputs a high-level short-circuit detection signal.

[0086] Since the low-side drive signal is at high level (the low-side power element QL1 is in the on state) and the short-circuit detection signal is at high level, the low-side short-circuit switching circuit 43 lowers the voltage level (gate potential) of the low-side drive signal. Also, since the motor power supply voltage VBB exceeds the first overvoltage threshold voltage Vth1, the first overvoltage detection signal output from the overvoltage comparison circuit 45a is at high level. Therefore, since all of the low-side drive signal, the short-circuit detection signal, and the first overvoltage detection signal are at high level, the low-side overvoltage switching circuit 46 also lowers the voltage level (gate potential). As a result, the gate potential decreases according to the voltage division ratio of the resistor R8 and the resistor R15 connected in parallel with the resistor R7, and as shown in FIG. 7(d), the collector current Ic (short-circuit current) is greatly suppressed. By suppressing the collector current Ic (short-circuit current), the energy applied to the high-side power element QH1 in the avalanche state can be suppressed, and the time until thermal breakdown can be extended.

[0087] Also, since the short-circuit detection signal becomes high level, as shown in FIG. 7(e), the low-side error signal generation circuit 44 lowers the voltage level of the error signal and notifies the controller 10 of the short-circuit detection.

[0088] When the motor power supply voltage VBB further rises and exceeds the second overvoltage threshold voltage Vth2 at time t34, the second overvoltage detection signal output from the overvoltage comparison circuit 45b becomes high level. Therefore, since all of the low-side drive signal, short-circuit detection signal, first overvoltage detection signal, and second overvoltage detection signal become high level, the low-side overvoltage switching circuit 46 further lowers the voltage level (gate potential). As a result, the gate potential drops according to the voltage division ratio with the resistors R8, R15, and R16 connected in parallel with the resistor R7, and as shown in FIG. 7(d), the collector current Ic (short-circuit current) is further suppressed. By further suppressing the collector current Ic (short-circuit current), the energy applied to the high-side power element QH1 in the avalanche state is further suppressed, and the time until the high-side power element QH1 thermally breaks down becomes longer.

[0089] The controller 10 recognizes the notification of short-circuit detection due to the falling of the error signal level, and stops the operation (high-side control signal and low-side control signal) of the inverter circuit 2 at time t36. Since the collector current Ic (short-circuit current) is gradually suppressed by the stepwise lowering of the gate potential, the energy applied to the high-side power element QH1 in the avalanche state can be suppressed, and the time until the high-side power element QH1 thermally breaks down can be extended. Therefore, time can be secured until the controller 10 stops the inverter circuit 2, and the controller 10 can stop the operation of the inverter circuit 2 before reaching thermal breakdown. The time period from t33 to t35 is the period until the error signal level falls and the short-circuit detection is notified to the controller 10. The time period from t35 to t36 is the reaction period until the controller 10 stops the low-side control signal due to the notification of short-circuit detection.

[0090] As shown by the dotted line in FIG. 7(b), when the gate potential is not lowered at time t33, as shown by the dotted line in FIG. 7(d), since the collector current Ic is not suppressed, there is a concern that the inverter circuit 2 may reach thermal breakdown before the operation is stopped at time t36.

[0091] Since the first overvoltage threshold voltage Vth1 and the second overvoltage threshold voltage Vth2 are set, when the overvoltage level of the motor power supply voltage VBB increases, the gate voltage is gradually lowered. Therefore, since the suppression of the collector current Ic is also stepwise, the back electromotive voltage caused by the L component of the wiring is dispersed and superimposed at times t33, t34, and t36, and the superimposed portion of the back electromotive voltage to the overvoltage level can be reduced. When the gate voltage is not lowered stepwise, the back electromotive voltage is superimposed all at once at time t36 when the controller 10 stops the operation of the inverter circuit 2, as shown by the dotted line in FIG. 7(c), leading to a further increase in the overvoltage level. Note that three or more overvoltage threshold voltages may be set and the gate voltage may be configured to be lowered in three or more steps.

[0092] As described above, the present embodiment is a motor driver 1 that supplies drive signals (high-side drive signal, low-side drive signal) for driving power elements to an inverter circuit 2 including a plurality of power elements (high-side power elements QH1 to QH3, low-side power elements QL1 to QL3) connected in series to the motor power supply voltage VBB. A short-circuit detection circuit (high-side short-circuit detection circuit 32, low-side short-circuit detection circuit 42) that detects a short circuit when the main terminal voltage (CE voltage Vce) detected using short-circuit detection resistors RSCH1 to RSCH3, RSCL1 to RSCL3, which are short-circuit detection elements, respectively, for each of the power elements constituting the inverter circuit 2 exceeds a preset short-circuit threshold voltage Vth0; and a short-circuit switching circuit (high-side short-circuit switching circuit 33, low-side short-circuit switching circuit 43) that lowers the voltage level (gate potential) of the drive signal when the power element is in the on state and a short circuit is detected by the short-circuit detection circuit. With this configuration, it is possible to determine whether each of the power elements constituting the inverter circuit 2 is in the saturation region or the active region, lower the gate voltage of the power element operating in the active region, and suppress the short-circuit current. Therefore, the time until the power element in the avalanche state thermally breaks down can be extended, and the time for the protection operation can be ensured. Since the time until thermal breakdown can be extended for all power elements, it becomes possible to protect the power elements against ground faults as well as load short circuits and open circuits.

[0093] Furthermore, in the present embodiment, a drive signal generation circuit (high-side drive signal generation circuit 31, low-side drive signal generation circuit 41) that generates a drive signal based on a control signal (high-side control signal, low-side control signal) input from the controller 10, and an error signal generation circuit (high-side error signal generation circuit 34, low-side error signal generation circuit 44) that outputs an error signal to the controller 10 when a short circuit is detected by the short-circuit detection circuit while the power element is in the on state. With this configuration, since an error can be detected based on the voltage between the main terminals of each power element, a shunt resistor for detecting a direct current with relatively large power loss in peripheral components and an RC filter for the OCP (overcurrent detection) terminal for preventing noise malfunction are not required, and the substrate for driving the inverter circuit 2 can be miniaturized.

[0094] Furthermore, in the present embodiment, an overvoltage detection circuit (high-side overvoltage detection circuit 35, low-side overvoltage detection circuit 45) that detects an overvoltage of the motor power supply voltage VBB, and an overvoltage switching circuit (high-side overvoltage switching circuit 36, low-side overvoltage switching circuit 46) that lowers the voltage level of the drive signal when a short circuit is detected by the short-circuit detection circuit and an overvoltage is detected by the overvoltage detection circuit while the power element is in the on state. With this configuration, it is possible to suppress when an overvoltage is applied and reduce a further increase in the overvoltage level.

[0095] Furthermore, in the present embodiment, the overvoltage detection circuit detects a plurality of overvoltage levels (first overvoltage threshold voltage Vth1, second overvoltage threshold voltage Vth2), and the overvoltage switching circuit reduces the voltage level of the drive signal for each overvoltage level. With this configuration, the short-circuit current can be reduced step by step, so that the back electromotive force caused by the L component of the wiring can be dispersed, and the superimposed back electromotive force can be reduced by reducing the superimposed component on the overvoltage level of the back electromotive force.

[0096] It should be noted that the present invention is not limited to the above-described embodiments, and it is obvious that each embodiment can be appropriately changed within the scope of the technical idea of the present invention. In addition, the number, position, shape, etc. of the above-described constituent members are not limited to the above-described embodiments, and can be set to appropriate numbers, positions, shapes, etc. for implementing the present invention. The same reference numerals are given to the same components in each figure.

Description of Reference Numerals

[0097] 1 Motor driver 2 Inverter circuit 3 High-side driver 4 Low-side driver 10 Controller 20 Motor 31 High-side drive signal generation circuit 32 High-side short-circuit detection circuit 33 High-side short-circuit switching circuit 34 High-side error signal generation circuit 35 High-side overvoltage detection circuit 35a, 35b Overvoltage comparison circuit 36 High-side overvoltage switching circuit 37 Overvoltage transmission signal generation circuit 41 Low-side drive signal generation circuit 42 Low-side short-circuit detection circuit 43 Low-side short-circuit switching circuit 44 Low-side error signal generation circuit 45 Low-side overvoltage detection circuit 45a, 45b Overvoltage comparison circuit 46 Low-side overvoltage switching circuit QH1, QH2, QH3 High-side power elements QL1, QL2, QL3 Low-side power elements ROV Overvoltage detection resistor RSCH1~RSCH3, RSCL1~RSCL3 Short-circuit detection resistors

Claims

1. A motor driver that supplies a drive signal for driving a power element to an inverter circuit including a plurality of power elements connected in series to a power supply voltage for a motor, comprising: for each of the power elements constituting the inverter circuit, a short-circuit detection element connected between main terminals of the power element; a short-circuit detection circuit that detects a short circuit when a voltage between the main terminals detected using the short-circuit detection element exceeds a preset short-circuit threshold voltage; a short-circuit switching circuit that reduces the voltage level of the drive signal when the power element is in an on state and a short circuit is detected by the short-circuit detection circuit. The motor driver is characterized by comprising these components.

2. a drive signal generation circuit that generates the drive signal based on a control signal input from a controller; an error signal generation circuit that outputs an error signal to the controller when the power element is in an on state and a short circuit is detected by the short-circuit detection circuit. The motor driver according to claim 1 is characterized by comprising these components.

3. an overvoltage detection circuit that detects an overvoltage of the power supply voltage for the motor; an overvoltage switching circuit that reduces the voltage level of the drive signal when the power element is in an on state, a short circuit is detected by the short-circuit detection circuit, and an overvoltage is detected by the overvoltage detection circuit. The motor driver according to claim 1 or 2 is characterized by comprising these components.

4. the overvoltage detection circuit detects a plurality of overvoltage levels; the overvoltage switching circuit reduces the voltage level of the drive signal for each overvoltage level. The motor driver according to claim 3 is characterized by this.

5. A semiconductor device, characterized in that the motor driver according to claim 1 is integrated on a substrate.

Citation Information

Patent Citations

  • Igbt short-circuit protection circuit

    JP1995250482A