Heat treatment apparatus
The heat treatment apparatus addresses damage from flash light by using an auxiliary light source with inorganic insulating substrates and hidden connections, ensuring reliable operation and emission stability.
Patent Information
- Application Number
- JP2024016160
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-06
- Publication Date
- 2025-08-19
AI Technical Summary
Existing flash lamp annealing apparatuses risk damaging semiconductor light-emitting elements due to direct or reflected flash light irradiation, causing wire breakage and resin burning, which leads to decreased light emission and element deterioration.
The apparatus incorporates an auxiliary light source with semiconductor light-emitting elements mounted on an inorganic insulating substrate, connected via bumps to electrodes on the opposite side, hidden from direct flash light exposure, and uses an inorganic insulating material like aluminum nitride for the substrate to prevent damage.
Prevents damage to the auxiliary light source by shielding the connection points from flash light, ensuring stable operation and maintaining light emission efficiency.
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Figure 2025121018000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a heat treatment apparatus that heats a semiconductor wafer by irradiating the semiconductor wafer with light, and more particularly to a flash lamp annealing apparatus that irradiates a semiconductor wafer with flash light. [Background technology]
[0002] Flash lamp annealing (FLA), which heats semiconductor wafers in an extremely short time, is attracting attention in the semiconductor device manufacturing process.Flash lamp annealing is a heat treatment technology that uses a xenon flash lamp (hereinafter, simply referred to as "flash lamp" means a xenon flash lamp) to irradiate the surface of a semiconductor wafer with flash light, thereby raising the temperature of only the surface of the semiconductor wafer in an extremely short time (a few milliseconds or less).
[0003] The spectral distribution of radiation from a xenon flash lamp is in the ultraviolet to near-infrared range, with a shorter wavelength than conventional halogen lamps and a wavelength that roughly matches the fundamental absorption band of silicon semiconductor wafers. Therefore, when a semiconductor wafer is irradiated with flash light from a xenon flash lamp, little light is transmitted, making it possible to rapidly heat the semiconductor wafer. It has also been found that if the flash light is irradiated for an extremely short period of time, less than a few milliseconds, it is possible to selectively heat only the area near the surface of the semiconductor wafer.
[0004] Flash lamp annealing is used in processes that require heating for an extremely short period of time, such as activating impurities implanted in a semiconductor wafer. By irradiating the surface of a semiconductor wafer into which impurities have been implanted by ion implantation with a flash light from a flash lamp, the surface of the semiconductor wafer can be heated to the activation temperature in an extremely short period of time, allowing only the impurities to be activated without diffusing them deeply.
[0005] A typical apparatus for performing such flash lamp annealing is a heat treatment apparatus having a flash lamp above a chamber that accommodates a semiconductor wafer and a halogen lamp below (Patent Document 1). In the apparatus disclosed in Patent Document 1, the semiconductor wafer is preheated by irradiating it with light from the halogen lamp, and then the surface of the semiconductor wafer is irradiated with flash light from the flash lamp. Preheating is performed using a halogen lamp because it is difficult for the surface of the semiconductor wafer to reach the target temperature using flash light alone.
[0006] However, halogen lamps mainly emit infrared light with a relatively long wavelength. The spectral absorptivity of silicon semiconductor wafers is low for infrared light with a long wavelength of 1 μm or more in the low temperature range below 500°C. In other words, semiconductor wafers below 500°C do not absorb much infrared light irradiated from halogen lamps, resulting in inefficient heating in the initial stage of preheating.
[0007] For this reason, Patent Document 2 proposes preheating semiconductor wafers with LED (Light Emitting Diode) lamps instead of halogen lamps. LED lamps that emit light with a wavelength of 1 μm or less can efficiently heat semiconductor wafers even at relatively low temperatures. [Prior art documents] [Patent documents]
[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-159713 [Patent Document 2] Japanese Patent Publication No. 2022-166682 Summary of the Invention [Problem to be solved by the invention]
[0009] As disclosed in Patent Document 2, a semiconductor light-emitting element such as an LED lamp is mounted on a substrate. Typically, a chip including the semiconductor light-emitting element is mounted on the substrate by wire bonding. Wire bonding is a method of connecting the chip to an electrode provided on the substrate with a wire such as gold.
[0010] However, when a substrate with a chip mounted by wire bonding is placed in a flash lamp annealing device, the substrate is irradiated with direct or reflected light emitted from the flash lamp during heat treatment, which could damage the wires and cause them to break, causing the semiconductor light-emitting element to stop emitting light.
[0011] Furthermore, the substrate on which the semiconductor light emitting element is mounted has been made of copper or other materials with good thermal conductivity in consideration of heat dissipation from the semiconductor light emitting element. Typically, an insulating layer of epoxy resin or the like is provided on the copper substrate, and a copper wiring pattern is formed on the insulating layer.
[0012] However, when such a substrate is irradiated with a flash light from a flash lamp, the resin insulating layer can become burnt, which can lead to deterioration of the semiconductor light emitting element and can also result in a decrease in the amount of light emitted by the semiconductor light emitting element due to the burnt part adhering to the semiconductor light emitting element.
[0013] The present invention has been made in view of the above-mentioned problems, and has an object to provide a heat treatment apparatus that can prevent damage to an auxiliary light source due to irradiation with flash light. [Means for solving the problem]
[0014] In order to solve the above problems, a first aspect of the present invention is a heat treatment apparatus that heats a semiconductor wafer by irradiating the semiconductor wafer with light, comprising: a chamber that accommodates a semiconductor wafer; a holding part that holds the semiconductor wafer within the chamber; an auxiliary light source that is provided on one side of the chamber and irradiates light onto the semiconductor wafer held in the holding part; and a flash lamp that is provided on the other side of the chamber and irradiates flash light onto the semiconductor wafer that has been preheated by the auxiliary light source, wherein the auxiliary light source comprises a chip and a substrate that includes a semiconductor light-emitting element, and an electrode provided on a second surface of the chip opposite a first surface that faces the flash lamp is connected to the substrate via a bump.
[0015] In addition, a second aspect is the heat treatment apparatus according to the first aspect, wherein the substrate is made of an inorganic insulating material.
[0016] A third aspect is the heat treatment apparatus according to the second aspect, wherein the substrate is made of one material selected from the group consisting of aluminum nitride, silicon carbide, quartz glass, and aluminum oxide.
[0017] In addition, a fourth aspect is the heat treatment apparatus according to the second or third aspect, wherein the chip is connected to a pattern of a conductive material provided on the substrate.
[0018] In addition, a fifth aspect is a heat treatment apparatus according to any one of the first to fourth aspects, wherein the semiconductor light-emitting element is one selected from the group consisting of a light-emitting diode, a laser diode, and a vertical-cavity surface-emitting laser.
[0019] In addition, a sixth aspect is a heat treatment apparatus that heats a semiconductor wafer by irradiating the semiconductor wafer with light, the heat treatment apparatus comprising: a chamber that accommodates a semiconductor wafer; a holding unit that holds the semiconductor wafer within the chamber; an auxiliary light source that is provided on one side of the chamber and irradiates light onto the semiconductor wafer held in the holding unit; and a flash lamp that is provided on the other side of the chamber and irradiates flash light onto the semiconductor wafer that has been preheated by the auxiliary light source, wherein the auxiliary light source comprises a chip including a semiconductor light-emitting element and an insulating substrate formed of an inorganic material.
[0020] In addition, a seventh aspect is the heat treatment apparatus according to the sixth aspect, wherein the insulating substrate is made of one material selected from the group consisting of aluminum nitride, silicon carbide, quartz glass, and aluminum oxide.
[0021] In addition, an eighth aspect is the heat treatment apparatus according to the sixth or seventh aspect, wherein the chip is connected to a pattern of a conductive material provided on the insulating substrate.
[0022] In addition, a ninth aspect is a heat treatment device according to any one of the sixth to eighth aspects, wherein the semiconductor light-emitting element is one selected from the group consisting of a light-emitting diode, a laser diode, and a vertical-cavity surface-emitting laser. [Effects of the Invention]
[0023] According to the heat treatment apparatuses of the first to fifth aspects, the electrodes provided on the second surface of the chip opposite the first surface facing the flash lamp are connected to the substrate via bumps, so that the bumps are hidden behind the chip relative to the flash lamp, thereby preventing damage to the auxiliary light source due to flash light irradiation.
[0024] In particular, according to the heat treatment apparatus of the second aspect, the substrate is formed of an inorganic insulating material, so that the substrate does not burn when irradiated with flash light, and damage to the auxiliary light source due to the irradiation with flash light can be prevented.
[0025] According to the heat treatment apparatuses of the sixth to ninth aspects, the auxiliary light source comprises a chip including a semiconductor light-emitting element and an insulating substrate formed of an inorganic material, so that the insulating substrate does not burn when flash light is applied, and damage to the auxiliary light source due to flash light application can be prevented. [Brief explanation of the drawings]
[0026] [Figure 1] 1 is a vertical cross-sectional view showing the configuration of a heat treatment apparatus according to the present invention. [Figure 2] FIG. 2 is a perspective view showing the overall appearance of the holding portion. [Figure 3] FIG. [Figure 4] FIG. 2 is a cross-sectional view of a susceptor. [Figure 5] FIG. [Figure 6] FIG. [Figure 7] FIG. 4 is a plan view of the inside of the auxiliary heating unit as viewed from above. [Figure 8] FIG. 2 is a plan view of a chip group. [Figure 9] FIG. 1 is a diagram showing a chip mounting method. DETAILED DESCRIPTION OF THE INVENTION
[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Hereinafter, expressions indicating relative or absolute positional relationships (e.g., "in one direction," "along one direction," "parallel," "orthogonal," "center," "concentric," "coaxial," etc.) not only strictly represent the positional relationship but also represent a state of relative angular or distance displacement within a tolerance or a range that provides equivalent functionality, unless otherwise specified. Furthermore, expressions indicating an equal state (e.g., "identical," "equal," "homogeneous," etc.) not only represent a state of strict quantitative equality but also represent a state of difference that provides a tolerance or equivalent functionality, unless otherwise specified. Furthermore, expressions indicating a shape (e.g., "circular," "square," "cylindrical," etc.) not only represent a geometrically strict shape but also represent a shape within a range that provides equivalent functionality, such as irregularities or chamfers, unless otherwise specified. Furthermore, expressions such as "comprise," "comprise," "include," "have," etc., regarding components, are not exclusive expressions that exclude the presence of other components. Furthermore, the expression "at least one of A, B, and C" includes "A only," "B only," "C only," "any two of A, B, and C," and "all of A, B, and C."
[0028] FIG. 1 is a vertical cross-sectional view showing the configuration of a heat treatment apparatus 1 according to the present invention. The heat treatment apparatus 1 in FIG. 1 is a flash lamp annealing apparatus that heats a disk-shaped silicon (Si) semiconductor wafer W by irradiating the semiconductor wafer W with flash light. The size of the semiconductor wafer W to be treated is not particularly limited, but may be, for example, φ300 mm or φ450 mm. Note that in FIG. 1 and the subsequent figures, the dimensions and number of various parts are exaggerated or simplified as necessary for ease of understanding.
[0029] The heat treatment apparatus 1 includes a chamber 6 that accommodates a semiconductor wafer W, a flash heating unit 5 that incorporates multiple flash lamps FL, and an auxiliary heating unit 4 that has multiple chips 45 mounted on a substrate 91. The flash heating unit 5 is provided above the chamber 6, and the auxiliary heating unit 4 is provided below it. The heat treatment apparatus 1 also includes, inside the chamber 6, a holder 7 that holds the semiconductor wafer W in a horizontal position, and a transfer mechanism 10 that transfers the semiconductor wafer W between the holder 7 and the outside of the apparatus. The heat treatment apparatus 1 also includes a control unit 3 that controls the operating mechanisms provided in the auxiliary heating unit 4, the flash heating unit 5, and the chamber 6 to perform heat treatment on the semiconductor wafer W.
[0030] The chamber 6 is constructed by attaching quartz chamber windows to the top and bottom of a cylindrical chamber side portion 61. The chamber side portion 61 has a roughly cylindrical shape with openings at the top and bottom, with an upper chamber window 63 attached to and closing the upper opening, and a lower chamber window 64 attached to and closing the lower opening. The upper chamber window 63, which forms the ceiling of the chamber 6, is a disc-shaped member made of quartz and functions as a quartz window that transmits flash light emitted from the flash heating unit 5 into the chamber 6. The lower chamber window 64, which forms the floor of the chamber 6, is also a disc-shaped member made of quartz and functions as a quartz window that transmits light from the auxiliary heating unit 4 into the chamber 6.
[0031] Furthermore, a reflective ring 68 is attached to the upper part of the inner wall surface of the chamber side 61, and a reflective ring 69 is attached to the lower part. Both reflective rings 68, 69 are formed in an annular shape. The upper reflective ring 68 is attached by fitting it from the upper side of the chamber side 61. On the other hand, the lower reflective ring 69 is attached by fitting it from the lower side of the chamber side 61 and fastening it with screws (not shown). In other words, both reflective rings 68, 69 are detachably attached to the chamber side 61. The internal space of the chamber 6, i.e., the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side 61, and the reflective rings 68, 69, is defined as a heat treatment space 65.
[0032] By attaching the reflecting rings 68, 69 to the chamber side portion 61, a recess 62 is formed on the inner wall surface of the chamber 6. That is, the recess 62 is formed by a central portion of the inner wall surface of the chamber side portion 61 where the reflecting rings 68, 69 are not attached, the lower end surface of the reflecting ring 68, and the upper end surface of the reflecting ring 69. The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6, and surrounds the holder 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflecting rings 68, 69 are made of a metal material (e.g., stainless steel) that has excellent strength and heat resistance.
[0033] Furthermore, a transfer opening (furnace port) 66 is formed in the chamber side portion 61, through which a semiconductor wafer W is loaded into and unloaded from the chamber 6. The transfer opening 66 can be opened and closed by a gate valve 185. The transfer opening 66 is connected to the outer peripheral surface of the recessed portion 62. Therefore, when the gate valve 185 opens the transfer opening 66, the semiconductor wafer W can be loaded into and unloaded from the heat treatment space 65 through the transfer opening 66 and the recessed portion 62. Furthermore, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes an airtight space.
[0034] Furthermore, a through-hole 61a is formed in the chamber side 61. A radiation thermometer 20 is attached to the portion of the outer wall surface of the chamber side 61 where the through-hole 61a is provided. The through-hole 61a is a cylindrical hole for guiding infrared light emitted from the underside of a semiconductor wafer W held on a susceptor 74 (described later) to the radiation thermometer 20. The through-hole 61a is provided at an angle with respect to the horizontal direction so that the axis of the through-hole 61a intersects with the main surface of the semiconductor wafer W held on the susceptor 74. Therefore, the radiation thermometer 20 is provided diagonally below the susceptor 74. A transparent window 21 made of barium fluoride material that transmits infrared light in a wavelength range that can be measured by the radiation thermometer 20 is attached to the end of the through-hole 61a facing the heat treatment space 65.
[0035] Gas supply holes 81 are formed in the upper part of the inner wall of the chamber 6 to supply processing gas to the heat treatment space 65. The gas supply holes 81 are formed at a position above the recess 62 and may be provided in the reflecting ring 68. The gas supply holes 81 are connected to a gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. A valve 84 is inserted in the gas supply pipe 83. When the valve 84 is opened, processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas that has flowed into the buffer space 82 spreads within the buffer space 82, which has lower fluid resistance than the gas supply holes 81, and is supplied from the gas supply holes 81 into the heat treatment space 65. The processing gas may be, for example, an inert gas such as nitrogen (N), a reactive gas such as hydrogen (H) or ammonia (NH), or a mixture thereof (nitrogen gas in this embodiment).
[0036] Meanwhile, a gas exhaust hole 86 is formed in the lower part of the inner wall of the chamber 6 to exhaust gas from the heat treatment space 65. The gas exhaust hole 86 is formed below the recess 62 and may be provided in the reflecting ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to an exhaust unit 190. A valve 89 is inserted in the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is exhausted from the gas exhaust hole 86 through the buffer space 87 to the gas exhaust pipe 88. The gas supply hole 81 and the gas exhaust hole 86 may be provided in multiple numbers along the circumferential direction of the chamber 6, or may be slit-shaped. The process gas supply source 85 and the exhaust unit 190 may be mechanisms provided in the heat treatment apparatus 1 or may be utilities of a factory where the heat treatment apparatus 1 is installed.
[0037] 2 is a perspective view showing the overall appearance of the holder 7. The holder 7 is configured to include a base ring 71, a connecting portion 72, and a susceptor 74. The base ring 71, the connecting portion 72, and the susceptor 74 are all made of quartz. In other words, the entire holder 7 is made of quartz.
[0038] The base ring 71 is an arc-shaped quartz member with a portion missing from the annular shape. This missing portion is provided to prevent interference between the base ring 71 and a transfer arm 11 of the transfer mechanism 10, which will be described later. The base ring 71 is placed on the bottom surface of the recess 62, and is supported by the wall surface of the chamber 6 (see FIG. 1). A plurality of connecting portions 72 (four in this embodiment) are erected on the upper surface of the base ring 71 along the circumferential direction of the annular shape. The connecting portions 72 are also quartz members, and are fixed to the base ring 71 by welding.
[0039] The susceptor 74 is supported by four connecting portions 72 provided on the base ring 71. FIG. 3 is a plan view of the susceptor 74. FIG. 4 is a cross-sectional view of the susceptor 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular, flat member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a planar size larger than that of the semiconductor wafer W.
[0040] A guide ring 76 is installed on the periphery of the upper surface of the holding plate 75. The guide ring 76 is an annular member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, if the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 has a tapered surface that widens upward from the holding plate 75. The guide ring 76 is made of quartz, the same as the holding plate 75. The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integrated member.
[0041] The area of the upper surface of the holding plate 75 that is inside the guide ring 76 is a flat holding surface 75a that holds the semiconductor wafer W. A plurality of substrate support pins 77 are provided on the holding surface 75a of the holding plate 75. In this embodiment, a total of 12 substrate support pins 77 are provided at 30° intervals along a circumference concentric with the outer circumferential circle of the holding surface 75a (the inner circumferential circle of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is 300 mm, the diameter is 270 mm to 280 mm (270 mm in this embodiment). Each substrate support pin 77 is made of quartz. The plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be machined integrally with the holding plate 75.
[0042] Returning to FIG. 2, four connecting portions 72 erected on the base ring 71 are fixed to the peripheral edge of the holding plate 75 of the susceptor 74 by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portions 72. The base ring 71 of the holding portion 7 is supported on the wall surface of the chamber 6, and the holding portion 7 is thereby attached to the chamber 6. When the holding portion 7 is attached to the chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal position (a position in which the normal line coincides with the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane.
[0043] The semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal position on the susceptor 74 of the holder 7 attached to the chamber 6. At this time, the semiconductor wafer W is supported by twelve substrate support pins 77 erected on a holding plate 75 and held on the susceptor 74. More precisely, the upper ends of the twelve substrate support pins 77 contact the underside of the semiconductor wafer W to support the semiconductor wafer W. The heights of the twelve substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) are uniform, so the twelve substrate support pins 77 can support the semiconductor wafer W in a horizontal position.
[0044] Furthermore, the semiconductor wafer W is supported by a plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the semiconductor wafer W supported by the plurality of substrate support pins 77 from shifting in the horizontal direction.
[0045] 2 and 3, an opening 78 is formed in the holding plate 75 of the susceptor 74, penetrating vertically. The opening 78 is provided so that a radiation thermometer 20 can receive radiation (infrared light) emitted from the underside of the semiconductor wafer W. That is, the radiation thermometer 20 receives the light emitted from the underside of the semiconductor wafer W through the opening 78 and a transparent window 21 attached to the through-hole 61 a of the chamber side 61, thereby measuring the temperature of the semiconductor wafer W. Furthermore, the holding plate 75 of the susceptor 74 is formed with four through-holes 79 through which lift pins 12 of a transfer mechanism 10 (described later) pass to transfer the semiconductor wafer W.
[0046] FIG. 5 is a plan view of the transfer mechanism 10. FIG. 6 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are arc-shaped so as to fit the generally annular recess 62. Two lift pins 12 are provided on each of the transfer arms 11. The transfer arms 11 and the lift pins 12 are made of quartz. Each transfer arm 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 horizontally moves the pair of transfer arms 11 between a transfer operation position (position indicated by a solid line in FIG. 5) where the transfer arms 11 transfer the semiconductor wafer W to the holder 7 and a retracted position (position indicated by a two-dot chain line in FIG. 5) where the transfer arms 11 do not overlap the semiconductor wafer W held by the holder 7 in a plan view. The horizontal movement mechanism 13 may be one that rotates each transfer arm 11 using an individual motor, or one that uses a link mechanism to rotate a pair of transfer arms 11 in conjunction with one another using a single motor.
[0047] Furthermore, the pair of transfer arms 11 are raised and lowered together with the horizontal movement mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lift pins 12 pass through through holes 79 (see FIGS. 2 and 3 ) formed in the susceptor 74, and the upper ends of the lift pins 12 protrude from the upper surface of the susceptor 74. On the other hand, when the lifting mechanism 14 lowers the pair of transfer arms 11 to the transfer operation position to remove the lift pins 12 from the through holes 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open, each transfer arm 11 moves to a retracted position. The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holder 7. Because the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arms 11 is inside the recess 62. In addition, an exhaust mechanism (not shown) is also provided near the location where the drive part of the transfer mechanism 10 (horizontal movement mechanism 13 and lifting mechanism 14) is located, and is configured to exhaust the atmosphere around the drive part of the transfer mechanism 10 to the outside of the chamber 6.
[0048] Returning to FIG. 1 , the flash heating unit 5, which is provided above the chamber 6, is configured with a light source made up of multiple (30 in this embodiment) xenon flash lamps FL inside a housing 51, and a reflector 52 provided to cover the light source from above. A lamp light emission window 53 is attached to the bottom of the housing 51 of the flash heating unit 5. The lamp light emission window 53, which forms the floor of the flash heating unit 5, is a plate-shaped quartz window made of quartz. By installing the flash heating unit 5 above the chamber 6, the lamp light emission window 53 faces the upper chamber window 63. The flash lamps FL irradiate a heat treatment space 65 with flash light from above the chamber 6 through the lamp light emission window 53 and the upper chamber window 63.
[0049] The flash lamps FL are each a rod-shaped lamp having a long cylindrical shape, and are arranged in a plane so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holder 7 (i.e., along the horizontal direction). Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane. The area in which the flash lamps FL are arranged is larger than the planar size of the semiconductor wafer W.
[0050] A xenon flash lamp FL comprises a cylindrical glass tube (discharge tube) filled with xenon gas and fitted with an anode and cathode connected to a capacitor at both ends, and a trigger electrode attached to the outer surface of the glass tube. Because xenon gas is an electrical insulator, electricity does not flow through the glass tube under normal conditions, even if a charge is stored in the capacitor. However, when a high voltage is applied to the trigger electrode, causing the insulation to break down, electricity stored in the capacitor flows instantaneously through the glass tube, exciting xenon atoms or molecules and emitting light. Such a xenon flash lamp FL converts electrostatic energy previously stored in the capacitor into extremely short light pulses of 0.1 to 100 milliseconds, enabling it to emit light that is significantly stronger than that of continuous-light sources such as halogen lamps. In other words, a flash lamp FL is a pulsed lamp that emits light instantaneously for an extremely short period of time, less than one second. The light emission time of the flash lamp FL can be adjusted by adjusting the coil constant of the lamp power supply that supplies power to the flash lamp FL.
[0051] Furthermore, reflector 52 is provided above the multiple flash lamps FL so as to cover them entirely. The basic function of reflector 52 is to reflect the flash light emitted from the multiple flash lamps FL toward the heat treatment space 65. Reflector 52 is made of an aluminum alloy plate, and its surface (the surface facing the flash lamps FL) is roughened by blasting.
[0052] The auxiliary heating unit 4 is provided on the opposite side of the chamber 6 from the flash heating unit 5, i.e., below the chamber 6. The auxiliary heating unit 4 includes a substrate 91 and a plurality of chips 45 inside a housing 41. In this embodiment, each of the plurality of chips 45 is a VCSEL (Vertical Cavity Surface Emitting Laser) as a semiconductor light-emitting element. The auxiliary heating unit 4 is an auxiliary light source that uses the plurality of chips 45 to irradiate light from below the chamber 6 through the lower chamber window 64 into the heat treatment space 65 to heat the semiconductor wafer W. For ease of understanding, the substrate 91 and the plurality of chips 45, which are essential parts of the auxiliary heating unit 4, are depicted in a simplified and exaggerated manner in FIG. 1.
[0053] FIG. 7 is a plan view of the inside of the auxiliary heating unit 4 as seen from above (from the chamber 6 side). A plurality of modules 94 are formed on the upper surface of a base 97. The base 97 is, for example, a disk-shaped member. The base 97 functions as a heat sink for dissipating heat generated from the plurality of light-emitting chips 45, and is made of a metal with high thermal conductivity (for example, copper). A flow path for circulating cooling water is formed inside the base 97, which is a plate-shaped member.
[0054] The top surface of the base 97, which is a single disk-shaped member, is divided into multiple areas, and modules 94 are provided in each area. As shown in FIG. 7, the planar shapes of the multiple modules 94 may be square, rectangular, multi-tiered, or the like. A combination of these modules 94 of various shapes generally covers the entire top surface of the circular base 97. Power is supplied to the auxiliary heating unit 4 from the power supply unit 49 (FIG. 1), and power control is performed for each module 94. In other words, the module 94 is the smallest control unit. For example, power control is performed such that a relatively large amount of power is supplied to the module 94 facing the peripheral portion of the semiconductor wafer W held by the holder 7, while a relatively small amount of power is supplied to the module 94 facing the center of the semiconductor wafer W.
[0055] Each module 94 is provided with a plurality of chip groups 92. Although the number of chip groups 92 mounted varies depending on the module 94, the chip groups 92 are arranged at a generally uniform density across the entire top surface of the base 97. Note that the plurality of chip groups 92 do not necessarily have to be arranged at a uniform density. For example, the arrangement density of the chip groups 92 below the peripheral portion of the semiconductor wafer W held by the holder 7 may be higher than the arrangement density below the central portion.
[0056] 8 is a plan view of a chip group 92. One chip group 92 is a group of 64 chips 45 arranged in, for example, 8 rows and 8 columns. The 64 chips 45 included in one chip group 92 are connected in series. Since one chip group 92 includes 64 chips 45, several hundred chips 45 are provided in one module 94, and several thousand chips 45 are provided in the entire auxiliary heating unit 4.
[0057] FIG. 9 is a diagram showing a mounting method for the chip 45. Each module 94 is provided with one substrate 91. The substrate 91 is provided on the upper surface of a base 97 common to a plurality of modules 94. The substrate 91 has a plate-like shape with a planar shape similar to that of the module 94 shown in FIG. 7. In this embodiment, the substrate 91 is an insulating substrate made of an inorganic insulating material. The substrate 91 is made of, for example, aluminum nitride (AlN), which is an inorganic insulating material. Among ceramics, aluminum nitride has high thermal conductivity and high electrical insulation properties.
[0058] A pattern 95 of a conductive material (for example, copper (Cu)) is formed on the upper surface of the substrate 91. The pattern 95 forms a circuit that supplies power to the chip 45 in each module 94. The pattern 95 is formed using, for example, a photolithography technique. Copper has the second highest electrical conductivity after silver, and is cheaper than gold or silver.
[0059] A gold (Au) plating layer 96 is formed on the upper side of the pattern 95. The gold plating prevents oxidation of the copper pattern 95 and also provides excellent solderability. Gold also has high electrical conductivity.
[0060] The chip 45 is connected to the pattern 95 via a gold plating layer 96. The chip 45 is a VCSEL (Vertical Cavity Surface Emitting Laser) serving as a single semiconductor light emitting element. The VCSEL is a type of semiconductor laser that emits light in a direction perpendicular to the surface of the semiconductor substrate. The VCSEL is capable of emitting light with a relatively high intensity and also emits light with high directionality.
[0061] In this embodiment, the chip 45 is mounted using a flip-chip mounting method. The flip-chip mounting method involves flipping the chip 45 upside down, with the connection surface of the chip 45 facing downward and connected to electrodes on the pattern via protruding terminals (bumps). While a typical implementation involves the connection surface of the chip facing upward and connecting electrodes on the upper surface to electrodes on the pattern via wires (wire bonding mounting), in this embodiment, the connection surface of the chip 45 faces downward, and electrodes 47 on the lower surface are connected to electrodes 43 on the pattern provided on the plating layer 96 via bumps 48. Therefore, the bumps 48, which are the connection sites between the chip 45 and the pattern 95, are located below the chip 45. The bumps 48 are made of, for example, gold. A protective film may be formed on the plating layer 96 where the chip 45 is not mounted.
[0062] When power is supplied to chip 45 from power supply unit 49 via pattern 95, light is emitted upward from VCSEL chip 45 as shown by arrow AR91. When light is emitted from multiple chips 45 provided in auxiliary heating unit 4, the light is irradiated onto the entire lower surface of semiconductor wafer W held by holder 7 in chamber 6.
[0063] The control unit 3 controls the various operating mechanisms provided in the heat treatment device 1. The hardware configuration of the control unit 3 is similar to that of a general computer. That is, the control unit 3 includes a CPU, which is a circuit that performs various arithmetic processing, a ROM, which is a read-only memory that stores basic programs, a RAM, which is a readable and writable memory that stores various information, and a storage unit (e.g., a magnetic disk or SSD) that stores control software, data, and the like. The CPU of the control unit 3 executes a predetermined processing program, causing the processing in the heat treatment device 1 to proceed.
[0064] In addition to the above configuration, the heat treatment apparatus 1 is equipped with various cooling structures to prevent excessive temperature rise in the auxiliary heating unit 4, flash heating unit 5, and chamber 6 due to thermal energy generated from the chips 45 and flash lamps FL during heat treatment of the semiconductor wafer W. For example, a water-cooled pipe (not shown) is provided in the wall of the chamber 6. The auxiliary heating unit 4 and flash heating unit 5 also have an air-cooled structure that creates a gas flow inside to remove heat. Air is also supplied to the gap between the upper chamber window 63 and the lamp light emission window 53 to cool the flash heating unit 5 and upper chamber window 63.
[0065] Next, the processing operations in the heat treatment apparatus 1 will be described. Here, a typical heat treatment operation for a normal semiconductor wafer (product wafer) W that will become a product will be described. Impurities are implanted into the semiconductor wafer W to be processed by ion implantation. The impurities are activated by an annealing process performed by the heat treatment apparatus 1. The processing procedure for the semiconductor wafer W, which will be described below, proceeds as the control unit 3 controls each operating mechanism of the heat treatment apparatus 1.
[0066] First, prior to processing of the semiconductor wafer W, the gas supply valve 84 is opened, and the exhaust valve 89 is also opened to start supplying and exhausting gas to and from the chamber 6. When the valve 84 is opened, nitrogen gas is supplied to the heat treatment space 65 through the gas supply hole 81. When the valve 89 is opened, the gas inside the chamber 6 is exhausted through the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper part of the heat treatment space 65 inside the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65.
[0067] Next, gate valve 185 is opened to open transfer opening 66, and a semiconductor wafer W to be processed is carried into heat treatment space 65 in chamber 6 through transfer opening 66 by a transfer robot outside the apparatus. At this time, there is a risk that the atmosphere outside the apparatus may be drawn in as the semiconductor wafer W is carried in, but since nitrogen gas is continuously supplied to chamber 6, the nitrogen gas flows out from transfer opening 66, making it possible to minimize the drawing in of such external atmosphere.
[0068] The semiconductor wafer W carried in by the transfer robot advances to a position directly above the holder 7 and stops there. Then, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally from the retracted position to the transfer operation position and rise, causing the lift pins 12 to pass through the through holes 79 and protrude from the upper surface of the holding plate 75 of the susceptor 74 to receive the semiconductor wafer W. At this time, the lift pins 12 rise to a position higher than the upper ends of the substrate support pins 77.
[0069] After the semiconductor wafer W is placed on the lift pins 12, the transfer robot exits the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, the pair of transfer arms 11 descend, transferring the semiconductor wafer W from the transfer mechanism 10 to the susceptor 74 of the holder 7, where it is held from below in a horizontal position. The semiconductor wafer W is supported by a plurality of substrate support pins 77 erected on a holding plate 75 and held on the susceptor 74. The semiconductor wafer W is held on the holder 7 with the surface into which impurities have been implanted facing upward. A predetermined gap is formed between the back surface (the main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11, which have descended to below the susceptor 74, are retracted to a retracted position, i.e., inside the recess 62, by the horizontal movement mechanism 13.
[0070] After the semiconductor wafer W is held from below in a horizontal position by the susceptor 74 of the holder 7, which is made of quartz, the auxiliary heating unit 4 irradiates the semiconductor wafer W with light, thereby commencing preheating (assisted heating). When power is supplied to the auxiliary heating unit 4 from the power supply unit 49, light is emitted from the multiple chips 45. The light emitted from the VCSEL chips 45 passes through the lower chamber window 64 and the susceptor 74, both of which are made of quartz, and is irradiated onto the entire lower surface of the semiconductor wafer W.
[0071] The VCSEL chip 45 that emits light also generates heat, but this heat is dissipated by being conducted from the substrate 91 to the cooled base 97. Because the substrate 91 is made of aluminum nitride, which has high thermal conductivity, the heat generated by the chip 45 is smoothly dissipated to the base 97, making it possible to prevent the chip 45 from excessively increasing in temperature.
[0072] The semiconductor wafer W is preheated by being irradiated with light from the multiple chips 45, and its temperature rises. The temperature of the semiconductor wafer W, which is raised by the light irradiation from the auxiliary heating unit 4, is measured by the radiation thermometer 20. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the chips 45 while monitoring whether the temperature of the semiconductor wafer W, which is raised by the light irradiation from the auxiliary heating unit 4, has reached a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the VCSEL chips 45 in units of modules 94 based on the measurement value from the radiation thermometer 20 so that the temperature of the semiconductor wafer W reaches the preheating temperature T1. The preheating temperature T1 is set to approximately 200°C to 800°C, preferably approximately 350°C to 600°C (600°C in this embodiment), at which there is no risk of impurities added to the semiconductor wafer W being diffused by heat.
[0073] After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the chip 45 in units of modules 94 to maintain the temperature of the semiconductor wafer W at approximately the preheating temperature T1.
[0074] When a predetermined time has elapsed since the temperature of the semiconductor wafer W reached the preheating temperature T1, the flash lamps FL of the flash heating unit 5 irradiate the surface of the semiconductor wafer W held on the susceptor 74 with flash light. At this time, part of the flash light emitted from the flash lamps FL heads directly into the chamber 6, and the other part is reflected by the reflector 52 before heading into the chamber 6, and the semiconductor wafer W is flash-heated by the irradiation of these flash lights.
[0075] Flash heating is performed by irradiating a flash of light (flash of light) from the flash lamps FL, which can raise the surface temperature of the semiconductor wafer W in a short time. Specifically, the flash of light irradiated from the flash lamps FL is an extremely short, intense flash of light with an irradiation time of approximately 0.1 to 100 milliseconds, in which electrostatic energy previously stored in a capacitor is converted into an extremely short light pulse. The surface temperature of the semiconductor wafer W, which is flash-heated by the flash of light irradiated from the flash lamps FL, instantaneously rises to a processing temperature T2 of 1000°C or higher. After the impurities implanted in the semiconductor wafer W are activated, the surface temperature rapidly drops. In this way, the heat treatment apparatus 1 can raise and lower the surface temperature of the semiconductor wafer W in an extremely short time, thereby activating the impurities implanted in the semiconductor wafer W while suppressing their thermal diffusion. Furthermore, because the time required for impurity activation is extremely short compared to the time required for thermal diffusion, activation can be completed even in a short time of approximately 0.1 to 100 milliseconds, which is short enough that diffusion does not occur.
[0076] After the flash heating process is completed, the light irradiation from the auxiliary heating unit 4 also stops after a predetermined time has elapsed. This causes the temperature of the semiconductor wafer W to rapidly decrease from the preheating temperature T1. The temperature of the semiconductor wafer W during this decrease is measured by the radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors, based on the measurement result from the radiation thermometer 20, whether the temperature of the semiconductor wafer W has decreased to a predetermined temperature. After the temperature of the semiconductor wafer W has decreased to or below the predetermined temperature, the pair of transfer arms 11 of the transfer mechanism 10 again move horizontally from the retracted position to the transfer operation position and rise, causing the lift pins 12 to protrude from the upper surface of the susceptor 74 and receive the heat-treated semiconductor wafer W from the susceptor 74. Next, the transfer opening 66, which had been closed by the gate valve 185, is opened, and the semiconductor wafer W placed on the lift pins 12 is removed from the chamber 6 by a transfer robot external to the apparatus, completing the heat treatment of the semiconductor wafer W.
[0077] The auxiliary heating unit 4 is disposed opposite the flash heating unit 5 across the chamber 6. Therefore, when the flash lamps FL emit light, direct light of the flash light or light reflected by the inner wall of the chamber 6 may reach the auxiliary heating unit 4 and irradiate the substrate 91. In particular, when the flash lamps FL emit light during maintenance, the flash light easily reaches the substrate 91 because no semiconductor wafer W is held on the susceptor 74.
[0078] In this embodiment, when mounting chip 45 on substrate 91, the connection surface of chip 45 faces downward, and electrodes 47 provided on the lower surface are connected to electrodes 43 on pattern 95 side by bumps 48. That is, a flip-chip mounting method is employed. Flash lamps FL are installed on the upper side of chamber 6, i.e., above auxiliary heating unit 4. Therefore, electrodes 47 provided on the lower surface (second surface) of chip 45 opposite the upper surface (first surface) facing flash lamps FL are connected to electrodes 43 on substrate 91 via bumps 48.
[0079] When chip 45 is mounted by wire bonding mounting as in the past, there is a risk that the wire will be exposed to the flash light emitted from the flash lamp FL and break. In this embodiment, if electrodes 47 provided on the second surface of chip 45 opposite the first surface facing the flash lamp FL are connected to electrodes 43 on substrate 91 via bumps 48, bumps 48 are hidden behind chip 45 from the flash lamp FL and are not exposed to the flash light (see FIG. 9 ). As a result, bumps 48, which are the connection points between chip 45 and substrate 91, are prevented from being damaged by the flash light, and damage to auxiliary heating unit 4 due to the flash light can be prevented.
[0080] In addition, in this embodiment, the substrate 91 is formed of aluminum nitride (AlN), an inorganic insulating material. Conventionally, substrates have been formed from copper or other materials with good thermal conductivity. However, because it is not possible to form copper patterns directly on such conductive substrates, patterns have been formed by sandwiching an insulating layer of epoxy resin or other material between the substrates. In such cases, the insulating layer may be exposed to the flash light during flash irradiation, resulting in scorching. Forming the substrate 91 from an inorganic insulating material, as in this embodiment, eliminates the need for an insulating layer, and even if the substrate 91 is exposed to the flash light during flash irradiation, the substrate 91 will not scorch. This prevents damage to the auxiliary heating unit 4 due to flash light irradiation.
[0081] Aluminum nitride, in particular, has high thermal conductivity among ceramics, and the heat generated in chip 45 is smoothly conducted from substrate 91 to base 97. In other words, aluminum nitride substrate 91 is not only resistant to flash light irradiation, but also serves as an excellent heat sink.
[0082] Although the embodiments of the present invention have been described above, various modifications other than those described above can be made to the present invention without departing from the spirit and scope of the present invention. For example, in the above embodiment, the chip 45 is mounted on the substrate 91 made of an inorganic insulating material by flip-chip mounting, but this is not limited to this, and the chip 45 may be mounted on the substrate 91 made of an inorganic insulating material by wire bonding mounting. Even in this case, if the substrate 91 is made of an inorganic insulating material, there is no need to provide an insulating layer, and it is possible to prevent the insulating layer from being burned by exposure to flash light.
[0083] Alternatively, the chip 45 may be mounted on the conductive substrate by flip-chip mounting, which also prevents the bumps 48 from being exposed to the flash light, thereby preventing disconnection due to flash light irradiation.
[0084] In the above embodiment, the substrate 91 is formed of aluminum nitride. However, this is not limiting and the substrate 91 may be formed of other inorganic insulating materials. For example, the substrate 91 may be formed of silicon carbide (SiC), quartz glass (SiO), or aluminum oxide (AlO). If the substrate 91 is formed of an inorganic insulating material selected from the group consisting of aluminum nitride, silicon carbide, quartz glass, and aluminum oxide, there is no need to provide an insulating layer, and scorching of the insulating layer due to flash light irradiation can be prevented. However, considering heat dissipation from the chip 45, it is preferable to form the substrate 91 from aluminum nitride, which has high thermal conductivity.
[0085] In the above embodiment, the semiconductor light-emitting element constituting the chip 45 is a VCSEL, but this is not limited thereto, and the chip 45 may be another semiconductor light-emitting element. For example, the chip 45 may be a light-emitting diode (LED) or a laser diode (LD) as a semiconductor light-emitting element. Regardless of the type of semiconductor light-emitting element, the chip 45 is mounted in the same manner as in the above embodiment.
[0086] Furthermore, multiple types of semiconductor light-emitting elements may be provided in one auxiliary heating unit 4. For example, a VCSEL and a laser diode may be provided in one auxiliary heating unit 4, and while the laser diode irradiates the entire surface of the semiconductor wafer W with light, the VCSEL irradiates the peripheral portion, where a drop in temperature is likely to occur, with highly directional light.
[0087] In the above embodiment, the flash heating unit 5 is provided with 30 flash lamps FL, but this is not limited to this and the number of flash lamps FL can be any number. In addition, the flash lamps FL are not limited to xenon flash lamps and may be krypton flash lamps. [Explanation of symbols]
[0088] 1. Heat treatment equipment 3. Control Unit 4 Auxiliary heating section 5 Flash heating section 6 chambers 7 Holding part 10 Transfer mechanism 20 Radiation thermometer 43,47 electrode 45 chips 48 Bump 65 Heat Treatment Space 74 Susceptor 91 Circuit Board 92 chips 94 modules 95 patterns 96 plating layer 97 Foundation FL flash lamp W Semiconductor wafer
Claims
1. A heat treatment apparatus for heating a semiconductor wafer by irradiating the semiconductor wafer with light, a chamber for containing a semiconductor wafer; a holder that holds the semiconductor wafer in the chamber; an auxiliary light source provided on one side of the chamber and configured to irradiate the semiconductor wafer held by the holder with light; a flash lamp provided on the other side of the chamber for irradiating the semiconductor wafer preheated by the auxiliary light source with a flash of light; Equipped with the auxiliary light source comprises a chip including a semiconductor light emitting element and a substrate; a heat treatment apparatus for connecting electrodes provided on a second surface of the chip opposite to a first surface facing the flash lamp to the substrate via bumps;
2. 2. The heat treatment apparatus according to claim 1, The substrate is made of an inorganic insulating material.
3. 3. The heat treatment apparatus according to claim 2, The substrate is made of a material selected from the group consisting of aluminum nitride, silicon carbide, quartz glass, and aluminum oxide.
4. 3. The heat treatment apparatus according to claim 2, A thermal processing apparatus in which the chip is connected to a pattern of conductive material provided on the substrate.
5. 5. The heat treatment apparatus according to claim 1, The semiconductor light emitting device is one selected from the group consisting of a light emitting diode, a laser diode, and a vertical cavity surface emitting laser.
6. A heat treatment apparatus for heating a semiconductor wafer by irradiating the semiconductor wafer with light, a chamber for containing a semiconductor wafer; a holder that holds the semiconductor wafer in the chamber; an auxiliary light source provided on one side of the chamber and configured to irradiate the semiconductor wafer held by the holder with light; a flash lamp provided on the other side of the chamber for irradiating the semiconductor wafer preheated by the auxiliary light source with a flash of light; Equipped with The auxiliary light source is a heat treatment apparatus including a chip including a semiconductor light emitting element and an insulating substrate formed of an inorganic material.
7. 7. The heat treatment apparatus according to claim 6, The heat treatment apparatus, wherein the insulating substrate is made of one material selected from the group consisting of aluminum nitride, silicon carbide, quartz glass, and aluminum oxide.
8. 7. The heat treatment apparatus according to claim 6, A heat treatment apparatus in which the chip is connected to a pattern of conductive material provided on the insulating substrate.
9. 9. The heat treatment apparatus according to claim 6, wherein The semiconductor light emitting device is one selected from the group consisting of a light emitting diode, a laser diode, and a vertical cavity surface emitting laser.
Citation Information
Patent Citations
Heat treatment method and apparatus
JP2011159713A
Heat treatment method
JP2022166682A