Manufacturing method for semiconductor device

Abstract

To provide a semiconductor device with excellent electric characteristics, a manufacturing method for the same, a module, and an electronic appliance.SOLUTION: A transistor 200 includes: an insulator 216 on an insulator 214; conductors 205a and 205b disposed so as to be embedded in the insulator; an insulator 222 on the insulator and the conductor 205; an insulator 224 thereon; an oxide 230a thereon; an oxide 230b thereon; oxides 243a and 243b thereon; conductors 242a and 242b on the respective oxides; an oxide 230c on the oxide 230b; an insulator 250 thereon; conductors 260a and 260b positioned on the insulator and overlapping with the oxide 230c; an insulator 272 in contact with a part of an upper surface of the insulator 224, side surfaces of the oxides 230a, 230b, 243a, and 243b and the conductors 242a and 242b, and upper surfaces of the conductors; an insulator 273 thereon; an insulator 280 thereon; and an insulator 282 thereon.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, and The sub-devices may be said to have semiconductor devices.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. A CPU is a semiconductor integrated circuit (at least transistors and It is a collection of semiconductor elements that have a memory and on which electrodes that serve as connection terminals are formed.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, e.g. It is mounted on a printed wiring board and used as one of the components in various electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. This technology is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (simply display It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used for this purpose. Oxide semiconductors are attracting attention.

[0007] Furthermore, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). ) In addition, for example, the low leakage current of a transistor using an oxide semiconductor The application of this technology has led to the disclosure of a storage device that can retain stored content for a long period of time. (See Patent Document 2).

[0008] In recent years, with the trend toward smaller and lighter electronic devices, there has been a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-151383 Summary of the Invention [Problem to be solved by the invention]

[0010] An object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another embodiment of the present invention provides a semiconductor device having normally-off electrical characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor having a large on-state current. Another object of one embodiment of the present invention is to provide a device having high frequency characteristics. Another object of the present invention is to provide a semiconductor device having a microstructure. Another object of the present invention is to provide a semiconductor device that can be made smaller or more highly integrated. An object of one embodiment of the present invention is to provide a semiconductor device with high productivity.

[0011] One embodiment of the present invention is to provide a semiconductor device that can retain data for a long period of time. One object of one embodiment of the present invention is to provide a semiconductor device with a high data writing speed. One object of one embodiment of the present invention is to provide a semiconductor device with high design freedom. One object of one embodiment of the present invention is to provide a semiconductor device capable of reducing power consumption. An object of one embodiment of the present invention is to provide a novel semiconductor device. This is one of the challenges.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0013] One aspect of the present invention is a semiconductor device comprising a first conductor, first and second insulators, and first and second oxides. In a method for manufacturing a semiconductor device having a first oxide, a first oxide is formed on a substrate, and a first oxide is formed on the substrate. A first insulator is formed on the oxide, and an opening is formed in the first insulator to reach the first oxide. a first oxide film in contact with the first oxide and the first insulator in the opening; A first insulating film is formed on the first oxide film by using the PEALD method. a first conductive film is formed on the first insulating film, a part of the first oxide film, and a part of the first insulating film; A portion of the conductive film is removed until the top surface of the first insulator is exposed, and a second oxide, a second insulator, and a second insulating film are formed. The substrate is heated to 300° C. or higher to form the first insulating film. introducing a first gas containing silicon into the chamber; and and introducing a second gas containing no hydrogen atoms into the chamber. A method for making a body device.

[0014] In the step of introducing the second gas, the first oxide, the first oxide film, and the first It is preferable to irradiate the insulating material with microwaves.

[0015] Another aspect of the present invention is a semiconductor device including a first conductor, first and second insulators, and a first and second insulating material. In a method for manufacturing a semiconductor device having a first oxide and a second oxide, A first insulator is formed on the first oxide, and a layer of the first insulator is formed on the first oxide. forming an opening through which a first oxide and a first insulator are contacted; A second oxide film is formed on the first oxide film by using a thermal ALD method. a first insulating film is formed, a first conductive film is formed on the first insulating film, and a part of the first oxide film is formed on the first conductive film; A part of the first insulating film and a part of the first conductive film are removed until the top surface of the first insulator is exposed. and removing the first insulating film to form a second oxide, a second insulator, and a first conductor. The film formation is performed while the substrate is heated to 350°C or higher, and a first gas containing silicon is introduced into the chamber. and a step of introducing a second solvent containing at least one of ozone and oxygen and not containing hydrogen atoms. and introducing the gas of the second type into the chamber.

[0016] In the above, before forming the first insulating film, the first oxide, the first oxide film, and It is preferable that the first insulator and the second insulator are irradiated with microwaves. Before forming the first insulating film, oxygen is added to the first oxide, the first oxide film, and the first insulator. It is preferable to perform the plasma treatment in an atmosphere containing

[0017] In the above, after the second oxide, the second insulator, and the first conductor are formed, Furthermore, a third oxide is formed on the first insulator, the second oxide, the second insulator, and the first conductor. forming an insulator film, and forming a silicon nitride film on the third insulator film by PEALD; In the above, it is preferable that the first oxide, Preferably, the second oxide and the first insulator are irradiated with microwaves. [Effects of the Invention]

[0018] According to one embodiment of the present invention, a semiconductor device with favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having a large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device can be provided. An apparatus can be provided.

[0019] Alternatively, a semiconductor device capable of retaining data for a long period of time can be provided. Alternatively, a semiconductor device with a high data writing speed can be provided. It is possible to provide a semiconductor device with high flexibility. A semiconductor device can be provided. Alternatively, a novel semiconductor device can be provided. .

[0020] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0021] [Figure 1] Fig. 1A is a top view of a semiconductor device according to one embodiment of the present invention, and Fig. 1B and Fig. 1C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view showing a model relating to a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 3]FIG. 3 is a cross-sectional view showing a model relating to a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 4] 4A and 4B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 5] 5A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 5B and 5C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 6A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 6B and 6C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 7A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 7B and 7C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 8A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 8B and 8C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 9A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 9B and 9C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 10A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 10B and 10C are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 11A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 11B and 11C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] 12A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 12B and 12C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13]13A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 13B and 13C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 14A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 14B and 14C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] 15A and 15B are a top view and a cross-sectional view illustrating a film formation apparatus according to one embodiment of the present invention. [Figure 16] 16A to 16C are cross-sectional views illustrating a film formation apparatus according to one embodiment of the present invention. [Figure 17] 17A and 17B are diagrams illustrating a film formation method according to one embodiment of the present invention. [Figure 18] FIG. 18 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 19] FIG. 19 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 20] 20A and 20B are block diagrams illustrating a configuration example of a memory device according to one embodiment of the present invention. [Figure 21] 21A to 21H are circuit diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Figure 22] 22A and 22B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 23] 23A and 23E are schematic diagrams of a memory device according to one embodiment of the present invention. [Figure 24] 24A to 24F are diagrams showing electronic devices according to one embodiment of the present invention. [Figure 25] 25A and 25B are graphs showing the carrier concentration of oxides of the examples. [Figure 26] 26A and 26B are graphs showing the hydrogen concentration of oxides in the examples. DETAILED DESCRIPTION OF THE INVENTION

[0022] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be practiced in various different ways without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

[0023] In the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in the drawings as a schematic illustration, and are not limited to the shapes or values shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this may not be reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals between different drawings. In addition, when referring to similar functions, In such cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0024] In addition, in particular, top views (also called "plan views") and perspective views are used to make the invention easier to understand. In order to avoid this, some components may be omitted. may be omitted.

[0025] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" The term "the" or "third" can be used interchangeably in the description. The ordinal numbers listed may not match the ordinal numbers used to identify an aspect of the present invention. There may be cases where this is the case.

[0026] In addition, in this specification, terms indicating arrangement such as "above" and "below" refer to the relationship between components. The positional relationship is used for convenience in describing the same with reference to the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, and can be rephrased appropriately depending on the situation.

[0027] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. It shall be.

[0028] Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, layer, etc.).

[0029] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0030] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the current is generated (channel formation region) (hereinafter referred to as the "effective channel width") The channel width shown in a top view of the transistor (hereinafter referred to as the apparent channel width) is For example, if the gate covers the side of the semiconductor, , the effective channel width becomes larger than the apparent channel width, and its influence cannot be ignored. For example, in a miniature transistor where the gate covers the side of the semiconductor, In some cases, the proportion of the channel formation region formed on the side of the semiconductor increases. , the effective channel width is larger than the apparent channel width.

[0031] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, the effective Channel width is difficult to measure accurately.

[0032] In this specification, when simply referring to the channel width, it refers to the apparent channel width. In this specification, when simply referred to as a channel width, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, The channel width and other parameters can be determined by analyzing cross-sectional TEM images. can.

[0033] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. The DOS (Density of States) of the semiconductor increases and the crystallinity decreases. When the semiconductor is an oxide semiconductor, the semiconductor properties may be The impurities to be changed include, for example, Group 1 elements, Group 2 elements, Group 13 elements, and Group 14 elements. These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, such as: Examples include hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. In the case of semiconductors, water may also function as an impurity. In some cases, oxygen vacancies may be formed due to the inclusion of impurities. In this case, impurities that change the properties of semiconductors include, for example, oxygen and Group 1 elements excluding hydrogen. , Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0034] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains a large amount of silicon dioxide rather than oxygen. It has a high nitrogen content.

[0035] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." The term "conductor" can also be replaced with "conductive film" or "conductive layer." The term "semiconductor" can also be replaced with "semiconductor film" or "semiconductor layer." can.

[0036] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes cases where the angle is between -5 degrees and 5 degrees. "Almost parallel" means that the two lines are arranged at an angle of between -30 degrees and 30 degrees. "Perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. " refers to a state in which two straight lines are arranged at an angle of between 60 degrees and 120 degrees.

[0037] In this specification, the term "barrier film" refers to a film that prevents impurities such as water and hydrogen from permeating, and oxygen. If the barrier film has conductivity, it is called a conductive barrier. It is sometimes called the membrane.

[0038] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, the metal Metal oxides are sometimes called oxide semiconductors. When a transistor is described as a transistor having an oxide or an oxide semiconductor, In other words:

[0039] In this specification, normally off means that no potential is applied to the gate, or The current per 1 μm of channel width that flows through a transistor when a ground potential is applied to the gate is 1×10 at room temperature -20 A or less, 1 x 10 at 85°C -18 A or below, or 1 x 10 at 125°C -16 This means that it is A or below.

[0040] (Embodiment 1) An example of a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described below. The method for producing the same will be described below.

[0041] <Configuration example of semiconductor device> 1A, 1B, and 1C illustrate a transistor 200 according to one embodiment of the present invention; 1A and 1B are a top view and a cross-sectional view of a transistor 200 and its surroundings.

[0042] FIG. 1A is a top view of a semiconductor device having a transistor 200. 1B and 1C are cross-sectional views of the semiconductor device. 1 is a cross-sectional view of a portion indicated by a dashed line in FIG. 1, and is a cross-sectional view of a transistor 200 in the channel length direction. FIG. 1C is a cross-sectional view of the area indicated by the dashed line A3-A4 in FIG. 1A. 1A is also a cross-sectional view of the transistor 200 in the channel width direction. Some elements have been omitted for clarity.

[0043] The semiconductor device according to one embodiment of the present invention includes an insulator 212 on a substrate (not shown) and a the insulator 214 on the transistor 200; an insulator 280, an insulator 282 on the insulator 280, and an insulator 283 on the insulator 282; The insulator 274 is on the insulator 283, and the insulator 281 is on the insulator 274. 212, insulator 214, insulator 280, insulator 282, insulator 283, insulator 274, and The insulator 281 functions as an interlayer film. and a conductor 240 (conductor 240a and conductor 240b) that functions as a plug. The insulator 241 (insulator 242) is in contact with the side surface of the conductor 240 that functions as a plug. 41a and insulator 241b). On the conductor 40, a conductor 246 (conductor 246a, and conductor 246b).

[0044] Also, the insulators 272, 273, 280, 282, 283, and An insulator 241a is provided in contact with the inner wall of the opening of the edge 274 and the insulator 281, A first conductor of the conductor 240a is provided in contact with the side surface, and a second conductor of the conductor 240a is provided further inward. A second conductor is provided. Also, an insulator 272, an insulator 273, an insulator 280, an insulator The insulating member 282, the insulating member 283, the insulating member 274, and the insulating member 281 are in contact with the inner wall of the opening. An edge member 241b is provided, and a first conductor of the conductor member 240b is provided in contact with the side surface of the edge member 241b. Further inside, a second conductor, conductor 240b, is provided. The height of the upper surface of the transistor 200 can be made to be approximately the same as the height of the upper surface of the insulator 281. In the configuration in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are stacked, However, the present invention is not limited to this. The structure may have a laminated structure of three or more layers. In such cases, ordinal numbers may be assigned to indicate the order of their formation to distinguish them.

[0045] [Transistor 200] As shown in FIG. 1, the transistor 200 includes an insulator 216 on an insulator 214 and an insulator The conductors 205 (conductor 205a and conductor 205b) are arranged to be embedded in the conductor 216. 05b) on the insulator 216 and on the conductor 205, and on the insulator 222 The insulator 224, the oxide 230a on the insulator 224, and the oxide 230a on the oxide 230a. 0b, oxide 243a on oxide 230b, and oxide 243b on oxide 243a Conductor 242a on oxide 243b, conductor 242b on oxide 230b, and oxide 230b on oxide 230b. 230c, an insulator 250 on the oxide 230c, and an oxide 23 0c and the conductor 260 (conductor 260a and conductor 260b) overlapping the insulator 224. a part of the upper surface of the oxide 230a, a side surface of the oxide 230b, a side surface of the oxide 243a, The side surface of the oxide 243b, the side surface of the conductor 242a, the top surface of the conductor 242a, and the conductor 242b an insulator 272 in contact with the side surface of the conductor 242b and the upper surface of the conductor 242b; 273. The oxide 230c has a side surface of the oxide 243a, an oxide 243b, and a The side surfaces of the conductors 242a and 242b are in contact with each other. 60 has a conductor 260a and a conductor 260b, and the bottom and side surfaces of the conductor 260b 1B, the conductor 260a is arranged to surround the The upper surface of the insulating material 250 is positioned approximately flush with the upper surface of the oxide 230c. In addition, the insulator 282 is made up of the conductor 260, the oxide 230c, the insulator 250, and the insulator 28. It touches the top face of each of the 0.

[0046] In addition, the insulators 212, 214, 222, 272, 273, and The insulator 282, the insulator 283, and the insulator 281 are hydrogen (e.g., hydrogen atoms, hydrogen molecules) It is preferable that the insulator 21 has a function of suppressing the diffusion of at least one of the above. 2, insulator 214, insulator 222, insulator 272, insulator 273, insulator 282, insulator 283, and the insulator 281 is made of at least one of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). For example, the insulators 212 and 214 have a function of suppressing the diffusion of the insulators 212 and 214. , insulator 222, insulator 272, insulator 273, insulator 282, insulator 283, and insulator The insulator 281 is more permeable to one or both of oxygen and hydrogen than the insulator 224. It is preferable that the insulator 212, the insulator 214, the insulator 222, the insulator 272, and the insulator The insulator 273, the insulator 282, the insulator 283, and the insulator 281 are insulators 250, respectively. Preferably, the insulator 212 has a lower permeability to either or both of oxygen and hydrogen than the insulator 212. Insulator 214, insulator 222, insulator 272, insulator 273, insulator 282, insulator 28 3, and insulator 281 are more likely to contain one or both of oxygen and hydrogen than insulator 280. It is preferable that the permeability of the film is low.

[0047] As shown in FIG. 1B, the insulator 272 is formed on the top and side surfaces of the conductor 242a and on the conductor 242b. the top surface and side surface of the oxide 243a, the side surface of the oxide 243b, the side surface of the oxide 230a, It is preferable that the oxide 230b contacts the side surface of the oxide 230b and the top surface of the insulator 224. It is preferable that an insulator 273 is provided on the body 272 in contact therewith. 272 and insulator 273, insulator 280 is insulated from insulator 224 and oxide 23 It is separated from 0.

[0048] The oxide 230 is formed by an oxide 230a on the insulator 224 and an oxide 230b on the oxide 230a. and a material 230b, disposed on the oxide 230b, at least a portion of which is on the top surface of the oxide 230b. and a contacting oxide 230c.

[0049] In the transistor 200, the oxide 23 is formed in the channel formation region and in the vicinity thereof. 2 shows a structure in which three layers of oxide 230a, oxide 230b, and oxide 230c are stacked. However, the present invention is not limited to this. For example, a single layer of oxide 230b, oxide 23 a two-layer structure of oxide 230b and oxide 230a, a two-layer structure of oxide 230b and oxide 230c, or For example, the oxide 230c may have a two-layer structure. In addition, in the transistor 200, a four-layer stack structure may be provided. Although 260 is shown as a two-layer laminated structure, the present invention is not limited to this. For example, the conductor 260 may have a single layer structure or a laminated structure of three or more layers. .

[0050] Here, conductor 260 functions as the gate of the transistor, and conductors 242a and The conductors 242b function as source and drain electrodes, respectively. The gate electrode 200 is formed by a conductor 260 that functions as a gate and an insulator 280. The conductor 260 is formed in a self-aligned manner so as to fill the opening. Therefore, without the alignment of the conductor 260, the area between the conductor 242a and the conductor 242b The conductor 260 can be securely placed.

[0051] The transistor 200 also includes an oxide 230 (oxide 230a) including a channel formation region. , oxide 230b, and oxide 230c), a metal oxide that functions as an oxide semiconductor (hereinafter, also referred to as an oxide semiconductor) is preferably used. The functional metal oxide has an energy gap of 2 eV or more, preferably 2.5 eV or more. It is preferable to use a metal oxide having a large energy gap. By using the transistor 200, the leakage current (off-state current) in the non-conducting state can be reduced significantly. By using such transistors, it is possible to reduce the power consumption of semiconductor devices. The device can be provided.

[0052] For example, the oxide 230 may be an In-M-Zn oxide (wherein the element M is aluminum, gallium, etc.). Smoke, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium One or more selected from aluminum, tantalum, tungsten, magnesium, etc. In particular, the element M may be an oxide of a metal such as aluminum, gallium, or yttrium. In addition, the oxide 230 may be an In-M oxide or an In-Z oxide. n-oxide or M-Zn-oxide may also be used.

[0053] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 230b. The oxide 230c is located on the oxide 230b. The oxide 230a is located under the oxide 230b. As a result, impurities from the structure formed below the oxide 230a are transferred to the oxide 230b. The diffusion can be suppressed. In addition, by having the oxide 230c on the oxide 230b, Diffusion of impurities from structures formed above oxide 230c into oxide 230b can be suppressed.

[0054] The oxide 230 has a layered structure made of oxides with different atomic ratios of each metal atom. Specifically, in the metal oxide used for the oxide 230a, the constituent elements are preferably The atomic ratio of element M in the oxide 230b is It is preferable that the atomic ratio of the metal oxide used for the oxide 230a is larger than that of the element M. In the oxide 230b, the atomic ratio of element M to In is It is preferable that the atomic ratio of element M to In is larger than that of element M. In the metal oxide used, the atomic ratio of In to the element M is It is preferable that the atomic ratio of In to the element M in the metal oxide is larger than that of In. Oxide 230c is a metal oxide that can be used for oxide 230a or oxide 230b. Things can be used.

[0055] Specifically, the oxide 230a is composed of In:Ga:Zn=1:3:4 [atomic ratio], Alternatively, a metal oxide having an atomic ratio of 1:1:0.5 may be used. In:Ga:Zn=4:2:3 [atomic ratio] or 1:1:1 [atomic ratio] The oxide 230c may be a metal oxide of In:Ga:Zn=1:3:4. [atomic ratio], Ga:Zn=2:1 [atomic ratio], or Ga:Zn=2:5 [atomic ratio] In addition, a specific example of the oxide 230c having a laminated structure is as follows: The atomic ratios are In:Ga:Zn=4:2:3 and In:Ga:Zn=1:3:4. [Atomic ratio] Ga:Zn=2:1 [Atomic ratio] and In:Ga:Zn=4 :2:3 [atomic ratio], Ga:Zn=2:5 [atomic ratio], and In:Ga: Zn=4:2:3 [atomic ratio], gallium oxide and In:Ga:Zn=4: Examples include a layered structure with an atomic ratio of 2:3.

[0056] In addition, the oxide 230b preferably has crystallinity. -OS(c-axis aligned crystalline oxide sem It is preferable to use a crystalline silicon such as CAAC-OS. Oxides have few impurities and defects (such as oxygen vacancies), and have a highly crystalline, dense structure. Therefore, the source electrode or the drain electrode draws oxygen from the oxide 230b. This prevents the oxide 230b from being oxidized by the heat treatment. Since the transistor 200 can be manufactured at high temperatures, the It is stable against temperature (so-called thermal budget).

[0057] The energy of the conduction band minimum of the oxide 230a and the oxide 230c is It is preferable that the energy of the conduction band minimum of 0b is higher than that of the oxide. The electron affinity of the oxide 230a and the oxide 230c is smaller than the electron affinity of the oxide 230b. It is preferable that

[0058] Here, the electron affinity or the energy level at the bottom of the conduction band, Ec, is the difference between the vacuum level and the valence band. The ionization potential Ip, which is the difference between the edge energy Ev and the energy gap Eg The ionization potential Ip can be calculated, for example, by ultraviolet photoelectron spectroscopy. (UPS:Ultraviolet Photoelectron Spectrosc The energy gap Eg can be measured using, for example, a spectroscopic It can be measured using an ellipsometer.

[0059] In addition, at the junctions of the oxide 230a, the oxide 230b, and the oxide 230c, The energy level of the lower conduction band edge changes gradually. The energy level of the conduction band minimum at the junction of 230b and oxide 230c is continuous. In order to achieve this, the oxide 2 At the interface between oxide 230a and oxide 230b, and at the interface between oxide 230b and oxide 230c This is advantageous in that the defect level density of the mixed layer formed by this method is reduced.

[0060] The main path of the carriers is the oxide 230b. By configuring the oxide 230a and the oxide 230b as described above, the interface between the oxide 230a and the oxide 230b and the oxide The defect state density at the interface between the silicon dioxide 230b and the oxide 230c can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 200 has a high It is possible to obtain high current and high frequency characteristics.

[0061] In a transistor using an oxide semiconductor, the donor concentration in the channel formation region in the oxide semiconductor is When the gate voltage is increased, the carrier concentration becomes extremely large with increasing gate voltage, and the The donors in the oxide semiconductor are mainly oxygen atoms in the oxide semiconductor. Deficiency (V O It is formed by the capture of hydrogen in oxygen vacancies. In the following, hydrogen trapped in oxygen vacancies is referred to as V O It may be called H.

[0062] In addition, V, which is a physical quantity related to the donor concentration in an oxide semiconductor, O Quantitative evaluation of H Therefore, oxide semiconductors are evaluated based on the carrier concentration rather than the donor concentration. Therefore, in this specification and the like, the donor concentration is used as a parameter of the oxide semiconductor. In some cases, the carrier concentration is used assuming that no electric field is applied, rather than the electric field strength. Therefore, the "carrier concentration" described in this specification can be rephrased as "donor concentration." There are cases where this happens.

[0063] Furthermore, hydrogen in the oxide semiconductor reacts with oxygen that bonds with metal atoms to form water, and oxygen This may cause oxygen vacancies in the oxide semiconductor to increase, which may lead to Along with V O In addition, hydrogen in oxide semiconductors is easily affected by stresses such as heat and electric fields. When oxide semiconductors contain a lot of hydrogen, they tend to move easily under stress. There is also a risk that the reliability of the system may deteriorate.

[0064] In this way, the hydrogen concentration (H concentration) in the oxide semiconductor increases. When this occurs, the transistor tends to have normally-on characteristics, resulting in good electrical characteristics and reliability. Therefore, it becomes impossible to configure a semiconductor device having such a structure.

[0065] Also, as shown in FIG. 1, in the transistor 200, an insulator 2 is formed on the oxide 230. Here, the insulator 250 is an insulator containing silicon, such as silicon oxide. When forming such an insulator 250, it is preferable to use a hydrogen atom such as SiH4. Silicon dioxide is often used as the source gas. This generates a large amount of highly reactive hydrogen (e.g., hydrogen radicals), which then forms oxides23 0 to V O In addition, a large amount of hydrogen may be absorbed into the deposited insulator 250. In rare cases, the hydrogen diffuses into the oxide 230 due to heat treatment or the like during the manufacturing process of the transistor 200. In this way, the water in the oxide semiconductor may be generated during the film formation process of the gate insulating film. The concentration of elements may be high.

[0066] In contrast, the transistor 200 described in this embodiment is grown by atomic layer deposition (ALD). The gate insulating film (insulator 250) is formed using the GaN (GaN Thin Film Deposition) method. This reduces the hydrogen concentration in a channel formation region of the oxide semiconductor.

[0067] In the ALD method, a first source gas for the reaction (hereinafter referred to as a precursor, a metal The reactant gas is then reacted with the first raw material gas (which can be called a precursor). The reactants (also called non-metallic precursors) are introduced alternately into the chamber. The film is formed by repeatedly introducing the source gas. By forming a film, atoms can be deposited one layer at a time, taking advantage of the self-regulating properties of atoms. Therefore, by forming films using the ALD method, it is possible to form ultra-thin films and structures with high aspect ratios. deposition of thin films with few defects such as pinholes, deposition of thin films with excellent coating properties, and deposition at low temperatures , etc. can be done.

[0068] The ALD method uses energy such as heat to react precursors and reactants. Among the ALD methods, the reaction of plasma-excited reactants is PEALD (Plasma Enhanced Laser Deposition) is a process that involves introducing the material into a chamber. In contrast to the PEALD method, the precursor and reactor The ALD method, in which the reaction of materials is carried out using only thermal energy, is sometimes called the thermal ALD method.

[0069] 2 and 3, a silicon-containing film is formed on the oxide 230 by the ALD method. By forming an insulator 250 made of an oxide, the channel formation region of the oxide semiconductor The mechanism for reducing the hydrogen concentration will be described.

[0070] First, as shown in FIG. 2, a precursor 10 is introduced into a chamber as a first source gas. The introduced precursor 10 reacts with one of the amino groups and the OH group on the surface of the oxide 230. The precursor 10 is adsorbed on the surface of the oxide 230. Then, a self-limiting mechanism of the surface chemical reaction occurs, and the layer of precursor 10 on the surface of oxide 230 is formed. No further precursor 10 is adsorbed onto it.

[0071] In addition, the by-product (HNR 3 R 4 ) is a hydrogen atom However, in the precursor 10 introduction step, the reaction is driven by thermal energy. Therefore, the by-products are not decomposed into highly reactive hydrogen radicals. During the introduction process of the precursor 10, a large amount of hydrogen radicals is generated in the chamber. do not have.

[0072] In addition, R constituting precursor 10 1 , R 2 , R3 , and R 4 represents a functional group, e.g. For example, hydrogen or a hydrocarbon group such as an alkyl group may be used. 1 , R 2 , R 3 , and R 4 may have different structures, or two or more may have the same structure. The precursor 10 shown in FIG. 2 is an aminosilanized compound in which Si is bonded to two N atoms. In the precursor 10, the compound bonded to Si is, but not limited to, N may be 1 or 3 or more. For example, the precursor 10 may be 2DEAS( Bis(diethylamino)silane), BEMAS(Bis(ethyl) methylamino)silane), BTBAS(Bis(tert-butyl amino)silane), 3DMAS(Tris(dimethylamino)s ilane), 4DMAS(Tetrakis(dimethylamino)sila ne) may be used. The precursor 10 is not limited to an aminosilane compound. Rather than the above, silicon-containing materials should be used within the range where a self-limiting surface chemical reaction is possible. A compound containing the compound may be appropriately selected.

[0073] During ALD deposition, the temperature of the substrate on which the transistor 200 is formed is controlled by the self-heating of the surface chemical reaction. The substrate temperature must be within the appropriate range (also called the ALD window) in which the stop mechanism operates. The ALD window is determined by the temperature characteristics, vapor pressure, decomposition temperature, etc. of the precursor. The temperature is determined by the temperature difference, but is set to 100°C or higher and 500°C or lower, preferably 200°C or higher and 400°C or lower.

[0074] In addition, when introducing the raw material gas, an inert gas such as nitrogen (N2) or argon (Ar) is used as a carrier gas. The carrier gas may be introduced into the chamber together with the source gas. Even if the source gas has low volatility or low vapor pressure, the source gas may leak into the inside of the piping or This prevents the material gas from being adsorbed inside the lubricant, making it possible to introduce the material gas into the chamber. Furthermore, the uniformity of the formed film can be improved. The gas may be continuously introduced during the ALD film formation, rather than being introduced only during the gas introduction.

[0075] Next, the excess precursor 10 and by-products in the chamber are discharged from the chamber. Purging can be performed while introducing carrier gas, or by simply introducing the carrier gas. Vacuum evacuation may be performed without introducing gas.

[0076] Next, as shown in FIG. 2, a reactant 20 is introduced into the chamber as a second source gas. The introduced reactant 20 acts as an oxidizing agent, so that the surface of the oxide 230 At this time, the reactant 20 is oxidized by the Si-H bond or It breaks Si-N bonds but not Si-O bonds. Here, CO is produced as a by-product. 2, H2O, NO x etc. are generated.

[0077] As shown in FIG. 2, the reactant 20 is not only silicon on the surface of the oxide 230. In addition, oxide 230 is also oxidized, and V O This may cause the desorption of H. Oxygen deficiency in V O The hydrogen concentration in the oxide 230 can be reduced by adding oxygen. In addition, the reactant 20 creates an oxidizing atmosphere inside the chamber, so the The hydrogen released from the compound 230 is released as a by-product, H2O. reactant 20, oxygen radical O * Although reactant 20 is shown, However, the present invention is not limited to these.

[0078] When forming an insulator 250 using the PEALD method, oxygen radicals are used as reactants 20. Oxygen radicals can be obtained by turning oxygen gas (O2) into plasma. In oxygen plasma, oxygen exists in the form of molecules (e.g., O2 or O3), radicals, or For example, oxygen gas contains RF (Radio Frequency) By applying high frequency waves such as ency or microwaves, oxygen plasma containing oxygen radicals is generated. It is possible to generate a

[0079] The second source gas containing the reactant 20 contains hydrogen atoms or molecules having hydrogen atoms. It is preferable that hydrogen atoms or molecules having hydrogen atoms are not included in the plasma. When exposed to this, a large amount of highly reactive hydrogen radicals are generated, creating a reducing atmosphere inside the chamber. When the chamber becomes a reducing atmosphere, oxygen in the oxide 230 is extracted and V O Therefore, the reactant 20 containing oxygen radicals is generated in the chamber. It is preferable that the atmosphere is an oxidizing atmosphere.

[0080] When forming the insulator 250 by the PEALD method, the reactant 20 has high reactivity, The substrate temperature is set to 200°C or higher, preferably 300°C or higher, more preferably 350°C or higher. By doing so, the carrier concentration in the oxide 230 can be reduced. By forming the insulator 250 at high temperature, the increase in the hydrogen concentration contained in the oxide 230 is suppressed. It is possible.

[0081] Alternatively, high frequency waves such as RF or microwaves may be irradiated onto the oxide 230. As shown in Figure 2, V in oxide 230 O H can be eliminated from H. Since the chamber is in an oxidizing atmosphere, the reactant 20 causes oxygen vacancies in the oxide 230. V O can be compensated for.

[0082] In addition, when the insulator 250 is formed by the thermal ALD method, ozone is used as the reactant 20. Ozone gas (O3) is produced from oxygen gas (O2). The ozone gas can be generated by an ozone generator. It may contain oxygen gas (O2) and oxygen (O3). The second source gas containing the actant 20 contains hydrogen atoms or molecules having hydrogen atoms. It is preferable not to be caught.

[0083] When forming an insulator 250 using the thermal ALD method, the reactance is lower than that of the PEALD method. Since the reactivity of PO 20 is low, the substrate temperature should be set to 300°C or higher, preferably 350°C or higher. By doing so, the carrier concentration in the oxide 230 can be reduced. By forming the insulator 250 at a temperature of 1000 K, the increase in the hydrogen concentration contained in the oxide 230 is suppressed. It is possible.

[0084] Next, purging is performed to remove excess reactant 20, CO2, H2 O, NO x By-products such as benzene and toluene are discharged from the chamber. Alternatively, the vacuum evacuation may be performed without introducing a carrier gas. As a result, a monolayer of silicon oxide is formed on the surface of oxide 230, as shown in FIG. can.

[0085] In the same manner, precursor 10 and reactant 20 are introduced with purging in between. By performing the implantation, a single layer of silicon oxide can be further deposited. As shown in the figure, the precursor 10 and reactant 20 are introduced with purging in between. By repeating the cycle, monolayers of silicon oxide can be deposited one by one. This cycle is repeated multiple times until the film reaches the desired thickness, as shown in Figure 2. An insulator 250 may be formed on the oxide 230 .

[0086] The thickness of the insulator 250 that functions as a gate insulating film of the miniaturized transistor 200 is extremely thin (for example, between 5 nm and 30 nm) and has small variations. On the other hand, the thickness of the insulator 250 needs to be adjusted by repeating the above cycle. Since it can be adjusted by the number of times, precise film thickness adjustment is possible. The precision of the gate insulating film required for the transistor 200 can be achieved. As shown in FIG. 1, the insulator 250 is formed on the bottom surface of the opening formed by the insulator 280 and the like. The film must be formed with good coverage on the bottom and side surfaces of the opening. As shown in Figure 2, single layers of silicon oxide can be deposited one by one, providing insulation The body 250 can be deposited with good coverage over the opening.

[0087] For example, the PECVD (Plasma Enhanced CVD) method is used to form an insulator 2 When forming a film of 50, silicon hydride such as SiH4 is decomposed in the plasma, and a large amount of Hydrogen radicals are generated. The reduction reaction of the hydrogen radicals removes the oxygen in the oxide 230. Cut out V O The formation of H increases the hydrogen concentration in the oxide 230. As shown in this embodiment, when the insulator 250 is formed by the ALD method, the precursor When reactant 10 is introduced or when reactant 20 is introduced, almost no hydrogen radicals are generated. By forming a gate insulating film using the ALD method, the hydrogen concentration in the oxide semiconductor This makes it possible to suppress the carrier concentration in the oxide semiconductor from increasing to 1. .0×10 16 / cm 3 Less than or equal to 1.0 × 10 13 / cm 3 Can be less than Such a transistor using an oxide semiconductor can be made to have normally-off characteristics. This makes it possible to configure a semiconductor device having good electrical characteristics and reliability.

[0088] Also, before the introduction of the precursor 10, as shown in FIG. 3, electromagnetic waves 30 are applied to the oxide 230. Here, the electromagnetic wave 30 may be a microwave or a high frequency wave such as RF. The irradiated electromagnetic wave 30 penetrates into the oxide 230, and the V in the oxide 230 O H is split off, hydrogen H is removed from the oxide 230, and oxygen vacancy V O remains in oxide 230 In other words, in the oxide 230, V OH→H↑+V O The reaction occurs, and oxidation The hydrogen concentration in the product 230 is reduced. may combine with hydrogen to form HO and be removed from the oxide 230. may be captured (also called gettering) by the conductor 242.

[0089] Next, as shown in FIG. 3, the precursor 10 is introduced in the same manner as above, and then the precursor 10 is introduced. Conduct a page.

[0090] Next, as shown in FIG. 3, the reactant 20 is introduced in the same manner as above. Reactants 20 (e.g., oxygen radicals) convert oxygen vacancies V in oxide 230. O Compensation Therefore, the hydrogen concentration in the oxide 230 can be reduced by the method shown in FIG. And, V O It is also possible to reduce oxygen vacancies that are the source of H formation.

[0091] In addition, when the reactant 20 is introduced using the PEALD method, oxygen gas (O2) or is a high frequency wave such as microwave or RF that is applied to turn ozone gas (O3) into plasma. The oxide 230 may be irradiated with electromagnetic waves, which may result in a similar effect to the irradiation of the electromagnetic waves 30 shown in FIG. Therefore, when introducing reactant 20, V O H can be removed In addition, in the step of introducing the reactant 20 shown in FIG. The oxide 230 may be irradiated with 30 (microwave or high frequency such as RF).

[0092] Thereafter, an insulator 250 is formed on the oxide 230 in the same manner as shown in FIG. can be done.

[0093] In this way, V, which functions as a donor in the oxide semiconductor, O H can be reduced Therefore, the carrier concentration in the oxide semiconductor can be reduced to 1.0×10 16 / cm 3 Below, preferably 1.0×10 13 / cm 3 Such oxide semiconductors can be used to The transistor can be made normally off and has good electrical characteristics and reliability. It is possible to configure a semiconductor device that

[0094] In FIG. 3, oxygen vacancy V O The removal of However, the present embodiment is not limited to this. When irradiating the electromagnetic wave 30 shown in FIG. The oxygen gas may be converted into plasma by the electromagnetic wave 30 to form oxygen radicals. Simultaneously with the irradiation of the electromagnetic waves 30, a plasma treatment may be carried out in an atmosphere containing oxygen. Oxygen vacancies V in oxide 230 formed by irradiation of electromagnetic waves 30 by oxygen radicals O of This allows the oxide 230 to be filled with the ions while the electromagnetic wave 30 is being irradiated. V O H, and oxygen-deficient V O can be reduced.

[0095] Oxygen plasma can be produced using a power source that generates high density plasma using microwaves, for example. Alternatively, a power source for applying RF may be provided on the substrate side. By using high density plasma, high density oxygen radicals can be generated, and the substrate By applying RF to the side, oxygen radicals generated by high-density plasma can be efficiently It can be introduced into the oxide 230.

[0096] In the steps shown in FIGS. 2 and 3, the introduction of the precursor 10 is replaced by the introduction of the reactant 20. However, the present embodiment is not limited to this. For example, in FIG. The reactant 20 may be introduced before the precursor 10 shown in FIG. 3. Also, for example, before the introduction of the precursor 10, the reactant 20 may be introduced and purged several times. By using such a configuration, the insulating layer 250 and the insulating layer 260 can be formed by repeating the process several times. The oxide 230 can be supplied with more oxygen. The conductor device has good characteristics and can achieve high reliability.

[0097] In the steps shown in FIGS. 2 and 3, the precursor 10 is introduced and the reactant 20 is introduced. However, the present embodiment is not limited to this. For example, in the cycle shown in FIGS. 2 and 3, the reactant 20 is introduced and purged multiple times. Alternatively, the introduction and purging of the reactant 20 may be repeated several times. In this case, it is not necessary to repeatedly introduce the same type of reactant 20.

[0098] In this way, the introduction and purging of the reactant 20 into the chamber are repeated multiple times in a short period of time. By repeating this process, excess hydrogen and carbon atoms are released from the precursor adsorbed on the oxide 230 surface. This allows chlorine atoms and other contaminants to be removed more reliably and expelled from the chamber. To prevent hydrogen atoms from being incorporated into the oxide 230 and the insulator 250 during film formation, By doing so, the hydrogen concentration in the oxide 230 can be reduced.

[0099] Also, as shown in FIG. 1B, oxide 230b and a source electrode or a drain electrode The oxide 243 is formed between the functional conductors 242 (conductors 242a and 242b). The conductor 242 and the oxide 243a and oxide 243b may be disposed. Since the conductor 242 does not come into contact with the oxide 230, the conductor 242 does not absorb the oxygen of the oxide 230. In other words, by preventing the oxidation of the conductor 242, the conductivity of the conductor 242 can be reduced. Therefore, the oxide 243 can suppress the oxidation of the conductor 242. It is preferable that the function be

[0100] Therefore, it is preferable that the oxide 243 has a function of suppressing oxygen permeation. The oxide 230b is formed between the conductor 242, which functions as an electrode or a drain electrode, and the oxide 230b. By disposing the oxide 243 having the function of suppressing the conductor 242 and the oxide 230b This is preferable because the electrical resistance between the transistor and the The electrical characteristics and reliability of the transistor 200 can be improved.

[0101] The oxide 243 may be a metal oxide containing the element M. In particular, the element M may be an aluminum oxide. Aluminum, gallium, yttrium, or tin can be used. It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or more. The thickness is preferably at most 5 nm, and more preferably at least 1 nm and at most 3 nm. It is preferable that the oxide 243 has crystallinity. When the oxide 243 has crystallinity, the oxide 23 The release of oxygen from the oxide 243 can be suitably suppressed. If the oxide 230 has a crystalline structure such as a crystalline crystal, the release of oxygen from the oxide 230 may be suppressed.

[0102] The oxide 243 is not necessarily provided. For example, the oxide 230b may be provided with the conductor 2 Even if the conductor 242 is in contact with the oxide 242, if the oxidation of the conductor 242 is suppressed and the conductivity is sufficiently high, the oxide 242 43 is not provided, and the conductors 242a and 242b are provided on the oxide 230b in contact with the oxide 230b. Good too.

[0103] As shown in FIGS. 1B and 1C, a transistor 200 according to an embodiment of the present invention includes an insulator 2 82 and the insulator 250 are in direct contact with each other. Therefore, the oxygen contained in the insulator 280 is less likely to be absorbed by the conductor 260. The oxygen contained in 80 is transferred to oxide 230a and oxide 230b via oxide 230c. Since the oxygen in the oxide 230a and the oxide 230b can be efficiently supplied to the The defects can be reduced, and the electrical characteristics and reliability of the transistor 200 can be improved. In addition, impurities such as hydrogen contained in the insulator 280 are prevented from being mixed into the insulator 250. Therefore, adverse effects on the electrical characteristics and reliability of the transistor 200 can be suppressed. The insulator 282 can be silicon nitride, silicon nitride oxide, aluminum oxide, or the like. Alternatively, hafnium oxide or hafnium oxide can be used.

[0104] The insulators 272 and 273 suppress the permeation of impurities such as hydrogen and water, and oxygen. It is preferable that the function be

[0105] FIG. 4A is an enlarged cross-sectional view of the area indicated by the dashed line A5-A6 in FIG. 1A. 1 is a cross-sectional view of the source or drain region of the transistor 200 in the channel width direction. As shown in 4A, the upper surface of the conductor 242b, the side surface of the conductor 242b, and the side of the oxide 243b The surface, the side of oxide 230a, and the side of oxide 230b are insulated by insulator 272 and insulating Since the conductor 242b is covered with the body 273, the side and top of the conductor 242b are The diffusion of impurities such as hydrogen and water and oxygen from the surface direction to the conductor 242b can be suppressed. The lower surface of the conductor 242b is in contact with the oxide 243b. The oxygen in the object 230b is blocked by the oxide 243b and therefore diffuses into the conductor 242b. Therefore, the diffusion of oxygen from the surroundings of the conductor 242b to the conductor 242b is suppressed. Since the dispersion can be suppressed, the oxidation of the conductor 242b can be suppressed. The same effect is obtained for the conductor 242a. The impurities such as hydrogen and water are transferred from the side of the oxide 230b to the oxide 230a and the oxide 230b. The insulator 272 can be made of, for example, aluminum oxide. , hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon oxide film, nitrogen A silicon nitride film or a silicon nitride oxide film can be used. For example, aluminum oxide or hafnium oxide can be used.

[0106] Figure 4B is an enlarged view of the right half of transistor 200 of Figure 1B. The left side of the insulating film 230 (the area surrounded by the dotted line in FIG. 4B) is in contact with the oxide 230c. 50, impurities such as hydrogen and water, and oxygen are prevented from diffusing into the conductor 242b. The right side surface of the conductor 242b is in contact with the insulator 272, and the insulating The diffusion of impurities such as hydrogen and water and oxygen from the body 280 into the conductor 242b is suppressed. The same effect can be achieved with the conductor 242a.

[0107] As described above, the permeation of impurities such as hydrogen and water and oxygen around the conductor 242 is suppressed. The insulating layer 272, the oxide 230c, and the oxide 243b are arranged to surround the insulating layer 272. This suppresses oxidation of the conductor 242, improving the electrical characteristics of the transistor 200 and This can improve the reliability of the register 200.

[0108] 1C, the oxide 230a and the The height of the bottom surface of the conductor 260 in the region where the oxide 230b and the conductor 260 do not overlap is The depth is preferably located at a position lower than the height of the bottom surface of the oxide 230b. , the oxide 230b and the conductor 260 are not overlapped with each other. The difference between the height of the oxide 230b and the height of the bottom surface of the oxide 230b is 0 nm or more and 100 nm or less, preferably is 3 nm or more and 50 nm or less, more preferably 5 nm or more and 20 nm or less.

[0109] In this way, the conductor 260 that functions as a gate is formed on the oxide 230 of the channel forming region. The side and top surfaces of b are covered with oxide 230c and insulator 250. This makes it easier for the electric field of the conductor 260 to act on the entire oxide 230b in the channel formation region. Therefore, the on-state current of the transistor 200 can be increased, and the frequency characteristics can be improved. do.

[0110] As a result, a semiconductor device having normally-off electrical characteristics can be provided. In addition, it suppresses fluctuations in electrical characteristics, provides stable electrical characteristics, and improves reliability. Alternatively, a semiconductor device having a transistor with a large on-state current can be provided. It is possible to provide a semiconductor device having a transistor with high frequency characteristics. Alternatively, a semiconductor device having a transistor with low off-state current can be provided. A semiconductor device can be provided.

[0111] The following describes in detail the configuration of a semiconductor device including a transistor 200 according to one embodiment of the present invention. This article explains:

[0112] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in the insulator 216. A portion of O5 may be embedded in the insulator 214.

[0113] Here, the conductor 260 functions as a first gate (also called a top gate). The conductor 205 also functions as a second gate (also called a bottom gate). In this case, the potential applied to the conductor 205 may be different from the potential applied to the conductor 260. , and the Vth of the transistor 200 can be controlled by changing them independently without linking them. In particular, applying a negative potential to the conductor 205 It is possible to increase Vth above 0 V and reduce the off-state current. Applying a negative potential to 205 reduces the potential applied to conductor 260 compared to not applying a negative potential. The drain current when the potential is 0V can be reduced.

[0114] As shown in FIG. 1A, the conductor 205 is formed by the conductor 242a of the oxide 230 and the conductor It is preferable that the area is larger than the area that does not overlap with the conductive material 242b. As shown in the figure, the conductor 205 is formed in the region outside the end of the oxide 230 that intersects with the channel width direction. In other words, it is preferable that the oxide 230 extends in the channel width direction. On the outside of the side surface, the conductor 205 and the conductor 260 overlap with each other via an insulator. Alternatively, by providing a large conductor 205, it is possible to 5) In the plasma processing in the manufacturing process after the formation, local charging (charging However, one aspect of the present invention is not limited to this. The conductor 205 is located at least between the conductor 242a and the conductor 242b. It may be overlapped with the oxide 230 .

[0115] With the above configuration, the electric field of the conductor 260 having the function of the first gate and The electric field of the conductor 205, which functions as a second gate, energizes the channel forming region. In this specification, the first gate and the second gate The structure of a transistor in which the channel formation region is electrically surrounded by an electric field is called surro This is called an unded channel (S-channel) structure.

[0116] The conductor 205a is a conductive material that suppresses the permeation of impurities such as water or hydrogen and oxygen. For example, titanium, titanium nitride, tantalum, or tantalum nitride may be used. The conductor 205b can be made of a material mainly containing tungsten, copper, or aluminum. It is preferable to use a conductive material that has a thickness of 100 μm. A multi-layer structure of more than one layer may also be used.

[0117] Here, the oxide semiconductor, the insulator or conductor located under the oxide semiconductor, and the oxide The insulating or conductive material located on the upper layer of the oxide semiconductor is separated into different films without being exposed to the atmosphere. By successively depositing the seeds, the concentration of impurities (especially hydrogen and water) is reduced, resulting in a substantially high-purity This is preferable because a highly intrinsic oxide semiconductor film can be formed.

[0118] For example, a deposition apparatus having six processing chambers is used to deposit the insulator 216 and the conductive film 217. The insulating film 222, which will be the insulator 224, and the oxide 230a are disposed on the substrate 205. an oxide film that becomes oxide 230b; an oxide film that becomes oxide 243; and a conductor 2 The conductive films to be formed as 42 may be successively formed in this order.

[0119] Insulator 212, insulator 214, insulator 272, insulator 273, insulator 282, insulator 2 The insulating layer 281 and the insulating layer 282 prevent impurities such as water or hydrogen from entering from the substrate side or from above. It is preferable that the insulating film functions as a barrier insulating film that prevents the metal oxide from being mixed into the transistor 200. Therefore, the insulators 212, 214, 272, 273, and 274 are 82, insulator 283 and insulator 281 are hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen Suppresses the diffusion of impurities such as elementary molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms It is preferable to use an insulating material that has the function of preventing the impurities from penetrating. or a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). It is preferable to use an insulating material that has the above-mentioned properties (which is difficult for oxygen to permeate).

[0120] For example, the insulators 212, 283, and 281 may be made of silicon nitride or the like. and oxides as the insulators 214, 272, 273, and 283. It is preferable to use aluminum or the like, which will prevent impurities such as water or hydrogen from being trapped. Diffusion from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214 Alternatively, oxygen contained in the insulator 224 or the like can be prevented from being absorbed by the insulator 212. Diffusion to the substrate side through the insulator 214 can be suppressed. Alternatively, an insulator 280 in which impurities such as hydrogen are disposed above the insulator 273, and and suppresses diffusion from the conductor 246 and the like to the transistor 200 side through the insulator 273. In this way, the transistor 200 can be protected from impurities such as water or hydrogen, and Insulators 212, 214, and 272 have the function of suppressing the diffusion of oxygen. The structure is surrounded by the body 273, the insulator 282, the insulator 283, and the insulator 281. is preferred.

[0121] It is also preferable to reduce the resistivity of the insulators 212, 283, and 281. For example, the resistivity of the insulator 212, the insulator 283, and the insulator 281 may be Approximately 1 x 10 13By setting the resistance to Ωcm, it is possible to use plasma in the semiconductor device manufacturing process. In this case, the insulator 212, the insulator 283, and the insulator 281 are In some cases, this can mitigate the charge buildup of the insulator 242 or the conductor 260. The resistivity of 212, insulator 283, and insulator 281 is preferably 1×10 10 Ωc m or more 1×10 15 Ωcm or less.

[0122] Also, the insulators 216, 280, and 274 have a higher dielectric strength than the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic For example, the capacitance can be reduced by removing the insulators 216, 280, and 27. 4. Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen Silicon or silicon oxide having vacancies may be used as appropriate.

[0123] The insulator 222 and the insulator 224 function as gate insulators.

[0124] Here, it is preferable that the insulator 224 in contact with the oxide 230 releases oxygen by heating. In this specification, the oxygen released by heating may be referred to as excess oxygen. The insulator 224 may be made of silicon oxide or silicon oxynitride as appropriate. By providing an insulator containing the oxide 230 in contact with the oxide 230, oxygen vacancies in the oxide 230 are reduced. This can improve the reliability of the transistor 200.

[0125] Specifically, the insulator 224 is made of an oxide material from which part of the oxygen is released by heating. It is preferable that the oxides that desorb oxygen by heating are those that are determined by thermal desorption spectroscopy (TDS). Thermal Desorption Spectroscopy (TDS) analysis revealed that oxygen The amount of molecules desorbed is 1.0×10 18 molecules / cm 3 More than 1.0x, preferably 10 19 molecules / cm 3 More preferably, 2.0 × 10 19 mole cules / cm 3 or more, or 3.0 x 10 20 molecules / cm 3 That's all. The surface temperature of the film during the TDS analysis was 100°C or higher. A temperature of 700°C or lower, or a temperature in the range of 100°C to 400°C, is preferred.

[0126] The insulator 222 prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. For example, the insulator 222 is Preferably, the insulator 222 and the insulator 27 have lower hydrogen permeability than the insulator 224. 2, the insulator 224 and the oxide 230 are surrounded, and water or Impurities such as hydrogen can be prevented from entering the transistor 200.

[0127] Furthermore, the insulator 222 is made of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable that the material has a function of suppressing diffusion (i.e., the oxygen is less likely to permeate). Preferably, the body 222 has a lower oxygen permeability than the insulator 224. The oxide 230 has a function of suppressing the diffusion of impurities and oxygen contained in the insulator 2. 22, it is preferable because it can reduce the diffusion below. This can prevent the oxide 224 from reacting with the oxygen contained in the oxide 230.

[0128] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is recommended to use an insulator containing oxide. Oxide-containing insulators include aluminum oxide, hafnium oxide, aluminum and hafnium oxide. It is preferable to use an oxide containing hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 is oxidized by the oxide 230. The release of impurities and the introduction of impurities such as hydrogen into the oxide 230 from the periphery of the transistor 200 are prevented. It acts as a suppressing layer.

[0129] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, or the like may be added to these insulators. um, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0130] The insulator 222 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT These include so-called high-k materials such as (Ba,Sr)TiO3 or (Ba,Sr)TiO3 (BST). As miniaturization and high integration of transistors progress, If the gate insulator is too thin, problems such as leakage current may occur. By using a high-k material as an insulator, the physical thickness can be maintained. This makes it possible to reduce the gate potential during transistor operation.

[0131] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, it is not limited to a laminated structure made of the same material, but may be a laminated structure made of different materials. good.

[0132] An oxide 243 is provided on the oxide 230b, and a source electrode, and a conductor 242 (conductor 242a and conductor 242) that functions as a drain electrode. The film thickness of the conductor 242 is, for example, 1 nm or more and 50 nm or less, preferably is set to 2 nm or more and 25 nm or less.

[0133] The conductor 242 may be aluminum, chromium, copper, silver, gold, platinum, tantalum, or nickel. Titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, Magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metal element selected from rontium and lanthanum, or an alloy containing the above metal elements Alternatively, it is preferable to use an alloy of the above-mentioned metal elements. tantalum, titanium nitride, tungsten nitride, nitrides containing titanium and aluminum, tantalum and Aluminum nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum, an oxide containing lanthanum and nickel, etc. , tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxides, ruthenium nitrides, strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation or can be easily oxidized. It is preferable because it is a material that maintains its conductivity even when absorbing heat.

[0134] The insulator 250 functions as a gate insulator. The insulator 250 is preferably made of silicon oxide or silicon oxynitride. , silicon oxynitride, silicon nitride, silicon oxide with fluorine addition, carbon-added oxide silicon dioxide, silicon dioxide doped with carbon and nitrogen, and silicon dioxide with vacancies. In particular, silicon oxide and silicon oxynitride are stable against heat, This is preferable.

[0135] Like the insulator 224, the insulator 250 is made of an insulator that releases oxygen when heated. It is preferable to form the insulating material 250 as an insulating material from which oxygen is released by heating. By providing it in contact with the top surface of the oxide 230c, the channel forming region of the oxide 230b In addition, as with the insulator 224, the insulator 250 can effectively supply oxygen. It is preferable that the concentration of impurities such as water or hydrogen is reduced. , and it is preferable that the thickness is 1 nm or more and 20 nm or less.

[0136] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen from the insulator 250 to the conductor 260, In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. Moreover, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0137] The metal oxide may also function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, the metal oxide It is preferable to use a metal oxide, which is a high-k material with a high relative dielectric constant. By making the insulating layer 250 and the metal oxide into a laminated structure, the insulating layer 250 is stable against heat. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. do.

[0138] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium Metal oxides containing one or more selected from the above can be used. Aluminum oxide, an insulator containing oxides of either or both aluminum and hafnium Aluminum, hafnium oxide, oxides containing aluminum and hafnium (hafnium oxide) It is preferable to use a laminate.

[0139] Alternatively, the metal oxide may function as a part of the gate. In this case, it is preferable to provide a conductive material containing oxygen on the channel formation region side. By providing the conductive material on the channel forming region side, oxygen released from the conductive material can form a channel. It becomes easier to supply the area.

[0140] In particular, the metal oxide in which the channel is formed acts as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used. Indium tin oxide, tungsten oxide, etc. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide Indium tin oxide or silicon-doped indium tin oxide may also be used. The use of such a material allows the channel to be formed. In some cases, hydrogen contained in the metal oxide formed on the surface of the catalyst can be captured. It may be possible to capture hydrogen that has entered from an insulator or the like.

[0141] Although the conductor 260 is shown as having a two-layer structure in FIG. 1, it may have a single layer structure or a structure having three or more layers. The above laminated structure may also be used.

[0142] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N2O, NO, NO2, etc.), conductive material with the function of suppressing the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (for example, oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material that has the function of suppressing the diffusion of at least (i).

[0143] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can prevent the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and nitride. It is preferable to use tantalum chloride, ruthenium, or ruthenium oxide.

[0144] The conductor 260b is made of a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 260 also functions as wiring, It is preferable to use a highly conductive material, such as tungsten, copper, or aluminum. The conductive material 260b may be a laminated structure. For example, a laminated structure of titanium, titanium nitride and the above conductive material may be used. .

[0145] The insulator 280 may be, for example, silicon oxide, silicon oxynitride, or nitride. silicon oxide doped with fluorine, silicon oxide doped with carbon, carbon and silicon oxide doped with silicon dioxide and nitrogen, or silicon oxide with vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide with vacancies This is preferable because it makes it possible to easily form a region containing oxygen that is desorbed by heating.

[0146] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. In addition, the top surface of the insulator 280 may be flattened.

[0147] The insulator 282 or the insulator 283 is formed so that impurities such as water or hydrogen do not penetrate into the insulator 282 from above. It is preferable that the insulating film functions as a barrier insulating film that prevents the insulator from being mixed into the insulating film 80. The insulating film 282 or the insulating film 283 can function as a barrier insulating film that suppresses oxygen permeation. The insulators 282 and 283 are preferably made of, for example, aluminum oxide or nitride. An insulator such as silicon or silicon nitride oxide may be used. For example, the insulator 282 Aluminum oxide, which has a high blocking property against oxygen, is used as the insulator 283. Therefore, silicon nitride, which has a high blocking property against hydrogen, may be used.

[0148] It is also preferable to provide an insulator 274 that functions as an interlayer film on the insulator 282. The insulator 274, like the insulator 224, has a low impurity concentration such as water or hydrogen in the film. is preferably reduced.

[0149] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material containing the conductive material 240a and the conductive material 240b. 0b may have a laminated structure.

[0150] In addition, when the conductor 240 has a laminated structure, the insulators 281, 274, and 28 2. The insulator 280, the insulator 273, and the conductor in contact with the insulator 272 are filled with water or water. It is preferable to use a conductive material that has the function of suppressing the permeation of impurities such as silicon. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. It is preferable to use the following. In addition, it is preferable to use the following to suppress the permeation of impurities such as water or hydrogen. The conductive material may be used in a single layer or a multilayer structure. The oxygen added to the insulator 280 is absorbed into the conductors 240a and 240b. In addition, impurities such as water or hydrogen from the upper layer of the insulator 281 can be prevented from being conductive. Therefore, the inclusion of the oxide 230 through the conductive material 240a and the conductive material 240b can be suppressed. Cut.

[0151] The insulators 241a and 241b may be made of, for example, silicon nitride or aluminum oxide. An insulator such as silicon nitride oxide or silicon oxynitride may be used. The body 241b is provided in contact with the insulators 272 and 273, and therefore the insulator 28 Impurities such as water or hydrogen are released from the conductor 240a and the conductor 240b. It is possible to suppress the incorporation of silicon nitride into the oxide 230. In particular, silicon nitride has a high resistance to hydrogen. The insulator 280 is preferable because of its high blocking property. This can prevent the radiation from being absorbed by the conductor 240a and the conductor 240b.

[0152] In addition, the conductive material 240a and the conductive material 240b are in contact with each other at the upper surface thereof and function as wiring. Conductor 246 (conductor 246a and conductor 246b) may be arranged. 46 uses conductive materials whose main components are tungsten, copper, or aluminum. The conductor may have a laminated structure, for example, titanium, titanium nitride, etc. The conductive material may be laminated on the insulating material. The electrode may be formed so as to be embedded in the electrode.

[0153] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0154] <Substrate> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate Semiconductor substrates include those made of silicon or germanium. semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of gallium oxide, zinc oxide, and gallium oxide are also available. A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon on Insulator) Conductive substrates include graphite substrates and metal substrates. , alloy substrates, conductive resin substrates, etc. Or, substrates having metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or semiconductor is provided on an insulating substrate. Substrate, substrate with conductor or insulator provided on semiconductor substrate, substrate with semiconductor or insulator provided on conductive substrate There are also substrates with elements mounted on them. The elements provided on the substrate may include a capacitance element, a resistance element, a switch element, a light-emitting element, and the like. There are various types of memory elements.

[0155] <Insulator> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0156] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the physical film thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. Therefore, materials should be selected accordingly.

[0157] Insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. oxides with aluminum, aluminum and hafnium, oxides with silicon and hafnium, oxides with silicon and hafnium, Examples include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0158] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, fluorine-doped silicon oxide, carbon-doped silicon oxide, carbon and nitrogen Examples of the silicon oxide include silicon oxide with added silicon dioxide, silicon oxide with pores, and resin.

[0159] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include , for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon , phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum Insulators containing tungsten, neodymium, hafnium, or tantalum are used in single or multilayer configurations. Specifically, an insulating material having a function of suppressing the permeation of impurities such as hydrogen and oxygen is used. As the substrate, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or metal oxides such as tantalum oxide, aluminum nitride, titanium aluminum nitride, Metal nitrides such as titanium oxide, silicon oxynitride, or silicon nitride can be used. .

[0160] In addition, the insulator that functions as the gate insulator has a region containing oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, the oxide The oxygen deficiency of 230 can be compensated for.

[0161] <Conductors> Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, Strontium Metal elements selected from ammonium, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten nitride, nitrides containing titanium and aluminum, tantalum and aluminum Aluminum nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum, an oxide containing lanthanum and nickel, or the like. Tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxides, ruthenium nitrides, strontium and ruthenium Oxides, including lanthanum and nickel, are conductive materials that are resistant to oxidation or oxygen absorption. It is a preferable material because it maintains conductivity even after absorption. Highly conductive semiconductors, such as polycrystalline silicon, and nickel silicide, Any silicide may be used.

[0162] Alternatively, a plurality of conductive layers made of the above materials may be stacked. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated layer that combines the material containing the metal element and the conductive material containing nitrogen is also available. In addition, a material containing the above-mentioned metal element, a conductive material containing oxygen, and a material containing nitrogen may be used. A laminated structure may be formed by combining a conductive material containing a silicon dioxide.

[0163] When an oxide is used for the channel formation region of a transistor, The functional conductor is a combination of the material containing the metal element and the conductive material containing oxygen. In this case, it is preferable to use a laminated structure in which an oxygen-containing conductive material is used as a channel. It is preferable to provide the conductive material containing oxygen on the side of the channel formation region. Therefore, oxygen released from the conductive material is easily supplied to the channel formation region.

[0164] In particular, the metal oxide in which the channel is formed acts as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used, such as titanium nitride and tantalum nitride. Alternatively, a conductive material containing nitrogen such as indium tin oxide or tungsten oxide may be used. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide, titanium oxide, indium tin oxide, indium zinc oxide, Silicon-doped indium tin oxide may also be used. Sodium zinc oxide may be used. By using such a material, a channel is formed. In some cases, the metal oxides surrounding the outer insulator can trap hydrogen. It may be possible to capture hydrogen that is mixed in from sources such as

[0165] <Metal oxides> As the oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor. Metal oxides applicable to the oxide 230 according to the present invention will be described below.

[0166] The metal oxide preferably contains at least indium or zinc. It is preferable that the alloy contains aluminum and zinc. It is preferable that the alloy contains boron, titanium, iron, or the like. , nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, magnesium, or One or more types may be included.

[0167] Here, the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. The element M can be aluminum, gallium, yttrium, or Other elements that can be used for element M include boron, titanium, iron, and nickel. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, Examples include fluorine, tantalum, tungsten, and magnesium. However, the element M is: In some cases, a combination of the aforementioned elements may be used.

[0168] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). Metal oxides containing nitrogen are sometimes collectively called metal oxynitrides (metal oxynitrides). It may also be called tal oxynitride.

[0169] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Non-single-crystal oxide semiconductors are, for example, CAAC-OS, polycrystalline crystalline oxide semiconductor, nc-OS, pseudo-amorphous oxide semiconductor (a-like OS) phos-like oxide semiconductor), and amorphous oxide semiconductors, etc.

[0170] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The crystal structure is distorted by the connection of multiple nanocrystals. In the region, the lattice arrangement is changed between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement. This refers to the point where the direction of the

[0171] Nanocrystals are basically hexagonal, but are not limited to regular hexagonal shapes. They may also have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in CAAC-OS, clear grain boundaries (grain bows) are not observed even near the strain. It is difficult to confirm the crystal structure (also called "undary") due to the distortion of the lattice arrangement. This is because the CAAC-OS is aligned in the ab-plane direction. In this case, the arrangement of oxygen atoms is not dense, and the bond distance between atoms is reduced by the substitution of metal elements. This is because distortion can be tolerated by changing the

[0172] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). It is noted that indium and element M tend to have a structure (also called a layered structure). When the element M in the (M,Zn) layer is replaced with indium, the (In,M,Zn) ) layer. Also, when indium in the In layer is replaced with element M, it can be expressed as (In, It can also be expressed as the M layer.

[0173] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to identify grain boundaries, the decrease in electron mobility caused by grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides can be reduced by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS should be free from impurities and defects (oxygen vacancies (V O :oxygen v Therefore, CAAC- Metal oxides with OS have stable physical properties. Metal oxides are heat resistant and highly reliable.

[0174] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. It may be indistinguishable from the body.

[0175] Indium gallium oxide, a type of metal oxide containing indium, gallium, and zinc, is used. The IGZO nanocrystals mentioned above are stable. In particular, IGZO tends to have difficulty growing crystals in the atmosphere. , small crystals (e.g., crystals of several mm or several cm) are more likely to be formed than large crystals (here, crystals of several mm or several cm). For example, the nanocrystals mentioned above may be structurally more stable.

[0176] The a-like OS is a metal oxide semiconductor with a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has pores or low density regions. The ke-OS has lower crystallinity than the nc-OS and CAAC-OS.

[0177] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention may be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more of them.

[0178] In the semiconductor device of one embodiment of the present invention, the oxide semiconductor (metal oxide) Although there is no particular limitation, it is preferable that the oxide 230 has crystallinity. The AC-OS structure can be achieved, and the oxide 243 can be made into a hexagonal crystal structure. By making the oxide 243 have the above crystal structure, a semiconductor device with high reliability can be obtained. In addition, the oxide 230a, the oxide 230c, and the oxide 243 can be roughly They may have the same composition.

[0179] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0180] In addition, when alkali metals or alkaline earth metals are contained in metal oxides, defect levels are formed. Therefore, alkali metals or alkaline earth metals A transistor that uses a metal oxide containing metals in the channel formation region is normally on. Therefore, the concentration of alkali metals or alkaline earth metals in metal oxides Specifically, it is preferable to reduce the concentration of alkali metal or alkali metal in the metal oxide. Concentration of earth metals (Secondary Ion Mass Spectrometry (SIMS) The concentration obtained by ss Spectrometry) is 1 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0181] In addition, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, metal oxides containing hydrogen can be used. Such a transistor is likely to have normally-on characteristics.

[0182] For this reason, it is preferable that the amount of hydrogen in the metal oxide is reduced as much as possible. is the hydrogen concentration obtained by SIMS in metal oxides, expressed as 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 Less than 5x1 0 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 less than A metal oxide with sufficiently reduced impurities is used for the channel formation region of a transistor. By doing so, stable electrical properties can be imparted.

[0183] It is preferable to use a thin film with high crystallinity as the metal oxide used as the semiconductor of a transistor. Use of the thin film can improve the stability or reliability of the transistor. The thin film may be, for example, a thin film of a single crystal metal oxide or a thin film of a polycrystalline metal oxide. However, thin films of single crystal metal oxides or thin films of polycrystalline metal oxides are Formation on a substrate requires high temperature or laser heating processes. This increases the cost of the process and also reduces throughput.

[0184] <Method for manufacturing semiconductor device> Next, a semiconductor device having a transistor 200 according to the present invention shown in FIG. 1 will be fabricated. The manufacturing method will be described with reference to Figs. 5 to 14. In Figs. 5 to 14, A in each figure indicates The top view is shown. Also, B in each figure corresponds to the area indicated by the dashed line A1-A2 in A. 1A and 1B are cross-sectional views of the transistor 200 taken along the channel length direction. 1 is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in FIG. 1A, and shows the transistor 200 It is also a cross-sectional view in the channel width direction of each figure. Some elements are omitted.

[0185] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate. The deposition of 12 was carried out by sputtering, chemical vapor deposition (CVD), r Deposition), molecular beam epitaxy (MBE) beam epitaxy, pulsed laser deposition (PLD) The deposition method, the ALD method, or the like can be used.

[0186] The CVD method is a plasma CVD (PECVD) method that uses plasma. Enhanced CVD (TCVD) method, and thermal CVD (TCVD) method. These methods can be further classified into the VD method, which uses light, and the Photo CVD method. Depending on the source gas, metal CVD (MCVD) and metal organic CVD are used. (MOCVD: Metal Organic CVD) method.

[0187] The plasma CVD method can produce high-quality films at relatively low temperatures. This film formation method does not use a plasma, so it is possible to reduce plasma damage to the object being treated. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc. included in a semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. In addition, the thermal CVD method can increase the yield of semiconductor devices. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0188] In addition, the ALD method utilizes the self-regulating properties of atoms to deposit atoms one layer at a time. This allows for ultra-thin film deposition, film deposition on structures with high aspect ratios, and pinholes. It is possible to form films with few defects such as holes, and to form films with excellent coverage, and to form films at low temperatures. In addition, the ALD method uses plasma to form films, which has the effect of This includes the LD (Plasma Enhanced ALD) method. This may be preferable as it allows film formation at a lower temperature. Some casings contain impurities such as carbon. Therefore, the film formed by the ALD method may contain more impurities such as carbon than films formed by other film formation methods. The quantity of impurities was determined by X-ray photoelectron spectroscopy (XPS). This can be done using ion spectroscopy.

[0189] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is less affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it suitable for forming thin films with high aspect ratios. However, the ALD method is relatively slow in forming films. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a high deposition rate. may be preferable.

[0190] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having the following composition. By changing the flow rate ratio of the source gases while oxidizing, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transport or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0191] In this embodiment, the insulator 212 is formed by depositing silicon nitride by the CVD method. In this way, an insulator that is difficult for copper to penetrate, such as silicon nitride, is used as the insulator 212. Therefore, a metal that easily diffuses, such as copper, is used for the conductor layer (not shown) below the insulator 212. Even if the metal is present, it is possible to prevent the metal from diffusing into the upper layer through the insulator 212. In addition, it is possible to use an insulator such as silicon nitride that is difficult for impurities such as water or hydrogen to penetrate. This makes it possible to suppress the diffusion of impurities such as water or hydrogen from the layer below the insulator 212. Cut.

[0192] Next, the insulator 214 is deposited on the insulator 212. The insulator 214 is deposited by sputtering. The deposition can be carried out by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, aluminum oxide is used as the insulator 214.

[0193] Next, the insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. The deposition can be carried out by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0194] Next, an opening is formed in the insulator 216 that reaches the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216 to form grooves. It is preferable to select an insulator that functions as an etching stopper film when etching. When a silicon oxide film is used for the insulator 216 forming the groove, the insulator 214 is made of silicon nitride. It is preferable to use a tantalum oxide film, an aluminum oxide film, or a hafnium oxide film.

[0195] After the opening is formed, a conductive film that will become the conductor 205a is formed. The conductive film has a property of preventing oxygen from passing through. It is desirable to include a conductor having a suppressing function. For example, tantalum nitride, tantalum Alternatively, tantalum, tungsten, titanium nitride, etc. may be used. It is a laminated film of tungsten, molybdenum, aluminum, copper, and molybdenum-tungsten alloy. The conductive film that becomes the conductor 205a can be formed by a sputtering method, a CVD method, an MBE method, or the like. The method can be carried out by using a method such as a PLD method or an ALD method.

[0196] In this embodiment, the conductive film that becomes the conductor 205a has a multi-layer structure. A tantalum nitride film is formed by a coating method, and titanium nitride is laminated on the tantalum nitride film. By using such a metal nitride as the lower layer of the conductor 205b, the conductor 20 Even if a metal that easily diffuses, such as copper, is used as the conductive film that becomes 5b, the metal It can prevent the diffusion of a outward.

[0197] Next, a conductive film that will become the conductor 205b is formed. The conductive film can be formed by plating, sputtering, or the like. The deposition can be performed by a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, the conductive film that becomes the conductor 205b is made of a low-resistance conductive material such as copper. A film is formed.

[0198] Next, CMP (Chemical Mechanical Polishing) By performing this, a conductive film that becomes the conductor 205a and a conductive film that becomes the conductor 205b are formed. The opening is then removed to expose the insulator 216. As a result, the conductor 205a and the insulator 216 are only present in the opening. As a result, the conductor 205 having a flat upper surface can be formed. Note that the CMP process may remove a part of the insulator 216 (see FIG. 5). reference).

[0199] In the above, the conductor 205 is formed so as to be embedded in the opening of the insulator 216. However, the present embodiment is not limited to this. For example, a conductor 20 is formed on an insulator 214. 5, an insulator 216 is formed on the conductor 205, and the insulator 216 is subjected to CMP processing. By doing so, a part of the insulator 216 is removed and the surface of the conductor 205 is exposed.

[0200] Next, the insulator 222 is formed on the insulator 216 and the conductor 205. As the insulating layer, an insulating film containing oxides of one or both of aluminum and hafnium is formed. It is recommended to use an insulator containing oxides of either or both of aluminum and hafnium. Examples include aluminum oxide, hafnium oxide, and oxides containing aluminum and hafnium. It is preferable to use aluminum and hafnium. Insulators containing oxides of one or both of these metals have barrier properties against oxygen, hydrogen, and water. The insulator 222 has a barrier property against hydrogen and water, and thus the transistor The hydrogen and water contained in the structure provided around the rotor 200 pass through the insulator 222. Diffusion into the inside of the transistor 200 is suppressed, and oxygen vacancies are generated in the oxide 230. can be suppressed.

[0201] The insulator 222 is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an A method. This can be done using the LD method or the like.

[0202] Next, an insulating film 224A is formed on the insulator 222. The insulating film 224A is formed by sputtering. This can be done using methods such as deposition, CVD, MBE, PLD, or ALD. Cut.

[0203] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250° C. or higher and 650° C. or lower. Preferably, the reaction is carried out at a temperature of 300°C or higher and 500°C or lower, and more preferably at a temperature of 320°C or higher and 450°C or lower. The heat treatment may be carried out in a nitrogen or inert gas atmosphere, or in an atmosphere of oxidizing gas at 10 ppm. The heat treatment is carried out in an atmosphere containing more than m, more than 1%, or more than 10%. Alternatively, the heat treatment may be performed in a nitrogen or inert gas atmosphere, followed by To compensate for the oxygen that has been removed, oxidizing gases are added at 10 ppm or more, 1% or more, or 10% or more. The heat treatment may be performed in an atmosphere containing the metal.

[0204] In this embodiment, after performing the treatment at a temperature of 400° C. for 1 hour in a nitrogen atmosphere, Then, the insulating film is heated in an oxygen atmosphere at 400°C for 1 hour. Impurities such as water and hydrogen contained in the film 224A can be removed.

[0205] The heat treatment may be performed after the formation of the insulator 222. Heat treatment conditions can be used.

[0206] Here, in order to form an excess oxygen region in the insulating film 224A, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be performed using, for example, a high-density microwave plasma. It is preferable to use a device having a power source for generating plasma. Alternatively, RF is applied to the substrate side. By using high density plasma, By applying RF to the substrate side, high density plasma can be generated. The oxygen radicals generated by the above process can be efficiently guided into the insulating film 224A. After performing plasma treatment containing an inert gas using this device, the desorbed oxygen is replenished. For this purpose, plasma treatment containing oxygen may be performed. Note that the conditions of the plasma treatment may be appropriately selected. By selecting the insulating film 224A, impurities such as water and hydrogen contained in the insulating film 224A can be removed. In this case, heat treatment is not necessary.

[0207] Here, aluminum oxide is deposited on the insulating film 224A by, for example, a sputtering method. may be formed, and then CMP may be performed on the aluminum oxide until it reaches the insulating film 224A. By performing the CMP, the surface of the insulating film 224A is flattened and smoothed. The aluminum oxide is placed on the insulating film 224A and then CMP is performed. This makes it easy to detect the end point of the CMP. The thickness of the insulating film 224A may be reduced by polishing. By flattening and smoothing the surface of the insulating film 224A, It is possible to prevent the deterioration of the coverage of the oxide film to be formed and to prevent a decrease in the yield of semiconductor devices. In addition, aluminum oxide may be deposited on the insulating film 224A by sputtering. This is preferable because oxygen can be added to the insulating film 224A.

[0208] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulating film 224A (see FIG. 5). It is preferable that the oxide film be formed continuously without exposing it to the air environment. By forming the film without exposing it to the atmosphere, the oxide film 230A and the oxide film 230B are protected from the atmospheric environment. The oxide film 230A and the oxide film 230B can be prevented from being adhered with impurities or moisture. The area around the interface with the substrate can be kept clean.

[0209] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, etc. The method can be carried out using a PLD method, an ALD method, or the like.

[0210] For example, the oxide film 230A and the oxide film 230B are formed by sputtering. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the oxygen ratio in the sputtering gas, the excess oxygen in the oxide film to be formed can be reduced. In addition, when the oxide film is formed by sputtering, In this case, the above-mentioned In-M-Zn oxide target can be used.

[0211] In particular, when forming the oxide film 230A, part of the oxygen contained in the sputtering gas is converted into the insulating film. Therefore, the sputtering gas for the oxide film 230A may be supplied to the The oxygen content is 70% or more, preferably 80% or more, and more preferably 100%. That's fine.

[0212] In addition, when the oxide film 230B is formed by sputtering, the oxide film 230B is formed by sputtering. The film is formed by setting the ratio of oxygen to be added at 1% or more and 30% or less, preferably 5% or more and 20% or less. The oxygen-deficient oxide semiconductor is formed in the channel formation region. The transistors used in this region have a relatively high field effect mobility. By performing film formation while However, one embodiment of the present invention is not limited to this. The oxide film 230B is formed by a sputtering method. In this case, the proportion of oxygen contained in the sputtering gas is preferably more than 30% and less than 100%. Or, if the film is formed with a concentration of 70% or more and 100% or less, an oxygen-excess oxide semiconductor is formed. A transistor using an oxygen-excess oxide semiconductor for a channel formation region has a relatively high Reliability is gained.

[0213] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: Zn=1:1:0.5 (2:2:1), or 1:3:4 The oxide film 230B is formed by sputtering. By the annealing method, the atomic ratio of In:Ga:Zn=4:2:4.1 or 1:1:1 The film is formed using a target with a ratio of the number of atoms. By appropriately selecting the ratio, the oxide 230 can be formed to suit the desired characteristics.

[0214] Next, a heat treatment may be carried out. The heat treatment may be carried out under the heat treatment conditions described above. By the heat treatment, impurities such as water and hydrogen in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After one hour of treatment, the sample was treated in an oxygen atmosphere at 400°C for one hour. cormorant.

[0215] Next, an oxide film 243A is formed on the oxide film 230B (see FIG. 5). The film is formed using the sputtering method, CVD method, MBE method, PLD method, or ALD method. The oxide film 243A has an atomic ratio of Ga to In that is equal to or larger than that of the oxide film 230B. In this embodiment, the atomic ratio of Ga to In is preferably larger than that of the oxide film 2. 43A was prepared by sputtering In:Ga:Zn=1:3:4 [atomic ratio] The film is formed using a target of

[0216] Next, a conductive film 242A is formed on the oxide film 243A (see FIG. 5). The film is formed using the sputtering method, CVD method, MBE method, PLD method, or ALD method. This can be done (see Figure 5).

[0217] Next, oxide film 230A, oxide film 230B, and oxide film 243A are formed by lithography. , and the conductive film 242A is processed into an island shape to form an oxide 230a, an oxide 230b, and an oxide layer 243B and a conductive layer 242B are formed (see FIG. 6). Dry etching and wet etching can be used. Although not shown, in this process, the insulating film 224A The film thickness may be thinner in areas that do not overlap with oxide 230a.

[0218] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the resist patterned area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. For example, KrF excimer laser light, ArF excimer laser light, Laser light, EUV (Extreme Ultraviolet) light, etc. A resist mask can be formed by exposing the substrate to light. An immersion technique may be used in which the substrate is filled with a liquid (for example, water) and exposed to light. Alternatively, an electron beam or an ion beam may be used. In this case, the mask is not required. Which dry etching process should be performed, which wet etching process should be performed, and which dry etching process should be performed? wet etching after treatment, or wet etching after dry etching A processing can be performed.

[0219] In addition, a hard mask made of an insulator or a conductor may be used instead of the resist mask. When a hard mask is used, an insulating film or a conductive film that will be a hard mask material is formed on the conductive film 242A. forming a film, forming a resist mask thereon, and etching the hard mask material; A hard mask having a desired shape can be formed by etching the conductive film 242A, etc. This can be done after removing the resist mask, or with the resist mask left on. In the latter case, the resist mask may be lost during etching. The hard mask may be removed by etching after etching such as 2A. If the material of the hard mask does not affect the subsequent process or can be used in the subsequent process, it is not necessarily hard There is no need to remove the mask.

[0220] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. (Capacitively Coupled Plasma) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power supply may be applied to one of the parallel plate type electrodes. Alternatively, a parallel plate electrode may be used. Alternatively, a parallel plate electrode may be used. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching device or the like can be used.

[0221] Here, oxide 230a, oxide 230b, oxide layer 243B, and conductive layer 242 B is formed so that at least a portion thereof overlaps with the conductor 205. The sides of the oxide 230b, the oxide layer 243B, and the conductive layer 242B are It is preferable that the oxide 230a, oxide 230b, and oxide 230c are approximately perpendicular to the upper surface. The side surfaces of the layer 243B and the conductive layer 242B are approximately perpendicular to the top surface of the insulator 222. This allows for a smaller area and higher density when providing multiple transistors 200. Alternatively, the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductive layer 242 The angle between B and the top surface of the insulator 222 may be small. 230a, oxide 230b, oxide layer 243B, and the side of conductive layer 242B and insulator The angle formed by the upper surface of 222 is preferably 60° or more and less than 70°. In the subsequent steps, the covering property of the insulator 272 etc. is improved, and defects such as voids are reduced. It is possible.

[0222] In addition, a curved surface is provided between the side surface of the conductive layer 242B and the upper surface of the conductive layer 242B. In other words, it is preferable that the edges of the side surfaces and the top surface are curved (hereinafter referred to as rounded). The curved surface has a radius of curvature of, for example, 3 nm at the end of the conductive layer 242B. The thickness is from 10 nm to 100 nm, preferably from 5 nm to 6 nm. This improves the film coverage in the subsequent film formation process.

[0223] Next, insulating film 224A, oxide 230a, oxide 230b, oxide layer 243B, and conductive layer 243C are formed. An insulating film 272A is formed on the conductor layer 242B (see FIG. 7).

[0224] The insulating film 272A is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an A method. This can be done using an LD method or the like. The insulating film 272A has a function of suppressing oxygen permeation. For example, it is preferable to use an insulating film formed by sputtering or ALD. Then, aluminum oxide, silicon nitride, silicon oxide, or gallium oxide is deposited. Good too.

[0225] Next, an insulating film 273A is formed on the insulating film 272A (see FIG. 7). The film is formed by sputtering, CVD, MBE, PLD, ALD, etc. For example, it is preferable to form an aluminum oxide film by the ALD method. In this embodiment, the aluminum oxide film is formed by the ALD method. Alternatively, the insulating film 273A may not be formed.

[0226] Next, an insulating film that will become the insulator 280 is formed on the insulating film 273A. The insulating film is formed by a method such as sputtering, CVD, MBE, PLD, or ALD. For example, the insulator 280 can be formed by sputtering. A silicon oxide film is formed, and then an oxide silicon film is deposited on it using the PEALD method or the thermal ALD method. Here, the insulator 280 is formed by the PEALD method or the thermal ALD method. As shown in FIGS. 2 and 3, the water in the insulator 280 is formed by the method. The element concentration can be reduced.

[0227] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to form the insulator 280 with a flat upper surface. (See Figure 8.)

[0228] Next, a part of the insulator 280, a part of the insulating film 273A, a part of the insulating film 272A, and the oxide layer 243B and a portion of the conductive layer 242B are processed to form an opening that reaches the oxide 230b. The opening is preferably formed so as to overlap the conductor 205. The oxide 243a, the oxide 243b, the conductor 242a, the conductor 242b, the insulator 272, insulator 273, and insulator 224 are formed (see FIG. 8).

[0229] In addition, a part of the insulator 280, a part of the insulating film 273A, a part of the insulating film 272A, and the oxide layer 243B and a part of the conductive layer 242B may be processed under different conditions. For example, a part of the insulator 280 is processed by dry etching, and a part of the insulating film 273A is The insulating film 272A, the oxide layer 243B, and the conductive layer 243B are removed by wet etching. A part of the conductor layer 242B may be processed by dry etching.

[0230] By using conventional dry etching and other processes, the etching gas The resulting impurities adhere to or are present on the surface or inside of the oxide 230a and the oxide 230b. Impurities can be, for example, fluorine or chlorine.

[0231] In order to remove the above impurities, cleaning is performed. These include wet cleaning, plasma treatment using plasma, and cleaning by heat treatment. The above cleaning methods may be combined as appropriate.

[0232] Wet cleaning uses oxalic acid, phosphoric acid, ammonia water, or hydrofluoric acid. The cleaning treatment may be carried out using an aqueous solution diluted with carbonated water or pure water. Alternatively, ultrasonic cleaning using carbonated water may be performed.

[0233] After the etching or the cleaning, a heat treatment may be carried out. The heat treatment may be performed at a temperature of 100° C. or higher and 400° C. or lower. Gaseous atmosphere or oxidizing gases containing 10 ppm or more, 1% or more, or 10% or more For example, the heat treatment may be performed in an oxygen atmosphere. Oxygen is supplied to the oxide 230a and the oxide 230b to form the oxygen vacancy V O It is possible to reduce this. The heat treatment may be carried out under reduced pressure or in an atmosphere of nitrogen gas or inert gas. After heat treatment in an oxidizing gas atmosphere, 10ppm of oxidizing gas was added to compensate for the oxygen that was removed. The process may be carried out in an atmosphere containing at least m, at least 1%, or at least 10% of SiO 2 .

[0234] Next, a heat treatment may be carried out, and the heat treatment is carried out under reduced pressure and without exposure to the atmosphere. Alternatively, the oxide film 230C may be formed successively (see FIG. 9). It is preferable to carry out the treatment in an atmosphere containing oxygen. The moisture and hydrogen adsorbed on the surface of 30b are removed, and the oxide 230a and The moisture concentration and hydrogen concentration in the oxide 230b can be reduced. is preferably 100°C or higher and 400°C or lower, more preferably 150°C or higher and 350°C or lower In this embodiment, the heat treatment is performed at a temperature of 200° C. under reduced pressure.

[0235] Here, the oxide film 230C is formed on at least a part of the side surface of the oxide 230a, the oxide 230b, and the like. a part of the side surface and a part of the top surface of the oxide 243; a part of the side surface of the conductor 242; , so as to contact the side of the insulator 272, the side of the insulator 273, and the side of the insulator 280. The conductor 242 is preferably formed by an oxide 243, an insulator 272, an oxide film 23, and the like. By being surrounded by 0 C, the decrease in conductivity due to oxidation of the conductor 242 in the subsequent process is suppressed. It can be controlled.

[0236] The oxide film 230C is formed by sputtering, CVD, MBE, PLD, or A This can be done using the LD method or the like. The oxide film 230C is formed by using Ga atoms relative to In. It is preferable that the atomic ratio of Ga to In is larger than the atomic ratio of Ga to In in the oxide film 230B. In this embodiment, the oxide film 230C is formed by sputtering In:Ga:Zn= The film is formed using a target with an atomic ratio of 1:3:4.

[0237] The oxide film 230C may be a laminated film. For example, the oxide film 230C may be formed by sputtering. The film was formed using a target with an atomic ratio of n:Ga:Zn=4:2:4.1. The film may be formed using a target with an atomic ratio of In:Ga:Zn=1:3:4.

[0238] During the formation of the oxide film 230C, part of the oxygen contained in the sputtering gas is converted into the oxide 230C. a and the oxide 230b. Alternatively, when forming the oxide film 230C, Some of the oxygen contained in the sputtering gas may be supplied to the insulator 280. Therefore, the proportion of oxygen contained in the sputtering gas for the oxide film 230C is preferably 70% or more. It is preferable that the ratio is 80% or more, and more preferably 100%.

[0239] Next, a heat treatment may be performed. The heat treatment may be performed under reduced pressure and exposed to the atmosphere. Alternatively, irradiation of the electromagnetic wave 290 or deposition of the insulating film 250A may be performed successively without By carrying out the heat treatment, the moisture and the like adsorbed on the surface of the oxide film 230C are removed. and hydrogen, and further, the moisture in the oxide 230a, the oxide 230b, and the oxide film 230C. The heat treatment temperature is 100°C or higher and 400°C or lower. In this embodiment, the temperature of the heat treatment is set to 200° C. or less.

[0240] Next, as shown in FIG. 3, an electromagnetic wave 290 is applied to the oxide 230C, the insulator 280, and the oxide The oxide 230a and the oxide 230b may be irradiated with electromagnetic waves (see FIG. 10). The electromagnetic wave 290 may be a microwave or a high frequency wave such as RF. 290 is immersed in oxide 230c, insulator 280, oxide 230b, and oxide 230a. Through these, V O Some of the hydrogen generated at this time combines with oxygen The oxide 230 and the insulator 280 may be removed as H2O. Some of the hydrogen may be gettered to the conductor 242. In this way, the electromagnetic wave 29 230c, the insulator 280, the oxide 230b, and the oxide 230c are irradiated with 0. The hydrogen concentration in 30a can be reduced.

[0241] In addition, when the electromagnetic wave 290 is irradiated, the oxygen gas is converted into plasma by the electromagnetic wave 290, and the oxygen The oxide 230C, the insulator 280, and the oxide 230b may form atomic radicals. The oxide 230a may be subjected to a plasma treatment in an atmosphere containing oxygen. Oxide 230C, insulator 28 formed by irradiation of electromagnetic waves 290 by oxygen radicals 0, oxide 230b, and oxygen vacancies V in oxide 230a O can be compensated for. As a result, while irradiating the electromagnetic wave 290, the oxide 230C, the insulator 280, and the oxide 230b, and V in oxide 230a O H, and oxygen-deficient V O can reduce do.

[0242] Next, an insulating film 250A is formed on the oxide 230C (see FIG. 11). The insulating film 250A is continuously formed without being exposed to the atmosphere after irradiation with the wave 290. As shown in FIGS. 2 and 3, the insulating film 250A is preferably formed by the PEALD method. Alternatively, it is preferable to form the insulating film 2 by using an ALD method such as a thermal ALD method. It is preferable to form a film of silicon oxide or silicon oxynitride as 50A. When the insulating film 250A is formed by the ALD method, the substrate temperature is set to be higher than 200° C., preferably By setting the temperature at 300°C or higher, more preferably 350°C or higher, the insulating film 250A and the insulating 280 and the hydrogen concentration in the oxide 230 can be reduced. When the insulating film 250A is formed by the ALD method, the substrate temperature is set to be higher than 300° C., preferably or 350° C. or higher, the insulating film 250A, the insulator 280, and the oxide 230 The hydrogen concentration contained in the catalyst can be reduced.

[0243] Here, as an example of an apparatus capable of forming a film using the ALD method, a film forming apparatus 4000 The configuration of this will be described with reference to Figures 15A and 15B. Figure 15A shows a multi-chamber 15B is a schematic diagram of a film forming apparatus 4000 of the type, and FIG. 15C is a schematic diagram of a film forming apparatus 4000 of the type, and FIG. FIG. 1 is a cross-sectional view of an ALD apparatus capable of

[0244] <Configuration example of film formation equipment> The film forming apparatus 4000 includes a carry-in / carry-out chamber 4002, a carry-in / carry-out chamber 4004, and a transfer chamber 4006. a film forming chamber 4008, a film forming chamber 4009, a film forming chamber 4010, a transfer arm 4014, Here, the loading / unloading chamber 4002, the loading / unloading chamber 4004, and the film forming chambers 4008 to 4010 are independently connected to the transfer chamber 4006. 08 to 4010, continuous film formation can be performed without exposure to the atmosphere, and impurities in the film can be eliminated. In addition, contamination of the interface between the substrate and the film, and the interface between each film, can be prevented. This reduces the surface area and results in a clean interface.

[0245] The carry-in / carry-out chamber 4002, the carry-in / carry-out chamber 4004, the transfer chamber 4006, and the film forming chamber 400 8 to 4010, in order to prevent adhesion of moisture, etc., inert gas (nitrogen gas) with controlled dew point is used. It is preferable to fill the tank with a gas such as chlorine or chlorine, and to maintain a reduced pressure.

[0246] In addition, ALD equipment can be used in the film formation chambers 4008 to 4010. A film forming apparatus other than an ALD apparatus may be used in any of the film chambers 4008 to 4010. The film forming apparatuses that can be used in the film forming chambers 4008 to 4010 include, for example, Sputtering equipment, Plasma Enhanced Chemical Vapor Deposition (PECVD) VD) equipment, thermal CVD (TCVD) equipment, optical CVD (Phot o CVD equipment, metal CVD (MCVD: Metal CVD) equipment, metal organic CVD (MOCVD: Metal Organic CVD) equipment, etc. There is also a film deposition chamber 4 008 to 4010, any one or more of which may be provided with a device having a function other than the film deposition device For example, a heating device (typically a vacuum heating device), a plasma generation device (typically a microwave plasma generation device), etc. can be mentioned.

[0247] For example, if the film deposition chamber 4008 is a sputtering device, the film deposition chamber 4009 is an ALD device , and the film deposition chamber 4010 is a metal CVD device, a metal oxide can be formed in the film deposition chamber 4008, and a film deposition chamber 4 An insulating film that functions as a gate insulating film in 009, and a conductive film that functions as a gate electrode can be formed in the film deposition chamber 4010 At this time, the metal oxide, the insulating film thereon, and the conductive film thereon can be continuously formed without exposing them to the atmosphere.

[0248] In addition, the film deposition apparatus 4000 has a loading / unloading chamber 4002, a loading / unloading chamber 4004, and a film deposition chamber 400 8 to 4010, but the present invention is not limited to this. The film deposition The film deposition chamber of the apparatus 4000 may be configured to have four or more film deposition chambers. Also, the film deposition chamber of the film deposition apparatus 4000 It may be configured to have two or one film deposition chambers. Also, the film deposition apparatus 4000 may be a single wafer type or a batch type for depositing films on a plurality of substrates at once.

[0249] <ALD device> Next, the configuration of the ALD device that can be used in the film deposition apparatus 4000 will be described with reference to FIG. 15B The ALD device includes a film deposition chamber (chamber 4020) and a raw material supply unit 4021 (raw material supply units 4021a and 4021b), raw material supply unit 4031 and introduction amount controller High-speed valves 4022a and 4022b and a raw material inlet 4023 (raw material inlet 4023a , and 4023b), raw material inlet 4033, raw material outlet 4024, and exhaust device 402 5. Raw material inlets 4023a, 4023b and and 4033 are supplied to raw material supply sections 4021a, 4021b, and 4033 via supply pipes and valves. 31, and the raw material discharge port 4024 is connected to a discharge pipe, a valve, and a pressure regulator. It is connected to the exhaust device 4025 via the exhaust device 4025.

[0250] Also, as shown in FIG. 15B, a plasma generator 4028 is connected to the chamber 4020. This allows film formation by the PEALD method in addition to the thermal ALD method. The plasma generator 4028 is an inductively coupled plasma generator using a coil 4029 connected to a high frequency power source. Inductively Coupled Plasma (ICP) type The high frequency power source is preferably a pulse generator. Preferably, it is 1 MHz or more and 60 MHz or less, and more preferably, it is 10 MHz or more and 60 MHz or less. It can output power with frequencies such as 13.56MHz and 60MHz. In an ICP type plasma generator, the power generated from the substrate is It is also possible to generate plasma at a distance from the source. This makes it possible to suppress plasma damage to the substrate.

[0251] The PEALD method allows deposition at low temperatures without reducing the deposition rate, so it is suitable for deposition with low deposition efficiency. It is suitable for use in a single-wafer deposition system.

[0252] Inside the chamber, there is a substrate holder 4026 on which a substrate 40 is placed. 30 is placed on the substrate holder 4026. A mechanism for applying a constant potential or high frequency is provided. Alternatively, the substrate holder 4026 may be floating. The outer wall of the chamber is provided with a heater 4027. , the temperature inside the chamber 4020, the substrate holder 4026, the surface of the substrate 4030, etc. The heater 4027 can control the temperature of the surface of the substrate 4030 to 100°C or more. It is preferable that the temperature can be controlled to 0°C or less, preferably 200°C or more and 400°C or less. It is preferable that the temperature of 4027 itself can be set to 100°C or higher and 500°C or lower.

[0253] In the raw material supply units 4021a, 4021b, and 4031, the raw material is supplied by a vaporizer, a heating means, etc. A raw material gas is formed from a solid raw material or a liquid raw material by the raw material supply unit 4021a. 4021b and 4031 may be configured to supply gaseous raw material gas.

[0254] In addition, in FIG. 15B, two raw material supply units 4021 and one raw material supply unit 4031 are provided. However, the present embodiment is not limited to this. Alternatively, three or more raw material supply units 4031 may be provided. The fast valves 4022a and 4022b can be precisely controlled in time, and the raw material supply unit 402 The supply of the raw material gas supplied from the raw material supply unit 4021a and the raw material gas supplied from the raw material supply unit 4021b is controlled. It is configured to control the

[0255] In the film forming apparatus shown in FIG. 15B, the substrate 4030 is carried onto the substrate holder 4026. After the bar 4020 is sealed, the heater 4027 heats the substrate 4030 to a desired temperature (e.g., For example, the temperature is 100°C or higher and 500°C or lower, preferably 200°C or higher and 400°C or lower. The raw material gas is supplied from the supply unit 4021a, exhausted by the exhaust device 4025, and The raw material gas is supplied from the supply unit 4031 and exhausted by the exhaust device 4025. In forming the thin film, a raw material supply unit The source gas may be supplied from 4021b and exhausted by an exhaust device 4025. The temperature of the heater 4027 is controlled depending on the type of film to be formed, the source gas, the desired film quality, the substrate, and the surface thereof. The temperature may be determined appropriately depending on the heat resistance of the film or element. The film may be formed by setting the temperature at 200°C or higher and 300°C or lower, or at 300°C or higher and 500°C or lower. The film may be formed by setting the following.

[0256] By heating the substrate 4030 using the heater 4027 while forming the film, it is possible to The heating treatment of the substrate 4030 can be omitted. By using the chamber 4020 or the film forming apparatus 4000, the film on the substrate 4030 can be formed. The formation and the heat treatment of the substrate 4030 can be performed at the same time.

[0257] In the film forming apparatus shown in FIG. 15B, the raw materials (volatile materials) used in the raw material supply units 4021 and 4031 are By appropriately selecting the appropriate compound (e.g., volatile organometallic compound), the silicon oxide shown in Figures 2 and 3 can be When forming a silicon oxide film, the first raw material supply unit 40 A precursor containing silicon is supplied from 21. The precursor containing silicon is The precursors mentioned above can be used. The reactant may include, for example, at least one of ozone and oxygen. It is preferable that the oxidizing agent does not contain hydrogen.

[0258] FIG. 16 illustrates different configurations of ALD apparatuses that can be used for the film formation apparatus 4000. The same configuration and functions as those of the ALD apparatus shown in FIG. 15B are described in detail below. The explanation may be omitted.

[0259] FIG. 16A is a schematic diagram showing one embodiment of a PEALD apparatus. The PEALD apparatus 4100 includes: A reaction chamber 4120 and a plasma generation chamber 4111 are provided above the reaction chamber 4120. The reaction chamber 4120 can be called a chamber. Alternatively, the reaction chamber 4120 and the plasma generation chamber The reaction chamber 4120 is connected to the raw material inlet port. The plasma generation chamber 4111 has a raw material inlet 413 and a raw material outlet 4124. 3. In addition, a plasma generating device 4128 generates high frequency waves such as RF and microwaves. The gas introduced into the plasma generation chamber 4111 is applied, and plasma is generated in the plasma generation chamber 4111. 4131 can be generated. When generating plasma 4131 using microwaves Typically, microwaves with a frequency of 2.45 GHz are used. The plasma generated using ECR (Electron Cyclotron Resonance) The reaction chamber 4120 may be called a plasma. The raw material gas introduced from the raw material inlet 4123 is The gas is decomposed by the heat from the heater provided in the reaction chamber 4120 and deposited on the substrate 4130. The raw material gas introduced from the raw material inlet 4133 is fed to the plasma generating device 412. The raw material gas in the plasma state reaches the surface of the substrate 4130. On the way there, they recombine with electrons and other molecules, becoming radicals and reaching the substrate 4130 . In this way, the ALD equipment that forms films using radicals is called radical ALD (Radic ALD). It is also called a PEALD (Pleated ALD) system. 0 shows a configuration in which the plasma generation chamber 4111 is provided above the reaction chamber 4120, The present embodiment is not limited to this. They may be provided adjacent to each other.

[0260] FIG. 16B is a schematic diagram showing one embodiment of a PEALD apparatus. The PEALD apparatus 4200 includes: The chamber 4220 includes an electrode 4213, a raw material outlet 4214, and a 224, has a substrate holder 4226 on which a substrate 4230 is placed. The raw material gas is introduced into the chamber 4220 through a raw material inlet 4223 and a shutter 4224 for supplying the introduced raw material gas into the chamber 4220. The electrode 4213 has a power head 4214. The electrode 4213 is connected to a capacitor 4217. A power supply 4215 capable of applying high frequency is connected to the substrate holder 4226. Alternatively, a mechanism for applying a potential or a high frequency may be provided. 226 may be floating or grounded. The plate holder 4226 is provided with an upper electrode for generating plasma 4231 and a lower electrode for generating plasma 4232. The raw material gas introduced from the raw material inlet 4223 flows into the chamber 422 The material is decomposed by heat from a heater provided in the substrate 4230 and deposited on the substrate 4230. The source gas introduced from the source inlet 4223 is passed through the electrode 4213 and the substrate holder 4226. The raw material gas in the plasma state is transferred to the plasma 4231 and the substrate. The electrons are incident on the substrate 4230 due to a potential difference (also called an ion sheath) generated between the electrodes 4230 .

[0261] Figure 16C is a schematic diagram showing an embodiment of a PEALD apparatus different from that shown in Figure 16B. The LD device 4300 has a chamber 4320. The chamber 4320 is provided with an electrode 4 313, a raw material outlet 4324, a substrate holder 4326, and a substrate 4330 disposed thereon. The electrode 4313 is connected to the raw material inlet 4323 and the chamber 43 The electrode 4313 has a shower head 4314 that supplies the gas into the inside of the electrode 4313. A power supply 4315 capable of applying high frequency is connected via a capacitor 4317. 4326 may be provided with a mechanism for applying a constant potential or high frequency. Alternatively, the substrate holder 4326 may be floating or grounded. The pole 4313 and the substrate holder 4326 are respectively used to generate the plasma 4331. The PEALD device 4300 includes an electrode 4313 and a lower electrode. A power supply 432 capable of applying high frequency power through a capacitor 4322 is connected between the substrate holder 4326. 4200 in that it has a mesh 4319 to which the 1 is connected. By providing the mesh 4319, the plasma 4231 can be separated from the substrate 4130. The raw material gas introduced from the raw material inlet 4323 is passed through the heater provided in the chamber 4320. The material is decomposed by the heat from the heater and deposited on the substrate 4330. The source gas introduced from the electrode 4313 is formed into a plasma state between the electrode 4313 and the substrate holder 4326. The source gas in the plasma state has its electric charge removed by the mesh 4319, Radicals and other ions reach the substrate 4130 in an electrically neutral state. This allows for film formation with reduced damage caused by plasma.

[0262] <Film formation sequence> FIG. 17A shows a film formation sequence using the ALD apparatus shown in FIG. A substrate 4030 is set on a substrate holder 4026 in a bar 4020 (S101). The temperature of the heater 4027 is adjusted (S102). The substrate 4030 is held on the substrate holder 4026 so as to be uniform (S103). Precursor and reactant are introduced alternately into chamber 4020 with purging in between. Then, a film is formed on the substrate 4030 (S104). A process for creating an oxygen atmosphere inside the member 4020 may be performed. After the heating and holding, the inside of the chamber 4020 is made into an oxygen atmosphere, and the substrate 4030 and Oxygen may be added to the film formed on the substrate 4030. Hydrogen may be desorbed from the film provided on the substrate 403 and the substrate 403. Hydrogen in the film or in the substrate 4030 reacts with oxygen added to the film or in the substrate 4030 to form water. (H2O) and may be released from the substrate 4030 or film.

[0263] FIG. 17B shows a specific example of the film formation sequence. Therefore, the substrate 4030 is set on the substrate holder 4026, and the temperature of the heater 4027 is adjusted. and holds the substrate 4030.

[0264] Next, precursor and reactant are introduced alternately to form a film on the substrate 4030. (S104). The precursor and reactant are introduced in pulses. In Figure 17B, the introduction of the precursor and reactant is indicated by ON, and the introduction of the raw material gas is indicated by ON. The period when the precursor and reactant are not introduced is indicated by OFF. When neither of these is introduced, the chamber 4020 is purged. The pulse time for introducing the precursor into O20 is 0.1 seconds or more and 1 second or less, preferably 0. It is preferable that the time is 1 second or more and 0.5 seconds or less. That is, the time for purging the inside of the chamber 4020 is preferably 0.05 seconds or more and 30 seconds or less. The pulse time for introducing reactant into the chamber 4020 is between 1 and 20 seconds. The time is preferably 0.1 seconds or more and 30 seconds or less, and more preferably 0.3 seconds or more and 15 seconds or less. In addition, during the period when the reactant is not introduced, i.e., during the period when the reactant is not introduced into the chamber 4020, The time for the page is 0.05 seconds or more and 30 seconds or less, preferably 1 second or more and 20 seconds or less.

[0265] The film formation process involves the introduction of precursors, the exhaust of precursors, the introduction of reactants, and the exhaust of reactants. By repeating this cycle, a film having a desired thickness can be formed. is formed.

[0266] In addition, between S103 and S104, the inside of the chamber 4020 is made into an oxygen atmosphere. If so, a reactant may be introduced into the chamber 4020. The reactant may be: A gas selected from ozone (O3), oxygen (O2), and water (H2O) acts as an oxidizing agent. In this embodiment, the reactant is an onion. The reactants are ion (O3) and oxygen (O2). It is preferable that the gas is introduced in pulses, as in the method described above, but the present invention is not limited to this. The reactant may be introduced continuously. During the period when no reactant is introduced, The chamber 4020 is purged. A pulse is applied to introduce reactant into the chamber 4020. The time is preferably 0.1 seconds or more and 30 seconds or less, and more preferably 0.3 seconds or more and 15 seconds or less. In addition, during the period when the reactant is not introduced, i.e., during the period when the reactant is not introduced into the chamber 4020, The time for the change is from 1 to 30 seconds, preferably from 1 to 20 seconds. By introducing a reactant such as an oxidant into the bar 4020, the substrate 4030 or The membrane disposed on 4030 is exposed to a reactant such as an oxidant.

[0267] After the substrate 4030 is set (S101), if temperature adjustment of the heater 4027 is not required, In this case, the step may be omitted. If it is not necessary to create an oxygen atmosphere inside, this step may be omitted.

[0268] By forming the insulating film 250A using the ALD apparatus described above, the insulating film 250A shown in FIGS. The insulating film 250A can be formed in the model shown in FIG. 0A, the hydrogen concentration in the insulator 280 and the oxide 230 can be reduced. The carrier concentration in the oxide 230 is 1.0 × 10 16 / cm 3 Below 1.0, preferably x10 13 / cm 3 The transistor using such an oxide 230 can be The transistor can be made to have normally-off characteristics and is a semiconductor with good electrical properties and reliability. A conductor device can be constructed.

[0269] Next, the conductive film 260Aa and the conductive film 260Ab are formed. The conductive film 260Ab can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an A method. This can be done using the LD method or the like. For example, it is preferable to use the CVD method. In this embodiment, the conductive film 260Aa is formed by the ALD method, and the conductive film 260B is formed by the CVD method. 260Ab is deposited (see Figure 12).

[0270] Next, the oxide film 230C, the insulating film 250A, the conductive film 260Aa, and The oxide 230 is removed by polishing the conductive film 260Ab until the insulator 280 is exposed. c, forming the insulator 250 and the conductor 260 (the conductor 260a and the conductor 260b). (See Figure 13.)

[0271] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for 1 hour. The moisture concentration in the insulators 250 and 280 is reduced by the heat treatment. The degree and hydrogen concentration can be reduced.

[0272] Next, on the conductor 260, on the oxide 230c, on the insulator 250, and on the insulator 280 , the insulator 282 is formed. The insulator 282 is formed by a method such as sputtering, CVD, MB This can be done using the E method, PLD method, ALD method, or the like (see Figure 14). The insulating film 282 is formed by sputtering aluminum oxide. It is preferable to form the insulator 282 by sputtering in an atmosphere containing oxygen. By performing the deposition in this manner, oxygen can be added to the insulator 280 during deposition. In this case, it is preferable to form the insulator 280 while heating the substrate. By forming an insulator 282 in contact with the upper surface of 60, the insulating This is preferable because it can prevent oxygen contained in the conductive material 280 from being absorbed into the conductive material 260. It's nice.

[0273] Next, an insulator 283 is formed on the insulator 282 (see FIG. 14). As with the insulator 250, it is preferable to form the insulator 283 by the PEALD method. It is preferable to form a film of silicon nitride or silicon nitride oxide. The film formation may be performed in the same manner as shown in FIGS. 2 and 3. Nitrogen radicals are used. Nitrogen radicals are obtained by converting nitrogen gas into plasma. Nitrogen plasma contains nitrogen in the form of molecules, radicals, or ions. For example, applying high frequency waves such as RF or microwaves to nitrogen gas creates nitrogen radicals. At this time, the reactant 20 does not contain hydrogen. It is preferable that there is no

[0274] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for one hour. The acid added by the formation of the insulator 282 is removed by the heat treatment. The element is diffused into the insulator 280, and then through the oxide 230c to the oxide 230a and The heat treatment can be performed after the formation of the insulator 283. It may be performed after the insulator 282 is formed.

[0275] As shown in FIG. 3, the electromagnetic wave 292 is applied to the oxide 230, the insulator 250, and the insulating layer 260. The light may be irradiated onto the insulator 280, the insulator 282, and the insulator 283 (see FIG. 14). The electromagnetic wave 292 may be a microwave or a high frequency wave such as RF. The electromagnetic wave 292 penetrates the oxide 230, the insulator 250, and the insulator 280, V among others O H is removed. Some of the hydrogen generated at this time combines with oxygen to form H2O. In addition, some of the hydrogen may be removed from the oxide 230 and the insulator 280. In addition, when the electromagnetic wave 292 is irradiated, the electric The oxygen gas may be converted into plasma by the magnetic wave 292 to form oxygen radicals. The oxide 230, the insulator 250, the insulator 280, the insulator 282, and the insulator 283a are covered with oxygen. In this manner, the oxide 230 and the insulating film 232 are formed. The hydrogen concentration in the body 250 and the insulator 280 can be reduced.

[0276] The irradiation of the electromagnetic wave 292 is not limited to after the insulator 283 is formed. This may be performed immediately after the formation of the conductor 260 or after the formation of the insulator 282. For example, as shown in FIGS. 2 and 3, the reactant introduction step for forming the insulator 283 It may also be done in.

[0277] Next, the insulator 274 may be deposited on the insulator 283. The deposition of the insulator 274 may be performed by This can be done using methods such as quartz deposition, CVD, MBE, PLD, or ALD. can.

[0278] Next, an insulator 281 may be deposited on the insulator 274. The deposition of the insulator 281 may be performed by a spat This can be done using methods such as quartz deposition, CVD, MBE, PLD, or ALD. The insulator 281 can be formed of silicon nitride by, for example, a sputtering method. It is preferable to coat the surface.

[0279] Next, the insulator 272, the insulator 273, the insulator 280, the insulator 282, the insulator 283, the insulator The edge 274 and the insulator 281 are provided with openings that reach the conductors 242a and 242b. The opening may be formed by using a lithography method.

[0280] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator The insulating film 241 is formed by sputtering, CVD, MBE, PL The insulating film to be the insulator 241 can be formed by the ALD method or the ALD method. It is preferable to use an insulating film having a function of suppressing oxygen permeation. Similar to the formation of the insulator 283, it is preferable to form a silicon nitride film using the PEALD method. Silicon nitride is preferred because it has a high blocking property against hydrogen.

[0281] The anisotropic etching of the insulating film that becomes the insulator 241 may be, for example, dry etching. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be prevented from entering. This suppresses the permeation of the conductor 240a and the conductor 240b to be formed next, thereby preventing oxidation. In addition, impurities such as water and hydrogen can be removed from the conductors 240a and 240b. It can prevent the spread to the outside.

[0282] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that becomes the conductor 240b has a function of suppressing the permeation of impurities such as water and hydrogen. It is desirable to use a laminated structure containing a conductive material such as tantalum nitride or titanium nitride. The conductor 24 may be a laminate of tungsten, molybdenum, copper, or the like. The conductive film that becomes 0 is formed by the sputtering method, CVD method, MBE method, PLD method or AL method. This can be done using Method D or the like.

[0283] Next, a CMP process is performed to remove the conductive film that will become the conductors 240a and 240b. A portion of the insulating film is removed to expose the insulator 281. As a result, the conductive film remains only in the opening. By doing so, it is possible to form the conductors 240a and 240b with flat upper surfaces ( (See FIG. 1.) Note that the CMP process may remove a portion of the insulator 281. .

[0284] Next, a conductive film that will become the conductor 246 is formed. It can be performed using methods such as sputtering, CVD, MBE, PLD, or ALD. can.

[0285] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240a and a conductor 246b in contact with the upper surface of the conductor 240b. (See Figure 1.)

[0286] Through the above steps, a semiconductor device including the transistor 200 shown in FIG. 1 can be manufactured. As shown in FIGS. 5 to 14, the semiconductor device can be manufactured by using the manufacturing method of the semiconductor device described in this embodiment mode. In this way, the transistor 200 can be manufactured.

[0287] According to one embodiment of the present invention, a semiconductor device with favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be manufactured. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a highly productive semiconductor device can be provided. can be provided.

[0288] The configurations, methods, etc. shown in this embodiment may be applied to other embodiments and examples. The configuration, structure, method, etc. can be used in appropriate combination.

[0289] (Embodiment 2) In this embodiment, one mode of a semiconductor device will be described with reference to FIGS.

[0290] [Storage device 1] FIG. 18 shows an example of a semiconductor device (memory device) using a capacitor according to one embodiment of the present invention. In the semiconductor device of one embodiment of the present invention, the transistor 200 is disposed above the transistor 300. The capacitor element 100 is provided above the transistor 300 and the transistor 200. The transistor 200 may be the same as the transistor described in the previous embodiment. Sta 200 can be used.

[0291] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This allows the memory contents to be retained for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0292] In the semiconductor device shown in FIG. 18, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of transistor 300 and the other of the source and drain of transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. It is electrically connected to the other.

[0293] In addition, the memory device shown in FIG. 18 has a memory cell array arranged in a matrix. It can be configured.

[0294] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 that functions as a gate. , an insulator 315 serving as a gate insulator, and a semiconductor region 311 consisting of a portion of a substrate 311. 3, and a low resistance region 314a which functions as a source region or a drain region, and a low The transistor 300 may be a p-channel or n-channel It can be of any type.

[0295] Here, the transistor 300 shown in FIG. 18 has a semiconductor region 313 ( The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may also be used. It is also called a FIN type transistor because it uses a convex part. In addition, the insulating layer may have an insulating material that functions as a mask for forming the convex portions. Here, we have shown a case where a protrusion is formed by processing a part of a semiconductor substrate, but it is also possible to process an SOI substrate. A semiconductor film having a convex shape may be formed by the above process.

[0296] The transistor 300 shown in FIG. 18 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure and driving method.

[0297] <Capacitor element 100> The capacitor 100 is provided above the transistor 200. a conductor 110 serving as the first electrode and a conductor 120 serving as the second electrode; and an insulator 130 that functions as a dielectric.

[0298] Also, for example, the conductor 112 provided on the conductor 240 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used in the capacitor 100, the transistor 200, and has a function as a plug or wiring electrically connected to the transistor 300.

[0299] In FIG. 18, the conductor 112 and the conductor 110 are shown as single-layer structures, but the present invention is not limited to this configuration. For example, a conductive material having a barrier property and a conductive material having a high conductivity may be used. Conductors with barrier properties between weak conductors and highly conductive conductors with good adhesion may form a highly conductive material.

[0300] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum nitride oxide, nitride Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride The material may be aluminum or the like, and may be provided as a laminated layer or a single layer.

[0301] For example, the insulator 130 may be made of a material with high dielectric strength such as silicon oxynitride and a material with high dielectric strength such as silicon oxynitride. It is preferable to use a laminated structure with a high-k material. The element 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By using an insulator with a high dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0302] In addition, oxide is used as an insulator for high dielectric constant (high-k) materials (materials with high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium, oxide nitrides having silicon and hafnium, or oxide nitrides having silicon and hafnium Nitrides containing fluorine are also included.

[0303] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, silicon oxide with vacancies Examples include concrete or resin.

[0304] <Wiring layer> Between each structure, a wiring layer including an interlayer film, wiring, plugs, etc. is provided. In addition, multiple wiring layers can be provided depending on the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in this specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, when a part of the conductor functions as a wiring, or when the conductor Some may also function as plugs.

[0305] For example, an insulator 320, an insulator 322, an insulator 323, and an insulator 324 are provided over the transistor 300 as interlayer films. The insulating member 320, the insulating member 324, and the insulating member 326 are stacked in this order. The insulators 322, 324, and 326 are connected to the capacitive element 100 or the transistor. The conductive material 328 and the conductive material 330 are embedded in the conductive material 328 and the conductive material 330. The conductors 328 and 330 function as plugs or wiring.

[0306] In addition, the insulator that functions as an interlayer film acts as a planarizing film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be subjected to chemical mechanical polishing (CMP) to improve flatness. The surface may be planarized by a planarization process using a CMP method or the like.

[0307] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring.

[0308] Similarly, the insulators 210, 212, 214, and 216 are electrically conductive. The conductive material 218 and the conductive material (conductive material 205) that constitutes the transistor 200 are embedded. Note that the conductor 218 is electrically connected to the capacitor 100 or the transistor 300. The conductor 120 and the insulator 130 function as a plug or wiring. An insulator 150 is provided on 130 .

[0309] Here, similar to the insulator 241 shown in the above embodiment, the conductor 2 An insulator 217 is provided in contact with the side surface of the insulator 18. The insulator 217 is 212, insulator 214, and insulator 216 are provided in contact with the inner walls of the openings formed therein. That is, the insulator 217 is made up of the conductor 218, the insulator 210, the insulator 212, and the insulator 214 and the insulator 216. 18, the insulator 217 is in contact with the side of the conductor 205. Sometimes it may be formed.

[0310] The insulator 217 may be, for example, silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 217 may be an insulator such as silicon. and insulator 222, so that water is not absorbed from insulator 210 or insulator 216, etc. Alternatively, impurities such as hydrogen are prevented from being mixed into the oxide 230 through the conductor 218. In particular, silicon nitride is suitable because it has a high blocking property against hydrogen. In addition, oxygen contained in the insulator 210 or the insulator 216 is absorbed into the conductor 218. This can be prevented.

[0311] Insulator 217 can be formed in a similar manner to insulator 241. For example, PEA Silicon nitride is deposited using the LD method, and anisotropic etching is performed to reach the conductor 356. An opening can be formed to allow the hole to be opened.

[0312] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides that have insulating properties. Examples of such materials include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0313] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0314] For example, the insulators 150, 210, 352, and 354 have relatively It is preferable to have an insulator with a low dielectric constant, for example silicon oxynitride. , silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, carbon and and silicon oxide with nitrogen added, silicon oxide or resin with pores. Alternatively, the insulator is preferably silicon oxide, silicon oxynitride, or silicon nitride oxide. silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Lamination of silicon oxide with added silicon and nitrogen or silicon oxide with pores and resin Silicon oxide and silicon oxynitride are thermally stable. Therefore, by combining it with resin, it is possible to create a laminated structure that is thermally stable and has a low dielectric constant. Examples of resins include polyester, polyolefin, polyamide (nylon), Examples include polyethylene, aramid, polyimide, polycarbonate, or acrylic.

[0315] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 214, 212, and 350 can be filled with hydrogen and the like. An insulator having a function of suppressing the permeation of impurities and oxygen may be used.

[0316] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon nitride oxide, silicon nitride, etc. can be used. .

[0317] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as silicon, Silicides such as nickel silicide may also be used.

[0318] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., include metal materials, alloy materials, metal nitride materials, or Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. It is preferable to use a high-melting-point material such as tungsten or molybdenum, which is also electrically conductive. It is preferable to use tungsten. Alternatively, low-resistance conductive materials such as aluminum and copper may be used. It is preferable to form the wiring from a low-resistance conductive material. can be done.

[0319] <Wiring or plug in layer provided with oxide semiconductor> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region and an insulator having a barrier property is provided between the insulator having the excess oxygen region and a conductor provided on the insulator. It is preferable to provide such a function.

[0320] For example, in FIG. 18, insulator 224 and insulator 280 have excess oxygen, and conductor 2 40. The insulator 241, the insulator 222, and the insulator 241 are preferably provided between the insulator 241 and the insulator 222. 72 and the insulator 273 are provided in contact with each other, The star 200 can be sealed with an insulating material having barrier properties. In addition, it is preferable that the insulator 241 also contacts a part of the insulator 280. By extending to the insulator 274, the diffusion of oxygen and impurities can be further suppressed. do.

[0321] In other words, by providing the insulator 241, the excess of the insulators 224 and 280 It is possible to suppress the absorption of oxygen into the conductor 240. By having this, hydrogen, which is an impurity, diffuses into the transistor 200 through the conductor 240. This can prevent the following from happening:

[0322] The insulator 241 is made of a material that suppresses the diffusion of impurities such as water or hydrogen, and oxygen. For example, silicon nitride, silicon nitride oxide, It is preferable to use aluminum oxide or hafnium oxide. In particular, silicon nitride Magnesium oxide is preferred because it has a high blocking property against hydrogen. Nesium, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, acid Metal oxides such as lanthanum oxide, neodymium oxide, or tantalum oxide can be used. do.

[0323] The above is a description of the configuration example. By using this configuration, In semiconductor devices using transistors, the fluctuation of electrical characteristics is suppressed and reliability is improved. Alternatively, a transistor including an oxide semiconductor with a large on-state current can be provided. Alternatively, a transistor including an oxide semiconductor and having a low off-state current can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. do.

[0324] [Storage device 2] FIG. 19 illustrates an example of a memory device using a semiconductor device according to one embodiment of the present invention. The memory device shown in FIG. 18 includes the transistor 200, the transistor 300, and the capacitor In addition to the semiconductor device having the capacitor 100, the semiconductor device also has a transistor 400.

[0325] The transistor 400 can control the second gate voltage of the transistor 200. For example, the first gate and the second gate of the transistor 400 are connected to the source and the diode. and connect the source of transistor 400 to the second gate of transistor 200. In this configuration, when the second gate of the transistor 200 is held at a negative potential, the transistor The first gate-source voltage and the second gate-source voltage of the transistor 400 are In the transistor 400, the second gate voltage and the first gate voltage The drain current at 0V is very small, so the transistor 200 and the transistor Even if power is not supplied to the transistor 400, the negative potential of the second gate of the transistor 200 can be maintained for a long time. This allows the transistor 200 and the transistor 400 to be maintained. A storage device having the above structure can retain stored contents for a long period of time.

[0326] Therefore, in FIG. 19, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the gate of the transistor 200, and the wiring 1006 is electrically connected to the gate of the transistor 200. The back gate of the transistor 300 is electrically connected to the back gate of the transistor 200. The gate and the other of the source and drain of the transistor 200 are connected to the capacitor 100. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. The wiring 1007 is electrically connected to the source of the transistor 400. The wiring 1008 is electrically connected to the gate of the transistor 400, and the wiring 1009 is electrically connected to the gate of the transistor 400. The wiring 1010 is electrically connected to the back gate of the transistor 400. Here, the wiring 1006, the wiring 1007, the wiring 1008, and a wiring 1009 are electrically connected.

[0327] 19 is arranged in a matrix, similar to the storage device shown in FIG. By doing so, a memory cell array can be configured. 0 can control the second gate voltages of the plurality of transistors 200. It is preferable to provide fewer transistors 400 than transistors 200.

[0328] <Transistor 400> The transistor 400 is formed in the same layer as the transistor 200 and is fabricated in parallel. The transistor 400 functions as a first gate. Conductor 460 (conductor 460a and conductor 460b) serving as a second gate. The functional conductor 405 (conductor 405a and conductor 405b) and the gate insulating layer The insulator 222 functions as a gate insulator, and the insulator 450 and the oxide 43 having the channel forming region are formed. 0c, a conductor 442a serving as a source, an oxide 443a, an oxide 431a, and and oxide 431b, a conductor 442b functioning as a drain, oxide 443b, and oxide 432a, and oxide 432b, and a conductor 440 (conductor 440) that functions as a plug. a, and conductor 440b), and an insulator that functions as a barrier insulating film for conductor 440 441 (insulator 441a and insulator 441b).

[0329] In the transistor 400, the conductor 405 is the same layer as the conductor 205. The oxide 431a and oxide 432a are the same layer as the oxide 230a. b, and oxide 432b are the same layer as oxide 230b. Oxide 443 is the same layer as oxide 243. Oxide 4 The oxide 30c is the same layer as the oxide 230c. The insulator 450 is the same layer as the insulator 250. The conductor 460 is in the same layer as the conductor 260. The conductor 440 is in the same layer as the conductor 24. The insulator 441 is the same layer as the insulator 241.

[0330] It should be noted that structures formed in the same layer can be formed simultaneously. For example, oxide 4 The oxide 30c can be formed by processing an oxide film that will become the oxide 230c.

[0331] The oxide 430c that functions as the active layer of the transistor 400 is the same as the oxide 230. Similarly, oxygen vacancies are reduced, and impurities such as hydrogen and water are reduced. The threshold voltage of the transistor 400 is set to be greater than 0 V, the off-state current is reduced, and the second gate The drain current when the first gate voltage and the second gate voltage are 0 V can be made very small. do.

[0332] <Dicing line> In the following, a large-area substrate is divided into individual semiconductor elements to form multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The dividing method is as follows: First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the substrate is cut by a grinder and divided (divided) into a plurality of semiconductor devices.

[0333] Here, for example, as shown in FIG. 19, the area where the insulator 272 and the insulator 222 contact each other It is preferable to design the dicing line so that the 200, and a dicing line provided on the outer edge of the transistor 400. An opening is provided in the insulator 224 near the region where the insulator 224 is to be inserted. An insulator 272 is provided to cover the

[0334] That is, in the opening provided in the insulator 224, the insulator 222 and the insulator 272 For example, in this case, the insulators 222 and 272 are made of the same material and by the same method. The insulator 222 and the insulator 272 may be formed using the same material and method. For example, it is preferable to use aluminum oxide. It's nice.

[0335] With this structure, the insulator 222 and the insulator 272 are insulator 224, the transistor 200, and can encapsulate the transistor 400. Insulator 222, and The body 272 has a function of suppressing the diffusion of oxygen, hydrogen, and water. The substrate is divided into multiple chips by dividing it into circuit regions where semiconductor elements shown in Even if the substrate is processed into a chip, impurities such as hydrogen or water may enter from the side of the cut substrate, causing a trap. Therefore, diffusion to the transistor 200 and the transistor 400 can be prevented.

[0336] In addition, this structure allows excess oxygen in the insulator 224 to pass through the insulator 272 and the insulator 222. Therefore, the excess oxygen in the insulator 224 can be prevented from diffusing to the outside through the The channel in the transistor 200 or the transistor 400 is formed efficiently. The oxide is supplied to the transistor 200 or the transistor 400. This reduces the oxygen vacancies in the oxide in which the channel is formed. The oxide on which the channel of the transistor 200 or the transistor 400 is formed is An oxide semiconductor having a low density of defect states and stable characteristics can be obtained. The fluctuation of the electrical characteristics of the transistor 200 or 400 is suppressed, and reliability is improved. It can improve the performance.

[0337] The configurations, methods, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The structure, method, etc. can be used in appropriate combination.

[0338] (Embodiment 3) In this embodiment, a semiconductor device using an oxide according to one embodiment of the present invention will be described with reference to FIGS. 20 and 21. Transistors used as conductors (hereinafter sometimes referred to as OS transistors) and capacitors This section explains the storage device to which the OS is applied (hereinafter, sometimes referred to as the OS memory device). The OS memory device includes at least a capacitance element and an OS transistor that controls the charging and discharging of the capacitance element. The off-state current of the OS transistor is extremely small. The memory device has excellent retention characteristics and can function as a non-volatile memory.

[0339] <Storage device configuration example> 20A shows an example of the configuration of an OS memory device. 1, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 1420, It includes a column circuit 1430, an output circuit 1440, and a control logic circuit 1460.

[0340] The column circuits 1430 include, for example, column decoders, precharge circuits, sense amplifiers, and write The precharge circuit has the function of precharging the wiring. The sense amplifier has a function of amplifying the data signal read from the memory cell. The above wiring is a wiring connected to a memory cell included in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal. RDATA to the outside of the storage device 1400. For example, it has a row decoder, a word line driver circuit, etc., and can select a row to access. do.

[0341] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 The high power supply voltage (VDD) for the 11 and the high power supply voltage (VIL) for the memory cell array 1470 are The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data is input to the decoder and column decoder, and WDATA is input to the write circuit.

[0342] The control logic circuit 1460 processes external input signals (CE, WE, RE). It processes the signal to generate control signals for the row decoder and column decoder. CE is the chip enable signal. where WE is the write enable signal and RE is the read enable signal. The signals processed by the control logic circuit 1460 are not limited to these. Instead, other control signals may be input as required.

[0343] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc.

[0344] In FIG. 20A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. However, the present embodiment is not limited to this. For example, As shown in FIG. 20B, a memory cell array 1470 is overlapped on a part of the peripheral circuit 1411. For example, the memory cell array 1470 may be provided so as to overlap the memory cell array 1470. A sense amplifier may be provided.

[0345] FIG. 21 illustrates an example of the configuration of a memory cell that can be applied to the above-described memory cell MC.

[0346] [DOSRAM] 21A to 21C show examples of circuit configurations of memory cells in a DRAM. DRAM using a memory cell with one OS transistor and one capacitor element is called DOSRAM. (Dynamic Oxide Semiconductor Random Acce. The memory cell 1471 shown in FIG. 21A is a The transistor M1 has a gate (floor It has a gate (sometimes called a front gate) and a back gate.

[0347] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0348] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used to apply a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0349] Furthermore, the memory cells MC are not limited to the memory cells 1471, and the circuit configuration may be changed. For example, the memory cell MC can be configured as follows, as in the memory cell 1472 shown in FIG. The back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. Also, for example, the memory cell MC may be a memory cell 1473 shown in FIG. A transistor M having a single gate structure, i.e., a transistor without a back gate, The memory cell may be configured as 1.

[0350] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This means that the leakage current of the transistor M1 can be made very low. The frequency of memory cell refresh can be reduced by using register M1 for long-term retention. In addition, the refresh operation of the memory cells can be eliminated. In addition, since the leakage current is very low, the memory cells 1471, 1472, The memory cell 1473 can store multi-level data or analog data.

[0351] In addition, in the DOSRAM, as described above, the memory cell array 1470 is overlapped with the By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0352] [NOSRAM] 21D to 21H show the circuit of a gain cell type memory cell having two transistors and one capacitor. 21D shows an example of a circuit configuration. The memory cell 1474 shown in FIG. 21D includes a transistor M2 and a transistor The transistor M2 has a front gate. (sometimes simply referred to as a gate) and a back gate. A memory device having a gain cell type memory cell using an OS transistor as the transistor M2. , NOSRAM(Nonvolatile Oxide Semiconductor It is sometimes called RAM.

[0353] The first terminal of the transistor M2 is connected to the first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of transistor B is connected to the line CAL. The first terminal of transistor M3 is connected to the line R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to the first terminal of the capacitance element CB.

[0354] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL functions as the second wiring of the capacitance element CB. It functions as a wiring for applying a predetermined potential to the terminal. During the data read operation, a low level potential is applied to the wiring CAL. The wiring BGL is a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the The threshold voltage can be increased or decreased.

[0355] Furthermore, the memory cells MC are not limited to the memory cells 1474, and the circuit configuration may be changed as appropriate. For example, the memory cell MC can be a memory cell 1475 shown in FIG. In addition, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 1476 shown in FIG. As shown in the figure, a transistor with a single gate structure, i.e., a transistor without a back gate, For example, the memory cell MC may be configured as shown in FIG. As shown in FIG. 1G, the wiring WBL and the wiring RBL are connected to one wiring BIL. It may also be configured as a single unit.

[0356] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as the transistor M2, and the transistor 300 is used as the transistor M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very low. This allows the written data to be held for a long time by the transistor M2. This reduces the frequency of refreshing the memory cells. In addition, the memory cell refresh operation can be eliminated. Since the voltage is very low, multi-value data or analog data can be stored in the memory cell 1474. The same applies to memory cells 1475 to 1477.

[0357] The transistor M3 is a transistor having silicon in the channel forming region (hereinafter referred to as The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. The field effect mobility may be higher than that of a read transistor. A Si transistor may be used as the transistor M3 that functions as a By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since the memory cell can be provided with the transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0358] The transistor M3 may be an OS transistor. When OS transistors are used, the memory cell array 1470 is configured with only n-type transistors. A circuit can be constructed using the same.

[0359] FIG. 21H shows an example of a gain cell type memory cell having three transistors and one capacitor. The memory cell 1478 shown in FIG. 21H includes transistors M4 through M6 and a capacitive element C The memory cell 1478 has wirings BIL, RW L, WWL, BGL, and GNDL. The GNDL wiring is a low-level The memory cell 1478 is connected to the wiring R instead of the wiring BIL. It may be electrically connected to BL and WBL.

[0360] The transistor M4 is an OS transistor having a back gate. The back gate and gate of the transistor M4 are electrically connected to the wiring BGL. Alternatively, the transistor M4 may have a back gate. It's not necessary.

[0361] The transistors M5 and M6 are n-channel Si transistors or p-channel Si transistors. Alternatively, the transistors M4 to M6 may be OS transistors. In this case, the memory cell array 1470 is circuited using only n-type transistors. A path can be constructed.

[0362] When the semiconductor device described in the above embodiment is used for the memory cell 1478, the transistor M The transistor 200 is used as the transistor M4, and the transistors M5 and M6 are the transistors 300. The capacitor element CC can be a capacitor 100. By using an OS transistor as the gate driver, the leakage current of transistor M4 is very low. It can be made easier.

[0363] Note that the peripheral circuit 1411, the memory cell array 1470, and the like shown in this embodiment The configuration is not limited to the above. The arrangement or function of lines, circuit elements, etc. may be changed, deleted, or added as needed. stomach.

[0364] The configurations, methods, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The structure, method, etc. can be used in appropriate combination.

[0365] (Fourth embodiment) In this embodiment, a chip 1200 on which the semiconductor device of the present invention is mounted is shown in FIG. A chip 1200 is implemented with multiple circuits (systems). The technology of integrating multiple circuits (systems) on a single chip is called system-on-chip ( It is sometimes called System on Chip (SoC).

[0366] As shown in FIG. 22A, the chip 1200 includes a CPU (Central Processor). ing Unit) 1211, GPU (Graphics Processing Un) it) 1212, one or more analog calculation units 1213, one or more memory controllers controller 1214, one or more interfaces 1215, one or more network It has a clock circuit 1216 and the like.

[0367] The chip 1200 is provided with bumps (not shown), and as shown in FIG. 22B, First surface of printed circuit board (PCB) 1201 In addition, a plurality of bumps 1202 are provided on the back surface of the first surface of the PCB 1201. It is connected to the motherboard 1203.

[0368] The motherboard 1203 is equipped with memory devices such as a DRAM 1221 and a flash memory 1222. For example, the DRAM 1221 may be provided with a DOSR as shown in the previous embodiment. For example, the flash memory 1222 may be configured as The NOSRAM shown in FIG.

[0369] The CPU 1211 preferably has multiple CPU cores. It is preferable that the CPU 1211 and the GPU 1 have multiple GPU cores. Each of the CPs 212 may have a memory for temporarily storing data. The memory common to U1211 and GPU1212 is provided on chip 1200. The memory may be the above-mentioned NOSRAM or DOSRAM. The GPU1212 is also suitable for parallel calculation of large amounts of data, and is ideal for image processing and multiply-and-accumulate operations. The GPU 1212 can be used as an image processing circuit or By providing a multiply-and-accumulate circuit, image processing and multiply-and-accumulate operations can be performed with low power consumption. This becomes possible.

[0370] In addition, the CPU 1211 and GPU 1212 are mounted on the same chip, The wiring between the CPU1211 and GPU1212 can be shortened, and Data transfer from CPU 1211 to GPU 1212, memory After the data transfer between the GPUs and the calculations in GPU1212, the GPU1212 transfers the data to CPU12. The calculation results can be transferred to 11 at high speed.

[0371] The analog calculation unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital The analog calculation unit 1213 has one or both of a digital / analog conversion circuit. The product-sum calculation circuit may be provided in the

[0372] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. , and a circuit that functions as an interface to the flash memory 1222.

[0373] The interface 1215 includes a display device, a speaker, a microphone, a camera, a computer, and the like. The controller has an interface circuit with external devices such as a This includes devices such as mice, keyboards, and game controllers. USB (Universal Serial Bus), HDMI (registered trademark) High-Definition Multimedia Interface) You can be there.

[0374] The network circuit 1216 is a LAN (Local Area Network) or the like. It may also have a circuit for network security. stomach.

[0375] The above circuits (systems) can be formed on the chip 1200 in the same manufacturing process. Therefore, even if the number of circuits required for the chip 1200 increases, the manufacturing process can be increased. This eliminates the need for a soldering iron, and the chip 1200 can be produced at low cost.

[0376] A PCB 1201 on which a chip 1200 having a GPU 1212 is mounted, a DRAM 122 1 and a motherboard 1203 provided with a flash memory 1222. It can be called module 1204.

[0377] The GPU module 1204 includes a chip 1200 using SoC technology. Its size can be reduced. Also, it has excellent image processing capabilities, making it suitable for smart devices. Phones, tablets, laptops, portable (portable) game consoles, etc. It is suitable for use in portable electronic devices. Deep neural networks (DNNs), convolutional neural networks (CNN), recurrent neural network (RNN), autoencoder, deep Boltzmann It can perform operations such as deep belief networks (DBMs) and deep belief networks (DBNs). Therefore, the chip 1200 is an AI chip, or the GPU module 1204 is an AI system module. It can be used as a module.

[0378] The configurations, methods, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The structure, method, etc. can be used in appropriate combination.

[0379] (Embodiment 5) This embodiment mode will describe an application example of a memory device using the semiconductor device described in the above embodiment. The semiconductor device described in the above embodiment can be used in various electronic devices (for example, Terminals, computers, smartphones, e-book readers, digital cameras (including video cameras) The present invention can be applied to storage devices such as video recorders, video playback devices, and navigation systems. Here, the computer refers to a tablet computer, a notebook computer, or This includes desktop computers as well as large computers such as server systems. Alternatively, the semiconductor device according to the above embodiment may be used in a memory card (for example, D card), USB memory, SSD (Solid State Drive) and other removable media This is applied to removable storage devices. Figure 23 shows some configuration examples of removable storage devices. For example, the semiconductor device shown in the above embodiment is a packaged memory chip. It is processed into a flash memory and used in various storage devices and removable memory.

[0380] FIG. 23A is a schematic diagram of a USB memory. The USB memory 1100 includes a housing 1101, a keyboard 1102, a keyboard 1103, a keyboard 1104, a keyboard 1105, a keyboard 1106, a keyboard 1107, a keyboard 1108, a keyboard 1109, a keyboard 1110A, a keyboard 1110B, a keyboard 1110C, a keyboard 1 The device has a cap 1102, a USB connector 1103, and a circuit board 1104. The circuit board 1104 is , are housed in a housing 1101. For example, the substrate 1104 includes a memory chip 1105, The controller chip 1106 is attached to the memory chip 110 on the board 1104. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 5 or the like.

[0381] FIG. 23B is a schematic diagram of the external appearance of an SD card, and FIG. 23C is a schematic diagram of the internal structure of an SD card. The SD card 1110 includes a housing 1111, a connector 1112, and a board 111. The board 1113 is housed in a housing 1111. For example, the board 1113 has , memory chip 1114, and controller chip 1115 are mounted on the board 11. By providing a memory chip 1114 on the back side of the SD card 1110, the capacity of the SD card 1110 can be increased. In addition, a wireless chip having a wireless communication function may be provided on the substrate 1113. This allows the memory chip to communicate wirelessly between the host device and the SD card 1110. The data on the memory chip 1114 can be read and written. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 114 or the like.

[0382] FIG. 23D is a schematic diagram of the external appearance of an SSD, and FIG. 23E is a schematic diagram of the internal structure of an SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a board 1153. The board 1153 is housed in the housing 1151. For example, the board 1153 includes a memory chip. chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is a working memory for the controller chip 1156, for example, D An OSRAM chip can be used. A memory chip 1154 is also provided on the back side of the substrate 1153. By doing so, the capacity of the SSD 1150 can be increased. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 1154 or the like.

[0383] The configurations, methods, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The structure, method, etc. can be used in appropriate combination.

[0384] (Embodiment 6) In this embodiment, specific examples of electronic devices that can be used with the semiconductor device of one embodiment of the present invention will be described. This will be explained with reference to FIG.

[0385] More specifically, a semiconductor device according to one embodiment of the present invention includes a processor such as a CPU or a GPU. 24 shows a CPU or GP according to one embodiment of the present invention. Specific examples of electronic devices equipped with processors or chips such as U are given below.

[0386] <Electronic devices and systems> A GPU or chip according to one embodiment of the present invention can be mounted in various electronic devices. Examples of electronic devices include television sets, desktop or notebook computers, Personal computers, computer monitors, digital signage Signage: Digital signage), pachinko machines and other large game machines. In addition to electronic devices with large screens, digital cameras, digital video cameras, digital photos Examples include frames, mobile phones, portable game consoles, personal digital assistants, and sound reproduction devices. Furthermore, by providing an integrated circuit or a chip according to one embodiment of the present invention in an electronic device, Artificial intelligence can be installed in the sub-devices.

[0387] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. If the device has a secondary battery, the antenna may be used for contactless power transmission.

[0388] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared) It may have.

[0389] The electronic device of one embodiment of the present invention can have various functions. (still images, videos, text images, etc.) on the display, touch panel function, calendar Functions such as displaying date and time, running various software (programs) functions, wireless communication functions, and functions to read programs or data recorded on recording media. It can have functions, etc. Figure 24 shows an example of an electronic device.

[0390] [mobile phone] FIG. 24A shows a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511, and an input interface. As a user interface, a touch panel is provided on the display unit 5511, and buttons are provided on the housing 5510. It is prepared.

[0391] The information terminal 5500 uses a chip according to one embodiment of the present invention to perform a function using artificial intelligence. It is possible to run applications that utilize artificial intelligence. For example, the application recognizes conversations and displays the conversation contents on the display unit 5511. The display unit 5511 recognizes characters, figures, etc. input by the user on the touch panel. and applications to be displayed on the display unit 5511, applications that perform biometric authentication such as fingerprints and voiceprints, etc. Applications, etc.

[0392] [Information terminal 1] FIG. 24B shows a desktop information terminal 5300. The information terminal 5300 includes a main body 5301 of the information terminal, a display 5302, and a keyboard 5303. 303 and

[0393] The desktop information terminal 5300 is one of the features of the present invention, similar to the information terminal 5500 described above. By applying the chip of the present invention, it is possible to execute applications using artificial intelligence. Examples of applications that use artificial intelligence include design support software. , writing correction software, automatic menu generation software, etc. By using the laptop information terminal 5300, new artificial intelligence can be developed.

[0394] In the above, a smartphone and a desktop information terminal are used as examples of electronic devices. As shown in Figures 24A and 24B, the smartphone and desktop It can be applied to information terminals other than smartphones and desktops. Examples of information terminals other than information terminals include PDAs (Personal Digital Assistants). Assistant), notebook information terminals, and workstations.

[0395] [electric appliances] FIG. 24C shows an electric refrigerator-freezer 5800, which is an example of an electric appliance. The refrigerator 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like.

[0396] By applying the chip of one embodiment of the present invention to the electric refrigerator-freezer 5800, artificial intelligence By utilizing artificial intelligence, an electric refrigerator-freezer 5800 can be realized. The Electric Refrigerator-Freezer 5800 is a refrigerator-freezer that can be used to store food and drink. It has a function to automatically generate menus based on the expiration date of ingredients, and a function to automatically generate menus based on the expiration date of ingredients stored in the electric refrigerator-freezer 5800. It can have a function to automatically adjust the temperature to suit the ingredients being cooked.

[0397] In this example, an electric refrigerator-freezer was described as an electrical appliance, but other electrical appliances may also be used. Examples include vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, and induction cookers. , water dispenser, heating and cooling appliances including air conditioners, washing machines, dryers, Examples include audiovisual equipment.

[0398] [Game consoles] Figure 24D shows a portable game machine 5200, which is an example of a game machine. The device includes a housing 5201, a display portion 5202, buttons 5203, and the like.

[0399] By applying the GPU or chip of one embodiment of the present invention to the portable game console 5200, It is possible to realize a portable game machine 5200 with low power consumption. Since heat generation from the circuit can be reduced, the circuit itself, peripheral circuits, and The impact on the module can be reduced.

[0400] Furthermore, by applying a GPU or chip according to one embodiment of the present invention to the portable game console 5200, This makes it possible to realize a portable game machine 5200 with artificial intelligence.

[0401] Originally, the progress of the game, the behavior of the creatures that appear in the game, the phenomena that occur in the game, etc. The expression is determined by the program that the game has, but the portable game machine 520 By applying artificial intelligence to 0, it becomes possible to express things that are not limited to game programs. For example, the content of the player's questions, the game progress, the time, and the characters that appear in the game. This makes it possible to express how a person's behavior changes depending on the situation.

[0402] In addition, when playing games that require multiple players on the handheld game console 5200, artificial intelligence This allows you to create anthropomorphic game players, so you can turn your opponents into AI. By using multiple game players, you can play the game alone.

[0403] In FIG. 24D, a portable game machine is illustrated as an example of a game machine. The game machine to which the GPU or chip of the present invention is applied is not limited to this. The game machines to which the chips are applied include, for example, home-use stationary game machines, amusement facilities, etc. Arcade game machines installed in facilities (game centers, amusement parks, etc.), and sports facilities Examples include a pitching machine for batting practice.

[0404] [Moving object] The GPU or chip of one embodiment of the present invention is used in automobiles, which are moving objects, and in the vicinity of the driver's seat of the automobile. can be applied to.

[0405] FIG. 24E1 shows an automobile 5700 as an example of a moving object, and FIG. 24E2 shows the interior of the automobile. FIG. 24E2 shows the area around the windshield in In addition to the display panel 5701, the display panel 5702, and the display panel 5703, The attached display panel 5704 is shown.

[0406] The display panels 5701 to 5703 display a speedometer, a tachometer, It provides various information by displaying the driving distance, fuel gauge, gear status, air conditioning settings, etc. In addition, the display items and layout displayed on the display panel can be adjusted by the user. It can be changed as needed to suit your taste, enhancing the design. The display panels 5701 to 5703 can also be used as lighting devices.

[0407] The display panel 5704 displays images from an imaging device (not shown) installed in the automobile 5700. By projecting images, it is possible to compensate for the blind spots obstructed by the pillars. That is, by displaying an image from an imaging device provided on the outside of the automobile 5700, This can compensate for blind spots and increase safety. By doing so, the driver can check for safety more naturally and without any discomfort. 4 can also be used as a lighting device.

[0408] The GPU or chip of one aspect of the present invention can be applied as a component of artificial intelligence, e.g. For example, the chip can be used in the autonomous driving system of the automobile 5700. The chip can be used in systems that provide road guidance, risk prediction, etc. Display panel 57 The display panels 5701 to 5704 are configured to display information such as road guidance and risk prediction. Good too.

[0409] In the above description, an automobile is used as an example of a moving body. For example, the moving object may be a train, a monorail, a ship, an aircraft (helicopter, These include vehicles such as drones, airplanes, and rockets. Applying the chip of one aspect of the present invention to a moving object and providing it with a system that utilizes artificial intelligence can be done.

[0410] [Broadcasting System] The GPU or chip according to one aspect of the present invention can be applied to a broadcasting system.

[0411] FIG. 24F shows a schematic diagram of data transmission in a broadcasting system. 24F is the signal transmitted from broadcasting station 5680 to the television receiver in each home. The TV 5600 is equipped with a receiving device. The broadcast signal received by the antenna 5650 is transmitted via the receiving device (not shown). Transmitted to TV5600.

[0412] In FIG. 24F, antenna 5650 is a UHF (Ultra High Frequency) cy) antenna is shown, but as antenna 5650, BS·110°CS antenna Antennas and CS antennas can also be applied.

[0413] Radio waves 5675A and 5675B are broadcast signals for terrestrial broadcasting, and radio tower 5670 The received radio wave 5675A is amplified and radio wave 5675B is transmitted. By receiving radio waves 5675B with Na 5650, you can watch terrestrial TV broadcasts on TV 5600. The broadcasting system is not limited to the terrestrial broadcasting shown in Figure 24F, but can also be used for satellite broadcasting. It may also be satellite broadcasting using stars, data broadcasting via optical fiber lines, or the like.

[0414] The above-described broadcasting system applies the chip according to one aspect of the present invention to broadcast using artificial intelligence. The broadcasting station 5680 transmits broadcast data to the TV 5600 in each home. When the encoder is activated, the broadcast data is compressed and the antenna 5650 receives the broadcast data. When the data is received, the decoder of the receiving device included in the TV 5600 converts the broadcast data into By using artificial intelligence, for example, the compression method of the encoder can be Recognizing display patterns contained in displayed images in motion compensation prediction, which is one of the methods It is also possible to perform intra-frame prediction using artificial intelligence. For example, low-resolution broadcast data is received and then displayed on the TV5600 with high resolution. When displaying the broadcast data, the decoder may perform up-conversion or other operations to restore the broadcast data. Image interpolation can be performed.

[0415] The AI-based broadcasting system described above is expected to be a key component of the ultra-high definition television broadcasting system, which will see an increase in the amount of broadcast data. It is suitable for revision (UHDTV: 4K, 8K) broadcasting.

[0416] In addition, as an application of artificial intelligence on the TV5600 side, for example, By using such a configuration, the recording device By having AI learn user preferences, it can automatically record programs that match the user's preferences. It can be depicted.

[0417] Electronic devices described in the present embodiment, functions of the electronic devices, application examples of artificial intelligence, and their effects etc. can be appropriately combined with descriptions of other electronic devices.

[0418] The configurations, methods, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The structure, method, etc. can be used in appropriate combination. [Example]

[0419] In this embodiment, the oxide 230a, the oxide 230b, the oxide 230c, and the insulating Samples 1A to 1I corresponding to the body 250 were prepared, and the carrier concentrations of these samples were The results of the measurements will be explained below.

[0420] First, methods for manufacturing Samples 1A to 1I will be described.

[0421] As samples 1A to 1I, quartz substrates were prepared, and In-Ga-Z An n-oxide film (hereinafter referred to as IGZO film) was deposited to a thickness of 5 nm using the DC sputtering method. The IGZO film was formed with a ratio of In:Ga:Zn=1:3:4 [atomic ratio]. The IGZO film was used as a target (hereinafter, the IGZO film is referred to as the IGZO film (134)). The film formation pressure was 0.7 Pa (Canon Anelva miniature gas) using 45 sccm of oxygen gas. The measurement was performed using a gauge MG-2. The deposition power was 500 W, and the substrate temperature was 200 °C, and the target-substrate distance was 60 mm. Compatible with 230a.

[0422] Furthermore, without exposing it to the atmosphere, an IGZO film was deposited on the IGZO film (134) by DC sputtering. The IGZO film was deposited using the In:Ga:Zn= A target with an atomic ratio of 4:2:4.1 was used (hereinafter, the IGZO film is referred to as the IGZO film ( 423)). The deposition gas used was oxygen gas at 45 sccm, and the deposition pressure was 0.7 Pa. (Measured using a miniature gauge MG-2 manufactured by Canon Anelva.) The power was 500 W, the substrate temperature was 200°C, and the target-substrate distance was 60 mm. The IGZO film (423) corresponds to the oxide 230b.

[0423] Next, Samples 1A to 1I were subjected to a heat treatment at 400° C. for 1 hour in a nitrogen atmosphere. Further, a heat treatment was carried out in an oxygen atmosphere at 400° C. for 1 hour.

[0424] Next, in the samples 1A to 1I, a sputtering method was applied to the IGZO film (423). A tantalum nitride film having a thickness of 25 nm was then formed using the method described above. The film was removed by dry etching. In the dry etching, the etching gas was The tantalum nitride film was formed and removed in the same manner as in the above embodiment. 5 and 8, the formation of the conductive layer 242B and the removal of a part of the conductive layer 242B. This corresponds to the process.

[0425] Next, Samples 1A to 1I were washed with an aqueous solution of hydrofluoric acid diluted with pure water. Ta.

[0426] Next, Samples 1A to 1I were subjected to a heat treatment at 350° C. for 1 hour in a nitrogen atmosphere. Further, a heat treatment was carried out in an oxygen atmosphere at 350° C. for 1 hour.

[0427] Next, in the samples 1A to 1I, an IGZO film (13 4) was deposited using the DC sputtering method with a target thickness of 5 nm. ) was performed under the same conditions as the above IGZO film (134). 134) corresponds to oxide 230c.

[0428] Next, for Samples 1B to 1E, an acid was deposited using the PEALD method, aiming for a film thickness of 10 nm. The silicon oxide film corresponds to the insulator 250. One cycle consisted of introducing an aminosilane compound gas as a precursor for 0.5 seconds, followed by 18 seconds. The reactant was oxygen gas for 1.4 seconds to stabilize the flow rate. Then, the output of the RF plasma generator was set to 2800 W and oxygen plasma was irradiated for 18 seconds. During PEALD deposition, 550 sccm of nitrogen gas and 50 Argon gas was continuously introduced as a carrier gas at 1000 sccm. The plate temperatures were 200°C for sample 1B, 300°C for sample 1C, 350°C for sample 1D, and 160°C for sample 1E. The temperature was set to 400°C.

[0429] In addition, for samples 1F to 1I, a film thickness of 10 nm was obtained by using the thermal ALD method. The silicon oxide film corresponds to the insulator 250. One ALD cycle consisted of introducing an aminosilane compound gas as a precursor for 0.5 seconds. Then, a mixed gas of ozone and oxygen was introduced as a reactant for 18 seconds. During the thermal ALD deposition, 550 sccm of nitrogen gas and Argon gas was continuously introduced at 50 sccm as a carrier gas. The substrate temperature in the film was 200°C for sample 1F, 300°C for sample 1G, and 350°C for sample 1H. The temperature of the material 1I was 400°C.

[0430] Next, in Samples 1B to 1I, parts of the silicon oxide films were dry-etched. The dry etching process removed the IGZO film, forming an opening that reached the IGZO film. CF4 was used as the etching gas.

[0431] Furthermore, a Ti-Al electrode was formed in contact with the IGZO film in the opening. An alloy film was formed.

[0432] Samples 1A to 1I were prepared as described above, and Hall effect The sheet resistance was measured using the ResiTest 8400 series. The carrier concentration [1 / cm 3 ] of Samples 1A to 1E was calculated. 3 ] 25A, the carrier concentration [1 / cm 3 ] of Sample 1A, Sample 1F to Sample 1I 3 ] in Figure 25B show.

[0433] As shown in FIG. 25A, Sample 1 was formed by the PEALD method and the substrate temperature was set to 300° C. or higher. C, Sample 1D, and Sample 1E have a higher IG than Sample 1A, which does not have a silicon oxide film. The carrier concentration of the ZO film is significantly reduced. As shown in FIG. 25B, the film was formed by the thermal ALD method at a substrate temperature of 350° C. or higher. The samples 1H and 1I were also significantly larger than the sample 1A on which no silicon oxide film was formed. The carrier concentration of the IGZO film was significantly reduced.

[0434] In addition, the substrate temperature is set to 350°C or higher, and the film is formed by the PEALD method or the thermal ALD method. The sheet resistance of the IGZO films of Samples 1D, 1E, 1H, and 1I was This was above the upper limit of the measurement of the coil effect measurement instrument. , and the carrier concentration of the IGZO film of sample 1I is 1×10 13 / cm 3 It is estimated that It is measured.

[0435] Next, samples 2A to 2I were prepared corresponding to samples 1A to 1I. SIMS analysis of the IGZO film was performed. Here, samples 2A to 2I were made of a quartz substrate instead of a quartz substrate. The silicon substrate is covered with a 100 nm thick thermal oxide film (Thermal SiOx). The reason is that a plate is used and a Ti-Al alloy film that functions as an electrode is not formed. The structure of the sample is different from that of the sample 1A to the sample 1I, but the other structures are the same as those of the sample 1A to the sample 1I. is.

[0436] Hydrogen concentration [atoms / cm ] of Samples 2A to 2E 3 ] is shown in Figure 26A, Sample 2A, Hydrogen concentration [atoms / cm] of Sample 2F to Sample 2I 3 ] is shown in Figure 26B. In Figure 26B, the horizontal axis represents the depth of the sample (nm). The analysis direction is from the back surface of the sample to the front surface. The IGZO film was set as the quantitative layer of hydrogen. .

[0437] As shown in FIG. 26B, Samples 2F to 2I formed by the thermal ALD method were oxidized. The hydrogen concentration profile was almost the same as that of Sample 2A, which had no silicon film formed. As shown in FIG. 26A, in Samples 2B to 2E formed by the PEALD method, the substrate The hydrogen concentrations of samples 2D and 2E, which were heated at high temperatures, were somewhat high. The hydrogen concentration profile was roughly similar to that of sample 2A, which did not contain hydrogen.

[0438] As shown above, while heating the substrate, oxidation systems can be formed by the PEALD method or the thermal ALD method. By forming a silicon oxide film, the hydrogen concentration in the IGZO film under the silicon oxide film is It was shown that the increase in the carrier concentration can be suppressed and the carrier concentration can be reduced. By using it in a transistor, the transistor can have normally-off characteristics, A semiconductor device having good electrical properties and reliability can be constructed. [Explanation of symbols]

[0439] 10: precursor, 20: reactant, 30: electromagnetic wave, 200: transistor, 205 : conductor, 205a: conductor, 205b: conductor, 210: insulator, 212: insulator, 2 14: insulator, 216: insulator, 217: insulator, 218: conductor, 222: insulator, 2 24: insulator, 224A: insulating film, 230: oxide, 230a: oxide, 230A: oxide Film, 230b: Oxide, 230B: Oxide film, 230c: Oxide, 230C: Oxide film, 24 0: conductor, 240a: conductor, 240b: conductor, 241: insulator, 241a: insulator , 241b: insulator, 242: conductor, 242a: conductor, 242A: conductive film, 242b : conductor, 242B: conductor layer, 243: oxide, 243a: oxide, 243A: oxide film , 243b: oxide, 243B: oxide layer, 246: conductor, 246a: conductor, 246 b: conductor, 250: insulator, 250A: insulating film, 260: conductor, 260a: conductor, 260Aa: Conductive film, 260Ab: Conductive film, 260b: Conductor, 272: Insulator, 272 A: insulating film, 273: insulator, 273A: insulating film, 274: insulator, 280: insulator, 2 81: Insulator, 282: Insulator, 283: Insulator, 283a: Insulator, 290: Electromagnetic waves, 292: Electromagnetic waves

Claims

1. forming a first metal oxide layer above a substrate, the first metal oxide layer having a region to be a channel formation region of a transistor; forming an insulator over the first metal oxide layer; forming an opening in the insulator that reaches the first metal oxide layer; forming a metal oxide film in the opening so as to be in contact with the first metal oxide layer; forming an insulating film above the metal oxide film; forming a conductive film above the insulating film; a method for manufacturing a semiconductor device, comprising removing a portion of the metal oxide film, a portion of the insulating film, and a portion of the conductive film until an upper surface of the insulator is exposed, thereby forming a second metal oxide layer, an insulating layer, and a conductive layer, before forming the insulating film, irradiating the first metal oxide layer, the metal oxide film, and the insulator with microwaves; The insulating film is formed by using a PEALD method, the method comprising the steps of: introducing a first gas containing silicon into a chamber while heating the substrate to 300°C or higher; and introducing a second gas containing oxygen radicals into the chamber while heating the substrate to 300°C or higher.

2. forming a first metal oxide layer above a substrate, the first metal oxide layer having a region to be a channel formation region of a transistor; forming an insulator over the first metal oxide layer; forming an opening in the insulator that reaches the first metal oxide layer; forming a metal oxide film in the opening so as to be in contact with the first metal oxide layer; forming an insulating film above the metal oxide film; forming a conductive film above the insulating film; a method for manufacturing a semiconductor device, comprising removing a portion of the metal oxide film, a portion of the insulating film, and a portion of the conductive film until an upper surface of the insulator is exposed, thereby forming a second metal oxide layer, an insulating layer, and a conductive layer, before forming the insulating film, irradiating the first metal oxide layer, the metal oxide film, and the insulator with microwaves to remove hydrogen from the first metal oxide layer; The insulating film is formed by using a PEALD method, the method comprising the steps of: introducing a first gas containing silicon into a chamber while heating the substrate to 300°C or higher; and introducing a second gas containing oxygen radicals into the chamber while heating the substrate to 300°C or higher.

3. forming a first metal oxide layer above a substrate, the first metal oxide layer having a region to be a channel formation region of a transistor; forming an insulator over the first metal oxide layer; forming an opening in the insulator that reaches the first metal oxide layer; forming a metal oxide film in the opening so as to be in contact with the first metal oxide layer; forming an insulating film above the metal oxide film; forming a conductive film above the insulating film; a method for manufacturing a semiconductor device, comprising removing a portion of the metal oxide film, a portion of the insulating film, and a portion of the conductive film until an upper surface of the insulator is exposed, thereby forming a second metal oxide layer, an insulating layer, and a conductive layer, before forming the insulating film, irradiating the first metal oxide layer, the metal oxide film, and the insulator with microwaves to release hydrogen trapped in oxygen vacancies in the first metal oxide layer; The insulating film is formed by using a PEALD method, the method comprising the steps of: introducing a first gas containing silicon into a chamber while heating the substrate to 300°C or higher; and introducing a second gas containing oxygen radicals into the chamber while heating the substrate to 300°C or higher.

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