Circuit, and control system
The power supply circuit addresses the issue of undetected failures in multiphase mode by using a duty comparison circuit to stop failed power supplies, ensuring reliability through duty cycle monitoring.
Patent Information
- Application Number
- JP2024018331
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-09
- Publication Date
- 2025-08-22
AI Technical Summary
Conventional power supply circuits operating in multiphase mode fail to detect failures in individual power supplies, leading to current concentration and component overheating, complicating the configuration and reducing reliability.
A power supply circuit that includes a duty comparison circuit to monitor and compare the duty cycles of switching nodes in multiple power supplies, stopping the output of failed power supplies to prevent current concentration and overheating.
The circuit effectively detects power supply failures by comparing duty cycles, preventing overheating and maintaining reliability with a simple configuration.
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Figure 2025122727000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a circuit and a control system. [Background technology]
[0002] A power supply circuit that includes multiple power supplies, for example, a first power supply and a second power supply, and operates in multiphase mode, operates only with the second power supply even if the first power supply fails, and the output voltage remains normal, appearing to operate normally. For this reason, a power supply circuit that operates in multiphase mode cannot detect a failure in the first power supply, and there is a risk that, for example, current will concentrate in the second power supply, causing components to heat up and reducing reliability. Here, the first and second power supplies include power supply control circuits that use switching elements, etc. Therefore, for example, in Patent Document 1 listed below, a short circuit failure is detected by determining whether the voltage across the switching element is zero. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 2023-116248 Summary of the Invention [Problem to be solved by the invention]
[0004] However, in the above-mentioned conventional technology, it is necessary to monitor the voltage across each switching element, which makes the configuration complicated.
[0005] Therefore, an object of the disclosed embodiments is to detect a power supply failure in one of multiple power supplies in a power supply circuit that operates in multiphase, using a simple configuration, and to prevent a decrease in reliability due to current concentration in one area, causing components to heat up, etc. [Means for solving the problem]
[0006] One aspect of the disclosed embodiment is exemplified by a circuit for controlling a multi-phase power supply that boosts or bucks an input voltage and supplies power to a load circuit. The circuit includes a first power supply, a second power supply, and a controller. The controller calculates the duty cycle of a switching node of the first power supply and the duty cycle of a switching node of the second power supply, and compares the calculated duties. If the two compared duties are different, the controller stops the output of the first power supply and the second power supply. [Effects of the Invention]
[0007] This circuit monitors the switching nodes of the first and second power supplies, compares the switching duties of the first and second power supplies, and determines that a power supply abnormality exists if the compared duties differ. In other words, this circuit detects a failure in a component connected to the switching node by comparing the duties at the switching nodes of the waveforms switched by the switching elements of the first and second power supplies, without monitoring both ends of each switching element. Then, when this circuit detects a component failure, it can stop the output of the first and second power supplies. As a result, this circuit can prevent a decrease in reliability due to, for example, current concentrating in one power supply and causing components to heat up. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a power supply circuit and a control system. [Figure 2] FIG. 2 is a diagram illustrating the configuration of the duty comparison circuit of the first embodiment. [Figure 3] FIG. 3 is a flowchart illustrating a sequence of power supply control processing by the CPU. [Figure 4] FIG. 4 is a diagram illustrating the configuration of a duty comparison circuit according to the second embodiment. [Figure 5] FIG. 5 is a diagram illustrating the configuration of a duty comparison circuit according to the third embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0009] First Embodiment A power supply circuit 10 and a control system 50 according to one embodiment will be described below with reference to the drawings. The control system 50 includes the power supply circuit 10 and a load 9 to which power is supplied from the power supply circuit 10.
[0010] (composition) FIG. 1 is a diagram illustrating the configuration of a power supply circuit 10 and a control system 50. The power supply circuit 10 is what is called a multiphase power supply. A multiphase power supply is a power supply circuit in which multiple power supply control circuits, such as DC-DC converters, are connected in parallel. Hereinafter, the power supply control circuit will be simply referred to as a power supply.
[0011] Here, each power supply (control circuit) has a switching element and switches the input voltage Vin to step up or down. In a multiphase power supply, each switching element operates with a different switching phase. Therefore, even if multiple switching elements operate at the same switching frequency, the switching frequency of the multiple power supplies connected in parallel as a whole is increased artificially, which has the effect of reducing ripple in the output voltage.
[0012] In the example of FIG. 1, the power supply circuit 10 includes a primary power supply as an example of a first power supply. 2 and a secondary power supply 3 as an example of a second power supply. The number of power supplies included in circuit 10 is not limited to two, and power supply circuit 10 may include three or more power supplies.
[0013] An input voltage Vin is input in parallel to the primary power supply 2 and the secondary power supply 3. Here, the node on the input side where the input voltage Vin is input in parallel is called point C. Capacitors Cin1 and Cin2 are respectively provided between the input terminal side (node C) of the primary power supply 2 and the secondary power supply 3 and earth (ground potential) for the purpose of noise removal, etc.
[0014] The primary power supply 2 and secondary power supply 3 each have internal switching elements that switch the input voltage Vin. The node on the output side of the primary power supply 2 is called Point A. The node on the output side of the secondary power supply 3 is called Point B. The voltages at Points A and B fluctuate due to the switching operations of the primary power supply 2 and secondary power supply 3, respectively. For this reason, Points A and B are also called switching nodes.
[0015] Between point A and point D, which is the output terminal, a coil L1 is connected in series and a capacitor Cout1 is connected in parallel, forming a smoothing circuit. That is, capacitor Cout1 is connected between the terminal on the point D side of coil L1 and ground. Also, between point B and point D, which is the output terminal, a coil L2 is connected in series and a capacitor Cout2 is connected in parallel, forming a smoothing circuit. That is, capacitor Cout2 is connected between the terminal on the point D side of coil L2 and ground.
[0016] The primary power supply 2 controls the output voltage Vout, which is smoothed by a smoothing circuit consisting of a coil L1 and a capacitor Cout1, by changing the duty cycle during switching operation. The secondary power supply 3 controls the output voltage Vout, which is smoothed by a smoothing circuit consisting of a coil L2 and a capacitor Cout2, by changing the duty cycle during switching operation. The voltages smoothed by the smoothing circuit are then superimposed and synthesized at point D and supplied to the load 9.
[0017] The voltage waveform of the primary power supply 2 switching at point A and the voltage waveform of the secondary power supply 3 switching at point B are 180 degrees out of phase with each other. Furthermore, if the power supply circuit 10 has three or more, for example, N (an integer) power supplies (switching elements) in parallel, the phases are shifted by dividing 360 degrees into N equal parts. That is, each power supply (switching element) supplies switching voltages to switching nodes corresponding to points A and B with voltage waveforms that are shifted in phase by 360 (1 / N) degrees from each other.
[0018] In this embodiment, the power supply circuit 10 further includes a duty comparison circuit 1. The duty comparison circuit 1 acquires the duty of the voltage waveform at point A (switching node) and the duty of the voltage waveform at point B (switching node). The duty comparison circuit 1 then compares the duties of the voltage waveforms at these two switching nodes. If the two acquired duties do not match, the duty comparison circuit 1 sends a signal Soff1 to the primary power supply 2 to command it to turn off, thereby stopping the operation of the primary power supply 2.
[0019] In this embodiment, when the primary power supply 2 is shut down, the secondary power supply 3 is turned off in conjunction with this. For example, the primary power supply 2 sends a signal Soff2 to the secondary power supply 3 instructing it to power off. However, the configuration of the power supply circuit 10 is not limited to the primary power supply 2 and secondary power supply 3 shutting down in conjunction in this way. For example, if the primary power supply 2 and secondary power supply 3 each accept a power-off command individually, the duty comparison circuit 1 can simply send signals Soff1 and Soff2 to the primary power supply 2 and secondary power supply 3, respectively, instructing them to power off individually.
[0020] Therefore, the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3 can be said to be an example of a circuit that steps up or down an input voltage and supplies power to a load circuit. The power supply circuit 10 is also an example of a multiphase power supply that supplies power to a load circuit. Therefore, the primary power supply 2, the secondary power supply 3, and the duty comparison circuit 1 can be said to be an example of a circuit that controls a multiphase power supply.
[0021] 2 is a diagram illustrating an example of the configuration of the duty comparison circuit 1. The duty comparison circuit 1 has a CPU 11, a main storage unit 12, and circuit components connected via an interface (I / F) 13.
[0022] The CPU 11 executes a computer program that has been loaded in an executable manner into the main memory unit 12, thereby providing the functions of the duty comparison circuit 1. The main memory unit 12 is also called simply a memory, and stores the computer program executed by the CPU 11, the data processed by the CPU 11, etc. The CPU 11 is also called a processor. However, the CPU 11 is not limited to a single processor, and may have a multi-processor configuration. Furthermore, the CPU 11 may be a single processor connected via a single socket, and may have a multi-core configuration.
[0023] In addition, at least a part of the processing of the CPU 11 is performed by a Field-Programmable Gate Array (FPGA) The CPU 11 may be implemented by dedicated large scale integration (LSI) such as a digital circuit, or other digital circuits. At least a part of the processing of the CPU 11 may be implemented by analog circuits.
[0024] The main memory unit 12 is a memory device that includes a dynamic random access memory (DRAM) and a static random access memory (SRAM). Memory (SRAM), Read Only Memory (ROM), etc.
[0025] The interface 13 connects the CPU 11 with external circuit components and transmits and receives data between the CPU 11 and the external circuit components. In Fig. 2, the external circuit components are exemplified by a pair of analog-to-digital converters (ADCs) 14A and 14B and a signal output unit 15. The CPU 11, main memory unit 12, and interface 13 are also referred to as a controller, a microcontroller, a microcomputer, a control unit, etc.
[0026] The ADC 14A, for example, acquires a voltage at point A (the potential at point A relative to the ground potential) and converts it into digital data. The ADC 14A inputs the converted voltage of the digital data to the CPU 11 via the interface 13. The ADC 14B, for example, acquires a voltage at point B and converts it into digital data. The ADC 14B inputs the converted voltage of the digital data to the CPU 11 via the interface 13.
[0027] Under the control of CPU 11, signal output unit 15 sends a power-off command (a signal of high potential H or low potential L) to, for example, primary power supply 2. However, as described above, signal output unit 15 may send the power-off command to both primary power supply 2 and secondary power supply 3.
[0028] The CPU 11 calculates the respective switching duties from the voltages of the digital data acquired from the ADC 14A and the voltages of the digital data acquired from the ADC 14B. That is, the CPU 11 calculates the duty as the ratio of the period during which a voltage (for example, input voltage Vin) is on to one period in one or more periods of switching by the primary power supply 2 and the secondary power supply 3. Furthermore, the CPU 11 compares the duty at point A with the duty at point B.
[0029] Then, when the difference between the duty at point A and the duty at point B is equal to or greater than a predetermined tolerance, CPU 11 sends a power-off command to, for example, primary power supply 2 via signal output unit 15. As already mentioned, CPU 11 may send a power-off command to, for example, both primary power supply 2 and secondary power supply 3. Here, the predetermined tolerance is set in CPU 11 and is, for example, a parameter stored in main memory unit 12. The predetermined tolerance is determined from the results of analysis of the primary power supply 2, secondary power supply 3, etc. in past failures.
[0030] (Processing sequence) 3 is a flowchart illustrating a sequence of power supply control processing by CPU 11. This processing is initiated, for example, when power is applied to load 9 in FIG. 1. In this processing, CPU 11 acquires, for example, the duty at point A (S1). That is, CPU 11 acquires digital data of the voltage at point A for one or more switching cycles, and calculates the ratio of the period during which the voltage is high (ON, or input voltage Vin) to the period of one cycle. Similarly, CPU 11 acquires, for example, the duty at point B (S2).
[0031] Then, CPU 11 determines whether the duty of the switched voltage at point A and the duty of the switched voltage at point B match (S3). Under normal conditions, primary power supply 2 and secondary power supply 3 switch input voltage Vin with the same switching period and the same duty, with their phases reversed. Therefore, under normal conditions, the duty of the switched voltage at point A and the duty of the switched voltage at point B do not differ by more than a predetermined tolerance and match (YES in S3). If they match, CPU 11 proceeds to S5.
[0032] On the other hand, if there is an abnormality in the circuit component connected to point A or the circuit component connected to point B, The duty cycle of the switched voltage at point A differs from the duty cycle of the switched voltage at point B by more than a predetermined tolerance and does not match (NO in S3). For example, this occurs when coils L1, L2, etc. are disconnected. Also, this occurs when the connections of capacitors Cout1, Cout2, etc. are disconnected or when there is a short circuit between the terminals of capacitors Cout1, Cout2, etc.
[0033] In such a case, the duty of the voltage waveform at the switching node (point A or point B) to which the abnormal circuit component is connected will be different from that in normal operation. Therefore, if the two duties do not match, the CPU 11 can determine that there is an abnormality in the circuit component connected to point A or the circuit component connected to point B. In this embodiment, in this case, the CPU 11 sends a power-off command to the primary power supply 2 (S4).
[0034] In response to the power OFF command, the primary power supply 2 is shut down, and furthermore, the secondary power supply 3 is also shut down in conjunction with the primary power supply 2. As already mentioned, in the case where the secondary power supply 3 is not shut down in conjunction with the primary power supply 2, the CPU 11 can simply send a power OFF command to both the primary power supply 2 and the secondary power supply 3.
[0035] Then, the CPU 11 determines whether or not to end the process (S5). For example, when the power supply to the load 9 in Fig. 1 is turned off, the CPU 11 may end the process. On the other hand, if the process is not to be ended in S5, the CPU 11 returns to S1 and continues the process.
[0036] (Effects of the embodiment) A power supply circuit 10 (duty comparison circuit 1) compares the duty of a switching node (point A) of a primary power supply 2, which is an example of a first power supply, with the duty of a switching node (point B) of a secondary power supply 3, which is an example of a second power supply. If the compared duties differ, the power supply circuit 10 stops the output of the primary power supply 2 and the secondary power supply 3.
[0037] As described above, when the duty cycles of the switching nodes of the primary power supply 2 and the secondary power supply 3 differ, there is a high possibility that a circuit component connected to these switching nodes has failed. In other words, there is a high possibility that a circuit component connected to point A, which is the output side of the primary power supply 2, or a circuit component connected to point B, which is the output side of the secondary power supply 3, has failed. Therefore, by monitoring the voltages at points A and B, the power supply circuit 10 can detect, with a simple configuration, a failure in a circuit component connected to the primary power supply 2 or the secondary power supply 3. As a result, the power supply circuit 10 can shut down the primary power supply 2 and the secondary power supply 3 when these circuit components have failed.
[0038] When a circuit component connected to the primary power supply 2 fails, current concentrates in the secondary power supply 3. Furthermore, when a circuit component connected to the secondary power supply 3 fails, current concentrates in the primary power supply 2. This can cause the power supply to which the current concentrates (primary power supply 2 or secondary power supply 3) to heat up, potentially reducing the reliability of the power supply circuit 10. The power supply circuit 10 of this embodiment has a simple configuration that can detect the above failure and shut down the primary power supply 2 and secondary power supply 3, thereby preventing the power supply circuit 10 from overheating and reducing a decrease in reliability.
[0039] In a multi-phase power supply, a mechanism is provided to detect failures in circuit components connected to the primary power supply 2, but there are cases where a mechanism is not provided to detect failures in circuit components connected to the secondary power supply 3. In this way, the power supply circuit 10 of this embodiment, i.e., the duty comparison circuit 1, functions effectively in a power supply circuit 10 in which failures in circuit components of either the primary power supply 2 or the secondary power supply 3 cannot be detected.
[0040] The power supply circuit 10 (duty comparison circuit 1) is connected to the switching node of the primary power supply 2. The power supply circuit 10 acquires signal (voltage) waveforms from each of the switching nodes of the secondary power supply 3 and calculates the duty from each waveform. Therefore, the power supply circuit 10 can easily detect the above-mentioned fault from the waveforms of the two switching nodes.
[0041] (Variation) In the above embodiment, the duty comparison circuit 1 that compares the duties of switching nodes in the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3 is exemplified. However, the processing of the duty comparison circuit 1 is not limited to the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3. That is, if the power supply circuit 10 has N power supplies (switching elements), the duty comparison circuit 1 acquires the duty of the voltage waveform of each switching node and determines whether there is a difference in duty among the voltage waveforms of the N switch nodes. Then, if the duty of the voltage waveform output from one of the N switch nodes, i.e., the N power supplies (switching elements), does not match the others, a power-off command is sent to the N power supplies. That is, the duty comparison circuit 1 sends a power-off command to stop the switching operation of all N power supplies.
[0042] Second Embodiment A power supply circuit 10 according to the second embodiment will be described with reference to Fig. 4. In the first embodiment, the duty comparison circuit 1 of the power supply circuit 10 has a CPU 11, acquires voltage waveforms from the switching node of the primary power supply 2 and the switching node of the secondary power supply 3, and calculates the duty from each waveform.
[0043] In the power supply circuit 10 of this embodiment, a hardware circuit performs duty comparison, and the comparison result is reported to the CPU 11. The configuration and operation of the power supply circuit 10 of this embodiment, except that the hardware circuit performs duty comparison, are the same as those of the power supply circuit 10 of the first embodiment. In other words, the configuration and operation of the power supply circuit 10 of the first embodiment, except that the CPU 11 calculates the duty, are applied as is to the power supply circuit 10 of this embodiment.
[0044] 4 is a diagram illustrating the configuration of a duty comparison circuit 1A of a power supply circuit 10 in this embodiment. Like the duty comparison circuit 1 of the first embodiment, the duty comparison circuit 1A also has a CPU 11, a main storage unit 12, and circuit components connected via an interface 13. The duty comparison circuit 1A has an exclusive OR (EXOR) circuit 16, a pair of comparators 17A and 17B, and an inverter 18 as circuit components.
[0045] Comparator 17A receives the voltage waveform signal at point A in FIG. 1 and binarizes the voltage waveform. More specifically, comparators 17A and 17B compare the input voltage (e.g., the voltage at point A or the voltage at point B) with a preset reference voltage, and output H (high potential) if the input voltage is higher than the reference voltage, and output L (low potential) if the input voltage is lower than the reference voltage. The reference voltage is set to a voltage value smaller than the amplitude of the voltage at point A and greater than 0. The binarized voltage waveform data is time-series data with two values, H (high potential) or L (low potential), and is input to EXOR circuit 16.
[0046] Inverter 18 is an example of an inverting circuit that receives an input of a voltage waveform signal at point B and inverts the phase. The reason for providing inverter 18 is that the voltage waveform resulting from the switching of primary power supply 2 and the voltage waveform resulting from the switching of secondary power supply 3 in FIG. 1 are inverted in phase with each other. By inverter 18 inverting the phase of the voltage waveform at point B, the voltage waveform acquired from point B becomes in phase with the voltage waveform at point A. Inverter 18 can be said to be an example of a circuit that adjusts the relative phases of the signal (voltage) waveform from the switching node of the first power supply and the signal (voltage) waveform from the switching node of the second power supply. In FIG. 4, the inverter 18 may receive the voltage waveform at point A instead of point B and invert the phase.
[0047] The comparator 17B binarizes the phase-inverted voltage waveform signal at point B. The binarized voltage waveform data is input to the EXOR circuit 16.
[0048] The EXOR circuit 16 compares the binarized voltage waveform at point A with the phase-inverted and binarized voltage waveform at point B and notifies the CPU 11 of the comparison result. When the output of the EXOR circuit 16 is at high potential H, the voltage waveform at point A and the phase-inverted voltage waveform at point B do not match. When the output of the EXOR circuit 16 is at low potential L, the voltage waveform at point A and the phase-inverted voltage waveform at point B match. Here, the processing of the EXOR circuit 16 can be considered an example of hardware implementation of the duty comparison processing performed by the CPU 11 in the first embodiment. Furthermore, the EXOR circuit 16 can be considered an example of a comparison circuit that compares first waveform data from the switching node of the first power supply with second waveform data with an inverted phase.
[0049] Based on the notification from the EXOR circuit 16, the CPU 11 sends a power-off command from the signal output unit 15 to the primary power supply 2 (and the secondary power supply 3), thereby stopping these power supplies.
[0050] As described above, in the power supply circuit 10 of this embodiment, the duty comparison circuit 1A uses a hardware circuit to compare the voltage waveform at point A caused by switching of the primary power supply 2 with the voltage waveform at point B caused by switching of the secondary power supply 3. In the power supply circuit 10 of this embodiment, such a hardware circuit simplifies the processing of the CPU 11.
[0051] Furthermore, the power supply circuit 10 of this embodiment omits the calculation of the duty itself and directly compares the voltage waveform at point A with the phase-inverted voltage waveform at point B, thereby detecting a fault in a circuit component connected to point A or point B. As described above, the duty comparison circuit 1A does not necessarily compare the duty itself, but can also be called a waveform comparison circuit that compares the voltage waveform at point A with the phase-inverted voltage waveform at point B.
[0052] (Variation 1) FIG. 4 illustrates the use of a pair of comparators 17A and 17B and an EXOR circuit 16 that compares the outputs of the comparators 17A and 17B. However, if the amplitudes of the voltage waveforms at points A and B match within a predetermined tolerance, the comparators 17A and 17B may be omitted. That is, the duty comparison circuit 1A adjusts the amplitudes of the voltage waveform at point A and the phase-inverted voltage waveform at point B to the input limit of the EXOR circuit 16 and then inputs them directly to the EXOR circuit 16. Alternatively, a single comparator may be provided instead of the EXOR circuit 16. That is, the comparator may directly compare the voltage waveform at point A with the phase-inverted voltage waveform at point B. Eliminating the pair of comparators 17A and 17B simplifies the hardware circuit configuration.
[0053] (Variation 2) In the second embodiment described above, the duty comparison circuit 1A that compares the duties of the switching nodes in the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3 is exemplified.
[0054] The application of the duty comparison circuit 1A is not limited to the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3. In other words, if the power supply circuit 10 has N power supplies (switching elements), the duty comparison circuit 1A only needs to acquire voltage waveforms from the N switching elements (corresponding to the voltage waveforms at points A and B in FIG. 1 increased to N).
[0055] The duty comparison circuit 1A may be provided with N-1 phase adjustment circuits instead of the inverter 18. The N-1 phase adjustment circuits are circuits that shift the phase by 360(1 / N) degrees, 360(2 / N) degrees, ..., 360(N-1 / N) degrees, respectively. When a multi-phase power supply has N switching elements (circuits corresponding to the primary power supply 2, secondary power supply 3, etc.), the phases of the voltage waveforms caused by switching of each switching element are shifted by 360(1 / N) degrees. Therefore, the N-1 phase adjustment circuits adjust the phases of the voltage waveforms caused by the N switching elements so that they are in phase.
[0056] Then, N comparators similar to comparators 17A and 17B in Figure 4 binarize the N in-phase voltage waveforms. Then, an N-input EXOR circuit compares the N binarized voltage waveforms. The N-input EXOR circuit outputs a high voltage H if any one of the N input signals is different from the others, and outputs a low voltage L if all N input signals are the same. The N-input EXOR circuit reports the comparison result to CPU 11 via interface 13.
[0057] The CPU 11 determines whether there is a failure in the circuit components connected to the N switching elements based on the report from the N-input EXOR circuit, as in the case of Figure 4. When a failure is detected, the CPU 11 stops the operation of all switching elements, i.e., all N power supplies.
[0058] <Third embodiment> A power supply circuit 10 according to a third embodiment will be described with reference to FIG. 5. In the first embodiment, the duty comparison circuit 1 of the power supply circuit 10 had a CPU 11, acquired voltage waveform data from each of the switching nodes of the primary power supply 2 and the secondary power supply 3, and calculated the duty from the respective waveform data. In the power supply circuit 10 of the second embodiment, a hardware circuit performed the duty comparison and reported the comparison results to the CPU 11. In this embodiment, the primary power supply 2 (and secondary power supply 3) are monitored and a power-off command is sent by a hardware circuit other than the CPU 11. The configuration and processing of the power supply circuit 10 of this embodiment are the same as those of the first and second embodiments, except that a hardware circuit other than the CPU 11 monitors the primary power supply 2 (and secondary power supply 3) and sends a power-off command.
[0059] FIG. 5 is a diagram illustrating the configuration of a duty comparison circuit 1B of the third embodiment. The duty comparison circuit 1B of this embodiment has a comparator 17, an inverter 18, and a signal output unit 15. Similar to FIG. 4, the inverter 18 receives the voltage waveform at point B and inverts the phase. The inverter 18 can be considered an example of a circuit that adjusts the mutual phase between the waveform of the switching node of the first power supply and the waveform of the switching node of the second power supply. Note that in FIG. 5, the inverter 18 may receive the voltage waveform at point A instead of point B and invert the phase.
[0060] Comparator 17 compares the voltage waveform at point A with the phase-inverted voltage waveform at point B, and notifies signal output unit 15 of the comparison result. Similar to EXOR circuit 16 in Fig. 4, comparator 17 compares the voltage waveform at point A with the phase-inverted voltage waveform at point B to monitor the circuit component connected to point A and the circuit component output to point B. The processing of comparator 17 can be said to be an example of comparing duties similar to those performed by CPU 11 in Fig. 2.
[0061] If the comparison result in the comparator 17 is a mismatch, the signal output unit 15 sends a power-off command to the primary power supply 2 (and the secondary power supply 3). If a failure occurs in the circuit component connected to point B or the circuit component output to point B, the primary power supply 2 and the secondary power supply 3 will stop. Comparator 17 can be said to compare the voltage waveform of the switching node of the first power supply with the voltage waveform of the switching node of the second power supply, whose mutual phases have been adjusted. Furthermore, comparator 17 and signal output unit 15 can be said to stop the output of the first power supply and the second power supply if the compared voltage waveforms differ.
[0062] The power supply circuit 10 of this embodiment has an extremely simple configuration and is able to monitor circuit components connected to the primary power supply 2 and secondary power supply 3, and when a fault is detected, shut down the primary power supply 2 and secondary power supply 3. As described above, the duty comparison circuit 1B does not necessarily compare the duties themselves, but can also be called a waveform comparison circuit that compares the voltage waveform of the switching node of the first power supply with the voltage waveform of the switching node of the second power supply.
[0063] (Variation 1) In FIG. 5, the duty comparison circuit 1B includes a comparator 17 and an inverter 18. Instead of this configuration, the pair of comparators 17A and 17B in FIG. 4 and the EXOR circuit 16 that compares the outputs of the comparators 17A and 17B may be used. That is, in FIG. 4, the CPU 11, the main memory unit 12, and the interface 13 may be omitted, and the comparison result of the EXOR circuit 16 may be input to the signal output unit 15. The signal output unit 15 controls the primary power supply 2 and the secondary power supply 3 based on the comparison result of the EXOR circuit 16. That is, if the comparison result is a mismatch, the signal output unit 15 may instruct the primary power supply 2 (and the secondary power supply 3) to turn off. By using the pair of comparators 17A and 17B in FIG. 4 and the EXOR circuit 16 that compares the outputs of the comparators 17A and 17B, it is possible to compare the waveforms even if the amplitudes of the voltage waveforms at points A and B differ.
[0064] (Variation 2) In the third embodiment, the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3 includes the duty comparison circuit 1B that compares the duties of the switching nodes.
[0065] The application of the duty comparison circuit 1B is not limited to the power supply circuit 10 including the primary power supply 2 and the secondary power supply 3. That is, if the power supply circuit 10 has N power supplies (switching elements), the duty comparison circuit 1B only needs to acquire voltage waveforms from the N switching elements (corresponding to the voltage waveforms at points A and B in FIG. 1 ). The duty comparison circuit 1B can then be provided with N−1 phase adjustment circuits instead of the inverter 18. The N−1 phase adjustment circuits are circuits that shift the phase by 360 (1 / N) degrees, 360 (2 / N) degrees, . . . , and 360 (N−1 / N) degrees, respectively. If a multiphase power supply has N switching elements (N circuits corresponding to the primary power supply 2 and the secondary power supply 3), the phases of the voltage waveforms generated by the switching of each switching element will be shifted by 360 (1 / N) degrees. Therefore, the N−1 phase adjustment circuits adjust the phases of the voltage waveforms generated by the N switching elements so that they are in phase.
[0066] Then, the N-1 comparators are each in phase and compare N sets of voltage waveforms (first waveform, second waveform), (second waveform, third waveform), ..., (N-1th waveform, Nth waveform). Then, an OR operation is performed on the outputs of the N-1 comparators, and if the result of the OR operation is H (i.e., if one or more outputs of the N comparators are H (mismatch)), the signal output unit 15 sends a power OFF signal to the N switching elements, as in FIG. 5, to stop their operation. Here, in the case of mismatch, the outputs of the N-1 comparators swing up to the power supply voltage of the comparators and become a high potential H, and in the case of match, the output swings up to the power supply voltage of the comparators and becomes a high potential H. In this case, the potential becomes low.
[0067] Furthermore, when the power supply circuit 10 has N power supplies (switching elements), the CPU 11, the main memory unit 12, and the interface 13 may be omitted from the configuration of FIG. 4, and an N-input EXOR circuit may be used instead of the EXOR circuit 16.
[0068] That is, in the duty comparison circuit 1B of the second modification, N comparators similar to the comparators 17A and 17B of FIG. 4 simply binarize N voltage waveforms that have been made in phase by N−1 phase adjustment circuits. Then, an N-input EXOR circuit compares the N binarized voltage waveforms. Note that the N-input EXOR circuit outputs a high voltage H if at least one of the N input signals is different from the others, and outputs a low voltage L if all the N input signals are the same. The N-input EXOR circuit then reports the comparison result to the signal output unit 15.
[0069] The signal output unit 15 determines whether there is a failure in the circuit components connected to the N switching elements based on the report from the N-input EXOR circuit, as in the case of Fig. 4. When a failure is detected, the CPU 11 stops the operation of all the switching elements. [Explanation of symbols]
[0070] 1, 1A, 1B Duty comparison circuit 2 Primary Power Supply 3 Secondary Power Supply 9 Load 10 Power circuit 11 CPU 12 Main memory 13 Interface 14A, 14B ADC 15 Signal output section 16 EXOR circuit 17, 17A, 17B Comparators 18 Inverter
Claims
1. A circuit for controlling a multiphase power supply that boosts or bucks an input voltage and supplies power to a load circuit, a first power source and a second power source; a control unit that calculates a duty of a switching node of the first power supply and a duty of a switching node of the second power supply, compares the calculated duties, and stops the output of the first power supply and the second power supply when the compared duties are different. circuit.
2. The circuit according to claim 1 , wherein the control unit acquires signal waveforms from the switching node of the first power supply and the switching node of the second power supply, and calculates a duty cycle from each waveform.
3. The control unit an inverter circuit that inverts the phase of a second waveform from a switching node of the second power supply; a comparison circuit that compares a first waveform from a switching node of the first power supply with the second waveform whose phase is inverted; 2. The circuit according to claim 1, wherein the output of the first power supply and the second power supply is stopped based on the comparison result of the comparator circuit.
4. A circuit for controlling a multiphase power supply that boosts or bucks an input voltage and supplies power to a load circuit, a first power source and a second power source; a circuit for adjusting a relative phase between a waveform of a signal from a switching node of the first power supply and a waveform of a signal from a switching node of the second power supply; a control unit that compares a waveform of the switching node of the first power supply and a waveform of the switching node of the second power supply, the mutual phases of which have been adjusted, and stops the outputs of the first power supply and the second power supply when the compared waveforms are different. circuit.
5. A control system including a power supply circuit that controls a multiphase power supply that boosts or bucks an input voltage and supplies power to a load circuit, and the load circuit, The power supply circuit includes: a first power source and a second power source; a control unit that compares a duty of a switching node of the first power supply with a duty of a switching node of the second power supply, and stops the output of the first power supply and the second power supply when the compared duties are different. Control system.
6. A control system including a power supply circuit that controls a multiphase power supply that boosts or bucks an input voltage and supplies power to a load circuit, and the load circuit, The power supply circuit includes: a first power source and a second power source; a circuit for adjusting a relative phase between a waveform of a signal from a switching node of the first power supply and a waveform of a signal from a switching node of the second power supply; a control unit that compares a waveform of the switching node of the first power supply and a waveform of the switching node of the second power supply, the mutual phases of which have been adjusted, and stops the outputs of the first power supply and the second power supply when the compared waveforms are different. Control system.
Citation Information
Patent Citations
Electronic control device
JP2023116248A