Semiconductor device

A semiconductor device with a zigzag or U-shaped lead frame design addresses the high processing force issue of 180-degree folding, enhancing manufacturing ease and stress relief, thus improving device reliability.

JP2025123007APending Publication Date: 2025-08-22MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2024018818
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-02-09
Publication Date
2025-08-22

AI Technical Summary

Technical Problem

The existing method of forming a wavy lead frame by folding it 180 degrees requires significant force during processing, and this can lead to stress and warpage in semiconductor devices due to thermal expansion and contraction.

Method used

A semiconductor device with a lead frame that is shaped to relieve stress, featuring a zigzag or U-shaped loop when viewed from above, reducing the need for a 180-degree fold and minimizing processing force.

Benefits of technology

The zigzag or U-shaped lead frame design reduces processing force and stress, allowing for easier manufacturing and improved reliability of the semiconductor device while maintaining effective stress relief.

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Abstract

To provide a semiconductor device having a lead frame with a shape for relaxing a stress and capable of reducing a force applied when the lead frame is formed.SOLUTION: A semiconductor device according to an embodiment of the present disclosure includes: a substrate having an electrode land; a semiconductor element mounted on the substrate and connected to an electrode land; a plate-shaped lead frame having one end connected to the semiconductor element or the electrode land of the substrate; and a sealing material sealing the semiconductor element, the substrate, and the lead frame. Inside an encapsulant, the lead frame is folded back at an angle smaller than 180 degrees at a straight part adjacent to the encapsulant so as to form a peak and a valley when viewed from a side surface.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] A technology is known in which wiring connected to the surface electrodes of semiconductor elements is made into a plate-shaped lead frame to increase the area. Compared to conventional wires, this technology can increase the bonding strength with the semiconductor element and improve heat dissipation, thereby extending the power cycle life of semiconductor devices.

[0003] However, heat applied during manufacturing can cause differences in thermal expansion and contraction between components such as the substrate, semiconductor element, lead frame, and encapsulant, resulting in residual stress that can cause warping in these components.

[0004] Patent Document 1 discloses a structure in which a lead frame is folded 180 degrees up and down to form a wavy spring section for stress relief. The expansion and contraction of the spring section absorbs the difference in thermal expansion and contraction between components, thereby suppressing warpage. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-174927 Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the above-mentioned method, the lead frame needs to be folded back 180 degrees to form a wavy shape, which requires a lot of force during processing.

[0007] In order to solve the above-mentioned problems, an object of the present disclosure is to provide a semiconductor device that has a lead frame shaped to relieve stress, and that can reduce the force applied when forming the lead frame. [Means for solving the problem]

[0008] A first aspect of the present disclosure is a substrate having electrode lands; a semiconductor element mounted on the substrate and connected to the electrode lands; a plate-shaped lead frame having one end connected to the electrode land of the semiconductor element or the substrate; a sealing material that seals the semiconductor element, the substrate, and the lead frame; It is preferable that the lead frame is a semiconductor device in which adjacent straight line portions are folded back at an angle of less than 180 degrees inside the sealing material so as to form peaks and valleys when viewed from the side.

[0009] A second aspect of the present disclosure is a substrate having electrode lands; a semiconductor element mounted on the substrate and connected to the electrode lands; a plate-shaped lead frame having one end connected to the electrode land of the semiconductor element or the substrate; a sealing material that seals the semiconductor element, the substrate, and the lead frame; The lead frame is provided inside the sealing material. It has a U-shaped loop portion when viewed from above, or The semiconductor device preferably has a zigzag or stepped shape when viewed from above. [Effects of the Invention]

[0010] According to the first aspect of the present disclosure, the lead frame has a zigzag shape when viewed from the side, eliminating the need to fold it back 180 degrees. According to the second aspect, the lead frame does not need to be bent, reducing the force required for processing. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a side view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a side view of the lead frame of the first embodiment. [Figure 3] 10 is a modified example of the semiconductor device of the first embodiment. [Figure 4] 10 is a modified example of the semiconductor device of the first embodiment. [Figure 5] FIG. 10 is a top view of a semiconductor device according to a second embodiment of the present disclosure. [Figure 6] FIG. 10 is a side view of a semiconductor device according to a second embodiment of the present disclosure. [Figure 7] FIG. 10 is a top view of a semiconductor device according to a third embodiment of the present disclosure. [Figure 8] 10A and 10B are diagrams showing a shape pattern of a lead frame according to a third embodiment. [Figure 9] 10A and 10B are diagrams showing a shape pattern of a lead frame according to a third embodiment. [Figure 10] 10A and 10B are diagrams showing a shape pattern of a lead frame according to a third embodiment. [Figure 11] 10A and 10B are diagrams showing a shape pattern of a lead frame according to a third embodiment. [Figure 12] FIG. 1 is a top view of a semiconductor device that combines first to third embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0012] Embodiments of the present disclosure will be described with reference to the drawings. The same or corresponding components will be designated by the same reference numerals, and repeated description may be omitted.

[0013] Embodiment 1 1 is a side view of a semiconductor device 100 according to a first embodiment of the present disclosure. The semiconductor device 100 includes a semiconductor element 1, a substrate 3 on which the semiconductor element 1 is mounted, a plate-shaped lead frame 4, bonding materials 5 and 6, and a sealing material 9 that seals them.

[0014] The substrate 3 has electrode lands 31, an insulating layer 32, and a substrate heat dissipation layer 33, and controls the switching of the semiconductor element 1. The electrode lands 31 are the electrode layers of the substrate 3. Using a metal material with high thermal conductivity for the electrode lands 31 can improve heat dissipation.

[0015] The insulating layer 32 is disposed between the electrode land 31 and the substrate heat dissipation layer 33, providing insulation between them. By using a deformation-resistant resin for the insulating layer 32, it is possible to prevent cracks from occurring even when minute deformation occurs in the component due to a power cycle or the like. Note that the material for the insulating layer 32 is not limited to resin, and AlN, Al2O3, Si3N4, etc. may also be used.

[0016] By using a material with high thermal conductivity for the substrate heat dissipation layer 33, the heat dissipation of the electrode lands 31 can be improved via the insulating layer 32, and the temperature rise of the semiconductor device 100 can be suppressed.

[0017] The semiconductor element 1 is electrically connected onto the electrode land 31 by a bonding material 5. The semiconductor element 1 is, for example, a Si RC-IGBT (Reverse Conducting Insulated Gate Bipolar Transistor) or a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor).

[0018] The bonding material 5 is disposed between the semiconductor element 1 and the electrode land 31. The bonding material 6 is disposed between the semiconductor element 1 and the lead frame 4. The bonding materials 5 and 6 are preferably made of materials with high electrical and thermal conductivity, and solder, silver, or the like is used. In addition to the above properties, lead-free solder also acts as a buffer material that reduces stress, and its use can improve the reliability of the semiconductor device 100. Alternatively, sintered silver can also be used.

[0019] The sealing material 9 seals the semiconductor element 1, the substrate 3, the lead frame 4, etc. The material of the sealing material 9 is preferably one that can improve the reliability of the semiconductor device 100, and for example, a thermosetting epoxy resin filled with SiO2 filler is used. The sealing method is, for example, a transfer molding method.

[0020] The lead frame 4 is a plate-shaped metal, and one end is electrically connected to a control electrode such as a gate electrode, an emitter electrode, or a collector electrode of the semiconductor element 1. Alternatively, one end is electrically connected to an electrode land 31.

[0021] The other end of the lead frame 4, which is not connected to the semiconductor element 1 or the electrode land 31, extends outside the sealing material 9. The lead frame 4 has a zigzag-shaped spring portion 41 inside the sealing material 9 for stress relief.

[0022] More specifically, in the zigzag spring portion 41, the lead frame 4 is folded back to form peaks and valleys when viewed from the side, and the folding angle θ between adjacent straight portions forming a peak or valley is smaller than 180 degrees. From the viewpoint of reducing the folding force, it is more preferable that the angle θ is 90 degrees or smaller, as shown in this figure.

[0023] The spring portion 41 is generally formed by bending a metal plate, but may also be formed by pressing using a mold.

[0024] As described above, the spring portion of the prior art is wavy, which requires the lead frame 4 to be folded 180 degrees, which requires force during processing. On the other hand, by making the spring portion 41 zigzag as in the present disclosure, the force required for processing can be reduced. Furthermore, for the same number of repetitions (number of turns of the spring), a zigzag shape allows for a smaller volume of the base metal than a wavy shape. This reduces the electrical resistance of the lead frame and also enables lower manufacturing costs.

[0025] 2 is a side view of lead frame 4 according to embodiment 1. To increase the deflection of the spring, it is preferable that the height W1 of the peaks be equal to or greater than the plate thickness. Furthermore, if there is one or more peaks or valleys, the lead frame can function as a spring.

[0026] As described above, the lead frame 4 of this embodiment has a zigzag-shaped spring portion 41. The lead frame 4 at the spring portion 41 is folded back to form peaks and valleys when viewed from the side, and the angle θ between adjacent straight portions that form peaks or valleys is smaller than 180 degrees. This reduces the force required for processing.

[0027] The semiconductor element 1 is not limited to being made of silicon, but may also be made of a wide-bandgap semiconductor having a bandgap larger than that of silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride, and diamond. A semiconductor element 1 made of such a wide-bandgap semiconductor has high voltage resistance and allowable current density, allowing for miniaturization. By using this miniaturized semiconductor element 1, the semiconductor device 100 incorporating the semiconductor element 1 can also be miniaturized and highly integrated. Furthermore, the high heat resistance of the semiconductor element 1 allows for miniaturization of the heat sink's heat dissipation fins, enabling air cooling instead of water cooling, thereby further miniaturizing the semiconductor device 100. Furthermore, the semiconductor element 1 has low power loss and high efficiency, allowing for high efficiency in the semiconductor device 100. While it is desirable for all of the semiconductor elements 1 to be made of wide-bandgap semiconductors, the effects described in this embodiment can be achieved even if only one of the elements is made of a wide-bandgap semiconductor. This point is common to all of the following embodiments.

[0028] <Variation 1> 3 shows a modified example of the semiconductor device 100 of the first embodiment. In the encapsulant 9, one end of the lead frame 4 that is not connected to the semiconductor element 1 is connected to another semiconductor element 2. As shown in the figure, the lead frame 4 that connects the two semiconductor elements 1 and 2 may be provided with a zigzag-shaped spring portion 41. This provides the same effects as those of the first embodiment.

[0029] <Variation 2> 4 shows a modified example of the semiconductor device 100 of the first embodiment. One end of the lead frame 4 that is not connected to the semiconductor element 1 is connected to another electrode land 312 on the substrate 3 that does not carry the semiconductor element 1. In this way, the lead frame 4 that connects the semiconductor element 1 to the substrate 3 may be provided with a zigzag-shaped spring portion 41. This provides the same effects as those of the first embodiment.

[0030] Embodiment 2 In this embodiment, a through hole 43 for pouring a bonding material 6 is provided at the tip of a lead frame 4 connected to a semiconductor element 1. The following describes changes from the first embodiment.

[0031] 5 is a top view of a semiconductor device 100 according to a second embodiment of the present disclosure. The lead frame 4 has through holes 43 that penetrate from the top surface to the surface that is connected to the semiconductor element 1. During bonding, a bonding material 6 is poured through the through holes 43. Typically, when bonding the semiconductor element 1 and the lead frame 4, a solder foil is inserted between the two and soldered while positioning them. By pouring the bonding material 6 through the through holes 43 as in the present disclosure, it is no longer necessary to simultaneously position the three components consisting of the semiconductor element 1, the solder foil, and the lead frame 4, making bonding easier.

[0032] 6 is a side view of a semiconductor device 100 according to a second embodiment of the present disclosure. The bonding material 6 between the lead frame 4 and the semiconductor element 1 passes through a through hole 43 and protrudes on the upper surface of the lead frame 4. Increasing the contact area between the bonding material 6 and the lead frame 4 in this manner allows the semiconductor element 1 and the lead frame 4 to be more firmly fixed together than in a typical lead frame that does not have a through hole 43.

[0033] Embodiment 3 7 is a top view of a semiconductor device 100 according to a third embodiment of the present disclosure. To alleviate stress, the lead frame 4 of this embodiment has spring portions 42 that are zigzag-shaped when viewed from above. That is, the spring portions 42 have repeated V-shaped peaks and valleys when viewed from above. The spring portions 42 of this embodiment do not need to be bent like the lead frame 4 of the first embodiment, and can therefore be processed by punching using a die or the like, thereby reducing the force required for processing.

[0034] The spring portion 42 of this embodiment has a larger moment of inertia than that of embodiment 1, and therefore has a smaller expansion / contraction effect. To increase the deflection of the spring, it is desirable that the deformation amount W2 be sufficiently larger than the plate width W3.

[0035] 8 to 11 are diagrams showing the shape pattern of the lead frame 4 according to the third embodiment, and are top views of the lead frame 4. The zigzag shape in FIG. 8 is the same as that in FIG. 7, so the explanation will be omitted. The lead frame 4 may be bent in a stepped shape when viewed from above, as in FIG. 9. The number of repetitions of the steps is not limited.

[0036] The lead frame 4 may also have a U-shaped loop portion when viewed from above, as shown in Fig. 10. The corners, which are the folds of the U, are curved, which makes it possible to reduce the stress concentrated at the corners compared to the zigzag shape of Fig. 8. Note that a wave-shaped spring portion 42 may also be formed by arranging loops continuously.

[0037] Like Fig. 9, Fig. 11 shows a lead frame 4 with a stepped shape when viewed from above, but the bent portions of the steps are curved. That is, the bent portions of the steps are subjected to corner rounding and R-chamfering. This is expected to have a greater effect on stress relaxation at the corners than Fig. 9. Also, in the zigzag shape of Fig. 8, the folded portions of the zigzag may be curved.

[0038] As described above, this embodiment has spring portion 42 that is looped in a zigzag, stepped, or U-shape when viewed from above. This allows stress to be alleviated in the same way as in embodiment 1. In addition, the force required to process spring portion 42 can be made even smaller than in embodiment 1.

[0039] As described above, according to the present disclosure, it is possible to provide a semiconductor device that has a lead frame shaped to relieve stress, and that can reduce the force applied when forming the lead frame.

[0040] The present disclosure is not limited to the above-described embodiments, and various modifications can be made in the implementation stage without departing from the spirit of the present disclosure. Furthermore, the embodiments may be implemented in appropriate combinations, in which case the combined effects can be obtained. For example, FIG. 12 is a top view of a semiconductor device 100 that combines the first to third embodiments. This provides the combined effects of the first to third embodiments.

[0041] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) a substrate having electrode lands; a semiconductor element mounted on the substrate and connected to the electrode lands; a plate-shaped lead frame having one end connected to the electrode land of the semiconductor element or the substrate; a sealing material that seals the semiconductor element, the substrate, and the lead frame; The semiconductor device is such that, inside the sealing material, adjacent straight portions of the lead frame are folded back at an angle of less than 180 degrees so as to form peaks and valleys when viewed from the side. (Appendix 2) 2. The semiconductor device according to claim 1, wherein adjacent straight portions of the lead frame are folded back inside the sealing material at an angle of less than 90 degrees. (Appendix 3) a substrate having electrode lands; a semiconductor element mounted on the substrate and connected to the electrode lands; a plate-shaped lead frame having one end connected to the electrode land of the semiconductor element or the substrate; a sealing material that seals the semiconductor element, the substrate, and the lead frame; The lead frame is provided inside the sealing material. It has a U-shaped loop portion when viewed from above, or A semiconductor device that has a zigzag or stepped shape when viewed from above. (Appendix 4) the one end of the lead frame is connected to the semiconductor element; A semiconductor device according to any one of claims 1 to 3, wherein the other end of the lead frame is connected to another semiconductor element or another electrode land of the substrate within the sealing material, or is extended to the outside of the sealing material. (Appendix 5) the one end of the lead frame is connected to the semiconductor element; the one end of the lead frame has a through hole that penetrates from an upper surface to a surface connected to the semiconductor element, 5. The semiconductor device according to claim 1, wherein a bonding material that bonds the one end of the lead frame to the semiconductor element passes through the through hole and protrudes on the upper surface. (Appendix 6) 6. The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide bandgap semiconductor. (Appendix 7) 7. The semiconductor device according to claim 3, wherein the lead frame has a stepped shape when viewed from above, and the bent portions of the steps are curved. (Appendix 8) 7. The semiconductor device according to claim 3, wherein the lead frame has a zigzag shape when viewed from above, and the folded portions of the zigzag are curved. [Explanation of symbols]

[0042] REFERENCE SIGNS LIST 1 semiconductor element, 2 semiconductor element, 3 substrate, 4 lead frame, 5 bonding material, 6 bonding material, 7 bonding material, 8 bonding material, 9 sealing material, 31 electrode land, 32 insulating layer, 33 substrate heat dissipation layer, 41 spring portion, 42 spring portion, 43 through hole, 100 semiconductor device, 312 electrode land

Claims

1. a substrate having electrode lands; a semiconductor element mounted on the substrate and connected to the electrode lands; a plate-shaped lead frame having one end connected to the electrode land of the semiconductor element or the substrate; a sealing material that seals the semiconductor element, the substrate, and the lead frame; In the semiconductor device, adjacent straight line portions of the lead frame are folded back at an angle of less than 180 degrees inside the sealing material so as to form peaks and valleys when viewed from the side.

2. 2. The semiconductor device according to claim 1, wherein adjacent straight portions of said lead frame are folded back inside said sealing material at an angle smaller than 90 degrees.

3. a substrate having electrode lands; a semiconductor element mounted on the substrate and connected to the electrode lands; a plate-shaped lead frame having one end connected to the electrode land of the semiconductor element or the substrate; a sealing material that seals the semiconductor element, the substrate, and the lead frame; The lead frame is provided inside the sealing material. It has a U-shaped loop portion when viewed from above, or A semiconductor device that has a zigzag or stepped shape when viewed from above.

4. the one end of the lead frame is connected to the semiconductor element; 4. The semiconductor device according to claim 1, wherein the other end of the lead frame is connected to another semiconductor element or another electrode land of the substrate within the sealing material, or is extended to the outside of the sealing material.

5. the one end of the lead frame is connected to the semiconductor element; the one end of the lead frame has a through hole that penetrates from an upper surface to a surface connected to the semiconductor element, 4. The semiconductor device according to claim 1, wherein a bonding material that bonds said one end of said lead frame to said semiconductor element passes through said through-hole and protrudes on said upper surface.

6. 4. The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide bandgap semiconductor.

7. 4. The semiconductor device according to claim 3, wherein said lead frame has a stepped shape when viewed from above, and a bent portion of the stepped shape is curved.

8. 4. The semiconductor device according to claim 3, wherein said lead frame has a zigzag shape when viewed from above, and the folded portions of the zigzag shape are curved.

Citation Information

Patent Citations

  • Power module and manufacturing method thereof

    JP2017174927A