Display device and manufacturing method for the same
By using alignment marks as functional terminals on the array substrate, the method addresses the challenge of aligning LED elements at high density, resulting in improved display device performance through enhanced precision and definition.
Patent Information
- Application Number
- JP2024040693
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-15
- Publication Date
- 2025-09-29
AI Technical Summary
The challenge in manufacturing high-definition display devices lies in accurately aligning multiple LED elements at high density during the transfer process from a transfer substrate to an array substrate, necessitating improved alignment accuracy.
A manufacturing method that utilizes alignment marks on the array substrate, which are also functional terminals, to enhance precision in aligning and bonding LED elements, allowing for high-density mounting and improved display performance.
This approach improves alignment accuracy, enabling high-definition displays by allowing multiple LED elements to be mounted at high density, thereby enhancing the performance of the display device.
Smart Images

Figure 2025141003000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a display device and a manufacturing method thereof. [Background technology]
[0002] One type of display device is an LED (Light Emitting Diode) display device in which light-emitting diode elements, which are self-emitting elements, are arranged in a matrix on a substrate. For example, Patent Document 1 discloses a technique for transferring multiple microdevices (LEDs) from a template to a receiver substrate. Patent Document 2 discloses a technique for transferring three types of LED elements from a growth substrate to a target substrate. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] US Patent Application Publication No. 2019 / 0096774 [Patent Document 2] Special Publication No. 2019-511838 Summary of the Invention [Problem to be solved by the invention]
[0004] When multiple LED elements are transferred to a transfer substrate, they are attached to the adhesive resin layer of the transfer substrate. When mounting multiple LED elements from the transfer substrate to an array substrate (backplane), alignment between the transfer substrate and the array substrate is required. In particular, when mounting multiple types of LED elements at high density, technology to improve alignment accuracy is required.
[0005] The primary objective of the present application is to provide a technology for improving the performance of a display device by mounting multiple LED elements at high density. Other objectives and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]
[0006] A manufacturing method of a display device according to one embodiment includes the steps of: (a) preparing a light-emitting element holding substrate on which a plurality of inorganic light-emitting elements are formed, a second substrate having a second adhesive resin layer, and an array substrate having a plurality of terminals and a plurality of bump electrodes formed on the plurality of terminals; (b) after the step (a), attaching the plurality of inorganic light-emitting elements of the light-emitting element holding substrate to the second adhesive resin layer; (c) after the step (b), aligning the second substrate with the array substrate; (d) after the step (c), bonding first electrodes of the plurality of inorganic light-emitting elements to the plurality of bump electrodes while the plurality of inorganic light-emitting elements are attached to the second adhesive resin layer; and (e) after the step (d), peeling the plurality of inorganic light-emitting elements from the second substrate. The step (c) is performed based on positional information of alignment marks provided on the array substrate. The array substrate has a mounting area where the plurality of inorganic light-emitting elements are mounted from the second substrate. The terminals provided at the corners of the mounting area have a planar shape different from the planar shape of the terminals provided in the mounting area other than the corners, and the terminals provided at the corners are used as the alignment marks.
[0007] A display device according to one embodiment includes a plurality of inorganic light-emitting elements, each having a first electrode, and an array substrate having a plurality of terminals and a plurality of bump electrodes formed on the plurality of terminals. The first electrodes of the plurality of inorganic light-emitting elements are bonded to the plurality of bump electrodes. The array substrate has a mounting area in which the plurality of inorganic light-emitting elements are mounted from a single transfer substrate. The planar shape of the terminals provided at the corners of the mounting area is different from the planar shape of the terminals provided in the mounting area other than the corners. [Brief explanation of the drawings]
[0008] [Figure 1] 1 is a plan view showing a display device in accordance with a first embodiment. [Figure 2]2 is a circuit diagram showing the periphery of a pixel according to the first embodiment. FIG. [Figure 3] 3 is a cross-sectional view showing the connection between the array substrate and the LED elements in the first embodiment. FIG. [Figure 4] FIG. 10 is an enlarged cross-sectional view showing a modified example of the LED element. [Figure 5] 2 is a plan view showing the LED holding substrate in the first embodiment. FIG. [Figure 6] 3 is an enlarged cross-sectional view showing a part of the LED holding substrate in the first embodiment. FIG. [Figure 7] FIG. 2 is a cross-sectional view showing a transfer substrate in the first embodiment. [Figure 8] 2 is an enlarged cross-sectional view showing a part of the array substrate in the first embodiment. FIG. [Figure 9] 1 is a plan view showing an outline of an array substrate according to a first embodiment. [Figure 10] FIG. 2 is a plan view showing the planar shape of an alignment mark in the first embodiment. [Figure 11] FIG. 10 is a plan view showing an outline of a mounting area of an array substrate in a study example. [Figure 12] 3 is a flowchart showing a manufacturing process of the display device according to the first embodiment. [Figure 13] 3A to 3C are cross-sectional views illustrating a manufacturing process of the display device according to the first embodiment. [Figure 14] 14A to 14C are cross-sectional views showing the manufacturing process of the display device following FIG. 13. [Figure 15] 15A to 15C are cross-sectional views showing the manufacturing process of the display device following FIG. 14. [Figure 16] 16A to 16C are cross-sectional views showing the manufacturing process of the display device following FIG. 15. [Figure 17] 17A to 17C are cross-sectional views showing the manufacturing process of the display device following FIG. 16. [Figure 18] 18A to 18C are cross-sectional views showing the manufacturing process of the display device following FIG. 17. [Figure 19] 19A to 19C are cross-sectional views showing the manufacturing process of the display device following FIG. 18. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily conceive while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment. However, these are merely examples and do not limit the interpretation of the present invention. Furthermore, in this specification and each drawing, elements similar to those described above with reference to the previous drawings may be designated by the same or related reference numerals, and detailed descriptions may be omitted as appropriate.
[0010] (Embodiment 1) The display device DSP1 according to the first embodiment will be described below with reference to FIGS.
[0011] The display device DSP1 is, for example, a micro LED display device equipped with a plurality of micro LED elements (inorganic light emitting elements) 20. Micro LED elements have a smaller element size (outer diameter dimension) than general LED elements, and therefore have the advantage of being able to display high-definition images.
[0012] Although organic light-emitting diode elements (OLED: Organic Light-Emitting Diode) are known as light-emitting diode elements that are self-emitting elements, the LED element 20 described in the first embodiment is distinguished from the organic light-emitting diode elements.
[0013] <Display device> 1 is a plan view showing an example of the configuration of a display device DSP1, in which the boundary between a display area DA and a peripheral area PFA, a control circuit 5, a drive circuit 6, and a plurality of pixels PIX are indicated by dashed dotted lines.
[0014] 1, the display device DSP1 includes a display area DA, a peripheral area PFA surrounding the periphery of the display area DA in a frame shape, a plurality of pixels PIX arranged in a matrix within the display area DA, a control circuit 5, and a drive circuit 6. The control circuit 5 and the drive circuit 6 are formed on a substrate 10 of an array substrate SUB, which will be described later.
[0015] The control circuit 5 is a control circuit that controls the driving of the display function of the display device DSP1. For example, the control circuit 5 is a driver IC (Integrated Circuit) mounted on the substrate 10. In FIG. 1, the control circuit 5 is arranged along one of the four short sides of the substrate 10. In addition, in the first embodiment, the control circuit 5 includes a signal line drive circuit that drives video signal lines VL (see FIG. 2) connected to the plurality of pixels PIX.
[0016] However, the position and configuration of the control circuit 5 are not limited to the example in Fig. 1 and may be modified in various ways. For example, in Fig. 1, a circuit board such as a flexible board may be connected to the position shown as the control circuit 5, and the driver IC described above may be mounted on the circuit board. Also, for example, a signal line drive circuit that drives the video signal lines VL may be formed separately from the control circuit 5.
[0017] The drive circuit 6 is a circuit that drives the scanning signal lines GL of the multiple pixels PIX. The drive circuit 6 drives the multiple scanning signal lines GL based on control signals from the control circuit 5. In FIG. 1, the drive circuit 6 is arranged along one of the four long sides of the substrate 10.
[0018] However, the position and configuration of the drive circuit 6 are not limited to the example in Fig. 1 and there are various modifications. For example, in Fig. 1, a circuit board such as a flexible board may be connected to the position shown as the drive circuit 6, and the drive circuit 6 may be mounted on the circuit board.
[0019] Next, an example of the circuit configuration of a pixel PIX will be described using Fig. 2. Note that Fig. 2 shows one pixel PIX as a representative example, but each of the multiple pixels PIX shown in Fig. 1 has a circuit similar to that of the pixel PIX shown in Fig. 2. Hereinafter, the circuit including the switch, capacitor, and LED element 20 provided in the pixel PIX may be referred to as the pixel circuit. The pixel circuit is a voltage signal-based circuit that controls the light emission state of the LED element 20 in response to a video signal Vsg supplied from the control circuit 5 (see Fig. 1).
[0020] As shown in Fig. 2, the pixel PIX includes an LED element 20. The LED element 20 has an anode electrode 20EA and a cathode electrode 20EC. The anode electrode 20EA and the cathode electrode 20EC of the LED element 20 are each electrically connected to a terminal 30 of the pixel PIX. In Fig. 2, the cathode electrode 20EC of the LED element 20 is connected to a terminal 30L, and the anode electrode 20EA of the LED element 20 is connected to a terminal 30H. A potential PVS that is a relatively low fixed potential (low potential) is supplied to the terminal 30L, and a potential PVD that is a fixed potential (high potential) higher than the potential supplied to the terminal 30L is supplied to the terminal 30H.
[0021] The pixel PIX includes an output switch BCT, a drive transistor DRT, and a pixel switch SST. The output switch BCT is a transistor that controls the light emission time of the LED element 20 in response to a control signal Gsb supplied from the drive circuit 6. The drive transistor DRT is a transistor that controls the amount of drive current supplied to the anode electrode 20EA of the LED element 20 in response to a video signal Vsg. The pixel switch SST is a transistor that controls the connection state (on or off state) between the pixel circuit and the video signal line VL in response to a control signal Gss.
[0022] The drive circuit 6 also includes a reset switch RST that controls the input of a reset potential. The output switch BCT, drive transistor DRT, pixel switch SST, and reset switch RST are each, for example, a thin-film transistor. When the pixel switch SST is in the on state, a video signal Vsg is input to the pixel circuit from the video signal line VL.
[0023] The driving circuit 6 includes a shift register circuit and an output buffer circuit (not shown), etc. The driving circuit 6 outputs a pulse based on a horizontal scanning start pulse transmitted from the control circuit 5 (see FIG. 1), and outputs the control signals Gss, Gsb, and Gsr.
[0024] The multiple scanning signal lines GL include scanning signal lines GLA, scanning signal lines GLB, and a reset line GLR. Each of the multiple scanning signal lines GL extends in the X direction. The scanning signal line GLA is connected to the gate electrode of the output switch BCT. When a control signal Gsb is supplied to the scanning signal line GLA, the output switch BCT is turned on. The scanning signal line GLB is connected to the gate electrode of the pixel switch SST. When a control signal Gss is supplied to the scanning signal line GLB, the pixel switch SST is turned on. The reset line GLR is connected between the output switch BCT and the drive transistor DRT and to the drain electrode of the reset switch RST. When a control signal Gsr, which is a reset signal, is supplied to the gate electrode of the reset switch RST, a reset potential is supplied to the reset line GLR.
[0025] The pixel PIX has a storage capacitor Cs and an auxiliary capacitor Cad. The storage capacitor Cs is connected between the gate electrode of the drive transistor DRT and the terminal 30H. The auxiliary capacitor Cad is connected between the source electrode of the output switch BCT and the terminal 30H. The auxiliary capacitor Cad is a capacitive element for adjusting the amount of light emission current, and in a modified example, the auxiliary capacitor Cad may not be provided.
[0026] <Connection between array board and LED elements> As shown in FIG. 3, the display device DSP1 includes an array substrate (backplane) SUB. The array substrate SUB has a substrate 10, an inorganic insulating layer 11, an organic insulating layer 12, and an organic insulating layer 13. The substrate 10 has a surface 10t and a surface 10b opposite to the surface 10t. The inorganic insulating layer 11 is formed on the surface 10t, the organic insulating layer 12 is formed on the inorganic insulating layer 11, and the organic insulating layer 13 is formed on the organic insulating layer 12. The array substrate SUB has a surface SUBt and a surface SUBb opposite to the surface SUBt. In the first embodiment, the surface SUBb coincides with the surface 10b, and the surface SUBt coincides with the upper surface of the organic insulating layer 13.
[0027] The array substrate SUB also includes various circuits provided in the pixel PIX described with reference to Fig. 2. For example, the semiconductor layers of the thin-film transistors constituting the output switch BCT, drive transistor DRT, and pixel switch SST shown in Fig. 2 are formed in a circuit layer within the inorganic insulating layer 11. Some of the inorganic insulating films constituting the inorganic insulating layer 11 are used as base layers for forming the thin-film transistors, and the other parts are used as gate insulating films for the thin-film transistors.
[0028] The array substrate SUB also has a plurality of terminals 30 and a plurality of bump electrodes (conductive bonding material) 40 formed on the plurality of terminals 30. The plurality of terminals 30 are formed on an organic insulating layer 12. The organic insulating layer 13 has openings that expose portions of the terminals 30. The bump electrodes 40 are electrically connected to the terminals 30 within the openings. The terminals 30 are made of a metal material such as aluminum, copper, or titanium, or an alloy material mainly containing the above metal materials. The bump electrodes 40 are made of a conductive material such as solder.
[0029] An LED element 20 is mounted on the array substrate SUB. The LED element 20 has a surface 20t and a surface 20b opposite to the surface 20t. The LED element 20 has a plurality of electrodes 20E arranged on the surface 20t. The plurality of electrodes 20E includes an anode electrode 20EA and a cathode electrode 20EC.
[0030] The anode electrode 20EA is electrically connected to the terminal 30H via the bump electrode 40. The cathode electrode 20EC is electrically connected to the terminal 30L via the bump electrode 40. In FIG. 3, one LED element 20 is illustrated, but a plurality of LED elements 20 are mounted in a matrix on the array substrate SUB. The display device DSP1 displays an image by driving the plurality of LED elements 20 mounted on the array substrate SUB. The light emitted from the LED element 20 is emitted, for example, from the surface 20b side.
[0031] In FIG. 3, an example in which both the anode electrode 20EA and the cathode electrode 20EC are arranged on the surface 20t is shown. However, there are various modifications to the structure of the LED element 20. For example, as shown in FIG. 4, in the case of the LED element 20M1, the cathode electrode 20EC is provided on the surface 20b, and the anode electrode 20EA is provided on the surface 20t. When the LED element 20 in FIG. 3 is replaced with the LED element 20M1 in FIG. 4, the terminal 30L connected to the cathode electrode 20EC is provided on the surface 20b of the LED element 20M1.
[0032] <Details of the LED holding substrate and the LED element> Hereinafter, with reference to FIGS. 5 and 6, the LED holding substrates (light-emitting element holding substrates) SS1, SS2, SS3 and the detailed structure of the LED element 20 will be described.
[0033] As shown in FIG. 5, the LED holding substrates SS1, SS2, SS3 (hereinafter simply referred to as substrates SS1, SS2, SS3) have surfaces SS1t, SS2t, SS3t and surfaces SS1b, SS2b, SS3b on the opposite sides of the surfaces SS1t, SS2t, SS3t. On the surfaces SS1t, SS2t, SS3t, LED elements 20 that emit light of different colors are arranged in a matrix.
[0034] For example, on the substrate SS1, a plurality of red LED elements 21 are arranged in a matrix. On the substrate SS2, a plurality of green LED elements 22 are arranged in a matrix. On the substrate SS3, a plurality of blue LED elements 23 are arranged in a matrix.
[0035] The substrates SS1, SS2, and SS3 are each a sapphire substrate. The LED elements 21, 22, and 23 are formed by, for example, laminating metal films, insulating films, and semiconductor films on the sapphire substrate. In other words, the substrates SS1, SS2, and SS3 are each a substrate (LED wafer) for manufacturing LEDs.
[0036] 6, the cross-sectional structures of the substrates SS1, SS2, and SS3 are the same, and the cross-sectional structures of the LED elements 21, 22, and 23 are the same. Therefore, the following description will be given of the substrate SS1 having a plurality of LED elements 21 as a representative example.
[0037] 6, the LED element 21 includes an N-type semiconductor layer 24 formed on a substrate SS1, an active layer 25 formed on the N-type semiconductor layer 24, and a P-type semiconductor layer 26 formed on the active layer 25. The N-type semiconductor layer 24 is formed as a common base layer for the anode electrode 20EA and the cathode electrode 20EC, and the active layer 25 and the P-type semiconductor layer 26 are stacked on the anode electrode 20EA side.
[0038] On the anode electrode 20EA side, a transparent electrode layer 27a is formed on the P-type semiconductor layer 26. The transparent electrode layer 27a on the anode electrode 20EA side and the N-type semiconductor layer 24 on the cathode electrode 20EC side are covered with a passivation film 28, which is an inorganic insulating film. Openings are formed in the passivation film 28 at locations where the anode electrode 20EA and the cathode electrode 20EC will be formed. A metal electrode layer 27c is laminated in each opening with a seed layer 27b interposed therebetween.
[0039] The anode electrode 20EA is a laminate including a transparent electrode layer 27a, a seed layer 27b, and a metal electrode layer 27c. The cathode electrode 20EC is a laminate including a seed layer 27b and a metal electrode layer 27c. A buffer layer 29 made of gallium nitride is formed between the N-type semiconductor layer 24 and the substrate SS1.
[0040] The LED elements 20 (LED elements 21, 22, 23) are transferred from the substrates SS1, SS2, SS3 to transfer substrates TR1, TR2 shown in FIG. 7, which will be described later, and then mounted from the transfer substrates TR1, TR2 to the array substrate SUB shown in FIGS. 8 and 9, which will be described later.
[0041] <Configuration of transfer substrate> 7, the transfer substrate TR1 has a surface TR1t, a surface TR1b opposite to the surface TR1t, and an adhesive resin layer 50 formed on the surface TR1t. The transfer substrate TR2 has a surface TR2t, a surface TR2b opposite to the surface TR2t, and an adhesive resin layer 51 formed on the surface TR2t. Although not shown, the planar shapes of the transfer substrates TR1 and TR2 are rectangular.
[0042] The transfer substrates TR1 and TR2 are made of, for example, a glass base material. The adhesive resin layers 50 and 51 are transparent (transparent to visible light) and made of, for example, a silicone-based, polyimide-based, acrylic-based, or epoxy-based resin material. The adhesive resin layers 50 and 51 also have adhesiveness sufficient to hold the LED elements 20. The adhesive strength of the adhesive resin layer 51 to the LED elements 20 is greater than the adhesive strength of the adhesive resin layer 50 to the LED elements 20. The adhesive resin layer 50 is formed in an area corresponding to the mounting area of an array substrate, which will be described later.
[0043] Furthermore, alignment marks AM1 may be provided on the surfaces TR1t and TR2t so as to be covered with adhesive resin layers 50 and 51, respectively. In this case, the alignment marks AM1 are made of a metal material such as aluminum, copper, or titanium, or an alloy material mainly made of the above metal material.
[0044] <Array board configuration> The array substrate SUB will be described below with reference to Figures 8 to 10. The array substrate SUB shown in Figure 8 is a part of the array substrate SUB shown in Figure 9, and corresponds to one mounting area 80. In Figure 9, the number and size of the terminals 30 are shown more simply than in Figure 8 and other figures, in order to make the description easier to understand.
[0045] 8, the array substrate SUB has a plurality of terminals 30. The plurality of terminals 30 includes a terminal 31 to be electrically connected to the LED element 21, a terminal 32 to be electrically connected to the LED element 22, and a terminal 33 to be electrically connected to the LED element 23. The terminals 31, 32, and 33 are arranged in a matrix in correspondence with the positions of the pixels PIX shown in FIG. 1. A plurality of bump electrodes 40 are formed on the plurality of terminals 30.
[0046] 9, the array substrate SUB has a mounting area 80 in which a plurality of LED elements 20 are mounted from one transfer substrate TR2. The array substrate SUB has a plurality of mounting areas 80, and here, a case in which the array substrate SUB has four mounting areas 80 is illustrated as an example.
[0047] Of the multiple terminals 30, the terminals 30 provided at the corners of each mounting area 80 have a different planar shape from the terminals 30 provided in the mounting area 80 other than the corners. Therefore, the terminals 30 provided at the corners can be used as alignment marks AM2. The alignment marks AM2 are used in the process of aligning the transfer substrate TR2 and the array substrate SUB when mounting the multiple LED elements 20 from the transfer substrate TR2 to the array substrate SUB.
[0048] The alignment mark AM2 is made of the same metal material as the other terminals 30 and is formed in the same layer as the other terminals 30. A bump electrode 40 is formed on the alignment mark AM2 as well, as with the other terminals 30. That is, the alignment mark AM2 also functions as a terminal 31 for the LED element 21, a terminal 32 for the LED element 22, or a terminal 33 for the LED element 23.
[0049] Fig. 10 shows an example of the planar shape of the alignment mark AM2. As shown in Fig. 10, the planar shape of the alignment mark AM2 only needs to be different from the planar shapes of the other terminals 30, and may be a polygonal shape such as a triangular or hexagonal shape, or may be a circular shape.
[0050] <Comparison between the study example and the first embodiment> FIG. 11 shows a mounting area 80 of a display device in an example studied by the inventors of the present application.
[0051] 11 , unlike the first embodiment, the study example has a plurality of terminals 30 provided in a mounting area 80, and an alignment mark AM3 provided near a corner of the mounting area 80. The alignment mark AM3 is made of the same metal material as the plurality of terminals 30, and is formed in the same layer as the plurality of terminals 30.
[0052] When mounting a plurality of LED elements 20 on the array substrate SUB with high precision, it is effective to use alignment marks provided on the array substrate SUB. However, when mounting a plurality of LED elements 20 at high density to promote high-definition display devices, the space required for arranging alignment marks AM3 as in the considered example becomes an obstacle to achieving high-definition display devices.
[0053] In contrast to the study example, in the first embodiment, the alignment mark AM2 is provided in the mounting area 80, and the alignment mark AM2 itself can be used as the terminal 30 for electrically connecting to the LED element 20. This improves the accuracy of alignment between the transfer substrate TR2 and the array substrate SUB, and allows multiple LED elements 20 to be mounted at high density. This promotes higher definition in the display device DSP1, and improves the performance of the display device DSP1.
[0054] <Display Device Manufacturing Method> Each manufacturing step included in the manufacturing method of the display device DSP1 in the first embodiment will be described below with reference to Figures 12 to 19. The description will basically be made along the flowchart in Figure 12, but the cross-sectional views of Figures 13 to 19 will also be used as necessary.
[0055] As shown in Figure 12, multiple LED elements 20 are transferred from substrates SS1, SS2, and SS3 to multiple transfer substrates TR1 in a "first transfer process," and then transferred from the multiple transfer substrates TR1 to transfer substrate TR2 in a "second transfer process," and then mounted on the array substrate SUB from the transfer substrate TR2.
[0056] First, the substrates SS1, SS2, and SS3 described in Figures 5 and 6, the transfer substrate TR1 described in Figure 7, the transfer substrate TR2 described in Figure 7, and the array substrate SUB described in Figures 8 to 10 are prepared. Next, the "first transfer step" is performed using the substrates SS1, SS2, and SS3 and the transfer substrate TR1.
[0057] <<First alignment step>> 13, the substrate SS1 and the transfer substrate TR1 are placed so that the plurality of LED elements 20 (LED elements 21) and the adhesive resin layer 50 face each other. The substrate SS1 is mounted on a stage 61, and the transfer substrate TR1 is mounted on a stage 62. A camera unit 70 equipped with a camera 71 is passed between the plurality of LED elements 21 and the adhesive resin layer 50 to photograph the plurality of LED elements 21 and the adhesive resin layer 50. The substrate SS1 and the transfer substrate TR1 are aligned based on positional information of the photographed plurality of LED elements 21 and positional information of the photographed adhesive resin layer 50.
[0058] The stage 61 is capable of holding the substrate SS1. The stage 62 is capable of holding the transfer substrate TR1. Methods for holding the substrate SS1 and the transfer substrate TR1 include, for example, a method of holding them by suction, or a method of fixing the peripheral edge of the substrate SS1 or the transfer substrate TR1 with a fixing jig (not shown). The stages 61 and 62 are electrically connected to a control device 72. The control device 72 can move the stages 61 and 62 in desired directions, such as horizontally and vertically.
[0059] The camera unit 70 is disposed between the substrate SS1 and the transfer substrate TR1, and is electrically connected to a control device 72. The camera unit 70 has cameras 71 on both the stage 61 side and the stage 62 side. Under the control of the control device 72, the camera unit 70 can move horizontally between the substrate SS1 and the transfer substrate TR1, and takes images of the substrate SS1 and the transfer substrate TR1 as appropriate.
[0060] The image data captured by the camera unit 70 is output to the control device 72. The control device 72 calculates position information of the LED elements 21 and position information of the adhesive resin layer 50 from each image data, and moves the stages 61 and 62 to appropriate positions. Note that in order to obtain position information of the transfer substrate TR1, an image of the alignment mark AM1 (see FIG. 7) may be captured, and the stage 62 may be moved based on the position information of the alignment mark AM1.
[0061] <<First attachment process>> 14, by reducing the distance between the substrate SS1 and the transfer substrate TR1, the LED elements 21 are attached to the adhesive resin layer 50. Specifically, the electrodes 20E of the LED elements 21 are adhered to the adhesive resin layer 50.
[0062] <<First holding substrate peeling step>> In the process of peeling off the LED elements 21 from the substrate SS1, for example, a technique called laser lift-off is used. As shown in FIG. 17, an ultraviolet irradiation device UVS is disposed on the surface SS1b side of the substrate SS1. The ultraviolet irradiation device UVS is provided with a light-shielding film LS having a plurality of openings. The ultraviolet laser UVL emitted from the ultraviolet irradiation device UVS is irradiated onto the LED elements 21 through the plurality of openings and does not pass through the light-shielding film LS.
[0063] Among the plurality of LED elements 21 attached to the adhesive resin layer 50, some of the plurality of LED elements 21 are selectively irradiated with ultraviolet laser UVL from the surface SS1b side of the substrate SS1. When the ultraviolet laser UVL is irradiated onto the buffer layer 29 (see FIG. 6), the surface layer of the buffer layer 29 is modified, making it possible to peel the LED elements 21 from the substrate SS1.
[0064] 18, the substrate SS1 and the transfer substrate TR1 are spaced apart. This causes the LED elements 21 irradiated with the ultraviolet laser UVL to be peeled off from the substrate SS1. On the other hand, the LED elements 21 not irradiated with the ultraviolet laser UVL are not peeled off from the substrate SS1 and are used when transferring to another transfer substrate.
[0065] <<Second alignment step, second bonding step, second holding substrate peeling step, third alignment step, third bonding step, third holding substrate peeling step>> The plurality of LED elements 22 on the substrate SS2 and the plurality of LED elements 23 on the substrate SS3 are subjected to the same processes as the "first alignment process," "first attachment process," and "first holding substrate peeling process" described with reference to Figures 13 to 16. As a result, the plurality of LED elements 22 are transferred from the substrate SS2 to another transfer substrate TR1, and the plurality of LED elements 23 are transferred from the substrate SS3 to another transfer substrate TR1.
[0066] <<Second transfer process>> 17 shows the "second transfer process." In the "second transfer process," a plurality of LED elements 21 are transferred collectively from a transfer substrate TR1 to a transfer substrate TR2, a plurality of LED elements 22 are transferred collectively from another transfer substrate TR1 to a transfer substrate TR2, and a plurality of LED elements 23 are transferred collectively from another transfer substrate TR1 to a transfer substrate TR2.
[0067] In the second transfer step, first, the transfer substrate TR1 and the transfer substrate TR2 are placed so that the adhesive resin layer 50 faces the adhesive resin layer 51. Next, the transfer substrate TR1 and the transfer substrate TR2 are aligned.
[0068] Although not shown, this alignment uses a stage 61, a stage 62, a camera unit 70, and a control device 72, similar to the alignment in FIG. 13. The camera unit 70 passes between the plurality of LED elements 21 and the adhesive resin layer 51, and photographs of the plurality of LED elements 21 and the adhesive resin layer 51 are taken. The transfer substrates TR1 and TR2 are aligned based on positional information of the photographed plurality of LED elements 21 and positional information of the photographed adhesive resin layer 51. Note that, in order to obtain the positional information of the transfer substrates TR1 and TR2, alignment marks AM1 (see FIG. 7) on the transfer substrates TR1 and TR2 may be photographed, and alignment may be performed based on the positional information of these alignment marks AM1.
[0069] Next, the transfer substrate TR1 onto which the plurality of LED elements 21 have been transferred is brought closer to the transfer substrate TR2, and the plurality of LED elements 21 attached to the adhesive resin layer 50 are attached to the adhesive resin layer 51 of the transfer substrate TR2. Next, when the distance between the transfer substrate TR1 and the transfer substrate TR2 is increased, the adhesive strength of the adhesive resin layer 51 is stronger than the adhesive strength of the adhesive resin layer 50, so the plurality of LED elements 21 are peeled off from the transfer substrate TR1 while still attached to the adhesive resin layer 51.
[0070] Using a similar technique, the transfer substrate TR1 onto which the plurality of LED elements 22 have been transferred is brought closer to the transfer substrate TR2, and the plurality of LED elements 22 attached to the adhesive resin layer 50 are attached to the adhesive resin layer 51 of the transfer substrate TR2. The transfer substrate TR1 is then spaced apart, and the plurality of LED elements 22 are peeled off from the transfer substrate TR1. Furthermore, the transfer substrate TR1 onto which the plurality of LED elements 23 have been transferred is brought closer to the transfer substrate TR2, and the plurality of LED elements 23 attached to the adhesive resin layer 50 are attached to the adhesive resin layer 51 of the transfer substrate TR2. The transfer substrate TR1 is then spaced apart, and the plurality of LED elements 23 are peeled off from the transfer substrate TR1.
[0071] In the process of transferring the plurality of LED elements 22, the LED elements 22 are disposed between the adjacent LED elements 21. In the process of transferring the plurality of LED elements 23, the LED elements 23 are disposed between the adjacent LED elements 21 and 22.
[0072] <<Assembly process onto array substrate>> 18 and 19 show how a plurality of LED elements 20 (21, 22, 23) are mounted on an array substrate SUB. In this mounting process, a plurality of LED elements 21, a plurality of LED elements 22, and a plurality of LED elements 23 are mounted all at once from a transfer substrate TR2 to the array substrate SUB. The array substrate SUB shown in FIGS. 18 and 19 is a part of the array substrate SUB shown in FIG. 9, and corresponds to one mounting area 80.
[0073] First, the transfer substrate TR2 and the array substrate SUB are placed so that the LED elements 20 face the bump electrodes 40. Next, the transfer substrate TR2 and the array substrate SUB are aligned. As shown in Fig. 18, this alignment is performed using a camera unit 70 and a control device 72, similar to the alignment in Fig. 15.
[0074] The transfer substrate TR2 is mounted on a stage 61, and the array substrate SUB is mounted on a stage 62. A camera unit 70 is passed between the plurality of LED elements 20 and the plurality of bump electrodes 40 to photograph the plurality of LED elements 20 and the alignment marks AM2. Based on positional information of the photographed plurality of LED elements 20 and positional information of the photographed alignment marks AM2, the stages 61 and 62 are moved to appropriate positions, and the transfer substrate TR2 and the array substrate SUB are aligned.
[0075] 19, the transfer substrate TR2 and the array substrate SUB are brought closer to each other, and a heat treatment is performed on the bump electrodes 40 with the LED elements 20 attached to the adhesive resin layer 51. This melts the bump electrodes 40, and bonds the electrodes 20E of the LED elements 20 to the bump electrodes 40. An example of a heat source for heating the bump electrodes 40 is to irradiate the bump electrodes 40 with laser light.
[0076] At this time, the electrodes 20E of the LED elements are also electrically connected to the alignment marks AM2 via bump electrodes 40. That is, the alignment marks AM2 themselves can also be used as terminals 30 for electrically connecting to the LED elements 20. This improves the accuracy of alignment between the transfer substrate TR2 and the array substrate SUB, and allows multiple LED elements 20 to be mounted at high density.
[0077] Next, the transfer substrate TR2 and the array substrate SUB are spaced apart. Because the bonding strength between the electrode 20E and the bump electrode 40 is greater than the adhesive strength between the LED elements 20 and the adhesive resin layer 51, the LED elements 20 are peeled off from the transfer substrate TR2. This completes the mounting of the LED elements 20 in one mounting area 80.
[0078] 12, a plurality of LED elements 20 can be mounted in each of the plurality of mounting areas 80. In this manner, the display device DSP1 according to the first embodiment is manufactured.
[0079] Although an example in which three types of LED elements are mounted in order is described in FIG. 12, the types of LED elements to be mounted are not limited to three. For example, in a manufacturing method of a display device that mounts two types of LED elements, the steps from the "third alignment step" to the "third holding substrate peeling step" shown in FIG. 12 can be omitted. Also, in a manufacturing method of a display device that mounts four or more types of LED elements, after the "third holding substrate peeling step" shown in FIG. 12, the "alignment step," "attachment step," and "holding substrate peeling step" are repeatedly performed for LED elements of types different from the first to third types of LED elements.
[0080] 9, the array substrate SUB having four mounting areas 80 has been described, but the number of mounting areas 80 is not limited to four. The number of mounting areas 80 may be less than four or may be five or more.
[0081] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it is understood that these modifications and alterations also fall within the scope of the present invention. For example, to the above-described embodiments, a person skilled in the art may appropriately add, delete, or modify components, or add, omit, or change conditions of steps, and these modifications are also included within the scope of the present invention as long as they maintain the gist of the present invention. [Industrial Applicability]
[0082] The present invention can be used in a display device or an electronic device incorporating a display device. [Explanation of symbols]
[0083] 5 Control circuit 6 Drive circuit 10 Substrate 10b, 10t side 11 Inorganic insulating layer 12, 13 Organic insulating layer 20, 20a, 20M1 LED element (inorganic light-emitting element) 20b, 20t side 20E electrode 20EA anode electrode 20EC cathode electrode 21, 22, 23 LED elements (inorganic light-emitting elements) 24 N-type semiconductor layer 25 Active layer 26 P-type semiconductor layer 27a Transparent electrode layer 27b Seed layer 27c Metal electrode layer 28 Passivation film 29 Buffer Layer 30, 30H, 30L, 31, 32, 33 terminals 40, 40a Bump electrode (conductive bonding material) 50, 51 Adhesive resin layer Stages 61 and 62 70 Camera Unit 71 Camera 72 Control device 80 Mounting Area AM1, AM2, AM3 alignment marks BCT output switch Cad auxiliary capacity Cs retention capacity DA display area DRT drive transistor DSP1 display device GL scanning signal line GLA scanning signal line GLB scanning signal line GLR reset wiring Gsb, Gsr, Gss control signals LS light shielding film PFA surrounding area PIX PVD potential PVS potential RST Reset switch SS1, SS2, SS3 boards (LED holding board, light emitting element holding board) SS1b, SS2b, SS3b, SS1t, SS2t, SS3t surface SST pixel switch SUB Array board (backplane) TR1, TR2 transfer substrate TR1b, TR2b, TR1t, TR2t surface UVL Ultraviolet Laser UVS ultraviolet irradiation device VL video signal line Vsg video signal
Claims
1. (a) preparing a light-emitting element holding substrate on which a plurality of inorganic light-emitting elements are formed, a second substrate having a second adhesive resin layer, and an array substrate having a plurality of terminals and a plurality of bump electrodes formed on the plurality of terminals; (b) after the step (a), a step of attaching the inorganic light-emitting elements of the light-emitting element holding substrate to the second adhesive resin layer; (c) after the step (b), a step of aligning the second substrate with the array substrate; (d) after the step (c), a step of bonding first electrodes of the inorganic light-emitting elements to the bump electrodes in a state in which the inorganic light-emitting elements are attached to the second adhesive resin layer; (e) after the step (d), peeling the inorganic light-emitting elements from the second substrate; Equipped with the step (c) is performed based on position information of an alignment mark provided on the array substrate; the array substrate has a mounting area on which the inorganic light-emitting devices are mounted from the second substrate; the planar shape of the terminal provided at the corner of the mounting area is different from the planar shape of the terminal provided at the mounting area other than the corner, The method for manufacturing a display device, wherein the terminal provided at the corner portion is used as the alignment mark.
2. 2. The method for manufacturing a display device according to claim 1, In the step (d), the first electrode of the inorganic light-emitting element is also electrically connected to the alignment mark via the bump electrode.
3. 2. The method for manufacturing a display device according to claim 1, In the step (a), a first substrate having a first adhesive resin layer is also prepared; The step (b) comprises: (b1) attaching the inorganic light-emitting elements of the light-emitting element holding substrate to the first adhesive resin layer, and peeling the inorganic light-emitting elements from the light-emitting element holding substrate; (b2) attaching the plurality of inorganic light-emitting elements attached to the first adhesive resin layer to the second adhesive resin layer of the second substrate, and peeling the plurality of inorganic light-emitting elements from the first substrate; A method for manufacturing a display device comprising the steps of:
4. 4. The method for manufacturing a display device according to claim 3, The step (b1) (b11) a step of attaching the inorganic light-emitting elements of the light-emitting element holding substrate to the first adhesive resin layer; (b12) selectively irradiating a part of the inorganic light-emitting elements, among the inorganic light-emitting elements attached to the first adhesive resin layer, with an ultraviolet laser; (b13) peeling the inorganic light-emitting elements irradiated with the ultraviolet laser from the light-emitting element holding substrate; A method for manufacturing a display device comprising the steps of:
5. 2. The method for manufacturing a display device according to claim 1, the array substrate has a plurality of the mounting areas, The method for manufacturing a display device, wherein the steps (b), (c), (d), and (e) are repeated to mount the inorganic light-emitting elements in the mounting regions, respectively.
6. a plurality of inorganic light-emitting elements each having a first electrode; an array substrate having a plurality of terminals and a plurality of bump electrodes formed on the plurality of terminals; Equipped with the first electrodes of the inorganic light-emitting elements are bonded to the bump electrodes; the array substrate has a mounting area where the inorganic light-emitting elements are mounted from one transfer substrate; A display device, wherein the planar shape of the terminals provided at the corners of the mounting area is different from the planar shape of the terminals provided in the mounting area other than the corners.
7. 7. The display device according to claim 6, The display device, wherein the first electrode of the inorganic light-emitting element is also electrically connected to the terminal provided at the corner via the bump electrode.
8. 7. The display device according to claim 6, The display device, wherein the array substrate has a plurality of the mounting areas.
Citation Information
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