Display device

Abstract

To provide a display device which is high in brightness and contrast and consumes less power.SOLUTION: The display device comprises a transistor, a light-emitting element, a colored layer, a phosphor layer, a first electrode, and a second electrode. The light-emitting element is electrically connected to the first electrode and the second electrode. The first electrode is electrically connected to the transistor and the second electrode is positioned flush with the first electrode. The colored layer is positioned on the light-emitting element and the phosphor layer is positioned between the light-emitting element and the colored layer. The phosphor layer, the light-emitting element and the colored layer include areas overlapping each other. The light-emitting element includes a light-emitting diode chip. The phosphor layer has a function of emitting complementary color light to luminous color of the light-emitting element.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a display device and a method for manufacturing the display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, and the like. , electronic device, lighting device, input device, input / output device, driving method thereof, or manufacturing method thereof The law can be cited as an example.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are types of semiconductor devices. In addition, it is also used in imaging devices, electro-optical devices, power generation devices (thin film solar cells, organic thin film solar cells) and the like), and electronic devices may include semiconductor devices. [Background technology]

[0004] In recent years, the uses of display devices have become more diverse, for example, in mobile information terminals, home televisions, etc. Television equipment (also known as televisions or television receivers), digital signage (Digi tal Signage (digital signage) and PID (Public Information Display devices are used in televisions, television displays, and other applications. Organic EL (Electro Luminescence) elements and light-emitting diodes (LEDs) Display devices equipped with light-emitting elements such as light-emitting diodes, liquid crystal elements and electronic paper that displays images using electrophoresis. In addition, the brightness required for display devices is increasing year by year so that they can withstand outdoor use. do.

[0005] A small LED (also called a micro LED) is used as the light-emitting element, and is connected to each pixel electrode. Active matrix microcomputers that use transistors as switching elements connected to An LED display device is disclosed (Patent Document 1). As an etching element, a metal oxide (hereinafter also referred to as an oxide semiconductor) that exhibits semiconductor properties is used. Active matrix display devices using transistors as channel forming regions are known. (Patent Documents 2 and 3). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] U.S. Patent Publication No. 2017 / 0179092 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of one embodiment of the present invention is to provide a display device with high luminance. Another object of the present invention is to provide a display device with high contrast. Another object of the present invention is to provide a display device with high response speed. Another object of the present invention is to provide a display device with low manufacturing costs. Another object of one embodiment of the present invention is to provide a display device with a long lifetime. Another object of one embodiment of the present invention is to provide a novel display device.

[0008] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter can be extracted from the description, drawings, claims, etc. [Means for solving the problem]

[0009] One embodiment of the present invention is a light-emitting element including a transistor, a light-emitting element, a coloring layer, a first electrode, and a second electrode. and a light-emitting element electrically connected to the first electrode and the second electrode. is electrically connected to the transistor, and the second electrode is located on the same plane as the first electrode; The colored layer is located on the light-emitting element, and the colored layer has an area overlapping with the light-emitting element, and the light-emitting element comprises: The display device has a light-emitting diode chip, and the light-emitting element has a function of emitting white light. do.

[0010] One embodiment of the present invention is a light-emitting element including a transistor, a light-emitting element, a coloring layer, a phosphor layer, and a first electrode. and a second electrode, and the light-emitting element is electrically connected to the first electrode and the second electrode. The first electrode is electrically connected to the transistor, and the second electrode is flush with the first electrode. The color layer is located on the light-emitting element, and the phosphor layer is located between the light-emitting element and the color layer. The phosphor layer, the light-emitting element, and the colored layer have overlapping regions, and the light-emitting element is a light-emitting diode. The phosphor layer has a phosphor that emits light of a color complementary to the color of light emitted by the light-emitting element. It is a display device.

[0011] The display device described above preferably further comprises a light-shielding layer, the light-shielding layer being adjacent to the light-emitting element. It's nice.

[0012] In the display device described above, the light-emitting element has a function of emitting blue light, and the phosphor layer has a function of emitting yellow light. It is preferable to have a phosphor that emits colored light.

[0013] In the above-mentioned display device, the light-emitting element has a function of emitting near-ultraviolet light or purple light, and The light-emitting layer is made up of a phosphor that emits red light, a phosphor that emits green light, and a phosphor that emits blue light. and a light body.

[0014] In the display device, the light emitting element preferably has a function of emitting light toward the colored layer. I wish.

[0015] The display device further includes a first bump and a second bump, The bump is located between one electrode of the light-emitting element and the first electrode, and the second bump is located between the light-emitting element and the first electrode. The first bump and the second bump are located between the other electrode of the element and the second electrode, and the first bump and the second bump are made of silver. The first electrode and the second electrode are made of one or more of silver, aluminum, titanium, and copper. It is preferable to have

[0016] In the above-described display device, the transistor has an oxide semiconductor in a channel formation region. The transistor may have silicon in a channel formation region. [Effects of the Invention]

[0017] According to one embodiment of the present invention, a display device with high luminance can be provided. According to one embodiment of the present invention, a display device with high contrast can be provided. According to one embodiment of the present invention, a display device with low power consumption can be provided. According to one embodiment of the present invention, a display device can be provided at low manufacturing costs. According to one embodiment of the present invention, a display device with a long lifetime can be provided. Thus, a novel display device can be provided.

[0018] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. can be extracted from descriptions in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0019] [Figure 1] (A), (B), and (C) are examples of display device configurations. [Figure 2] (A), (B), and (C) are examples of display device configurations. [Figure 3] (A), (B), and (C) are examples of light-emitting device configurations. [Figure 4] (A), (B), and (C) are examples of light-emitting device configurations. [Figure 5] (A), (B), and (C) are examples of display device configurations. [Figure 6] (A), (B), and (C) are top views of the display device. [Figure 7] FIG. [Figure 8] FIG. [Figure 9] 1A, 1B, and 1C are diagrams illustrating a method for manufacturing a display device. [Figure 10] 1A and 1B are diagrams illustrating a method for manufacturing a display device. [Figure 11] 1A to 1C illustrate a method for manufacturing a display device. [Figure 12] 1A and 1B are diagrams illustrating a method for manufacturing a display device. [Figure 13] FIG. [Figure 14] 1A and 1B are diagrams illustrating a method for manufacturing a display device. [Figure 15] 1A and 1B are diagrams illustrating a method for manufacturing a display device. [Figure 16] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 17] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 18] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 19] (A1), (A2), (B1), (B2), (C1), and (C2) are diagrams illustrating transistors. [Figure 20] (A) Block diagram of the display device. (B) Circuit diagram of the display device. [Figure 21] (A), (B), (C) Circuit diagram of the display device. [Figure 22] (A), (C), and (D) are circuit diagrams of the display device. (B) is a timing chart of the display device. [Figure 23] 1A, 1B, 1C, 1D, and 1E are diagrams illustrating an information processing device. [Figure 24] 1A, 1B, 1C, 1D, and 1E are diagrams illustrating an information processing device. DETAILED DESCRIPTION OF THE INVENTION

[0020] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention is based on the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0021] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be assigned.

[0022] In each figure described in this specification, the size, layer thickness, or area of ​​each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0023] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limitation.

[0024] A transistor is a type of semiconductor device that controls the amplification of current and voltage, and conduction or non-conduction. The transistor in this specification is an IGFE. T(Insulated Gate Field Effect Transistor ) and thin film transistors (TFTs).

[0025] In the following, expressions indicating directions such as "up" and "down" basically correspond to the direction of the drawing. However, for the purpose of facilitating explanation, etc., The orientation of "up" or "down" may not be consistent with the drawings. When explaining the stacking order (or formation order) of a laminate, etc., The surface to be bonded (the surface to be formed, the supporting surface, the adhesive surface, the flat surface, etc.) is positioned above the laminate. Even if the object is placed in a certain position, the direction may be described as down and the opposite direction as up.

[0026] In this specification, a display panel, which is one aspect of a display device, displays (outputs) an image or the like on a display surface. Therefore, a display panel is one aspect of an output device.

[0027] In this specification, the substrate of the display panel is provided with, for example, an FPC (Flexible Printed Circuit). Integrated Circuit) or TCP (Tape Carrier Packa ge) or a connector such as COG (Chip On Ground) is attached to the board. The IC mounted on the display panel module is called a display module. It may also be called a display panel or simply a display panel.

[0028] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention will be described.

[0029] <Configuration example 1> FIG. 1A illustrates an example of a cross-sectional structure of a display device 10 according to one embodiment of the present invention.

[0030] The display device 10 includes a substrate 11, a substrate 13, a functional layer 15, a light-emitting element 17, a phosphor layer 18, and a light-emitting element 19 between the substrate 11 and the substrate 13. 35, colored layer CFR, colored layer CFG, and colored layer CFB. The substrate 11 side corresponds to the display surface side of the display device 10.

[0031] The light emitting element 17 may be, for example, an OLED (Organic Light Emitting Diode). ng Diode), LED, QLED(Quantum-dot Light Emi) Self-luminous light-emitting elements such as a luminous diode (LED) or a semiconductor laser can be used. In particular, LEDs have high brightness and contrast and a fast response speed, making them ideal for light-emitting devices. 17, and has high brightness, contrast and a fast response speed. Since the LED is a self-emitting element, a backlight is not required. Furthermore, since no polarizing plate is required, the display device has high brightness and consumes less power. In addition, LEDs have a long lifespan and are less susceptible to deterioration because the light-emitting layer is made of inorganic materials. It can be a long display device.

[0032] The functional layer 15 is a layer including a circuit for driving the light emitting element 17. For example, the functional layer 15 includes a The pixel circuit is composed of transistors, capacitance elements, wiring, electrodes, etc. The functional layer 15 is electrically connected to the electrode 21 and the electrode 23. The light emitting element 17 is electrically connected to the light emitting element 17 via the electrode 23 .

[0033] In addition, an insulating layer 25 is provided between the electrode 21 and the electrode 23 and the functional layer 15. The electrodes 21 and 23 are electrically connected to the functional layer 15 through the openings provided in the insulating layer 25. As a result, the functional layer 15 and the light-emitting element 17 are electrically connected. do.

[0034] The display device 10 has an adhesive layer 27 between the electrodes 21 and 23 and the substrate 11. It can be said that the substrate 11 and the substrate 13 are bonded together by the adhesive layer 27. The light-emitting element 17 is also sealed by the sealing layer 14. Between these substrates, there are a light emitting element 17 and a functional layer 15 for driving the light emitting element.

[0035] On the substrate 11 side facing the substrate 13, a colored layer CFR and a colored layer 16 are formed at positions overlapping the light emitting element 17. The color layer CFG and the color layer CFB are provided. The color layer CFB can be used as a color filter that transmits red, green, or blue light, for example. The materials that can be used for the coloring layer CFR, the coloring layer CFG, and the coloring layer CFB are as follows: Examples of the material include metal materials, resin materials, and resin materials containing pigments or dyes.

[0036] The colored layers CFR, CFG, and CFB are provided between the light-emitting elements 17 and the phosphor layers. The phosphor layer 35 is formed by using an organic resin layer mixed with phosphor. The phosphor contained in the phosphor layer 35 is excited by the light emitted from the light emitting element 17. A material that emits light of a color complementary to the color of light emitted by the light emitting element 17 can be used. With this configuration, the phosphor layer 35 can emit white light.

[0037] For example, the phosphor layer 35 may have a phosphor that emits yellow light, and the light-emitting element 17 may have a phosphor that emits blue light. By adopting this configuration, white light is emitted from the phosphor layer 35. The light emitted from the light emitting element 17 provided with the CFR passes through the phosphor layer 35 and the colored layer CFR. The red light 20R is emitted to the display surface side. The light emitted from the light emitting element 17 is emitted as green light 20G. The light emitted by the light emitting element 17 is emitted as blue light 20B. Furthermore, the light emitting element 17 used in the display device can be of one type. Therefore, the manufacturing process can be simplified. The display device has high brightness and contrast, a fast response speed, and low power consumption. It is possible.

[0038] For example, if the phosphor layer 35 has a phosphor that emits red light and the light emitting element 17 emits blue-green light, By configuring the phosphor layer 35 to emit white light, a configuration may be adopted in which white light is emitted from the phosphor layer 35.

[0039] The phosphor layer 35 contains a phosphor that emits red light, a phosphor that emits green light, and a phosphor that emits blue light. The light emitting element 17 has a phosphor that emits near ultraviolet light or purple light. In this way, a configuration may be adopted in which white light is emitted from the phosphor layer 35.

[0040] In addition, one color is expressed by three sub-pixels of red (R), green (G), and blue (B). However, one embodiment of the present invention is not limited to this. There is no particular limitation on the color elements, and RG Colors other than B may be used, such as yellow (Y), cyan (C), magenta (M), etc. It may be configured as either.

[0041] 1B, a light-shielding element 17 is provided adjacent to the display device 10A. It is preferable to provide a light-shielding layer 33 between adjacent light-emitting elements 17. By providing a light-shielding layer 33 between adjacent light-emitting elements 17, it is possible to prevent light from reaching adjacent pixels. The light-shielding layer 33 can be made of a pigment, a dye, or a carbon black. Furthermore, the side surface of the light emitting element 17 is in contact with the light blocking layer 33. By covering the side surface of the light emitting element 17 with the light blocking layer 33, it is possible to prevent the adjacent pixels from being exposed. In FIG. 1B, the height of the upper surface of the light-shielding layer 33 is 17. In this embodiment, the height of the upper surface of the light-emitting element 17 is approximately the same as that of the upper surface of the light-emitting element 17. However, the present invention is not limited to this. The height of the upper surface of the light-shielding layer 33 may be lower than the height of the upper surface of the light-emitting element 17. The height of the upper surface of the light-shielding layer 33 may be higher than the height of the upper surface of the light-emitting element 17. By roughly matching or raising the height of the upper surface of the pixel 17, light leakage to adjacent pixels and Color mixing between the elements can be efficiently suppressed.

[0042] FIG. 1B shows a case where there is a gap between the light emitting element 17 and the phosphor layer 35. One embodiment of the present invention is not limited to this. The electrode 17 may be in contact with the phosphor layer 35. By adopting such a configuration, the colored layer C The distance between the FR, the colored layer CFG, and the colored layer CFB and each of the light emitting elements 17 is shortened, and the adjacent This can suppress light leakage into adjacent pixels and color mixing between pixels.

[0043] Furthermore, a light-shielding layer 31 may be provided as in a display device 10C shown in FIG. The light-shielding layer 31 is provided between the adjacent colored layers. The light-shielding layer 31 has an opening in a region where the light is emitted from the adjacent light-emitting element 17. , suppressing color mixing between adjacent light-emitting elements 17. Here, the colored layers CFR and CF G and the colored layer CFB are provided so that their ends overlap the light-shielding layer 31. The light-shielding layer 31 is made of a material that blocks light emitted from the light-emitting element 17. For example, a metal material or a resin material containing a pigment or dye can be used. can be done.

[0044] Also, as in the display device 10D shown in FIG. 2(B), each colored layer is The respective overlapping areas of the colored layer may be configured to be light-shielding layers. In FIG. 2B, one end of the colored layer CFR is connected to one end of the colored layer CFG. The other end of the colored layer CFG overlaps with one end of the colored layer CFB, and the other end of the colored layer CFG overlaps with one end of the colored layer CFB. In the above example, the other end of the layer CFB overlaps with the other end of the colored layer CFR. This is not limited to the above.

[0045] In addition, as in the display device 10E shown in FIG. 2(C), a pixel not including a colored layer is formed. In this case, the pixel can emit 20W of white light. This allows one color to be expressed using four sub-pixels: R (red), G (green), B (blue), and W (white). This configuration allows for the creation of three sub-pixels of red (R), green (G), and blue (B). The current flowing through the light emitting element 17 can be reduced compared to a configuration in which one color is expressed by a single light emitting element, and the power consumption is low. It can be a display device.

[0046] A light-emitting diode chip (hereinafter referred to as an LED chip) that can be used as the light-emitting element 17 This section explains the following:

[0047] The LED chip includes a light-emitting diode. The configuration of the light-emitting diode is not particularly limited. MIS (Metal Insulator Semiconductor) bonding is also acceptable. , a homostructure having a PN junction or a PIN junction, a heterostructure, or a double heterostructure, etc. In addition, it is possible to use a superlattice structure or a single quantum well structure in which thin films that generate quantum effects are stacked. structure or multi quantum well (MQW) structure Good too.

[0048] Examples of LED chips are shown in Figures 3(A) and 3(B). Figure 3(A) shows an LED chip 5 3(B) shows a cross-sectional view of the LED chip 51, and FIG. 3(B) shows a top view of the LED chip 51. The semiconductor layer 81 includes an n-type semiconductor layer 75 and a semiconductor layer 81 on the n-type semiconductor layer 75. The light-emitting layer 77 has a p-type semiconductor layer 79 on the light-emitting layer 77. The material of the p-type semiconductor layer 79 is The band gap energy of the light-emitting layer 77 is larger than that of the light-emitting layer 77. The LED chip 51 can be made of an n-type semiconductor material. An electrode 85 functioning as a cathode is provided on the layer 75, and a contact electrode is provided on the p-type semiconductor layer 79. An electrode 83 serving as a cathode is provided on the electrode 83, and an electrode 87 serving as an anode is provided on the electrode 83. In addition, it is preferable that the upper and side surfaces of the electrode 83 are covered with an insulating layer 89. , and functions as a protective film for the LED chip 51 .

[0049] The LED chip that can be used for the light emitting element 17 has a light emitting area of ​​1 mm 2 Less than 10,000 μm, preferably 10,000 μm 2 Less than or equal to 3000 μm, more preferably 2 Further details are as follows: Preferably 700 μm 2 In this specification and the like, the surface of the region from which light is emitted is Area is 10,000 μm 2 The following LED chips may be referred to as micro LEDs.

[0050] An example of an enlarged view of the semiconductor layer 81 is shown in FIG. 3(C). As shown in FIG. 3(C), The body layer 75 includes an n-type contact layer 75a on the substrate 71 side and an n-type cladding layer 75b on the light-emitting layer 77 side. The p-type semiconductor layer 79 may have a p-type clad layer 79a on the light-emitting layer 77 side and a p-type It may also have a p-type contact layer 79b on the cladding layer 79a.

[0051] The light-emitting layer 77 has an MQW structure in which barrier layers 77a and well layers 77b are stacked multiple times. The barrier layer 77a has a band gap energy that is higher than that of the well layer 77b. By using such a structure, the energy is transferred to the well layer. 77b, improving quantum efficiency and luminous efficiency of the LED chip 51. It can be done.

[0052] In the face-up type LED chip 51, the electrode 83 is made of a light-transmitting material. For example, ITO (In2O3-SnO2), AZO (Al2O3-ZnO), In-Zn oxide (In2O3-ZnO), GZO(GeO2-ZnO), ICO(In 2O3-CeO2) and other oxides can be used. Face-up LED chip In the face-down type LED chip 51, light is mainly emitted toward the electrode 87 side. The electrode 83 can be made of a material that reflects light, such as silver, aluminum, or rhodium. In the face-down type LED chip 51, the light is It is mainly emitted toward the substrate 71 side.

[0053] The substrate 71 is made of a sapphire single crystal (Al2O3), a spinel single crystal (MgAl2O 4) Oxides such as ZnO single crystal, LiAlO2 single crystal, LiGaO2 single crystal, MgO single crystal, etc. Single crystals of silicon, single crystals of Si, single crystals of SiC, single crystals of GaAs, single crystals of AlN, single crystals of GaN, A boride single crystal such as ZrB2 can be used. Face-down type LED chip In the substrate 51, it is preferable to use a material that transmits light, such as sapphire. A single crystal or the like can be used.

[0054] A buffer layer (not shown) may be provided between the substrate 71 and the n-type semiconductor layer 75. The n-type layer has the function of reducing the difference in lattice constant between the substrate 71 and the n-type semiconductor layer 75 .

[0055] The LED chip 51 that can be used as the light emitting element 17 is as shown in FIG. A horizontal structure in which the electrodes 85 and 87 are arranged on the same surface is preferred. By providing the electrodes 85 and 87 on the same surface, the connection between the electrodes 21 and 23 is This makes it easy to connect the electrodes 21 and 23, and simplifies the structure of the electrodes 21 and 23. The LED chip 51 that can be used as the element 17 is preferably a face-down type. By using a face-down type LED chip 51, the light emitted from the LED chip 51 The light emitted from the substrate is efficiently emitted to the display surface side of the display device, resulting in a display device with high brightness. The LED chip 51 may be a commercially available LED chip.

[0056] The phosphor contained in the phosphor layer 35 is an organic resin on the surface of which the phosphor is printed or painted. The phosphor layer 35 may be an organic resin layer containing a phosphor. It is excited by the light emitted by the chip 51 and emits light of a complementary color to the light emitted by the LED chip 51. With this configuration, white light can be emitted from the phosphor layer 35. It can emit light.

[0057] For example, an LED chip 51 that emits blue light and a fluorescent lamp that emits yellow light, which is the complementary color of blue, may be used. By using a light source, it is possible to configure the phosphor layer 35 to emit white light. The LED chip 51 capable of emitting blue light is made of a group 13 nitride compound semiconductor. A typical example is a diode with an In x Al y Ga 1-x-y N(x is 0 or more GaN-based compound represented by the formula: (x+y is 0 or more and 1 or less, y is 0 or more and 1 or less, x+y is 0 or more and 1 or less) A typical example of a phosphor that is excited by blue light and emits yellow light is Y3 AlO 12 :Ce(YAG:Ce), (Ba,Sr,Mg)2SiO4:Eu,Mn etc. There is.

[0058] For example, an LED chip 51 that emits blue-green light and an LED chip 52 that emits red light, which is the complementary color of blue-green, may be used. By using a phosphor such as fluorescer, a configuration can be achieved in which white light is emitted from the phosphor layer 35.

[0059] The phosphor layer 35 may have a plurality of types of phosphors, each of which emits light of a different color. For example, the LED chip 51 may be configured to emit blue light and the LED chip 52 may be configured to emit red light. A phosphor that emits colored light and a phosphor that emits green light are used to emit white light from the phosphor layer 35. A typical phosphor that is excited by blue light and emits red light is Examples include (Ca,Sr)S:Eu and Sr2Si7Al3ON 13 :Eu etc. Blue Representative examples of phosphors that are excited by colored light and emit green light include SrGa2S4:Eu, S r3Si 13 Al3O2N 21 :Eu etc.

[0060] Also, an LED chip 51 that emits near-ultraviolet light or purple light and a phosphor that emits red light A phosphor that emits green light and a phosphor that emits blue light are used to emit white light from the phosphor layer 35. It can be configured to emit red light when excited by near-ultraviolet light or violet light. Representative examples of emitting phosphors are (Ca,Sr)S:Eu, Sr2Si7Al3ON1 3:Eu, La2O2S:Eu, etc. It is excited by near-ultraviolet or violet light and emits green light. Representative examples of phosphors that emit light include SrGa2S4:Eu and Sr3Si 13 Al3O2N2 1: Eu, etc. Typical examples of phosphors that are excited by near-ultraviolet or violet light and emit blue light As for Sr 10 (PO4)6Cl2:Eu, (Sr,Ba,Ca) 10 (PO4)6 Examples include Cl2:Eu.

[0061] In addition, near-ultraviolet light has a maximum peak at wavelengths of 200 nm to 380 nm in its emission spectrum. The violet light has a wavelength of 380 nm to 430 nm in the emission spectrum. In addition, blue light has a maximum peak at wavelengths of 430 nm or less in the emission spectrum. The green light has a maximum peak at 490 nm. The yellow light has a maximum peak at 90 nm to 550 nm. The red light has a maximum peak at a wavelength of 550 nm to 590 nm. In this case, the wavelength has a maximum peak at 640 nm to 770 nm.

[0062] The phosphor layer 35 has a phosphor that emits yellow light, and the LED chip 51 emits blue light. When used, the light emitted by the LED chip 51 has a wavelength of 330 nm in the emission spectrum. It is preferable that the maximum peak is between 430 nm and 490 nm. It is more preferable that the maximum peak is at wavelength 450 nm to 480 nm. It is more preferable that the fluorescent substance has a peak. This allows the fluorescent substance to be excited efficiently. The light emitted by the LED chip 51 has an emission spectrum of 430 nm to 490 nm. By having a maximum peak at 1000 Hz, the blue light used as excitation light and the yellow light from the phosphor are mixed together. Furthermore, the light emitted from the LED chip 51 can be converted to white light. By having a maximum peak at 480 nm, it is possible to achieve a highly pure white color.

[0063] Various optical members may be disposed on the outside of the substrate 11. Examples of optical members include a light diffusing element, Examples of the layer include a diffusion film, an anti-reflection layer, and a light-collecting film. The outside of the 1 has an anti-static film that prevents dust from adhering, a water-repellent film that makes it difficult for dirt to adhere, A hard coating film or the like may be provided to prevent scratches from occurring during use.

[0064] In addition, a touch sensor may be provided outside the substrate 11. A configuration including the touch sensor can function as a touch panel.

[0065] <Configuration example 2> A different structure of the display device according to one embodiment of the present invention will be described. An LED package can be used as the light emitting element 17 .

[0066] An LED package that can be used for the light emitting element 17 will be described.

[0067] The light emitting element 17 may be a bullet type or a surface mount type (SMD: Surface Mount Device). LED packages that have been used in the past, such as LED packages of the A surface-mounted LED package can be used as the light-emitting element 17. An example of a surface-mounted LED package is shown in Figures 4(A) and 4(B). FIG. 4(A) is a cross-sectional view of the LED package 50, and FIG. 4(B) is a top view of the LED package 50. The LED package 50 includes an LED chip 51 on a substrate 52 and an electrode 5 The LED chip 51 is connected to the substrate 50 via a wire 59 and a wire 61. The LED chip 51 is electrically connected to the electrodes 55 and 57. The substrate 52 and the LED chip 51 are bonded to each other by an adhesive layer 63. The light emitting element 17 is a commercially available LED package. That's fine.

[0068] The LED package that can be used for the light emitting element 17 has a light emitting area of ​​1 mm 2 Less than 10,000 μm, preferably 10,000 μm 2 Less than or equal to 3000 μm, more preferably 2 Below, More preferably 700 μm 2 In this specification and the like, the region from which light is emitted is The area is 10,000 μm 2 The following LED packages may be referred to as micro LEDs.

[0069] The substrate 52 may be a glass epoxy resin substrate, a polyimide substrate, a ceramic substrate, an alumina substrate, or the like. The substrate may be an aluminum nitride substrate or the like.

[0070] The phosphor 65 is an organic resin layer on which the phosphor is printed or painted, a layer in which the phosphor is mixed The phosphor 65 is a layer of an organic resin. A material that is excited by the LED chip 51 and emits light of a complementary color to the light emitted by the LED chip 51 can be used. With this configuration, the LED package 50 can emit white light. The phosphor layer 35 is similar to the phosphor layer 65 in the description above. Detailed explanations will be omitted.

[0071] For example, an LED chip 51 that emits blue-green light and an LED chip 52 that emits red light, which is the complementary color of blue-green, may be used. By using a phosphor having a high purity, the LED package 50 can be configured to emit white light. do.

[0072] Also, an LED chip 51 that emits near-ultraviolet light or purple light and a phosphor that emits red light , a phosphor that emits green light, and a phosphor that emits blue light are used to form an LED package 5 0 can be configured to emit white light.

[0073] The LED package 50 includes an LED chip 51 that emits blue light and an LED chip 52 that emits yellow light. When the phosphor 65 is used, the light emitted from the LED chip 51 has an emission spectrum of It is preferable that the wavelength has a maximum peak in the range of 330 nm to 500 nm, and the wavelength is 430 It is more preferable that the wavelength has a maximum peak at 450 nm to 490 nm. It is more preferable that the phosphor 65 has a maximum peak at 480 nm. In addition, the light emitted from the LED chip 51 has an emission spectrum of 43 The maximum peak in the wavelength range of 490 nm to 490 nm allows the blue light, which is the excitation light, to be emitted from the phosphor 6 The yellow light from the LED chip 51 can be mixed with the white light to produce white light. The emitted light has a maximum peak at 450nm to 480nm, resulting in a pure white light It can be said that:

[0074] The resin layer 63 is made of a light-transmitting organic resin. There is no particular limitation on the type of organic resin. Typically, ultraviolet curable resins such as epoxy resins and silicone resins, visible light curable resins, etc. In FIG. 4(A), the upper surface of the resin layer 63 is flat. However, one embodiment of the present invention is not limited to this. For example, the upper surface of the resin layer 63 may be a convex The shape can be selected appropriately depending on the desired directivity.

[0075] The wires 59 and 61 are made of gold, an alloy containing gold, copper, or an alloy containing copper. A thin wire of a metal can be used.

[0076] The electrodes 55 and 57 are conductive layers that are electrically connected to the electrodes of the LED chip 51. and one element selected from nickel, copper, silver, platinum, or gold, or 50% or more of said element. The electrodes 55, 57 and the electrodes of the LED chip 51 are bonded together by hot pressing. The connection is made by wire bonding using the soldering method or ultrasonic bonding method. .

[0077] A reflector 53 made of ceramic or the like is arranged around the LED chip 51. Some of the light emitted from the LED package 51 is reflected, allowing more light to reach the LED package. It is preferable that the light is emitted from the reflector 50. In FIG. 4(A), the reflector 53 is However, one embodiment of the present invention is not limited to this. The shape can be selected appropriately depending on the desired light directionality.

[0078] The LED package 50 shown in FIG. 4A emits light toward the electrode side of the LED chip 51. The configuration using a face-up LED chip that emits light is shown in FIG. The configuration of the LED package 50 that can be used is not particularly limited.

[0079] An example different from the LED package shown in FIG. 4(A) is shown in FIG. 4(C). FIG. 4(C) is a cross-sectional view of the LED package 50. FIG. 4(B) can be used as a top view. The LED package 50 shown in the figure includes an electrode of an LED chip 51, an electrode 55, and an electrode 57. The LED chip 51 has a flip-chip type LED package in which the LED chip 51 faces the LED chip 51. The electrodes 55 and 57 are electrically connected to each other via conductive bumps 90. The LED package 50 shown in FIG. 4(C) emits light from the opposite side of the electrode of the LED chip 51. 4(A) and 4(B) show a configuration using a face-down type LED chip. 4(C) shows a vertically structured LED chip 51, but one aspect of the present invention is not limited to this. The LED chip 51 included in the LED package 50 has an electrode 85 and an electrode 87. They may also be vertical structures arranged on opposite sides.

[0080] 4 shows an example in which the LED package 50 has one LED chip 51. However, the configuration of the LED package 50 that can be used in one embodiment of the present invention is not limited to this. The LED package 50 may have a plurality of LED chips 51. For example, a configuration may be adopted in which the LED chip 51 that emits red light and the LED chip 52 that emits red light are not included. and an LED chip 51 that emits green light, By not including the phosphor 65, white light is emitted from the LED package 50. Good too.

[0081] The configuration of a display device using an LED package 50 as the light emitting element 17 will be described. .

[0082] FIG. 5A illustrates an example of a cross-sectional structure of a display device according to one embodiment of the present invention. The display device 10F shown in FIG. 1 has a functional layer 15, a light-emitting element 17, a coloring layer 18, and a color filter layer 19 between a substrate 11 and a substrate 13. The phosphor layer 35 and the light-shielding layer 33 are formed of a colored layer CFR, a colored layer CFG, and a colored layer CFB. 1(A) to 1(C) and 2(A) to 2(C) in that they do not have The main difference is that the display device uses an LED chip as the element 17. The plate 11 side corresponds to the display surface side of the display device 10.

[0083] The LED package 50 has a reflector 53 to enhance the directionality of light. When the LED package 50 is used as the light emitting element 17, the light blocking layer 33 is not provided. Even if the light emitting element 17 is not used, light leakage to adjacent pixels and color mixing between pixels can be suppressed. By using the LED package 50 that emits white light, it is possible to obtain a color image without providing the phosphor layer 35. Error display can be performed.

[0084] In FIG. 5A, the colored layers CFR, CFG, and CFB are arranged, and the light-emitting element 17 is arranged. However, one embodiment of the present invention is not limited to this. The colored layers CFG and CFB may be in contact with the light emitting element 17. By forming the colored layers CFR, CFG, and CFB, the light-emitting elements 17 This reduces the distance between adjacent pixels, thereby suppressing light leakage to adjacent pixels and color mixing between pixels.

[0085] Furthermore, a light-shielding layer 31 may be provided as in a display device 10G shown in FIG. The light-shielding layer 31 is provided between the adjacent colored layers. The light-shielding layer 31 has an opening in a region where the light is emitted from the adjacent light-emitting element 17. , suppressing color mixing between adjacent light-emitting elements 17. Here, the colored layers CFR and CF G and the colored layer CFB are provided so that their ends overlap the light-shielding layer 31. The light-shielding layer 31 is made of a material that blocks light emitted from the light-emitting element 17. For example, a metal material or a resin material containing a pigment or dye can be used. can be done.

[0086] Also, as in the display device 10H shown in FIG. 5(C), each colored layer is The respective overlapping areas of the colored layer may be configured to be light-shielding layers. In FIG. 5C, one end of the colored layer CFR is connected to one end of the colored layer CFG. The other end of the colored layer CFG overlaps with one end of the colored layer CFB, and the other end of the colored layer CFG overlaps with one end of the colored layer CFB. In the above example, the other end of the layer CFB overlaps with the other end of the colored layer CFR. This is not limited to the above.

[0087] Furthermore, a pixel not including a colored layer is formed, and white light is emitted from the pixel. With this configuration, it is possible to display R (red), G (green), B (blue), and W (white). ) can express one color. The light is sent to the light emitting element 17 from a configuration in which one color is expressed by three sub-pixels of red (green), blue (blue), and blue (blue). The current can be reduced, and a display device with low power consumption can be obtained.

[0088] The above is a description of the configuration example.

[0089] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0090] (Embodiment 2) In this embodiment, an example of the display device exemplified in the previous embodiment will be described in detail. do.

[0091] <Configuration example> FIG. 6A shows a top view of a display device 700. The display device 700 is provided with a sealing material 712. The first substrate 701 and the second substrate 705 are bonded together. In the region sealed by the second substrate 705 and the sealant 712, the first substrate 701 A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 706 are provided on the substrate. The pixel portion 702 is provided with a plurality of display elements.

[0092] An FPC 716 is connected to the portion of the first substrate 701 that does not overlap with the second substrate 705. The FPC terminal portion 708 is provided with an FPC 716. 8 and signal lines 710, the pixel section 702, the source driver circuit section 704, and the gate Various signals are supplied to each of the driver circuit sections 706 .

[0093] A plurality of gate driver circuit sections 706 may be provided. The path section 706 and the source driver circuit section 704 are separately formed on a semiconductor substrate or the like. The IC chip may be in the form of a packaged IC chip. The IC chip is mounted on the first substrate 70. It can be mounted on a 1 or FPC716.

[0094] The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 have The structure of the transistor is not particularly limited. , polycrystalline semiconductors, microcrystalline semiconductors, amorphous semiconductors, etc., alone or in combination. As the semiconductor material, for example, silicon or germanium can be used. Also, silicon germanium, silicon carbide, gallium arsenide, oxide Compound semiconductors such as semiconductors, nitride semiconductors, and organic semiconductors can be used.

[0095] When using an organic semiconductor as the semiconductor layer, low molecular weight organic materials with aromatic rings or π-electron conjugates are used. Conductive polymers such as rubrene, tetracene, and pentacene can be used. , perylenediimide, tetracyanoquinodimethane, polythiophene, polyacetylene, poly Para-phenylene vinylene and the like can be used.

[0096] The transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. It is preferable that the transistor has a semiconductor film. The off-state current of the transistor can be reduced. The retention time of an electric signal such as a signal can be extended, and in the ON state, the writing interval can also be set to a longer time. This reduces the frequency of refresh operations, thereby reducing power consumption. .

[0097] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a display device. By using this in a device, the switching transistor in the pixel section and the driver used in the drive circuit section can be In other words, the transistors can be formed on the same substrate as the silicon wafer. It is also possible to configure the semiconductor device without using a drive circuit, thereby reducing the number of components in the semiconductor device. The pixel section also uses transistors capable of high-speed operation, providing high-quality images. can.

[0098] A display device 700A shown in FIG. 6B is a display device having a flexible resin substrate instead of the first substrate 701. A display device to which the adhesive layer 743 is applied and which can be used as a flexible display. Here is an example.

[0099] In the display device 700A, the pixel section 702 is not rectangular, but has arc-shaped corners. As shown in the region P1 in FIG. 6B, the pixel section 702 and one part of the resin layer 743 The pair of gate driver circuit sections 706 are connected to the pixel section 70. The gate driver circuit section 706 is provided on both sides of the pixel section 702. , the grooves are provided along an arc-shaped contour.

[0100] The resin layer 743 has a protruding shape at the portion where the FPC terminal portion 708 is provided. Also, a part of the resin layer 743 including the FPC terminal portion 708 is on the back side in the region P2 in FIG. 6(B). By folding back a part of the resin layer 743, the FPC 716 can be attached to the pixel section 7 The display device 700A can be mounted on the back of the display device 02 in such a state that the display device 700A is mounted on the back of the display device 02. This allows for space saving in electronic devices.

[0101] An IC 717 is mounted on an FPC 716 connected to the display device 700A. The IC 717 has a function as, for example, a source driver circuit. The source driver circuit section 704 in FIG. 00A includes a protection circuit, a buffer circuit, a demultiplexer, The configuration may include at least one of a crossover circuit, a crossover circuit, and the like.

[0102] The display device 700B shown in FIG. 6C can be suitably used in electronic devices having large screens. For example, a television device, a monitor device, a personal computer, computers (including laptops and desktops), tablets, digital signage, etc. It can be suitably used in the following cases:

[0103] The display device 700B includes a plurality of source driver ICs 721 and a pair of gate driver circuits. It has a section 722.

[0104] The plurality of source driver ICs 721 are attached to respective FPCs 723. In addition, the plurality of FPCs 723 are arranged such that one terminal is connected to the substrate 701 and the other terminal is connected to the printed circuit board 72. 4. By bending the FPC 723, the printed circuit board 724 It can be mounted on the back side of the pixel section 702 and installed in an electronic device, thereby saving space in the electronic device. It is possible to achieve this.

[0105] On the other hand, the gate driver circuit section 722 is formed on the substrate 701. It is possible to realize electronic devices with narrow bezels.

[0106] By adopting such a configuration, a large-sized and high-resolution display device can be realized. The surface size is 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more diagonally. This can also be achieved with the above display devices. This makes it possible to realize a display device with high resolution for the first time.

[0107] <Cross-section configuration example 1> 7A and 7B are cross-sectional views taken along the dashed line QR shown in FIG. 6A.

[0108] The display device shown in FIGS. 6 and 7 includes a wiring portion 711, a pixel portion 702, and a source driver. The wiring section 711 has a signal driver circuit section 704 and an FPC terminal section 708. The pixel portion 702 includes a transistor 750 and a capacitor 790. The source driver circuit portion 704 includes a transistor 752 .

[0109] The capacitor 790 shown in FIG. 7 has the same gate electrode as the first gate electrode of the transistor 750. The lower electrode is formed by processing a film, and the semiconductor layer is formed by processing the same metal oxide. and an upper electrode, which is connected to the source and drain regions of the transistor 750. The resistance is reduced in the same manner as in the case of the transistor 75. A part of the insulating film that functions as the first gate insulating layer of the capacitance element 0 is provided. 790 is a laminated structure in which an insulating film that functions as a dielectric film is sandwiched between a pair of electrodes. The upper electrode is made of the same film as the source and drain electrodes of the transistor. The resulting wiring is connected.

[0110] An insulating layer 7 is formed over the transistor 750, the transistor 752, and the capacitor 790. The insulating layer 770 functions as a planarization film. The top surfaces of the conductive layers 772 and 774 can be planarized. The conductive layer 772 and the conductive layer 774 are located on the same plane, and the upper surfaces of the conductive layer 772 and the conductive layer 774 are flat. The flatness of the conductive layer 772 and the conductive layer 774 and the light-emitting element 782 can be easily electrically connected. can be effectively connected.

[0111] The conductive layers 772 and 774 and the light-emitting element 782 are connected to each other by conductive bumps 791 and 792a. 7, the light emitting element 782 is electrically connected to the cathode side of the light emitting element 782 through the capacitor 793. The heights of the electrodes on the positive and negative sides are different, and the heights of the bumps 791 and 793 are also different. The light emitting element 782 has a cathode electrode and an anode electrode. If the heights are the same, the heights of the bumps 791 and 793 are approximately the same. can be done.

[0112] As shown in FIG. 7, the transistor 750 included in the pixel portion 702 is The transistor 750, particularly the channel forming region and the conductive region, are preferably provided so as to overlap each other. By having an overlapping region of the layer 772, light emitted from the light emitting element 782 and external light can be transmitted. This can prevent the electric current from reaching the transistor 750, thereby preventing the electric characteristics of the transistor 750 from fluctuating. do.

[0113] The transistor 750 included in the pixel portion 702 and the transistor 750 included in the source driver circuit portion 704 are A transistor having a different structure from the transistor 752 may be used. A top-gate transistor is applied to one side, and a bottom-gate transistor is applied to the other side. The gate driver circuit section 706 may also be configured to use a source driver. This is the same as the driver circuit section 704.

[0114] The signal line 710 is the same as the source and drain electrodes of the transistors 750 and 752. In this case, if a low-resistance material such as a material containing copper is used, the wiring This is preferable because it reduces signal delays caused by line resistance and enables display on a large screen.

[0115] The FPC terminal portion 708 includes wiring 760, a part of which functions as a connection electrode, an anisotropic conductive film 78, and a The wiring 760 is connected to the FPC 710 via an anisotropic conductive film 780. 6. Here, the wiring 760 is electrically connected to the terminals of the transistors 750 and 6. The source electrode and drain electrode 752 are formed from the same conductive film.

[0116] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate or a plastic substrate. A flexible substrate such as a plastic substrate can be used. When a substrate that can be used is used, water or a water-soluble substance is provided between the first substrate 701 and the transistor 750 or the like. It is preferable to provide an insulating layer having barrier properties against elements.

[0117] On the second substrate 705 side, a light-shielding layer 738, a colored layer 736, and a phosphor layer 797 are provided. The coloring layer 736 is provided on the light-emitting element 782. The phosphor layer 797 is The phosphor layer 797 is provided between the light emitting element 782 and the coloring layer 736. 7, the phosphor layer 797 and the color layer 736 have overlapping areas. The end of the colored layer 736 is located outside the end of the light-emitting element 782, and the end of the colored layer 736 is located outside the end of the phosphor layer 797. By adopting such a configuration, it is possible to prevent the pixel from being exposed to the adjacent pixel. The light leakage and color mixing between pixels can be suppressed. By providing this, it is possible to reduce the reflection of external light and create a display device with high contrast. Cut.

[0118] For example, if the phosphor layer 797 has a phosphor that emits yellow light and the light emitting element 782 emits blue light, By adopting a configuration in which red light is transmitted, white light is emitted from the phosphor layer 797. The light emitted from the light emitting element 782 provided in the area overlapping the colored layer 736 is reflected by the phosphor layer 797. and passes through the colored layer 736 and is emitted as red light to the display surface side. The light emitted from the light emitting element 782 provided in the region overlapping with the colored layer 736 is emitted as green light. The light emitting element 782 provided in the area overlapping with the colored layer 736 that transmits blue light emits light. The light emitted from the light emitting element 782 is blue light. In addition, since the light emitting element 782 used in the display device is of one type, Therefore, the manufacturing process can be simplified. To provide a display device with high brightness and contrast, fast response speed, and low power consumption. can be done.

[0119] For example, the phosphor layer 797 has a phosphor that emits red light, and the light-emitting element 782 emits blue-green light. By configuring the phosphor layer 797 to emit white light, it is possible to configure the phosphor layer 797 to emit white light. good.

[0120] The phosphor layer 797 includes a phosphor that emits red light, a phosphor that emits green light, and a phosphor that emits blue light. The light emitting element 782 is configured to emit near ultraviolet light or purple light. This may result in a configuration in which white light is emitted from the phosphor layer 797.

[0121] The display device 700 shown in FIG. 7 includes a light-emitting element 782. The light-emitting element 782 is It is preferable to use a horizontally structured, face-down type LED chip as exemplified in .

[0122] The colored layer 736 is provided at a position overlapping the light emitting element 782, and the light blocking layer 738 is provided at a position overlapping the colored layer 736, the lead wiring portion 711, and the source driver circuit portion 704. The phosphor layer 797, the colored layer 736, and the light-shielding layer 738 are also provided. The space between the electrode 82 and the electrode 82 is filled with a sealing film 732 .

[0123] The light-shielding layer 795 is provided adjacent to the light-emitting element 782. It is preferable to provide a light-shielding layer between adjacent light-emitting elements 782. By providing the light-shielding layer 795, it is possible to suppress light leakage to adjacent pixels and color mixing between pixels. For 5, a resin containing a pigment, a dye, or carbon black can be used. Furthermore, it is preferable that the side surface of the light emitting element 782 contacts the light blocking layer 795. By covering the side surface with a light-shielding layer 795, light leakage to adjacent pixels and color mixing between pixels can be suppressed. In FIG. 7, the height of the upper surface of the light-shielding layer 795 and the height of the upper surface of the light-emitting element 782 are approximately Although the configuration is shown as being substantially the same, one embodiment of the present invention is not limited to this. The height of the surface may be lower than the height of the upper surface of the light emitting element 782, The height of the upper surface of the light-shielding layer 795 may be approximately the same as the height of the upper surface of the light-emitting element 782. By matching or increasing the brightness, light leakage to adjacent pixels and color mixing between pixels are efficiently suppressed. can.

[0124] FIG. 8 shows the configuration of a display device that can be suitably applied to a flexible display. FIG. 8 is a cross-sectional view taken along the dashed line ST in the display device 700A shown in FIG. 6(B). do.

[0125] The display device 700A shown in FIG. 8 includes a support substrate 745, The transistor has a laminated structure of an adhesive layer 742, a resin layer 743, and an insulating layer 744. The capacitor 750, the capacitor element 790, etc. are provided on an insulating layer 744 provided on a resin layer 743. are.

[0126] The support substrate 745 is a substrate containing organic resin, glass, or the like, and is thin enough to be flexible. The resin layer 743 is a layer containing an organic resin such as polyimide or acrylic. The resin layer 74 includes an inorganic insulating film such as silicon oxide, silicon oxynitride, or silicon nitride. 3 and a support substrate 745 are bonded together by an adhesive layer 742. The resin layer 743 is It is preferably thinner than the support substrate 745 .

[0127] 8 includes a protective layer 740 instead of the substrate 705 shown in FIG. The protective layer 740 is attached to the sealing film 732. A glass substrate, a resin film, or the like can be used as the protective layer 740. Optical components such as random plates, input devices such as touch sensor panels, or stacks of two or more of these A layered configuration may also be applied.

[0128] 8 shows a bendable region P2. In the region P2, the support substrate 74 5. In addition to the adhesive layer 742, there is a portion where no inorganic insulating film such as the insulating layer 744 is provided. In addition, in the region P2, a resin layer 746 is provided to cover the wiring 760. The area P2 where the inorganic insulating film is formed is as little as possible, and the conductive layer containing a metal or an alloy is formed. By using a laminated structure consisting of only layers containing organic materials, cracks do not occur when the film is bent. Furthermore, by not providing the support substrate 745 in the region P2, an extremely small A portion of the display device 700A can be bent with a small radius of curvature.

[0129] An example of a method for manufacturing the display device 700 shown in FIG. 7 will be described. The figures shown are schematic cross-sectional views at various stages of the manufacturing process of the display device 700. .

[0130] The thin films (insulating films, semiconductor films, conductive films, etc.) that constitute the display device are formed by sputtering. , Chemical Vapor Deposition (CVD) method, Vacuum evaporation, Pulsed Laser Deposit (PLD) ion) method, Atomic Layer Deposition (ALD) The CVD method can be plasma enhanced chemical vapor deposition (PECVD) or Alternatively, a thermal CVD method may be used. An example of a thermal CVD method is metal organic chemical vapor deposition (MOCVD). Alternatively, a (Ettal Organic CVD) method may be used.

[0131] In addition, thin films (insulating films, semiconductor films, conductive films, etc.) that make up the display device are formed by spin coating, Dip, spray coating, inkjet, dispensing, screen printing, offset printing Printing methods, doctor knife, slit coat, roll coat, curtain coat, knife It can be formed using tools (equipment) such as a coat.

[0132] Furthermore, when processing the thin films that make up the display device, photolithography or the like is used. Alternatively, island-shaped thin films may be formed by a film formation method using a shielding mask. Alternatively, thin films can be processed using nanoimprinting, sandblasting, lift-off, etc. As the photolithography method, there are, for example, the following two methods. A photosensitive resist material is applied to the thin film to be deposited, exposed to light through a photomask, and then developed. A resist mask is formed by imaging the thin film, and the thin film is processed by etching or the like. The other method is to remove the resist mask after forming a photosensitive thin film. This method involves exposing and developing the thin film to form it into a desired shape.

[0133] In photolithography, the light used for exposure is, for example, i-line (wavelength 365 nm), It uses g-ray (wavelength 436 nm), h-ray (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can be used. The exposure may also be performed by immersion exposure. Using extreme ultraviolet (EUV) and X-rays, Also, electron beams can be used instead of light for exposure. The use of light, X-rays or electron beams is preferred because it allows for extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, the photomask It is unnecessary.

[0134] There are three methods for etching thin films: dry etching, wet etching, and sandblasting. Methods such as these can be used.

[0135] <Formation of transistors, etc.> First, the conductive layer 301, the conductive layer 303, and the conductive layer 305 are formed on the substrate 701. The layer 301, the conductive layer 303, and the conductive layer 305 are formed by forming a resist mask after forming a conductive film. The conductive film is then etched, and the resist mask is then removed. .

[0136] Subsequently, an insulating layer 3 is formed on the substrate 701, the conductive layer 301, the conductive layer 303, and the conductive layer 305. Form 11.

[0137] Next, the semiconductor layer 321, the semiconductor layer 323, and the semiconductor layer 325 are formed (FIG. 9(A) The semiconductor layers 321, 323, and 325 are formed by laser irradiation after the semiconductor films are formed. A resist mask is formed, and the semiconductor film is etched, and then the resist mask is removed. It can be formed by:

[0138] Next, the insulating layer 331, the conductive layer 341, the conductive layer 351, the insulating layer 333, the conductive layer 343, and The insulating layer 331 and the insulating layer 333 are formed on the insulating film 341. A conductive film to be the conductive layer 343, a conductive film to be the conductive layer 351, and a conductive film to be the conductive layer 353 were formed. Then, a resist mask is formed, and the insulating film and the conductive film are etched. It can be formed by removing the pores.

[0139] Subsequently, an insulating layer 361 and an insulating layer 363 are formed (FIG. 9(B)).

[0140] Next, openings are formed in the insulating layer 361 and the insulating layer 363, and the conductive layer 371 and the conductive layer 373 are formed. a, a conductive layer 373b, a conductive layer 375, a conductive layer 377, and a wiring 760 are formed. 71, the conductive layer 373a, the conductive layer 373b, the conductive layer 375, the conductive layer 377, and the wiring 760 The conductive layer 301 can be formed by the same method as that for the conductive layer 301 and the like.

[0141] Through the above steps, the signal line 710, the transistor 750, the capacitor 790, and the transistor Then, the insulating layer 379 is formed. The reference numeral 9 functions as a protective film for the transistor 750 and the like.

[0142] <Formation of insulating layer 770> Next, an insulating layer 770 is formed. By using a photosensitive material for the insulating layer 770, The opening can be formed by lithography or the like. After that, a resist mask may be used to etch a part of the insulating film to form an opening. When an organic insulating material is used for the insulating layer 770, the flatness of the upper surface can be improved. preferable.

[0143] Alternatively, an inorganic insulating film may be used as the insulating layer 770. Silicon, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, nitride Inorganic insulating materials such as aluminum, aluminum oxynitride, or aluminum oxynitride The insulating layer 770 can be used as a single layer or a laminated layer. It functions as a protective layer for the transistor 750 etc.

[0144] The insulating layer 770 may also have a stacked structure of an inorganic insulating film and an organic insulating film.

[0145] Next, a part of the insulating layer 379 on the wiring 760 of the FPC terminal portion 708 is removed, and the wiring 76 Expose 0.

[0146] <Formation of Conductive Layer 772 and Conductive Layer 774> Subsequently, a conductive layer 772 and a conductive layer 774 are formed over the insulating layer 770 (FIG. 10(A)). The conductive layer 772 is electrically connected to the transistor 750 through an opening in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by the same method as the conductive layer 301. The conductive layer 772 and the conductive layer 774 are preferably formed using a material that is reflective to light. For example, the conductive layer 772 and the conductive layer 774 may be made of an alloy of silver, palladium, and copper (APC). Materials including aluminum, titanium, copper, etc. can be used.

[0147] Subsequently, conductive bumps 791 and 792 are formed on the conductive layers 772 and 774, respectively. The bumps 791 and 793 are formed using gold, silver, or the like (FIG. 10(B)). metals such as tin, alloys containing these metals, anisotropic conductive films such as conductive resins, The bumps 791 and 793 may be made of, for example, gold. The bumps 791 and 793 can be formed by a printing method, a transfer method, or the like. A method such as a spraying method or a discharge method can be used.

[0148] <Arrangement of light-emitting element 782> Next, the light emitting element 782 is placed on the bumps 791 and 793. As the LED chip 82, a horizontal structure, face-down type LED chip as shown in FIG. At the time of placement, the cathode electrode and the anode electrode of the light emitting element 782 are respectively connected to bumps. The light emitting element 782 is disposed so as to be in contact with the bumps 791 and 793. The cap 793, the light emitting element 782, the conductive layer 772 and the conductive layer 774 are pressed together. The light emitting element 782 is fixed on the conductive layer 772 and the conductive layer 774. Layer 774 and light emitting element 782 are electrically connected (FIG. 11).

[0149] The light emitting element 782 is placed by picking up the light emitting element 782 from a predetermined position, transporting it, and then Alternatively, a pick-and-place device can be used to place the light emitting element 782 in the position shown in FIG. The FSA (Fluidic Self Assembly) method may be used for the placement of the In the FSA method, a light emitting element 782 and a light emitting element 783 are formed on the conductive layer 772 and in a region overlapping with the conductive layer 774. A suitable recessed insulating layer is formed, and the light emitting element 782 is self-alignedly arranged in the recessed portion in the liquid. In one embodiment of the present invention, the LED chip used as the light-emitting element 782 is one type. Therefore, the arrangement of the light emitting elements 781 becomes easier compared to when a plurality of types are used.

[0150] <Formation of light-shielding layer 795> Next, a light-shielding film that will become the light-shielding layer 795 is formed on the insulating layer 770 and the light-emitting element 782 (see FIG. 11) As a light-shielding film, a resin containing a metal material, pigment, or dye is used, and the film is then photolithographically At this time, a light-shielding film is also formed on the light-emitting element 782. The thickness of the light-shielding film is adjusted so as to achieve the desired thickness.

[0151] Next, a part of the light-shielding film that will become the light-shielding layer 795 is removed to expose the upper surface of the light-emitting element 782. (Fig. 12(A)). The light-shielding film can be removed by dry etching or the like. In one embodiment of the present invention, one type of LED chip is used as the light emitting element 782, and Since the height of the light emitting elements 782 can be made the same between elements, the upper surface of each light emitting element 782 can be easily The exposure can be uniform, and the manufacturing cost can be reduced. , low manufacturing cost, high brightness and contrast, fast response speed, and low power consumption This makes it possible to provide a display device with a high image quality.

[0152] <Formation of Colored Layer 736 and Phosphor Layer 797> Subsequently, a light-shielding layer 738 and a colored layer 736 are formed on the substrate 705 .

[0153] The light-shielding layer 738 can be made of a metal material or a resin material. When using a metal material, after forming the conductive film, unnecessary parts are removed by photolithography or the like. The light-shielding layer 738 can be formed by removing the unnecessary portions. When a photosensitive resin material containing the compound is used, the film can be formed by photolithography or the like.

[0154] The colored layer 736 is preferably made of, for example, a photosensitive resin material. After applying a material onto the substrate 705 and the light-shielding layer 738, the material is applied through a photomask. The film can be formed by exposure, development, and then heat treatment.

[0155] Next, a phosphor layer 797 is formed on the colored layer 736 (FIG. 12(B)). 7 is a film formed by, for example, screen printing or dispensing using an organic resin layer containing a phosphor. It can be formed by the lance method or the like.

[0156] <Bonding of substrate 701 and substrate 705> Next, a bonding agent is applied to either or both of the substrate 701 and the substrate 705. The adhesive layer is formed so as to surround the area where the pixels are arranged. The adhesive layer can be formed by, for example, a screen printing method, a dispensing method, etc. UV curable resins and UV curable resins can be used. Alternatively, a resin that hardens when heated may be used as the adhesive layer. A resin having both radiation curing and thermosetting properties may also be used.

[0157] Next, the substrate 701 and the substrate 705 are bonded together, and the adhesive layer is hardened to form a sealing film 732. If the bonding is performed under a reduced pressure atmosphere, bubbles may be trapped between the substrates 701 and 705. This is preferable because it can prevent this.

[0158] Next, an anisotropic conductive film 780 is provided on the wiring 760. An FPC By placing the FPC 716 and bonding it by thermocompression, the wiring 760 and the FPC 716 are electrically connected. Can.

[0159] Through the above steps, the display device 700 can be formed (FIG. 7).

[0160] <Cross-section configuration example 2> An example of a configuration different from the display device 700 shown previously is shown in FIG. 13. FIG. 13 shows the configuration of the display device 700 shown in FIG. The display device 700C shown in FIG. 4 as an example of the LED package 82, and a light-shielding layer 795 and a phosphor layer 79 The main difference from the display device 700 shown in FIG. 7 is that it does not have the display device 7.

[0161] An example of a method for manufacturing the display device 700C shown in FIG. 13 will be described with reference to FIGS. 14 and 15. 14 and 15 show steps involved in the manufacturing method of the display device 700C. 7 is a cross-sectional view of the display device 7 described above until the insulating layer 770 is formed. The detailed description of the manufacturing method of 00 can be used, so it will be omitted.

[0162] <Formation of Conductive Layer 772 and Conductive Layer 774> A conductive layer 772 and a conductive layer 774 are formed over the insulating layer 770 (FIG. 14A). The insulating layer 770 is electrically connected to the transistor 750 through an opening in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by a method similar to that for the conductive layer 301 and the like.

[0163] Subsequently, conductive bumps 791 and 792 are formed on the conductive layers 772 and 774, respectively. The bumps 791 and 793 are formed using gold, silver, or the like (FIG. 14(B)). metals such as tin, alloys containing these metals, anisotropic conductive films such as conductive resins, The bumps 791 and 793 can be formed by a printing method. , transfer method, discharge method, etc. can be used.

[0164] For example, a silver paste is used for the bumps 791 and 793, and a conductive layer 772 and a conductive layer 773 are used. The conductive layer 774 can be made of one or more of APC, aluminum, titanium, and copper. With this structure, the light-emitting element 782 can be formed by the conductive layer 772 and the conductive layer 774. It is possible to achieve good electrical connection with each of them.

[0165] <Arrangement of light-emitting element 782> Next, the light emitting element 782 is placed on the bumps 791 and 793. It is preferable to use a surface-mount type LED package as shown in FIG. At the time of placement, the cathode electrode and the anode electrode of the light emitting element 782 are respectively connected to the bump 791 and the bump The light emitting element 782 is disposed so as to be in contact with the bump 793. The optical element 782, the conductive layer 772, and the conductive layer 774 are pressed together, and the conductive layer 772 and the conductive layer 774 are pressed together. The light-emitting element 782 is fixed on the conductive layer 772 and the conductive layer 774. The light emitting element 782 is electrically connected (FIG. 15(A)).

[0166] A pick and place device can be used to place the light emitting element 782. The FSA method may be used to arrange the light-emitting element 782. Since only one type of LED chip is used as 782, it is difficult to compare it with the case where multiple types are used. This makes it easier to arrange the light emitting element 781.

[0167] <Formation of colored layer> Subsequently, a light-shielding layer 738 and a colored layer 736 are formed on the substrate 705 (FIG. 15(B)). The light-shielding layer 738 and the colored layer 736 can be manufactured using the same method as that for manufacturing the display device 700. Therefore, detailed description will be omitted.

[0168] <Bonding of substrate 701 and substrate 705> Next, a bonding agent is applied to either or both of the substrate 701 and the substrate 705. The substrate 701 and the substrate 705 are bonded together in the same manner as in the manufacturing method of the display device 700 described above. Detailed explanations will be omitted as the explanations in the law can be used.

[0169] Next, an anisotropic conductive film 780 is provided on the wiring 760. An FPC By placing the FPC 716 and bonding it by thermocompression, the wiring 760 and the FPC 716 are electrically connected. Can.

[0170] Through the above steps, the display device 700C can be formed (FIG. 13).

[0171] <Configuration example of providing an input device on a display device> An input device may be provided in the display devices shown in Figures 7, 8 and 13. Examples of such sensors include touch sensors.

[0172] For example, the sensor types include capacitance type, resistive film type, surface acoustic wave type, and infrared type. Various methods can be used, such as electrical, optical, and pressure-sensitive methods. Or, two or more of these can be used. may be used in combination.

[0173] The touch panel has a so-called in-cell structure, in which the input device is formed inside a pair of substrates. A touch panel of this type, an input device formed on the display device 700, is a so-called on-cell type touch panel. A so-called out-cell type touch panel, in which an input device is attached to the display device 700, is used. There are chip panels, etc.

[0174] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0175] (Embodiment 3) In this embodiment mode, a transistor that can be used in the display device shown in the previous embodiment mode is An example of the data will be described below.

[0176] The display device of one embodiment of the present invention includes a bottom-gate transistor and a top-gate transistor. The present invention can be implemented using various types of transistors, such as a transistor having a MOSFET, ... and a transistor having a MOSFET. The semiconductor layer material and transistor structure can be easily replaced to suit the production line. It is possible.

[0177] <Bottom-gate transistor> FIG. 16(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 16(A1) is a cross-sectional view of the transistor 1810 in the channel length direction. The transistor 1810 is formed on the substrate 1771. An electrode 1746 is provided on the insulating layer 1771 via an insulating layer 1772. The semiconductor layer 1742 is sandwiched between the edge layer 1726. The electrode 1746 functions as a gate electrode. The insulating layer 1726 can function as a gate insulating layer.

[0178] In addition, an insulating layer 1741 is provided on a channel formation region of the semiconductor layer 1742. Electrodes 1744a and 1744b are disposed on insulating layer 1726 in contact with a portion of insulating layer 1742. The electrode 1744a can function as either a source electrode or a drain electrode. The electrode 1744b can function as the other of the source and drain electrodes. A portion of electrode 1744a and a portion of electrode 1744b are formed on insulating layer 1741.

[0179] The insulating layer 1741 can function as a channel protection layer. By providing 741, the semiconductor layer generated when forming the electrode 1744a and the electrode 1744b is Therefore, the shape of the electrode 1744a and the electrode 1744b can be prevented from being exposed. This can prevent the channel formation region of the semiconductor layer 1742 from being etched during the formation of the semiconductor layer 1742. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided.

[0180] The transistor 1810 also includes an electrode 1744a, an electrode 1744b, and an insulating layer 174 1 has an insulating layer 1728 on it, and an insulating layer 1729 on it.

[0181] When an oxide semiconductor is used for the semiconductor layer 1742, the electrodes 1744a and 1744b At least the portion in contact with the semiconductor layer 1742 is formed by removing oxygen from a part of the semiconductor layer 1742. It is preferable to use a material that can generate oxygen vacancies. The region where oxygen vacancies occur increases the carrier concentration, and the region becomes n-type. + Therefore, the region in question can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 1742, oxygen can be removed from the semiconductor layer 1742. Examples of materials that can take away oxygen and cause oxygen deficiency include tungsten and titanium. Examples include:

[0182] The source and drain regions are formed in the semiconductor layer 1742, whereby the electrode 17 The contact resistance between the semiconductor layer 1742 and the electrodes 1744a and 1744b can be reduced. This allows the electrical characteristics of the transistor, such as field-effect mobility and threshold voltage, to be improved. It is possible.

[0183] When a semiconductor such as silicon is used for the semiconductor layer 1742, the semiconductor layer 1742 and the electrode 1 744a and between the semiconductor layer 1742 and the electrode 1744b, an n-type semiconductor or a p-type It is preferable to provide a layer that functions as a semiconductor. The functional layer can function as the source or drain region of a transistor. .

[0184] The insulating layer 1729 prevents or reduces the diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 1729 using a material having a certain function. can also be omitted.

[0185] The transistor 1811 shown in FIG. 16A2 has a back gate electrode over the insulating layer 1729. The transistor 1723 differs from the transistor 1810 in that it has an electrode 1723 that can function as a 23 can be formed using the same materials and methods as the electrode 1746 .

[0186] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or any other potential. By changing the potential of the gate electrode independently of the potential of the gate electrode, the transistor The threshold voltage can be varied.

[0187] In addition, both the electrode 1746 and the electrode 1723 can function as gate electrodes. Therefore, the insulating layer 1726, the insulating layer 1728, and the insulating layer 1729 are each The electrode 1723 can function as a gate insulating layer. It may be provided between insulating layers 1729 .

[0188] When one of the electrodes 1746 and 1723 is referred to as a "gate electrode," the other is referred to as a "gate electrode." For example, in the transistor 1811, the electrode 1723 is When referring to a "gate electrode," the electrode 1746 is referred to as a "back gate electrode." When 723 is used as a "gate electrode", the transistor 1811 is a top-gate type It can be considered as a type of transistor. One of them may be called the "first gate electrode" and the other the "second gate electrode." be.

[0189] By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 sandwiched therebetween, By setting the electrode 1746 and the electrode 1723 to the same potential, the capacitance is increased in the semiconductor layer 1742. The flow area of ​​the rear becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-state current of the transistor 1811 increases and the field effect mobility increases. It becomes.

[0190] Therefore, the transistor 1811 is a transistor having a large on-current relative to its area. That is, the occupancy of the transistor 1811 is According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It can be realized.

[0191] In addition, the gate electrode and back gate electrode are formed from a conductive layer, so that the external The function of preventing the electric field generated by the The back gate electrode has a function of shielding the electric field against vapors and other harmful substances. By forming the semiconductor layer in a thin film and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0192] In addition, by forming the back gate electrode using a conductive film having a light-shielding property, This prevents light from entering the semiconductor layer from the electrode side, thereby preventing light degradation of the semiconductor layer. This prevents the deterioration of electrical characteristics, such as a shift in the threshold voltage of a transistor. do.

[0193] According to one embodiment of the present invention, a highly reliable transistor can be provided. As a result, a highly reliable semiconductor device can be realized.

[0194] FIG. 16(B1) shows a channel protection type transistor 1 having a different structure from that shown in FIG. 16(A1). 18 is a cross-sectional view of the transistor 1820 in the channel length direction. 17. It has almost the same structure as the semiconductor layer 1742, but the insulating layer 1741 covers the edge of the semiconductor layer 1742. In addition, a part of the insulating layer 1741 that overlaps the semiconductor layer 1742 is selectively removed. In the opening formed by the above process, the semiconductor layer 1742 and the electrode 1744a are electrically connected to each other. In addition, a portion of the insulating layer 1741 overlapping the semiconductor layer 1742 was selectively removed to form a In the other opening, the semiconductor layer 1742 and the electrode 1744b are electrically connected. The region of layer 1741 that overlaps the channel-forming region can function as a channel protection layer.

[0195] The transistor 1821 shown in FIG. 16B2 has a back gate electrode over the insulating layer 1729. The transistor 1720 differs from the transistor 1820 in that it has an electrode 1723 that can function as a transistor.

[0196] By providing the insulating layer 1729, the insulating layer 1729 can prevent the formation of the electrodes 1744a and 1744b. Therefore, the electrode 1744a and the semiconductor layer 1742 can be prevented from being exposed. This can prevent the semiconductor layer 1742 from becoming thin when forming 44b.

[0197] Also, the transistors 1820 and 1821 are connected to the transistors 1810 and 1822. and transistor 1811, the distance between electrode 1744a and electrode 1746 and the distance between electrode 1744b and electrode 1746 are The distance between electrode 1744a and electrode 1746 is increased. In addition, the parasitic capacitance between the electrode 1744b and the electrode 1746 can be reduced. According to one aspect of the present invention, the parasitic capacitance occurring between the A good transistor can be realized.

[0198] The transistor 1825 shown in FIG. 16C1 is a bottom-gate transistor. 18 is a cross-sectional view of a channel-etched transistor 1825 in the channel length direction. The transistor 1825 is connected to the electrodes 1744a and 1744b without using the insulating layer 1741. Therefore, the semiconductor exposed when the electrodes 1744a and 1744b are formed is On the other hand, since the insulating layer 1741 is not provided, a part of the insulating layer 1742 may be etched. This allows for increased productivity of transistors.

[0199] The transistor 1826 shown in FIG. 16C2 has a back gate electrode over the insulating layer 1729. The transistor 1724 differs from the transistor 1825 in that it has an electrode 1723 that can function as a transistor.

[0200] 17(A1) to 17(C2) show transistors 1810, 1811, 1820, and 1 821, 1825, and 1826 are cross-sectional views in the channel width direction, respectively.

[0201] In the structures shown in FIG. 17(B2) and FIG. 17(C2), the gate electrode and the back gate electrode The gate electrode and the back gate electrode are connected to each other, and the potential of the gate electrode and the back gate electrode is the same. 42 is sandwiched between the gate electrode and the back gate electrode.

[0202] The length of each of the gate electrode and the back gate electrode in the channel width direction is The length of the semiconductor layer 1742 in the channel width direction is longer than the length of the semiconductor layer 1742 in the channel width direction. The insulating layers 1726, 1741, 1728, and 1729 are sandwiched between the gate electrode and the back gate. The structure is covered with a gate electrode.

[0203] With this structure, the semiconductor layer 1742 included in the transistor can be used as a gate electrode and The gate electrode can be electrically surrounded by the electric field of the back gate electrode.

[0204] Like the transistor 1821 or the transistor 1826, the gate electrode and the back The electric field of the gate electrode electrically connects the semiconductor layer 1742 in which the channel formation region is formed. The device structure of the surrounding transistor is called the Surrounded channel (Sc This can be called a channel structure.

[0205] By using an S-channel structure, one or both of the gate electrode and back gate electrode By both of these, an electric field is effectively applied to the semiconductor layer 1742 to induce a channel. This improves the current driving capability of the transistor and allows for high on-current characteristics. In addition, since it is possible to increase the on-current, it is possible to miniaturize transistors. In addition, by using an S-channel structure, the functionality of the transistor can be improved. The mechanical strength can be increased.

[0206] <Top-gate transistor> The transistor 1842 illustrated in FIG. 18A1 is a top-gate transistor. The transistor 1842 is formed by forming the insulating layer 1729 and then forming the electrodes 1744a and 1744b. The transistor 1810 and the transistor 1820 differ from each other in that the transistor 1810 and the transistor 1820 form a gate electrode 1744b. The electrodes 1744a and 1744b are formed on the insulating layers 1728 and 1729. The semiconductor layer 1742 is electrically connected to the insulating layer 1744 through the opening formed therein.

[0207] Also, a part of the insulating layer 1726 that does not overlap with the electrode 1746 is removed, and the electrode 1746 and the remaining The insulating layer 1726 is used as a mask to introduce impurities into the semiconductor layer 1742, thereby forming a semiconductor An impurity region can be formed in a self-aligned manner in the conductor layer 1742. Transistor 1842 has an area where insulating layer 1726 extends beyond the end of electrode 1746. The impurity concentration in the region of the semiconductor layer 1742 into which the impurity is introduced via the insulating layer 1726 is , the region where the impurity is introduced without the insulating layer 1726 is smaller than the region where the impurity is introduced without the insulating layer 1726. 2 is a lightly doped dry layer (LDD) in an area that does not overlap with the electrode 1746. n) Regions are formed.

[0208] The transistor 1843 shown in FIG. 18A2 has an electrode 1723. The transistor 1843 is different from the transistor 1842. The transistor 1843 is formed on the electrode 1771. The electrode 1723 has a region overlapping with the semiconductor layer 1742 via the insulating layer 1772. The electrode 1723 can function as a back gate electrode.

[0209] In addition, the transistor 1844 shown in FIG. 18(B1) and the transistor 1845 shown in FIG. 18(B2) The insulating layer 1726 in the area that does not overlap with the electrode 1746 is completely removed, as in the case of the resistor 1845. 18C2 and the transistor 1846 shown in FIG. The insulating layer 1726 may remain, as may the transistor 1847.

[0210] The transistors 1843 to 1847 are also formed by forming the electrode 1746. By introducing impurities into the semiconductor layer 1742 using the electrode 1746 as a mask, the semiconductor layer According to one aspect of the present invention, the impurity region can be formed in a self-aligned manner in the semiconductor substrate 1742. Furthermore, according to one embodiment of the present invention, a transistor with a high integration density can be realized. A semiconductor device with high performance can be realized.

[0211] 19(A1) to 19(C2) show transistors 1842, 1843, 1844, 1 845, 1846, and 1847 are cross-sectional views in the channel width direction, respectively.

[0212] Transistor 1843, transistor 1845, and transistor 1847 are Each of these has the S-channel structure explained above. However, it is not limited to this, and the transistor Transistor 1843, transistor 1845, and transistor 1847 are connected to the S-channel It does not have to be an l structure.

[0213] Metal oxides that can be suitably used for the channel formation region of a transistor are described below. We will explain about this.

[0214] The semiconductor material used for the transistor has an energy gap of 2 eV or more, and is preferably Metal oxides having a voltage of about 2.5 eV or more, more preferably 3 eV or more, can be used. A typical example is a metal oxide containing indium, such as the CAC-OS etc. can be used.

[0215] Metal oxides with a wider band gap than silicon and a lower carrier density are used. The transistor has a low off-state current, which is The accumulated charge can be maintained for a long period of time.

[0216] The semiconductor layer may be made of, for example, indium, zinc, and M (aluminum, titanium, gallium, germanium, etc.). Rumanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or It can be a film expressed as an In-M-Zn oxide containing metals such as hafnium .

[0217] When the metal oxide constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of the metal elements in the sputtering target used to form a film is In≧M It is preferable that Zn≧M is satisfied. The atomic ratios were In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5: The atomic ratio of the semiconductor layers to be formed is preferably 1:8 or the like. This includes a ±40% variation in the atomic ratio of metal elements contained in the ring target.

[0218] The semiconductor layer is made of a metal oxide film having a low carrier density. Carrier density is 1×10 17 / cm 3 Less than 1 × 10 15 / cm 3 Below, further Preferably 1 x 10 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Below, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than a career High density metal oxides can be used. Such metal oxides can be high purity intrinsic or It is called a high-purity intrinsic metal oxide in terms of quality. The metal oxide has a low impurity concentration and a high density of defect levels. Since the concentration is low, it can be said to be a metal oxide with stable properties.

[0219] However, the semiconductor characteristics and electrical characteristics (electric field characteristics) of the required transistors are not limited to these. An oxide semiconductor having an appropriate composition may be used depending on the semiconductor properties (e.g., effective mobility, threshold voltage, etc.). In order to obtain the required semiconductor characteristics of the transistor, the carrier density and impurity of the semiconductor layer are By appropriately adjusting the concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. It is preferable that:

[0220] In the metal oxides that make up the semiconductor layer, silicon and carbon, which are elements of Group 14, If it is included, oxygen vacancies increase in the semiconductor layer, causing it to become n-type. The silicon and carbon concentrations in the layer (obtained by secondary ion mass spectrometry) were calculated by 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17atoms / cm 3 The following do.

[0221] In addition, alkali metals and alkaline earth metals generate carriers when bonded with metal oxides. This may result in an increase in the off-state current of the transistor. Alkali metals or alkaline earth metals obtained by secondary ion mass spectrometry in body layers. The concentration of 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0222] In addition, if the metal oxide that makes up the semiconductor layer contains nitrogen, the electrons that act as carriers This increases the carrier density and makes it easier to become n-type. Therefore, transistors using this material tend to be normally-on. The nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atoms / cm 3 below It is preferable to do so.

[0223] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned crystal-doped oxide semiconductor) stalline oxide semiconductor), polycrystalline oxide semiconductor, nc-OS(nanocrystalline oxide semiconductor r), pseudo-amorphous oxide semiconductor (a-like OS) oxide semiconductor), and amorphous oxide semiconductor.

[0224] In addition, a semiconductor layer of a transistor disclosed in one embodiment of the present invention may contain CAC-OS(Cl oud-Aligned Composite oxide semiconducto r) may also be used.

[0225] Note that the semiconductor layer of the transistor disclosed in one embodiment of the present invention is A non-single-crystal oxide semiconductor or CAC-OS can be preferably used. As the OS, nc-OS or CAAC-OS can be preferably used.

[0226] In one embodiment of the present invention, a CAC-OS semiconductor layer is used for a transistor. By using CAC-OS, transistors can have excellent electrical characteristics and high reliability. can be granted.

[0227] The semiconductor layer is divided into a CAAC-OS region, a polycrystalline oxide semiconductor region, and an nc-OS region. a region of a pseudo-amorphous oxide semiconductor, and a region of an amorphous oxide semiconductor; The mixed film may be, for example, a film having two or more of the above-mentioned regions. The film may have a single layer structure including the above-mentioned regions, or a laminated structure.

[0228] Hereinafter, a CAC-O film that can be used in a transistor disclosed in one embodiment of the present invention will be described. The configuration of S will be explained.

[0229] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in size. Preferably, the material is unevenly distributed in a size range of 1 nm to 2 nm or in the vicinity thereof. In the following, in a metal oxide, one or more metal elements are polarized. The region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more. A mixed state of particles with a size of 2 nm or less or close to that size is called a mosaic or patch state. Also called.

[0230] The metal oxide preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more selected from tantalum, tungsten, magnesium, etc. It may be included.

[0231] For example, CAC-OS in In-Ga-Zn oxide (In- Ga-Zn oxide may be specifically referred to as CAC-IGZO. (hereinafter referred to as InO X1 (X1 is a real number greater than 0.) or Indium Zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0. ) and gallium oxide (GaO X3 (X3 is a real number greater than 0) ), or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (X4, Y4, and Z1 and Z2 are real numbers greater than 0.) The material is separated into mosaics. The mosaic-like InO X1 , or In X2 Zn Y2 O Z2is uniformly distributed in the film This is a cloud-like configuration (hereinafter also referred to as a cloud-like configuration).

[0232] In other words, CAC-OS is X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 A composite metal oxide having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Compared to region 2, the concentration of In is higher.

[0233] IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO) m1 (m1 is a natural number), or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of the crystalline compounds include those represented by the formula:

[0234] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. The crystal structure is non-oriented and connected.

[0235] On the other hand, CAC-OS is a material structure of metal oxides. In a material composition containing Ga, Zn, and O, some nanoparticles with Ga as the main component were observed. The region where the In nanoparticles are observed is shown in part. This refers to a structure in which the crystals are randomly dispersed in a mosaic pattern. Structure is a secondary factor.

[0236] Note that CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, Not at all.

[0237] In addition, GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 In some cases, a clear boundary between the region where the main component is the chromatic aberration and the region where the chromatic aberration is the main component may not be observed.

[0238] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium can be used. Aluminum, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected elements such as cesium are included, CAC-OS will In the region, nanoparticles containing the metal element as the main component are observed, and in the region, In is the main component. The nanoparticle-like regions are randomly dispersed in a mosaic pattern. This refers to

[0239] CAC-OS can be formed by, for example, a sputtering method without heating the substrate. When the CAC-OS is formed by a sputtering method, the following gas is used as the deposition gas: Any one selected from an inert gas (typically argon), oxygen gas, and nitrogen gas One or more of the oxygen gases may be used. The lower the ratio, the better. For example, the flow rate ratio of oxygen gas is set to 0% or more and less than 30%, preferably 0 It is preferable that the content is 10% or more and 10% or less.

[0240] CAC-OS is an X-ray diffraction (XRD) measurement method. When measured using one of the out-of-plane θ / 2θ scans In other words, from the X-ray diffraction measurement, no clear peaks are observed. It can be seen that no orientation in the ab plane direction or the c axis direction is observed in the fixed region.

[0241] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron diffraction pattern obtained by irradiating the sample, a ring-shaped area of ​​high brightness (phosphor) is formed. The electron diffraction pattern shows that the ring region is a region of the nucleus, and multiple bright spots are observed in the ring region. The crystal structure of CAC-OS has no orientation in the planar direction and the cross-sectional direction. It can be seen that it has a c (nano-crystal) structure.

[0242] For example, in the CAC-OS of In-Ga-Zn oxide, energy dispersive X Energy Dispersive X-ray spectroscopy (EDX) EDX mapping obtained using scopy revealed that GaO X3 The region where is the principal component And, In X2 Zn Y2 O Z2 , or InO X1 The area where the main component is unevenly distributed and mixed It can be confirmed that the compound has a structure similar to that of the compound shown in FIG.

[0243] CAC-OS has a structure different from that of IGZO compounds, in which metal elements are uniformly distributed. CAC-OS has different properties from GZO compounds. X3 The main components are and the region where In X2 Zn Y2 O Z2 , or InO X1 The region where is the main component and the region where is The phases are separated into individual elements, resulting in a mosaic structure of regions each consisting of a different element as the main component.

[0244] Here, In X2 Zn Y2 O Z2 , or InO X1 The region where is the main component is GaO X This is a region with high conductivity compared to the region where In is the main component. X2 Zn Y2 O Z2 , or InO X1 The carriers flow through the area where the main component is gold. Therefore, the conductivity of In is expressed as a metal oxide. X2 Zn Y2 O Z2 , or InO X The region where 1 is the main component is distributed in a cloud-like manner in the metal oxide, resulting in a high field-effect transfer Mobility (μ) can be achieved.

[0245] On the other hand, GaO X3 The region where the main components are In X2 Zn Y2 O Z2 , or InO X1 This region has higher insulating properties than the region where GaO is the main component. X3 etc. The distribution of the region in which the main component is is in the metal oxide suppresses leakage current and provides good switching. Switching operation can be realized.

[0246] Therefore, when CAC-OS is used in a semiconductor device, GaOX3 Insulation and , In X2 Zn Y2 O Z2 , or InO X1 The conductivity caused by the This results in a high on-state current (I on ), and high field-effect mobility (μ) can be done.

[0247] Furthermore, semiconductor devices using CAC-OS have high reliability. It is ideal for various semiconductor devices including displays.

[0248] In addition, a transistor having a CAC-OS semiconductor layer has high field-effect mobility and Because of its high dynamic range, the transistor is connected to a driving circuit, typically a scanning By using this in a line driver circuit, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the transistor can be used in a signal line driver circuit (particularly, a signal line driver (Demultiplexer connected to the output terminal of the shift register of the operation circuit) Therefore, it is possible to provide a display device with a small number of wires connected to the display device.

[0249] In addition, the transistor with CAC-OS in the semiconductor layer is a transistor using low-temperature polysilicon. Unlike conventional transistors, no laser crystallization process is required. Even for display devices, it is possible to reduce manufacturing costs. ("4K resolution", "4K2K", "4K"), Super Hi-Vision ("8K resolution" For large display devices with high resolutions such as 8K, 1080p, 1080p, 8K4K, and 8K By using a transistor having a CAC-OS semiconductor layer in a driver circuit or a display portion, This is preferable because it allows writing in a short time and reduces display defects.

[0250] Alternatively, silicon may be used as the semiconductor in which the channel of the transistor is formed. Amorphous silicon may be used as the capacitor, but crystalline silicon is particularly preferred. For example, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon can be formed at a lower temperature than single-crystalline silicon. It also has higher field-effect mobility and higher reliability than amorphous silicon.

[0251] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0252] (Fourth embodiment) In this embodiment, a display device which is one embodiment of the present invention will be described.

[0253] The display device shown in FIG. 20A includes a pixel portion 502, a driver circuit portion 504, and a protection circuit 50 6 and a terminal portion 507. Note that the protection circuit 506 may not be provided. .

[0254] The transistors included in the pixel portion 502 and the driver circuit portion 504 are the transistors of one embodiment of the present invention. The protection circuit 506 can also be formed using the transistor of one embodiment of the present invention. may be applied.

[0255] The pixel section 502 is a plurality of pixels arranged in X rows and Y columns (X and Y are each independently a natural number of 2 or more). The display device has a plurality of pixel circuits 501 for driving a number of display elements.

[0256] The driving circuit unit 504 is a gate driver that outputs scanning signals to the gate lines GL_1 to GL_X. a source driver 504a that supplies data signals to the data lines DL_1 to DL_Y; The gate driver 504a includes a driver circuit such as a shift register The source driver 504b may be configured to have, for example, a plurality of analog switches. Also, the source driver 504 is configured using a shift register or the like. b may be configured.

[0257] The terminal unit 507 is used to input power, control signals, image signals, etc. from an external circuit to the display device. This refers to the part where terminals for connecting the power supply to the power source are provided.

[0258] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 The protection circuit 506 shown in FIG. For example, the scanning line GL, which is the wiring between the gate driver 504a and the pixel circuit 501, Various wirings such as the data line DL which is the wiring between the source driver 504b and the pixel circuit 501 Connected.

[0259] The gate driver 504a and the source driver 504b are connected to the pixel section 502 and The gate driver circuit or the source driver circuit may be provided on the same substrate. A separately formed substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) board) by COG or TAB (Tape Automated Bonding) It may also be configured to be implemented in

[0260] Furthermore, the plurality of pixel circuits 501 shown in FIG. 20(A) may be, for example, a configuration shown in FIG. 20(B). The pixel circuit 501 shown in FIG. 20B includes a transistor 552 and a transistor The pixel circuit 5 includes a transistor 554, a capacitor 562, and a light-emitting element 572. 01 includes a data line DL_n, a scanning line GL_m, a potential supply line VL_a, a potential supply line VL_ b etc. are connected.

[0261] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. The other terminal is supplied with a low power supply potential VSS. The current flowing through the light-emitting element 572 is controlled in accordance with the potential applied to the light-emitting element 572. The brightness of the light emitted from 72 is controlled.

[0262] The transistor 554 in the pixel circuit 501 shown in FIG. 20B is an n-channel An example of using a transistor is shown in FIG. 21(A). A pixel circuit 501 shown in FIG. , a transistor 552, a transistor 554a, a capacitor 562, and a light-emitting element 572 The transistor 552 is an n-channel transistor, and the transistor 55 4a is an n-channel transistor. For example, the transistor 552 is The transistor having an oxide semiconductor in a channel formation region shown in the embodiment is used. A transistor having silicon in a channel formation region can be used as the transistor 554a. .

[0263] For example, the transistor 552 and the transistor 554a may be the same as those in the previous embodiment. The transistor having an oxide semiconductor in a channel formation region shown in FIG. This structure reduces the area that the transistor occupies within the pixel, enabling extremely high-resolution images. Images can be displayed.

[0264] In the pixel circuit 501 shown in FIG. 21A, the source or drain of the transistor 552 One of the inputs is electrically connected to the data line DL_n. The other of the drain and drain is connected to one electrode of the capacitor 562 and the gate of the transistor 554a. The other electrode of the capacitor 562 is electrically connected to the potential supply line VL_a. The gate of the transistor 552 is electrically connected to the scan line GL_m. One of the source and drain of the transistor 554a is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is connected to the light emitting element 572 The other electrode of the light emitting element 572a is electrically connected to one of the electrodes of the potential supply line V The potential supply line VL_a is supplied with a low power supply potential VSS, and the potential supply line VL_b is electrically connected to the A high power supply potential VDD is applied to the potential supply line VL_b.

[0265] FIG. 21(B) shows a configuration different from that of the pixel circuit 501 shown in FIG. 21(A). In the pixel circuit 501 shown in FIG. 1, one of the source and the drain of the transistor 552 is The source or drain of the transistor 552 is electrically connected to the data line DL_n. The other terminal is electrically connected to one electrode of the capacitor 562 and the gate of the transistor 554a. The gate of the transistor 552 is electrically connected to the scan line GL_m. One of the source and drain of the transistor 554a is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is connected to the other of the capacitor 562. The light-emitting element 572a is electrically connected to one electrode of the light-emitting element 572a and one electrode of the light-emitting element 572b. The other electrode of the potential supply line VL_a is electrically connected to the potential supply line VL_b. A high power supply potential VDD is applied to the potential supply line VL_b, and a low power supply potential VSS is applied to the potential supply line VL_b.

[0266] The transistor 554 in the pixel circuit 501 shown in FIG. 20B is a p-channel An example in which a transistor is used is shown in FIG. 21(C). The pixel circuit 501 shown in FIG. , a transistor 552, a transistor 554b, a capacitor 562, and a light-emitting element 572 The transistor 552 is an n-channel transistor, and the transistor 55 4b is a p-channel transistor. The transistor having an oxide semiconductor in a channel formation region shown in the embodiment is used. A transistor having silicon in a channel formation region can be used as the transistor 554b. do.

[0267] In the pixel circuit 501 shown in FIG. 21C, the source or drain of the transistor 552 One of the inputs is electrically connected to the data line DL_n. The other of the drain and drain is connected to one electrode of the capacitor 562 and the gate of the transistor 554b. The other electrode of the capacitor 562 is electrically connected to the potential supply line VL_a. The gate of the transistor 552 is electrically connected to the scan line GL_m. One of the source and drain of the transistor 554b is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is connected to the light emitting element 572 The other electrode of the light emitting element 572a is electrically connected to one of the electrodes of the potential supply line V The potential supply line VL_a is supplied with a high power supply potential VDD, and the potential supply line VL_b is electrically connected to the The low power supply potential VSS is applied to the potential supply line VL_b.

[0268] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0269] (Embodiment 5) A pixel circuit having a memory for correcting the gradation displayed in the pixel and a display having the same The transistors exemplified in the above embodiments are used in the pixel devices exemplified below. It can be applied to transistors used in circuits.

[0270] <Circuit configuration> 22A shows a circuit diagram of the pixel circuit 400. The pixel circuit 400 includes a transistor M The pixel circuit 400 includes a transistor M2, a capacitor C1, and a circuit 401. The wiring S1, the wiring S2, the wiring G1, and the wiring G2 are connected.

[0271] The transistor M1 has a gate connected to a wiring G1, a source and a drain connected to a wiring S1, and The other of the source and drain is connected to one electrode of the capacitor C1. M2 has a gate connected to the wiring G2, one of the source and drain connected to the wiring S2, and one of the source and drain connected to the wiring S3. The other end of the input is connected to the other electrode of the capacitor C1 and the circuit 401, respectively.

[0272] The circuit 401 is a circuit including at least one display element. can be applied.

[0273] The node connecting the transistor M1 and the capacitor C1 is N1, and the node connecting the transistor M2 and the circuit 40 is N2. Let N2 be the node connecting to 1.

[0274] The pixel circuit 400 maintains the potential of the node N1 by turning off the transistor M1. Furthermore, by turning off the transistor M2, the voltage of the node N2 can be maintained. In addition, when the transistor M2 is in the off state, the transistor By writing a predetermined potential to node N1 via capacitor M1, capacitive coupling via capacitor C1 This allows the potential of the node N2 to be changed in accordance with the change in the potential of the node N1.

[0275] Here, one or both of the transistors M1 and M2 may be The transistor using an oxide semiconductor, which is exemplified in the above embodiment, can be used. Therefore, the potentials of the nodes N1 and N2 can be maintained for a long period of time due to the extremely low off-current. In addition, when the period for which the potential of each node is held is short (specifically, when In cases where the frame frequency is 30 Hz or more, a transformer using a semiconductor such as silicon A resistor may also be used.

[0276] <Driving method example> Next, an example of a method of operating the pixel circuit 400 will be described with reference to FIG. (B) is a timing chart relating to the operation of the pixel circuit 400. For ease of understanding, various resistances such as wiring resistance, parasitic capacitances of transistors and wiring, The influence of the threshold voltage of the transistor and the like is not taken into consideration.

[0277] In the operation shown in FIG. 22(B), one frame period is divided into a period T1 and a period T2. T1 is a period during which a potential is written to node N2, and T2 is a period during which a potential is written to node N1. It is a period.

[0278] [Period T1] In the period T1, a potential that turns on the transistor is applied to both the wiring G1 and the wiring G2. In addition, the wiring S1 is connected to a fixed potential V ref The first data is supplied to the wiring S2. Voltage V w supply.

[0279] The node N1 is connected to the line S1 via the transistor M1. ref is given. The node N2 is supplied with a first data potential V w is given. Therefore, the potential difference V across the capacitance C1 w -V ref is maintained.

[0280] [Period T2] Subsequently, in a period T2, a potential that turns on the transistor M1 is applied to the wiring G1. A potential that turns off the transistor M2 is applied to the line G2. Data potential V data A predetermined constant potential is applied to the wiring S2, or a floating potential is applied to the wiring S3. It may also be used as a

[0281] The node N1 is supplied with a second data potential V data is given. At this time, due to the capacitive coupling of the capacitor C1, the second data potential V data Depending on node N That is, the first data potential Vw and the potential In FIG. 22(B), dV is a positive value. Although the potential V data is the potential V re f It may be lower.

[0282] Here, the potential dV is roughly determined by the capacitance value of the capacitor C1 and the capacitance value of the circuit 401. When the capacitance value of the capacitor C1 is sufficiently larger than the capacitance value of the circuit 401, the potential dV is Data potential V data The potential is close to

[0283] In this way, the pixel circuit 400 is a circuit including a display element that combines two types of data signals. Since the potential supplied to the line 401 can be generated, the gradation can be corrected in the pixel circuit 400. It will be possible to do this.

[0284] Furthermore, the pixel circuit 400 generates a potential that exceeds the maximum potential that can be supplied to the wirings S1 and S2. When light-emitting elements are used, it is possible to achieve high dynamic range (HDR ) displays, etc. can be made.

[0285] The pixel circuit 400EL shown in FIG. 22C includes a circuit 401EL. includes a light-emitting element EL, a transistor M3, and a capacitor C2.

[0286] The transistor M3 has a gate connected to the node N2 and one electrode of the capacitor C2, and a source and drain connected to the node N2 and one electrode of the capacitor C2. One of the rains is at potential V L The other is one electrode of the light-emitting element EL, and The capacitor C2 is connected to the other electrode at a potential V com Connect with the wiring given. The other electrode of the light-emitting element EL is at a potential V HConnect with the wiring given.

[0287] The transistor M3 has a function of controlling the current supplied to the light-emitting element EL. functions as a storage capacitor. Capacitor C2 can be omitted if not required.

[0288] In this example, the cathode side of the light-emitting element EL is connected to the transistor M3. However, as shown in FIG. 22(D), a transistor M3 may be connected to the anode side. When H and potential V L You can change the value accordingly.

[0289] The pixel circuit 400EL generates a light-emitting element by applying a high potential to the gate of the transistor M3. Since a large current can be passed through the child EL, for example, HDR display can be realized. , by supplying a correction signal to the wiring S1 or the wiring S2, the transistor M3 and the light-emitting element E It is also possible to correct for variations in the electrical characteristics of L.

[0290] The circuit is not limited to the circuits shown in FIG. 22(C) and FIG. 22(D), and may include additional transistors and capacitors. It may also be configured to add a quantity.

[0291] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0292] (Embodiment 6) In this embodiment, the configuration of a data processing device of one embodiment of the present invention will be described with reference to FIGS. 23 and 2. This will be explained with reference to 4.

[0293] 23 and 24 illustrate a configuration of an information processing device according to one embodiment of the present invention. 23(A) is a block diagram of an information processing device, and FIG. 23(B) to FIG. 23(E) are diagrams showing the information processing device. 24(A) to 24(E) are perspective views for explaining the configuration of an information processing device. FIG. 2 is a perspective view illustrating the configuration of the device.

[0294] <Information processing device> The information processing device 5200B described in this embodiment includes an arithmetic unit 5210 and an input / output unit 5220 (see FIG. 23(A)).

[0295] The arithmetic unit 5210 has a function of receiving operation information, and generates image information based on the operation information. It has the function of supplying

[0296] The input / output device 5220 includes a display unit 5230, an input unit 5240, a detection unit 5250, and a communication unit 5260. 290, has a function of supplying operation information and a function of supplying image information. The output device 5220 has a function of providing detection information, a function of providing communication information, and a function of transmitting communication information. It has the functionality provided.

[0297] The input unit 5240 has a function of supplying operation information. Operation information is supplied based on the operation of the user of the processing device 5200B.

[0298] Specifically, keyboards, hardware buttons, pointing devices, touch sensors The input unit includes an illuminance sensor, an imaging device, a voice input device, an eye-gaze input device, and a posture detection device. Can be used for 5240.

[0299] The display unit 5230 has a display panel and a function for displaying image information. The display device shown in this embodiment can be used as the display portion 5230.

[0300] The detection unit 5250 has a function of supplying detection information. It has the function of detecting the surrounding environment and providing the detected information.

[0301] Specifically, it detects illuminance sensors, imaging devices, posture detection devices, pressure sensors, and human presence sensors. It can be used in the knowledge unit 5250.

[0302] The communication unit 5290 has a function of receiving communication information and a function of supplying communication information. It has the function of connecting to other electronic devices or communication networks via wired or wired communication. In general, it has functions such as wireless local area communication, telephone communication, and short-range wireless communication.

[0303] <Configuration example 1 of information processing device> For example, an outer shape along a cylindrical pillar or the like can be applied to the display unit 5230 (see FIG. 2 3(B)). In addition, the information processing device 5200B changes the display method according to the illuminance of the usage environment. The information processing device 5200B also has a function to detect the presence of a person and change the display. This allows the information processing device 5200B to, for example, It can be installed on a pillar, or it can display advertisements or information, etc. The information processing device 5200B can be used for digital signage and the like.

[0304] <Configuration example 2 of information processing device> The information processing device 5200B generates an image based on the locus of a pointer used by the user, for example. Specifically, the length of the diagonal is 20 inches. A display panel of 40 inches or more, preferably 55 inches or more is used. Alternatively, multiple display panels can be arranged side by side to form a single display area. Alternatively, multiple display panels can be arranged side by side to create a multi-screen display. Therefore, the information processing device 5200B can be used in, for example, an electronic blackboard, an electronic bulletin board, an electronic signboard, etc. It is possible.

[0305] <Configuration example 3 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. (See Figure 23(D)). This allows, for example, the power consumption of a smartwatch to be reduced. It is also suitable for environments with strong external light, such as outdoors on a clear day. The image can be displayed on the smartwatch for use in

[0306] <Configuration example 4 of information processing device> The display unit 5230 has, for example, a curved surface that curves gently along the side of the housing (see FIG. 23 (See (E)). Alternatively, the display unit 5230 may include a display panel, and the display panel may include, for example, a front This allows you to display the image on the front, side and top of your mobile phone, for example. In addition, image information can be displayed on the side and top surfaces.

[0307] <Configuration example 5 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This allows the smartphone to consume less power (see Figure 24(A)). Alternatively, the device can be suitably used in an environment with strong external light, such as outdoors on a clear day. Images can be displayed on a smartphone as if they were being viewed.

[0308] <Configuration example 6 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This allows the strong external light that shines into the room on a sunny day to penetrate the room. The image can be displayed on a television system for convenient use at any time. .

[0309] <Configuration example 7 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. (See Figure 24(C)). This allows for a more accurate reading of the image even in an environment with strong external light, such as outdoors on a clear day. Images can be displayed on a tablet computer for optimal use in Cut.

[0310] <Configuration example 8 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This allows the camera to function properly even in an environment with strong external light, such as outdoors on a clear day. The subject can be displayed on the digital camera so that it can be viewed conveniently even in a remote location.

[0311] <Configuration Example 9 of Information Processing Device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This allows the camera to function properly even in an environment with strong external light, such as outdoors on a clear day. The images can be displayed on a personal computer so that they can be used conveniently in Cut.

[0312] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0313] 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H: Display device, 11, 13: substrate, 15: functional layer, 17: light-emitting element, 20B: blue light, 20G: green light, 20R: red light, 21, 23: electrodes, 25: insulating layer, 27: adhesive layer, 31, 33: light-shielding layers 35: phosphor layer, 50: LED package, 51: LED chip

Claims

[Claim 1] a transistor, a light-emitting element, a coloring layer, a first electrode, and a second electrode; the light-emitting element is electrically connected to the first electrode and the second electrode, the first electrode is electrically connected to the transistor; the second electrode is located on the same plane as the first electrode; the colored layer is located on the light-emitting element, the colored layer has a region overlapping with the light-emitting element, the light-emitting element has a light-emitting diode chip; The display device, wherein the light-emitting element has a function of emitting white light.

Images