Display device

Abstract

To provide a semiconductor device in which the arrangement area of a transistor can be smaller.SOLUTION: The semiconductor device has a first transistor with a first oxide semiconductor film and a second transistor with a second oxide semiconductor film on a substrate. When the oxide semiconductor films are subjected to an electron-beam diffraction, the first oxide semiconductor film is larger than the second oxide semiconductor film in the ratio of the integrated intensity of the luminance in a diffraction spot due to a C-axial orientation and the integrated intensity of the luminance in a diffraction spot due to orientations in all directions. The semiconductor device also has a part of the first transistor between the second transistor and the substrate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device. Regarding placement.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect relates to an article, a method, or a manufacturing method. of a material, machine, manufacture, or composition of matter In particular, one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, , a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices are all semiconductor devices. The semiconductor device may include a conductive device. [Background technology]

[0004] A transistor (field-effect transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology that makes up thin-film transistors (FETs) or thin-film transistors (TFTs) is attracting attention. The transistor is used in power devices such as integrated circuits (ICs) and image display devices (display devices). Silicon is widely used as a semiconductor thin film that can be applied to transistors. Semiconductor materials such as , are widely known, but oxide semiconductors are also attracting attention. It has been done.

[0005] For example, Patent Document 1 discloses a first transistor using an oxide semiconductor film and a second transistor using an oxide semiconductor film. By stacking a second transistor using a film, multiple memory cells are provided in a stacked manner. This leads to a technology for reducing the cell area.

[0006] In addition, Patent Document 2 discloses a pixel section having a plurality of pixels arranged two-dimensionally, and a display panel for displaying the plurality of pixels. The display includes a driving circuit section for driving the display, and the first layer including the driving circuit section and the second layer including the pixel section are stacked. This technology reduces the space required for arranging the driver circuitry in the peripheral area of ​​the pixel area. The technique is revealed. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-138191 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-194577 Summary of the Invention [Problem to be solved by the invention]

[0008] As shown in Patent Documents 1 and 2, by stacking multiple transistors, the arrangement of transistors can be improved. On the other hand, by stacking multiple transistors, the mask This increases the number of sheets or steps.

[0009] In view of the above problem, one embodiment of the present invention is a semiconductor device in which a plurality of transistors are stacked. One of the objectives is to provide a semiconductor device in which the number of masks or the number of processes is small. Another embodiment of the present invention is a semiconductor device that can reduce the layout area of ​​a transistor. Another object of the present invention is to provide a semiconductor device having high reliability. Another object of the present invention is to provide a body device that can reduce manufacturing costs. Another object of the present invention is to provide a semiconductor device that reduces the It is an object of the present invention to provide a semiconductor device.

[0010] Note that the above description of the object does not preclude the existence of other objects. However, it is not necessary to solve all of these problems. Problems other than those mentioned above can be solved by the description of the specification, etc. It is obvious from the description of the specification that other problems can be extracted. . [Means for solving the problem]

[0011] One embodiment of the present invention is a semiconductor device including a first transistor and a second transistor over a substrate. the first transistor has a first oxide semiconductor film, and the second transistor has a The second transistor includes a second oxide semiconductor film, and the first transistor includes an interlayer film.

[0012] The first oxide semiconductor film is a first metal oxide semiconductor having a first crystal portion and a second crystal portion. The first crystal portion has a c-axis orientation, and the second crystal portion has a c-axis orientation larger than that of the first crystal portion. The first metal oxide film was subjected to electron diffraction measurement of a cross section. When the pattern is observed, the electron diffraction pattern shows diffraction spots caused by the first crystal portion. and a second region having a diffraction spot caused by a second crystal portion. The second oxide semiconductor film has a third crystal portion and a fourth crystal portion. The third crystal portion has a c-axis orientation, and the fourth crystal portion has a larger crystal orientation than the third crystal portion. The second metal oxide film was subjected to electron diffraction measurement of the cross section, and the electron When the electron diffraction pattern was observed, the diffraction patterns were characterized by the diffraction spots caused by the third crystal part. a third region having a spot and a fourth region having a diffraction spot caused by a fourth crystal portion; It has the following.

[0013] The ratio of the integrated intensity of luminance in the first region to the integrated intensity of luminance in the second region of the first oxide semiconductor film is The ratio of the integrated intensity of luminance in the fourth region of the second oxide semiconductor film to the integrated intensity of luminance in the fourth region of the second oxide semiconductor film is The ratio of the integrated intensity of the luminance in the third region to the integrated intensity of the luminance in the third region is greater than the ratio of the integrated intensity of the luminance in the third region to the integrated intensity of the luminance in the third region.

[0014] In the above structure, the source electrode or the drain electrode of the first transistor is and the second oxide semiconductor film.

[0015] In the above structure, the first oxide semiconductor film is provided between the substrate and the second oxide semiconductor film. It is preferable to have a pinched region.

[0016] In the above structure, the interlayer film has a region sandwiched between the substrate and the second oxide semiconductor film. It is preferable to have

[0017] In the above structure, the atomic ratio of In, M, and Zn in the oxide semiconductor film is In:M: When Zn is about 4:2:3 and In is 4, M is 1.5 or more and 2.5 or less, and It is preferable that Zn is 2 or more and 4 or less. The ratio of the number of atoms of In, M, and Zn is The second oxide semiconductor film may have a different structure from the first oxide semiconductor film.

[0018] In the above-described structure, the field-effect mobility in the saturation region is determined by the electric field of the first transistor. It is preferable that the field effect mobility of the second transistor is greater than the field effect mobility of the first transistor. In the above configuration, the Id-Vg characteristics of the transistor are measured when the voltage applied to the gate electrode is 3V. and the voltage applied to the drain region is in the range of 10V to 20V. It is preferable to measure it in the following range.

[0019] Another embodiment of the present invention is a semiconductor device having any one of the above structures and a light-emitting element. The display device has the above.

[0020] Another embodiment of the present invention is a display module including the display device and a touch sensor. Another aspect of the present invention is a semiconductor device according to any one of the above aspects. An electronic device having a display device or the above display module and an operation key or a battery. be. [Effects of the Invention]

[0021] According to one embodiment of the present invention, in a semiconductor device in which a plurality of transistors are stacked, the number of masks is Alternatively, a semiconductor device with a small increase in the number of steps can be provided. In the semiconductor device in which a plurality of transistors each having an oxide semiconductor film are stacked, A highly reliable semiconductor device can be provided. In a semiconductor device in which a plurality of transistors having a compound semiconductor film are stacked, the manufacturing cost is reduced. According to one embodiment of the present invention, a novel semiconductor device can be provided. A body device can be provided.

[0022] The description of these effects does not preclude the existence of other effects. It is not necessary to have all of these effects. Effects other than these may be described in the specification, It is obvious from the description in the specification, drawings, claims, etc. Therefore, it is possible to extract other effects. [Brief explanation of the drawings]

[0023] [Figure 1] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 2] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 3] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 4] 1A and 1B are diagrams illustrating a top view and a cross section of a semiconductor device. [Figure 5] 10A and 10B are graphs showing Id-Vg and Id-Vd characteristics of a transistor; [Figure 6] Graph showing Id-Vg characteristics and mobility curves (linear and saturated) calculated from GCA. [Figure 7] 1A and 1B are cross-sectional views illustrating a transistor. [Figure 8] FIG. 10 is a graph showing Id-Vg characteristics of a transistor. [Figure 9] 1A and 1B are diagrams illustrating circuits of a semiconductor device. [Figure 10] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 11] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 12] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 13] FIG. 1 is a diagram illustrating energy bands. [Figure 14] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 15] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 16] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 17] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 18] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 19] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 20] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 21] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 22] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 23] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 24] 10A and 10B show SIMS measurement results of an oxide semiconductor film. [Figure 25] FIG. 10 is a diagram illustrating the range of the atomic ratio of an oxide semiconductor. [Figure 26] A diagram explaining the InMZnO4 crystal. [Figure 27] 1A and 1B are diagrams illustrating energy bands of a transistor in which an oxide semiconductor is used for a channel region. [Figure 28] 1A and 1B illustrate a cross-sectional TEM image and a cross-sectional HR-TEM image of an oxide semiconductor film. [Figure 29] 1A and 1B illustrate a cross-sectional TEM image and a cross-sectional HR-TEM image of an oxide semiconductor film. [Figure 30] 1A and 1B illustrate a cross-sectional TEM image and a cross-sectional HR-TEM image of an oxide semiconductor film. [Figure 31] 10A to 10C show XRD measurement results and electron beam diffraction patterns of an oxide semiconductor film. [Figure 32] 10A to 10C show XRD measurement results and electron beam diffraction patterns of an oxide semiconductor film. [Figure 33] 10A to 10C show XRD measurement results and electron beam diffraction patterns of an oxide semiconductor film. [Figure 34] FIG. 2 is a diagram illustrating an electron beam diffraction pattern. [Figure 35] FIG. 2 is a diagram illustrating a line profile of an electron beam diffraction pattern. [Figure 36] 1 is a conceptual diagram illustrating the brightness profile of an electron beam diffraction pattern, the relative brightness R of the brightness profile, and the half-value width of the profile. [Figure 37] 3A and 3B are diagrams illustrating electron beam diffraction patterns and brightness profiles. [Figure 38] 10A and 10B are graphs showing relative luminance estimated from electron diffraction patterns of oxide semiconductor films. [Figure 39] 1A to 1C illustrate a cross-sectional TEM image of an oxide semiconductor film and a cross-sectional TEM image after image analysis. [Figure 40] 1A and 1B are diagrams illustrating a top view and a cross section of a semiconductor device. [Figure 41] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 42] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 43] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 44] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 45] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 46] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 47] 1A and 1B are a top view and a cross-sectional view illustrating a manufacturing method of a semiconductor device. [Figure 48] FIG. [Figure 49] 1A to 1C are cross-sectional views illustrating a method for producing an EL layer. [Figure 50] FIG. 1 is a conceptual diagram illustrating a droplet ejection device. [Figure 51] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 52] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 53] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 54] FIG. 1 is a block diagram illustrating a display device. [Figure 55] FIG. 2 is a diagram illustrating a display module. [Figure 56]1A to 1C illustrate electronic devices. [Figure 57] 1A to 1C illustrate electronic devices. [Figure 58] FIG. 1 is a perspective view illustrating a display device. DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, embodiments will be described with reference to the drawings. It is possible to implement the present invention in various ways without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the following description of the embodiments.

[0025] In addition, in the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The figures are merely schematic representations and are not limited to the shapes or values ​​shown in the drawings.

[0026] In addition, the ordinal numbers "first," "second," and "third" used in this specification are intended to be used to indicate a mixture of elements. It should be noted that the numbers are added to avoid confusion and are not intended to be limiting in number.

[0027] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used. The relationship is used for convenience in explaining the relationship with reference to the drawings. The terms and expressions vary depending on the direction in which each component is depicted. It can be rephrased appropriately depending on the situation.

[0028] In this specification, a transistor includes a gate, a drain, and a source. It is an element with at least three terminals. And, the drain (drain terminal, drain Between the source (source terminal, source region or drain electrode) and the source (source terminal, source region or source electrode) It has a channel region and allows current to flow between the source and drain through the channel region. In this specification and the like, the channel region is a region where a current mainly flows. The flow area.

[0029] The source and drain functions may differ depending on whether transistors with different polarities are used or the circuit operation. This may be reversed if the direction of the current changes during operation. In literature, the terms source and drain may be used interchangeably.

[0030] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a " is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. switching elements, resistor elements, inductors, capacitors, and other various functions. This includes elements such as

[0031] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0032] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to

[0033] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is in an off-state. The drain current when the device is in the ON state (also known as the OFF state or the OFF state). , Unless otherwise specified, for n-channel transistors, the voltage between the gate and source, Vg When s is lower than the threshold voltage Vth, in a p-channel transistor, the gate and source This refers to the state in which the voltage Vgs between the gates is higher than the threshold voltage Vth. For example, The off-state current of a transistor is the voltage between the gate and source, Vgs, and the threshold voltage, Vth. It may refer to the drain current when the voltage is lower than

[0034] The off-state current of a transistor may depend on Vgs. The current is I or less if there is a value of Vgs at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows in the off state at a given Vgs. Off-state or sufficiently reduced off-current at Vgs within a given range It may refer to the off-state current in the off state at Vgs, etc.

[0035] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -13 A, and the drain current at Vgs = -0.5 V is 1 × 10 -19 A and Vgs The drain current at -0.8V is 1×10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: Or, when Vgs is in the range of -0.5V to -0.8V, 1×10 -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 Because there exists a Vgs below A , the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0036] In this specification and the like, the off-state current of a transistor having a channel width W is expressed as It is sometimes expressed as the current value that flows per a given channel width (for example, 1 μm). In the latter case, the unit of the off-state current is the current / length dimension. It may be expressed in units with a constant value (e.g., A / μm).

[0037] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the off voltage is measured at room temperature, 60°C, 85°C, 95°C, or 125°C. Or, the reliability of the semiconductor device containing the transistor may be in doubt. or the temperature at which a semiconductor device including the transistor is used (for example, For example, it may refer to the off-state current at any temperature between 5°C and 35°C. The off-state current of the transistor is I or less, which means that the temperature is The temperature at which the reliability of the semiconductor device including the transistor is guaranteed, or The temperature at which the semiconductor device containing the stator is used (for example, any one of 5°C to 35°C) This indicates that there exists a value of Vgs at which the off-state current of the transistor is equal to or less than I at This may occur.

[0038] The off-state current of a transistor may depend on the voltage Vds between the drain and the source. In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1 V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or It may represent the off-state current at 20 V. Or, the semiconductor including the transistor Vds that guarantees the reliability of devices, etc., or semiconductor devices that include the transistor The off-state current of a transistor is sometimes expressed as the off-state current at Vds used in The current is less than or equal to I when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2 .5V, 3V, 3.3V, 10V, 12V, 16V, 20V, including transistors Vds that guarantees the reliability of the semiconductor device containing the transistor, or Vds used in devices, etc., Vg at which the off-state current of a transistor is I or less It may refer to the existence of a value of s.

[0039] In the above description of the off-state current, the drain may be read as the source. may also refer to the current that flows through the source when the transistor is in the off state.

[0040] In this specification and the like, the term "leak current" may be used to mean the same thing as "off-state current." In this specification and the like, the off-state current refers to, for example, the current when a transistor is in an off state. It can refer to the current that flows between the source and drain.

[0041] In this specification and the like, the threshold voltage of a transistor refers to the voltage at which a channel Specifically, it refers to the gate voltage (Vg) when the threshold voltage of a transistor is The voltage is plotted by plotting the gate voltage (Vg) on ​​the horizontal axis and the square root of the drain current (Id) on the vertical axis. In the curve (Vg-√Id characteristics), the straight line obtained by extrapolating the tangent line with the maximum slope is Gate voltage (Vg) at the point where the square root of the drain current (Id) intersects with 0 (Id is 0A) Alternatively, the threshold voltage of a transistor can be expressed as the channel length L and the The width of the panel is W, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] Sometimes refers to gate voltage (Vg).

[0042] In addition, even when the term "semiconductor" is used in this specification, it does not mean, for example, that the material has sufficient conductivity. If the conductivity is too low, it may have the properties of an "insulator." The boundary between "compounds" and "compounds" is vague and may not be strictly distinguishable. The "semiconductor" described above can sometimes be replaced with "insulator." The term "insulator" in the specification etc. may be replaced with "semiconductor." In some cases, the term "insulator" used in this specification and the like can be replaced with "semi-insulator."

[0043] In addition, even when the term "semiconductor" is used in this specification, it does not mean, for example, that the material has sufficient conductivity. If the chemical composition is very high, it may have the properties of a "conductor." The boundary between "electrode" and "electrode" is vague and it may not be possible to strictly distinguish them. The "semiconductor" described above may be replaced with "conductor" in some cases. The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0044] In this specification, impurities in a semiconductor refer to substances other than the main components that constitute the semiconductor film. For example, elements with a concentration of less than 0.1 atomic percent are impurities. The formation of DOS (Density of States) in semiconductors and the The semiconductor may have poor mobility or poor crystallinity. In the case of a nitride semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements. Elements, Group 2 elements, Group 14 elements, Group 15 elements, transition metals other than the main components, etc. , hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen In the case of oxide semiconductors, for example, oxygen vacancies can be created by the inclusion of impurities such as hydrogen. In addition, when the semiconductor contains silicon, the properties of the semiconductor are changed. The impurities include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, and Group 15 elements, etc.

[0045] In this specification, the term "metal oxide" is used in a broad sense. Metal oxides are oxide insulators and oxide conductors (transparent oxide conductors). Oxide Semiconductor (also known as OS) For example, when a metal oxide is used in the active layer of a transistor, Metal oxides are sometimes called oxide semiconductors. In other words, when describing OS FETs, In other words, the transistor may be a transistor having a metal oxide or an oxide semiconductor. do.

[0046] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides. Nitrogen-containing metal oxides are also called metal oxynitrides (met). It may also be called hydroxybenzoxanthate (hydroxybenzoxanthate).

[0047] In this specification, CAAC (c-axis aligned crystal ), and CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents an example of a function or material configuration. Represents.

[0048] An example of the crystal structure of an oxide semiconductor or a metal oxide will be described below. n-Ga-Zn oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxide semiconductor film formed by sputtering will be described as an example. Using a get, the substrate temperature is set to 100°C or higher and 130°C or lower, and the sputtering method is used. The oxide semiconductor formed is called sIGZO, and the substrate temperature is set to room temperature using the above target. (RT), and the oxide semiconductor formed by sputtering is called tIGZO. For example, sIGZO can be used in either nc (nano crystal) or CAAC. tIGZO has either one or both of the crystal structures. tIGZO has the nc crystal structure. The room temperature (RT) mentioned here includes the temperature when the substrate is not intentionally heated.

[0049] In this specification and the like, CAC-OS or CAC-metal oxide means Some materials have the function of a conductor, while other materials have the function of a dielectric (or insulator). The material as a whole functions as a semiconductor. When tal oxide is used in the active layer of a transistor, the conductor acts as a carrier. The dielectric has the function of preventing the flow of electrons (or holes), while the dielectric has the function of preventing the flow of electrons that serve as carriers. The function as a conductor and the function as a dielectric are complementary to each other. By doing so, the switching function (On / Off function) can be set to CAC-OS or C It can be attached to AC-metal oxide. CAC-OS or CAC-m By separating the functions of each compound in the acetal oxide, both functions can be maximized. can be increased to the limit.

[0050] In this specification and the like, CAC-OS or CAC-metal oxide is a The conductive region has the function of the conductor described above, and the dielectric region has the function of the dielectric. The region has the above-mentioned dielectric function. Also, in the material, there are conductive regions and dielectric regions. The regions may be separated at the nanoparticle level. The conductive regions may be unevenly distributed in the material. They may be observed connected in a similar manner.

[0051] That is, CAC-OS or CAC-metal oxide is a matrix composite material. (matrix composite), or metal matrix composite It can also be called a matrix composite.

[0052] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and a dielectric region are The conductive regions are each 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. The following sizes may be dispersed in the material:

[0053] (Embodiment 1) In this embodiment, a semiconductor device and a manufacturing method of the semiconductor device according to one embodiment of the present invention will be described. 1 to 23.

[0054] <1-1. Configuration example 1 of semiconductor device> 1A to 1D are cross-sectional views of semiconductor devices 100A, 100B, 100C, and 100D according to an embodiment of the present invention. See FIGS. 1(A)(B) and 2(A)(B). Semiconductor devices 100A, 100B, and 100C , 100D include a transistor Tr1 and a transistor Tr2.

[0055] The transistor Tr1 of the semiconductor device 100A is a top-gate transistor. The transistor Tr2 is a bottom gate transistor. Transistor Tr1 and transistor Tr2 are transistors with a top gate structure. The transistors Tr1 and Tr2 of the device 100C are bottom gate type transistors. The transistor Tr1 of the semiconductor device 100D is a bottom gate transistor. The transistor Tr1 is a top-gate transistor.

[0056] Any of the transistors Tr1, Tr2, Tr3, Tr4, Tr5, Tr6, Tr7, Tr8, Tr9, Tr10, Tr11, Tr12, Tr13, Tr14, Tr15, Tr16, Tr17, Tr18, Tr19 ...2, Tr13, Tr1 Tr2 also has an oxide semiconductor film. This oxide semiconductor film contains In and M (M The metal oxide includes Al, Ga, Y, or Sn) and Zn. As will be explained later, the proportion of crystal parts having c-axis orientation is The oxide semiconductor film of the transistor Tr1 is larger than the oxide semiconductor film of the transistor Tr2. That is, regardless of the shape of the transistor, the semiconductor device of one embodiment of the present invention can be used as a transistor. The oxide semiconductor film of the transistor Tr1 and the oxide semiconductor film of the transistor Tr2 Alternatively, in the semiconductor device of one embodiment of the present invention, the crystallinity of the transistor Tr1 is different. an oxide semiconductor film in which a channel region of the transistor Tr1 is formed and an oxide semiconductor film in which a channel region of the transistor Tr2 is formed; The crystallinity of the oxide semiconductor film is different from that of the oxide semiconductor film.

[0057] The transistor Tr1 of the semiconductor devices 100A and 100B is formed by an insulating film 106 on a substrate 102 and a , an oxide semiconductor film 108 on the insulating film 106, and an insulating film 110 on the oxide semiconductor film 108. , the conductive film 120 on the insulating film 110, the insulating film 106, the oxide semiconductor film 108, the conductive film 12 The oxide semiconductor film 108 overlaps with the conductive film 120. The channel region 108i contacts the insulating film 110, and the source region 108i contacts the insulating film 114. 108s and a drain region 108d in contact with the insulating film 114.

[0058] The transistor Tr1 has an insulating film 116 on the insulating film 114 and an insulating film 114 and an insulating film 116 on the insulating film 114. The oxide semiconductor film 10 is exposed to the source region 108s through an opening provided in the film 116. 8, and a conductive film 112a electrically connected to the insulating film 114 and the insulating film 116. The drain region 108d is electrically connected to the oxide semiconductor film 108 through the opening. the insulating film 116, the conductive film 112a, and the insulating film over the conductive film 112b. 118 and has.

[0059] The transistor Tr2 of the semiconductor device 100A has a conductive film 112b and a conductive film 112b. the insulating film 118 on the oxide semiconductor film 128; the conductive film 122a on the oxide semiconductor film 128, the conductive film 122b on the oxide semiconductor film 128, and the oxide semiconductor film 1 28, the insulating film 124 on the conductive film 122a and the conductive film 122b, and the insulating film 124 The insulating film 126 and the conductive film 130 on the insulating film 126 are the transistors Tr2 and Tr3. In this case, the conductive film 112b and the conductive film 130 can be used as a gate electrode. The conductive film 112b can be used as a back gate electrode.

[0060] The transistor Tr2 of the semiconductor device 100B includes a conductive film 112b and a conductive film 112b. The insulating film 118, the oxide semiconductor film 208 over the insulating film 118, and the oxide semiconductor film 208 The insulating film 210b, the conductive film 212b on the insulating film 210b, the oxide semiconductor film 208, the conductive film 212b, and the insulating film 210b are formed on the insulating film 210b. The insulating film 212b, the insulating film 214 on the insulating film 118, the insulating film 216, the conductive film 218a, That is, the transistor Tr2 has a conductive film 112b and a conductive film 21 In this case, the conductive film 112b can be used as a back gate electrode. It can be said that:

[0061] The transistor Tr1 of the semiconductor devices 100C and 100D is formed by a conductive film 107 on the substrate 102. , an insulating film 117 over the conductive film 107, an oxide semiconductor film 108 over the insulating film 117, and an oxide Conductive films 112a and 112b electrically connected to the semiconductor film 108, and insulating films 118 and 11 9 and has.

[0062] The transistor Tr2 of the semiconductor device 100C has a conductive film 112b and an insulating film on the conductive film 112b. The insulating films 118 and 119, the oxide semiconductor film 128 on the insulating film 119, and the oxide semiconductor film 12 8, the conductive film 122b on the oxide semiconductor film 128, and the insulating film 124. , an insulating film 126 on the insulating film 124, and a conductive film 130 on the insulating film 126. That is, the transistor Tr2 has the conductive film 112b and the conductive film 130 as the gate electrode. In this case, the conductive film 112b can be used as a back gate electrode.

[0063] The transistor Tr2 of the semiconductor device 100D has a conductive film 112b and an insulating film on the conductive film 112b. The insulating films 118 and 119, the oxide semiconductor film 128 on the insulating film 119, and the oxide semiconductor film 12 8, the insulating film 210b on the oxide semiconductor film 128, and the insulating film 210b The transistor Tr2 has an upper conductive film 212b and an insulating film 216. The conductive film 112b and the conductive film 212b can be used as a gate electrode. 112b can be used as a back gate electrode.

[0064] In the semiconductor devices 100C and 100D, the conductive film 122a is formed at the same time as the conductive film 122b. 22c overlaps with the oxide semiconductor film 108 of the transistor Tr1. The transistor Tr1 can use the conductive film 107 and the conductive film 122c as the gate electrode. In this case, the conductive film 122c can be used as a back gate electrode.

[0065] In the semiconductor devices 100A, 100B, 100C, and 100D, the transistor Tr1 has The oxide semiconductor film and the oxide semiconductor film of the transistor Tr2 overlap each other. The transistor Tr1 and the transistor Tr2 are at least partially overlapped with each other. By providing an area where the transistors are arranged, the layout area of ​​the transistors can be reduced. The channel region formed in the oxide semiconductor film of the transistor Tr1 and the It is preferable that the channel region formed in the oxide semiconductor film does not overlap with the insulating film.

[0066] Similar to the semiconductor device 100A, the semiconductor device 100A has a structure including a transistor Tr1 and a transistor Tr2. The semiconductor device 100E is shown in FIG. 3(A). However, the semiconductor device 100E differs from the semiconductor device 100A in the following points: Unlike the semiconductor device 100A, the semiconductor device 100E has an oxide film of the transistor Tr1. The oxide semiconductor film of the transistor Tr2 and the oxide semiconductor film of the transistor Tr3 have an overlapping region. However, a part of the conductive film 112b is formed on the oxide semiconductor of the transistor Tr2. The conductive film 112b has an area where it overlaps with the conductive film 122a. The semiconductor device 100B has a transistor Tr1 and a transistor Tr2. The transistors Tr1 and Tr2 of the semiconductor device 100F are The same applies to the semiconductor devices 100C and 100D (see FIG. 3B). In the transistor Tr1, the oxide semiconductor film of the transistor Tr2 is The oxide semiconductor film and the oxide semiconductor film may have no overlapping regions. Even with such an arrangement, considering the limit to which the line width can be made fine by exposure, the distance between the wiring on a plane is This has the effect of reducing the area required for transistor placement compared to when the distance is ensured.

[0067] In the semiconductor devices 100A and 100B, the insulating film 116, the insulating film 118, the semiconductor device In 100C and 100D, the insulating film 117, the insulating film 118, and the insulating film 119 are permeable to hydrogen. If the substrate 102 is made of a material that easily releases hydrogen, the water The amount of element diffusion into the oxide semiconductor film of the transistor Tr1 is smaller than that of the transistor T The amount of r2 in the oxide semiconductor film can be made smaller. The threshold voltage of transistor Tr2 is more likely to fluctuate due to hydrogen diffusion than that of transistor Tr1. A transistor can also be used.

[0068] FIG. 4A is a top view of a semiconductor device 100A according to one embodiment of the present invention, and FIG. 4A. The cross-sectional view of the body device 100A taken along the dashed line A1-A2 in FIG. FIG. 4B shows a cross section of the transistor Tr1 in the channel length (L) direction, The figure includes a cross section of the transistor Tr2 in the channel length (L) direction.

[0069] In addition, in FIG. 4(A), in order to avoid complication, the components of the semiconductor device 100A are shown. Some of the elements (such as the insulating film that functions as the gate insulating film) and some of the reference numerals of the components are omitted. In the top view of the semiconductor device, the same as in FIG. 4(A) is also used in the subsequent drawings. ), some of the components and some of the reference numerals of the components may be omitted in the illustration.

[0070] Semiconductor devices 100B, 100C, 100D, and 100E having different structures from the semiconductor device 100A The semiconductor device 100F can also be arranged as shown in FIG. 4(A) in the same manner as the semiconductor device 100A. do.

[0071] In one embodiment of the present invention, the transistor Tr1 and the transistor Tr2 are each a field-effect transistor. The field-effect mobility in the saturated region in Id-Vg measurement is The transistor Tr2 is higher than the transistor Tr1. The oxide semiconductor film of the transistor Tr1 is formed at a temperature higher than that of the transistor Tr2. The temperature at which the oxide semiconductor film is formed is higher than that of the transistor Tr2. The minimum and maximum values ​​of field-effect mobility in the saturated region in Id-Vg measurements The difference from the maximum value is 15cm 2 It is desirable that the value is within / Vs.

[0072] In one aspect of the present invention, semiconductor devices 100A, 100B, 100C, 100D, 100E, In both the 100F and 100F structures, the field effect mobility in the saturation region of the transistor Tr2 is That is, one embodiment of the present invention is a semiconductor device 100 The structure may be any of 100A, 100B, 100C, and 100D. The oxide semiconductor film of the transistor Tr1 and the oxide semiconductor film of the transistor Tr2 However, as the structure of the semiconductor device 100E or 100F, which does not have overlapping regions, is also good.

[0073] The channel region of the transistor Tr1 and the channel region of the transistor Tr2 overlap each other. When one of the transistors is operating, it may affect the other. To avoid this effect, a gap between the transistor Tr1 and the transistor Tr2 is A structure in which the distance between the transistors Tr1 and Tr2 is increased, or a conductive film is provided between the transistors Tr1 and Tr2. However, in the former case, the semiconductor device becomes thicker. Therefore, for example, when the semiconductor device 100A is formed on a flexible substrate, bending property is an issue. In the latter case, the number of steps for forming the conductive film increases, and in the former case, As in the case of the configuration of (1), the semiconductor device becomes thicker, which can cause problems.

[0074] The oxide semiconductor film 108 and the oxide semiconductor film 128 each have an In atomic ratio of M. By having a region that is larger than the atomic ratio, the electric potential of the transistor Tr1 and the transistor Tr2 The field effect mobility can be increased in both cases.

[0075] For example, the above-mentioned transistor having high field effect mobility may be used as a gate electrode for generating a gate signal of a display device. By using it in a gate driver that configures the display, it is possible to provide a display device with a narrow frame width (also called a narrow frame). Furthermore, a display device including the above-described transistor having high field-effect mobility can be The source driver (especially the shift register that the source driver has) supplies signals from the signal lines. By using it in a device such as a demultiplexer connected to the output terminal of a display device, In addition, it is possible to provide a display device in which the number of wirings required is small. The high-performance transistor is used as a selection transistor and a driving transistor of a pixel circuit of a display device. By using either one or both of the sensors, a display device with high display quality can be provided. can.

[0076] The semiconductor device 100A shown in FIGS. 4(A) and 4(B) is suitable for use in a pixel circuit of a display device. By using the arrangement shown in FIGS. 4(A) and 4(B), the pixel density of the display device can be increased. For example, if the pixel density of a display device is 1000 ppi (pixel per inch), or the pixel density of the display device exceeds 2000 ppi Even in this case, the aperture ratio of the pixel can be increased by using the arrangement shown in Figures 4(A) and 4(B). The unit of measurement for pixels per inch is ppi.

[0077] Hereinafter, the structure of the semiconductor device 100A will be taken as an example, and the oxide semiconductor film 108 and the oxide semiconductor film 1 28 and 29. In particular, in the saturation region of the Id-Vg measurement of a transistor, The field effect mobility will be explained.

[0078] <1-2 Field-effect mobility in the saturation region> First, the general characteristics of a transistor will be described with reference to FIGS.

[0079] [Transistor Id-Vg characteristics] This section explains the drain current-gate voltage characteristics (Id-Vg characteristics) of a transistor. 5(A) is a diagram illustrating an example of the Id-Vg characteristics of a transistor. For ease of understanding, polycrystalline silicon is used for the active layer of the transistor. In FIG. 5(A), the vertical axis represents Id and the horizontal axis represents Vg. vinegar.

[0080] As shown in Figure 5(A), the Id-Vg characteristics can be roughly divided into three regions. The first region is the OFF region, and the second region is the subthreshold region. The third region is the ON region (ON The boundary between the subthreshold region and the on-region is called the The gate voltage at this field is called the threshold voltage (Vth).

[0081] The characteristics of a transistor are the drain current in the off region (also called the off current or Ioff). It is desirable that the drain current (also called the on-current or Ion) in the on region is high. In addition, the on-state current of a transistor is often measured using field-effect mobility as an index. The field-effect mobility will be described in detail later.

[0082] In addition, to operate the transistor at a low voltage, the Id It is desirable that the slope of the -Vg characteristic is steep. Id-Vg characteristics in the subthreshold region As an index showing the magnitude of change in The S value is expressed by the following formula (1):

[0083]

number

[0084] The S value is the gate capacitance required to change the drain current by one order of magnitude in the subthreshold region. The smaller the S value, the faster the on / off switching operation. It can be done steeply.

[0085] [Transistor Id-Vd characteristics] Next, we will explain the drain current-drain voltage characteristics (Id-Vd characteristics) of a transistor. FIG. 5B is a graph illustrating an example of the Id-Vd characteristics of a transistor. In FIG. 5(B), the vertical axis represents Id and the horizontal axis represents Vd.

[0086] As shown in Fig. 5(B), the on-region is further divided into two regions. The first region is referred to as the linear region and the second region as the saturation region. In the linear region, the drain current increases parabolically as the drain voltage increases. On the other hand, in the saturation region, the drain current does not change significantly even when the drain voltage changes. Note that, analogous to a vacuum tube, the linear region may sometimes be referred to as the triode region and the saturation region as the pentode region. Also, the linear region may refer to a state where Vg is large with respect to Vd (Vd < Vg).

[0087] Also, the saturation region may refer to a state where Vd is large with respect to Vg (Vg < Vd). However, in reality, it is necessary to consider the threshold voltage of the transistor. Therefore, a state where the value obtained by subtracting the threshold voltage of the transistor is large with respect to Vd (Vd < Vg - Vth) may be regarded as the linear region. Similarly, a state where the value obtained by subtracting the threshold voltage of the transistor is small with respect to Vd (Vg - Vth < Vd) may be regarded as the saturation region.

[0088] In the Id - Vd characteristics of a transistor, a characteristic where the current in the saturation region is constant may be expressed as " good saturation." The goodness of the saturation of a transistor is particularly important in applications to organic EL displays. For example, by using a transistor with good saturation as the transistor of a pixel of an organic EL display, it is possible to suppress changes in the brightness of the pixel even when the drain voltage changes.

[0089] [Analysis Model of Drain Current] ​​​​Next, an analytical model of the drain current will be explained. The analytical formula for the drain current based on the gradual channel approximation (GCA) is known. Based on GCA, the drain current of a transistor is expressed by the following equation (2): .

[0090]

number

[0091] In equation (2), the upper part is the drain current equation in the linear region, and the lower part is the drain current equation in the saturation region. This is the equation for the drain current in

[0092] [Field-effect mobility] Next, the field-effect mobility will be explained. As mentioned above, the on-region of a transistor is divided into the linear region and the saturation region. Based on the characteristics of each region, the analytical formula for the drain current based on GCA is When it is necessary to distinguish between , and linear mobility, saturation mobility, respectively. The linear mobility is expressed by the following equation (3), and is The sum mobility is expressed by the following equation (4).

[0093]

number

[0094]

number

[0095] In this specification, the curve calculated from Equation (3) and Equation (4) is referred to as a mobility curve. Figure 6 shows the mobility curve calculated from the analytical formula for the drain current based on GCA. Figure 6 shows the linear mobility and saturation mobility shifts with respect to the Id-Vg characteristics of the transistor. The degree curves are shown superimposed on each other.

[0096] In Fig. 6, the Id-Vg characteristics are calculated from the analytical formula for the drain current based on GCA. The shape of the mobility curve provides clues to understanding what is happening inside the transistor.

[0097] For example, let us look at the shape of the saturation mobility shown in Figure 6. As the gate voltage increases, the electron holes are accelerated by the electric field and gain energy. However, the carriers gain a certain velocity due to the electric field, so the saturation mobility increases. The rear is not infinitely accelerated by the electric field, but is thermally vibrating lattice atoms or ions. The saturated mobility gradually decreases because the electrons lose energy by colliding with ionized impurity atoms. decreases to.

[0098] [Transistor fabrication] Next, a transistor including an oxide semiconductor film is manufactured, and the electrical characteristics of the transistor are evaluated. It was worth it.

[0099] The transistor shown in FIG. 7 includes a conductive film 107 on a substrate 102 and an insulating film 1 104, an oxide semiconductor film 108 on the insulating film 104, and an insulating film 108 on the oxide semiconductor film 108. 10, a conductive film 112 over the insulating film 110, an insulating film 104, an oxide semiconductor film 108, and and an insulating film 116 over the conductive film 112. Note that the oxide semiconductor film 108 is 12, a source region 108s in contact with the insulating film 116, and and a drain region 108d in contact with the insulating film 116.

[0100] In this embodiment, the following samples A1 to A2 are used in the transistor configuration shown in FIG. A3 was created.

[0101] Each of the samples A1 to A3 has a channel length L of 2 μm and a channel width W of 3 μm. The samples A1 and A2 are samples with transistors of 1000 Ω. Sample A3 is a sample in which a transistor of one embodiment of the present invention is formed. Note that Samples A1 to A3 were prepared by changing the deposition conditions of the oxide semiconductor films. The other steps were the same as in the previous example.

[0102] [Method for preparing samples A1 to A3] First, a titanium film with a thickness of 10 nm and a copper film with a thickness of 100 nm were deposited on a glass substrate by sputtering. The conductive film was then processed by photolithography. .

[0103] Next, four insulating layers were formed on the substrate and the conductive film. The insulating film was formed in a vacuum using a deposition (PECVD) system. 0nm thick silicon nitride film, 300nm thick silicon nitride film, 50nm thick silicon nitride film A silicon nitride film having a thickness of 50 nm and a silicon oxynitride film having a thickness of 50 nm were used.

[0104] Next, an oxide semiconductor film is formed over the insulating film and processed into an island shape. The oxide semiconductor film 108 was formed using a 40-nm-thick oxide semiconductor film. Note that the oxide semiconductor films were formed under different conditions in Samples A1 to A3. become.

[0105] The oxide semiconductor film of Sample A1 was grown under argon at a flow rate of 140 sccm at a substrate temperature of 170°C. A nitrogen gas and an oxygen gas with a flow rate of 60 sccm were introduced into the chamber of the sputtering device. The pressure was 0.6 Pa, and a metal oxide target containing indium, gallium, and zinc was used. A 2.5 kW AC power was applied to the ZnO (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxygen flow rate is determined based on the percentage of oxygen in the entire deposition gas. The oxygen flow rate ratio during film formation of Sample A1 was 30%.

[0106] The oxide semiconductor film of Sample A2 was grown under argon gas at a flow rate of 180 sccm at a substrate temperature of 130°C. A nitrogen gas and an oxygen gas with a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The pressure was 0.6 Pa, and a metal oxide target containing indium, gallium, and zinc was used. A 2.5 kW AC power was applied to the ZnO (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxygen flow rate ratio during film formation of sample A2 was 10%.

[0107] The metal oxide film used for the oxide semiconductor film of Sample A3 was prepared under the same conditions as those of Sample A6. That is, the substrate temperature is set to room temperature (RT), and the flow rate of argon gas is 180 sccm. 20 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 The target is a metal oxide target containing indium, gallium, and zinc (In:G A:Zn=4:2:4.1 [atomic ratio]) was applied with 2.5kW AC power. The oxygen flow rate ratio during film formation of sample A3 was 10%.

[0108] Next, an insulating film was formed over the insulating film and the oxide semiconductor layer. A silicon oxynitride film with a thickness of nm was formed using a PECVD apparatus.

[0109] Next, a heat treatment was carried out. The heat treatment was carried out in a mixed gas atmosphere of nitrogen and oxygen for 35 The heat treatment was carried out at 0°C for 1 hour.

[0110] Next, openings were formed in desired areas of the insulating film. The Ching method was used.

[0111] Next, an oxide semiconductor film having a thickness of 100 nm is formed on the insulating film so as to cover the opening. The conductive film was formed by processing the compound semiconductor film into an island shape. Then, the insulating film in contact with the lower side of the conductive film was processed to form an insulating film.

[0112] The conductive film is a 10-nm-thick oxide semiconductor film, a 50-nm-thick titanium nitride film, and a 10-nm-thick titanium nitride film. The oxide semiconductor film was formed on a substrate under the conditions of: The temperature was set to 170°C, and oxygen gas was introduced into the chamber of the sputtering device at a flow rate of 200 sccm. The pressure was set to 0.6 Pa, and a metal containing indium, gallium, and zinc was introduced into the furnace. The oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) was heated with 2.5 kW. The titanium nitride film and the copper film were formed by applying AC power. The film was formed using a magnetron sputtering device.

[0113] Next, plasma treatment was performed on the oxide semiconductor film, the insulating film, and the conductive film. The treatment was carried out using a PECVD device, with the substrate temperature set at 220°C and argon gas and nitrogen gas. The experiment was carried out under a mixed gas atmosphere of HCl.

[0114] Next, an insulating film was formed over the oxide semiconductor film, the insulating film, and the conductive film. A silicon nitride film having a thickness of 100 nm and a silicon oxynitride film having a thickness of 300 nm were deposited by PECVD. The film was formed by lamination using a device.

[0115] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. Ta.

[0116] Next, a conductive film is formed to fill the opening, and the conductive film is processed into an island shape. A conductive film having a thickness of 10 nm was formed as a source electrode and a drain electrode. A titanium film and a copper film of 100 nm in thickness were formed using a sputtering device. did.

[0117] Next, an insulating film was formed on the insulating film and the conductive film. A acrylic photosensitive resin was used.

[0118] In this manner, samples A1 to A3 were prepared.

[0119] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistors of Samples A1 to A3 fabricated as described above were measured. The Id-Vg characteristics of the transistor were measured under the following conditions: a voltage (hereinafter also referred to as gate voltage (Vg)) applied to the conductive film, and a second gate voltage The voltage (also called Vbg) applied to the conductive film acting as the electrode is set to -10V to +10V The voltage was applied to the conductive film acting as the source electrode in steps of 0.25 V. The voltage applied to the drain electrode (hereinafter referred to as the source voltage (Vs)) is set to 0V (comm). The voltage applied to the conductive film (hereinafter referred to as drain voltage (Vd)) is set to 0.1 V and 20V.

[0120] Figures 8(A), (B), and (C) show the Id-Vg characteristics of samples A1, A2, and A3. In Fig. 8(A), (B), and (C), the first vertical axis represents Id(A), and the second vertical axis represents Id(A). The vertical axis is the field-effect mobility (μFE(cm 2 / Vs)) and the horizontal axis represents Vg (V). The field-effect mobility is the value measured at Vd of 20V.

[0121] As shown in Figures 8(A), (B), and (C), the transistor In particular, the field-effect transition of the transistor Differences can be seen in the shape of the mobility curves.

[0122] From the shapes of the mobility curves of Samples A1 to A3 shown in FIGS. 8(A), 8(B), and 8(C), it is clear that the transistor The minimum and maximum values ​​of the field-effect mobility in the saturated region of the The results were calculated. Note that the saturation region of the transistor is defined as the region where Vg is 3V or more. This range is often used for displays and other applications. This is the gate voltage.

[0123] In sample A1, the minimum value of the field effect mobility in the saturation region of the transistor is 9.8 cm 2 / Vs, with a maximum value of 28.3 cm 2 / Vs. The minimum value of the field-effect mobility and the maximum value of the field-effect mobility in the saturation region of the transistor The difference is 18.5cm 2 In sample A2, the saturation region of the transistor was The minimum field-effect mobility in the region is 23.3 cm 2 / Vs, with a maximum value of 51.1 cm 2 / Vs. That is, the field effect in the saturation region of the transistor of sample A2 The difference between the minimum and maximum field-effect mobility is 27.8 cm 2 / Vs. In addition, in sample A3, the minimum value of the field-effect mobility in the saturation region of the transistor is 55.8cm 2 / Vs, and the maximum value is 67.0 cm 2 / Vs. The minimum value of the field-effect mobility in the saturation region of the A3 transistor and the field-effect mobility The difference from the maximum value is 11.2 cm 2 / Vs.

[0124] In other words, the minimum value of the field-effect mobility in the saturation region of the transistor in the sample A1 is The field-effect mobility of sample A2 is approximately 65.3% lower than the maximum value. The minimum value of the field-effect mobility in the saturated region of Sample A3 also exhibits the lowest field-effect mobility in the saturation region of the transistor, which is 4.4% lower. The minimum value is approximately 16.7% lower than the maximum value of the field-effect mobility. The sample A3 in which the transistor of the embodiment is formed has a field effect in the saturation region of the transistor. The minimum value of the mobility is preferably 30% or less, more preferably 30% or less, of the maximum value of the field-effect mobility. or 20% or less.

[0125] As described above, Sample A3 in which the transistor of one embodiment of the present invention was formed had a high saturation point of the transistor. The difference between the minimum and maximum field-effect mobility in the sum region is 15 cm 2 / Vs, which is an extremely low characteristic. The transistors with such characteristics have high field-effect mobility in the region of 5V or less. For example, by using a transistor as a pixel transistor in an organic EL display, This provides flow driving capability and high reliability.

[0126] <1-3. Pixel circuits of display devices> An example of applying the semiconductor device 100A shown in FIGS. 4A and 4B to a pixel circuit of a display device This will be explained with reference to FIG.

[0127] FIG. 9 is a circuit diagram showing an example in which the semiconductor device 100A is applied to a pixel circuit of a display device. This is a road map.

[0128] The semiconductor device 100A shown in FIG. 9 includes a transistor Tr1, a transistor Tr2, and a capacitor The semiconductor device 100 includes an element Cs1 and a light-emitting element 160. The semiconductor device 100A has two adjacent pixels (or sub-pixels) in the column direction. The capacitance element Cs1 functions as one of the capacitance elements shown in FIG. Although not shown, for example, the capacitance between the conductive film 120 and the conductive film 122a or the conductive It can be formed by using the capacitance between the film 112b and the conductive film 122a. Transistor Tr1 is also called a selection transistor. Transistor Tr2 is called a drive transistor. The transistor Tr2 mainly operates in the saturation region.

[0129] In the circuit diagram shown in FIG. 9, the data line DL_ Y-1, a data line DL_Y for writing a data signal to an adjacent pixel, and a light emitting element The anode line ANODE_X-1 supplies a potential to the adjacent light emitting element. A node line ANODE_X and a scan line GL_X that supplies a scan signal to the pixel are shown. do.

[0130] One of the source electrode and the drain electrode of the transistor Tr1 is connected to the data line DL_Y-1. Furthermore, the first gate electrode and the second gate electrode of the transistor Tr1 are electrically connected to each other. The electrode is electrically connected to the scanning line GL_X. The transistor Tr1 is It has the function of controlling the writing of data.

[0131] One of the pair of electrodes of the capacitance element Cs1 is connected to the source electrode and drain electrode of the transistor Tr1. The other of the pair of electrodes of the capacitance element Cs1 is electrically connected to the transistor. It is electrically connected to the second gate electrode (also called the back gate electrode) of the transistor Tr2. The capacitor Cs1 functions as a storage capacitor that stores written data.

[0132] One of the source electrode and drain electrode of the transistor Tr2 is connected to the anode line ANODE_X -1.

[0133] One of the pair of electrodes of the light emitting element 160 is connected to the source electrode and drain electrode of the transistor Tr2. The other end is electrically connected to the cathode wire CATHODE. One of the pair of electrodes of the light emitting element 160 is connected to the other of the pair of electrodes of the capacitance element Cs1. are electrically connected.

[0134] When the semiconductor device 100A shown in FIG. 4(A)(B) is applied to the pixel of a display device, This is an example of a case.

[0135] <1-4. Configuration of semiconductor device> The semiconductor device 100A shown in FIGS. 4(A) and 4(B) will be described again. When the semiconductor device 100A is applied to a pixel of a display device, for example, The length (L) and channel width (W), or the line width of the wiring and electrodes connected to the transistor For example, the transistors Tr1 and Tr 2 on the same plane, as shown in Figure 4(A)(B), By arranging the transistor Tr1 and the transistor Tr2 to overlap at least a part of each other, the line width, etc. can be increased, which makes it possible to reduce variations in processing dimensions.

[0136] In addition, the transistor Tr1 and the transistor Tr2 have one conductive film and one insulating film. Since either one or both can be used in common, the number of masks or the number of processes can be reduced. It is possible to do this.

[0137] For example, in the transistor Tr1, the conductive film 120 functions as a gate electrode, and the conductive film The conductive film 112a functions as a source electrode, and the conductive film 112b functions as a drain electrode. In addition, in the transistor Tr1, the insulating film 110 functions as a gate insulating film. In the transistor Tr2, the conductive film 112b functions as a first gate electrode, and the conductive film The conductive film 122a functions as a source electrode, the conductive film 122b functions as a drain electrode, and the conductive The film 130 functions as a second gate electrode. The film 118 functions as a first gate insulating film, and the insulating films 124 and 126 function as second gate insulating films. It acts as a membrane.

[0138] In this specification and the like, the insulating film 110 is referred to as a first insulating film, and the insulating film 118 is referred to as a second insulating film. The insulating films 124 and 126 may be referred to as a third insulating film.

[0139] An insulating film 134 is provided on the conductive film 130, and an insulating film 136 is provided on the insulating film 134. In addition, an opening 184 reaching the conductive film 130 is provided in the insulating films 134 and 136. In addition, a conductive film 138 is provided over the insulating film 136. It is connected to the conductive film 130 via the opening 184 .

[0140] Moreover, an insulating film 140, an EL layer 142, and a conductive film 144 are provided on the conductive film 138. The insulating film 140 covers a part of the side edge of the conductive film 138 and prevents the conductive film 138 from being broken between adjacent pixels. The EL layer 142 has a function of emitting light. The conductive film 138, the EL layer 142, and the conductive film 144 constitute a light-emitting element 160. The conductive film 138 functions as one electrode of the light-emitting element 160, and the conductive film 144 functions as one electrode of the light-emitting element 160. It functions as the other electrode of the light emitting element 160 .

[0141] As described above, in one embodiment of the present invention, a top-gate transistor and a bottom-gate transistor are A GaN-type transistor can be used in combination with a GaN-type transistor.

[0142] As described above, the semiconductor device of one embodiment of the present invention has a stacked structure including a plurality of transistors. The area of ​​the transistor is reduced. By using either one or both of the conductive films in common, the number of masks or processes can be reduced. It is possible.

[0143] <1-5. Gate electrode configuration> As shown in FIGS. 4A and 4B, the transistor Tr2 has two gate electrodes. It is a composition.

[0144] Here, the effect of the structure having two gate electrodes will be explained with reference to FIGS. 4(A) and 4(B) and FIG. 10. This will be used to explain.

[0145] 10 corresponds to a cross-sectional view of the cut surface taken along the dashed line B1-B2 shown in FIG. 4(A). 10 also includes a cross section of the transistor Tr2 in the channel width (W) direction.

[0146] As shown in FIG. 10, the oxide semiconductor film 128 is opposite to the conductive film 112b and the conductive film 130. The gate electrodes are sandwiched between two conductive films that function as gate electrodes. The lengths of the oxide semiconductor film 128 and the conductive film 130 in the channel width direction are The length of the oxide semiconductor film 128 is longer than the length in the channel width direction, and the entire oxide semiconductor film 128 is , 126 and are covered by the conductive film 112b and the conductive film 130.

[0147] In other words, the conductive film 112b and the conductive film 130 are formed closer to the oxide semiconductor film 128 than the side edges of the oxide semiconductor film 128. It has an outer region.

[0148] With this configuration, the oxide semiconductor film 128 included in the transistor Tr2 is The transistor can be electrically surrounded by the electric field of the conductive film 112b and the conductive film 130. As in the case of transistor Tr2, the electric field of the first gate electrode and the second gate electrode causes the channel region The device structure of the transistor that electrically surrounds the oxide semiconductor film where the region is formed is called Surr This can be called a surrounded channel (S-channel) structure.

[0149] Since the transistor Tr2 has an S-channel structure, The functioning conductive film 112b effectively applies an electric field to induce a channel to the oxide semiconductor. This allows the voltage to be applied to the body film 128, improving the current driving capability of the transistor Tr2. It is possible to obtain high on-current characteristics. It is also possible to increase the on-current. Therefore, it is possible to miniaturize the transistor Tr2. The oxide semiconductor film 128 functions as a first gate electrode and a second gate electrode. Since the structure is surrounded by the conductive film 130 that functions as a base electrode, the mechanical strength is It can be increased.

[0150] Note that the transistor Tr2 shown in FIG. 4B has a conductive film 130 is a conductive film 12 which functions as a source electrode or a drain electrode of the transistor Tr2. 2a, but is not limited to this. In this case, the insulating film 11 may be formed on the first gate electrode and the second gate electrode. By providing openings in the conductive film 18, 124, and 126, the conductive film 11 functions as a second gate electrode. The conductive film 30 is electrically connected to the conductive film 112b that functions as the first gate electrode in the opening. Therefore, the conductive film 112b and the conductive film 130 are applied with the same potential.

[0151] At this time, although the capacitance element Cs1 is not shown in FIG. 10, for example, a conductive film The capacitance between the film formed simultaneously with the conductive film 112b and the film formed simultaneously with the conductive film 122a is On the other hand, the parasitic capacitance of the transistor Tr2 can be formed by using the conductive film 112b. and the oxide semiconductor film 128, and between the conductive film 130 and the oxide semiconductor film 128. The total is calculated.

[0152] When the storage capacitance of the capacitor Cs1 is small, the gate voltage of the transistor Tr2 is The parasitic capacitance of the transistor Tr2 causes a large fluctuation. The capacitance element Cs1 is used to reduce the layout area of ​​the transistor. If it is difficult to increase the storage capacitance of the transistor Tr2, the parasitic capacitance of the transistor Tr3 can be reduced. This is effective for stabilizing the gate voltage value of the transistor Tr2. Although the thickness of the insulating film 126 may be increased, the ON current of the transistor Tr2 will be reduced.

[0153] The transistor Tr2 is driven mainly in the saturation region. In comparison, FIG. 8(C) is the largest, followed by FIG. 8(B), and FIG. 8(A) is the smallest. When trying to obtain a certain on-current in the saturation region, The oxide semiconductor film shown in FIG. 8A has a higher insulating property than the oxide semiconductor film shown in FIG. The thickness of the film 126 can be increased.

[0154] That is, in one embodiment of the present invention, the transistor Tr2 has the structure shown in FIG. 8B or FIG. By using an oxide semiconductor film having such a structure, the storage capacitance of the capacitor Cs1 can be reduced. This allows the installation area of ​​the transistor to be reduced.

[0155] <1-6. Components of semiconductor device> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0156] <Substrate> There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. It must be heat resistant. For example, glass substrates, ceramic substrates, quartz substrates, and surface treatment substrates are A fiber substrate or the like may be used as the substrate 102. Also, silicon or silicon carbide may be used as the material. A single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, etc. It is also possible to apply a substrate, an SOI substrate, etc., on which a semiconductor element is provided. The substrate 102 may be a glass substrate. In this case, the 6th generation (1500mm x 1850mm) and 7th generation (1870mm x 2200 mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800 By using large area substrates such as 10th generation (2950mm x 3400mm), It is possible to fabricate a display device of this type.

[0157] In addition, a flexible substrate is used as the substrate 102, and the semiconductor device 100A is directly mounted on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the semiconductor device 100A. The release layer is used to separate the semiconductor device from the substrate 102 after a part or all of the semiconductor device is completed thereon. The semiconductor device 100A can be removed and transferred to another substrate. It can also be transferred to less rigid or flexible substrates.

[0158] <Conductive film> Conductive film 112a, conductive film 112b, conductive film 120, conductive film 122a, conductive film 122b, conductive film The conductive film 130, the conductive film 138, and the conductive film 144 may be made of chromium (Cr), copper (Cu), Aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), Tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel (Ni), iron (Fe), cobalt (Co), or the above-mentioned metal elements The alloys are formed by using alloys containing the above-mentioned metal elements or alloys combining the above-mentioned metal elements. It is possible.

[0159] In addition, the conductive film 112a, the conductive film 112b, the conductive film 120, the conductive film 122a, and the conductive film 122 b. The conductive film 130, the conductive film 138, and the conductive film 144 are formed using an oxide film containing indium and tin. oxides containing tungsten and indium; oxides containing tungsten, indium, and zinc; oxides containing titanium and indium; oxides containing titanium, indium, and tin; oxides containing indium and zinc; oxides containing silicon, indium, and tin; Applying oxide conductors such as oxides and oxides containing indium, gallium, and zinc It is also possible.

[0160] In particular, the conductive film 120 and the conductive film 130 can be preferably made of the above-mentioned oxide conductor. Here, the oxide conductor will be explained. It may also be called OC (Oxide Conductor). Examples of oxide conductors include For example, when oxygen vacancies are formed in an oxide semiconductor and hydrogen is added to the oxygen vacancies, A donor level is formed, and as a result, the conductivity of the oxide semiconductor increases and the oxide semiconductor becomes a conductor. An oxide semiconductor that has been made conductive can be called an oxide conductor. The oxide has a large energy gap and is therefore transparent to visible light. The conductor is an oxide semiconductor that has a donor level near the conduction band. The influence of absorption due to donor levels is small in semiconductors, and they exhibit the same level of absorption as oxide semiconductors for visible light. It has translucency.

[0161] In addition, the conductive film 112a, the conductive film 112b, the conductive film 122a, the conductive film 122b, and the conductive film 13 The conductive film 138 and the conductive film 144 are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be used. This can be processed using a wet etching process, which makes it possible to reduce manufacturing costs. become.

[0162] In particular, the conductive film 112a, the conductive film 112b, the conductive film 122a, the conductive film 122b, and the conductive film The above-mentioned Cu-X alloy film can be suitably used for one or more of 130. As the Cu-X alloy film, a Cu-Mn alloy film is particularly preferable.

[0163] In addition, the conductive film 112a, the conductive film 112b, the conductive film 120, the conductive film 122a, and the conductive film 122 b and the conductive film 130 may contain, among the above-mentioned metal elements, particularly a aluminum, copper, titanium, tungsten, tantalum, and molybdenum. It is preferable to have one or more of these.

[0164] In addition, the conductive film 112a, the conductive film 112b, the conductive film 120, the conductive film 122a, and the conductive film 122 b and the conductive film 130 may contain a so-called nitride, which contains nitrogen and tantalum. It is preferable to use a tantalum film. The tantalum nitride film is electrically conductive and can be easily mixed with copper or The tantalum nitride film has high barrier properties against hydrogen. Since the emission of oxygen is small, the metal film in contact with the oxide semiconductor film 108 or the oxide semiconductor film 1 It can be most suitably used as a metal film in the vicinity of 08.

[0165] <Insulating film> Insulating film 106, insulating film 114, insulating film 116, insulating film 118, insulating film 124, insulating film 12 6, the insulating film 134, the insulating film 136, and the insulating film 140 may be a silicon oxide film, a nitride oxide film, or the like. silicon nitride film, silicon oxide nitride film, silicon nitride film, aluminum oxide film, hafnium oxide film um film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, One or more of magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film Insulating layers containing the above-mentioned metals can be used.

[0166] The insulating film 106 also functions as a blocking film that suppresses oxygen permeation. For example, the insulating film 114, the insulating film 116, the oxide semiconductor film 108, the oxide semiconductor film 128, the insulating film 116, the oxide semiconductor film 108, the oxide semiconductor film 128, the insulating film 116, the insulating film 114, the insulating film 116 ... When one or more of the insulating film 124 and the insulating film 126 has an excess oxygen region, In this case, the insulating film 106 can suppress oxygen permeation.

[0167] Note that the oxide semiconductor film 108 and / or the oxide semiconductor film 128 may be in contact with the The insulating film to be used is preferably an oxide insulating film, and the oxide is preferably in excess of the stoichiometric composition. It is more preferable that the carbon nanotube has a region containing oxygen (excess oxygen region). The oxide insulating film having a region is an insulating film capable of releasing oxygen.

[0168] Note that the oxide insulating film having the above-described excess oxygen region may be, for example, an insulating film that can be formed in an oxygen atmosphere. forming an insulating film, subjecting the formed insulating film to heat treatment in an oxygen atmosphere, or The method for adding oxygen to the insulating film after film formation is as follows. In this case, plasma treatment is preferred.

[0169] Also, an insulating film that functions as a gate insulating film for the transistor Tr1 and the transistor Tr2 Hafnium oxide may be used for the insulating film that functions as a gate insulating film. When using um, the following effects are achieved.

[0170] Hafnium oxide has a higher dielectric constant than silicon oxide and silicon oxynitride. Therefore, compared with the case of using silicon oxide, the thickness of the insulating film can be made larger, and therefore the tunnel current In other words, a transistor with a small off-state current can be produced. Furthermore, hafnium oxide, which has a crystalline structure, can be used to form an amorphous structure. It has a higher dielectric constant than hafnium oxide, which has a low off-state current. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include a monoclinic system and a cubic system. are not limited to these.

[0171] Also, an insulating film that functions as a gate insulating film for the transistor Tr1 and the transistor Tr2 Silicon nitride may be used for the insulating film that functions as a gate insulating film. When silicon nitride is used, the following effects are achieved: The thickness of the insulating film is large to obtain the same capacitance as silicon oxide. Therefore, the breakdown voltage of the transistor Tr1 and the transistor Tr2 By suppressing the decrease in the Electrostatic damage to r2 can be suppressed.

[0172] The insulating films 110, 116, 118, 124, and 126 are formed by the oxide semiconductor film 108 or The oxide semiconductor film 128 has a function of supplying oxygen to one or both of the oxide semiconductor films 128. That is, the insulating films 110, 116, 118, 124, and 126 contain oxygen. The insulating film 110 is made of a material that can transmit oxygen. The conductive film 120 is formed on the oxide semiconductor film 108. The insulating film 124 also functions as a gate insulating film for the oxide semiconductor when the insulating film 126 is formed later. It also functions as a film for mitigating damage to the film 128 .

[0173] The insulating films 110 and 124 have a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or less. Silicon oxide, silicon oxynitride, etc. having a thickness of 50 nm or less can be used.

[0174] Furthermore, it is preferable that the insulating films 110 and 124 have a small number of defects. The signal at g = 2.001 originating from the silicon dangling bond is The density is 3×10 17 spins / cm 3 This is because the insulating film 1 If the density of defects in the insulating film 114 and 124 is high, oxygen will bond to the defects, The amount of oxygen that passes through the membrane decreases.

[0175] The insulating films 110 and 124 are made of oxide insulating films with low density of states caused by nitrogen oxides. Note that the density of states due to the nitrogen oxide can be reduced by forming an oxide semiconductor. The energy of the upper edge of the valence band of the film (Ev_os) and the energy of the lower edge of the conduction band of the oxide semiconductor film The oxide insulating film may be formed between the energy (Ec_os). Silicon oxynitride film with low nitrogen oxide release rate or silicon oxynitride film with low nitrogen oxide release rate An aluminum film or the like can be used.

[0176] The silicon oxynitride film, which emits a small amount of nitrogen oxide, was analyzed by thermal desorption spectroscopy (TDS). ) is a membrane that releases more ammonia than nitrogen oxides, and is typically Ammonia emission is 1×10 18 cm -3 5x10 or more 19 cm -3 The following is the case. The amount of ammonia released above is the same as that when the temperature of the heat treatment in TDS is between 50℃ and 650℃. or the total amount in the range of 50°C to 550°C. The amount is the total amount converted to ammonia molecules in TDS.

[0177] Nitrogen oxides (NO x , x is more than 0 and not more than 2, preferably 1 or more and not more than 2), typically N O2 or NO forms a level in the insulating films 110, 124, etc. The level is It is located within the energy gap of the conductive films 108 and 128. Therefore, the nitrogen oxides The interface between the insulating film 110 and the oxide semiconductor film 108, or the interface between the insulating film 124 and the oxide semiconductor film 1 When the electrons diffuse to the interface of the insulating films 110 and 124, the level traps electrons on the insulating film 110 and 124 side. As a result, the trapped electrons may be transferred to the insulating film 110 and the oxide semiconductor film 10. 8 or near the interface between the insulating film 124 and the oxide semiconductor film 128. This causes the threshold voltage of the transistor to shift in the positive direction.

[0178] Nitrogen oxide reacts with ammonia and oxygen during the heat treatment. The nitrogen oxide contained therein reacts with the ammonia contained in the insulating film 126 during the heat treatment. Therefore, nitrogen oxides contained in the insulating film 124 are reduced. Electrons are less likely to be trapped at the interface with the oxide semiconductor film 128.

[0179] By using the oxide insulating film as the insulating films 110 and 124, the threshold voltage of the transistor can be reduced. It is possible to reduce the shift in the value voltage, thereby reducing the fluctuation in the electrical characteristics of the transistor. It is possible.

[0180] Heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher and lower than 350° C. By the treatment, the insulating films 110 and 124 have a spectrum obtained by measuring ESR at 100K or less. The first signal has a g value between 2.037 and 2.039 at 1000 kJ / s. The second signal is greater than or equal to 2.003 and less than or equal to 2.003, and the third signal is greater than or equal to 1.964 and less than or equal to 1.966. The split width of the first signal and the second signal, The split widths of the first and second signals are The g value is about 5 mT. The first signal has a g value of 2.037 or more and 2.039 or less. The second signal has a g value between 2.001 and 2.003, and a g value between 1.964 and 1.96 The sum of the spin densities of the third signals that are less than 6 is 1 × 10 18 spins / cm 3 Not yet is typically 1×10 17 spins / cm 3 More than 1×10 18 spins / c m 3 is less than.

[0181] In the ESR spectrum below 100K, the g value is between 2.037 and 2.039. a first signal having a g value of 2.001 or more and 2.003 or less, and a second signal having a g value of The sum of the spin densities of the third signal, which is between 1.964 and 1.966, is the nitrogen oxide Things (NO x , x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2) Typical examples of nitrogen oxides include nitrogen monoxide and nitrogen dioxide. That is, the first signal has a g value of 2.037 or more and 2.039 or less, and the second signal has a g value of 2.001 or more. A second signal greater than or equal to 2.003 and less than or equal to 2.003, and a g-value greater than or equal to 1.964 and less than or equal to 1.966 The smaller the total spin density of the third signal, the more nitrogen oxides are contained in the oxide insulating film. It can be said that the content is low.

[0182] The oxide insulating film has a nitrogen concentration of 6×10 as measured by SIMS. 20 atoms / cm 3 The following is the result.

[0183] PECV using silane and nitrous oxide at a substrate temperature of 220°C or higher and 350°C or lower By forming the oxide insulating film using Method D, a dense and hard film can be formed. It can be achieved.

[0184] The insulating film 114 contains at least one of nitrogen and hydrogen. For example, a nitride insulating film can be used. Examples of the nitride insulating film include silicon nitride, nitride, and the like. It can be formed using silicon oxide nitride, aluminum nitride, aluminum oxide nitride, etc. The hydrogen concentration in the insulating film 114 is 1×10 22 atoms / cm 3 That's all The insulating film 114 is preferably formed on the source region 108s of the oxide semiconductor film 108 and the The insulating film 114 has a region that contacts the conductive film 120. Therefore, the source region 108s, the drain region 108d, and the The hydrogen concentration in the conductive film 120 increases, and the source region 108s and the drain region 108d , and the carrier density of the conductive film 120 can be increased. The drain region 108d and the conductive film 120 are in contact with the insulating film 114. In this case, there may be regions where the hydrogen concentration in the film is the same.

[0185] The insulating films 116, 118, and 126 contain more oxygen than the stoichiometric composition. The oxide insulating film is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. When heated, the oxide insulating film releases some of its oxygen. Oxide insulating films containing a large amount of oxygen have a TDS value of 1. 0×10 19 atoms / cm 3 or more, preferably 3.0 × 10 20 atoms / cm 3 The amount of oxygen released is as above. The total amount of oxygen in the range of 650°C or less, or 50°C to 550°C. The amount of released oxygen is the total amount converted to oxygen atoms in TDS.

[0186] The insulating films 116, 118, and 126 preferably have a thickness of 30 nm or more and 500 nm or less. The thickness of the film is 50 nm to 400 nm, and silicon oxide, silicon oxynitride, etc. can be used. Cut.

[0187] Furthermore, it is preferable that the insulating films 116, 118, and 126 have a small number of defects. ESR measurements revealed a signal at g = 2.001 originating from silicon dangling bonds. The spin density of the number is 1.5×10 18 spins / cm 3 Less than, or even 1×10 18 sp ins / cm 3 It is preferable that:

[0188] In addition, the insulating film 124 and the insulating film 126 can be made of the same material. The interface between the insulating film 124 and the insulating film 126 may not be clearly visible. In this embodiment, the interface between the insulating film 124 and the insulating film 126 is shown by a dashed line.

[0189] The insulating film 134 functions as a protective insulating film for the transistors Tr1 and Tr2. It has.

[0190] The insulating film 134 contains either hydrogen or nitrogen, or both. The insulating film 134 contains oxygen, hydrogen, water, and alkaline metals. The insulating film 134 has a function of blocking metals, alkaline earth metals, etc. The oxide semiconductor film 108 and the oxide semiconductor film 128 are then diffused to the outside, and the insulating film 108 and the oxide semiconductor film 128 are then formed. The oxygen contained in the films 110, 116, 124, and 126 diffuses outward and the oxide semiconductor is introduced from the outside. This can prevent hydrogen, water, etc. from entering the conductive films 108 and 128.

[0191] For example, a nitride insulating film can be used as the insulating film 134. Examples include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. There is.

[0192] <Oxide semiconductor film> The oxide semiconductor film 108 and the oxide semiconductor film 128 are formed using the above-described materials. It is possible.

[0193] When the oxide semiconductor film 108 and the oxide semiconductor film 128 are In-M-Zn oxide, In- Atomic ratio of metal elements in the sputtering target used to deposit M-Zn oxide films It is preferable that the metal element of such a sputtering target satisfies In>M. The atomic ratios are In:M:Zn=2:1:3, In:M:Zn=3:1:2, In: Examples include M:Zn=4:2:4.1.

[0194] When the oxide semiconductor film 108 and the oxide semiconductor film 128 are an In-M-Zn oxide, The source of the metal elements in the sputtering target used to form the In-M-Zn oxide film The atomic ratio may be a composition that satisfies In≦M. The atomic ratio of the elements is In:M:Zn=1:1:1, In:M:Zn=1:1:1.2 , In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3 :6, etc. The metal element of the sputtering target used for film formation The ratio of the number of atoms in the oxide semiconductor film 108 and the oxide semiconductor film 128 may be different from each other. good.

[0195] The oxide semiconductor film 108 and the oxide semiconductor film 128 have an energy gap of 2 eV. It is preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor with a wide energy gap, This can reduce the off-current of transistor Tr2.

[0196] The oxide semiconductor film 108 and the oxide semiconductor film 128 each have a thickness of 3 nm or more. 00 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0197] Further, hydrogen contained in the oxide semiconductor film 108 and the oxide semiconductor film 128 bonds with metal atoms. The lattice from which oxygen is released (or the part from which oxygen is released) reacts with the oxygen to form water. When hydrogen enters the oxygen vacancy, electrons, which act as carriers, are generated. In addition, some of the hydrogen atoms may bond with oxygen atoms that bond with metal atoms, forming carriers. Therefore, a transistor using an oxide semiconductor film containing hydrogen may generate electrons. Therefore, the oxide semiconductor film 108 and the oxide It is preferable that hydrogen in the compound semiconductor film 128 be reduced as much as possible.

[0198] Specifically, in the oxide semiconductor film 108 and the oxide semiconductor film 128, The hydrogen concentration obtained from each of these is 2 × 10 20 atoms / cm 3 Below, preferably 5 x10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below Bottom, 5×10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than or equal to 5 × 10 17 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 The following applies.

[0199] In addition, in the oxide semiconductor film 108 and the oxide semiconductor film 128, When certain silicon or carbon is contained, the oxide semiconductor film 108 and the oxide semiconductor film 128 As a result, oxygen vacancies increase in the oxide semiconductor film 108 and the oxide semiconductor film 109, resulting in n-type conductivity. The silicon concentration in the nitride semiconductor film 128 obtained by SIMS analysis was 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do. In addition, the oxide semiconductor films 108 and 128 were analyzed by SIMS. The carbon concentration is 2 × 10 18 atoms / cm 3 Less than or equal to 2 x 10 1 7 atoms / cm 3 The following applies.

[0200] In addition, the oxide semiconductor film 108 and the oxide semiconductor film 128 were analyzed by SIMS. The concentration of alkali metals or alkaline earth metals in the solution is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 The following are alkali metals and When alkaline earth metals and oxide semiconductors are bonded, they can generate carriers. Therefore, the off-state current of the oxide semiconductor film 108 and the It is preferable to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film 128. I wish.

[0201] The various films such as the conductive film and insulating film described above can be formed by sputtering, plasma deposition, etc. Plasma Enhanced Chemical Vapor Deposition (PECVD) Vapor Deposition) method, thermal CVD (Chemical Vapor Deposition) method, thermal CVD (Chemical Vapor Deposition) method, It can be formed by the thermal CVD method. CVD(Metal Organic Chemical Vapor Deposit) ion) method, or ALD (Atomic Layer Deposition) method, etc. Examples include:

[0202] The thermal CVD method is a film formation method that does not use plasma, so defects are generated by plasma damage. This has the advantage that it will not be

[0203] In the thermal CVD method, raw material gas and oxidant are fed into a chamber, and the chamber is heated to atmospheric pressure or The film is formed by reacting the material near or on the substrate under reduced pressure and depositing it on the substrate. Good too.

[0204] In addition, the ALD method uses a source gas for reaction in a chamber under atmospheric or reduced pressure. The film may be formed by the above method.

[0205] For example, when forming a hafnium oxide film using a film formation device that uses ALD, the solvent and Liquids containing hafnium precursor compounds (hafnium alkoxides, tetrakisdimethylamine, etc.) The raw material gas is vaporized hafnium amide (TDMAH) and oxidized Two types of gases are used: tetrakisdimethylamide hafnium (TDA) and ozone (O3). The chemical formula for nium is Hf[N(CH3)2]4. Other material liquids include tetrahydrofuran. Examples include kis(ethylmethylamido)hafnium.

[0206] For example, when forming an aluminum oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing an aluminum precursor compound (e.g., trimethylaluminum (TMA)) Two types of gases are used: a source gas containing methyltrimethylsilyl methyl ... The chemical formula for aluminum is Al(CH3)3. Other liquid materials include Tris(diisopropyl alcohol). Methylamido) aluminum, triisobutylaluminum, aluminum tris(2, 2,6,6-tetramethyl-3,5-heptanedionate).

[0207] For example, when forming a silicon oxide film using a film forming device that uses ALD, The chlorine contained in the adsorbed material is removed, and the oxidizing gas (O2 , nitrous oxide) radicals are supplied to react with the adsorbate.

[0208] For example, when forming a tungsten film using a film forming device that uses ALD, WF6 gas is used. An initial tungsten film is formed using WF6 gas and B2H6 gas, and then WF6 gas and H2 gas are used. A tungsten film is formed using SiH4 gas instead of B2H6 gas. It's fine.

[0209] <1-7. Configuration example 2 of semiconductor device> Next, a modification of the semiconductor device 100A shown in FIGS. 4(A) and 4(B) will be described with reference to FIG. Reveal.

[0210] FIG. 11 is a cross-sectional view of a modified example of the semiconductor device 100A shown in FIG. 4(B).

[0211] FIG. 11 shows a semiconductor device 100A having a second gate electrode functioning as a second gate electrode of a transistor Tr2. The conductive film 130 is functional, and the insulating film 134 on the conductive film 130 is not provided. 11, an opening 182 is provided in the insulating film 124 and the insulating film 126, and an insulating film 13 is provided in the insulating film 13. Instead of the insulating film 124 and the opening 184 provided in the insulating film 136, the insulating film 124 and the insulating film 12 6 and an opening 183 is provided in the insulating film 136. This is preferable because it reduces the number of manufacturing steps.

[0212] <1-8. Configuration example 3 of semiconductor device> Next, regarding a modified example of the semiconductor device 100A shown in FIGS. 4(A) and 4(B), ) and FIGS. 13(A) and (B).

[0213] Here, a stacked structure of oxide semiconductor films will be described.

[0214] 12A and 12B show the channel length ( L) direction cross section.

[0215] FIG. 12A shows an example in which the oxide semiconductor film 128 of the transistor Tr2 is an oxide semiconductor film 128a, an oxide semiconductor film 128b on the oxide semiconductor film 128a, and an oxide semiconductor film 1 and an oxide semiconductor film 128c on the oxide semiconductor film 128b. 28 is a three-layer laminated structure.

[0216] FIG. 12B shows that the oxide semiconductor film 128 of the transistor Tr2 is an oxide semiconductor film and an oxide semiconductor film 128c over the oxide semiconductor film 128b. That is, the oxide semiconductor film 128 has a two-layer structure.

[0217] Even when the oxide semiconductor film 128 has a three-layer stacked structure, the oxide semiconductor film 128 may have a two-layer stacked structure. In the structure, the oxide semiconductor film 128b was formed in the same manner as in Sample A in the transistor configuration shown in FIG. The oxide semiconductor film is formed under the same film formation conditions as those for the oxide semiconductor film formed in Example 3. In the transistor, the field effect in the saturation region in the Id-Vg measurement of the transistor The difference between the minimum and maximum values ​​of the resultant mobility was The minimum and maximum values ​​of the field-effect mobility when the oxide semiconductor film is formed under the same film formation conditions as those of the oxide semiconductor film of will be smaller than the difference between

[0218] 1 shows an example of a band structure of the oxide semiconductor film 128 and an insulating film in contact with the oxide semiconductor film 128. 13A and 13B. FIG. 13A shows the insulating film 118, the oxide semiconductor film 128a, 12 is an example of a band structure in the thickness direction of a laminated structure including 128b, 128c, and the insulating film 124. 13B shows the insulating film 118, the oxide semiconductor films 128b and 128c, and 1 is an example of a band structure in the thickness direction of a laminated structure having an insulating film 124 and an insulating layer 125. For ease of understanding, the structure is shown as an insulating film 118, oxide semiconductor films 128a, 128b, and 128c. c, and the energy level (Ec) of the bottom of the conduction band of the insulating film 124.

[0219] 13A shows a case where a silicon oxide film is used as the insulating film 118 and the insulating film 124. The oxide semiconductor film 128a is made of a gold alloy having an atomic ratio of In:Ga:Zn=1:3:2. The oxide semiconductor film 128b is formed using an oxide semiconductor film formed using a metal oxide target. The atomic ratio of the metal elements was In:Ga:Zn=4:2:4.1. The oxide semiconductor film 128c is formed using an oxide semiconductor film formed using a metal element. The oxide formed using a metal oxide target with a molecular ratio of In:Ga:Zn=1:3:2 FIG. 1 is a band diagram of a structure using a compound semiconductor film.

[0220] 13B shows a case where a silicon oxide film is used as the insulating film 118 and the insulating film 124. The oxide semiconductor film 128b is made of metal elements having an atomic ratio of In:Ga:Zn=4:2:4.1. The oxide semiconductor film 12 is formed by using the oxide semiconductor film formed by using the metal oxide target. 8c is a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2. FIG. 1 is a band diagram of a configuration using a metal oxide film formed using

[0221] As shown in FIGS. 13A and 13B, in the oxide semiconductor films 128a, 128b, and 128c, In other words, the energy level at the bottom of the conduction band changes smoothly. In order to have such a band structure, the oxide The interface between the semiconductor film 128a and the oxide semiconductor film 128b or the interface between the oxide semiconductor film 128b and the oxide semiconductor film 128a At the interface with the oxide semiconductor film 128c, defect states such as trap centers and recombination centers are formed. Assume that there are no impurities that would form

[0222] In order to form a continuous junction in the oxide semiconductor films 128a, 128b, and 128c, Each film is formed using a multi-chamber film-forming device (sputtering device) equipped with a lock chamber. It is necessary to laminate the layers continuously without exposing them to the air.

[0223] 13A and 13B, the oxide semiconductor film 128b functions as a well. In the transistor using the above stacked structure, the channel region is formed of the oxide semiconductor film 12 It can be seen that it is formed in 8b.

[0224] Note that by providing the oxide semiconductor films 128a and 128c, the trap states can be reduced by the oxide semiconductor It can be placed farther away from the conductive film 128b.

[0225] In addition, the trap states are at the bottom of the conduction band of the oxide semiconductor film 128b that functions as a channel region. The energy level (Ec) of the electron trap level can be farther from the vacuum level than the When electrons are accumulated in the trap level, the negative fixed charge This causes a load, and the threshold voltage of the transistor shifts in the positive direction. The trap level is lower than the energy level (Ec) of the bottom of the conduction band of the oxide semiconductor film 128b. It is preferable to configure the trap level so that the potential is close to the trap level. This makes it difficult for electrons to accumulate, which makes it possible to increase the on-current of the transistor. The field effect mobility can be increased.

[0226] The oxide semiconductor films 128a and 128c have a lower conduction band minimum than the oxide semiconductor film 128b. The energy level of the oxide semiconductor film 128b is close to the vacuum level. and the energy levels of the conduction band minimums of the oxide semiconductor films 128a and 128c. The difference is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV or more That is, the electron affinity of the oxide semiconductor films 128a and 128c and the The difference between the electron affinity of the film 128b and the electron affinity of the film 128b is 0.15 eV or more, or 0.5 eV or more, and 2 e V or less, or 1 eV or less.

[0227] With such a structure, the oxide semiconductor film 128b serves as a main path for current, and The oxide semiconductor films 128a and 128c function as a channel region. An oxide composed of one or more metal elements that constitute the oxide semiconductor film 128b to be formed Since the oxide semiconductor film is a semiconductor film, the interface between the oxide semiconductor film 128a and the oxide semiconductor film 128b and The interface scattering occurs at the interface between the oxide semiconductor film 128b and the oxide semiconductor film 128c. Therefore, the movement of carriers is not hindered at the interface, and the transistor The field effect mobility of

[0228] The oxide semiconductor films 128a and 128c function as part of a channel region. To prevent this, a material with sufficiently low conductivity is used. 28c shows that the electron affinity (the difference between the vacuum level and the energy level at the bottom of the conduction band) is the energy level of the conduction band minimum is smaller than that of the oxide semiconductor film 128b. A material with a difference (band offset) from the lowest energy level of the conductive band is used. In order to suppress the occurrence of a difference in threshold voltage depending on the magnitude of the gate voltage, the oxide The energy levels of the conduction band minimums of the semiconductor films 128a and 128c are the same as those of the oxide semiconductor film 128b. It is preferable to use a material whose energy level is closer to the vacuum level than the energy level of the bottom of the conduction band. , the energy level of the conduction band minimum of the oxide semiconductor film 128b and the energy level of the oxide semiconductor film 128a The difference between the energy level of the conduction band minimum of 128c and that of 128c is 0.2 eV or more, preferably 0.5 e It is preferable that the value is V or more.

[0229] The thicknesses of the oxide semiconductor films 128a and 128c are determined by the amount of the oxide semiconductor film 128a and the oxide semiconductor film 128c. the insulating film having a thickness larger than that which can prevent diffusion into the oxide semiconductor film 128b; The thickness of the oxide semiconductor film 128b is set to be less than the thickness that prevents oxygen from being supplied from the oxide semiconductor film 124 to the oxide semiconductor film 128b. When the thickness of the oxide semiconductor films 128a and 128c is 10 nm or more, the conductive films 122a and 122b are Diffusion of constituent elements of the oxide semiconductor film 22b into the oxide semiconductor film 128b can be suppressed. When the thickness of the oxide semiconductor films 128a and 128c is 100 nm or less, the insulating film 124 Therefore, oxygen can be effectively supplied to the oxide semiconductor film 128b.

[0230] The oxide semiconductor films 128a and 128c are made of In-M-Zn oxide (M is Al, Ga, Y, or When M is Sn, the atomic ratio of M is higher than that of In, so that the oxide semiconductor film 128 a, 128c energy gap and can reduce the electron affinity. In the case where it is possible to control the difference in electron affinity between the compound semiconductor film 128b and the compound semiconductor film 128a by the composition of M, In addition, M is a metal element that has a strong bond with oxygen, so these elements can be By having a higher atomic ratio, oxygen deficiency is less likely to occur.

[0231] When the oxide semiconductor films 128a and 128c are made of an In-M-Zn oxide, Zn and The atomic ratio of In and M excluding O is preferably such that In is less than 50 atomic %. M is less than 50 atomic %, and more preferably In is less than 25 atomic %. In addition, M is set to be higher than 75 atomic %. Alternatively, a gallium oxide film may be used.

[0232] When the oxide semiconductor films 128a, 128b, and 128c are made of In-M-Zn oxide, Compared with the oxide semiconductor film 128b, the amount of M contained in the oxide semiconductor films 128a and 128c is The atomic ratio is large, typically compared to the above atoms contained in the oxide semiconductor film 128b. The atomic ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more higher.

[0233] When the oxide semiconductor films 128a, 128b, and 128c are made of In-M-Zn oxide, The oxide semiconductor film 128b is formed by forming an oxide semiconductor film having an atomic ratio of In:M:Zn=x1:y1:z1. When the film 128a and the film 128c are In:M:Zn=x2:y2:z2 [atomic ratio], y 2 / x2 is greater than y1 / x1, and preferably y2 / x2 is greater than y1 / x1 by 1.5 More preferably, y2 / x2 is at least twice as large as y1 / x1, and Preferably, y2 / x2 is three or four times larger than y1 / x1. In the oxide semiconductor film 128b, when y1 is equal to or greater than x1, the oxide semiconductor film 128b This is preferable because it can provide stable electrical characteristics to the transistor used. When the field-effect mobility of the transistor including the oxide semiconductor film 128b is three times or more Therefore, it is preferable that y1 is less than three times x1.

[0234] When the oxide semiconductor film 128b is an In-M-Zn oxide, the oxide semiconductor film 128b is formed. In the target used for this purpose, the atomic ratio of the metal elements is In:M:Zn=x1:y If we set it to 1:z1, 、 x1 / y1 is equal to or greater than 1 / 3 and equal to or less than 6, and further equal to or greater than 1 and equal to or less than 6, It is preferable that z1 / y1 is 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When z1 / y1 is set to 1 or more and 6 or less, the oxide semiconductor film 128b can be formed by the CAAC -OS is easily formed. A typical example of the atomic ratio of the target metal elements is In. :M:Zn=4:2:4.1, In:M:Zn=1:1:1.2, In:M:Zn=3: There are ratios such as 1:2.

[0235] In addition, when the oxide semiconductor films 128a and 128c are made of In-M-Zn oxide, the oxide semiconductor In the target used to form the films 128a and 128c, the atomic ratio of the metal elements If we set In:M:Zn=x2:y2:z2, 、 x2 / y2 <x1 / y1であって、z2 / y2 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. By increasing the atomic ratio of M to SiO, the energy of the oxide semiconductor films 128a and 128c can be increased. Since it is possible to increase the energy gap and decrease the electron affinity, y2 / x2 can be It is preferably 3 or more, or 4 or more. Typical examples of atomic ratios of metal elements in targets For example, In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn =1:3:5, In:M:Zn=1:3:6, In:M:Zn=1:4:2, In:M: Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:5:5, etc. .

[0236] Note that the atomic ratios of the oxide semiconductor films 128a, 128b, and 128c are each calculated using an error. The above atomic ratios may vary by plus or minus 40%.

[0237] 12A and 12B, the oxide semiconductor film 128 of the transistor Tr2 is formed of two layers. The oxide semiconductor film 10 of the transistor Tr1 is a three-layer stacked structure. 8 may also have a similar configuration.

[0238] As described above, the semiconductor device of the present invention can be categorized into two types, depending on whether or not the second gate electrode is provided, or whether or not the oxide semiconductor is provided. The laminated structure of the body film may be changed. Each of the above structures can be freely combined.

[0239] <1-9. Manufacturing method of semiconductor device> Next, a manufacturing method of the semiconductor device 100A of one embodiment of the present invention will be described with reference to FIGS. and explain.

[0240] 14(A), 15(A), 16(A), 17(A), 18(A), and 1 9(A), 20(A), 21(A), 22(A), and 23(A) are diagrams showing semiconductor devices. 14(B), 15(B), 16(C), and 17(D) are top views for explaining a method for manufacturing the device 100A. B), Fig. 17(B), Fig. 18(B), Fig. 19(B), Fig. 20(B), Fig. 21(B), Fig. 2 2(B) and 23(B) are cross-sectional views illustrating a method for manufacturing the semiconductor device 100A. .

[0241] First, an insulating film 106 is formed on a substrate 102, and an oxide semiconductor film is formed on the insulating film 106. After that, the oxide semiconductor film is processed into an island shape to form the oxide semiconductor film 108. (See Figures 14(A) and 14(B)).

[0242] In this embodiment, a glass substrate can be used as the substrate 102 .

[0243] The insulating film 106 can be formed by a method such as sputtering, CVD, evaporation, or pulsed laser deposition (P The layer can be formed by appropriately using a laser diode (LD) method, a printing method, a coating method, or the like. As the insulating film 106, a silicon nitride film having a thickness of 400 nm was deposited using a PECVD apparatus. A silicon oxynitride film having a thickness of 50 nm is formed.

[0244] After the insulating film 106 is formed, oxygen may be added to the insulating film 106. The oxygen to be added may be an oxygen radical, an oxygen atom, an oxygen atomic ion, an oxygen molecular ion, etc. The methods of addition include ion doping, ion implantation, and plasma treatment. In addition, after forming a film for suppressing oxygen desorption on the insulating film 106, Oxygen may be added to the insulating film 106.

[0245] The film for suppressing the desorption of oxygen mentioned above includes indium, zinc, gallium, tin, and aluminum. , chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, tungsten Selected metal elements, alloys containing the above-mentioned metal elements, and combinations of the above-mentioned metal elements alloys containing the above-mentioned metal elements, metal nitrides containing the above-mentioned metal elements, metal oxides containing the above-mentioned metal elements, The insulating layer is formed using a conductive material such as a metal nitride oxide containing the above-mentioned metal element. can be done.

[0246] In addition, when oxygen is added by plasma treatment, the oxygen is excited by microwaves to form high-density oxygen. By generating plasma, the amount of oxygen added to the insulating film 106 can be increased.

[0247] The oxide semiconductor film 108 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, a laser deposition method, or the like. It can be formed by laser ablation, thermal CVD, etc. To process the oxide semiconductor film 108, a mask was formed on the oxide semiconductor film by a lithography process. Then, part of the oxide semiconductor film is etched using the mask. Alternatively, the element-isolated oxide semiconductor film 108 may be directly formed by using a printing method.

[0248] When an oxide semiconductor film is formed by a sputtering method, a power supply for generating plasma is required. The device may be an RF power supply, an AC power supply, a DC power supply, or the like. When an oxide semiconductor film is formed, a sputtering gas is a rare gas (typically, argon). In the case of a mixed gas of a rare gas and oxygen, oxygen, a rare gas, and oxygen are used as appropriate. In this case, it is preferable to increase the gas ratio of oxygen to rare gas.

[0249] Note that in this embodiment, the oxide semiconductor film 108 is deposited by a sputtering apparatus. As a sputtering target, In-Ga-Zn metal oxide (In:Ga:Zn = An oxide semiconductor film having a thickness of 40 nm is formed using an atomic ratio of 4:2:4.1. The substrate was heated to 170°C, and argon gas with a flow rate of 140 sccm and 60 sccm The oxygen gas is introduced into a film-forming chamber of a sputtering device.

[0250] After the oxide semiconductor film 108 is formed, heat treatment is performed to remove the oxide semiconductor film 108. The temperature of the heat treatment is typically 150° C. or higher, and the substrate distortion is minimized. The temperature is below the melting point, or 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0251] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or nitrogen. Alternatively, the heating may be carried out in an inert gas atmosphere containing oxygen. In addition, hydrogen, water, etc. may be added to the inert atmosphere and oxygen atmosphere. The treatment time may be from 3 minutes to 24 hours.

[0252] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, the heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. This can reduce processing time.

[0253] The oxide semiconductor film is formed while being heated, or the oxide semiconductor film is formed and then subjected to heat treatment. By performing the above, the hydrogen concentration in the oxide semiconductor film obtained by secondary ion mass spectrometry can be 5×10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 below, 5×10 18 atoms / cm3 or less, or 1×10 18 atoms / cm 3 Below, or 5 x 10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 below It can be said that:

[0254] Next, an insulating film and a conductive film are formed over the insulating film 106 and the oxide semiconductor film 108. By processing, an insulating film 110 and a conductive film 120 are formed (see FIGS. 15A and 15B).

[0255] The insulating film 110 is a silicon oxide film or a silicon oxynitride film formed by the PECVD method. In this case, the source gas may be a deposition gas containing silicon and It is preferable to use an oxidizing gas containing silicon. Examples of oxidizing gases include silane, disilane, trisilane, and fluorinated silane. Examples include nitrous oxide, nitrous oxide, and nitrogen dioxide.

[0256] In addition, the flow rate of the oxidizing gas is set to be 20 times or more greater than the flow rate of the deposition gas for the insulating film 110. The pressure in the treatment chamber should be less than 100 times, or between 40 and 80 times, and the pressure in the treatment chamber should be less than 100 Pa. By using the PECVD method at a pressure of 50 Pa or less, silicon oxynitride with a low defect content can be obtained. A coating can be formed.

[0257] In addition, as the insulating film 110, a substrate placed in a vacuum-evacuated processing chamber of a PECVD apparatus is The temperature is kept at 280°C or more and 400°C or less, and the raw material gas is introduced into the processing chamber to increase the pressure in the processing chamber. The pressure is set to 20 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 250 Pa or less. Under the conditions under which high frequency power is supplied to the electrode provided in the processing chamber, the insulating film 110 is formed as follows: A dense silicon oxide film or silicon oxynitride film can be formed.

[0258] The insulating film 110 may also be formed by plasma CVD using microwaves. Microwaves refer to the frequency range from 300MHz to 300GHz. The electron temperature is low and the electron energy is small. Also, the electron acceleration is low for the supplied power. The proportion of the ionized gas used for dissociation and ionization of molecules is small, so that it can be used for dissociation and ionization of more molecules. This allows for the excitation of high density plasma. To form an insulating film 110 with few defects, with little plasma damage to the surface and deposits. can be done.

[0259] The insulating film 110 can also be formed by a CVD method using organic silane gas. Organosilane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetrahydrofuran (TEOS: chemical formula Si(OC2H5)4), and tetrahydrofuran (TEOS: chemical formula Si(OC2H5)4). Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Octamethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexame Thiomethyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), tris Using silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) By using the CVD method with organic silane gas, an insulating film with high coverage can be formed. 110 can be formed.

[0260] In this embodiment, a PECVD apparatus is used to form the insulating film 110, and a 150 nm thick nitride oxide film is formed. A silicon dioxide film is formed.

[0261] The conductive film 120 is preferably made of an oxide conductor (OC). During the deposition, oxygen is added from the conductive film 120 into the insulating film 110 .

[0262] The conductive film 120 is formed by sputtering in an atmosphere containing oxygen gas. It is preferable to form the conductive film 120 in an atmosphere containing oxygen gas. In this way, oxygen can be suitably added to the insulating film 110.

[0263] Note that the conductive film 120 can be formed using a material similar to that of the oxide semiconductor film 108 described above. This can be done.

[0264] In this embodiment, a sputtering device is used to form the conductive film 120. The target was In-Ga-Zn metal oxide (In:Ga:Zn=5:1:7 [atomic A conductive film with a thickness of 20 nm is formed using a [atomic ratio].

[0265] In this embodiment, the conductive film 120 and the insulating film 110 are processed by dry etching. This is done using the Ching method.

[0266] When processing the conductive film 120 and the insulating film 110, the conductive film 120 is not overlapped with the insulating film 110. The thickness of the oxide semiconductor film 108 might become thin.

[0267] Next, an impurity element is added from above the insulating film 106, the oxide semiconductor film 108, and the conductive film 120. Addition will be made.

[0268] The impurity elements can be added by ion doping, ion implantation, plasma treatment, etc. In the case of plasma treatment, plasma is generated in a gas atmosphere containing the impurity element to be added. By generating the impurity element and then performing a plasma treatment, the impurity element can be added. Plasma generating equipment includes dry etching equipment, ashing equipment, and plasma A CVD apparatus, a high density plasma CVD apparatus, or the like can be used.

[0269] The source gases for the impurity elements are B2H6, PH3, CH4, N2, NH3, and AlH 3. Use one or more of AlCl3, SiH4, Si2H6, F2, HF, H2 and rare gases Or, B2H6, PH3, N2, NH3, AlH3 diluted with rare gases One or more of AlCl3, F2, HF, and H2 can be used. B2H6, PH3, N2, NH3, AlH3, AlCl3, F2, HF, and H2 By adding the impurity element to the oxide semiconductor film 108 and the conductive film 120 using the above method, The oxide semiconductor is made by mixing one or more of the gases hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine. The conductive film 108 and the conductive film 120 may be doped with the inorganic filler.

[0270] Or, after adding rare gases, B2H6, PH3, CH4, N2, NH3, AlH3, A HCl3, SiH4, Si2H6, F2, HF, and H2 are added to the oxide semiconductor film 10 8 and the conductive film 120.

[0271] or B2H6, PH3, CH4, N2, NH3, AlH3, AlCl3, SiH4, After adding one or more of Si2H6, F2, HF, and H2, a rare gas is introduced into the oxide semiconductor film 10 8 and the conductive film 120.

[0272] The addition of impurity elements can be controlled by appropriately setting implantation conditions such as acceleration voltage and dose. For example, when adding argon using ion implantation, the acceleration voltage should be 10 kV or higher, up to 100 kV. Hereafter, the dose is 1×10 13 ions / cm 2 More than 1×10 16 ions / cm 2 below For example, 1×10 14 ions / cm 2 In addition, ion implantation When phosphorus ions are added by the method, the acceleration voltage is 30 kV and the dose is 1 × 10 13 ions / cm 2 5x10 or more 16 ions / cm 2 For example, 1×10 15 i ons / cm 2 This can be done as follows.

[0273] In this embodiment, argon is used as the impurity element by using a doping device. is added to the oxide semiconductor film 108 and the conductive film 120. Note that in this embodiment, Although the example shows a configuration in which argon is added as an impurity element, the present invention is not limited to this. For example, nitrogen may be added. You don't have to.

[0274] Next, the insulating film 114 is formed over the insulating film 106, the oxide semiconductor film 108, and the conductive film 120. Note that by forming the insulating film 114, the oxide semiconductor film 10 in contact with the insulating film 114 8 becomes the source region 108s and the drain region 108d. In other words, the oxide semiconductor film 108 in contact with the insulating film 110 is This results in the channel region 108i, the source region 108s, and the oxide semiconductor film 108 having the drain region 108d is formed (FIG. 16(A) See B).

[0275] In this embodiment, the insulating film 114 is formed by a PECVD apparatus to a thickness of 100 nm. A silicon nitride film having a thickness of m is formed.

[0276] By using a silicon nitride film as the insulating film 114, the conductive film 12 in contact with the insulating film 114 0, hydrogen and nitrogen in the silicon nitride film in the source region 108s and the drain region 108d Either one or both of the conductive film 120, the source region 108s, and the drain region 108s are embedded in the conductive film 120. This can increase the carrier density in the silicon region 108d.

[0277] Next, an insulating film 116 is formed on the insulating film 114 .

[0278] In this embodiment, the insulating film 116 is formed by a PECVD apparatus to a thickness of 300 nm. A silicon oxynitride film having a thickness of m is formed.

[0279] Next, a mask is formed by lithography at a desired position on the insulating film 116, and then the insulating film 1 16 and a part of the insulating film 114 are etched to form an opening that reaches the source region 108s. A portion 141a and an opening 141b reaching the drain region 108d are formed (FIG. 16( See A)(B)).

[0280] The insulating film 116 and the insulating film 114 can be etched by wet etching or In this embodiment, a dry etching method and / or a dry etching method can be appropriately used. The insulating film 116 and the insulating film 114 are processed using dry etching.

[0281] Next, a conductive film is formed on the insulating film 116 so as to cover the openings 141a and 141b. A mask is formed at this position by a lithography process, and then a part of the conductive film is etched. By this, conductive films 112a and 112b are formed (see FIGS. 16A and 16B).

[0282] In this embodiment, the conductive films 112a and 112b are formed by using a sputtering device. A titanium film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a A laminated film of titanium film is formed.

[0283] The conductive films 112a and 112b can be processed by wet etching and / or dry etching. In this embodiment, a dry etching method is used. Then, the conductive film is processed to form conductive films 112a and 112b.

[0284] Through the above steps, the transistor Tr1 can be fabricated.

[0285] The films (insulating film, oxide semiconductor film, conductive film, etc.) that make up the transistor Tr1 are tarring method, chemical vapor deposition (CVD) method, vacuum evaporation method, pulsed laser deposition (PLD) method It can be formed by using the ALD (atomic layer deposition) method, or the coating method or the printing method. The film can be formed by the sputtering method, plasma chemical vapor deposition, etc. The most common method is the PECVD method, but thermal CVD methods are also acceptable. CVD (metal organic chemical vapor deposition) is one example.

[0286] In the thermal CVD method, the chamber is kept at atmospheric pressure or reduced pressure, and the source gas and oxidant are simultaneously mixed in the chamber. The film is formed by sending the gas into the chamber, reacting it near or on the substrate, and depositing it on the substrate. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that defects are not generated due to damage.

[0287] In addition, the ALD method uses a chamber with atmospheric or reduced pressure, and the source gases for the reaction are introduced into the chamber. The film is formed by repeating this process. Gas (argon, nitrogen, etc.) may be introduced as a carrier gas. For example, two types The above source gases may be supplied to the chamber in order. After the reaction of the first raw material gas, an inert gas is introduced, and then the second raw material gas is introduced so as not to cause a reaction. Alternatively, instead of introducing an inert gas, the first source gas is discharged by vacuum evacuation. After that, the second source gas may be introduced. The first source gas is adsorbed and reacted with the surface of the substrate to form the second source gas. The first layer is formed, and the second source gas introduced later is adsorbed and reacted with the first layer. The order of gas introduction is controlled until the desired thickness is reached. By repeating the above steps several times, a thin film with excellent step coverage can be formed. can be adjusted by repeating the gas introduction, allowing precise film thickness adjustment. This makes it suitable for fabricating miniaturized FETs.

[0288] Thermal CVD methods such as MOCVD can be used to form the above-mentioned conductive films, insulating films, oxide semiconductor films, and metal oxide films. For example, when forming an In-Ga-Zn-O film, are trimethylindium (In(CH3)3), trimethylgallium (Ga(CH3) 3), and dimethylzinc (Zn(CH3)2). First, triethylgallium (Ga(C2H5)3) is used instead of trimethylgallium. Dimethyl zinc can also be replaced by diethyl zinc (Zn(C2H5)2). Cut.

[0289] For example, when forming a hafnium oxide film using a film formation device that uses ALD, the solvent and Liquid containing hafnium precursor (hafnium alkoxide, tetrakisdimethylamide hafnium) Hf (TDMAH, Hf[N(CH3)2]4) and tetrakis(ethylmethylamide ) hafnium amide) as a raw material gas and ozone ( Two types of gases are used:

[0290] For example, when forming an aluminum oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing an aluminum precursor (trimethylaluminum (TMA, Al(CH3)3 Two types of gases are used: the raw material gas, which is vaporized from other materials, and H2O as an oxidizing agent. The materials used are tris(dimethylamido)aluminum, triisobutylaluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate), etc. There is.

[0291] For example, when forming a silicon oxide film using a film forming device that uses ALD, The chlorodisilane is adsorbed onto the surface to be coated, and the radicals of oxidizing gases (O2, nitrous oxide) are supplied. is fed to react with the adsorbate.

[0292] For example, when forming a tungsten film using a film forming device that uses ALD, WF6 gas is used. The initial tungsten film is formed by sequentially introducing WF6 gas and H The tungsten film is formed using the B2H6 gas instead of SiH4 gas. may also be used.

[0293] For example, an oxide semiconductor film, such as In-Ga-Zn-O, can be formed using a film formation device that uses ALD. When forming a film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then a Zn The ZnO layer is formed using (CH3)2 gas and O3 gas. The order of these layers is The present invention is not limited to this example. In addition, by using these gases, an In-Ga-O layer, an In-Zn-O layer, A mixed compound layer such as a Ga-Zn-O layer may be formed. H2O gas obtained by bubbling water with an inert gas containing H may be used. It is preferable to use O3 gas.

[0294] Next, the insulating film 118 is formed over the insulating film 116 and the conductive films 112a and 112b.

[0295] The insulating film 118 can be formed by a method such as sputtering, CVD, evaporation, or pulsed laser deposition (P The layer can be formed by appropriately using a laser diode (LD) method, a printing method, a coating method, or the like. As the insulating film 118, a silicon nitride film having a thickness of 400 nm was deposited using a PECVD apparatus. A silicon oxynitride film having a thickness of 50 nm is formed.

[0296] After the insulating film 118 is formed, oxygen may be added to the insulating film 118. The oxygen to be added may be an oxygen radical, an oxygen atom, an oxygen atomic ion, an oxygen molecular ion, etc. The methods of addition include ion doping, ion implantation, and plasma treatment. In addition, after forming a film that suppresses oxygen desorption on the insulating film, the insulating film is Oxygen may be added to 118.

[0297] The film for suppressing the desorption of oxygen mentioned above includes indium, zinc, gallium, tin, and aluminum. , chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, tungsten Selected metal elements, alloys containing the above-mentioned metal elements, and combinations of the above-mentioned metal elements alloys containing the above-mentioned metal elements, metal nitrides containing the above-mentioned metal elements, metal oxides containing the above-mentioned metal elements, The insulating layer is formed using a conductive material such as a metal nitride oxide containing the above-mentioned metal element. can be done.

[0298] In addition, when oxygen is added by plasma treatment, the oxygen is excited by microwaves to form high-density oxygen. By generating plasma, the amount of oxygen added to the insulating film 118 can be increased.

[0299] The silicon nitride film used as the insulating film 118 has a stacked structure. The silicon film is a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. An example of the three-layer laminated structure is as follows: It can be formed.

[0300] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, ccm of nitrogen and 100 sccm of ammonia gas were used as source gases. The pressure in the reaction chamber was controlled to 100 Pa, and a high frequency of 27.12 MHz was generated. A power of 2000 W is supplied using a microwave power supply, and the thickness is formed to be 50 nm. stomach.

[0301] The second silicon nitride film was formed by silane at a flow rate of 200 sccm and Nitrogen and ammonia gas at a flow rate of 2000 sccm were used as source gases for the reaction in the PECVD equipment. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high frequency power supply was used. A power of 2000 W may be supplied using the above method to form a film having a thickness of 300 nm.

[0302] For the third silicon nitride film, silane at a flow rate of 200 sccm and silane at a flow rate of 5000 sccm were used. m of nitrogen was supplied as a source gas to the reaction chamber of the PECVD device, and the pressure in the reaction chamber was maintained at 100 P a, and a power of 2000 W was supplied using a 27.12 MHz high frequency power supply. It is sufficient to form it so that the thickness is 50 nm.

[0303] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during the growth can be set to 350° C. or less.

[0304] By forming the insulating film 118 as a three-layer structure of silicon nitride films, for example, the conductive film 112 When a conductive film containing copper (Cu) is used for the layers 112a and 112b, the following effects are achieved.

[0305] The first silicon nitride film suppresses the diffusion of copper (Cu) elements from the conductive films 112a and 112b. The second silicon nitride film has a function of releasing hydrogen, and The third silicon nitride film can improve the breakdown voltage of the insulating film that functions as the third silicon nitride film. The hydrogen released from the first silicon nitride film is small, and the hydrogen released from the second silicon nitride film is small. The diffusion of hydrogen can be suppressed.

[0306] Next, the oxide semiconductor film 128 is formed over the insulating film 118 (see FIGS. 17A and 17B).

[0307] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4:2 : 4.1 [atomic ratio]) by a sputtering method to form an oxide semiconductor film. The substrate temperature during the formation of the oxide semiconductor film was set to room temperature (RT), and the flow rate was 180 sc Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were used. The conductive film is processed into a desired shape to form an island-shaped oxide semiconductor film 128. A wet etching apparatus is used to form the oxide semiconductor film.

[0308] Next, a conductive film is formed over the insulating film 118 and the oxide semiconductor film 128. The insulating film 118 is then formed on the conductive film 122a. The insulating films 124 and 126 are formed over the oxide semiconductor film 128 and the conductive films 122a and 122b. (See Figures 18(A) and 18(B)).

[0309] In this embodiment, the conductive films 122a and 122b are made of a tungsten film having a thickness of 50 nm. A laminated film in which a 100 nm thick aluminum film and a 50 nm thick titanium film are laminated in this order. The film is formed by sputtering.

[0310] After the conductive films 122a and 122b are formed, the surface of the oxide semiconductor film 128 (background The cleaning method may be, for example, cleaning with an etcher such as a phosphoric acid solution. As a result, impurities attached to the surface of the oxide semiconductor film 128 can be removed. Impurities (for example, elements contained in the conductive films 122a and 122b) can be removed. It should be noted that this cleaning is not necessarily required, and in some cases cleaning may not be necessary.

[0311] In addition, either one of the steps of forming the conductive films 122a and 122b and the cleaning step may be performed. In both cases, the regions of the oxide semiconductor film 128 that are exposed from the conductive films 122a and 122b are , may become thinner.

[0312] In this embodiment, a silicon oxynitride film having a thickness of 20 nm is used as the insulating film 124. 26, a silicon oxynitride film with a thickness of 200 nm is formed using the PECVD method. do.

[0313] After the insulating film 124 is formed, the insulating film 126 is successively formed without exposing the insulating film 124 to the air. After the insulating film 124 is formed, it is preferable to control the flow rate, pressure, and high frequency of the source gas without exposing the insulating film 124 to the atmosphere. By adjusting one or more of the wave power and the substrate temperature, the insulating film 126 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the film 124 and the insulating film 126. At the same time, oxygen contained in the insulating films 124 and 126 is transferred to the oxide semiconductor film 128. As a result, the amount of oxygen vacancies in the oxide semiconductor film 128 can be reduced.

[0314] In this embodiment, the insulating film 124 is formed by heating the substrate 102 at a temperature of 220° C. Silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm were used as raw material gases. The pressure in the processing chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 MHz. z, 100W (power density is 1.6 × 10 -2 W / cm 2 ) using the PECVD method Then, a silicon oxynitride film is formed.

[0315] The insulating film 126 is formed by evacuating a substrate placed in a processing chamber of a PECVD apparatus. The temperature is maintained at 80°C or higher and 350°C or lower, and the raw material gas is introduced into the processing chamber to increase the pressure in the processing chamber. 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less, 0.17W / cm to the electrode installed in the processing chamber 2 More than 0.5W / cm 2 Below are some more preferred Or 0.25W / cm 2 More than 0.35W / cm 2 Under the following conditions for supplying high frequency power: A silicon oxide film or a silicon oxynitride film is formed.

[0316] The conditions for forming the insulating film 126 are as follows: high frequency power of the above power density in a reaction chamber of the above pressure; By supplying the source gas, the decomposition efficiency in the plasma increases, oxygen radicals increase, As the oxidation of the source gas progresses, the oxygen content in the insulating film 126 becomes higher than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen becomes Because the oxygen is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. Oxide insulating material contains more oxygen than meets the oxygen standard, and some of the oxygen is released when heated. A velum can be formed.

[0317] In the step of forming the insulating film 126, the insulating film 124 serves as a protective film for the oxide semiconductor film 128. Therefore, it is possible to reduce damage to the oxide semiconductor film 128 and increase the power density. The insulating film 126 can be formed using low high frequency power.

[0318] In the film formation conditions for the insulating film 126, the ratio of a deposition gas containing silicon to an oxidizing gas is By increasing the flow rate, it is possible to reduce the number of defects in the insulating film 126. appears at g=2.001 due to the dangling bond of silicon by ESR measurement. The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 s pins / cm 3 Less than or equal to 1.5 × 10 17 spins / cm 3 Defects that are less than As a result, the reliability of the transistor Tr2 is improved. It can improve sexuality.

[0319] After the insulating films 124 and 126 are formed, heat treatment (hereinafter referred to as first heat treatment) is performed. The first heat treatment is preferably performed to remove nitrogen oxides contained in the insulating films 124 and 126. Alternatively, the first heat treatment can reduce the amount of the oxides contained in the insulating films 124 and 126. Part of the oxygen contained in the oxide semiconductor film 128 is moved to the oxide semiconductor film 128. The amount of oxygen deficiency can be reduced.

[0320] The temperature of the first heat treatment is typically less than 400°C, preferably less than 375°C, and The temperature is preferably 150° C. or higher and 350° C. or lower. The first heat treatment is carried out in an atmosphere of nitrogen, oxygen, or ultra-dry. Air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less) The reaction can be carried out under an atmosphere of air (see above) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. Heat treatment is performed using an electric furnace, RTA (Rapid Thermal Anneal), etc. It is possible.

[0321] Next, openings 182 reaching the conductive film 122a are formed in desired regions of the insulating films 124 and 126. After that, a conductive film 130 is formed on the insulating film 126 and the conductive film 122a (FIG. 19( See A)(B)).

[0322] The opening 182 is formed using a dry etching device or a wet etching device. The conductive film 130 is made of an oxide containing indium, tin, and silicon (IT SO) target (In2O3:SnO2:SiO2 = 85:10:5 [wt% ]) to form a 100 nm thick ITSO film, which is then processed into island shapes.

[0323] Through the above steps, the transistor Tr2 can be fabricated.

[0324] Next, an insulating film 126 and an insulating film 134 are formed on the conductive film 130, and an insulating film 136 is formed on the conductive film 130. Then, a laminated film is formed by applying a conductive film 130 to a desired region of the laminated film. An opening 184 is formed (see FIGS. 20(A) and 20(B)).

[0325] The insulating film 134 is a silicon oxynitride film having a thickness of 200 nm, which is deposited by the PECVD method. The insulating film 136 is a photosensitive acrylic resin film having a thickness of 1.5 μm. Form.

[0326] The opening 184 is formed using a dry etching device or a wet etching device. .

[0327] Next, a conductive film is formed over the insulating film 136 and the conductive film 130, and the conductive film is processed into an island shape. In this way, the conductive film 138 is formed (see FIGS. 21A and 21B).

[0328] In this embodiment, the conductive film 138 is a 10 nm thick ITSO film and a 200 nm thick SiO2 film. a reflective metal film (here, a metal film having silver, palladium, and copper) with a thickness of 10 A laminated film with an ITSO film of 138 nm is used. A chipping device is used.

[0329] Next, an island-shaped insulating film 140 is formed on the insulating film 136 and the conductive film 138 (FIG. 22(A)). (See (B)).

[0330] The insulating film 140 is a photosensitive polyimide resin film having a thickness of 1.5 μm.

[0331] Next, the EL layer 142 is formed on the conductive film 138, and then the insulating film 140 and the EL layer 142 are By forming the upper conductive film 144, a light emitting element 160 is formed (see FIGS. 23(A) and 23(B)). see).

[0332] A method for forming the light emitting element 160 will be described in detail in the fourth embodiment.

[0333] Through the above steps, the semiconductor device 100A shown in FIGS. 4(A) and 4(B) can be formed.

[0334] From the above, the oxide semiconductor film 108 and the oxide semiconductor film 128 are thermally decomposed after being formed. Comparing the thermal histories, it can be seen that the oxide semiconductor film 108 has a longer thermal history. After the formation of the compound semiconductor film 108 and before the formation of the oxide semiconductor film 128, at least an insulating film This is because the substrate is heated when the film 110, the insulating film 118, and the like are formed.

[0335] In order to improve the reliability of a transistor, a method for reducing oxygen vacancies in an oxide semiconductor film is required. While it is necessary to have a sufficient heat treatment time, in order to reduce manufacturing costs, It is effective to keep the temperature as low as possible and the heat treatment time as short as possible. In one embodiment of the present invention, as illustrated in FIG. 24, the oxide semiconductor film 128 is made of an oxide semiconductor. Oxygen is more likely to diffuse into the oxide semiconductor film 128 than into the conductive film 108. However, oxygen vacancies are reduced by heat treatment for a shorter time or at a lower temperature than in the oxide semiconductor film 108. In other words, it is possible to reduce the amount of oxygen that easily diffuses into the film, which is one aspect of the present invention. The use of a silicon film as the oxide semiconductor film 128 is effective in reducing the manufacturing cost. do.

[0336] Also, for example, consider a case where the substrate 102 or the insulating film 106 releases a large amount of hydrogen. When hydrogen diffuses into a transistor, hydrogen bonds to oxygen vacancies, increasing the number of carriers. To avoid this, the transistor Tr1, which is close to the hydrogen source, A structure with excellent reliability against diffusion is preferable. The transistor Tr1 has an oxide semiconductor film with small diffusion of elements, and the diffusion of hydrogen and oxygen is small. The transistor Tr2 has a large oxide semiconductor film, which is a barrier against hydrogen diffusion from the substrate. This is effective in reducing the deterioration. In this case, silicon nitride is placed under the transistor Tr2. Examples of films that are difficult for hydrogen to diffuse through include silicon oxide films, silicon nitride films, and aluminum oxide films. It is preferable to form

[0337] In order to reduce the layout area of ​​the transistor, the conductive film 112a and the conductive film 112b are When it is desired to reduce the line width of the conductive film 122a and the conductive film 122b, the effective width of these conductive films is Depending on the material, resistance to thermal migration may be low. The thermal treatment after the formation of the conductive film 112a, the conductive film 112b, the conductive film 122a, and the conductive film 122b It is better to lower the upper limit of the process temperature and shorten the heat treatment time based on the history. Therefore, using a film into which oxygen easily diffuses as the oxide semiconductor film 128 can reduce thermal migration. This is effective in improving reliability when using materials with low resistance to oxidation.

[0338] That is, in one embodiment of this embodiment, although a large field-effect mobility can be obtained, The transistors are designed to have a threshold voltage that is easily changed by hydrogen diffusion and are weak against thermal migration. It is used in devices that require high field-effect mobility, and conversely, it has low field-effect mobility but is resistant to hydrogen diffusion. The transistors designed to have small threshold voltage shifts and high resistance to thermal migration are By using it in elements that require high reliability, it is possible to reduce the layout area of ​​transistors while suppressing degradation. This can be suitably done.

[0339] Note that the structures and methods described in this embodiment mode may be combined as appropriate with structures and methods described in other embodiment modes. It can be used in combination.

[0340] (Embodiment 2)

[0341] <2-1. Composition of oxide semiconductor film> The composition of the oxide semiconductor film according to the present invention will be described below.

[0342] The oxide preferably contains at least indium or zinc. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. It is preferable that the material contains boron, silicon, titanium, or the like. , iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium One selected from zinc, hafnium, tantalum, tungsten, or magnesium Or, multiple types may be included.

[0343] Here, consider a case where the oxide contains indium, element M, and zinc. , aluminum, gallium, yttrium or tin. Other elements M may be used. Available elements include boron, silicon, titanium, iron, nickel, germanium, and zinc. Cobalt, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten However, the element M can be a combination of multiple of the above elements. There are cases where this is acceptable.

[0344] First, with reference to FIGS. 25(A), 25(B), and 25(C), the oxide according to the present invention will be described. The preferred range of the atomic ratio of indium, element M, and zinc contained in the above will be described below. The atomic ratio of oxygen is not shown in FIG. 25. The terms for the atomic ratio of element M and zinc are [In], [M], and [Zn], respectively. do.

[0345] In Figures 25(A), 25(B), and 25(C), the dashed lines represent the [In]:[M] :[Zn]=(1+α):(1-α):1 atomic ratio (-1≦α≦1), The line where the atomic ratio of In]:[M]:[Zn]=(1+α):(1-α):2 is n]:[M]:[Zn]=(1+α):(1-α):3, ]:[M]:[Zn]=(1+α):(1-α):4 atomic ratio line, and [ The line where the atomic ratio of In]:[M]:[Zn]=(1+α):(1-α):5 is shown. .

[0346] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β is :[M]:[Zn]=1:3:β atomic ratio line, [In]:[M]:[Zn] = 1:4:β atomic ratio line, [In]:[M]:[Zn]=2:1:β atoms The line where the atomic ratio is [In]:[M]:[Zn]=5:1:β Represents the

[0347] The dashed double-dashed line indicates the atomic number of [In]:[M]:[Zn]=(1+γ):2:(1-γ). The line where the ratio (-1≦γ≦1) is shown. Oxides with an atomic ratio of [n] = 0:2:1 and values ​​close to that range have a spinel-type crystal structure. Easy to use.

[0348] 25(A) and 25(B) show the indium and An example of a preferred range of the atomic ratio of element M and zinc is shown.

[0349] As an example, FIG. 26 shows InMZnO, where [In]:[M]:[Zn]=1:1:1. 4. Also, Fig. 26 shows the crystal structure of InMZn when observed from a direction parallel to the b axis. The crystal structure of the layer containing M, Zn, and oxygen shown in FIG. The metal element in layer n) represents element M or zinc. In this case, element M and zinc The ratio of elements M and zinc is equal. The element M and zinc can be substituted, and the arrangement is irregular. .

[0350] InMZnO4 has a layered crystal structure (also called a layered structure), as shown in Figure 26. The layer containing indium and oxygen (hereinafter referred to as the In layer) is 1, while the element M, zinc, and The (M,Zn) layer containing oxygen is layer 2.

[0351] Indium and the element M can be substituted for each other. Therefore, the element M in the (M, Zn) layer M can be replaced with indium and expressed as an (In,M,Zn) layer. In that case, the In layer It has a layered structure with one layer and two (In,M,Zn) layers.

[0352] In the oxide with the atomic ratio of [In]:[M]:[Zn]=1:1:2, the In layer is 1 , (M, Zn) layer has 3 layers. That is, [Z When the oxide crystallizes, the ratio of the (M, Zn) layer to the In layer increases. Increase.

[0353] However, in the oxide, the number of (M, Zn) layers per In layer is not an integer. In this case, there are multiple types of layered structures in which the number of (M, Zn) layers is an integer for one In layer. For example, when [In]:[M]:[Zn]=1:1:1.5, the In layer A layered structure with 1 (M,Zn) layer and 2 (M,Zn) layers, and a layered structure with 3 (M,Zn) layers. In some cases, a layered structure may be formed in which

[0354] For example, when forming an oxide film using a sputtering device, deviation from the atomic ratio of the target occurs. In particular, depending on the substrate temperature during film formation, the [Zn ], the [Zn] of the film may be smaller than that of the film.

[0355] In addition, multiple phases may coexist in an oxide (two-phase coexistence, three-phase coexistence, etc.). For example, At atomic ratios close to [In]:[M]:[Zn]=0:2:1, the spin Two phases, a flanking crystal structure and a layered crystal structure, tend to coexist. At atomic ratios close to the atomic ratio of [Zn]=1:0:0, bixbyite-type Two phases, a crystalline structure and a layered crystalline structure, tend to coexist. When multiple phases coexist in an oxide, In the case where grain boundaries are formed between different crystal structures, There is a match.

[0356] In addition, by increasing the indium content, the carrier mobility (electron mobility) of the oxide can be increased. Therefore, oxides with a high indium content can This results in higher carrier mobility compared to oxides with lower porosity.

[0357] On the other hand, when the content of indium and zinc in the oxide is low, the carrier mobility is low. Therefore, the atomic ratio [In]:[M]:[Zn]=0:1:0 and its vicinity In the atomic ratio where the value is small (for example, region C shown in FIG. 25(C)), the insulating property becomes high.

[0358] Therefore, the oxide according to one embodiment of the present invention has a layer structure with high carrier mobility and few grain boundaries. It is preferable that the atomic ratio be that shown in region A in FIG. 25(A), which is likely to result in a structure.

[0359] Also, in region B shown in Figure 25(B), [In]:[M]:[Zn] = 4:2:3 to 4. 1 and its neighboring values. For example, the atomic ratio [In]:[M] :[Zn]=5:3:4. The oxides having the atomic ratio shown in region B are particularly It is an excellent oxide with high crystallinity and high carrier mobility.

[0360] The condition for an oxide to form a layered structure is not uniquely determined by the atomic ratio. The difficulty of forming a layered structure varies depending on the atomic ratio. However, depending on the formation conditions, a layered structure may or may not be formed. The regions shown are regions showing the atomic ratios in which the oxide has a layered structure, and are regions A to C. The boundary is not strict.

[0361] Next, the case where the oxide is used in a transistor will be described.

[0362] By using the above oxide in a transistor, carrier scattering at grain boundaries can be reduced. This allows realization of a transistor with high field effect mobility. Furthermore, a highly reliable transistor can be realized.

[0363] In addition, it is preferable to use an oxide with a low carrier density for the transistor. For example, The oxide has a carrier density of 8×10 11 cm -3 Less than 1 x 10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 9 cm -3 That's all. That's fine.

[0364] In addition, high-purity intrinsic or substantially high-purity intrinsic oxides have fewer carrier generation sources. Therefore, the carrier density can be reduced. Since the oxide having the above structure has a low density of defect states, the density of trap states may also be low.

[0365] In addition, the charges trapped in the oxide trap levels take a long time to disappear. Therefore, oxides with high trap level density are A transistor having a channel region formed therein may have unstable electrical characteristics.

[0366] Therefore, in order to stabilize the electrical characteristics of the transistor, it is necessary to reduce the impurity concentration in the oxide. In order to reduce the impurity concentration in the oxide, it is effective to It is also preferable to reduce the concentration of impurities. Impurities include hydrogen, nitrogen, alkali metals, and alkali metals. These include alkaline earth metals, iron, nickel, and silicon.

[0367] Here, the influence of each impurity in the oxide will be explained.

[0368] When oxides contain silicon or carbon, which are elements of Group 14, Therefore, the concentration of silicon and carbon in the oxide and the The concentration of silicon and carbon near the interface was measured by secondary ion mass spectroscopy (SIMS). The concentration obtained by ion mass spectrometry) is calculated by 2 x 1 0 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following .

[0369] In addition, if an oxide contains an alkali metal or alkaline earth metal, defect levels are formed, Therefore, alkali metals or alkaline earth metals may be included. Transistors using oxides containing SiO2 tend to be normally-on. It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the product. is the concentration of alkali metals or alkaline earth metals in the oxide obtained by SIMS, 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 below To do so.

[0370] In addition, when nitrogen is contained in an oxide, electrons that act as carriers are generated, and the carrier density As a result, transistors using oxides containing nitrogen as semiconductors are Therefore, nitrogen should be contained as little as possible in the oxide. For example, the nitrogen concentration in the oxide is preferably reduced by SIMS. 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 below , more preferably 1 × 10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0371] In addition, the hydrogen contained in the oxide reacts with the oxygen that bonds with the metal atoms to form water, so oxygen When hydrogen enters the oxygen vacancy, electrons, which act as carriers, are generated. In addition, some of the hydrogen atoms may bond with oxygen atoms that bond with metal atoms, forming carriers. Therefore, transistors using oxides containing hydrogen Therefore, hydrogen in the oxide is reduced as much as possible. Specifically, it is preferable that the hydrogen concentration of the oxide is measured by SIMS. , 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Less than.

[0372] By using an oxide with sufficiently reduced impurities for the channel formation region of a transistor, It is possible to impart specific electrical properties.

[0373] <2-2. Carrier density of oxide semiconductor film> Next, the carrier density of an oxide semiconductor film will be described below.

[0374] The factors that affect the carrier density of an oxide semiconductor film include oxygen deficiency in the oxide semiconductor film and Loss (V o ), impurities in the oxide semiconductor film, and the like.

[0375] When the number of oxygen vacancies in the oxide semiconductor film increases, hydrogen bonds to the oxygen vacancies (this state is called V o H When the oxide semiconductor film is heated, the density of defect states increases. As the impurity concentration in the oxide semiconductor film increases, the density of defect states due to the impurities increases. By controlling the density of defect states, the carrier density of the oxide semiconductor film can be controlled. .

[0376] Here, a transistor using an oxide semiconductor film for a channel region will be considered.

[0377] Suppression of a negative shift in the threshold voltage of a transistor or suppression of the off-state current of a transistor In order to reduce the carrier density, it is preferable to reduce the carrier density of the oxide semiconductor film. When the carrier density of the oxide semiconductor film is to be reduced, impurities in the oxide semiconductor film In this specification and the like, the impurity concentration is low, and the defect level density is low. High purity intrinsic or substantially high purity intrinsic means that the defect level density is low. The carrier density of the oxide semiconductor film is 8×10 15 cm -3 Less than 1x, preferably 10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 - 9 cm -3 That's all there is to it.

[0378] On the other hand, the improvement of the on-state current of the transistor or the field-effect mobility of the transistor In this case, it is preferable to increase the carrier density of the oxide semiconductor film. In order to increase the carrier density of the oxide semiconductor film, the impurity concentration of the oxide semiconductor film is Alternatively, the density of defect states in the oxide semiconductor film may be increased slightly. In this case, it is preferable to make the band gap of the oxide semiconductor film smaller. The impurity concentration is slightly high within the range where the on / off ratio of the Id-Vg characteristics can be obtained, or The oxide semiconductor film having a slightly high density of defect states can be considered to be substantially intrinsic. The affinity is large, and the band gap is accordingly small, resulting in thermal excitation. The oxide semiconductor film in which the density of electrons (carriers) is increased can be considered to be substantially intrinsic. When an oxide semiconductor film having a higher electron affinity is used, the threshold voltage of the transistor is The pressure becomes lower.

[0379] The carrier density of a substantially intrinsic oxide semiconductor film is 1×10 5 cm -3 More than 1×10 18 cm -3 Less than 1 x 10 is preferable. 7 cm -3 More than 1×10 17 cm -3 The following is preferred: 1×10 9 cm -3 5x10 or more 16 cm -3 Even better: 1 x 10 1 0 cm -3 More than 1×10 16 cm -3 Even better: 1 x 10 11 cm -3 End 1×10 15 cm -3 The following is even more preferred:

[0380] Furthermore, by using the above-described substantially intrinsic oxide semiconductor film, the reliability of the transistor is improved. Here, referring to FIG. 27, a transistor using an oxide semiconductor film for a channel region will be described. The reason why the reliability of the transistor is improved will be described. 1 is a diagram illustrating an energy band in a transistor used in a channel region. FIG.

[0381] In FIG. 27, GE denotes a gate electrode, GI denotes a gate insulating film, and OS denotes an oxide semiconductor film. , SD represent the source electrode or the drain electrode, respectively. an electrode, a gate insulating film, an oxide semiconductor film, and a source electrode in contact with the oxide semiconductor film; 1 is an example of an energy band of a drain electrode.

[0382] In addition, in FIG. 27, a silicon oxide film is used as a gate insulating film, and an oxide semiconductor film is used as a gate insulating film. In the structure, In-Ga-Zn oxide is used. The defect transition level (εf) is located approximately 3.1 eV away from the bottom of the conduction band of the gate insulating film. The oxide semiconductor film and silicon oxide film are formed when the gate voltage (Vg) is 30 V. The Fermi level (Ef) of the silicon oxide film at the interface with the film is the minimum conduction band of the gate insulating film. The Fermi layer of the silicon oxide film is formed at a distance of about 3.6 eV from the The level varies depending on the gate voltage. For example, by increasing the gate voltage, The Fermi level (Ef) of the silicon oxide film at the interface between the semiconductor film and the silicon oxide film is In addition, the white circles in Figure 27 represent electrons (carriers), and X in Figure 27 represents silicon oxide. represents the defect level in the silicon film.

[0383] As shown in Figure 27, when a gate voltage is applied, for example, if carriers are thermally excited, , carriers are trapped in the defect level (X in the figure), and the charge changes from positive ("+") to neutral ( The charge state of the defect level changes to "0". That is, the Fermi level ( The value obtained by adding the thermal excitation energy to the above-mentioned Ef is higher than the defect transition level (εf). When the charge level of the defect in the silicon oxide film is changed from a positive state to a neutral state, the transistor This causes the threshold voltage of the capacitor to shift in the positive direction.

[0384] In addition, when oxide semiconductor films having different electron affinities are used, the gate insulating film and the oxide semiconductor film The depth at which the Fermi level is formed at the interface between oxides with large electron affinities may differ. When a semiconductor film is used, the gate insulating film is formed near the interface between the gate insulating film and the oxide semiconductor film. In this case, the defect level that can be formed in the gate insulating film (X in Figure 27) is also relatively high, so the Fermi level of the gate insulating film and the oxide semiconductor The energy difference between the Fermi level of the film and the SiO2 becomes large. Therefore, the amount of charge trapped in the gate insulating film is reduced. For example, in the case of the silicon oxide film described above, The change in the charge state of the defect level that can be formed in the gate bias heat (Gate Transistor under Bias Temperature (GBT) stress This can reduce the fluctuation in the threshold voltage of the transistor.

[0385] Furthermore, in a transistor using an oxide semiconductor film for a channel region, carrier diffusion at grain boundaries This reduces the disturbances and allows realization of a transistor with high field effect mobility. Furthermore, a highly reliable transistor can be realized.

[0386] In addition, it takes a long time for charges trapped in defect states in the oxide semiconductor film to disappear. Therefore, oxides with high defect level density A transistor in which a channel region is formed in a semiconductor film may have unstable electrical characteristics. do.

[0387] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is In addition, in order to reduce the impurity concentration in the oxide semiconductor film, It is preferable to reduce the impurity concentration in the adjacent film. Examples include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0388] Here, the influence of each impurity in the oxide semiconductor film will be described.

[0389] When silicon or carbon, which is one of the group 14 elements, is contained in an oxide semiconductor film, oxidation Therefore, the defect level is formed in the oxide semiconductor film. The concentration of silicon and carbon near the interface with the oxide semiconductor film (secondary ion mass spectrometry) Analysis method (SIMS: Secondary Ion Mass Spectrometry) ) is calculated by dividing the concentration by 2 × 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0390] Furthermore, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, the defect level is reduced. Therefore, alkali metals or alkaline earth metals A transistor using an oxide semiconductor film containing Therefore, the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film is reduced. Specifically, it is preferable that the alkali metal in the oxide semiconductor film obtained by SIMS Or the concentration of alkaline earth metals is 1 x 10 18 atoms / cm 3 Below, preferably 2 x10 16 atoms / cm 3 Do the following:

[0391] Furthermore, when nitrogen is contained in the oxide semiconductor film, electrons that serve as carriers are generated, and As a result, the oxide semiconductor film containing nitrogen is easily turned into an n-type semiconductor. A transistor using the oxide semiconductor as a conductor tends to have normally-on characteristics. In the film, it is preferable that nitrogen is reduced as much as possible. For example, in an oxide semiconductor film, The nitrogen concentration in the sample was 5×10 19 atoms / cm 3 Less than, preferably 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0392] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, when an oxide semiconductor film containing hydrogen is used, electrons that act as carriers are generated. The transistor using this MOSFET tends to be normally on. It is preferable that hydrogen be reduced as much as possible. The hydrogen concentration obtained by SIMS was 1×10 20 atoms / cm 3 Less than, preferably is 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Less than.

[0393] An oxide semiconductor film in which impurities are sufficiently reduced is used for a channel formation region of a transistor. This makes it possible to impart stable electrical properties.

[0394] The oxide semiconductor film has an energy gap of 2 eV or more, or 2.5 eV or more. It is preferable to do so.

[0395] The thickness of the oxide semiconductor film is 3 nm to 200 nm, preferably 3 nm to 100 nm. 0 nm or less, and more preferably 3 nm or more and 60 nm or less.

[0396] 2-3. Structure of oxide semiconductor film Next, the structure of the oxide semiconductor film will be described.

[0397] The oxide semiconductor film is classified into a single-crystal oxide semiconductor film and a non-single-crystal oxide semiconductor film. As a non-single-crystal oxide semiconductor film, CAAC-OS (c-axis-aligned oxide semiconductor) gned crystalline oxide semiconductor), polycrystalline nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS) amorphous oxide semiconductors, and amorphous oxide semiconductors etc.

[0398] From another point of view, the oxide semiconductor film is classified into an amorphous oxide semiconductor film and a crystalline oxide semiconductor film. Crystalline oxide semiconductor films are classified into single-crystal oxide semiconductor films and Examples of such an OS include a CAAC-OS, a polycrystalline oxide semiconductor film, and an nc-OS.

[0399] Amorphous structures are generally isotropic and have no heterogeneous structure, and are metastable arrangements of atoms. The bond angles are flexible, and there is short-range order but no long-range order. It is said that...

[0400] That is, a stable oxide semiconductor film is formed into a completely amorphous In addition, the film is not isotropic (for example, in a small area, An oxide semiconductor film having a periodic structure cannot be called a completely amorphous oxide semiconductor film. On the other hand, a-like OS is not isotropic but has unstable voids. In terms of instability, a-like OS is physically an amorphous oxide. It is similar to a semiconductor film.

[0401] [CAAC-OS] First, let me explain about CAAC-OS.

[0402] CAAC-OS is an oxide semiconductor having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of conductive film.

[0403] CAAC-OS is an oxide semiconductor film with high crystallinity. The crystallinity of the oxide semiconductor film is determined by the presence of impurities. CAAC-OS is designed to be free from impurities and defects. It can also be said that the oxide semiconductor film has few defects (such as oxygen vacancies).

[0404] Note that the impurities are elements other than the main components of the oxide semiconductor film, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more likely to be present than metal elements constituting the oxide semiconductor film. An element that has a strong bond to oxygen can remove oxygen from the oxide semiconductor film and become an element of the oxide semiconductor film. In addition, heavy metals such as iron and nickel, and aluminum Carbon dioxide and other carbon-dioxide species have large atomic radii (or molecular radii), so they are difficult to form oxide semiconductor films. This disrupts the atomic arrangement and causes a decrease in crystallinity.

[0405] [nc-OS] Next, we will explain nc-OS.

[0406] We will explain the case where nc-OS is analyzed by XRD. For example, When structural analysis is performed using the out-of-plane method, no peaks indicating orientation appear. That is, the crystals of nc-OS do not have any orientation.

[0407] The nc-OS is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS has a lower density of defect states than the a-like OS and the amorphous oxide semiconductor film. However, in the case of nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS may have a higher density of defect states than the CAAC-OS.

[0408] [a-like OS] The a-like OS is an oxide film with a structure between the nc-OS and the amorphous oxide semiconductor film. It is a semiconductor film.

[0409] A-like OS has porosity or low density areas. A-like OS has porosity Therefore, it is an unstable structure.

[0410] In addition, a-like OS has porosity, so compared to nc-OS and CAAC-OS, It is a low-density structure. Specifically, the density of a-like OS is The density of nc-OS and CAAC-O is 78.6% or more and less than 92.3%. The density of S is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a conductivity of less than 78%.

[0411] For example, in an oxide semiconductor film having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor film having an atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 is less than. For example, in an oxide semiconductor film having an atomic ratio of In:Ga:Zn=1:1:1, The densities of nc-OS and CAAC-OS are 5.9 g / cm 3 More than 6.3g / c m 3 is less than.

[0412] If single crystals of the same composition do not exist, single crystals of different compositions can be combined in any ratio. By doing so, it is possible to estimate the density equivalent to that of a single crystal with a desired composition. The density corresponding to a single crystal of a desired composition is calculated by the ratio of the single crystals of different compositions combined. The density can be estimated using a weighted average. However, the density should be calculated by combining as few types of single crystals as possible. It is preferable to estimate them together.

[0413] As described above, oxide semiconductor films have various structures and each structure has various characteristics. Note that the oxide semiconductor film of one embodiment of the present invention may be an amorphous oxide semiconductor film, an a-like OS film, or an amorphous oxide semiconductor film. Two or more of the above-mentioned NC-OS and CAAC-OS may be mixed. is shown below.

[0414] The oxide semiconductor film of one embodiment of the present invention can be an oxide semiconductor film including two types of crystal parts. In other words, it is an oxide semiconductor film in which two types of crystal parts are mixed. The first crystal part is formed in the thickness direction of the film (the direction of the film surface, the surface on which the film is formed, or the surface of the film). The crystal part has orientation in the direction perpendicular to the crystal axis, i.e., the crystal part has c-axis orientation. The other part of the crystal (also called the second crystal) does not have a c-axis orientation and is oriented in various directions. This is the crystalline part.

[0415] In the following, for ease of explanation, the crystal portion having the c-axis orientation is referred to as the first crystal portion, The crystal part without axial orientation is explained separately from the second crystal part, but these are not crystallinity or crystal orientation. In other words, there are cases where the oxides of one embodiment of the present invention cannot be distinguished because there is no difference in the size of the crystals. The compound semiconductor film can also be expressed without distinguishing between these.

[0416] For example, the oxide semiconductor film of one embodiment of the present invention has a plurality of crystal parts. It is sufficient that at least one of the crystal parts in the film has a c-axis orientation. Among the crystalline parts, the crystalline parts without c-axis orientation are more numerous than the crystalline parts with c-axis orientation. For example, the oxide semiconductor film of one embodiment of the present invention may have a thickness In the cross-sectional image taken by a transmission electron microscope, multiple crystals were observed. The second crystal portion having no c-axis orientation among the plurality of crystal portions is a first crystal portion having c-axis orientation. In other words, the oxide semiconductor film of one embodiment of the present invention may be observed to have more crystal portions than the oxide semiconductor film. In the case of the crystalline structure, the proportion of the second crystal portions not having the c-axis orientation is high.

[0417] By increasing the proportion of the second crystal parts that do not have c-axis orientation in the oxide semiconductor film, It has the following excellent effects:

[0418] When there is a sufficient oxygen supply source near the oxide semiconductor film, The crystal part of 2 can be a diffusion path for oxygen. When there is a supply source, a crystal having a c-axis orientation is formed through a second crystal portion not having a c-axis orientation. Oxygen can be supplied to the first crystal portion, thereby eliminating oxygen vacancies in the oxide semiconductor film. Such an oxide semiconductor film can be applied to a semiconductor film of a transistor. By doing so, it becomes possible to obtain high reliability and high field effect mobility.

[0419] In addition, the first crystal portion has a specific crystal plane oriented in the thickness direction of the film. , an X-ray diffraction pattern in a direction approximately perpendicular to the top surface of the oxide semiconductor film including the first crystal part is obtained. When X-ray diffraction (XRD) measurements are performed, the diffraction angle (2 On the other hand, a diffraction peak due to the first crystal portion is observed at θ. Even if the crystal part of 1 is present, the scattering of X-rays by the support substrate or the increase in background In some cases, the diffraction peaks may not be clearly visible due to the difference in the height (intensity) of the diffraction peaks. increases in accordance with the proportion of the first crystal portions contained in the oxide semiconductor film, It can also be used as an index to estimate the crystallinity of a conductive film.

[0420] Furthermore, electron diffraction can be used as a method for evaluating the crystallinity of an oxide semiconductor film. For example, electron diffraction measurement is performed on a cross section of the oxide semiconductor film of one embodiment of the present invention. When the pattern is observed, a first region having a diffraction spot caused by the first crystal portion is identified; A second region having a diffraction spot caused by the second crystalline portion is observed.

[0421] The first region having the diffraction spots caused by the first crystalline portion is a crystalline portion having a c-axis orientation. On the other hand, the second region having the diffraction spots due to the second crystal part is due to the orientation It is derived from crystalline parts that have no orientation or are randomly oriented in all directions. Therefore, the beam diameter of the electron beam used for electron diffraction, i.e., the area of ​​the region to be observed, varies. In this specification, the beam diameter of the electron beam is defined as 1n Electron diffraction measured at a diameter of more than 100 nm is called nanobeam electron diffraction (NBED). This is called Nano Beam Electron Diffraction.

[0422] However, the crystallinity of the oxide semiconductor film of one embodiment of the present invention was evaluated by a method different from NBED. Examples of methods for evaluating the crystallinity of an oxide semiconductor film include electron diffraction, X-ray diffraction, and neutral Among electron diffraction methods, in addition to the NBED mentioned above, there is also a transmission electron microscope. Mirror (TEM: Transmission Electron Microscopy), Scanning Electron Microscope (SEM) y), Convergent Beam Electron Diffraction (CBED) Diffraction), Selected Area Electron Diffraction (SAED) Electron Diffraction) can be suitably used.

[0423] In addition, in NBED, the electron beam diameter is increased (for example, 25 nmΦ or more). Nanobeam electron diffraction patterns of 100 nm or less, or 50 nm or more and 100 nm or less A ring-shaped pattern is observed in the turn. On the other hand, in NBED, the beam diameter of the electron beam is sufficiently small. In the electron diffraction image under the condition of extremely small diameter (for example, 1 nm or more and 10 nm or less), Multiple spots distributed in the circumferential direction (also called the θ direction) were observed at the location of the circle-shaped pattern. In other words, the ring-shaped electron beams observed under conditions where the electron beam diameter is increased may be The pattern is formed by a collection of the above-mentioned multiple spots.

[0424] 2-4. Evaluation of the crystallinity of oxide semiconductor films Below, three samples (samples X1 to X3) in which oxide semiconductor films were formed under different conditions are described. First, the preparation method of samples X1 to X3 will be explained. Reveal.

[0425] [Sample X1] Sample X1 is a sample in which an oxide semiconductor film with a thickness of approximately 100 nm is formed on a glass substrate. The oxide semiconductor film contains indium, gallium, and zinc. The conditions for forming the semiconductor film were as follows: the substrate was heated to 170°C and argon was introduced at a flow rate of 140 sccm. A nitrogen gas and oxygen gas at a flow rate of 60 sccm were introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide target containing indium, gallium, and zinc was used. A 2.5 kW AC power was applied to the In:Ga:Zn=4:2:4.1 [atomic ratio]. The oxygen flow rate ratio in the manufacturing conditions for sample X1 was 30%.

[0426] [Sample X2] Sample X2 is a sample in which an oxide semiconductor film with a thickness of approximately 100 nm is formed on a glass substrate. The oxide semiconductor film of sample X2 was formed under the conditions of heating the substrate to 130°C and using a flow rate of 180 Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were supplied to the chamber of the sputtering device. The oxygen flow rate ratio in the fabrication conditions for sample X2 was 10%. The conditions other than the substrate temperature and oxygen flow rate ratio were the same as those for sample X1. did.

[0427] [Sample X3] Sample X3 is a sample in which an oxide semiconductor film with a thickness of approximately 100 nm is formed on a glass substrate. The oxide semiconductor film of sample X3 was formed under the following conditions: the substrate was kept at room temperature (RT), and the flow rate was 1 Argon gas at a flow rate of 80 sccm and oxygen gas at a flow rate of 20 sccm were The oxygen flow rate in the preparation condition for sample X3 was 10%. The conditions other than the substrate temperature and oxygen flow rate ratio were the same as those for sample X1. The matter was decided as follows.

[0428] Table 1 shows the conditions for forming samples X1 to X3.

[0429] [Table 1]

[0430] Next, the crystallinity of the prepared samples X1 to X3 was evaluated. The crystallinity was evaluated by cross-sectional TEM observation, XRD measurement, and electron beam diffraction.

[0431] [Cross-sectional TEM observation] 28, 29, and 30 show the cross-sectional TEM observation results of samples X1 to X3. 28(A) and (B) are cross-sectional TEM images of sample X1, and FIGS. 29(A) and (B) are cross-sectional TEM images of sample X2. 30(A) and (B) are cross-sectional TEM images of sample X3.

[0432] Also, Figure 28(C) shows a high-resolution transmission electron microscope (HR-TEM) image of the cross section of sample X1. 29(C) is a cross-sectional HR-TEM image of sample X2. Figure 30(C) is a cross-sectional HR-TEM image of sample X3. -Spherical aberration correction (SCA) is used for TEM image observation. A high-resolution TEM image using the spherical aberration correction function can be obtained. This is called a Cs-corrected high-resolution TEM image. Observation was performed using an atomic resolution analytical electron microscope such as JEM-ARM200F manufactured by Komatsu Corporation. This can be done.

[0433] As shown in FIGS. 28 and 29, in Samples X1 and X2, atoms are arranged in layers in the film thickness direction. In particular, the HR-TEM image shows crystals arranged in layers. As shown in Figure 30, in sample X3, atoms are layered in the film thickness direction. It is difficult to see how they are arranged.

[0434] [XRD measurement] Next, the XRD measurement results of each sample will be explained.

[0435] Figure 31(A) shows the XRD measurement results for sample X1, and Figure 32(A) shows the XRD measurement results for sample X2. and Fig. 33(A) shows the XRD measurement results of sample X3.

[0436] In XRD measurement, the powder method (also known as the θ-2θ method), which is a type of out-of-plane method, is used. The θ-2θ method involves changing the incident angle of the X-rays and placing a This is a method for measuring X-ray diffraction intensity by setting the angle of the detector to the same as the angle of incidence. X-rays were incident from an angle of approximately 0.40° from the film surface, and the X-ray diffraction intensity was measured by changing the detector angle. GIXRD (Grazing Intensity Measurement) is an out-of-plane method for measuring the Incidence XRD method (also known as thin film method or Seemann-Bohlin method) The vertical axis in Figures 31(A), 32(A), and 33(A) represents the rotational speed. The folding strength is shown in arbitrary units, and the horizontal axis represents the angle 2θ.

[0437] As shown in FIG. 31(A) and FIG. 32(A), in the samples X1 and X2, 2θ= A peak in diffraction intensity is observed around 31°. On the other hand, as shown in FIG. 33(A), In X3, the peak of the diffraction intensity around 2θ=31° is difficult to confirm, or The diffraction intensity peak around 1° is extremely small, or the diffraction intensity peak around 2θ=31° is There is no work.

[0438] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was This coincides with the diffraction angle of the (009) plane in the structural model of O4. In sample X2, the above peak was observed, indicating that the c-axis was oriented in the film thickness direction. (hereinafter, also referred to as a crystal portion having c-axis orientation or a first crystal portion) It can be seen that sample X3 has a c-axis orientation from the XRD measurement. It is difficult to determine whether crystals are present.

[0439] [Electron Diffraction] Next, the results of electron diffraction measurements on samples X1 to X3 will be described. In electron diffraction measurements, the electron diffraction patterns are measured when an electron beam is incident perpendicularly on the cross section of each sample. The electron beam diameter was set to two values: 1 nmΦ and 100 nmΦ.

[0440] In electron diffraction, not only the beam diameter of the incident electron beam but also the thickness of the sample The electron diffraction pattern contains information about the depth direction. In addition to reducing the beam diameter of the sagittal beam, the thickness of the sample in the depth direction can be reduced to achieve a more accurate measurement. On the other hand, if the thickness of the sample in the depth direction is too thin, In this case (for example, when the thickness of the sample in the depth direction is 5 nm or less), only information on an extremely small area can be obtained. Therefore, if crystals exist in a very small area, the electron beam diffraction pattern obtained will be The turns may have a pattern similar to that of a single crystal. If this is not practical, the thickness of the sample in the depth direction should be, for example, 10 nm or more and 100 nm or less. Generally speaking, it is preferable that the thickness is 10 nm or more and 50 nm or less.

[0441] Figures 31(B) and 31(C) show the electron diffraction patterns of sample X1, and Figures 32(B) and 32(C) show the electron diffraction patterns of sample X2. The electron diffraction pattern of sample X1 is shown in Figure 33(B) and (C) is shown in Figure 33(C). Each is shown below.

[0442] The electron beams shown in Figures 31(B)(C), 32(B)(C), and 33(B)(C) The diffraction pattern is an image in which the contrast has been adjusted to make the electron beam diffraction pattern clear. 31(B)(C), 32(B)(C), and 33(B)(C) ), the brightest spot in the center is due to the incident electron beam. This is the center of the diffraction pattern (also called the direct spot or transmitted wave).

[0443] Furthermore, as shown in FIG. 31(B), when the beam diameter of the incident electron beam is 1 nmΦ, As multiple spots distributed circumferentially can be seen, the oxide semiconductor film is extremely small. It can also be seen that multiple crystal parts with plane orientations in various directions are mixed together. As shown in FIG. 31(C), when the beam diameter of the incident electron beam is set to 100 nmΦ, The diffraction spots from multiple crystal parts are connected, and the brightness is averaged to form a ring-shaped diffraction pattern. In addition, in Figure 31(C), two ring-shaped circuits with different radii are The folding pattern can be seen. Here, the rings with the smaller diameter are called the first ring, the second ring, and so on. It can be seen that the first ring is brighter than the second ring. In addition, two bright spots (first region) were observed where the first ring overlapped. will be done.

[0444] The radial distance from the center of the first ring is This is almost the same as the radial distance from the center of the diffraction spot on the (009) plane. Region 1 is a diffraction spot due to the c-axis orientation.

[0445] In addition, as shown in Figure 31(C), a ring-shaped diffraction pattern is observed, which indicates that the acid In the nitride semiconductor film, there are crystal parts oriented in all directions (hereinafter, referred to as crystal parts without c-axis orientation). In other words, there are crystal parts (also referred to as crystal parts or second crystal parts).

[0446] The two first regions are arranged symmetrically with respect to the center point of the electron beam diffraction pattern, and the brightness are similar, it is inferred that they have two-fold symmetry. Since the two first regions are diffraction spots due to the c-axis orientation, The direction of the line connecting the center and the center coincides with the direction of the c-axis of the crystal part. In the oxide semiconductor film, the c-axis is oriented in the film thickness direction. It can be seen that there are crystalline parts.

[0447] As described above, the oxide semiconductor film of sample X1 has a crystalline part with c-axis orientation and a crystalline part with c-axis orientation. It can be seen that the film contains a mixture of crystalline parts with and without crystalline parts.

[0448] In the electron diffraction patterns shown in FIGS. 32(B)(C) and 33(B)(C), The results are roughly the same as those of the electron diffraction patterns shown in Fig. 1(B)(C). The brightness of the resulting two spots (first region) is in the order of sample X1, sample X2, and sample X3. It is suggested that the abundance ratio of crystal parts with a bright and c-axis orientation increases in this order.

[0449] [Method for quantifying the crystallinity of oxide semiconductor films] Next, an example of a method for quantifying the crystallinity of an oxide semiconductor film will be described with reference to FIGS. 34 to 36. explain.

[0450] First, an electron beam diffraction pattern is prepared (see FIG. 34(A)).

[0451] Note that in FIG. 34A, the beam diameter is 100 nm for a 100-nm-thick oxide semiconductor film. 34(B) shows the electron diffraction pattern measured by the electron beam diffraction method shown in FIG. 34(A). This is an electron beam diffraction pattern after the contrast of the pattern has been adjusted.

[0452] In Figure 34(B), two clear spots (first area) are visible above and below the direct spot. These two spots (first region) are the structural model of InGaZnO4. The diffraction spots corresponding to (001) in the crystals, i.e., the c-axis oriented crystals, On the other hand, apart from the first region, there is a region of low brightness approximately concentric with the first region. A ring-shaped pattern (second region) appears overlapping. This is due to the electron beam diameter being 100 nm. By doing so, the strain caused by the structure of the crystal part (second crystal part) that does not have the c-axis orientation can be reduced. The brightness of the pots is averaged and formed into a ring shape.

[0453] Here, the electron diffraction pattern has diffraction spots due to crystal parts having c-axis orientation. The first region having the diffraction spots due to the second crystal portion overlaps with the second region having the diffraction spots due to the second crystal portion. Therefore, a line profile including the first region and a line profile including the second region are observed. By acquiring and comparing the in-profile, it is possible to quantify the crystallinity of the oxide semiconductor film. become.

[0454] First, a line profile including the first region and a line profile including the second region are This will be explained with reference to FIG.

[0455] Figure 35 shows the structure of InGaZnO4 irradiated with an electron beam from the (100) plane. The electron diffraction simulation pattern obtained when the ' and area C-C' are indicated by auxiliary lines.

[0456] The region A-A' shown in FIG. 35 shows two diffraction beams originating from the first crystal part having the c-axis orientation. The area B-B' and the area B-B' shown in FIG. In the region C-C', diffraction spots due to the first crystal part having c-axis orientation were observed. The area includes a line passing through the direct spot and the area without the direct spot. The angle at which the 'or area C-C' intersects is around 34°, specifically, between 30° and 38°. Preferably, the angle is 32° or more and 36° or less, and more preferably, 33° or more and 35° or less. good.

[0457] Note that the line profile exhibits a tendency as shown in FIG. 36 depending on the structure of the oxide semiconductor film. Figure 36 shows the image of the line profile for each structure, the relative brightness R, and The half-width (FWHM) of the spectrum due to the c-axis orientation obtained from the electron diffraction pattern FIG. 1 is a diagram illustrating a full width at half maximum.

[0458] The relative luminance R shown in FIG. 36 is the integral intensity of the luminance in the area A-A' relative to the area B- B' or the integrated intensity of brightness in the region C-C'. The integrated intensity of the luminance in the areas A-A', B-B', and C-C' is In this case, the background brightness caused by the direct spot appearing at the center position is removed. It has been removed.

[0459] By calculating the relative brightness R, the strength of the c-axis orientation can be quantitatively determined. For example, as shown in FIG. 36, in a single-crystal oxide semiconductor film, the c-axis orientation of the region A-A′ The peak intensity of the diffraction spot due to the first crystal portion having the property is high, and the region B-B' and In region C-C', no diffraction spots due to the first crystal part with c-axis orientation are observed. Therefore, the relative brightness R exceeds 1 and becomes extremely large. AC only (details on CAAC will be described later), CAAC + Nanocrystal, The order of the crystal orientation is nanocrystal, amorphous, and so on. For non-transparent nanocrystals and amorphous materials, the relative luminance R is 1.

[0460] In addition, the higher the periodicity of the crystal structure, the more the spectrum resulting from the first crystal part having the c-axis orientation. The intensity of the toll becomes higher and the half width of the spectrum becomes smaller. The narrowest width is CAAC only, CAAC + Nanocrystal, Nanocrys The half-width increases in the order of amorphous, and the half-width is very large in amorphous. This results in a profile called low.

[0461] [Line profile analysis] As described above, the integral intensity of the luminance in the first region and the integral intensity of the luminance in the second region are The intensity ratio to the degree of orientation is important information in that it allows one to estimate the proportion of oriented crystal parts present.

[0462] Therefore, from the electron diffraction patterns of the samples X1 to X3 shown above, the line profile Analysis was performed using the following method.

[0463] The line profile analysis results for sample X1 are shown in Figure 37 (A1) and (A2), and the line profile analysis results for sample X2 are shown in Figure 37 (A1) and (A2). The analysis results by line profile are shown in Figure 37 (B1) (B2), and the line profile of sample X3 is shown. The analysis results of the files are shown in Figures 37(C1) and 37(C2), respectively.

[0464] 37(A1) shows the electron diffraction pattern shown in FIG. 31(C) in the region A-A' and the region 37(B1) is an electron diffraction pattern showing the regions B-B' and C-C'. The electron beam diffraction pattern shown in FIG. 32(C) includes the regions A-A', B-B', and CC 37(C1) is the electron diffraction pattern shown in FIG. 33(C). Electron diffraction pattern showing areas A-A', B-B', and C-C' It's our turn.

[0465] In addition, the regions A-A', B-B', and C-C' are regions of the electron beam diffraction pattern. It can be calculated by normalizing the brightness of the direct spot that appears at the center position. This also allows for relative comparisons between samples.

[0466] In addition, when calculating the brightness profile, the brightness components due to inelastic scattering from the sample, etc. Subtracting this as background allows for more accurate comparison. The brightness component due to inelastic scattering has a very broad profile in the radial direction. To obtain a good image, the background brightness may be calculated by linear approximation. Draw straight lines along both sides of the peak, and then back up the area that is lower in brightness than the lines. can be subtracted as background.

[0467] Here, from the data after background subtraction using the method described above, the area A-A', The integrated intensity of the brightness in the area B-B' and the area C-C' was calculated. The integrated intensity of the luminance in the region A' is calculated by dividing the integrated intensity of the luminance in the region B-B', or the region C- The value obtained by dividing the luminance at C' by the integrated intensity was calculated as the relative luminance R.

[0468] Figure 38 shows the relative luminance R of samples X1 to X3. A2), 37(B2), and 37(C2) in the luminance profile. In the spectrum located to the left and right of the spot, the integrated intensity of the brightness in the region A-A' is The value of the luminance in the region B-B' divided by the integrated intensity, and the value of the luminance in the region A-A' divided by the integrated intensity The intensity was divided by the integrated intensity of the brightness in the region C-C'.

[0469] Calculating from the results shown in FIG. 38, the integrated intensities of samples X1 to X3 are as follows: be. Integrated intensity of sample X1 = 25.00 Integrated intensity of sample X2 = 3.04 Integrated intensity of sample X3 = 1.05 The integrated intensity was the average value at four positions. The highest scores are X1, followed by sample X2 and sample X3.

[0470] The oxide semiconductor film of one embodiment of the present invention is used as a semiconductor film in which a channel of a transistor is formed. In this case, the relative luminance R is more than 1 and not more than 40, preferably more than 1 and not more than 10, It is preferable to use an oxide semiconductor film having an intensity ratio of more than 1 and not more than 3. By using such an oxide semiconductor film as a semiconductor film, it is possible to achieve high stability of electrical characteristics and low gate voltage. This makes it possible to achieve both high field-effect mobility in a low field-effect region.

[0471] <2-5. Crystalline fraction> The proportion of crystalline parts in an oxide semiconductor film can be estimated by analyzing a cross-sectional TEM image. can.

[0472] First, the image analysis method will be explained. The TEM images were subjected to two-dimensional fast Fourier transform (FFT). The resulting FFT image is then processed to obtain periodic The masked FFT image is then processed to remove the rest of the image. , 2D Inverse Fast Fourier Transform (IFFT) transform) to obtain an FFT filtered image.

[0473] This allows us to obtain a real space image that extracts only the crystalline portion. The proportion of crystalline parts can be estimated from the area ratio. By subtracting the remaining area from the area of ​​the original image (also called the area of ​​the original image), the area other than the crystal part can be determined. The proportion of each part can be estimated.

[0474] Figure 39(A1) shows a cross-sectional TEM image of sample X1, and Figure 39(A2) shows a cross-sectional TEM image of sample X1. The images obtained after image analysis are shown in Fig. 39(B1). The area TEM image is shown in Figure 39(B2), and the image obtained after image analysis of the cross-sectional TEM image of sample X2 is shown in Figure 39(B3). Also, Fig. 39(C1) shows a cross-sectional TEM image of sample X3, and Fig. 39(C2) shows a cross-sectional TEM image of sample X3. The images obtained after image analysis of the cross-sectional TEM image of sample X3 are shown in Figure 1.

[0475] In the image obtained after image analysis, the white areas in the oxide semiconductor film are The black areas correspond to areas containing crystalline parts with orientation, and the black areas correspond to areas containing crystal parts without orientation. The crystals correspond to regions containing crystalline parts or crystalline parts oriented in various directions.

[0476] From the results shown in FIG. 39(A2), it is clear that the region including the oriented crystal part in sample X1 is The area ratio was about 43.1%. In addition, from the results shown in FIG. 39(B2), sample X2 The ratio of the area excluding the region containing the oriented crystal part in the In addition, from the results shown in FIG. 39(C2), the region including the oriented crystal part in sample X3 The proportion of the area excluding this was approximately 89.5%.

[0477] The proportion of the portion excluding the oriented crystal portion in the oxide semiconductor film estimated in this way is When the content of the oxide semiconductor film is 5% or more and less than 40%, the oxide semiconductor film has extremely high crystallinity. It is preferable because it is difficult to create oxygen vacancies and its electrical properties are very stable. The proportion of the portion excluding the crystalline portion having orientation in the film is 40% or more and less than 100%, preferably When the ratio is 60% or more and 90% or less, the oxide semiconductor film has a crystal part with orientation and a crystal part with orientation. The crystal part without the crystal structure is mixed at an appropriate ratio, and the stability of the electrical characteristics and the high mobility are achieved at the same time. This can be done.

[0478] Here, it can be clearly confirmed by a cross-sectional TEM image or by image analysis of the cross-sectional TEM image. The region excluding the crystal part is called the Lateral Growth Buffer Region. It can also be referred to as n(LGBR).

[0479] <2-6. Oxygen diffusion into oxide semiconductor films> Next, the results of evaluating the ease of diffusion of oxygen into the oxide semiconductor film will be described.

[0480] Here, the following three samples (samples Y1 to Y3) were prepared.

[0481] [Sample Y1] First, a 50 nm thick oxide film was formed on a glass substrate using the same method as in the sample X1. Next, a silicon oxynitride film having a thickness of about 30 nm was formed on the oxide semiconductor film. a silicon oxynitride film having a thickness of about 100 nm, and a silicon oxynitride film having a thickness of about 20 nm. The oxide semiconductor film was formed by laminating the oxide semiconductor film by plasma CVD. The silicon oxynitride film may be referred to as an OS and the silicon oxynitride film may be referred to as a GI.

[0482] Next, heat treatment was carried out in a nitrogen atmosphere at 350° C. for 1 hour.

[0483] Subsequently, a 5 nm thick In-Sn-Si oxide film was formed by sputtering.

[0484] Subsequently, oxygen was added to the silicon oxynitride film. The substrate temperature was set to 40°C using a welding device, and oxygen gas ( 16 O) and oxygen gas ( 18 O) was introduced into the chamber, and the pressure was increased to 15 P a) and a parallel plate was installed in the ashing device so that a bias was applied to the substrate side. The RF power of 4500 W was supplied between the electrodes for 600 seconds. 18 The reason for using oxygen (O) is that the silicon oxynitride film 16 O) is included at the principal component level This is because the oxygen added by the oxygen addition process can be accurately measured. .

[0485] Subsequently, a silicon nitride film having a thickness of approximately 100 nm was formed by plasma CVD.

[0486] [Sample Y2] Sample Y2 is a sample obtained by changing the film formation conditions of the oxide semiconductor film from Sample Y1. An oxide semiconductor film having a thickness of about 50 nm was formed by the same method as in the case of the sample X2 described above.

[0487] [Sample Y3] Sample Y3 is a sample obtained by changing the film formation conditions of the oxide semiconductor film from Sample Y1. An oxide semiconductor film having a thickness of about 50 nm was formed by the same method as in the case of the above-described sample X3.

[0488] Samples Y1 to Y3 were fabricated by the above steps.

[0489] [SIMS analysis] For samples Y1 to Y3, SIMS (Secondary Ion Mass Spectroscopy) was performed. spectrometric analysis 18 The concentration of O was measured. In this case, the conditions for evaluating the above-prepared samples Y1 to Y3 without heat treatment and the conditions for evaluating the samples Y1 to Y3 without heat treatment are as follows: The conditions for heat treatment of samples Y1 to Y3 at 350°C for 1 hour under a nitrogen atmosphere are as follows: and sample Y3 was heat-treated at 450°C for 1 hour under a nitrogen atmosphere. It was decided.

[0490] 24(A), (B), and (C) show the results of SIMS measurement. Note that FIG. 24(A) shows the results of sample Y1. 24(A) is the SIMS measurement result of sample Y1, and FIG. 24(B) is the SIMS measurement result of sample Y2. (C) shows the SIMS measurement results of sample Y3.

[0491] In addition, Figure 24 (A), (B), and (C) show the analysis results of the region including GI and OS. 24(A)(B)(C) are SIMS analysis (SSDP (Su Substrate Side Depth Profile (SIMS) The result is...

[0492] In addition, in Figures 24(A), (B), and (C), the thick dashed lines indicate the profiles of samples that were not heat-treated. The thin dashed line is the profile of the sample heat-treated at 350°C, and the solid line is the is the profile of the sample that was heat treated at 450°C.

[0493] In each of samples Y1 to Y3, during GI 18 O is diffusing, and O During S 18 It can be seen that O is diffused. In turn, to deeper positions 18 It can be seen that O is diffused. By heat treating at 50℃, it can reach deeper positions. 18 It can be seen that O is diffusing. do.

[0494] From the above results, it is clear that oriented and non-oriented crystal parts are mixed, and An oxide semiconductor film having a low proportion of crystal parts having the above structure is a film through which oxygen easily permeates. It can be seen that the film is one in which oxygen easily diffuses. By performing this, it can be confirmed that oxygen in the GI film diffuses into the OS.

[0495] The above results indicate that the higher the proportion (density) of oriented crystals, the more oxygen is absorbed in the thickness direction. The lower the density, the easier it is for oxygen to diffuse in the thickness direction. The ease of oxygen diffusion in a nitride semiconductor film can be considered as follows. do.

[0496] An oxide semiconductor that contains a mixture of oriented crystal parts and extremely fine crystal parts that do not have orientation. In the film, the area other than the crystalline part (LGBR), which can be clearly observed in the cross-sectional observation image, is where oxygen diffuses. Therefore, the area near the oxide semiconductor film is likely to become a diffusion path for oxygen. When there is a sufficient oxygen supply source nearby, the oriented crystals are also affected by the LGBR. It is believed that oxygen vacancies in the film can be reduced because oxygen is easily supplied. do.

[0497] For example, an oxide film that is in contact with an oxide semiconductor film and that easily releases oxygen is provided, and heat treatment is performed. As a result, oxygen released from the oxide film is transported in the thickness direction of the oxide semiconductor film by the LGBR. Then, oxygen is supplied laterally to the oriented crystal part via the LGBR. As a result, the crystalline portion having the orientation of the oxide semiconductor film and the other regions can be formed. As a result, oxygen is sufficiently distributed throughout the film, and oxygen vacancies in the film can be effectively reduced.

[0498] For example, if a hydrogen atom that is not bonded to a metal atom exists in an oxide semiconductor film, Oxygen atoms may bond to form OH, which may then be fixed. By forming the film at high temperature, oxygen vacancies (V o ) in which hydrogen atoms are trapped state(V o H) into a certain amount (for example, 1 × 10 17 cm -3 By forming OH It also suppresses the generation of V o H generates carriers, so the oxide semiconductor film This results in a state in which a certain amount of carriers exist in the oxide, increasing the carrier density. In addition, oxygen vacancies are also formed during film formation, but the oxygen vacancies The loss can be reduced by introducing oxygen through the LGBR as described above. By this method, an oxide having a relatively high carrier density and a sufficiently reduced oxygen vacancy can be obtained. A compound semiconductor film can be formed.

[0499] In addition, the area other than the crystalline portion having orientation is made up of extremely fine crystals that do not have orientation when the film is formed. Therefore, no clear crystal grain boundaries can be observed in the oxide semiconductor film. The crystal part is located between a plurality of crystal parts having orientation. By growing laterally due to heat, the crystals bond with adjacent crystalline parts that have the same orientation. The fine crystals also function as regions for generating carriers. When applied to a transistor, an oxide semiconductor film having the above structure can significantly improve the field-effect mobility. It is thought that it can be improved.

[0500] In addition, after forming an oxide semiconductor film and forming an oxide insulating film such as a silicon oxide film thereon, In addition, it is preferable to perform plasma treatment in an oxygen atmosphere. Besides supplying oxygen, the hydrogen concentration can be reduced. For example, during plasma processing, At the same time, fluorine remaining in the chamber may also be doped into the oxide semiconductor film. Fluorine exists as negatively charged fluorine atoms and positively charged hydrogen atoms. The atoms bond with each other through Coulomb forces to generate HF, which is then released from the oxide during the plasma treatment. As a result, the hydrogen concentration in the oxide semiconductor film is reduced. In addition, in the plasma treatment, oxygen atoms and hydrogen atoms are bonded to form H2O, which is deposited on the film. It may also be released outside.

[0501] In addition, a structure in which a silicon oxide film (or a silicon oxynitride film) is stacked on an oxide semiconductor film The fluorine in the silicon oxide film bonds with the hydrogen in the film, forming an electrically neutral HF Since the Si-F bond can exist as a Si-F bond, it does not affect the electrical properties of the oxide semiconductor film. Although this may occur, it also becomes electrically neutral. It is thought that this does not affect the diffusion of elements.

[0502] Due to the above-described mechanism, oxygen vacancies in the oxide semiconductor film are reduced, and the metal in the film is It is believed that the reliability can be improved by reducing hydrogen atoms that are not bonded to metal atoms. In addition, when the carrier density of the oxide semiconductor film is higher than a certain level, the electrical characteristics are improved. It is thought that this is the case.

[0503] <2-7. Method for forming oxide semiconductor film> A method for forming an oxide semiconductor film according to one embodiment of the present invention will be described below.

[0504] The oxide semiconductor film of one embodiment of the present invention can be formed by sputtering in an oxygen-containing atmosphere. A film can be formed.

[0505] The substrate temperature during film formation is from room temperature to 150°C, preferably from 50°C to 150°C, more preferably from 50°C to 150°C. The temperature is preferably 100°C or higher and 150°C or lower, typically 130°C. By setting the substrate temperature within the above range, it is possible to separate crystalline portions having orientation and crystalline portions not having orientation. The ratio of the crystal portion to the crystal portion can be controlled.

[0506] The oxygen flow rate (oxygen partial pressure) during film formation is set to 1% or more and less than 33%, preferably 5% or more. 30% or less, more preferably 5% to 20%, and even more preferably 5% to 15% Typically, it is preferable to set the oxygen flow rate to 10%. By reducing the oxygen flow rate, it is possible to obtain a favorable orientation. This allows the film to contain more undeformed crystalline portions.

[0507] Therefore, by setting the substrate temperature during film formation and the oxygen flow rate during film formation within the above ranges, the orientation can be improved. Therefore, an oxide semiconductor film in which crystalline parts having orientation and crystalline parts not having orientation are mixed can be obtained. Furthermore, by setting the substrate temperature and oxygen flow rate within the above ranges, it is possible to obtain crystals with orientation. It is possible to control the ratio of the crystalline portions and the non-oriented crystalline portions.

[0508] The oxide targets that can be used for forming oxide semiconductor films include In-Ga-Z The present invention is not limited to n-based oxides, but also includes, for example, In-M-Zn-based oxides (where M is Al, Ga, Y, or can be applied.

[0509] In addition, a sputtering target containing a polycrystalline oxide having a plurality of crystal grains was used to When an oxide semiconductor film containing a crystalline portion is formed, a polycrystalline oxide film containing no polycrystalline oxide is formed. Compared with the case where a sputtering target is used, a crystalline oxide semiconductor film can be obtained. It is easy to get tired.

[0510] The following is a consideration of the mechanism of oxide semiconductor film formation. The target for annealing has a plurality of crystal grains, and the crystal grains have a layered structure. When the crystal grains have an interface that is easy to cleave, the sputtering target is By colliding with the crystal grains, the crystal grains are cleaved, and flat or pellet-shaped sputtering particles are formed. The obtained plate-like or pellet-like sputtered particles may be deposited on a substrate. It is believed that an oxide semiconductor film containing nanocrystals is formed by depositing the oxide semiconductor film on the substrate. By heating the nanocrystals, the bonding or rearrangement of the nanocrystals on the substrate surface progresses. This is thought to facilitate the formation of an oxide semiconductor film containing oriented crystal parts. can be.

[0511] Although the sputtering method has been described here, The sputtering method is preferred because it is easy to control the crystallinity. In addition to the laser deposition method, other methods such as pulsed laser deposition (PLD) and plasma enhanced chemical vapor deposition (PECV) are also available. D) method, thermal CVD (Chemical Vapor Deposition) method, ALD Atomic Layer Deposition (ALD) method, vacuum deposition method, etc. may also be used. An example of a thermal CVD method is MOCVD (Metal Organic Chemical Vapor Deposition). Al Vapor Deposition (ALD) method is one example.

[0512] This embodiment may be appropriately combined with at least a part of another embodiment described in this specification. It can be implemented in combination.

[0513] (Embodiment 3) In this embodiment, a semiconductor device and a manufacturing method of the semiconductor device according to one embodiment of the present invention will be described. 40 to 47.

[0514] <3-1. Configuration example 1 of semiconductor device> FIG. 40A is a top view of a semiconductor device 200 of one embodiment of the present invention, and FIG. This corresponds to a cross-sectional view taken along the dashed line A1-A2 in FIG. 40(B) is a cross section of the transistor Tr1 in the channel length (L) direction, and the transistor T r2 includes a cross section in the channel length (L) direction.

[0515] The semiconductor device 200 shown in FIGS. 40(A) and 40(B) includes a transistor Tr1 and a transistor T The transistor Tr2 at least partially overlaps with the transistor r1. Both transistor Tr1 and transistor Tr2 are top-gate transistors.

[0516] The transistor Tr1 and the transistor Tr2 are provided with an area where they at least partially overlap each other. By doing so, the layout area of ​​the transistors can be reduced.

[0517] The transistor Tr1 is formed by an insulating film 106 on a substrate 102 and an oxide semiconductor on the insulating film 106. a film 108, an insulating film 110 on the oxide semiconductor film 108, and a conductive film 120 on the insulating film 110. and an insulating film 114 over the insulating film 106, the oxide semiconductor film 108, and the conductive film 120. Further, similarly to Embodiment 1, the oxide semiconductor film 108 overlaps with the conductive film 120 and is insulating. A channel region 108i contacting the insulating film 110 and a source region 108s contacting the insulating film 114 and a drain region 108d in contact with the insulating film 114.

[0518] The transistor Tr1 has an insulating film 116 on the insulating film 114 and an insulating film 114 and an insulating film 116 on the insulating film 114. The oxide semiconductor film 116 is electrically connected to the oxide semiconductor film 108 through an opening 141a provided in the film 116. The conductive film 112a is formed by the insulating film 114, and the opening 141b is formed in the insulating film 116. the conductive film 112b electrically connected to the oxide semiconductor film 108 through an insulating film 116; The insulating film 118 is formed over the conductive film 112a and the conductive film 112b.

[0519] The transistor Tr2 includes a conductive film 112b, an insulating film 118 on the conductive film 112b, and The oxide semiconductor film 208 on the insulating film 118 and the insulating film 210b on the oxide semiconductor film 208 , the conductive film 212b over the insulating film 210b, the oxide semiconductor film 208 and the conductive film 212b The oxide semiconductor film 208 has an insulating film 214. The insulating film 210b is connected to the channel region 208i, which overlaps the conductive film 212b and is in contact with the insulating film 210b. A source region 208s in contact with the insulating film 214 and a drain region 208d in contact with the insulating film 214 and,

[0520] The transistor Tr2 is formed by insulating film 216 on the insulating film 214 and a gate electrode 216 on the insulating film 216. a conductive film 218a electrically connected to the oxide semiconductor film 208 and a conductive film 218b formed on the insulating film 216; and a conductive film 218b that is electrically connected to the oxide semiconductor film 208.

[0521] As shown in FIGS. 40(A) and 40(B), the oxide semiconductor film 108 and the oxide semiconductor film 20 8 have an overlapping area with each other.

[0522] The oxide semiconductor film 108 can have the same structure as that described in Embodiment 1. The oxide semiconductor film 208 has a structure similar to that of the oxide semiconductor film 128 described in Embodiment 1. It is possible.

[0523] Therefore, it is possible to form the transistor Tr2 with high field effect mobility.

[0524] For example, the above-mentioned transistor having high field effect mobility may be used as a gate electrode for generating a gate signal of a display device. By using it in a gate driver that configures the display, it is possible to provide a display device with a narrow frame width (also called a narrow frame). Furthermore, a display device including the above-described transistor having high field-effect mobility can be The source driver (especially the shift register that the source driver has) supplies signals from the signal lines. By using it in a device such as a demultiplexer connected to the output terminal of a display device, In addition, it is possible to provide a display device in which the number of wirings required is small. The high-performance transistor is used as a selection transistor and a driving transistor of a pixel circuit of a display device. By using either one or both of the sensors, a display device with high display quality can be provided. can.

[0525] Although the semiconductor device 100A shown in FIG. 40 does not show the capacitance element Cs1, Capacitance between a film formed simultaneously with film 112b and a film formed simultaneously with conductive film 212b The insulating film forming the capacitance can be formed at the same time as the insulating film 118. and / or one of a film formed simultaneously with the insulating film 210b. do.

[0526] In one aspect of the present invention, the insulating film forming this capacitance is formed at the same time as the insulating film 118. When trying to obtain a certain on-current in the saturation region, the oxide semiconductor The oxide semiconductor of the transistor measured in FIG. 8(B) or FIG. 8(C) is present in the film 208. By using a conductive film, the oxide semiconductor film of the transistor measured in FIG. The thickness of the film formed simultaneously with the insulating film 210b can be increased compared to when using the insulating film 210b. do.

[0527] That is, the transistor Tr2 is connected to the transistor measured in FIG. 8(B) or FIG. 8(C). By using an oxide semiconductor film included in the transistor, the storage capacitance of the capacitor Cs1 is reduced. This allows the footprint of the transistor to be reduced.

[0528] The semiconductor device 200 shown in FIGS. 40(A) and 40(B) is suitable for use in a pixel circuit of a display device. By using the arrangement shown in FIGS. 40(A) and 40(B), the pixel density of the display device can be increased. For example, it is possible to increase the pixel density of a display device to over 1000 ppi. Even when the pixel density of the display device exceeds 2000 ppi, the same applies to the display device shown in Figs. 40(A) and (B). By using the arrangement shown in FIG. 1, the aperture ratio of the pixel can be increased.

[0529] When the semiconductor device 200 shown in FIG. 40(A)(B) is applied to a pixel circuit of a display device, In this case, the pixel circuit can have the same configuration as that shown in FIG.

[0530] In addition, when the semiconductor device 200 shown in FIG. 40(A)(B) is applied to a pixel of a display device, for example, For example, the channel length (L) and channel width (W) of a transistor, The width of the connecting wiring and electrodes can be made relatively large. In comparison with the case where transistors Tr1 and Tr2 are arranged on the same plane, As shown in (B), the transistor Tr1 and the transistor Tr2 are at least partially overlapped. By arranging them in a stacked manner, it is possible to increase the line width, etc., thereby reducing the variation in processing dimensions. It is possible to reduce it.

[0531] In addition, the transistor Tr1 and the transistor Tr2 have one of a conductive film and an insulating film. Since either one or both can be used in common, the number of masks or the number of processes can be reduced. It is possible to do this.

[0532] For example, in the transistor Tr1, the conductive film 120 functions as a gate electrode, and the conductive film The conductive film 112a functions as a source electrode, and the conductive film 112b functions as a drain electrode. In addition, in the transistor Tr1, the insulating film 110 functions as a gate insulating film. In the transistor Tr2, the conductive film 112b functions as a first gate electrode, and the conductive film The conductive film 218a functions as a source electrode, the conductive film 218b functions as a drain electrode, and the conductive The film 212b functions as a second gate electrode. The insulating film 118 functions as a first gate insulating film, and the insulating film 210b functions as a second gate insulating film. It functions as such.

[0533] In this specification and the like, the insulating film 210b may be referred to as a fourth insulating film.

[0534] In addition, an insulating film 136 is provided over the insulating film 216 and the conductive films 218a and 218b. In addition, an opening 186 is provided in the insulating film 136, reaching the conductive film 218b. A conductive film 138 is provided on the insulating film 136. The conductive film 138 has an opening 186. , and is connected to the conductive film 218a via the conductive film 218b.

[0535] Moreover, an insulating film 140, an EL layer 142, and a conductive film 144 are provided on the conductive film 138. The conductive film 138, the EL layer 142, and the conductive film 144 form a light-emitting element 160. is configured.

[0536] Although not shown in the drawings, the transistors Tr1 and Tr2 shown in FIGS. The transistor Tr2 may have the S-channel structure described in the first embodiment.

[0537] In addition, the transistor Tr1 and the transistor Tr2, and the transistors Tr1 and Tr2 included in the semiconductor device 100A shown in the first embodiment. It is possible to use it in combination with transistor Tr2.

[0538] As described above, the semiconductor device of one embodiment of the present invention has a stacked structure including a plurality of transistors. The area of ​​the transistor is reduced. By using either one or both of the conductive films in common, the number of masks or processes can be reduced. It is possible.

[0539] <3-2. Components of semiconductor device> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0540] <Conductive film> The conductive films 212b, 218a, and 218b may be the conductive films described in the first embodiment (conductive film 1 12a, conductive film 112b, conductive film 122a, conductive film 122b, conductive film 120, conductive film 13 The materials of the conductive film 21 can be used. For 2b, it is preferable to use an oxide conductor (OC) since oxygen can be added to the insulating film 210b. It is suitable.

[0541] <Insulating film> The insulating films 214, 216, and 210b may be the insulating films described in the first embodiment (insulating film 106 , insulating film 114, insulating film 116, insulating film 118, insulating film 124, insulating film 126, insulating film 1 34, insulating film 136, and insulating film 140) can be used.

[0542] The insulating film 118 is preferably an oxide insulating film because it is in contact with the oxide semiconductor film 208. In particular, a silicon oxide film or a silicon oxynitride film is preferable. The insulating film is preferably an oxide insulating film containing oxygen in excess of the stoichiometric composition. It is more preferable that the insulating film 210b has an oxygen-excess region. It is preferable to use a silicon film or a silicon oxynitride film.

[0543] The insulating film 214 contains either hydrogen or nitrogen, or both. The insulating film 214 contains nitrogen and silicon. The insulating film 214 also contains oxygen, hydrogen, water, and aluminum. The oxide semiconductor film 20 has a function of blocking potassium metals, alkaline earth metals, etc. When the insulating film 214 is in contact with the insulating film 214, either hydrogen or nitrogen or both of the hydrogen and nitrogen in the insulating film 214 is removed. Both of these penetrate into the oxide semiconductor film 208 and increase the carrier density of the oxide semiconductor film 208. Therefore, the oxide semiconductor film 208 and the insulating film 214 can be easily formed at the interface between them. The regions in the compound semiconductor film 208 function as source and drain regions.

[0544] <Oxide semiconductor film> The oxide semiconductor film 208 may be the oxide semiconductor film described in Embodiment 1 (oxide semiconductor film The materials of the oxide semiconductor film 108 and the oxide semiconductor film 128 can be used.

[0545] <3-3. Manufacturing method of semiconductor device> Next, a manufacturing method of the semiconductor device 200 of one embodiment of the present invention will be described with reference to FIGS. I will explain.

[0546] 41(A), 42(A), 43(A), 44(A), 45(A), and 4 6(A) and 47(A) are top views illustrating a method for manufacturing the semiconductor device 200. Figure 41(B), Figure 42(B), Figure 43(B), Figure 44(B), Figure 45(B), Figure 46(B) 47A and 47B are cross-sectional views illustrating a method for manufacturing the semiconductor device 200. FIG.

[0547] The transistor Tr1 can be manufactured by the method described in Embodiment 1. Therefore, the insulating film 106, the oxide semiconductor film 108, the insulating film 11, and the like can be formed on the substrate 102. 0, conductive film 120, insulating film 114, insulating film 116, conductive film 112a, conductive film 112b, insulating film For a method of forming the insulating film 118, refer to Embodiment 1 and FIGS. 14 to 16. .

[0548] Next, the insulating film 118 is formed over the insulating film 116, the conductive film 112a, and the conductive film 112b. The insulating film 118 can be formed by the same method as in the first embodiment.

[0549] Next, the oxide semiconductor film 208 is formed over the insulating film 118 (see FIGS. 41A and 41B).

[0550] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4:2 : 4.1 [atomic ratio]) by a sputtering method to form an oxide semiconductor film. The substrate temperature during the formation of the oxide semiconductor film was set to 170° C., and the film-forming gas during the formation was The gas used is oxygen gas with a flow rate of 60 sccm and argon gas with a flow rate of 140 sccm. Thereafter, the oxide semiconductor film is processed into a desired shape to form an island-shaped oxide semiconductor film 20 8. Note that a wet etching apparatus is used to form the oxide semiconductor film.

[0551] Next, a stacked film of an insulating film and a conductive film is formed over the insulating film 118 and the oxide semiconductor film 208. Thereafter, the laminated film is processed into a desired shape to form an island-shaped insulating film 210b and an island-shaped insulating film 210c. The conductive film 212b is formed (see FIGS. 42(A) and 42(B)).

[0552] After that, the insulating film 214, By forming the insulating film 214, the oxide film in contact with the insulating film 214 is formed. The semiconductor film 208 becomes a source region 208s and a drain region 208d. The oxide semiconductor film 208 that is not in contact with the insulating film 214, in other words, the oxide semiconductor film 208 that is in contact with the insulating film 210b The main membrane 208 becomes a channel region 208i. The oxide semiconductor film 208 having the region 208s and the drain region 208d is formed ( See Figure 43(A)(B).

[0553] In this embodiment, the insulating film 210b is a silicon oxynitride film having a thickness of 50 nm. The conductive film 212b is formed by using an ECVD apparatus. The oxide semiconductor film is formed by using a sputtering apparatus. The insulating film 214 has the same composition as the oxide semiconductor film 208. A silicon nitride film having a thickness of 0 nm is formed using a PECVD apparatus. In this case, a silicon oxynitride film having a thickness of 200 nm is formed using a PECVD apparatus.

[0554] By using a silicon nitride film as the insulating film 214, the conductive film 21 in contact with the insulating film 214 2b, hydrogen and nitrogen in the silicon nitride film in the source region 208s and the drain region 208d. Either one or both of the elements penetrates into the conductive film 212b, the source region 208s, and the drain region 208s. Therefore, the carrier density of the oxide semiconductor film 2 can be increased. A part of the region of 08 and the conductive film 212b become an oxide conductor (OC).

[0555] The insulating film 210b is formed in a self-aligned manner using the conductive film 212b as a mask.

[0556] Next, an opening 282 reaching the oxide semiconductor film 208 is formed in a desired region of the insulating films 214 and 216. a and 282b are formed (see Figures 43(A) and (B)).

[0557] The openings 282a and 282b are formed using a dry etching device or a wet etching device. Use the device.

[0558] Next, the insulating film 216 and the oxide semiconductor film 208 are formed to cover the openings 282a and 282b. A conductive film is formed on the insulating film 218a and the insulating film 218b by processing the conductive film into an island shape. (See Figures 43(A) and (B)).

[0559] The conductive films 218a and 218b are made of a tungsten film having a thickness of 100 nm and a tungsten film having a thickness of 200 nm. The copper film is formed by sputtering.

[0560] Through the above steps, the transistor Tr2 can be fabricated.

[0561] Next, the insulating film 136 is formed over the insulating film 216 and the conductive films 218a and 218b. By processing a desired region of the insulating film 136, an opening 186 reaching the conductive film 218a is formed. (See Figures 44(A) and (B)).

[0562] In this embodiment, the insulating film 136 is a photosensitive acrylic resin film having a thickness of 1.5 μm. Form.

[0563] Next, a conductive film is formed over the insulating film 136 and the conductive film 218a, and the conductive film is processed into an island shape. By this, a conductive film 138 is formed (see FIGS. 45(A) and (B)).

[0564] In this embodiment, the conductive film 138 is made of an ITSO film having a thickness of 10 nm and a SiO film having a thickness of 200 nm. a reflective metal film (here, a metal film having silver, palladium, and copper) with a thickness of 10 A laminated film with an ITSO film of 138 nm is used. A chipping device is used.

[0565] Next, an island-shaped insulating film 140 is formed on the insulating film 136 and the conductive film 138 (FIG. 46(A)). (See (B)).

[0566] The insulating film 140 is a photosensitive polyimide resin film having a thickness of 1.5 μm.

[0567] Next, the EL layer 142 is formed on the conductive film 138, and then the insulating film 140 and the EL layer 142 are By forming the upper conductive film 144, a light emitting element 160 is formed (see FIGS. 47(A) and (B)). (see).

[0568] The method for forming the light emitting element 160 will be described in the fourth embodiment.

[0569] Through the above steps, the semiconductor device 200 shown in FIGS. 40(A) and 40(B) can be manufactured.

[0570] Note that the structures and methods described in this embodiment mode may be combined as appropriate with structures and methods described in other embodiment modes. It can be used in combination.

[0571] (Fourth embodiment) In this embodiment, a light-emitting element that can be used in a semiconductor device of one embodiment of the present invention will be described. This will be explained using Figures 48 to 50.

[0572] <4-1. Example of light-emitting element configuration> First, the structure of a light-emitting element that can be used in a semiconductor device of one embodiment of the present invention will be described with reference to FIG. 48 is a cross-sectional view of the light-emitting element 160.

[0573] The light-emitting element 160 may be made of either an inorganic compound or an organic compound, or both. The organic compound used in the light-emitting element 160 may be a low-molecular compound or Polymer compounds are thermally stable and can be easily applied uniformly by coating methods, etc. This is preferable because it allows the formation of a thin film with excellent properties.

[0574] The light-emitting element 160 shown in FIG. 48 has a pair of electrodes (conductive films 138 and 144). The EL layer 142 is provided between the pair of electrodes. The EL layer 142 includes at least a light-emitting layer It has 150.

[0575] 48 includes a hole injection layer 151, a hole transport layer 152, a light emitting layer 150, and a hole transport layer 153. The photoresist layer 152 has functional layers such as an electron transport layer 153 and an electron injection layer 154 .

[0576] In this embodiment, the conductive film 138 of the pair of electrodes is used as the anode, and the conductive film Although 144 will be described as a cathode, the configuration of the light emitting element 160 is not limited to this. That is, the conductive film 138 is a cathode, the conductive film 144 is an anode, and the layers between the electrodes are stacked as follows: The order may be reversed. That is, from the anode side, the hole injection layer 151 and the hole transport layer 152 The light-emitting layer 150, the electron transport layer 153, and the electron injection layer 154 are stacked in this order. That's fine.

[0577] The configuration of the EL layer 142 is not limited to the configuration shown in FIG. 48. Among the hole injection layer 151, the hole transport layer 152, the electron transport layer 153, and the electron injection layer 154, Alternatively, the EL layer 142 may have a structure including at least one selected from the group consisting of holes and the hole or electron injection barrier is reduced, the hole or electron transport property is improved, and the hole or electron transport property is improved. It has the function of inhibiting transport or suppressing quenching by electrodes. The functional layer may be a single layer or a plurality of layers. may be laminated.

[0578] The light-emitting layer 150 can be made of low molecular weight compounds and high molecular weight compounds.

[0579] In this specification and the like, a polymer compound refers to a compound having a molecular weight distribution and an average molecular weight of 1× 10 3 〜1×10 8 The low molecular weight compound is a polymer having a molecular weight distribution. First, the molecular weight is 1×10 4 The compound is as follows:

[0580] A polymer compound is a compound in which one or more structural units are polymerized. That is, the structural unit refers to a unit that a polymer compound has one or more of.

[0581] The polymer compounds include block copolymers, random copolymers, alternating copolymers, and graft copolymers. The polymer may be a copolymer or other polymer.

[0582] When the terminal group of the polymer compound has a polymerization active group, the light-emitting device exhibits high light-emitting properties or brightness. Therefore, the end groups of polymer compounds should be stable terminals. The stable terminal group is preferably a group covalently bonded to the main chain. A group that is bonded to an aryl group or a heterocyclic group via a carbon-carbon bond is preferred.

[0583] When a low molecular weight compound is used in the light-emitting layer 150, the low molecular weight compound that functions as a host material is added to the low molecular weight compound. In addition, it is preferable that the light-emitting layer 150 contains a light-emitting low-molecular-weight compound as a guest material. The host material is present in an amount at least greater by weight than the guest material, and the guest material is present in an amount greater than the host Dispersed in the material.

[0584] As the guest material, a light-emitting organic compound may be used. is a substance that can emit fluorescence (hereinafter also referred to as a fluorescent compound) or phosphorescence. A substance capable of emitting light (hereinafter also referred to as a phosphorescent compound) can be used.

[0585] In the light-emitting element 160 according to one embodiment of the present invention, a pair of electrodes (conductive film 138 and conductive film 14 4) By applying a voltage between the cathode and the anode, electrons flow from the cathode and holes flow from the anode. The electrons and holes are then injected into the EL layer 142, causing a current to flow. By recombining the carriers (electrons and holes), an exciton is formed. The ratio of singlet excitons to triplet excitons (hereafter referred to as the exciton generation probability) is The statistical probability is 1:3. The rate of singlet excitons that contribute to light is 25%, and the rate of triplet excitons that do not contribute to light emission is 10%. On the other hand, in the light-emitting element using a phosphorescent compound, Both singlet and triplet excitons can contribute to light emission. A light-emitting element using a phosphorescent compound has higher luminous efficiency than a light-emitting element using a compound. This is preferable.

[0586] An exciton is a pair of carriers (electrons and holes). An exciton has energy. Therefore, the material in which the excitons are generated is in an excited state.

[0587] When a polymer compound is used in the light-emitting layer 150, the polymer compound has a structure that traps holes as a constituent unit. The structure has a structure that transports holes (hole transport properties) and a structure that transports electrons (electron transport properties). Alternatively, it is preferable that the compound has a π-electron rich heteroaromatic skeleton or an aromatic amino group. It is preferable that the compound has at least one heteroaromatic skeleton and a π-electron deficient heteroaromatic skeleton. These backbones are linked together either directly or via other backbones.

[0588] In addition, the polymer compound has a skeleton having a hole transport property and a skeleton having an electron transport property. In this case, it is possible to easily control the carrier balance. The doping region can be easily controlled. The molar ratio of the skeleton having electron transport properties to the polymer is preferably in the range of 1:9 to 9:1. Furthermore, the proportion of the skeleton having electron transport properties is higher than that of the skeleton having hole transport properties. More preferable.

[0589] The polymer compound has, as its constituent units, a skeleton having hole transport properties and a polymer having electron transport properties. In addition to the backbone having a light-emitting property, the polymer compound may have a light-emitting backbone. In this case, it is preferable that the ratio of the light-emitting skeleton to the total structural units of the polymer compound is low. Specifically, it is preferably 0.1 mol % or more and 10 mol % or less, and more preferably It is 0.1 mol% or more and 5 mol% or less.

[0590] The polymer compound used in the light emitting device 160 has a bond direction, a bond angle, There are cases where compounds have different bond lengths, etc. In addition, each structural unit may have different substituents. The structural units may have different skeletons, and the structural units may have different structures. may be different.

[0591] The light-emitting layer 150 contains a polymer compound that functions as a host material and a light-emitting polymer compound. In this case, the polymerizable compound that functions as the host material may be used as the guest material. In the mixture, a light-emitting low-molecular compound is dispersed as a guest material, and the high-molecular compound is At least the amount by weight of the luminescent low molecular weight compound is greater than that of the luminescent low molecular weight compound. is preferably 0.1 wt% or more and 10 wt% or less in weight ratio to the polymer compound. , and more preferably 0.1 wt% or more and 5 wt% or less.

[0592] <4-2. Method for manufacturing light-emitting elements> Here, a method for forming the EL layer 142 using a droplet discharge method will be described with reference to FIG. 49A to 49D are cross-sectional views illustrating a method for manufacturing the EL layer 142. do.

[0593] In FIG. 49(A), an insulating film 136, a conductive film 138, and an insulating film 140 are formed. 1 illustrates a substrate in which

[0594] First, a droplet is ejected from a droplet ejection device 683 onto the exposed portion of the conductive film 138, which is the opening of the insulating film 140. Droplets 684 are ejected to form a layer 685 containing the composition. and adheres to the conductive film 138 (see FIG. 49(B)).

[0595] The step of discharging the droplets 684 may be carried out under reduced pressure.

[0596] Next, the solvent is removed from the layer 685 containing the composition, and the layer is solidified to form the EL layer 142. (See Figure 49(C)).

[0597] The solvent may be removed by a drying step or a heating step.

[0598] Next, a conductive film 144 is formed on the EL layer 142 to form a light emitting element 160 (FIG. 49(D) )reference).

[0599] In this way, when the EL layer 142 is formed by the droplet discharge method, the composition can be selectively discharged. This reduces material waste. Since no additional steps are required, the process can be simplified and costs can be reduced.

[0600] 49, the process of forming the EL layer 142 in one layer has been described. As shown in FIG. 1, when the EL layer 142 has a functional layer in addition to the light-emitting layer 150, each layer is covered with the conductive film 13. At this time, the hole injection layer 151, the hole transport layer 152, the light emitting layer 153, and the like are formed in this order from the side of the light emitting layer 8. The light-emitting layer 150, the electron transport layer 153, and the electron injection layer 154 may be formed by a droplet discharge method. The hole injection layer 151, the hole transport layer 152, and the light emitting layer 150 are preferably formed by a droplet discharge method. The electron transport layer 153 and the electron injection layer 154 may be formed by evaporation or the like. The optical layer may be formed by a droplet discharge method and a vapor deposition method.

[0601] The hole injection layer 151 may be, for example, poly(ethylenedioxythiophene) / poly(styrene). The film can be formed by using a coating method such as a droplet discharge method or a spin coating method. The hole transport layer 152 can be formed from a hole transport material, for example. For example, polyvinylcarbazole is formed by a coating method such as a droplet discharge method or a spin coating method. After the formation of the hole injection layer 151 and the hole transport layer 152, The heat treatment may be carried out in air or in an inert gas atmosphere such as nitrogen.

[0602] The light-emitting layer 150 may be purple, blue, blue-green, green, yellow-green, yellow, orange, or red. By using at least one luminescent polymer compound or low molecular compound selected from The high molecular weight compounds and low molecular weight compounds can be formed by using compounds that exhibit fluorescence or phosphorescence. The polymeric and low molecular weight compounds can be used as the light emitting organic compounds. By dissolving it in a solvent, it can be formed by a coating method such as a droplet discharge method or a spin coating method. After the light-emitting layer 150 is formed, the light-emitting layer 150 can be heated in an air atmosphere or an inert gas atmosphere such as nitrogen. Heat treatment may be performed under the following conditions. The guest material is then reacted with a polymer or low molecular weight compound having a higher excitation energy than the guest material. The light-emitting organic compound may be formed into a film by itself, or may be dispersed in other materials. The light-emitting layer 150 may be formed as a film by mixing it with a material. In this case, the two light-emitting layers contain luminescent organic compounds that emit light in different colors. In addition, when a low molecular weight compound is used for the light emitting layer 150, a vapor deposition method is used. It can be formed by

[0603] The electron-transporting layer 153 can be formed by depositing a substance having a high electron-transporting property. The electron injection layer 154 is formed by depositing a material with high electron injection properties. The electron transport layer 153 and the electron injection layer 154 can be formed by vapor deposition. It is possible.

[0604] The conductive film 144 can be formed by evaporation. The conductive film 144 can be formed using a conductive film having a reflective property. A conductive film having a light-transmitting property and a conductive film having a light-transmitting property may be stacked.

[0605] The droplet ejection method described above is a method for ejecting a composition, such as an ink jet method or a nozzle printing method. A nozzle having an ejection port, or a head having one or more nozzles, etc., ejects droplets. This is a general term for anything that has the means to do so.

[0606] <4-3.Droplet discharge device> Next, a droplet discharge device used in the droplet discharge method will be described with reference to FIG. FIG. 14 is a conceptual diagram illustrating a droplet ejection device 1400.

[0607] The droplet discharge device 1400 has a droplet discharge means 1403. has a head 1405 and a head 1412.

[0608] The head 1405 and the head 1412 are connected to a control means 1407, which controls the computer. By controlling the controller 1410, it is possible to draw in a pre-programmed pattern. Cut.

[0609] The timing of drawing may be, for example, the timing of the marker 14 formed on the substrate 1402. Alternatively, the reference point may be determined based on the outer edge of the substrate 1402. Here, the marker 1411 is detected by the imaging means 1404, and the image processing means 14 The signal converted to a digital signal by 09 is recognized by computer 1410 and a control signal is generated. and sends it to the control means 1407.

[0610] The imaging means 1404 may be a charge coupled device (CCD) or a complementary metal oxide semiconductor (C An image sensor using a MOS (metal oxide semiconductor) can be used. Information on the pattern to be formed is stored in a storage medium 1408, and based on this information, A control signal is sent to the control means 1407, and the individual heads 1405 of the droplet discharge means 1403, The heads 1412 can be individually controlled. The material to be discharged is supplied from a material supply source 1413, The material is supplied from a material supply source 1414 through piping to heads 1405 and 1412. can be.

[0611] The inside of the head 1405 is a space 1406 filled with a liquid material, as shown by the dotted line, and a discharge Although not shown, the head 1412 and the head 14 The head 1405 and head 1412 have the same internal structure as the head 1405. The nozzles of the head 1405 and head 1412 are different sizes. By providing the heads in different sizes, different materials can be printed at the same time with different widths. It is possible to discharge and draw multiple types of luminescent materials, etc., and when drawing over a wide area, In order to improve throughput, the same material is ejected from multiple nozzles at the same time to create a pattern. When a large substrate is used, the head 1405 and the head 1412 move over the substrate as shown in FIG. You can freely scan in the X, Y, and Z directions shown in the figure and freely set the drawing area. This allows the same pattern to be drawn multiple times on a single substrate.

[0612] The step of discharging the composition may be carried out under reduced pressure. After the composition is discharged, one or both of the steps of drying and baking are carried out. The steps of drying and baking are Both processes are heat treatment processes, but the purpose, temperature and time are different. The synthesis process is carried out under normal or reduced pressure by laser light irradiation, instantaneous thermal annealing, or a heating furnace. The timing of the heat treatment and the number of times the heat treatment is performed are not particularly limited. In order to perform the baking process well, the temperature at that time depends on the material of the substrate and the properties of the composition. Depends.

[0613] As described above, the EL layer 142 can be formed using a droplet discharge apparatus.

[0614] Note that the structure shown in this embodiment mode can be used in appropriate combination with other embodiment modes. do.

[0615] (Embodiment 5) In this embodiment, an example of a display device including the semiconductor device exemplified in the previous embodiment will be described. This will be explained below with reference to FIGS. 51 to 53.

[0616] <5-1. Top view of the display device> 51 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 provided on a substrate 701 and a source driver 703 provided on the first substrate 701 are connected to the pixel portion 702. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, a sealant 712 arranged to surround the gate driver circuit section 704 and the gate driver circuit section 706; and a second substrate 705 provided so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 are sealed. Although not shown in FIG. 51, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0617] In addition, the display device 700 has an area surrounded by a sealing material 712 on the first substrate 701. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are arranged in a region different from the pixel section 702. The circuit section 706 and the FPC terminal section 708 (FPC: Flexible Printed Circuit) electrically connected to each other. In addition, the FPC terminal portion 708 is provided with The FPC 716 is connected to the pixel section 702 and the source driver circuit Various signals are supplied to the pixel section 704 and the gate driver circuit section 706. 02, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section 7 08 are connected to signal lines 710. Various signals are supplied by the FPC 716. 7. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, and the like are connected to each other via a signal line 710. The power supply is provided to a driver circuit portion 706 and an FPC terminal portion 708.

[0618] The display device 700 may be provided with a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example is shown in which the element portion 702 is formed on the same first substrate 701, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, a single crystal A driving circuit substrate formed of a semiconductor film or a polycrystalline semiconductor film is formed on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited, and may be OG (Chip On Glass) method, wire bonding method, etc. can be used. can.

[0619] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate driver circuit portion 706. The driver circuit section 706 includes a plurality of transistors.

[0620] The display device 700 can also include various elements. For example, electroluminescence (EL) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (which emit light according to the current transistor), electron emission element, liquid crystal element, electronic ink element, electrophoresis element, electro Wetting elements, plasma display panels (PDPs), MEMS (microelectromechanical systems) Electro-mechanical systems) displays (e.g., grating light valves) (GLV), Digital Micromirror Device (DMD), Digital MicroShutter (DMS) element, interferometric modulation (IMOD) element, etc. etc.), piezoelectric ceramic displays, etc.

[0621] An example of a display device using an EL element is an EL display. An example of a display device using an emission element is a field emission display (FED) ) or SED type flat panel display (SED: Surface-conduction Electron-emitter Displays (ELDs) are also available. An example of a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). LCD, reflective LCD, direct-view LCD, projection LCD An example of a display device using an electronic ink element or an electrophoretic element is an electrophoretic display. Semi-transmissive LCD displays and reflective LCD displays are also available. In this case, a part or all of the pixel electrode is designed to function as a reflective electrode. For example, a part or all of the pixel electrodes may be made of aluminum, silver, etc. Furthermore, in this case, a memory circuit such as an SRAM should be placed under the reflective electrode. This can further reduce power consumption.

[0622] The display method of the display device 700 may be a progressive method, an interlace method, etc. In addition, RG can be used as a color element controlled by pixels when displaying colors. For example, the R pixel and the G pixel are not limited to the three colors R, G, and B (R represents red, G represents green, and B represents blue). It may be composed of four pixels: a blue pixel, a blue pixel, and a white pixel. As shown above, two colors of RGB compose one color element, and two different colors are created depending on the color element. Alternatively, you can select one or more colors such as yellow, cyan, magenta, etc. for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, but may be applied to monochrome display devices. It can also be applied to

[0623] In addition, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color on the display device, a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B) Yellow (Y) and other colors can be used in combination as appropriate. The color reproducibility can be improved compared to when no color layer is used. By arranging a region having a colored layer and a region not having a colored layer, the region not having a colored layer can be The white light in the region may be directly used for display. This reduces the decrease in brightness caused by the colored layer during bright display, reducing power consumption by 20%. However, it may be possible to reduce the light emission by about 30%. When using elements to display full color, R, G, B, Y, and W are each represented by a light emitting element. By using a self-luminous element, it is possible to make the light emitted from an element that is not a colored layer. However, power consumption may be further reduced.

[0624] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts red, green, and blue A method that uses each of the three colors (three-color method), or a method that uses part of the blue light to emit red or green light A color conversion method (color conversion method, quantum dot method) may also be applied.

[0625] <5-2. Cross-section of display device> Next, the configuration of a display device using the semiconductor device 100A shown in the first embodiment will be described with reference to FIG. 52 is a cross-sectional view corresponding to the cross section of the dashed line QR shown in FIG. FIG.

[0626] The display device 700 shown in FIG. 52 has a transistor between a first substrate 701 and a second substrate 705. The light emitting element 160 includes a transistor Tr1, a transistor Tr2, and a light emitting element 160.

[0627] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, flexible substrates are used as the first substrate 701 and the second substrate 705. The flexible substrate may be, for example, a plastic substrate.

[0628] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The body 778 is a columnar spacer obtained by selectively etching the insulating film. The distance (cell gap) between the first substrate 701 and the second substrate 705 is controlled by a It should be noted that the structures 778 may be spherical spacers.

[0629] The first substrate 701 is provided with the transistor Tr1 and the transistor Tr2 described in the first embodiment. A starter Tr2 is provided.

[0630] The transistors Tr1 and Tr2 are highly purified to suppress the formation of oxygen vacancies. Therefore, the transistors Tr1 and Tr2 are turned off. Since the current can be made extremely low, the retention time of electrical signals such as image signals can be extended. When the power is on, the write interval can be set longer. Since the frequency of the above can be reduced, the power consumption of the display device can be reduced.

[0631] In addition, the transistor Tr2 has a relatively high field effect mobility, allowing for high-speed operation. For example, by using such a transistor capable of high-speed driving in a display device, , the switching transistor in the pixel section and the driver transistor used in the drive circuit section It can be formed on the same substrate. That is, it can be formed on a silicon wafer or the like as a separate driving circuit. Since it is not necessary to use a semiconductor device formed by In addition, by using a transistor that can be driven at high speed in the pixel portion, , high-quality images can be provided.

[0632] On the second substrate 705 side, a light-shielding film 738 that functions as a black matrix and a A colored film 736 that functions as a color filter, a light-shielding film 738, and an insulating film that contacts the colored film 736. A veneer 734 is provided.

[0633] In this embodiment, the light emitting element 160 has a top emission structure. The conductive film 144 has a light-transmitting property and transmits light emitted from the EL layer 142. In the embodiment, a top emission structure is shown as an example, but the present invention is not limited to this. For example, a bottom emission structure in which light is emitted to the conductive film 138 side, or a structure in which light is emitted from the conductive film 138 and A dual emission structure in which light is emitted to both the conductive film 142 and the conductive film 143 may be used.

[0634] A colored film 736 is provided at a position overlapping the light emitting element 160, and a colored film 736 is provided at a position overlapping the insulating film 140. The colored film 736 and the light-shielding film 738 are formed by insulating films. The light emitting element 160 is covered with a sealing film 732 between the light emitting element 160 and the insulating film 734. In the display device 700 shown in FIG. However, the present invention is not limited to this. For example, the EL layer 142 may be formed by coloring. In the case where the colored film 736 is formed, it may be omitted.

[0635] <5-3. Example of a configuration in which an input / output device is provided in a display device> Furthermore, the display device 700 shown in FIG. 52 may be provided with an input / output device. For example, a touch panel can be mentioned.

[0636] FIG. 53 shows a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG.

[0637] FIG. 53 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. do.

[0638] The touch panel 791 is a so-called in-cell type provided between the substrate 705 and the colored film 736. The touch panel 791 is a touch panel of the type described above. Before the colored film 736 is formed, the touch panel 791 is formed on the substrate 70. Formed on the 5th side.

[0639] The touch panel 791 includes a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode 794. 94, an insulating film 795, an electrode 796, and an insulating film 797. When a detection object such as an iron comes close to the electrode 793, the mutual capacitance between the electrode 794 changes. can be detected.

[0640] Above the insulating film 140, the intersection of the electrode 793 and the electrode 794 is clearly shown. The electrode 796 is formed by sandwiching the electrode 794 between two electrodes via an opening provided in the insulating film 795. 53, the electrode 796 is provided. However, the present invention is not limited to this. For example, It may be formed in the driver circuit section or the source driver circuit section.

[0641] The electrode 793 and the electrode 794 are provided in a region overlapping with the light-shielding film 738. 3 and the electrode 794 are preferably provided so as not to overlap with the light emitting element 160. In this case, the electrode 793 and the electrode 794 have openings in the regions overlapping with the light-emitting element 160. That is, the electrodes 793 and 794 have a mesh shape. The electrodes 793 and 794 are structured so as not to block the light emitted by the light emitting element 160 . Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. A display device with high visibility and reduced power consumption can be realized.

[0642] In addition, since the electrodes 793 and 794 do not overlap with the light-emitting element 160, The pole 794 can be made of a metal material that has low transmittance for visible light.

[0643] Therefore, compared with electrodes made of oxide materials with high visible light transmittance, This makes it possible to lower the resistance of the electrode 794, thereby improving the sensor sensitivity of the touch panel 791. It can be done.

[0644] For example, the electrodes 793, 794, and 796 may be made of conductive nanowires. The average diameter of the nowire is 1 nm or more and 100 nm or less, preferably 5 nm or more and 50 nm or less. The size of the nanowires may be set to 5 nm or more and 25 nm or less, more preferably. The wires are made of metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. For example, electrodes 664, 666 may be used. When Ag nanowires are used for either 5, 667 or all of them, the The light transmittance can be set to 89% or more, and the sheet resistance can be set to 40Ω / □ or more and 100Ω / □ or less. Cut.

[0645] In addition, in FIG. 53, the configuration of an in-cell type touch panel is illustrated. For example, a so-called on-cell type touch panel formed on the display device 700, or Alternatively, it may be a so-called out-cell type touch panel that is attached to the display device 700. .

[0646] In this way, the display device according to one embodiment of the present invention can be used in combination with various types of touch panels. You can be there.

[0647] Note that the structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0648] (Embodiment 6) In this embodiment, an example of a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. 4 will be used to explain.

[0649] <6-1. Display device configuration examples> FIG. 54 is a block diagram illustrating an example of a display device including a semiconductor device of one embodiment of the present invention. .

[0650] The display device shown in FIG. 54 includes a pixel section 512 and gate line drivers arranged around the pixel section 512. The pixel portion 512 includes a signal line driver circuit 516 and a signal line driver circuit 518 disposed on the periphery of the pixel portion 512 . The pixel portion 512 includes a plurality of pixel circuits 514 .

[0651] 54 also includes a terminal portion 517 and a protection circuit 513. The terminal portion 517 and the protection circuit 513 may not be provided.

[0652] <6-2. Pixel section and pixel circuit> The pixel section 512 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). It has a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 514), and The driver circuit 516 has a function of outputting a signal (scanning signal) that selects the pixel circuit 514. The signal line driver circuit 518 outputs signals (data) for driving the display elements of the pixel circuits 514. It has the function to supply a data signal.

[0653] In FIG. 54, a plurality of pixel circuits 514 are arranged in a matrix (stripe arrangement). However, the present invention is not limited to this, and for example, the pixel circuits 514 may be arranged in a delta configuration. In addition, when a color display is performed, the color controlled by the pixel circuit 514 is The elements are the three colors RGB (R is red, G is green, B is blue). The color elements controlled by the path 514 are not limited to these, and may be more than these. For example, R GBW (W is white), or RGB plus Y (yellow), C (cyan), M (magenta), etc. You can add one or more colors. The size of the display area for each dot of the color element is different. It may be possible.

[0654] Each of the plurality of pixel circuits 514 includes a light emitting element and a control circuit for controlling a current flowing through the light emitting element. A driving transistor controls the light emitting element. The light-emitting device has a pair of electrodes, one of which receives electrons and the other of which receives holes. The electrons and holes are then recombined to form a light-emitting layer. The organic compound forms an excited state, and emits light when the excited state returns to the ground state. Due to this mechanism, such a light-emitting element is called a current-excited light-emitting element.

[0655] Note that the pixel circuit 514 can have the structure shown in FIG. 9 in Embodiment 1. Such a configuration is preferable because it can increase the pixel density of the display device.

[0656] <6-3. Gate Line Driver Circuit and Signal Line Driver Circuit> Either one or both of the gate line driver circuit 516 and the signal line driver circuit 518 are connected to the pixel portion. It is desirable to form it on the same board as 512. This reduces the number of parts and terminals. Either the gate line driver circuit 516 or the signal line driver circuit 518 can be used. If both the pixel section 512 and the gate line driving circuit are not formed on the same substrate, Either one or both of the signal line driver circuit 516 and the signal line driver circuit 518 can be formed by COG or TAB (Tap This can be implemented using Automated Bonding.

[0657] Each of the plurality of pixel circuits 514 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input through one of the data lines DL, and a data signal is given through the other of the data lines DL. A data signal is input via the pixel circuit 514. The write and hold of data signals is controlled by the operation circuit 516. For example, in the mth row The pixel circuit 514 in the nth column receives gate line driving signals via a scanning line GL_m (m is a natural number equal to or less than X). A pulse signal is input from the driving circuit 516, and the data line DL_ A data signal is input from the signal line driver circuit 518 via n (n is a natural number equal to or less than Y).

[0658] The gate line driving circuit 516 includes a shift register and the like. A signal for driving the shift register is input via the slave unit 517, and a signal is output. For example, the gate line driving circuit 516 receives a start pulse signal, a clock signal, etc. The gate line driving circuit 516 outputs a pulse signal. , and the scanning lines GL_1 to GL_X). A plurality of driver circuits 516 are provided, and the scanning lines GL_1 to GL_3 are connected to the gate line driver circuits 516. Alternatively, the gate line driving circuit 516 may control the GL_X separately. However, the present invention is not limited to this, and the gate line driving circuit 51 6 may also supply other signals. For example, the gate line driver circuit 516 may be the same as that shown in FIG. As shown in FIG. 4, wirings for controlling the potential of the light-emitting element (hereinafter, ANODE_1 to ANODE_2) are provided. _X).

[0659] The signal line driver circuit 518 includes a shift register and the like. 517, the signal to drive the shift register, as well as the signal that is the source of the data signal. The signal line driver circuit 518 outputs a signal (image signal) to the pixel circuit 514 based on the image signal. The signal line driver circuit 518 has a function of generating a data signal to be written. The data signal is output according to the pulse signal obtained by inputting a pulse, clock signal, etc. The signal line driver circuit 518 has a function of controlling the wiring ( hereinafter, the data lines DL_1 to DL_Y) or The signal line driver circuit 518 has a function of supplying an initialization signal. However, the signal line driver circuit 518 can also supply other signals. For example, the signal line driver circuit 518 is configured using a plurality of analog switches. The driving circuit 518 sequentially turns on a plurality of analog switches to generate an image signal. The time-divided signal can be output as a data signal.

[0660] <6-4.Protection circuit> The protection circuit 513 is, for example, a wiring between the gate line driving circuit 516 and the pixel circuit 514. The protection circuit 513 is connected to the signal line driver circuit 518 and the pixel circuit 514. Alternatively, the protection circuit 513 is connected to the data line DL, which is the wiring between the gate It can be connected to the wiring between the line driver circuit 516 and the terminal section 517. The wiring 513 can be connected to the wiring between the signal line driver circuit 518 and the terminal portion 517. The terminal section 517 is used to transmit power, control signals, and image signals from an external circuit to the display device. It has a terminal for input.

[0661] When a potential outside a certain range is applied to the wiring to which the protection circuit 513 is connected, the protection circuit 513 protects the wiring. By providing a protection circuit 513, E It is generated by electrostatic discharge (SD) etc. The resistance of the display device to the overcurrent generated by the gate line driving circuit 5 can be improved. 16, or the protection circuit 513 is connected to the signal line driver circuit 518. Alternatively, a protection circuit 513 may be connected to the terminal portion 517. You may do so.

[0662] Note that the structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0663] (Embodiment 7) In this embodiment, a display module and an electronic device including a semiconductor device according to one embodiment of the present invention will be described. This will be explained with reference to FIGS. 55 to 58.

[0664] <7-1. Display module> The display module 7000 shown in FIG. 55 is made up of an upper cover 7001 and a lower cover 7002. In between, touch panel 7004 connected to FPC7003 and touch panel 7005 connected to FPC7005 Display panel 7006, backlight 7007, frame 7009, printed circuit board 7010 , and a battery 7011.

[0665] The semiconductor device of one embodiment of the present invention can be used for the display panel 7006, for example.

[0666] The upper cover 7001 and the lower cover 7002 are connected to the touch panel 7004 and the display panel 7005. The shape and dimensions can be changed appropriately to match the size of 006.

[0667] The touch panel 7004 is a resistive or capacitive touch panel. 7006. In addition, the opposing substrate (sealing substrate) of the display panel 7006 ) can also be equipped with a touch panel function. It is also possible to provide an optical sensor in each pixel of the 06 to create an optical touch panel.

[0668] The backlight 7007 has a light source 7008. In FIG. Although the configuration in which the light source 7008 is disposed on the 7007 has been exemplified, the present invention is not limited to this. For example, a light source 7008 is arranged at the end of a backlight 7007, and a light diffusion plate is further used. In addition, when a self-luminous light emitting element such as an organic EL element is used, or when a reflective In the case of a panel or the like, the backlight 7007 may not be provided.

[0669] The frame 7009 has a function of protecting the display panel 7006 and also a function of preventing the operation of the printed circuit board 7010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the frame. The frame 7009 may also function as a heat sink.

[0670] The printed circuit board 7010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply to the power supply circuit can be an external commercial power supply or Alternatively, the power source may be a separately provided battery 7011. This can be omitted if a commercial power source is used.

[0671] In addition, the display module 7000 includes additional components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided as follows.

[0672] <7-2.Electronic equipment 1> Next, examples of electronic devices are shown in FIGS. 56(A) to 56(E).

[0673] FIG. 56(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. Figure.

[0674] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, a shutter button The camera 8000 has a detachable lens 8006 attached thereto. It is being used.

[0675] Here, the camera 8000 is used, and the lens 8006 is removed from the housing 8001 and replaced. However, the lens 8006 and the housing may be integrated.

[0676] The camera 8000 can capture an image by pressing the shutter button 8004. The display unit 8002 also functions as a touch panel. It is also possible to take an image by

[0677] The housing 8001 of the camera 8000 has a mount with electrodes, and a finder 8100 In addition, a strobe device, etc. can be connected.

[0678] The finder 8100 includes a housing 8101, a display portion 8102, a button 8103, and the like.

[0679] The housing 8101 has a mount that engages with the mount of the camera 8000, The mount can be attached to the camera 8000. and displays on a display unit 8102 an image or the like received from a camera 8000 via the electrode. It is possible.

[0680] The button 8103 functions as a power button. The display of 102 can be switched on and off.

[0681] The display unit 8002 of the camera 8000 and the display unit 8102 of the finder 8100 are The display device according to one embodiment of the present invention can be applied.

[0682] In FIG. 56(A), the camera 8000 and the finder 8100 are treated as separate electronic devices. These are configured to be detachable, but the housing 8001 of the camera 8000 is equipped with a display device. The camera may have a built-in viewfinder.

[0683] FIG. 56(B) is a diagram showing the appearance of the head mounted display 8200.

[0684] The head-mounted display 8200 includes a mounting part 8201, a lens 8202, and a main body 820 3, a display unit 8204, a cable 8205, etc. The mounting unit 8201 also has a battery It has a built-in Teri 8206.

[0685] A cable 8205 supplies power from a battery 8206 to the main body 8203. 3 is equipped with a wireless receiver and the like, and displays video information such as received image data on a display unit 8204...

Claims

1. A semiconductor device comprising a first transistor, a second transistor, and a capacitance element, a first gate of the first transistor electrically connected to a second gate of the first transistor; one of a source and a drain of the first transistor is electrically connected to a first gate of the second transistor and one electrode of the capacitance element; a second gate of the second transistor is electrically connected to a second electrode of the capacitor; a first semiconductor layer having a channel formation region of the first transistor and a second semiconductor layer having a channel formation region of the second transistor are provided on different insulating films; The display device, wherein the second semiconductor layer has a region overlapping with a first conductive layer functioning as one of a source electrode and a drain electrode of the first transistor.

2. In claim 1, The display device, wherein the first semiconductor layer includes an oxide semiconductor.

3. In claim 1 or 2, The display device, wherein the second semiconductor layer includes an oxide semiconductor.

4. In any one of claims 1 to 3, a light-emitting element; One of a source and a drain of the second transistor is electrically connected to the light-emitting element.

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