Method for recycling semiconductor substrate and recycled semiconductor substrate

Abstract

To provide a recycling technology for a semiconductor substrate.SOLUTION: The method for recycling a semiconductor substrate of a wide bandgap compound semiconductor includes: a preparation step of preparing a base substrate in which a first layer of a first conductivity type is exposed on a surface; a first growth step of epitaxially growing a second layer having properties different from those of the first layer on a surface of the first layer; a second growth step for epitaxially growing a device layer of the first conductivity type on a surface of the second layer; a device formation step of forming a device element structure in the device layer; a separation-surface formation step of forming, inside the device layer, a separation surface parallel to a surface of the device layer; and a separation step of separating the device layer along the separation surface. A base substrate having a structure in which the first layer is exposed on a surface of the second layer is formed by the separation step. The first growth step, the second growth step, the device formation step, the separation-surface formation step, and the separation step are configured to be repeatedly executable in this order.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This specification discloses a method for recycling semiconductor substrates and techniques related to recycled semiconductor substrates. [Background technology]

[0002] Semiconductor substrates made of wide-gap semiconductors such as gallium nitride are more expensive than silicon substrates. As a method for reducing the cost of these expensive wide-gap semiconductor substrates, a recycling process has been proposed in which a semiconductor substrate on which a device has been fabricated is separated into a base substrate and a device layer, and the base substrate is reused. Related technology is disclosed in Patent Document 1. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-135625 Summary of the Invention [Problem to be solved by the invention]

[0004] In the substrate recycling process, it may be necessary to set an upper limit on the number of recycles. This is because as the number of recycles increases, the impact on the substrate and devices (e.g., metal contamination of the substrate, increased PN junction leakage, etc.) may become unignorable. However, there is no established method for managing the number of recycles. [Means for solving the problem]

[0005] This specification discloses a method for recycling a semiconductor substrate of a wide-gap compound semiconductor (GaN). The recycling method includes a preparation step of preparing a base substrate (40) having a structure in which a first layer (11) of a first conductivity type (n-type) is exposed on a surface thereof. The recycling method includes a first growth step of epitaxially growing a second layer (12) having properties different from those of the first layer on the surface of the first layer. The recycling method includes a second growth step of epitaxially growing a device layer (13) of the first conductivity type on the surface of the second layer. The recycling method includes a device formation step of forming a device element structure (20) in the device layer. The recycling method includes a separation surface formation step of forming a separation surface (SP) parallel to the surface of the device layer within the device layer so as to separate the device layer into a first layer located below and an upper layer located above. The recycling method also includes a separation step of separating the device layer by the separation surface. The separation step results in a base substrate having a structure in which the first layer is exposed on the surface of the second layer. The first growth step, the second growth step, the device formation step, the separation surface formation step, and the separation step can be repeatedly performed in this order.

[0006] According to the above configuration, the semiconductor substrate can be recycled each time the first growth process, second growth process, device formation process, separation surface formation process, and separation process are repeated in this order. Furthermore, a stacked structure in which first layers are disposed between second layers can be additionally formed on the surface of the base substrate each time recycling is performed. This allows the number of second layers disposed on the surface of the base substrate to be increased as the number of recycling cycles increases. Therefore, by measuring the number of second layers, it is possible to manage the number of recycling cycles.

[0007] This specification discloses a recycled semiconductor substrate (1) of a wide-gap compound semiconductor (GaN). The recycled semiconductor substrate includes a support substrate (10) of a first conductivity type (n-type). The recycled semiconductor substrate includes k second layers (12) stacked above the support substrate, where k is a natural number equal to or greater than 1. The recycled semiconductor substrate includes a first layer (11) of the first conductivity type disposed between adjacent second layers in the vertical direction. The recycled semiconductor substrate includes a device layer (13) of the first conductivity type disposed on the upper surface of the uppermost second layer. The second layer has different characteristics from the first layer. The value of k corresponds to the number of times the substrate has been recycled.

[0008] In the recycled semiconductor substrate of this specification, the number of times of recycling can be managed by measuring the value of k, which is the number of second layers. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a flowchart illustrating a method for recycling a semiconductor substrate. [Figure 2] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 3] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 4] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 5] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 6] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 7] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 8] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 9] 1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. [Figure 10]1A to 1C are schematic cross-sectional views illustrating a method for recycling a semiconductor substrate. DETAILED DESCRIPTION OF THE INVENTION [Example]

[0010] (Method for recycling semiconductor substrates) A method for recycling a semiconductor substrate will be described with reference to the flowchart in FIG. 1 and the cross-sectional schematic views in FIGS. 2 to 10. Note that, hereinafter, steps may be abbreviated as "S." In FIGS. 2 to 10, directions parallel to the surface of the semiconductor substrate are defined as the x and y directions. The direction perpendicular to the surface is defined as the z direction. In this example, a process for fabricating a device using a new support substrate 10 will be described with reference to FIGS. 2 to 7. A subsequent process for performing a first recycling process will be described with reference to FIGS. 8 to 10.

[0011] In S10, a new bulk wafer-shaped support substrate 10 is prepared (see FIG. 2). The support substrate 10 is a semiconductor substrate made of a wide-gap compound semiconductor. In this example, the support substrate 10 is made of n-type gallium nitride (GaN). An n-type surface is exposed on a surface 10f of the support substrate 10. S20 to S90 are steps that are repeatedly performed in a loop process. Each step will be described.

[0012] In S20, a first growth step is performed. In the first growth step, a second GaN layer 12 is epitaxially grown (see FIG. 2). The second layer 12 is a layer having properties different from those of the n-type support substrate 10 and the n-type first layer 11 described below. Specifically, the second layer 12 is p-type GaN. The p-type carrier concentration of the second layer 12 is not particularly limited. It is more preferable that the film thickness of the second layer 12 is 1 μm or more. This makes it possible to use Raman spectroscopy in the measurement step (S80) described below.

[0013] In S30, a second growth step is performed. In the second growth step, an n-type GaN device layer 13 is epitaxially grown on the surface 12f of the second layer 12 (see FIG. 3). This completes the recycled substrate 1. The thickness of the device layer 13 may be any thickness necessary for fabricating various devices in the device formation step of S40. The thickness of the device layer 13 may be determined so that the thickness T1 of the recycled substrate 1 falls within a general standard value range (e.g., 725±25 μm for an 8-inch wafer).

[0014] In S40, a device formation step is performed. In the device formation step, a device element structure 20 is formed in the device layer 13 using a general semiconductor manufacturing process (see FIG. 4). The device element structure 20 can have various structures. For example, it may be a lateral MOSFET, a vertical MOSFET, a superjunction MOSFET, an IGBT, a PN diode, a heterojunction bipolar transistor (HBT), a HEMT, or the like.

[0015] In S50, a release surface forming step is performed. This will be explained in detail. As shown in Fig. 5, a holding member 30 is placed on the upper surface of the device element structure 20. The holding member 30 includes a support base 31 and an adhesive layer 32. The adhesive layer 32 allows the support base 31 to be fixed to the upper surface of the device element structure 20.

[0016] Next, the recycled substrate 1 is placed on a stage (not shown). Then, a laser beam LL is irradiated onto the rear surface 10r of the recycled substrate 1. The stage is moved so that the focal point of the laser beam LL is scanned relatively along the surface direction of the device layer 13. This allows a separation surface SP, parallel to the surface 13f of the device layer 13, to be formed inside the device layer 13. The separation surface SP is a layer where gallium is precipitated as a result of decomposition of gallium and nitrogen by thermal energy. The separation surface SP allows the device layer 13 to be separated into a lower layer 13L and an upper layer 13U. The depth D1 from the surface 13f of the device layer 13 to the separation surface SP can be set appropriately depending on the ease of handling and pressure resistance of the device element structure 20 after separation.

[0017] In S60, a separation step is performed. In the separation step, the device layer 13 is separated by the peeled surface SP (see FIG. 6). A more detailed explanation follows. The holding member 30 and the support substrate 10 are each supported by a support mechanism (not shown). Then, a tensile force or the like is applied in the thickness direction (z direction) of the recycled substrate 1. This allows the recycled substrate 1 to be separated into a base substrate 40 and a device substrate 41 at the peeled surface SP as a boundary. The device substrate 41 corresponds to the upper part of the recycled substrate 1 and is a substrate including the device element structure 20. Methods for forming various chips from the separated device substrate 41 are well known, and therefore will not be described here. The base substrate 40 corresponds to the lower part of the recycled substrate 1 and is a substrate having a structure in which the lower layer 13L of the device layer 13 is exposed on the surface of the second layer 12. The surface 13Lf of the lower layer 13L is a peeled surface and has a high roughness.

[0018] In S70, a surface polishing step is performed. In this step, the surface 13Lf, which is the peeled surface, is polished and planarized using a method such as CMP (Chemical Mechanical Polishing). The amount of polishing may be an amount necessary for planarization, for example, approximately 20 μm. As a result, as shown in FIG. 7, the lower layer 13L remaining on the surface 12f of the second layer 12 can function as the first layer 11. The first layer 11 is an n-type GaN layer. On the other hand, the second layer 12 is a p-type GaN layer. The first layer 11 is disposed between multiple second layers 12. The presence of the first layer 11 between each of the multiple second layers 12 allows the multiple second layers 12 to be clearly distinguished from each other, making it possible to measure the number of stacked second layers 12.

[0019] In S80, a measurement step is performed. In this step, the number of layers of the second layer 12 included in the base substrate 40 is measured non-destructively. Various measurement methods can be used. For example, Raman spectroscopy may be performed on the surface 11f of the base substrate 40. In Raman spectroscopy, the carrier concentration of the GaN crystal can be measured by observing the shift of the A1(LO) peak. A detailed description of the measurement method will be omitted here. When Raman spectroscopy is used, it is preferable that each of the stacked second layers 12 has a thickness of 1 μm or more to improve measurement accuracy. Furthermore, for example, X-ray reflectivity measurement (XRR) may be performed on the surface 11f of the base substrate 40. When XRR is used, it is preferable that each of the stacked second layers 12 has a thickness of 2 nm or more to improve measurement accuracy.

[0020] The measurement step (S80) is preferably performed after the surface polishing step (S70) and before the start of the next recycling process. By performing the measurement step after the surface polishing step, analysis can be performed on a flat surface, thereby improving measurement accuracy. Furthermore, by performing the measurement step before the next recycling process, analysis can be performed before the thick device layer 13 is formed, making it easier to obtain information about the second layer 12.

[0021] In S90, a thickness adjustment step is performed. In this step, the thickness T2 of the base substrate 40 is measured (see FIG. 7). If the thickness T2 exceeds a predetermined range, the back surface 10r is polished to reduce the thickness T2 to within the predetermined range. Note that if the thickness T2 is within the predetermined range when the thickness is measured, the back surface polishing step can be skipped.

[0022] A method for determining the predetermined range of thickness T2 will now be described. In the subsequent loop process, device layer 13 is formed on the surface of base substrate 40, and recycled substrate 1 is completed (see S30). Thickness T1 can be determined so that thickness T1 of this completed recycled substrate 1 falls within a range of general standard values. In other words, the range obtained by subtracting the film thickness of device layer 13 from the range of general standard values ​​can be set as the predetermined range of thickness T2.

[0023] In S100, it is determined whether recycling is possible. Specifically, the number of times of recycling is identified based on the number of layers of the second layer 12 measured in S80. In the example of FIG. 7, in S80, the number of layers of the second layer 12 is measured to be "1." Therefore, it is identified that the next recycling process to be performed is the "first" recycling process.

[0024] Then, it is determined whether the number of recycle processes has reached the upper limit of recycles. The upper limit of recycles may be determined in advance, or may be determined each time based on the state of the substrate (e.g., metal contamination, increased PN junction leakage, etc.). If the upper limit of recycles has been reached, it is determined that recycling is not possible (S100: NO), and the flow ends. On the other hand, if the upper limit of recycles has not been reached (S100: YES), the flow returns to S20, and the loop process begins.

[0025] In the loop process, the above-mentioned first growth step (S20) to thickness adjustment step (S90) are executed. The loop process is repeated k times, where k is a natural number equal to or greater than 1, so that the recycling process can be performed k times.

[0026] 8 to 10, the first loop process (i.e., the first recycling process) will be described. In a first growth step (S20), a second layer 12_1 of p-type GaN is epitaxially grown on the upper surface of base substrate 40 shown in FIG. 7 (see FIG. 8). In a second growth step (S30), a device layer 13 of n-type GaN is epitaxially grown on surface 12_1f of second layer 12_1 (see FIG. 8). This completes recycled substrate 1.

[0027] In the device formation step (S40), a device element structure 20 is formed on the device layer 13 (see FIG. 9). In the release surface formation step (S50), the holding member 30 is fixed and a release surface SP is formed (see FIG. 9). In the separation step (S60), the base substrate 40 and the device substrate 41 are separated by the release surface SP. In the surface polishing step (S70), the surface of the base substrate 40 is polished. This completes the base substrate 40 recycled in the first recycling process, as shown in FIG. 10.

[0028] In the measurement step (S80), the base substrate 40 in FIG. 10 is measured. Then, it is measured that the number of layers of the second layer 12 is "2." Therefore, it can be identified that the next recycling process is the "second" recycling process. In S100, it is determined whether the number of recycling times for the "second" process has reached the upper recycling limit. If the upper limit has not been reached (S100: YES), the process returns to S20, and the second recycling process is started.

[0029] The contents of the second and subsequent recycle processes are the same as the contents of the first recycle process described above, and therefore a description thereof will be omitted.

[0030] (effect) With the technology of the present specification, when the kth recycling is completed, k-1th second layer 12 can be included in base substrate 40. Therefore, by measuring the number of second layers 12 in the measurement step (S80), it becomes possible to accurately identify the number of recycling times.

[0031] Possible methods for determining the number of times a substrate has been recycled include forming laser marks on the backside of the substrate or forming voids inside the substrate. However, these methods involve partially destroying the substrate, which poses the risk of cracking the substrate. On the other hand, the technology described herein can determine the number of times the substrate has been recycled by non-destructively analyzing the number of layers in the second layer 12. This avoids the risk of cracking the substrate, allowing for a safe recycling process. [Example]

[0032] Example 2 differs from Example 1 in that the second layer 12 is n-type. Only the details unique to Example 2 will be described below. Details common to Examples 1 and 2 will not be described.

[0033] In Example 2, the first layer 11 and the second layer 12 are both n-type GaN. The first layer 11 and the second layer 12 have different n-type carrier concentrations, and therefore have different properties. The difference in n-type carrier concentration between the first layer 11 and the second layer 12 is preferably 10% or more. This makes it possible to stably control the difference in carrier concentration when the first layer 11 and the second layer 12 are formed by epitaxial growth.

[0034] In the technique of Example 2, in the measuring step (S80), the first layer 11 and the second layer 12 can be distinguished from each other by the difference in n-type carrier concentration. Therefore, it becomes possible to measure the number of stacked second layers 12 in a non-destructive manner.

[0035] Although the embodiments of the present invention have been described in detail above, they are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. The technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives alone is technically useful.

[0036] (Variation) The correspondence between the number of layers of the second layer and the number of recycles is not limited to the embodiment described in this specification. Various correspondences are possible as long as the number of layers of the second layer can uniquely identify the number of recycles. The number of recycles may correspond to the number of layers of the second layer, which increases with a certain regularity. For example, the number of layers of the second layer, "1, 3, 5, 7...", may correspond to the number of recycles, "1, 2, 3, 4...". Furthermore, the number of layers of the second layer, which increases without regularity, may correspond to the number of recycles. For example, the number of layers of the second layer, "0, 1, 4, 6, 7...", may correspond to the number of recycles, "1, 2, 3, 4, 5...".

[0037] In the technology of this specification, the n-type and p-type may be reversed. In this case, n-type and p-type may be interchanged in the description of the embodiments.

[0038] The wide-gap compound semiconductor to which the technology of this specification can be applied is not limited to GaN. For example, SiC (silicon carbide), GaO x (gallium oxide), AlGaN (aluminum gallium nitride), AlN (aluminum nitride), InN (indium nitride), InGaN (indium gallium nitride), or a mixed crystal thereof may also be used.

[0039] The configurations of the techniques disclosed in this specification are listed below. [Configuration 1] A method for recycling a semiconductor substrate of a wide-gap compound semiconductor (GaN), comprising: a preparation step of preparing a base substrate (40) having a structure in which a first layer (11) of a first conductivity type (n-type) is exposed on the surface; a first growth step of epitaxially growing a second layer (12) having properties different from those of the first layer on a surface of the first layer; a second growth step of epitaxially growing a device layer (13) of the first conductivity type on the surface of the second layer; a device formation step of forming a device element structure (20) in the device layer; a release surface forming step of forming a release surface (SP) parallel to a surface of the device layer within the device layer so as to separate the device layer into the first layer located below and an upper layer located above; a separation step of separating the device layer by the release surface; Equipped with the base substrate is formed by the separation step, and has a structure in which the first layer is exposed on the surface of the second layer; The first growth step, the second growth step, the device formation step, the separation surface formation step, and the separation step are configured to be repeatedly performed in this order. A method for recycling semiconductor substrates. [Configuration 2] 2. The method for recycling a semiconductor substrate according to claim 1, wherein the second layer is a semiconductor layer of a second conductivity type (p-type). [Configuration 3] the second layer is a semiconductor layer of a first conductivity type, 2. The method for recycling a semiconductor substrate according to claim 1, wherein the second layer and the first layer have different concentrations of carriers of the first conductivity type. [Configuration 4] The semiconductor substrate recycling method according to any one of configurations 1 to 3, further comprising a measuring step of non-destructively measuring the number of layers of the second layer after the separating step. [Configuration 5] 5. The semiconductor substrate recycling method according to claim 4, wherein the measuring step includes a step of performing Raman spectroscopic analysis or X-ray reflectivity measurement on the surface of the base substrate. [Configuration 6] The semiconductor substrate recycling method according to any one of configurations 1 to 5, further comprising a step of polishing at least one of the front and back surfaces of the base substrate after the separating step. [Configuration 7] A recycled semiconductor substrate (1) of a wide-gap compound semiconductor (GaN), A support substrate (10) of a first conductivity type (n-type), k second layers (12) stacked above the support substrate, where k is a natural number equal to or greater than 1; a first layer (11) of a first conductivity type disposed between the second layers adjacent to each other in the vertical direction; a first conductivity type device layer (13) disposed on the upper surface of the second layer, which is the uppermost layer; Equipped with the second layer has different properties than the first layer; The value of k corresponds to the number of recycles. Recycled semiconductor substrates. [Configuration 8] 8. The recycled semiconductor substrate according to claim 7, wherein the second layer is a semiconductor layer of a second conductivity type (p-type). [Configuration 9] the second layer is a semiconductor layer of a first conductivity type, 8. The recycled semiconductor substrate according to claim 7, wherein the second layer and the first layer have different concentrations of carriers of the first conductivity type.

[0040] According to the second configuration, the first layer and the second layer can be distinguished from each other by the difference in conductivity type, and therefore the number of second layers can be measured.

[0041] According to the third aspect, the first layer and the second layer can be distinguished from each other by the difference in the carrier concentration of the first conductivity type.

[0042] According to configuration 4, the number of times of recycling can be measured non-destructively. This makes it possible to avoid the risk of substrate cracking, and therefore makes it possible to operate the recycling process safely.

[0043] According to configuration 5, the number of times of recycling can be measured non-destructively.

[0044] According to configuration 6, when the front surface of the base substrate is polished, the front surface can be smoothed, and when the back surface of the base substrate is polished, the thickness of the base substrate can be adjusted. [Explanation of symbols]

[0045] 1: Recycled substrate 11: First layer 12: Second layer 13: Device layer 20: Device element structure S20: First growth step, S30: Second growth step S40: Device formation step S50: Separation surface formation step S60: Separation step SP: Separation surface

Claims

1. A method for recycling semiconductor substrates of wide-gap compound semiconductors (GaN), comprising: a preparation step of preparing a base substrate (40) having a structure in which a first layer (11) of a first conductivity type (n-type) is exposed on the surface; a first growth step of epitaxially growing a second layer (12) having properties different from those of the first layer on a surface of the first layer; a second growth step of epitaxially growing a device layer (13) of a first conductivity type on the surface of the second layer; a device formation step of forming a device element structure (20) in the device layer; a release surface forming step of forming a release surface (SP) parallel to a surface of the device layer within the device layer so as to separate the device layer into the first layer located below and an upper layer located above; a separation step of separating the device layer by the release surface; Equipped with the base substrate is formed by the separation step, and has a structure in which the first layer is exposed on a surface of the second layer; the first growth step, the second growth step, the device formation step, the separation surface formation step, and the separation step are configured to be repeatedly performed in this order; A method for recycling semiconductor substrates.

2. 2. The method for recycling a semiconductor substrate according to claim 1, wherein the second layer is a semiconductor layer of a second conductivity type (p-type).

3. the second layer is a semiconductor layer of a first conductivity type, 2. The method for recycling a semiconductor substrate according to claim 1, wherein the second layer and the first layer have different concentrations of carriers of the first conductivity type.

4. 4. The method for recycling a semiconductor substrate according to claim 1, further comprising a measuring step of non-destructively measuring the number of layers of the second layer after the separating step.

5. 5. The semiconductor substrate recycling method according to claim 4, wherein the measuring step comprises a step of performing Raman spectroscopic analysis or X-ray reflectivity measurement on the surface of the base substrate.

6. 2. The method for recycling a semiconductor substrate according to claim 1, further comprising the step of polishing at least one of the front surface and the back surface of the base substrate after the separating step.

7. A recycled semiconductor substrate (1) of a wide-gap compound semiconductor (GaN), A support substrate (10) of a first conductivity type (n-type), k second layers (12) stacked above the support substrate, where k is a natural number equal to or greater than 1; a first layer (11) of a first conductivity type disposed between the second layers adjacent to each other in the vertical direction; a device layer (13) of a first conductivity type disposed on the upper surface of the second layer, which is the uppermost layer; Equipped with the second layer has different properties than the first layer; The value of k corresponds to the number of recycles. Recycled semiconductor substrates.

8. The recycled semiconductor substrate according to claim 7 , wherein the second layer is a semiconductor layer of a second conductivity type (p-type).

9. the second layer is a semiconductor layer of a first conductivity type, The recycled semiconductor substrate according to claim 7 , wherein the second layer and the first layer have different concentrations of carriers of the first conductivity type.

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