Surface-emitting semiconductor laser and optical transmission device

Abstract

To increase the thickness of the quantum well layers to nearly the critical thickness, and make the quantum well layers more multilayered than when the barrier layers are provided with thicknesses corresponding to the thickness of the quantum well layers in a light-emitting layer formed by alternately laminating quantum well layers and barrier layers containing at least In, Ga, and As.SOLUTION: A surface-emitting semiconductor laser includes a substrate, a first semiconductor multilayer reflector stacked on the substrate, a second semiconductor multilayer reflector including a current constriction layer and stacked on the first semiconductor multilayer reflector, and a light-emitting layer that is disposed between the first semiconductor multilayer reflector and the second semiconductor multilayer reflector and emits light, the light-emitting layer composed of quantum well layers and barrier layers each containing at least In, Ga, and As stacked alternately, where the thickness of the quantum well layer is thinner than the critical film thickness by a predetermined margin.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a surface-emitting semiconductor laser and an optical transmission device. [Background technology]

[0002] Patent Document 1 describes a surface-emitting laser element comprising a substrate, an optical resonator located on the substrate and having a lower multilayer film reflector and an upper multilayer film reflector, a strained active layer located within the resonator and having a multiple quantum well structure having quantum well layers and barrier layers, and a current confinement layer located above the strained active layer and having a selective oxidation portion, wherein the current confinement layer is positioned in a position where the strain in the selective oxidation portion affects the strained active layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-244470 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure aims to increase the thickness of the quantum well layers in a light-emitting layer formed by alternately stacking quantum well layers and barrier layers containing at least In, Ga, and As, compared to a case in which the thickness of the quantum well layers is increased to near the critical film thickness and the barrier layers have a thickness corresponding to the thickness of the quantum well layers, by multiplying the quantum well layers. [Means for solving the problem]

[0005] A surface-emitting semiconductor laser according to a first aspect of the present disclosure includes a substrate, a first semiconductor multilayer reflector stacked on the substrate, a second semiconductor multilayer reflector including a current constriction layer and stacked on the first semiconductor multilayer reflector, and a light-emitting layer disposed between the first semiconductor multilayer reflector and the second semiconductor multilayer reflector to emit light, the light-emitting layer being configured by alternately stacking quantum well layers and barrier layers containing at least In, Ga, and As, and the thickness of the quantum well layer being thinner than the critical film thickness by a predetermined margin.

[0006] A surface-emitting semiconductor laser according to a second aspect of the present disclosure is the surface-emitting semiconductor laser according to the first aspect, wherein the thickness of the barrier layer is equal to or less than the critical film thickness.

[0007] A surface-emitting semiconductor laser according to a third aspect of the present disclosure is the surface-emitting semiconductor laser according to the first aspect, wherein the margin is 4.0 nm or more.

[0008] A surface-emitting semiconductor laser according to a fourth aspect of the present disclosure is the surface-emitting semiconductor laser according to the third aspect, wherein the margin is 4.4 nm or more.

[0009] A surface-emitting semiconductor laser according to a fifth aspect of the present disclosure is the surface-emitting semiconductor laser according to the first or second aspect, wherein the quantum well layer has an In composition of 28% or more.

[0010] A surface-emitting semiconductor laser according to a sixth aspect of the present disclosure is the surface-emitting semiconductor laser according to the first aspect, wherein the quantum well layer is thinner than the barrier layer.

[0011] A surface-emitting semiconductor laser according to a seventh aspect of the present disclosure is the surface-emitting semiconductor laser according to the second aspect, wherein the barrier layer has a thickness of 4.0 nm or more.

[0012] An eighth aspect of the present disclosure provides a surface-emitting semiconductor laser according to the first aspect, wherein the thickness of the quantum well layer is within ±30% of the thickness of the barrier layer.

[0013] A surface-emitting semiconductor laser according to a ninth aspect of the present disclosure is the surface-emitting semiconductor laser according to the first aspect, wherein the quantum well layer is an InGaAs quantum well layer.

[0014] An optical transmission device according to a tenth aspect of the present disclosure includes the surface-emitting semiconductor laser according to the first aspect, and an optical transmission section that transmits light output from the surface-emitting semiconductor laser. [Effects of the Invention]

[0015] According to the first aspect, in a light-emitting layer formed by alternately stacking quantum well layers and barrier layers containing at least In, Ga, and As, the quantum well layers can be multi-layered compared to when the thickness of the quantum well layers is increased to near the critical film thickness and the barrier layers are provided with thicknesses corresponding to the thickness of the quantum well layers.

[0016] According to the second aspect, the quantum well layer can be multi-layered compared to when the thickness of the barrier layer exceeds the critical thickness of the quantum well layer.

[0017] According to the third aspect, the quantum well layer can be multi-layered compared to when the margin is less than 4.0 nm.

[0018] According to the fourth aspect, the quantum well layer can be multi-layered compared to when the margin is less than 4.3 nm.

[0019] According to the fifth aspect, it is easier to ensure a margin between the critical film thickness and the thickness of the quantum well layer, compared to when the In composition of the quantum well layer is less than 28%.

[0020] According to the sixth aspect, it is possible to suppress an increase in crystal distortion due to lattice mismatch, compared to when the quantum well layer is thicker than the barrier layer.

[0021] According to the seventh aspect, the coupling between adjacent quantum well layers can be suppressed more effectively than when the thickness of the barrier layer is less than 4.0 nm.

[0022] According to the eighth aspect, the intensity of the laser light from the light-emitting layer can be ensured while suppressing coupling between adjacent quantum well layers, compared to when the thickness of the quantum well layer is more than +30% and less than -30% of the thickness of the barrier layer.

[0023] According to the ninth aspect, it is easier to ensure a margin between the critical film thickness and the thickness of the quantum well layer, compared to when the quantum well layer contains a component other than InGaAs.

[0024] According to the tenth aspect, in a light-emitting layer formed by alternately laminating quantum well layers and barrier layers containing at least In, Ga, and As, the thickness of the quantum well layers is increased to nearly the critical thickness, and the barrier layers have thicknesses corresponding to the thicknesses of the quantum well layers, thereby enabling an increase in optical transmission speed compared to a case where a light-emitting semiconductor laser is used. [Brief explanation of the drawings]

[0025] [Figure 1] 1 is a cross-sectional view illustrating a surface-emitting semiconductor laser according to an embodiment of the present disclosure. [Figure 2] 2 is an enlarged cross-sectional view of the active layer and its surroundings of the surface-emitting type semiconductor laser shown in FIG. [Figure 3] 1 is a graph showing the relationship between the indium composition ratio and the thickness of a quantum well layer. [Figure 4] 1 is a graph showing the relationship between the thickness of a barrier layer in a light-emitting layer and the optical confinement coefficient. DETAILED DESCRIPTION OF THE INVENTION

[0026] An embodiment for implementing the technology of the present disclosure will be described in detail below with reference to the drawings. Note that components and processes that perform the same operations, actions, and functions are assigned the same reference numerals throughout the drawings, and duplicated descriptions may be omitted as appropriate. Each drawing is merely a schematic illustration to allow a sufficient understanding of the technology of the present disclosure. Therefore, the technology of the present disclosure is not limited to only the illustrated examples. Furthermore, in this embodiment, descriptions of configurations that are not directly related to the technology of the present disclosure or well-known configurations may be omitted.

[0027] FIG. 1 is a cross-sectional view showing a surface-emitting semiconductor laser 20 according to an embodiment of the present disclosure.

[0028] As shown in FIG. 1, the surface-emitting semiconductor laser 20 according to this embodiment is, for example, a VCSEL (Vertical Cavity Surface Emitting Laser).

[0029] As shown in FIG. 1, the surface-emitting semiconductor laser 20 according to this embodiment includes a substrate 22, a contact layer 24, a first semiconductor multilayer reflector 26, an active layer 28, and a second semiconductor multilayer reflector 30.

[0030] In this embodiment, the first semiconductor multilayer reflector 26 is n-type and the second semiconductor multilayer reflector 30 is p-type, but the present disclosure is not limited to this configuration.

[0031] In the surface-emitting semiconductor laser 20 according to this embodiment, components including the contact layer 24, the first semiconductor multilayer reflector 26, the active layer 28, the second semiconductor multilayer reflector 30, and the dielectric multilayer reflector 44 form a mesa structure 36. The mesa structure 36 constitutes the laser portion of the surface-emitting semiconductor laser 20.

[0032] The substrate 22 is, for example, a semi-insulating GaAs (gallium arsenide) substrate. A semi-insulating GaAs substrate is a GaAs substrate that is not doped with impurities. A semi-insulating GaAs substrate has a very high resistivity, and the sheet resistance of the substrate is, for example, several MΩ.

[0033] The material of the substrate 22 may be other than GaAs, and may be, for example, GaN (gallium nitride) or InP (indium phosphide).

[0034] The contact layer 24 is stacked on the substrate 22. As an example, the contact layer 24 is formed of an n-type GaAs layer doped with Si.

[0035] The contact layer 24 is connected to the n-type first semiconductor multilayer film reflector 26. An n-side electrode pad 42B is formed on the contact layer 24. Therefore, the contact layer 24 has the function of applying a negative potential to the laser portion formed by the mesa structure 36.

[0036] The contact layer 24 may also serve as a buffer layer provided to improve the crystallinity of the substrate surface after, for example, thermal cleaning.

[0037] An n-type first semiconductor multilayer reflector 26 is stacked on the contact layer 24. This first semiconductor multilayer reflector 26 constitutes a lower DBR (Distributed Bragg Reflector).

[0038] The first semiconductor multilayer film reflector 26 is a multilayer film reflector configured by alternately stacking two semiconductor films having different refractive indices. Specifically, the first semiconductor multilayer film reflector 26 is made of Al 0.92 It is constructed by alternately stacking n-type low refractive index films made of GaAs and n-type high refractive index films made of GaAs. 0.92 The refractive index of GaAs is lower than that of n-type GaAs.

[0039] The active layer 28 is laminated on the first semiconductor multilayer film reflector 26. The active layer 28 functions as a resonator. Details of the active layer 28 will be described later.

[0040] The p-type second semiconductor multilayer reflector 30 is stacked on the active layer 28. In other words, the second semiconductor multilayer reflector 30 is stacked on the first semiconductor multilayer reflector 26 via the active layer 28. This second semiconductor multilayer reflector 30 constitutes an upper DBR.

[0041] The second semiconductor multilayer film reflector 30 is a multilayer film reflector configured by alternately stacking two semiconductor films having different refractive indices. Specifically, the second semiconductor multilayer film reflector 30 is made of Al 0.92 It is constructed by alternately stacking p-type low refractive index films made of GaAs and p-type high refractive index films made of GaAs. 0.92 The refractive index of GaAs is lower than that of p-type GaAs.

[0042] The second semiconductor multilayer reflector 30 also includes a selective oxidation layer 32. The selective oxidation layer 32 is an example of a current confinement layer. The selective oxidation layer 32 is disposed above the active layer 28. The selective oxidation layer 32 includes an aperture 32A representing a portion that is not confined by oxidation, and an oxidation confinement region 32B which is a region that is confined by oxidation. In addition to selective oxidation for current confinement, current confinement may also be achieved by, for example, temporarily forming a pattern corresponding to an opening when stacking a layer structure to selectively allow current to pass through the opening, or by introducing ions to make it difficult for current to pass through the ion-introduced portion.

[0043] The amount of aluminum per unit amount of the aluminum-containing material forming the selective oxidation layer 32 may be greater than the amount of aluminum per unit amount of the aluminum-containing material forming the second semiconductor multilayer film reflector 30. The selective oxidation layer 32 may be made of, for example, AlAs (aluminum arsenide), Al 0.98 It is made of GaAs etc.

[0044] An interlayer insulating film 38 serving as an inorganic insulating film is deposited around the semiconductor layer including the mesa structure 36. The interlayer insulating film 38 extends from the side surface of the mesa structure 36 to the surface of the substrate 22. The interlayer insulating film 38 is also disposed below the electrode pad 42A.

[0045] The interlayer insulating film 38 is formed of, for example, a silicon nitride film (SiN film). Note that the material of the interlayer insulating film 38 is not limited to a silicon nitride film, and may be, for example, a silicon oxide film (SiO film) or a silicon oxynitride film (SiON film).

[0046] Wiring 40 is provided on the interlayer insulating film 38. One end of this wiring 40 is connected to the contact metal 34, which will be described later. Meanwhile, the other end of the wiring 40 extends from the contact metal 34 on the interlayer insulating film 38, passing through the side surface of the mesa structure 36, to the surface of the substrate 22. A p-side electrode pad 42A is formed by a portion of the interlayer insulating film 38 located on the surface of the substrate 22.

[0047] The contact metal 34 is provided on the second semiconductor multilayer film reflector 30. This contact metal 34 is connected to the wiring 40. For example, a Ti / Au laminated film may be used for the contact metal 34. Note that, as an example, the contact metal 34 in this embodiment has a circular ring shape with a rectangular cross section.

[0048] Furthermore, a dielectric multilayer film reflector 44 is laminated on the contact metal 34. This dielectric multilayer film reflector 44 may be included in the upper DBR.

[0049] The dielectric multilayer reflector 44 is a multilayer reflector formed by alternately stacking two dielectric films with different refractive indices. Specifically, the dielectric multilayer reflector 44 is formed by alternately stacking a high refractive index film made of Ta2O5 (tantalum pentoxide) and a low refractive index film made of silicon oxide (SiO2).

[0050] Next, the active layer 28 will be described in detail. FIG. 2 is an enlarged cross-sectional view of the active layer 28 and its surroundings of the surface-emitting semiconductor laser 20 shown in FIG.

[0051] As shown in FIG. 2, the active layer 28 is an example of a light-emitting layer that is disposed between the first semiconductor multilayer reflector 26 and the second semiconductor multilayer reflector 30 and emits light.

[0052] The active layer 28 is configured by alternately stacking quantum well layers 28A and barrier layers 28B.

[0053] The quantum well layer 28A is a layer containing at least In, Ga, and As. In the present embodiment, as an example, the quantum well layer 28A is a layer made of InGaAs (indium gallium arsenide).

[0054] The barrier layer 28B is, for example, a layer made of GaAs.

[0055] The active layer 28 is configured by alternately stacking InGaAs films that form quantum well layers 28A and GaAs films that form barrier layers 28B.

[0056] The thickness T1 of the quantum well layer 28A is smaller than the critical thickness T0 by a predetermined margin M. This margin M is preferably 4.0 nm or more, and more preferably 4.4 nm or more.

[0057] The "critical film thickness" in this embodiment is based on the theoretical value of Matthews-Blakeslee.

[0058] Furthermore, it is preferable that the thickness T1 of the quantum well layer 28A be within ±30% of the thickness of the barrier layer 28B.

[0059] Furthermore, the thickness T1 of the quantum well layer 28A is preferably thinner than the thickness T2 of the barrier layer 28B. That is, the thickness T1 of the quantum well layer 28A is more preferably thinner than the thickness T2 of the barrier layer 28B by more than 0% and not more than 30%.

[0060] The thickness T2 of the barrier layer 28B is equal to or less than the critical thickness T0, and is preferably equal to or greater than 4.0 nm.

[0061] The quantum well layer 28A preferably has an In (indium) composition of 28% or more.

[0062] Next, the effects of this embodiment will be described.

[0063] When substrate 22 is primarily made of GaAs, selecting InGaAs with a high indium content as the material for quantum well layer 28A increases crystal strain due to lattice mismatch. Increasing the thickness of barrier layer 28B to suppress dislocation propagation due to increased crystal strain makes it difficult to form a multilayer quantum well layer 28A in active layer 28 and to increase the optical confinement factor. In response to this, we discovered that by reducing thickness T1 of quantum well layer 28A with a high indium content by a predetermined margin M below the critical thickness T0, it becomes possible to also reduce thickness T2 of barrier layer 28B.

[0064] In the surface-emitting semiconductor laser 20 of this embodiment, as described above, the thickness T1 of the quantum well layer 28A is thinner than the critical thickness T0 by a predetermined margin M. Therefore, in the surface-emitting semiconductor laser 20, the thickness T2 of the barrier layer 28B can be made thinner than in the case where the thickness T1 of the quantum well layer 28A is increased to close to the critical thickness T0 and the barrier layer 28B has a thickness T2 corresponding to the thickness T1 of the quantum well layer 28A, and the quantum well layer 28A can be made multi-layered in the active layer 28. Furthermore, by making the quantum well layer 28A multi-layered in the active layer 28, the optical confinement factor is increased.

[0065] In the surface-emitting semiconductor laser 20 of this embodiment, the quantum well layer 28A in the active layer 28 can be multi-layered by setting the margin M to 4.0 nm or more, preferably 4.4 nm or more.

[0066] In the surface-emitting semiconductor laser 20 of this embodiment, the In composition of the quantum well layer 28A is set to 28% or more, which makes it easier to ensure a margin M between the critical film thickness T0 and the thickness T1 of the quantum well layer 28A, compared to when the In composition of the quantum well layer 28A is less than 28%. In the active layer 28 applied to the surface-emitting semiconductor laser 20 of this embodiment, by setting the In composition of the quantum well layer 28A to 28% or more, it is possible to reduce the thickness T1 of the quantum well layer 28A and the thickness T2 of the barrier layer 28B, and ensure the mPL (photoluminescence) emission intensity of the active layer 28.

[0067] Furthermore, in the surface-emitting semiconductor laser 20 of this embodiment, when the thickness T1 of the quantum well layer 28A is set to within ±30% of the thickness of the barrier layer 28B, it is possible to ensure the PL emission intensity of the active layer 28 while suppressing coupling between adjacent quantum well layers 28A, compared to when the thickness T1 of the quantum well layer 28A is more than +30% or less than −30% of the thickness T2 of the barrier layer 28B.

[0068] Furthermore, in the surface-emitting semiconductor laser 20 of this embodiment, when the thickness T1 of the quantum well layer 28A is thinner than the thickness T2 of the barrier layer 28B, an increase in crystal strain due to lattice mismatch can be suppressed compared to when the thickness T1 of the quantum well layer 28A is thicker than the thickness T2 of the barrier layer 28B. That is, by making the thickness T1 thinner than the thickness T2, dislocation propagation due to increased crystal strain can be suppressed. Furthermore, when the thickness T1 of the quantum well layer 28A is thinner than the thickness T2 of the barrier layer 28B by more than 0% but not more than 30%, PL emission intensity of the active layer 28 can be ensured while suppressing coupling between adjacent quantum well layers 28A, and dislocation propagation due to increased crystal strain can be suppressed.

[0069] Furthermore, in the surface-emitting semiconductor laser 20 of this embodiment, the thickness T2 of the barrier layers 28B is equal to or less than the critical film thickness T0 and is equal to or greater than 4.0 nm. Therefore, in the surface-emitting semiconductor laser 20, the quantum well layers 28A can be multi-layered in the active layer 28, compared to when the thickness T2 of the barrier layers 28B exceeds the critical film thickness T0 of the quantum well layers 28A. Furthermore, in the surface-emitting semiconductor laser 20, coupling between adjacent quantum well layers 28A can be suppressed, compared to when the thickness T2 of the barrier layers 28B is less than 4.0 nm.

[0070] In the surface-emitting semiconductor laser 20 of this embodiment, the quantum well layer 28A is an InGaAs quantum well layer. Therefore, in the surface-emitting semiconductor laser 20, it is easier to ensure a margin M between the critical film thickness T0 and the thickness T1 of the quantum well layer 28A compared to when the surface-emitting semiconductor laser 20 contains a component other than InGaAs.

[0071] The relationship between the indium composition of the quantum well layer 28A, the thickness T1 of the quantum well layer 28A, the critical thickness T0, and the margin M when laser light having a wavelength of 1060 nm is obtained from the surface-emitting semiconductor laser 20 of this embodiment is shown in Table 1 and FIG.

[0072] In Table 1, an "A" was assigned to those for which the relationship 4.0 nm≦thickness T2 of barrier layer 28B<critical film thickness T0 of quantum well layer 28A could be established, and a "B" was assigned to those for which the relationship of thickness T2 of barrier layer 28B<critical film thickness T0 of quantum well layer 28A could be established but thickness T2 could not be reduced to 4.0 nm.

[0073] [Table 1]

[0074] 3, by setting the thickness T1 of quantum well layer 28A so that the margin M from the critical thickness T0 is 4.0 nm or more, and setting the thickness T2 of barrier layer 28B in accordance with this thickness T1, it is possible to make the thickness T2 of barrier layer 28B thinner than when the thickness T1 is set close to the critical thickness T0 and the thickness T2 is set in accordance with that thickness T1. This allows the quantum well layer 28A in the active layer 28 to be multi-layered.

[0075] 4 is a graph showing the relationship between the thickness T2 of the barrier layer 28B and the optical confinement factor obtained by simulation. As shown in Fig. 4, for all In compositions, as the thickness T2 of the barrier layer 28B becomes thinner, the quantum well layer 28A in the active layer 28 becomes more multilayered, and the optical confinement factor increases.

[0076] The above describes an embodiment of the surface-emitting semiconductor laser 20. An embodiment may also be an optical transmission device including the surface-emitting semiconductor laser 20. This optical transmission device includes an optical transmission section (not shown) that transmits light output from the surface-emitting semiconductor laser 20. Such an optical transmission device can increase the optical transmission speed compared to a case where a light-emitting semiconductor laser having a configuration in which the thickness T1 of the quantum well layer 28A is increased to close to the critical thickness T0 and the barrier layer 28B has a thickness corresponding to the thickness T1 of the quantum well layer 28A is used.

[0077] In the above embodiment, the dielectric multilayer reflector 44 is disposed on the first semiconductor multilayer reflector 26, but the present disclosure is not limited to this configuration. The dielectric multilayer reflector 44 may be omitted, and the reflectivity required for the upper DBR may be provided only by the second semiconductor multilayer reflector 30. In this way, the reflectivity that is insufficient when the dielectric multilayer reflector is omitted from a VCSEL structure using a dielectric multilayer reflector is compensated for, making it easier to obtain laser oscillation.

[0078] In the above embodiment, a GaAs-based surface-emitting semiconductor laser using a semi-insulating GaAs substrate has been described as an example. However, the present invention is not limited to this. A GaN (gallium nitride) substrate or an InP (indium phosphide) substrate may also be used. If the substrate material is changed, the material and narrowing method must be appropriately selected to suit the substrate material. For example, in the case of a GaN substrate, a pair of AlGaN (aluminum gallium nitride) and GaN may be used for the lower DBR (described later), a pair of InGaN (indium gallium nitride) quantum well layer and GaN barrier layer may be used for the active layer, and a dielectric DBR may be used for the upper DBR. In the case of an InP substrate, a pair of InGaAsP with different compositions may be used for the lower DBR, an InGaAsP quantum well layer and barrier layer with different compositions may be used for the active layer, and a dielectric DBR may be used for the upper DBR. Furthermore, when using a GaN substrate and an InP substrate, materials that can be selectively oxidized cannot be used, and oxidation confinement is not possible. Therefore, it is advisable to use current confinement using, for example, a buried tunnel junction.

[0079] In the above embodiment, an n-type contact layer is formed on the substrate, but the present invention is not limited to this and a p-type contact layer may be formed on the substrate. In this case, the n-type and p-type may be reversed in the above description.

[0080] In addition, in the above embodiment, a surface-emitting semiconductor laser using InGaAs for the quantum well layer 28A and GaAs for the barrier layer 28B has been described explicitly, but the present invention is not limited to this, and a configuration using InAlGaAs for the quantum well layer 28A and AlGaAs, GaAsP, or the like for the barrier layer may also be used.

[0081] Furthermore, the present disclosure is not limited to the above, and it goes without saying that various modifications can be made without departing from the spirit of the present disclosure.

[0082] The following additional notes are provided regarding the above-described embodiments. (((1))) A substrate; a first semiconductor multilayer film reflector laminated on the substrate; a second semiconductor multilayer film reflector including a current confinement layer and stacked on the first semiconductor multilayer film reflector; a light-emitting layer disposed between the first semiconductor multilayer reflector and the second semiconductor multilayer reflector, the light-emitting layer being configured by alternately stacking quantum well layers and barrier layers containing at least In, Ga, and As, the quantum well layers having a thickness thinner than a critical thickness by a predetermined margin; A surface-emitting semiconductor laser comprising:

[0083] (((2))) The thickness of the barrier layer is equal to or less than the critical thickness. The surface-emitting semiconductor laser according to (((1))).

[0084] (((3))) The margin is 4.0 nm or more. The surface-emitting semiconductor laser according to (((1))).

[0085] (((4))) The margin is 4.4 nm or more. The surface-emitting semiconductor laser according to (((3))).

[0086] (((5))) The quantum well layer has an In composition of 28% or more. The surface-emitting semiconductor laser according to any one of ((1))) to ((4))).

[0087] (((6))) The thickness of the quantum well layer is less than the thickness of the barrier layer. The surface-emitting semiconductor laser according to any one of ((1))) to ((5))).

[0088] (((7))) The thickness of the barrier layer is 4.0 nm or more. The surface-emitting semiconductor laser according to (((2))).

[0089] (((8))) The thickness of the quantum well layer is within ±30% of the thickness of the barrier layer. The surface-emitting semiconductor laser according to any one of ((1))) to ((5))).

[0090] (((9))) the quantum well layer is an InGaAs quantum well layer; The surface-emitting semiconductor laser according to any one of (((1))) to (((8))).

[0091] (((10))) a surface-emitting semiconductor laser according to any one of ((1))) to (((9))); an optical transmission section that transmits light output from the surface-emitting semiconductor laser; An optical transmission device comprising:

[0092] According to (((1))), in a light-emitting layer formed by alternately laminating quantum well layers and barrier layers containing at least In, Ga, and As, the thickness of the quantum well layers is increased to nearly the critical film thickness, and the quantum well layers can be multi-layered compared to when the barrier layers are provided with a thickness corresponding to the thickness of the quantum well layers.

[0093] According to (((2))), the quantum well layer can be multi-layered compared to when the thickness of the barrier layer exceeds the critical thickness of the quantum well layer.

[0094] According to (((3))), the quantum well layer can be multi-layered compared to when the margin is less than 4.0 nm.

[0095] According to (((4))), the quantum well layer can be multi-layered compared to when the margin is less than 4.3 nm.

[0096] According to (((5))), it is easier to ensure a margin between the critical film thickness and the thickness of the quantum well layer compared to when the In composition of the quantum well layer is less than 28%.

[0097] According to (((6))), the increase in crystal distortion due to lattice mismatch can be suppressed compared to when the quantum well layer is thicker than the barrier layer.

[0098] According to (((7))), the coupling between adjacent quantum well layers can be suppressed compared to when the thickness of the barrier layer is less than 4.0 nm.

[0099] According to (((8))), it is possible to ensure the intensity of laser light from the light-emitting layer while suppressing coupling between adjacent quantum well layers, compared to when the thickness of the quantum well layer is more than +30% or less than -30% of the thickness of the barrier layer.

[0100] According to (((9))), it is easier to ensure a margin between the critical film thickness and the thickness of the quantum well layer compared to when the quantum well layer contains a component other than InGaAs.

[0101] According to (((10))), in a light-emitting layer formed by alternately laminating quantum well layers and barrier layers containing at least In, Ga, and As, the thickness of the quantum well layers is increased to nearly the critical film thickness, and the optical transmission speed can be increased compared to when a light-emitting semiconductor laser is used in which the barrier layers have a thickness corresponding to the thickness of the quantum well layers. [Explanation of symbols]

[0102] 20 Surface-emitting semiconductor laser 22 PCB 24 Contact layer 26 First Semiconductor Multilayer Reflector 28 Active layer (an example of an emitting layer) 28A Quantum well layer 28B Barrier Layer 30 Second semiconductor multilayer mirror 32 Selective oxidation layer 32A aperture 32B Oxidized constriction region 34 Contact Metal 36 Mesa structure 38 Interlayer insulating film 40 Wiring 42A electrode pad 42B electrode pad T0 critical film thickness T1 Quantum well layer thickness T2 Barrier layer thickness M margin

Claims

1. A substrate; a first semiconductor multilayer film reflector laminated on the substrate; a second semiconductor multilayer film reflector including a current confinement layer and stacked on the first semiconductor multilayer film reflector; a light-emitting layer disposed between the first semiconductor multilayer reflector and the second semiconductor multilayer reflector, the light-emitting layer being configured by alternately stacking quantum well layers and barrier layers containing at least In, Ga, and As, the quantum well layers having a thickness smaller than a critical film thickness by a predetermined margin; A surface-emitting semiconductor laser comprising:

2. The thickness of the barrier layer is equal to or less than the critical thickness.

2. The surface-emitting semiconductor laser according to claim 1.

3. The margin is 4.0 nm or more.

2. The surface-emitting semiconductor laser according to claim 1.

4. The margin is 4.4 nm or more.

4. The surface-emitting semiconductor laser according to claim 3.

5. The quantum well layer has an In composition of 28% or more.

3. The surface-emitting semiconductor laser according to claim 1.

6. The thickness of the quantum well layer is less than the thickness of the barrier layer.

2. The surface-emitting semiconductor laser according to claim 1.

7. The thickness of the barrier layer is 4.0 nm or more.

3. The surface-emitting semiconductor laser according to claim 2.

8. The thickness of the quantum well layer is within ±30% of the thickness of the barrier layer.

2. The surface-emitting semiconductor laser according to claim 1.

9. The quantum well layer is an InGaAs quantum well layer.

2. The surface-emitting semiconductor laser according to claim 1.

10. a surface-emitting semiconductor laser according to claim 1; an optical transmission section that transmits light output from the surface-emitting semiconductor laser; An optical transmission device comprising:

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